gcc/testsuite/gcc.target/aarch64/sve/vec_perm_const_single_1_run.c

   1 /* { dg-do run { target aarch64_sve_hw } } */
   2 /* { dg-options "-O" } */
   3 /* { dg-options "-O -msve-vector-bits=256" { target aarch64_sve256_hw } } */
   4
   5 #include "vec_perm_const_single_1.c"
   6
   7 #define TEST_VEC_PERM(TYPE, EXPECTED_RESULT, VALUES1, VALUES2)          \
   8 {                                                                       \
   9   TYPE expected_result = EXPECTED_RESULT;                               \
  10   TYPE values1 = VALUES1;                                               \
  11   TYPE values2 = VALUES2;                                               \
  12   TYPE dest;                                                            \
  13   dest = vec_perm_##TYPE (values1, values2);                            \
  14   if (__builtin_memcmp (&dest, &expected_result, sizeof (TYPE)) != 0)   \
  15     __builtin_abort ();                                                 \
  16 }
  17
  18 int main (void)
  19 {
  20   TEST_VEC_PERM (vnx2di,
  21                  ((vnx2di) { 4, 7, 6, 5 }),
  22                  ((vnx2di) { 4, 5, 6, 7 }),
  23                  ((vnx2di) { 12, 24, 36, 48 }));
  24   TEST_VEC_PERM (vnx4si,
  25                  ((vnx4si) { 6, 10, 4, 3, 5, 7, 7, 5 }),
  26                  ((vnx4si) { 3, 4, 5, 6, 7, 8, 9, 10 }),
  27                  ((vnx4si) { 33, 34, 35, 36, 37, 38, 39, 40 }));
  28   TEST_VEC_PERM (vnx8hi,
  29                  ((vnx8hi) { 11, 10, 8, 7, 14, 15, 16, 3,
  30                              4, 4, 11, 12, 6, 17, 18, 4 }),
  31                  ((vnx8hi) { 3, 4, 5, 6, 7, 8, 9, 10,
  32                              11, 12, 13, 14, 15, 16, 17, 18 }),
  33                  ((vnx8hi) { 33, 34, 35, 36, 37, 38, 39, 40,
  34                              41, 42, 43, 44, 45, 46, 47, 48 }));
  35   TEST_VEC_PERM (vnx16qi,
  36                  ((vnx16qi) { 5, 5, 7, 6, 4, 4, 7, 4,
  37                               6, 7, 6, 5, 4, 7, 6, 7,
  38                               4, 5, 7, 7, 4, 7, 4, 5,
  39                               6, 7, 6, 7, 6, 4, 6, 5 }),
  40                  ((vnx16qi) { 4, 5, 6, 7, 4, 5, 6, 7,
  41                               4, 5, 6, 7, 4, 5, 6, 7,
  42                               4, 5, 6, 7, 4, 5, 6, 7,
  43                               4, 5, 6, 7, 4, 5, 6, 7 }),
  44                  ((vnx16qi) { 12, 24, 36, 48, 12, 24, 36, 48,
  45                               12, 24, 36, 48, 12, 24, 36, 48,
  46                               12, 24, 36, 48, 12, 24, 36, 48,
  47                               12, 24, 36, 48, 12, 24, 36, 48 }));
  48   TEST_VEC_PERM (vnx2df,
  49                  ((vnx2df) { 7.5, 7.5, 5.5, 5.5 }),
  50                  ((vnx2df) { 4.5, 5.5, 6.5, 7.5 }),
  51                  ((vnx2df) { 12.5, 24.5, 36.5, 48.5 }));
  52   TEST_VEC_PERM (vnx4sf,
  53                  ((vnx4sf) { 7.5, 8.5, 9.5, 3.5, 5.5, 10.5, 7.5, 5.5 }),
  54                  ((vnx4sf) { 3.5, 4.5, 5.5, 6.5, 7.5, 8.5, 9.5, 10.5 }),
  55                  ((vnx4sf) { 33.5, 34.5, 35.5, 36.5,
  56                              37.5, 38.5, 39.5, 40.5 }));
  57   TEST_VEC_PERM (vnx8hf,
  58                  ((vnx8hf) { 11.0, 10.0, 8.0, 7.0, 14.0, 15.0, 16.0, 3.0,
  59                              4.0, 4.0, 11.0, 12.0, 6.0, 17.0, 18.0, 4.0 }),
  60                  ((vnx8hf) { 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0,
  61                              11.0, 12.0, 13.0, 14.0, 15.0, 16.0, 17.0, 18.0 }),
  62                  ((vnx8hf) { 33.0, 34.0, 35.0, 36.0, 37.0, 38.0, 39.0, 40.0,
  63                              41.0, 42.0, 43.0, 44.0, 45.0, 46.0, 47.0, 48.0 }));
  64   return 0;
  65 }