gcc/testsuite/gcc.target/aarch64/sve/trn2_1.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O -msve-vector-bits=256" } */
   3
   4 #define BIAS 1
   5 #include "trn1_1.c"
   6
   7 /* { dg-final { scan-assembler-not {\ttbl\t} } } */
   8
   9 /* { dg-final { scan-assembler-times {\ttrn2\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d} 2 } } */
  10 /* { dg-final { scan-assembler-times {\ttrn2\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s} 2 } } */
  11 /* { dg-final { scan-assembler-times {\ttrn2\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h} 2 } } */
  12 /* { dg-final { scan-assembler-times {\ttrn2\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b} 1 } } */