1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O2 -ftree-vectorize --save-temps" } */
5 #define TYPE unsigned char
6 #define ITYPE signed char
9 void __attribute__ ((noinline
, noclone
))
10 f2 (TYPE
*__restrict a
, TYPE
*__restrict b
, TYPE
*__restrict c
, ITYPE n
)
12 for (ITYPE i
= 0; i
< n
; ++i
)
19 void __attribute__ ((noinline
, noclone
))
20 f3 (TYPE
*__restrict a
, TYPE
*__restrict b
, TYPE
*__restrict c
,
21 TYPE
*__restrict d
, ITYPE n
)
23 for (ITYPE i
= 0; i
< n
; ++i
)
31 void __attribute__ ((noinline
, noclone
))
32 f4 (TYPE
*__restrict a
, TYPE
*__restrict b
, TYPE
*__restrict c
,
33 TYPE
*__restrict d
, TYPE
*__restrict e
, ITYPE n
)
35 for (ITYPE i
= 0; i
< n
; ++i
)
44 void __attribute__ ((noinline
, noclone
))
45 g2 (TYPE
*__restrict a
, TYPE
*__restrict b
, TYPE
*__restrict c
, ITYPE n
)
47 for (ITYPE i
= 0; i
< n
; ++i
)
54 void __attribute__ ((noinline
, noclone
))
55 g3 (TYPE
*__restrict a
, TYPE
*__restrict b
, TYPE
*__restrict c
,
56 TYPE
*__restrict d
, ITYPE n
)
58 for (ITYPE i
= 0; i
< n
; ++i
)
66 void __attribute__ ((noinline
, noclone
))
67 g4 (TYPE
*__restrict a
, TYPE
*__restrict b
, TYPE
*__restrict c
,
68 TYPE
*__restrict d
, TYPE
*__restrict e
, ITYPE n
)
70 for (ITYPE i
= 0; i
< n
; ++i
)
79 /* { dg-final { scan-assembler {\tld2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z, \[x[0-9]+\]\n} } } */
80 /* { dg-final { scan-assembler {\tld3b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z, \[x[0-9]+\]\n} } } */
81 /* { dg-final { scan-assembler {\tld4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7]/z, \[x[0-9]+\]\n} } } */
82 /* { dg-final { scan-assembler {\tst2b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7], \[x[0-9]+\]\n} } } */
83 /* { dg-final { scan-assembler {\tst3b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7], \[x[0-9]+\]\n} } } */
84 /* { dg-final { scan-assembler {\tst4b\t{z[0-9]+.b - z[0-9]+.b}, p[0-7], \[x[0-9]+\]\n} } } */