Add support for conditional reductions using SVE CLASTB
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / struct_vect_10.c
blobe19ab3d89eefcc621a6128aa00356c5015571d10
1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O2 -ftree-vectorize --save-temps" } */
4 #define TYPE unsigned long
5 #define ITYPE long
6 #include "struct_vect_7.c"
8 /* { dg-final { scan-assembler {\tld2d\t{z[0-9]+.d - z[0-9]+.d}, p[0-7]/z, \[x[0-9]+\]\n} } } */
9 /* { dg-final { scan-assembler {\tld3d\t{z[0-9]+.d - z[0-9]+.d}, p[0-7]/z, \[x[0-9]+\]\n} } } */
10 /* { dg-final { scan-assembler {\tld4d\t{z[0-9]+.d - z[0-9]+.d}, p[0-7]/z, \[x[0-9]+\]\n} } } */
11 /* { dg-final { scan-assembler {\tst2d\t{z[0-9]+.d - z[0-9]+.d}, p[0-7], \[x[0-9]+\]\n} } } */
12 /* { dg-final { scan-assembler {\tst3d\t{z[0-9]+.d - z[0-9]+.d}, p[0-7], \[x[0-9]+\]\n} } } */
13 /* { dg-final { scan-assembler {\tst4d\t{z[0-9]+.d - z[0-9]+.d}, p[0-7], \[x[0-9]+\]\n} } } */