gcc/testsuite/gcc.target/aarch64/sve/slp_2.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=scalable" } */
   3
   4 #include <stdint.h>
   5
   6 #define VEC_PERM(TYPE)                                          \
   7 TYPE __attribute__ ((noinline, noclone))                        \
   8 vec_slp_##TYPE (TYPE *restrict a, int n)                        \
   9 {                                                               \
  10   for (int i = 0; i < n; ++i)                                   \
  11     {                                                           \
  12       a[i * 2] += 10;                                           \
  13       a[i * 2 + 1] += 17;                                       \
  14     }                                                           \
  15 }
  16
  17 #define TEST_ALL(T)                             \
  18   T (int8_t)                                    \
  19   T (uint8_t)                                   \
  20   T (int16_t)                                   \
  21   T (uint16_t)                                  \
  22   T (int32_t)                                   \
  23   T (uint32_t)                                  \
  24   T (int64_t)                                   \
  25   T (uint64_t)                                  \
  26   T (_Float16)                                  \
  27   T (float)                                     \
  28   T (double)
  29
  30 TEST_ALL (VEC_PERM)
  31
  32 /* { dg-final { scan-assembler-times {\tld1rh\tz[0-9]+\.h, } 2 } } */
  33 /* { dg-final { scan-assembler-times {\tld1rw\tz[0-9]+\.s, } 3 } } */
  34 /* { dg-final { scan-assembler-times {\tld1rd\tz[0-9]+\.d, } 3 } } */
  35 /* { dg-final { scan-assembler-times {\tld1rqb\tz[0-9]+\.b, } 3 } } */
  36 /* { dg-final { scan-assembler-not {\tzip1\t} } } */
  37 /* { dg-final { scan-assembler-not {\tzip2\t} } } */
  38
  39 /* The loop should be fully-masked.  */
  40 /* { dg-final { scan-assembler-times {\tld1b\t} 2 } } */
  41 /* { dg-final { scan-assembler-times {\tst1b\t} 2 } } */
  42 /* { dg-final { scan-assembler-times {\tld1h\t} 3 } } */
  43 /* { dg-final { scan-assembler-times {\tst1h\t} 3 } } */
  44 /* { dg-final { scan-assembler-times {\tld1w\t} 3 } } */
  45 /* { dg-final { scan-assembler-times {\tst1w\t} 3 } } */
  46 /* { dg-final { scan-assembler-times {\tld1d\t} 3 } } */
  47 /* { dg-final { scan-assembler-times {\tst1d\t} 3 } } */
  48 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 } } */
  49 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 6 } } */
  50 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 6 } } */
  51 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.d} 6 } } */
  52 /* { dg-final { scan-assembler-not {\tldr} } } */
  53 /* { dg-final { scan-assembler-not {\tstr} } } */
  54
  55 /* { dg-final { scan-assembler-not {\tuqdec} } } */