Add support for conditional reductions using SVE CLASTB
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / slp_11.c
blob3c3b088140751f172a885d480bdb8b8f3b37d1b0
1 /* { dg-do compile } */
2 /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=scalable" } */
4 #include <stdint.h>
6 #define VEC_PERM(TYPE1, TYPE2) \
7 void __attribute__ ((noinline, noclone)) \
8 vec_slp_##TYPE1##_##TYPE2 (TYPE1 *restrict a, \
9 TYPE2 *restrict b, int n) \
10 { \
11 for (int i = 0; i < n; ++i) \
12 { \
13 a[i * 2] += 1; \
14 a[i * 2 + 1] += 2; \
15 b[i * 4] += 3; \
16 b[i * 4 + 1] += 4; \
17 b[i * 4 + 2] += 5; \
18 b[i * 4 + 3] += 6; \
19 } \
22 #define TEST_ALL(T) \
23 T (int16_t, uint8_t) \
24 T (uint16_t, int8_t) \
25 T (int32_t, uint16_t) \
26 T (uint32_t, int16_t) \
27 T (float, uint16_t) \
28 T (int64_t, float) \
29 T (uint64_t, int32_t) \
30 T (double, uint32_t)
32 TEST_ALL (VEC_PERM)
34 /* The loop should be fully-masked. */
35 /* { dg-final { scan-assembler-times {\tld1b\t} 2 } } */
36 /* { dg-final { scan-assembler-times {\tst1b\t} 2 } } */
37 /* { dg-final { scan-assembler-times {\tld1h\t} 5 } } */
38 /* { dg-final { scan-assembler-times {\tst1h\t} 5 } } */
39 /* { dg-final { scan-assembler-times {\tld1w\t} 6 } } */
40 /* { dg-final { scan-assembler-times {\tst1w\t} 6 } } */
41 /* { dg-final { scan-assembler-times {\tld1d\t} 3 } } */
42 /* { dg-final { scan-assembler-times {\tst1d\t} 3 } } */
43 /* { dg-final { scan-assembler-not {\tldr} } } */
44 /* { dg-final { scan-assembler-not {\tstr} } } */
46 /* We should use the same WHILEs for both accesses. */
47 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.b} 4 } } */
48 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.h} 6 } } */
49 /* { dg-final { scan-assembler-times {\twhilelo\tp[0-7]\.s} 6 } } */
50 /* { dg-final { scan-assembler-not {\twhilelo\tp[0-7]\.d} } } */
52 /* { dg-final { scan-assembler-not {\tuqdec} } } */