gcc/testsuite/gcc.target/aarch64/sve/shift_1.c

   1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
   2 /* { dg-options "-O2 -ftree-vectorize --save-temps" } */
   3
   4 #include <stdint.h>
   5
   6 #define DO_REG_OPS(TYPE)                                        \
   7 void ashiftr_##TYPE (TYPE *dst, TYPE src, int count)            \
   8 {                                                               \
   9   for (int i = 0; i < count; ++i)                               \
  10     dst[i] = dst[i] >> src;                                     \
  11 }                                                               \
  12 void lshiftr_##TYPE (u##TYPE *dst, u##TYPE src, int count)      \
  13 {                                                               \
  14   for (int i = 0; i < count; ++i)                               \
  15     dst[i] = dst[i] >> src;                                     \
  16 }                                                               \
  17 void lshiftl_##TYPE (u##TYPE *dst, u##TYPE src, int count)      \
  18 {                                                               \
  19   for (int i = 0; i < count; ++i)                               \
  20     dst[i] = dst[i] << src;                                     \
  21 }                                                               \
  22 void vashiftr_##TYPE (TYPE *dst, TYPE *src, int count)          \
  23 {                                                               \
  24   for (int i = 0; i < count; ++i)                               \
  25     dst[i] = dst[i] >> src[i];                                  \
  26 }                                                               \
  27 void vlshiftr_##TYPE (u##TYPE *dst, u##TYPE *src, int count)    \
  28 {                                                               \
  29   for (int i = 0; i < count; ++i)                               \
  30     dst[i] = dst[i] >> src[i];                                  \
  31 }                                                               \
  32 void vlshiftl_##TYPE (u##TYPE *dst, u##TYPE *src, int count)    \
  33 {                                                               \
  34   for (int i = 0; i < count; ++i)                               \
  35     dst[i] = dst[i] << src[i];                                  \
  36 }
  37
  38 #define DO_IMMEDIATE_OPS(VALUE, TYPE, NAME)                     \
  39 void vashiftr_imm_##NAME##_##TYPE (TYPE *dst, int count)        \
  40 {                                                               \
  41   for (int i = 0; i < count; ++i)                               \
  42     dst[i] = dst[i] >> VALUE;                                   \
  43 }                                                               \
  44 void vlshiftr_imm_##NAME##_##TYPE (u##TYPE *dst, int count)     \
  45 {                                                               \
  46   for (int i = 0; i < count; ++i)                               \
  47     dst[i] = dst[i] >> VALUE;                                   \
  48 }                                                               \
  49 void vlshiftl_imm_##NAME##_##TYPE (u##TYPE *dst, int count)     \
  50 {                                                               \
  51   for (int i = 0; i < count; ++i)                               \
  52     dst[i] = dst[i] << VALUE;                                   \
  53 }
  54
  55 DO_REG_OPS (int32_t);
  56 DO_REG_OPS (int64_t);
  57
  58 DO_IMMEDIATE_OPS (0, int8_t, 0);
  59 DO_IMMEDIATE_OPS (5, int8_t, 5);
  60 DO_IMMEDIATE_OPS (7, int8_t, 7);
  61
  62 DO_IMMEDIATE_OPS (0, int16_t, 0);
  63 DO_IMMEDIATE_OPS (5, int16_t, 5);
  64 DO_IMMEDIATE_OPS (15, int16_t, 15);
  65
  66 DO_IMMEDIATE_OPS (0, int32_t, 0);
  67 DO_IMMEDIATE_OPS (5, int32_t, 5);
  68 DO_IMMEDIATE_OPS (31, int32_t, 31);
  69
  70 DO_IMMEDIATE_OPS (0, int64_t, 0);
  71 DO_IMMEDIATE_OPS (5, int64_t, 5);
  72 DO_IMMEDIATE_OPS (63, int64_t, 63);
  73
  74 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */
  75 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */
  76 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */
  77
  78 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
  79 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
  80 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 2 } } */
  81
  82 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.b, z[0-9]+\.b, #5\n} 1 } } */
  83 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.b, z[0-9]+\.b, #5\n} 1 } } */
  84 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.b, z[0-9]+\.b, #5\n} 1 } } */
  85 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.b, z[0-9]+\.b, #7\n} 1 } } */
  86 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.b, z[0-9]+\.b, #7\n} 1 } } */
  87 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.b, z[0-9]+\.b, #7\n} 1 } } */
  88
  89 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.h, z[0-9]+\.h, #5\n} 1 } } */
  90 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.h, z[0-9]+\.h, #5\n} 1 } } */
  91 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.h, z[0-9]+\.h, #5\n} 1 } } */
  92 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.h, z[0-9]+\.h, #15\n} 1 } } */
  93 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.h, z[0-9]+\.h, #15\n} 1 } } */
  94 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.h, z[0-9]+\.h, #15\n} 1 } } */
  95
  96 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.s, z[0-9]+\.s, #5\n} 1 } } */
  97 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.s, z[0-9]+\.s, #5\n} 1 } } */
  98 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.s, z[0-9]+\.s, #5\n} 1 } } */
  99 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.s, z[0-9]+\.s, #31\n} 1 } } */
 100 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.s, z[0-9]+\.s, #31\n} 1 } } */
 101 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.s, z[0-9]+\.s, #31\n} 1 } } */
 102
 103 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.d, z[0-9]+\.d, #5\n} 1 } } */
 104 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.d, z[0-9]+\.d, #5\n} 1 } } */
 105 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.d, z[0-9]+\.d, #5\n} 1 } } */
 106 /* { dg-final { scan-assembler-times {\tasr\tz[0-9]+\.d, z[0-9]+\.d, #63\n} 1 } } */
 107 /* { dg-final { scan-assembler-times {\tlsr\tz[0-9]+\.d, z[0-9]+\.d, #63\n} 1 } } */
 108 /* { dg-final { scan-assembler-times {\tlsl\tz[0-9]+\.d, z[0-9]+\.d, #63\n} 1 } } */