1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O -msve-vector-bits=256 --save-temps" } */
6 typedef int8_t vnx16qi
__attribute__((vector_size (32)));
8 #define MASK_2(X, Y) (X) ^ (Y), (X + 1) ^ (Y)
9 #define MASK_4(X, Y) MASK_2 (X, Y), MASK_2 (X + 2, Y)
10 #define MASK_8(X, Y) MASK_4 (X, Y), MASK_4 (X + 4, Y)
11 #define MASK_16(X, Y) MASK_8 (X, Y), MASK_8 (X + 8, Y)
12 #define MASK_32(X, Y) MASK_16 (X, Y), MASK_16 (X + 16, Y)
14 #define INDEX_32 vnx16qi
16 #define PERMUTE(TYPE, NUNITS, REV_NUNITS) \
17 TYPE permute_##TYPE##_##REV_NUNITS (TYPE values1, TYPE values2) \
19 return __builtin_shuffle \
21 ((INDEX_##NUNITS) { MASK_##NUNITS (0, REV_NUNITS - 1) })); \
31 /* { dg-final { scan-assembler-not {\ttbl\t} } } */
33 /* { dg-final { scan-assembler-times {\trevb\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d} 1 } } */
34 /* { dg-final { scan-assembler-times {\trevb\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s} 1 } } */
35 /* { dg-final { scan-assembler-times {\trevb\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h} 1 } } */