gcc/testsuite/gcc.target/aarch64/sve/nlogical_1.c

   1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
   2 /* { dg-options "-O3 --save-temps" } */
   3
   4 #include <stdint.h>
   5
   6 #define DO_VNLOGICAL(TYPE)                              \
   7 void __attribute__ ((noinline, noclone))                \
   8 vnlogical_not_##TYPE (TYPE *dst, int count)             \
   9 {                                                       \
  10   for (int i = 0; i < count; i++)                       \
  11     dst[i] = ~dst[i];                                   \
  12 }                                                       \
  13                                                         \
  14 void __attribute__ ((noinline, noclone))                \
  15 vnlogical_bic_##TYPE (TYPE *dst, TYPE *src, int count)  \
  16 {                                                       \
  17   for (int i = 0; i < count; i++)                       \
  18     dst[i] = dst[i] & ~src[i];                          \
  19 }
  20
  21 #define TEST_ALL(T)                             \
  22   T (int8_t)                                    \
  23   T (int16_t)                                   \
  24   T (int32_t)                                   \
  25   T (int64_t)
  26
  27 TEST_ALL (DO_VNLOGICAL)
  28
  29 /* { dg-final { scan-assembler-times {\tnot\tz[0-9]+\.b, p[0-7]/m, z[0-9]+\.b\n} 1 } } */
  30 /* { dg-final { scan-assembler-times {\tnot\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 1 } } */
  31 /* { dg-final { scan-assembler-times {\tnot\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */
  32 /* { dg-final { scan-assembler-times {\tnot\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */
  33 /* { dg-final { scan-assembler-times {\tbic\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 4 } } */