Add support for conditional reductions using SVE CLASTB
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / mul_1.c
blob5856a7315442ac5ff2537f12be224d8ecffaabde
1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O3 --save-temps" } */
4 #include <stdint.h>
6 #define DO_REGREG_OPS(TYPE, OP, NAME) \
7 void varith_##TYPE##_##NAME (TYPE *dst, TYPE *src, int count) \
8 { \
9 for (int i = 0; i < count; ++i) \
10 dst[i] = dst[i] OP src[i]; \
13 #define DO_IMMEDIATE_OPS(VALUE, TYPE, OP, NAME) \
14 void varithimm_##NAME##_##TYPE (TYPE *dst, int count) \
15 { \
16 for (int i = 0; i < count; ++i) \
17 dst[i] = dst[i] OP VALUE; \
20 #define DO_ARITH_OPS(TYPE, OP, NAME) \
21 DO_REGREG_OPS (TYPE, OP, NAME); \
22 DO_IMMEDIATE_OPS (0, TYPE, OP, NAME ## 0); \
23 DO_IMMEDIATE_OPS (86, TYPE, OP, NAME ## 86); \
24 DO_IMMEDIATE_OPS (109, TYPE, OP, NAME ## 109); \
25 DO_IMMEDIATE_OPS (141, TYPE, OP, NAME ## 141); \
26 DO_IMMEDIATE_OPS (-1, TYPE, OP, NAME ## minus1); \
27 DO_IMMEDIATE_OPS (-110, TYPE, OP, NAME ## minus110); \
28 DO_IMMEDIATE_OPS (-141, TYPE, OP, NAME ## minus141);
30 DO_ARITH_OPS (int8_t, *, mul)
31 DO_ARITH_OPS (int16_t, *, mul)
32 DO_ARITH_OPS (int32_t, *, mul)
33 DO_ARITH_OPS (int64_t, *, mul)
35 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, p[0-7]/m, z[0-9]+\.b, z[0-9]+\.b\n} 1 } } */
36 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #86\n} 1 } } */
37 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #109\n} 1 } } */
38 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #115\n} 1 } } */
39 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #141\n} } } */
40 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-1\n} } } */
41 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-110\n} 1 } } */
42 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-115\n} 1 } } */
43 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-141\n} } } */
45 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 3 } } */
46 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #86\n} 1 } } */
47 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #109\n} 1 } } */
48 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #141\n} } } */
49 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #-110\n} 1 } } */
50 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #-141\n} } } */
52 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */
53 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #86\n} 1 } } */
54 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #109\n} 1 } } */
55 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #141\n} } } */
56 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #-110\n} 1 } } */
57 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #-141\n} } } */
59 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 3 } } */
60 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.d, z[0-9]+\.d, #86\n} 1 } } */
61 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.d, z[0-9]+\.d, #109\n} 1 } } */
62 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.d, z[0-9]+\.d, #141\n} } } */
63 /* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.d, z[0-9]+\.d, #-110\n} 1 } } */
64 /* { dg-final { scan-assembler-not {\tmul\tz[0-9]+\.d, z[0-9]+\.d, #-141\n} } } */