gcc/testsuite/gcc.target/aarch64/sve/loop_add_4.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=scalable" } */
   3
   4 #include <stdint.h>
   5
   6 #define LOOP(TYPE, NAME, STEP)                                  \
   7   __attribute__((noinline, noclone))                            \
   8   void                                                          \
   9   test_##TYPE##_##NAME (TYPE *dst, TYPE base, int count)        \
  10   {                                                             \
  11     for (int i = 0; i < count; ++i, base += STEP)               \
  12       dst[i] += base;                                           \
  13   }
  14
  15 #define TEST_TYPE(T, TYPE) \
  16   T (TYPE, m17, -17) \
  17   T (TYPE, m16, -16) \
  18   T (TYPE, m15, -15) \
  19   T (TYPE, m1, -1) \
  20   T (TYPE, 1, 1) \
  21   T (TYPE, 15, 15) \
  22   T (TYPE, 16, 16) \
  23   T (TYPE, 17, 17)
  24
  25 #define TEST_ALL(T) \
  26   TEST_TYPE (T, int8_t) \
  27   TEST_TYPE (T, int16_t) \
  28   TEST_TYPE (T, int32_t) \
  29   TEST_TYPE (T, int64_t)
  30
  31 TEST_ALL (LOOP)
  32
  33 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #-16\n} 1 } } */
  34 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #-15\n} 1 } } */
  35 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #1\n} 1 } } */
  36 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #15\n} 1 } } */
  37 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, w[0-9]+\n} 3 } } */
  38 /* { dg-final { scan-assembler-times {\tld1b\tz[0-9]+\.b, p[0-7]+/z, \[x[0-9]+, x[0-9]+\]} 8 } } */
  39 /* { dg-final { scan-assembler-times {\tst1b\tz[0-9]+\.b, p[0-7]+, \[x[0-9]+, x[0-9]+\]} 8 } } */
  40 /* { dg-final { scan-assembler-times {\tincb\tx[0-9]+\n} 8 } } */
  41
  42 /* { dg-final { scan-assembler-not {\tdecb\tz[0-9]+\.b} } } */
  43 /* We don't need to increment the vector IV for steps -16 and 16, since the
  44    increment is always a multiple of 256.  */
  45 /* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.b, z[0-9]+\.b, z[0-9]+\.b\n} 14 } } */
  46
  47 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #-16\n} 1 } } */
  48 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #-15\n} 1 } } */
  49 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #1\n} 1 } } */
  50 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #15\n} 1 } } */
  51 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, w[0-9]+\n} 3 } } */
  52 /* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.h, p[0-7]+/z, \[x[0-9]+, x[0-9]+, lsl 1\]} 8 } } */
  53 /* { dg-final { scan-assembler-times {\tst1h\tz[0-9]+\.h, p[0-7]+, \[x[0-9]+, x[0-9]+, lsl 1\]} 8 } } */
  54 /* { dg-final { scan-assembler-times {\tincb\tx[0-9]+\n} 8 } } */
  55
  56 /* { dg-final { scan-assembler-times {\tdech\tz[0-9]+\.h, all, mul #16\n} 1 } } */
  57 /* { dg-final { scan-assembler-times {\tdech\tz[0-9]+\.h, all, mul #15\n} 1 } } */
  58 /* { dg-final { scan-assembler-times {\tdech\tz[0-9]+\.h\n} 1 } } */
  59 /* { dg-final { scan-assembler-times {\tinch\tz[0-9]+\.h\n} 1 } } */
  60 /* { dg-final { scan-assembler-times {\tinch\tz[0-9]+\.h, all, mul #15\n} 1 } } */
  61 /* { dg-final { scan-assembler-times {\tinch\tz[0-9]+\.h, all, mul #16\n} 1 } } */
  62 /* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 10 } } */
  63
  64 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, w[0-9]+, #-16\n} 1 } } */
  65 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, w[0-9]+, #-15\n} 1 } } */
  66 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, w[0-9]+, #1\n} 1 } } */
  67 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, w[0-9]+, #15\n} 1 } } */
  68 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, w[0-9]+, w[0-9]+\n} 3 } } */
  69 /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.s, p[0-7]+/z, \[x[0-9]+, x[0-9]+, lsl 2\]} 8 } } */
  70 /* { dg-final { scan-assembler-times {\tst1w\tz[0-9]+\.s, p[0-7]+, \[x[0-9]+, x[0-9]+, lsl 2\]} 8 } } */
  71 /* { dg-final { scan-assembler-times {\tincw\tx[0-9]+\n} 8 } } */
  72
  73 /* { dg-final { scan-assembler-times {\tdecw\tz[0-9]+\.s, all, mul #16\n} 1 } } */
  74 /* { dg-final { scan-assembler-times {\tdecw\tz[0-9]+\.s, all, mul #15\n} 1 } } */
  75 /* { dg-final { scan-assembler-times {\tdecw\tz[0-9]+\.s\n} 1 } } */
  76 /* { dg-final { scan-assembler-times {\tincw\tz[0-9]+\.s\n} 1 } } */
  77 /* { dg-final { scan-assembler-times {\tincw\tz[0-9]+\.s, all, mul #15\n} 1 } } */
  78 /* { dg-final { scan-assembler-times {\tincw\tz[0-9]+\.s, all, mul #16\n} 1 } } */
  79 /* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 10 } } */
  80
  81 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, x[0-9]+, #-16\n} 1 } } */
  82 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, x[0-9]+, #-15\n} 1 } } */
  83 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, x[0-9]+, #1\n} 1 } } */
  84 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, x[0-9]+, #15\n} 1 } } */
  85 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, x[0-9]+, x[0-9]+\n} 3 } } */
  86 /* { dg-final { scan-assembler-times {\tld1d\tz[0-9]+\.d, p[0-7]+/z, \[x[0-9]+, x[0-9]+, lsl 3\]} 8 } } */
  87 /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d, p[0-7]+, \[x[0-9]+, x[0-9]+, lsl 3\]} 8 } } */
  88 /* { dg-final { scan-assembler-times {\tincd\tx[0-9]+\n} 8 } } */
  89
  90 /* { dg-final { scan-assembler-times {\tdecd\tz[0-9]+\.d, all, mul #16\n} 1 } } */
  91 /* { dg-final { scan-assembler-times {\tdecd\tz[0-9]+\.d, all, mul #15\n} 1 } } */
  92 /* { dg-final { scan-assembler-times {\tdecd\tz[0-9]+\.d\n} 1 } } */
  93 /* { dg-final { scan-assembler-times {\tincd\tz[0-9]+\.d\n} 1 } } */
  94 /* { dg-final { scan-assembler-times {\tincd\tz[0-9]+\.d, all, mul #15\n} 1 } } */
  95 /* { dg-final { scan-assembler-times {\tincd\tz[0-9]+\.d, all, mul #16\n} 1 } } */
  96 /* { dg-final { scan-assembler-times {\tadd\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 10 } } */