gcc/testsuite/gcc.target/aarch64/sve/load_scalar_offset_1.c

   1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
   2 /* { dg-options "-O3 -msve-vector-bits=256 --save-temps" } */
   3
   4 #include <stdint.h>
   5
   6 typedef int64_t vnx2di __attribute__ ((vector_size (32)));
   7 typedef int32_t vnx4si __attribute__ ((vector_size (32)));
   8 typedef int16_t vnx8hi __attribute__ ((vector_size (32)));
   9 typedef int8_t vnx16qi __attribute__ ((vector_size (32)));
  10
  11 void sve_load_64_u_lsl (uint64_t *a)
  12 {
  13   register unsigned long i asm("x1");
  14   asm volatile ("" : "=r" (i));
  15   asm volatile ("" :: "w" (*(vnx2di *)&a[i]));
  16 }
  17
  18 void sve_load_64_s_lsl (int64_t *a)
  19 {
  20   register long i asm("x1");
  21   asm volatile ("" : "=r" (i));
  22   asm volatile ("" :: "w" (*(vnx2di *)&a[i]));
  23 }
  24
  25 void sve_load_32_u_lsl (uint32_t *a)
  26 {
  27   register unsigned long i asm("x1");
  28   asm volatile ("" : "=r" (i));
  29   asm volatile ("" :: "w" (*(vnx4si *)&a[i]));
  30 }
  31
  32 void sve_load_32_s_lsl (int32_t *a)
  33 {
  34   register long i asm("x1");
  35   asm volatile ("" : "=r" (i));
  36   asm volatile ("" :: "w" (*(vnx4si *)&a[i]));
  37 }
  38
  39 void sve_load_16_z_lsl (uint16_t *a)
  40 {
  41   register unsigned long i asm("x1");
  42   asm volatile ("" : "=r" (i));
  43   asm volatile ("" :: "w" (*(vnx8hi *)&a[i]));
  44 }
  45
  46 void sve_load_16_s_lsl (int16_t *a)
  47 {
  48   register long i asm("x1");
  49   asm volatile ("" : "=r" (i));
  50   asm volatile ("" :: "w" (*(vnx8hi *)&a[i]));
  51 }
  52
  53 void sve_load_8_z (uint8_t *a)
  54 {
  55   register unsigned long i asm("x1");
  56   asm volatile ("" : "=r" (i));
  57   asm volatile ("" :: "w" (*(vnx16qi *)&a[i]));
  58 }
  59
  60 void sve_load_8_s (int8_t *a)
  61 {
  62   register long i asm("x1");
  63   asm volatile ("" : "=r" (i));
  64   asm volatile ("" :: "w" (*(vnx16qi *)&a[i]));
  65 }
  66
  67 /* { dg-final { scan-assembler-times {\tld1d\tz0\.d, p[0-7]/z, \[x0, x1, lsl 3\]\n} 2 } } */
  68 /* { dg-final { scan-assembler-times {\tld1w\tz0\.s, p[0-7]/z, \[x0, x1, lsl 2\]\n} 2 } } */
  69 /* { dg-final { scan-assembler-times {\tld1h\tz0\.h, p[0-7]/z, \[x0, x1, lsl 1\]\n} 2 } } */
  70 /* { dg-final { scan-assembler-times {\tld1b\tz0\.b, p[0-7]/z, \[x0, x1\]\n} 2 } } */