Add support for conditional reductions using SVE CLASTB
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / index_1.c
blob5ab254dab0c1c0e21e5224125b793423f476c6a6
1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=256 --save-temps" } */
4 #include <stdint.h>
6 #define NUM_ELEMS(TYPE) (32 / sizeof (TYPE))
8 #define DEF_LOOP(TYPE, BASE, STEP, SUFFIX) \
9 void __attribute__ ((noinline, noclone)) \
10 loop_##TYPE##_##SUFFIX (TYPE *a) \
11 { \
12 for (int i = 0; i < NUM_ELEMS (TYPE); ++i) \
13 a[i] = (BASE) + i * (STEP); \
16 #define TEST_ALL_UNSIGNED_TYPES(T, BASE, STEP, SUFFIX) \
17 T (uint8_t, BASE, STEP, SUFFIX) \
18 T (uint16_t, BASE, STEP, SUFFIX) \
19 T (uint32_t, BASE, STEP, SUFFIX) \
20 T (uint64_t, BASE, STEP, SUFFIX)
22 #define TEST_ALL_SIGNED_TYPES(T, BASE, STEP, SUFFIX) \
23 T (int8_t, BASE, STEP, SUFFIX) \
24 T (int16_t, BASE, STEP, SUFFIX) \
25 T (int32_t, BASE, STEP, SUFFIX) \
26 T (int64_t, BASE, STEP, SUFFIX)
28 /* Immediate loops. */
29 #define TEST_IMMEDIATE(T) \
30 TEST_ALL_UNSIGNED_TYPES (T, 0, 1, b0s1) \
31 TEST_ALL_SIGNED_TYPES (T, 0, 1, b0s1) \
32 TEST_ALL_UNSIGNED_TYPES (T, 0, 15, b0s15) \
33 TEST_ALL_SIGNED_TYPES (T, 0, 15, b0s15) \
34 TEST_ALL_SIGNED_TYPES (T, 0, -1, b0sm1) \
35 TEST_ALL_SIGNED_TYPES (T, 0, -16, b0sm16) \
36 TEST_ALL_SIGNED_TYPES (T, -16, 1, bm16s1) \
37 TEST_ALL_UNSIGNED_TYPES (T, 15, 1, b15s1) \
38 TEST_ALL_SIGNED_TYPES (T, 15, 1, b15s1)
40 /* Non-immediate loops. */
41 #define TEST_NONIMMEDIATE(T) \
42 TEST_ALL_UNSIGNED_TYPES (T, 0, 16, b0s16) \
43 TEST_ALL_SIGNED_TYPES (T, 0, 16, b0s16) \
44 TEST_ALL_SIGNED_TYPES (T, 0, -17, b0sm17) \
45 TEST_ALL_SIGNED_TYPES (T, -17, 1, bm17s1) \
46 TEST_ALL_UNSIGNED_TYPES (T, 16, 1, b16s1) \
47 TEST_ALL_SIGNED_TYPES (T, 16, 1, b16s1) \
48 TEST_ALL_UNSIGNED_TYPES (T, 16, 16, b16s16) \
49 TEST_ALL_SIGNED_TYPES (T, 16, 16, b16s16) \
50 TEST_ALL_SIGNED_TYPES (T, -17, -17, bm17sm17)
52 #define TEST_ALL(T) TEST_IMMEDIATE (T) TEST_NONIMMEDIATE (T)
54 TEST_ALL (DEF_LOOP)
56 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, #0, #1\n} 2 } } */
57 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, #0, #15\n} 2 } } */
58 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, #0, #-1\n} 1 } } */
59 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, #0, #-16\n} 1 } } */
60 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, #-16, #1\n} 1 } } */
61 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, #15, #1\n} 2 } } */
62 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, #0, w[0-9]+\n} 3 } } */
63 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, #1\n} 3 } } */
64 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.b, w[0-9]+, w[0-9]+\n} 3 } } */
66 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, #0, #1\n} 2 } } */
67 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, #0, #15\n} 2 } } */
68 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, #0, #-1\n} 1 } } */
69 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, #0, #-16\n} 1 } } */
70 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, #-16, #1\n} 1 } } */
71 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, #15, #1\n} 2 } } */
72 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, #0, w[0-9]+\n} 3 } } */
73 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, #1\n} 3 } } */
74 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.h, w[0-9]+, w[0-9]+\n} 3 } } */
76 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, #0, #1\n} 2 } } */
77 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, #0, #15\n} 2 } } */
78 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, #0, #-1\n} 1 } } */
79 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, #0, #-16\n} 1 } } */
80 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, #-16, #1\n} 1 } } */
81 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, #15, #1\n} 2 } } */
82 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, #0, w[0-9]+\n} 3 } } */
83 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, w[0-9]+, #1\n} 3 } } */
84 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.s, w[0-9]+, w[0-9]+\n} 3 } } */
86 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, #0, #1\n} 2 } } */
87 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, #0, #15\n} 2 } } */
88 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, #0, #-1\n} 1 } } */
89 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, #0, #-16\n} 1 } } */
90 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, #-16, #1\n} 1 } } */
91 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, #15, #1\n} 2 } } */
92 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, #0, x[0-9]+\n} 3 } } */
93 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, x[0-9]+, #1\n} 3 } } */
94 /* { dg-final { scan-assembler-times {\tindex\tz[0-9]+\.d, x[0-9]+, x[0-9]+\n} 3 } } */