Add support for conditional reductions using SVE CLASTB
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / fp_arith_1.c
blob5aed0dcb49084b5ea591c11bc20851ca7efb8b00
1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O3 --save-temps" } */
4 #define DO_REGREG_OPS(TYPE, OP, NAME) \
5 void varith_##TYPE##_##NAME (TYPE *dst, TYPE *src, int count) \
6 { \
7 for (int i = 0; i < count; ++i) \
8 dst[i] = dst[i] OP src[i]; \
11 #define DO_IMMEDIATE_OPS(VALUE, TYPE, OP, NAME) \
12 void varithimm_##NAME##_##TYPE (TYPE *dst, int count) \
13 { \
14 for (int i = 0; i < count; ++i) \
15 dst[i] = dst[i] OP (TYPE) VALUE; \
18 #define DO_ARITH_OPS(TYPE, OP, NAME) \
19 DO_REGREG_OPS (TYPE, OP, NAME); \
20 DO_IMMEDIATE_OPS (1, TYPE, OP, NAME ## 1); \
21 DO_IMMEDIATE_OPS (0.5, TYPE, OP, NAME ## pointfive); \
22 DO_IMMEDIATE_OPS (2, TYPE, OP, NAME ## 2); \
23 DO_IMMEDIATE_OPS (2.5, TYPE, OP, NAME ## twopoint5); \
24 DO_IMMEDIATE_OPS (-0.5, TYPE, OP, NAME ## minuspointfive); \
25 DO_IMMEDIATE_OPS (-1, TYPE, OP, NAME ## minus1);
27 DO_ARITH_OPS (_Float16, +, add)
28 DO_ARITH_OPS (float, +, add)
29 DO_ARITH_OPS (double, +, add)
31 DO_ARITH_OPS (_Float16, -, minus)
32 DO_ARITH_OPS (float, -, minus)
33 DO_ARITH_OPS (double, -, minus)
35 /* No specific count because it's valid to use fadd or fsub for the
36 out-of-range constants. */
37 /* { dg-final { scan-assembler {\tfadd\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} } } */
38 /* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */
39 /* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */
40 /* { dg-final { scan-assembler-not {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #2} } } */
41 /* { dg-final { scan-assembler-not {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #-} } } */
43 /* { dg-final { scan-assembler {\tfsub\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} } } */
44 /* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */
45 /* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */
46 /* { dg-final { scan-assembler-not {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #2} } } */
47 /* { dg-final { scan-assembler-not {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #-} } } */
49 /* { dg-final { scan-assembler {\tfadd\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} } } */
50 /* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */
51 /* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */
52 /* { dg-final { scan-assembler-not {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #2} } } */
53 /* { dg-final { scan-assembler-not {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #-} } } */
55 /* { dg-final { scan-assembler {\tfsub\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} } } */
56 /* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */
57 /* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */
58 /* { dg-final { scan-assembler-not {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #2} } } */
59 /* { dg-final { scan-assembler-not {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #-} } } */
61 /* { dg-final { scan-assembler {\tfadd\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} } } */
62 /* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #1.0\n} 2 } } */
63 /* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #0.5\n} 2 } } */
64 /* { dg-final { scan-assembler-not {\tfadd\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #2} } } */
65 /* { dg-final { scan-assembler-not {\tfadd\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #-} } } */
67 /* { dg-final { scan-assembler {\tfsub\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} } } */
68 /* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #1.0\n} 2 } } */
69 /* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #0.5\n} 2 } } */
70 /* { dg-final { scan-assembler-not {\tfsub\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #2} } } */
71 /* { dg-final { scan-assembler-not {\tfsub\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #-} } } */