gcc/testsuite/gcc.target/aarch64/sve/fmul_1.c

   1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
   2 /* { dg-options "-O3 --save-temps" } */
   3
   4 #define DO_REGREG_OPS(TYPE, OP, NAME)                           \
   5 void varith_##TYPE##_##NAME (TYPE *dst, TYPE *src, int count)   \
   6 {                                                               \
   7   for (int i = 0; i < count; ++i)                               \
   8     dst[i] = dst[i] OP src[i];                                  \
   9 }
  10
  11 #define DO_IMMEDIATE_OPS(VALUE, TYPE, OP, NAME)         \
  12 void varithimm_##NAME##_##TYPE (TYPE *dst, int count)   \
  13 {                                                       \
  14   for (int i = 0; i < count; ++i)                       \
  15     dst[i] = dst[i] OP (TYPE) VALUE;                    \
  16 }
  17
  18 #define DO_ARITH_OPS(TYPE, OP, NAME)                            \
  19   DO_REGREG_OPS (TYPE, OP, NAME);                               \
  20   DO_IMMEDIATE_OPS (0.5, TYPE, OP, NAME ## 0point5);            \
  21   DO_IMMEDIATE_OPS (2, TYPE, OP, NAME ## 2);                    \
  22   DO_IMMEDIATE_OPS (5, TYPE, OP, NAME ## 5);                    \
  23   DO_IMMEDIATE_OPS (-0.5, TYPE, OP, NAME ## minus0point5);      \
  24   DO_IMMEDIATE_OPS (-2, TYPE, OP, NAME ## minus2);
  25
  26 DO_ARITH_OPS (_Float16, *, mul)
  27 DO_ARITH_OPS (float, *, mul)
  28 DO_ARITH_OPS (double, *, mul)
  29
  30 /* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */
  31 /* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 1 } } */
  32 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #2} } } */
  33 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #5} } } */
  34 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #-} } } */
  35
  36 /* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 4 } } */
  37 /* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */
  38 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #2} } } */
  39 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #5} } } */
  40 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #-} } } */
  41
  42 /* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.d, z[0-9]+\.d, z[0-9]+\.d\n} 4 } } */
  43 /* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #0.5\n} 1 } } */
  44 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #2} } } */
  45 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #5} } } */
  46 /* { dg-final { scan-assembler-not   {\tfmul\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, #-} } } */