Add support for conditional reductions using SVE CLASTB
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / ext_2.c
blob0fe7e4c2843292275bf23446a7489777368ae434
1 /* { dg-do compile } */
2 /* { dg-options "-O -msve-vector-bits=256" } */
4 typedef int vnx4si __attribute__((vector_size (32)));
6 void
7 foo (void)
9 register vnx4si x asm ("z0");
10 register vnx4si y asm ("z1");
12 asm volatile ("" : "=w" (y));
13 x = __builtin_shuffle (y, y, (vnx4si) { 1, 2, 3, 4, 5, 6, 7, 8 });
14 asm volatile ("" :: "w" (x));
17 /* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */
18 /* { dg-final { scan-assembler {\text\tz0\.b, z0\.b, z[01]\.b, #4\n} } } */