Add support for conditional reductions using SVE CLASTB
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / cvtf_unsigned_1.c
blob40e44cd3f0c0334b21604dd333cd302c46d75f48
1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O3 --save-temps" } */
4 #include <stdint.h>
6 void __attribute__ ((noinline, noclone))
7 vcvtf_16 (_Float16 *dst, uint16_t *src1, int size)
9 for (int i = 0; i < size; i++)
10 dst[i] = (_Float16) src1[i];
13 void __attribute__ ((noinline, noclone))
14 vcvtf_32 (float *dst, uint32_t *src1, int size)
16 for (int i = 0; i < size; i++)
17 dst[i] = (float) src1[i];
20 void __attribute__ ((noinline, noclone))
21 vcvtf_64 (double *dst, uint64_t *src1, int size)
23 for (int i = 0; i < size; i++)
24 dst[i] = (double) src1[i];
27 /* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 1 } } */
28 /* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */
29 /* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d\n} 1 } } */