| blob | 9a0dfe674d1b651c354ea357b0c4815497038984 |
1 2015-06-30 Christophe Lyon <christophe.lyon@linaro.org>
3 * LINARO-VERSION: Bump version.
5 2015-06-30 Christophe Lyon <christophe.lyon@linaro.org>
7 GCC Linaro 4.9-2015.06 released.
8 * LINARO-VERSION: Update.
10 2015-06-02 Christophe Lyon <christophe.lyon@linaro.org>
12 Backport from trunk r217753.
13 2014-11-19 Jakub Jelinek <jakub@redhat.com>
15 PR rtl-optimization/63843
16 * simplify-rtx.c (simplify_binary_operation_1) <case ASHIFTRT>: For
17 optimization of ashiftrt of subreg of lshiftrt, check that code
18 is ASHIFTRT.
20 2015-04-16 Christophe Lyon <christophe.lyon@linaro.org>
22 * LINARO-VERSION: Bump version.
24 2015-04-16 Christophe Lyon <christophe.lyon@linaro.org>
26 GCC Linaro 4.9-2015.04 snapshot.
27 * LINARO-VERSION: Update.
29 2015-04-15 Christophe Lyon <christophe.lyon@linaro.org>
31 Backport from trunk r220348.
32 2015-02-02 Tejas Belagod <tejas.belagod@arm.com>
33 Andrew Pinski <pinskia@gcc.gnu.org>
34 Jakub Jelinek <jakub@gcc.gnu.org>
36 PR target/64231
37 * config/aarch64/aarch64.c (aarch64_classify_symbol): Fix large
38 integer typing for small model. Use IN_RANGE.
40 2015-04-14 Michael Collison <michael.collison@linaro.org>
42 Backport from trunk r220399, r220413.
44 2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
46 * config/aarch64/aarch64-cores.def: Add cortex-a72 and
47 cortex-a72.cortex-a53.
48 * config/aarch64/aarch64-tune.md: Regenerate.
49 * doc/invoke.texi (AArch64 Options/-mtune): Add "cortex-a72".
51 2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
53 * config/arm/arm-cores.def: Add cortex-a72 and
54 cortex-a72.cortex-a53.
55 * config/arm/bpabi.h (BE8_LINK_SPEC): Likewise.
56 * config/arm/t-aprofile (MULTILIB_MATCHES): Likewise.
57 * config/arm/arm-tune.md: Regenerate.
58 * config/arm/arm-tables.opt: Add entries for "cortex-a72" and
59 "cortex-a72.cortex-a53".
60 * doc/invoke.texi (ARM Options/-mtune): Likewise.
62 2015-04-13 Michael Collison <michael.collison@linaro.org>
64 Backport from trunk r219724, 219746, r220103.
66 2014-01-25 James Greenhalgh <james.greenhalgh@arm.com>
68 * config/arm/arm-cores.def (cortex-a57): Use the new Cortex-A57
69 pipeline model.
70 config/arm/arm.md: Include the new Cortex-A57 model.
71 (generic_sched): Don't use generic_sched when tuning for
72 Cortex-A57.
74 2015-01-16 James Greenhalgh <james.greenhalgh@arm.com>
76 * config/arm/cortex-a57.md: Remove duplicate of file accidentally
77 introduced in revision 219724.
79 2015-01-16 James Greenhalgh <james.greenhalgh@arm.com>
81 * config/arm/cortex-a57.md: New.
82 * config/aarch64/aarch64.md: Include it.
83 * config/aarch64/aarch64-cores.def (cortex-a57): Tune for it.
84 * config/aarch64/aarch64-tune.md: Regenerate.
86 2015-04-10 Michael Collison <michael.collison@linaro.org>
88 Backport from trunk r218145, r218146, r219472.
90 2015-01-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
92 * config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
93 Cortex-A17 tuning parameters.
94 * config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.
96 2014-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
98 * config/arm/arm.md (generic_sched): Specify cortexa17 in 'no' list.
99 Include cortex-a17.md.
100 * config/arm/arm.c (arm_issue_rate): Specify 2 for cortexa17.
101 * config/arm/arm-cores.def (cortex-a17): New entry.
102 * config/arm/arm-tables.opt: Regenerate.
103 * config/arm/arm-tune.md: Regenerate.
104 * config/arm/bpabi.h (BE8_LINK_SPEC): Specify mcpu=cortex-a17.
105 * config/arm/cortex-a17.md: New file.
106 * config/arm/cortex-a17-neon.md: New file.
107 * config/arm/driver-arm.c (arm_cpu_table): Add entry for cortex-a17.
108 * config/arm/t-aprofile: Add cortex-a17 entries to MULTILIB_MATCHES.
110 2014-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
112 * config/arm/arm-cores.def (cortex-a17.cortex-a7): New entry.
113 * config/arm/arm-tables.opt: Regenerate.
114 * config/arm/arm-tune.md: Regenerate.
115 * config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a17.cortex-a7.
116 * config/arm/t-aprofile: Add cortex-a17.cortex-a7 entry to
117 MULTILIB_MATCHES.
119 2015-04-09 Yvan Roux <yvan.roux@linaro.org>
121 Fix partial backport done at r221911.
122 * gcc/config/aarch64/aarch64.c: Fix cost tables for APM XGene-1
124 2015-04-09 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
126 Backport from trunk r219745.
127 2015-01-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
128 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
130 PR target/64263
131 * config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the
132 destination is not a GP reg.
133 (*movdi_aarch64): Likewise.
135 2015-04-09 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
137 Backport from trunk r219578.
138 2015-01-14 Joey Ye <joey.ye@arm.com>
140 * config/arm/arm.c (arm_compute_save_reg_mask):
141 Do not save lr in case of tail call.
142 * config/arm/thumb2.md (*thumb2_pop_single): New pattern.
144 2015-04-09 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
146 Backport from trunk r219544.
147 2015-01-13 Renlin Li <renlin.li@arm.com>
149 * config/arm/arm.h (CLZ_DEFINED_VALUE_AT_ZERO): Return 2.
150 (CTZ_DEFINED_VALUE_AT_ZERO): Ditto.
152 2015-04-08 Charles Baylis <charles.baylis@linaro.org>
154 Backport from trunk r215567, r216672.
155 2014-10-24 Charles Baylis <charles.baylis@linaro.org>
157 * config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Rewrite using builtins,
158 update uses to use new macro arguments.
159 (__LD3_LANE_FUNC): Likewise.
160 (__LD4_LANE_FUNC): Likewise.
162 2014-10-24 Charles Baylis <charles.baylis@linaro.org>
164 * config/aarch64/aarch64-builtins.c
165 (aarch64_types_loadstruct_lane_qualifiers): Define.
166 * config/aarch64/aarch64-simd-builtins.def (ld2_lane, ld3_lane,
167 ld4_lane): New builtins.
168 * config/aarch64/aarch64-simd.md (aarch64_vec_load_lanesoi_lane<mode>):
169 New pattern.
170 (aarch64_vec_load_lanesci_lane<mode>): Likewise.
171 (aarch64_vec_load_lanesxi_lane<mode>): Likewise.
172 (aarch64_ld2_lane<mode>): New expand.
173 (aarch64_ld3_lane<mode>): Likewise.
174 (aarch64_ld4_lane<mode>): Likewise.
175 * config/aarch64/aarch64.md (define_c_enum "unspec"): Add
176 UNSPEC_LD2_LANE, UNSPEC_LD3_LANE, UNSPEC_LD4_LANE.
178 2015-04-07 Michael Collison <michael.collison@linaro.org>
180 Backport from trunk r219656, r219657, r219659, r219661, r219679.
181 2015-01-15 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
183 * config/aarch64/aarch64-cores.def (xgene1): Update/add the
184 xgene1 (APM XGene-1) core definition.
185 * gcc/config/aarch64/aarch64.c: Add cost tables for APM XGene-1
186 * config/arm/aarch-cost-tables.h: Add cost tables for APM XGene-1
187 * doc/invoke.texi: Document -mcpu=xgene1.
189 2015-01-15 Philipp Tomsich <ptomsich@theobroma-systems.com>
191 * config/aarch64/aarch64.md: Include xgene1.md.
192 * config/aarch64/xgene1.md: New file.
194 2015-01-15 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
196 * config/arm/arm.md (generic_sched): Specify xgene1 in 'no' list.
197 Include xgene1.md.
198 * config/arm/arm.c (arm_issue_rate): Specify 4 for xgene1.
199 * config/arm/arm-cores.def (xgene1): New entry.
200 * config/arm/arm-tables.opt: Regenerate.
201 * config/arm/arm-tune.md: Regenerate.
202 * config/arm/bpabi.h (BE8_LINK_SPEC): Specify mcpu=xgene1.
204 2015-01-15 Richard Earnshaw <rearnsha@arm.com>
206 * arm.c (arm_xgene_tune): Add default initializer for instruction
207 fusion.
209 2015-04-07 Yvan Roux <yvan.roux@linaro.org>
211 Backport from trunk r217062, r217646, r218658.
212 2014-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com>
214 PR rtl-optimization/63917
215 * ifcvt.c (cc_in_cond): New function.
216 (end_ifcvt_sequence): Make sure new generated insns do not clobber CC.
217 (noce_process_if_block, check_cond_move_block): Check CC references.
219 2014-11-17 Zhenqiang Chen <zhenqiang.chen@arm.com>
221 * ifcvt.c (HAVE_cbranchcc4): Define.
222 (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
223 Use HAVE_cbranchcc4.
225 2014-11-04 Zhenqiang Chen <zhenqiang.chen@arm.com>
227 Revert:
228 2014-11-03 Zhenqiang Chen <zhenqiang.chen@arm.com>
229 * ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
230 Allow CC mode if HAVE_cbranchcc4.
232 2015-04-02 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
234 Fix testcase backported from trunk
236 * gcc/testsuite/gcc.dg/pr64935-1.c: Ignore warnings that can't be
237 disabled with not-yet-existing -Wno-shift-count-overflow.
239 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
241 Backport from trunk r218958, r218960, r218961.
242 2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
244 * config/aarch64/aarch64.c (<LOGICAL:optab>_one_cmpl<mode>3):
245 Reparameterize to...
246 (<NLOGICAL:optab>_one_cmpl<mode>3): with extra SIMD-register variant.
247 (xor_one_cmpl<mode>3): New define_insn_and_split.
249 * config/aarch64/iterators.md (NLOGICAL): New define_code_iterator.
251 2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
253 * config/aarch64/aarch64.md (<optab><mode>3, one_cmpl<mode>2):
254 Add SIMD-register variant.
255 * config/aarch64/iterators.md (Vbtype): Add value for SI.
257 2014-12-19 Alan Lawrence <alan.lawrence@arm.com>
259 * config/aarch64/aarch64.md (subdi3, adddi3_aarch64): Don't penalize
260 SIMD reg variant.
262 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
264 Backport from trunk r218897.
265 2014-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
267 * doc/invoke.texi (ARM options): Remove mention of Advanced RISC
268 Machines.
270 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
272 Backport from trunk r218895.
273 2014-12-19 Xingxing Pan <xxingpan@marvell.com>
275 * config/arm/cortex-a9-neon.md (cortex_a9_neon_vmov): Change
276 reservation to cortex_a9_neon_dp.
278 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
280 Backport from trunk r218530.
281 2014-12-09 Alan Lawrence <alan.lawrence@arm.com>
283 * config/aarch64/aarch64.md (absdi2): Remove scratch operand by
284 earlyclobbering result operand.
286 * config/aarch64/aarch64-builtins.c (aarch64_types_unop_qualifiers):
287 Remove final qualifier_internal.
288 (aarch64_fold_builtin): Stop folding abs builtins, except on floats.
290 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
292 Backport from trunk r218526.
293 2014-12-09 Wilco Dijkstra <wilco.dijkstra@arm.com>
295 * gcc/config/aarch64/aarch64-protos.h (tune-params): Add reasociation
296 tuning parameters.
297 * gcc/config/aarch64/aarch64.c (TARGET_SCHED_REASSOCIATION_WIDTH):
298 Define.
299 (aarch64_reassociation_width): New function.
300 (generic_tunings): Add reassociation tuning parameters.
301 (cortexa53_tunings): Likewise.
302 (cortexa57_tunings): Likewise.
303 (thunderx_tunings): Likewise.
305 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
307 Backport from trunk r218866.
308 2014-12-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
310 * gcc/config/aarch64/aarch64.c (TARGET_MIN_DIVISIONS_FOR_RECIP_MUL):
311 Define.
312 (aarch64_min_divisions_for_recip_mul): New function.
314 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
316 Backport from trunk r218867, r218868.
317 2014-12-18 Alan Lawrence <alan.lawrence@arm.com>
319 * config/aarch64/aarch64-simd.md (aarch64_lshr_simddi): Handle shift
320 by 64 by moving const0_rtx.
321 (aarch64_ushr_simddi): Delete.
323 * config/aarch64/aarch64.md (enum unspec): Delete UNSPEC_USHR64.
325 2014-12-18 Alan Lawrence <alan.lawrence@arm.com>
327 * config/aarch64/aarch64.md (enum "unspec"): Remove UNSPEC_SSHR64.
329 * config/aarch64/aarch64-simd.md (aarch64_ashr_simddi): Change shift
330 amount to 63 if was 64.
331 (aarch64_sshr_simddi): Remove.
333 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
335 Backport from trunk r218855.
336 2014-12-18 Bin Cheng <bin.cheng@arm.com>
338 PR tree-optimization/62178
339 * tree-ssa-loop-ivopts.c (cheaper_cost_with_cand): New function.
340 (iv_ca_replace): New function.
341 (try_improve_iv_set): New parameter try_replace_p.
342 Break local optimal fixed-point by calling iv_ca_replace.
343 (find_optimal_iv_set_1): Pass new argument to try_improve_iv_set.
345 2015-04-02 Yvan Roux <yvan.roux@linaro.org>
347 Backport from trunk r218829.
348 2014-12-17 James Greenhalgh <james.greenhalgh@arm.com>
350 * config/aarch64/aarch64.md (generic_sched): Delete it.
352 2015-03-27 Michael Collison <michael.collison@linaro.org>
354 Backport from trunk r218432, r218635, r219470.
356 2015-01-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
358 * config/arm/arm-protos.h (tune_params): Add fuseable_ops field.
359 * config/arm/arm.c (arm_macro_fusion_p): New function.
360 (arm_macro_fusion_pair_p): Likewise.
361 (TARGET_SCHED_MACRO_FUSION_P): Define.
362 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
363 (ARM_FUSE_NOTHING): Likewise.
364 (ARM_FUSE_MOVW_MOVT): Likewise.
365 (arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune,
366 arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune,
367 arm_cortex_a8_tune, arm_cortex_a7_tune, arm_cortex_a15_tune,
368 arm_cortex_a53_tune, arm_cortex_a57_tune, arm_cortex_a9_tune,
369 arm_cortex_a12_tune, arm_v7m_tune, arm_v6m_tune, arm_fa726te_tune
370 arm_cortex_a5_tune): Specify fuseable_ops value.
372 2014-12-11 Renlin Li <renlin.li@arm.com>
374 * config/aarch64/aarch64-cores.def: Change all AARCH64_FL_FPSIMD to
375 AARCH64_FL_FOR_ARCH8.
376 * config/aarch64/aarch64.c (all_cores): Use FLAGS from
377 aarch64-cores.def file only.
379 2014-12-05 Renlin Li <renlin.li@arm.com>
381 * config/aarch64/aarch64-opts.h (AARCH64_CORE): Rename IDENT to SCHED.
382 * config/aarch64/aarch64.h (AARCH64_CORE): Likewise.
383 * config/aarch64/aarch64.c (AARCH64_CORE): Rename X to IDENT,
384 IDENT to SCHED.
386 2015-03-24 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
388 Backport from trunk r210736, r210737, r210744, r210746, r210747,
389 r210845, r213708, r213709, r216620, r216621, r216622, r216623,
390 r216624, r219787, r219789, r219893, r220316, r220808.
392 2015-02-19 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
394 * haifa-sched.c (enum rfs_decision, rfs_str): Remove RFS_DEBUG.
395 (rank_for_schedule_debug): Update.
396 (ready_sort): Make static. Move sorting logic to ...
397 (ready_sort_debug, ready_sort_real): New static functions.
398 (schedule_block): Sort both debug insns and real insns in preparation
399 for ready list trimming. Improve debug output.
400 * sched-int.h (ready_sort): Remove global declaration.
402 2015-02-01 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
404 * haifa-sched.c (INSN_RFS_DEBUG_ORIG_ORDER): New access macro.
405 (rank_for_schedule_debug): Split from ...
406 (rank_for_schedule): ... this.
407 (ready_sort): Sort DEBUG_INSNs separately from normal INSNs.
408 * sched-int.h (struct _haifa_insn_data): New field rfs_debug_orig_order.
410 2015-01-20 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
412 * config/arm/arm-protos.h (enum arm_sched_autopref): New constants.
413 (struct tune_params): Use the enum.
414 * arm.c (arm_*_tune): Update.
415 (arm_option_override): Update.
417 2015-01-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
419 * config/arm/arm-protos.h (struct tune_params): New field
420 sched_autopref_queue_depth.
421 * config/arm/arm.c (sched-int.h): Include header.
422 (arm_first_cycle_multipass_dfa_lookahead_guard,)
423 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD): Define hook.
424 (arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune,)
425 (arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune,)
426 (arm_cortex_a8_tune, arm_cortex_a7_tune, arm_cortex_a15_tune,)
427 (arm_cortex_a53_tune, arm_cortex_a57_tune, arm_xgene1_tune,)
428 (arm_cortex_a5_tune, arm_cortex_a9_tune, arm_cortex_a12_tune,)
429 (arm_v7m_tune, arm_cortex_m7_tune, arm_v6m_tune, arm_fa726te_tune):
430 Specify sched_autopref_queue_depth value. Enabled for A15 and A57.
431 * config/arm/t-arm (arm.o): Update.
432 * haifa-sched.c (update_insn_after_change): Update.
433 (rank_for_schedule): Use auto-prefetcher model, if requested.
434 (autopref_multipass_init): New static function.
435 (autopref_rank_for_schedule): New rank_for_schedule heuristic.
436 (autopref_multipass_dfa_lookahead_guard_started_dump_p): New static
437 variable for debug dumps.
438 (autopref_multipass_dfa_lookahead_guard_1): New static helper function.
439 (autopref_multipass_dfa_lookahead_guard): New global function that
440 implements TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD hook.
441 (init_h_i_d): Update.
442 * params.def (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH): New tuning knob.
443 * sched-int.h (enum autopref_multipass_data_status): New const enum.
444 (autopref_multipass_data_): Structure for auto-prefetcher data.
445 (autopref_multipass_data_def, autopref_multipass_data_t): New typedefs.
446 (struct _haifa_insn_data:autopref_multipass_data): New field.
447 (INSN_AUTOPREF_MULTIPASS_DATA): New access macro.
448 (autopref_multipass_dfa_lookahead_guard): Declare.
450 2015-01-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
452 * config/aarch64/aarch64.c
453 (aarch64_sched_first_cycle_multipass_dfa_lookahead): Implement hook.
454 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Define.
455 * config/arm/arm.c
456 (arm_first_cycle_multipass_dfa_lookahead): Implement hook.
457 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Define.
459 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
461 * rtlanal.c (get_base_term): Handle SCRATCH.
463 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
465 * haifa-sched.c (sched_init): Disable max_issue when scheduling for
466 register pressure.
468 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
470 * haifa-sched.c (cached_first_cycle_multipass_dfa_lookahead,)
471 (cached_issue_rate): Remove. Use dfa_lookahead and issue_rate instead.
472 (max_issue, choose_ready, sched_init): Update.
474 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
476 * sched-int.h (struct _haifa_insn_data:last_rfs_win): New field.
477 * haifa-sched.c (INSN_LAST_RFS_WIN): New access macro.
478 (rfs_result): Set INSN_LAST_RFS_WIN. Update signature.
479 (rank_for_schedule): Update calls to rfs_result to pass new parameters.
480 (print_rank_for_schedule_stats): Print out elements of ready list that
481 ended up on their respective places due to each of the sorting
482 heuristics.
483 (ready_sort): Update.
484 (debug_ready_list_1): Improve printout for SCHED_PRESSURE_MODEL.
485 (schedule_block): Update.
487 2014-10-24 Maxim Kuvyrkov <maxim.kuvyrkov@gmail.com>
489 * haifa-sched.c (sched_class_regs_num, call_used_regs_num): New static
490 arrays. Use sched_class_regs_num instead of ira_class_hard_regs_num.
491 (print_curr_reg_pressure, setup_insn_reg_pressure_info,)
492 (model_update_pressure, model_spill_cost): Use sched_class_regs_num.
493 (model_start_schedule): Update.
494 (sched_pressure_start_bb): New static function. Calculate
495 sched_class_regs_num.
496 (schedule_block): Use it.
497 (alloc_global_sched_pressure_data): Calculate call_used_regs_num.
499 2014-08-07 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
501 * haifa-sched.c (SCHED_SORT): Delete. Macro used exactly once.
502 (enum rfs_decition:RFS_*): New constants wrapped in an enum.
503 (rfs_str): String corresponding to RFS_* constants.
504 (rank_for_schedule_stats_t): New typedef.
505 (rank_for_schedule_stats): New static variable.
506 (rfs_result): New static function.
507 (rank_for_schedule): Track statistics for deciding heuristics.
508 (rank_for_schedule_stats_diff, print_rank_for_schedule_stats): New
509 static functions.
510 (ready_sort): Use them for debug printouts.
511 (schedule_block): Init statistics state. Print statistics on
512 rank_for_schedule decisions.
514 2014-08-07 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
516 * haifa-sched.c (rank_for_schedule): Fix INSN_TICK-based heuristics.
518 2014-05-23 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
520 Fix bootstrap error on ia64
521 * config/ia64/ia64.c (ia64_first_cycle_multipass_dfa_lookahead_guard):
522 Return default value.
524 2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
526 Cleanup and improve multipass_dfa_lookahead_guard
527 * config/i386/i386.c (core2i7_first_cycle_multipass_filter_ready_try,)
528 (core2i7_first_cycle_multipass_begin,)
529 (core2i7_first_cycle_multipass_issue,)
530 (core2i7_first_cycle_multipass_backtrack): Update signature.
531 * config/ia64/ia64.c
532 (ia64_first_cycle_multipass_dfa_lookahead_guard_spec): Remove.
533 (ia64_first_cycle_multipass_dfa_lookahead_guard): Update signature.
534 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC): Remove
535 hook definition.
536 (ia64_first_cycle_multipass_dfa_lookahead_guard): Merge logic from
537 ia64_first_cycle_multipass_dfa_lookahead_guard_spec. Update return
538 values.
539 * config/rs6000/rs6000.c (rs6000_use_sched_lookahead_guard): Update
540 return values.
541 * doc/tm.texi: Regenerate.
542 * doc/tm.texi.in
543 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC): Remove.
544 * haifa-sched.c (ready_try): Make signed to allow negative values.
545 (rebug_ready_list_1): Update.
546 (choose_ready): Simplify.
547 (sched_extend_ready_list): Update.
549 2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
551 Remove IA64 speculation tweaking flags
552 * config/ia64/ia64.c (ia64_set_sched_flags): Delete handling of
553 speculation tuning flags.
554 (msched-prefer-non-data-spec-insns,)
555 (msched-prefer-non-control-spec-insns): Obsolete options.
556 * haifa-sched.c (choose_ready): Remove handling of
557 PREFER_NON_CONTROL_SPEC and PREFER_NON_DATA_SPEC.
558 * sched-int.h (enum SPEC_SCHED_FLAGS): Remove PREFER_NON_CONTROL_SPEC
559 and PREFER_NON_DATA_SPEC.
560 * sel-sched.c (process_spec_exprs): Remove handling of
561 PREFER_NON_CONTROL_SPEC and PREFER_NON_DATA_SPEC.
563 2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
565 Improve scheduling debug output
566 * haifa-sched.c (debug_ready_list): Remove unnecessary prototype.
567 (advance_one_cycle): Update.
568 (schedule_insn, queue_to_ready): Add debug printouts.
569 (debug_ready_list_1): New static function.
570 (debug_ready_list): Update.
571 (max_issue): Add debug printouts.
572 (dump_insn_stream): New static function.
573 (schedule_block): Use it. Also better indent printouts.
575 2014-05-22 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
577 Fix sched_insn debug counter
578 * haifa-sched.c (schedule_insn): Update.
579 (struct haifa_saved_data): Add nonscheduled_insns_begin.
580 (save_backtrack_point, restore_backtrack_point): Update.
581 (first_nonscheduled_insn): New static function.
582 (queue_to_ready, choose_ready): Use it.
583 (schedule_block): Init nonscheduled_insns_begin.
584 (sched_emit_insn): Update.
586 2015-03-18 Michael Collison <michael.collison@linaro.org>
588 Backport from trunk r218007, r218010, r218012, r218013, r218014,
589 r218525.
591 2014-12-09 Andrew Pinski apinski@cavium.com
592 Kyrylo Tkachov kyrylo.tkachov@arm.com
594 * config/aarch64/aarch64.c (AARCH64_FUSE_CMP_BRANCH): New define.
595 (thunderx_tunings): Add AARCH64_FUSE_CMP_BRANCH to fuseable_ops.
596 (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_CMP_BRANCH.
598 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
600 * config/aarch64/aarch64.c (AARCH64_FUSE_ADRP_LDR): Define.
601 (cortexa53_tunings): Specify AARCH64_FUSE_ADRP_LDR in fuseable_ops.
602 (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_LDR.
604 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
606 * config/aarch64/aarch64.c (AARCH64_FUSE_MOVK_MOVK): Define.
607 (cortexa53_tunings): Specify AARCH64_FUSE_MOVK_MOVK in fuseable_ops.
608 (cortexa57_tunings): Likewise.
609 (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_MOVK_MOVK.
611 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
613 * sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p
614 in the not conditional jump case.
615 * doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
616 * target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description.
618 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
620 * config/aarch64/aarch64.c: Include tm-constrs.h
621 (AARCH64_FUSE_ADRP_ADD): Define.
622 (cortexa57_tunings): Add AARCH64_FUSE_ADRP_ADD to fuseable_ops.
623 (cortexa53_tunings): Likewise.
624 (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_ADD.
626 2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
628 * config/aarch64/aarch64-protos.h (struct tune_params): Add
629 fuseable_ops field.
630 * config/aarch64/aarch64.c (generic_tunings): Specify fuseable_ops.
631 (cortexa53_tunings): Likewise.
632 (cortexa57_tunings): Likewise.
633 (thunderx_tunings): Likewise.
634 (aarch64_macro_fusion_p): New function.
635 (aarch_macro_fusion_pair_p): Likewise.
636 (TARGET_SCHED_MACRO_FUSION_P): Define.
637 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
638 (AARCH64_FUSE_MOV_MOVK): Likewise.
639 (AARCH64_FUSE_NOTHING): Likewise.
641 2015-03-12 Yvan Roux <yvan.roux@linaro.org>
643 * LINARO-VERSION: Bump version.
645 2015-03-12 Yvan Roux <yvan.roux@linaro.org>
647 GCC Linaro 4.9-2015.03 released.
648 * LINARO-VERSION: Update.
650 2015-03-10 Michael Collison <michael.collison@linaro.org>
652 Backport from trunk r218503.
653 2014-12-08 Sandra Loosemore <sandra@codesourcery.com>
655 * simplify-rtx.c (simplify_relational_operation_1): Handle
656 simplification identities for BICS patterns.
658 2015-03-10 Michael Collison <michael.collison@linaro.org>
660 Backport from trunk r220751.
661 2015-02-17 James Greenhalgh <james.greenhalgh@arm.com>
663 * haifa-sched.c (recompute_todo_spec): Treat SCHED_GROUP_P
664 as forcing a HARD_DEP between instructions, thereby
665 disallowing rewriting to break dependencies.
667 2015-03-10 Michael Collison <michael.collison@linaro.org>
669 Backport from trunk r217725.
670 2014-11-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
672 * config/arm/cortex-a15-neon.md (cortex_a15_vfp_to_from_gp):
673 Split into...
674 (cortex_a15_gp_to_vfp): ...This.
675 (cortex_a15_fp_to_gp): ...And this.
676 Define and comment bypass from vfp operations to fp->gp moves.
678 2015-03-10 Michael Collison <michael.collison@linaro.org>
680 Backport from trunk r217780.
681 2014-11-19 Wilco Dijkstra <wdijkstr@arm.com>
683 PR target/61915
684 * config/aarch64/aarch64.c (generic_regmove_cost): Increase FP move
685 cost.
687 2015-03-10 Michael Collison <michael.collison@linaro.org>
689 Backport from trunk r217938.
690 2014-11-21 Jiong Wang <jiong.wang@arm.com>
692 * config/aarch64/iterators.md (VS): New mode iterator.
693 (vsi2qi): New mode attribute.
694 (VSI2QI): Likewise.
695 * config/aarch64/aarch64-simd-builtins.def: New entry for ctz.
696 * config/aarch64/aarch64-simd.md (ctz<mode>2): New pattern for ctz.
697 * config/aarch64/aarch64-builtins.c
698 (aarch64_builtin_vectorized_function): Support BUILT_IN_CTZ.
700 2015-03-10 Michael Collison <michael.collison@linaro.org>
702 Backport from trunk r217852.
703 2014-11-20 Tejas Belagod <tejas.belagod@arm.com>
705 * config/aarch64/aarch64-protos.h (aarch64_classify_symbol):
706 Fixup prototype.
707 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate,
708 aarch64_cannot_force_const_mem, aarch64_classify_address,
709 aarch64_classify_symbolic_expression): Fixup call to
710 aarch64_classify_symbol.
711 (aarch64_classify_symbol): Add range-checking for
712 symbol + offset addressing for tiny and small models.
714 2015-03-06 Christophe Lyon <christophe.lyon@linaro.org>
716 Backport from trunk r217707.
717 2014-11-18 Christophe Lyon <christophe.lyon@linaro.org>
719 * config/arm/neon-testgen.ml (emit_prologue): Handle new
720 compile_test_optim argument.
721 (emit_automatics): Rename to emit_variables. Support variable
722 indentation of its output.
723 (compile_test_optim): New function.
724 (test_intrinsic): Call compile_test_optim.
725 * config/arm/neon.ml (features): Add Compiler_optim.
726 (ops): Add Compiler_optim feature to Vbic and Vorn.
727 (type_in_crypto_only): Replace 'or' by '||'.
728 (reinterp): Likewise.
729 (reinterpq): Likewise.
731 2015-03-05 Yvan Roux <yvan.roux@linaro.org>
733 Backport from trunk r212011, r214942, r214957, r215012, r215016, r218115,
734 r218733, r218746, r220491.
735 2015-02-06 Sebastian Pop <s.pop@samsung.com>
736 Brian Rzycki <b.rzycki@samsung.com>
738 PR tree-optimization/64878
739 * tree-ssa-threadedge.c: Include tree-ssa-loop.h.
740 (fsm_find_control_statement_thread_paths): Add parameter seen_loop_phi.
741 Stop recursion at loop phi nodes after having visited a loop phi node.
743 2014-12-15 Richard Biener <rguenther@suse.de>
745 PR middle-end/64246
746 * cfgloop.c (mark_loop_for_removal): Make safe against multiple
747 invocations on the same loop.
749 2014-12-15 Richard Biener <rguenther@suse.de>
751 PR tree-optimization/64284
752 * tree-ssa-threadupdate.c (duplicate_seme_region): Mark
753 the loop for removal if we copied the loop header.
755 2014-11-27 Richard Biener <rguenther@suse.de>
757 PR tree-optimization/64083
758 * tree-ssa-threadupdate.c (thread_through_all_blocks): Do not
759 forcibly mark loop for removal the wrong way.
761 2014-09-08 Richard Biener <rguenther@suse.de>
763 PR ipa/63196
764 * tree-inline.c (copy_loops): The source loop header should
765 always be non-NULL.
766 (tree_function_versioning): If loops need fixup after removing
767 unreachable blocks fix them.
768 * omp-low.c (simd_clone_adjust): Do not add incr block to
769 loop under construction.
771 2014-09-08 Richard Biener <rguenther@suse.de>
773 PR bootstrap/63204
774 * cfgloop.c (mark_loop_for_removal): Track former header
775 unconditionally.
776 * cfgloop.h (struct loop): Add former_header member unconditionally.
777 * loop-init.c (fix_loop_structure): Enable bogus loop removal
778 diagnostic unconditionally.
780 2014-09-05 Richard Biener <rguenther@suse.de>
782 * cfgloop.c (mark_loop_for_removal): Record former header
783 when ENABLE_CHECKING.
784 * cfgloop.h (strut loop): Add former_header member when
785 ENABLE_CHECKING.
786 * loop-init.c (fix_loop_structure): Sanity check loops
787 marked for removal if they re-appeared.
789 2014-09-05 Richard Biener <rguenther@suse.de>
791 * cfgloop.c (mark_loop_for_removal): New function.
792 * cfgloop.h (mark_loop_for_removal): Declare.
793 * cfghooks.c (delete_basic_block): Use mark_loop_for_removal.
794 (merge_blocks): Likewise.
795 (duplicate_block): Likewise.
796 * except.c (sjlj_emit_dispatch_table): Likewise.
797 * tree-eh.c (cleanup_empty_eh_merge_phis): Likewise.
798 * tree-ssa-threadupdate.c (ssa_redirect_edges): Likewise.
799 (thread_through_loop_header): Likewise.
801 2014-06-26 Richard Biener <rguenther@suse.de>
803 PR tree-optimization/61607
804 * tree-ssa-threadupdate.c (ssa_redirect_edges): Cancel the
805 loop if we redirected its latch edge.
806 (thread_block_1): Do not cancel loops prematurely.
808 2015-03-05 Yvan Roux <yvan.roux@linaro.org>
810 Backport from trunk r220860.
811 2015-02-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
813 * config/aarch64/aarch64.md (*aarch64_lshr_sisd_or_int_<mode>3):
814 Mark operand 0 as earlyclobber in 2nd alternative.
815 (1st define_split below *aarch64_lshr_sisd_or_int_<mode>3):
816 Write negated shift amount into QI lowpart operand 0 and use it
817 in the shift step.
818 (2nd define_split below *aarch64_lshr_sisd_or_int_<mode>3): Likewise.
820 2015-03-04 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
822 Backport from trunk r215722.
823 2014-09-30 James Greenhalgh <james.greenhalgh@arm.com>
825 * config/aarch64/aarch64-simd-builtins.def (sqdmull_laneq): Expand
826 iterator.
827 * config/aarch64/aarch64-simd.md
828 (aarch64_sqdmull_laneq<mode>): Expand iterator.
829 * config/aarch64/arm_neon.h (vqdmullh_laneq_s16): New.
830 (vqdmulls_lane_s32): Fix return type.
831 (vqdmulls_laneq_s32): New.
833 2015-03-04 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
835 Backport from trunk r215612.
836 2014-09-25 James Greenhalgh <james.greenhalgh@arm.com>
838 * config/aarch64/aarch64-protos.h (aarch64_simd_const_bounds): Delete.
839 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shl<mode>): Use
840 new predicates.
841 (aarch64_<sur>shll2_n<mode>): Likewise.
842 (aarch64_<sur>shr_n<mode>): Likewise.
843 (aarch64_<sur>sra_n<mode>: Likewise.
844 (aarch64_<sur>s<lr>i_n<mode>): Likewise.
845 (aarch64_<sur>qshl<u>_n<mode>): Likewise.
846 * config/aarch64/aarch64.c (aarch64_simd_const_bounds): Delete.
847 * config/aarch64/iterators.md (ve_mode): New.
848 (offsetlr): Remap to infix text for use in new predicates.
849 * config/aarch64/predicates.md (aarch64_simd_shift_imm_qi): New.
850 (aarch64_simd_shift_imm_hi): Likewise.
851 (aarch64_simd_shift_imm_si): Likewise.
852 (aarch64_simd_shift_imm_di): Likewise.
853 (aarch64_simd_shift_imm_offset_qi): Likewise.
854 (aarch64_simd_shift_imm_offset_hi): Likewise.
855 (aarch64_simd_shift_imm_offset_si): Likewise.
856 (aarch64_simd_shift_imm_offset_di): Likewise.
857 (aarch64_simd_shift_imm_bitsize_qi): Likewise.
858 (aarch64_simd_shift_imm_bitsize_hi): Likewise.
859 (aarch64_simd_shift_imm_bitsize_si): Likewise.
860 (aarch64_simd_shift_imm_bitsize_di): Likewise.
862 2015-02-15 Michael Collison <michael.collison@linaro.org>
864 * LINARO-VERSION: Bump version.
866 2015-02-12 Michael Collison <michael.collison@linaro.org>
868 GCC Linaro 4.9-2015.02 released.
869 * LINARO-VERSION: Update.
871 2015-02-10 Michael Collison <michael.collison@linaro.org>
873 Backport from trunk r217175, r217185, r217186.
874 2014-11-06 Hale Wang <hale.wang@arm.com>
876 * config/arm/arm-cores.def: Add support for
877 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
878 cortex-m1.small-multiply.
879 * config/arm/arm-tables.opt: Regenerate.
880 * config/arm/arm-tune.md: Regenerate.
881 * config/arm/arm.c: Update the rtx-costs for MUL.
882 * config/arm/bpabi.h: Handle
883 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
884 cortex-m1.small-multiply.
885 * doc/invoke.texi: Document
886 -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
887 cortex-m1.small-multiply.
889 2015-02-10 Michael Collison <michael.collison@linaro.org>
891 Backport from trunk r217091.
892 2014-11-04 Jiong Wang <jiong.wang@arm.com>
893 2014-11-04 Wilco Dijkstra <wilco.dijkstra@arm.com>
895 PR target/63293
896 * config/aarch64/aarch64.c (aarch64_expand_epiloue): Add barriers before
897 stack adjustment.
899 2015-02-10 Michael Collison <michael.collison@linaro.org>
901 Backport from trunk r217118.
902 2014-11-05 Alex Velenko <Alex.Velenko@arm.com>
904 * simplify-rtx.c (simplify_binary_operation_1): Div check added.
905 * rtl.h (SUBREG_P): New macro added.
907 2015-02-10 Michael Collison <michael.collison@linaro.org>
909 Backport from trunk r217215.
910 2014-11-07 Jiong Wang <jiong.wang@arm.com>
911 2014-11-07 Richard Biener <rguenther@suse.de>
913 PR tree-optimization/63676
914 * gimple-fold.c (fold_gimple_assign): Do not fold node when
915 TREE_CLOBBER_P be true.
917 2015-02-10 Michael Collison <michael.collison@linaro.org>
919 Backport from trunk r219583.
920 2015-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
922 PR target/64460
923 * config/arm/arm.md (*<arith_shift_insn>_multsi): Set 'shift' to 2.
924 (*<arith_shift_insn>_shiftsi): Set 'shift' attr to 3.
926 2015-02-10 Michael Collison <michael.collison@linaro.org>
928 Backport from trunk r217430.
929 2014-11-12 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
931 * config/arm/arm.c (*<arith_shift_insn>_shiftsi): Fix typo.
933 2015-02-10 Michael Collison <michael.collison@linaro.org>
935 Backport from trunk r217431.
936 2014-11-12 Jiong Wang <jiong.wang@arm.com>
938 * config/aarch64/aarch64.h (CALL_USED_REGISTERS): Mark LR as
939 caller-save.
940 (EPILOGUE_USES): Guard the check by epilogue_completed.
941 * config/aarch64/aarch64.c (aarch64_layout_frame): Explictly check for
942 LR.
943 (aarch64_can_eliminate): Check LR_REGNUM liveness.
945 2015-02-10 Michael Collison <michael.collison@linaro.org>
947 Backport from trunk r219718.
948 * expmed.c (store_bit_field_using_insv): Improve warning message.
949 Use %wu instead of HOST_WIDE_INT_PRINT_UNSIGNED.
951 2015-01-15 Jiong Wang <jiong.wang@arm.com>
953 2015-02-10 Michael Collison <michael.collison@linaro.org>
955 Backport from trunk r219717.
956 2015-01-15 Jiong Wang <jiong.wang@arm.com>
958 PR rtl-optimization/64011
959 * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
960 there is partial overflow.
962 2015-02-10 Michael Collison <michael.collison@linaro.org>
964 Backport from trunk r217331.
965 2014-11-11 Bin Cheng <bin.cheng@arm.com>
967 * sched-deps.c (sched_analyze_1): Check pending list if it is not
968 less than MAX_PENDING_LIST_LENGTH.
969 (sched_analyze_2, sched_analyze_insn, deps_analyze_insn): Ditto.
971 2015-02-09 Michael Collison <michael.collison@linaro.org>
973 Backport from trunk r216779.
974 2014-10-28 Alan Lawrence <alan.lawrence@arm.com>
976 * expr.c (expand_expr_real_2): Remove code handling VEC_LSHIFT_EXPR.
977 * fold-const.c (const_binop): Likewise.
978 * cfgexpand.c (expand_debug_expr): Likewise.
979 * tree-inline.c (estimate_operator_cost): Likewise.
980 * tree-vect-generic.c (expand_vector_operations_1): Likewise.
981 * optabs.c (optab_for_tree_code): Likewise.
982 (expand_vec_shift_expr): Likewise, update comment.
983 * tree.def: Delete VEC_LSHIFT_EXPR, remove comment.
984 * optabs.h (expand_vec_shift_expr): Remove comment re. VEC_LSHIFT_EXPR.
985 * optabs.def: Remove vec_shl_optab.
986 * doc/md.texi: Remove references to vec_shr_m.
988 2015-02-09 Michael Collison <michael.collison@linaro.org>
990 Backport from trunk r216742.
991 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
993 * config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Define again.
994 * config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin):
995 Restore, enable for bigendian, update to use __builtin..._scal...
997 2015-02-09 Michael Collison <michael.collison@linaro.org>
999 Backport from trunk r216741.
1000 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1002 * config/aarch64/aarch64-simd-builtins.def (reduc_smax_, reduc_smin_,
1003 reduc_umax_, reduc_umin_, reduc_smax_nan_, reduc_smin_nan_): Remove.
1004 (reduc_smax_scal_, reduc_smin_scal_, reduc_umax_scal_,
1005 reduc_umin_scal_, reduc_smax_nan_scal_, reduc_smin_nan_scal_): New.
1007 * config/aarch64/aarch64-simd.md
1008 (reduc_<maxmin_uns>_<mode>): Rename VDQV_S variant to...
1009 (reduc_<maxmin_uns>_internal<mode>): ...this.
1010 (reduc_<maxmin_uns>_<mode>): New (VDQ_BHSI).
1011 (reduc_<maxmin_uns>_scal_<mode>): New (*2).
1013 (reduc_<maxmin_uns>_v2si): Combine with below, renaming...
1014 (reduc_<maxmin_uns>_<mode>): Combine V2F with above, renaming...
1015 (reduc_<maxmin_uns>_internal_<mode>): ...to this (VDQF).
1017 * config/aarch64/arm_neon.h (vmaxv_f32, vmaxv_s8, vmaxv_s16,
1018 vmaxv_s32, vmaxv_u8, vmaxv_u16, vmaxv_u32, vmaxvq_f32, vmaxvq_f64,
1019 vmaxvq_s8, vmaxvq_s16, vmaxvq_s32, vmaxvq_u8, vmaxvq_u16, vmaxvq_u32,
1020 vmaxnmv_f32, vmaxnmvq_f32, vmaxnmvq_f64, vminv_f32, vminv_s8,
1021 vminv_s16, vminv_s32, vminv_u8, vminv_u16, vminv_u32, vminvq_f32,
1022 vminvq_f64, vminvq_s8, vminvq_s16, vminvq_s32, vminvq_u8, vminvq_u16,
1023 vminvq_u32, vminnmv_f32, vminnmvq_f32, vminnmvq_f64): Update to use
1024 __builtin_aarch64_reduc_..._scal; remove vget_lane wrapper.
1026 2015-02-09 Michael Collison <michael.collison@linaro.org>
1028 Backport from trunk r216738.
1029 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1031 * config/aarch64/aarch64-simd-builtins.def
1032 (reduc_splus_<mode>/VDQF, reduc_uplus_<mode>/VDQF, reduc_splus_v4sf):
1033 Remove.
1034 (reduc_plus_scal_<mode>, reduc_plus_scal_v4sf): New.
1036 * config/aarch64/aarch64-simd.md (reduc_<sur>plus_mode): Remove.
1037 (reduc_splus_<mode>, reduc_uplus_<mode>, reduc_plus_scal_<mode>): New.
1039 (reduc_<sur>plus_mode): Change SUADDV -> UNSPEC_ADDV, rename to...
1040 (aarch64_reduc_plus_internal<mode>): ...this.
1042 (reduc_<sur>plus_v2si): Change SUADDV -> UNSPEC_ADDV, rename to...
1043 (aarch64_reduc_plus_internalv2si): ...this.
1045 (reduc_splus_<mode>/V2F): Rename to...
1046 (aarch64_reduc_plus_internal<mode>): ...this.
1048 * config/aarch64/iterators.md
1049 (UNSPEC_SADDV, UNSPEC_UADDV, SUADDV): Remove.
1050 (UNSPEC_ADDV): New.
1051 (sur): Remove elements for UNSPEC_SADDV and UNSPEC_UADDV.
1053 * config/aarch64/arm_neon.h (vaddv_s8, vaddv_s16, vaddv_s32, vaddv_u8,
1054 vaddv_u16, vaddv_u32, vaddvq_s8, vaddvq_s16, vaddvq_s32, vaddvq_s64,
1055 vaddvq_u8, vaddvq_u16, vaddvq_u32, vaddvq_u64, vaddv_f32, vaddvq_f32,
1056 vaddvq_f64): Change __builtin_aarch64_reduc_[us]plus_... to
1057 __builtin_aarch64_reduc_plus_scal, remove vget_lane wrapper.
1059 2015-02-09 Michael Collison <michael.collison@linaro.org>
1061 Backport from trunk r216737.
1062 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1064 PR tree-optimization/61114
1065 * doc/md.texi (Standard Names): Add reduc_(plus,[us](min|max))|scal
1066 optabs, and note in reduc_[us](plus|min|max) to prefer the former.
1068 * expr.c (expand_expr_real_2): Use reduc_..._scal if available, fall
1069 back to old reduc_... BIT_FIELD_REF only if not.
1071 * optabs.c (optab_for_tree_code): for REDUC_(MAX,MIN,PLUS)_EXPR,
1072 return the reduce-to-scalar (reduc_..._scal) optab.
1073 (scalar_reduc_to_vector): New.
1075 * optabs.def (reduc_smax_scal_optab, reduc_smin_scal_optab,
1076 reduc_plus_scal_optab, reduc_umax_scal_optab, reduc_umin_scal_optab):
1077 New.
1079 * optabs.h (scalar_reduc_to_vector): Declare.
1081 * tree-vect-loop.c (vectorizable_reduction): Look for optabs reducing
1082 to either scalar or vector.
1084 2015-02-09 Michael Collison <michael.collison@linaro.org>
1086 Backport from trunk r216736.
1087 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1089 PR tree-optimization/61114
1090 * expr.c (expand_expr_real_2): For REDUC_{MIN,MAX,PLUS}_EXPR, add
1091 extract_bit_field around optab result.
1093 * fold-const.c (fold_unary_loc): For REDUC_{MIN,MAX,PLUS}_EXPR, produce
1094 scalar not vector.
1096 * tree-cfg.c (verify_gimple_assign_unary): Check result vs operand type
1097 for REDUC_{MIN,MAX,PLUS}_EXPR.
1099 * tree-vect-loop.c (vect_analyze_loop): Update comment.
1100 (vect_create_epilog_for_reduction): For direct vector reduction, use
1101 result of tree code directly without extract_bit_field.
1103 * tree.def (REDUC_MAX_EXPR, REDUC_MIN_EXPR, REDUC_PLUS_EXPR): Update
1104 comment.
1106 2015-02-09 Michael Collison <michael.collison@linaro.org>
1108 Backport from trunk r216734.
1109 2014-10-27 Alan Lawrence <alan.lawrence@arm.com>
1111 * config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Comment out.
1112 * config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin):
1113 Remove using preprocessor directis.
1115 2015-02-09 Yvan Roux <yvan.roux@linaro.org>
1117 Backport from trunk r217173, r217174, r217687.
1118 2014-11-17 Terry Guo <terry.guo@arm.com>
1120 * config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
1121 * config/arm/arm.md (generic_sched): Exclude cortex-m7.
1122 (generic_vfp): Likewise.
1123 * config/arm/cortex-m7.md: Pipeline description for cortex-m7.
1125 2014-10-06 Hale Wang <Hale.Wang@arm.com>
1127 * config/arm/arm.c: Add cortex-m7 tune.
1128 * config/arm/arm-cores.def: Use cortex-m7 tune.
1130 2015-01-15 Yvan Roux <yvan.roux@linaro.org>
1132 * LINARO-VERSION: Bump version.
1134 2015-01-15 Yvan Roux <yvan.roux@linaro.org>
1136 GCC Linaro 4.9-2015.01 released.
1137 * LINARO-VERSION: Update.
1139 2015-01-14 Yvan Roux <yvan.roux@linaro.org>
1141 Fix Linaro PR #902
1143 Partial Backport from trunk r211798.
1144 2014-06-18 Radovan Obradovic <robradovic@mips.com>
1145 Tom de Vries <tom@codesourcery.com>
1147 * config/arm/arm.c (arm_emit_call_insn): Add IP and CC clobbers to
1148 CALL_INSN_FUNCTION_USAGE.
1150 Backport from trunk r209800.
1151 2014-04-25 Tom de Vries <tom@codesourcery.com>
1153 * expr.c (clobber_reg_mode): New function.
1154 * expr.h (clobber_reg): New function.
1156 2015-01-14 Yvan Roux <yvan.roux@linaro.org>
1158 Backport from trunk r211783.
1159 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1161 * config/arm/arm.c (neon_vector_mem_operand): Allow register
1162 POST_MODIFY for neon loads and stores.
1163 (arm_print_operand): Output post-index register for neon loads and
1164 stores.
1166 2015-01-14 Yvan Roux <yvan.roux@linaro.org>
1168 Backport from trunk r218451.
1169 2014-12-06 James Greenhalgh <james.greenhalgh@arm.com>
1170 Sebastian Pop <s.pop@samsung.com>
1171 Brian Rzycki <b.rzycki@samsung.com>
1173 PR tree-optimization/54742
1174 * params.def (max-fsm-thread-path-insns, max-fsm-thread-length,
1175 max-fsm-thread-paths): New.
1177 * doc/invoke.texi (max-fsm-thread-path-insns, max-fsm-thread-length,
1178 max-fsm-thread-paths): Documented.
1180 * tree-cfg.c (split_edge_bb_loc): Export.
1181 * tree-cfg.h (split_edge_bb_loc): Declared extern.
1183 * tree-ssa-threadedge.c (simplify_control_stmt_condition): Restore the
1184 original value of cond when simplification fails.
1185 (fsm_find_thread_path): New.
1186 (fsm_find_control_statement_thread_paths): New.
1187 (thread_through_normal_block): Call find_control_statement_thread_paths.
1189 * tree-ssa-threadupdate.c (dump_jump_thread_path): Pretty print
1190 EDGE_FSM_THREAD.
1191 (verify_seme): New.
1192 (duplicate_seme_region): New.
1193 (thread_through_all_blocks): Generate code for EDGE_FSM_THREAD edges
1194 calling duplicate_seme_region.
1196 * tree-ssa-threadupdate.h (jump_thread_edge_type): Add EDGE_FSM_THREAD.
1198 2015-01-13 Michael Collison <michael.collison@linaro.org>
1200 Backport from trunk r217394.
1201 2014-11-11 Andrew Pinski <apinski@cavium.com>
1203 Bug target/61997
1204 * config.gcc (aarch64*-*-*): Set target_gtfiles to include
1205 aarch64-builtins.c.
1206 * config/aarch64/aarch64-builtins.c: Include gt-aarch64-builtins.h
1207 at the end of the file.
1209 2015-01-13 Michael Collison <michael.collison@linaro.org>
1211 Backport from trunk r216267, r216547, r216548, r217072, r217192, r217405,
1212 r217406, r217768.
1213 2014-11-19 Renlin Li <renlin.li@arm.com>
1215 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FP_FAST,
1216 __ARM_FEATURE_FMA, __ARM_FP, __ARM_FEATURE_NUMERIC_MAXMIN, __ARM_NEON_FP.
1218 2014-11-12 Tejas Belagod <tejas.belagod@arm.com>
1220 * Makefile.in (TEXI_GCC_FILES): Remove arm-acle-intrinsics.texi,
1221 arm-neon-intrinsics.texi, aarch64-acle-intrinsics.texi.
1222 * doc/aarch64-acle-intrinsics.texi: Remove.
1223 * doc/arm-acle-intrinsics.texi: Remove.
1224 * doc/arm-neon-intrinsics.texi: Remove.
1225 * doc/extend.texi: Consolidate sections AArch64 intrinsics,
1226 ARM NEON Intrinsics, ARM ACLE Intrinsics into one ARM C Language
1227 Extension section. Add references to public ACLE specification.
1229 2014-11-06 Renlin Li <renlin.li@arm.com>
1231 * config/aarch64/aarch64.c (aarch64_architecture_version): New.
1232 (processor): New architecture_version field.
1233 (aarch64_override_options): Initialize aarch64_architecture_version.
1234 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_ARCH,
1235 __ARM_ARCH_PROFILE, aarch64_arch_name macro.
1237 2014-11-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1239 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Fix typo in definition
1240 of __ARM_FEATURE_IDIV.
1242 2014-10-22 Jiong Wang <jiong.wang@arm.com>
1244 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add missing '\'.
1246 2014-10-22 Renlin Li <renlin.li@arm.com>
1248 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define
1249 __ARM_FEATURE_IDIV__.
1251 2014-10-15 Renlin Li <renlin.li@arm.com>
1253 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
1254 __ARM_BIG_ENDIAN, __ARM_SIZEOF_MINIMAL_ENUM. Add __ARM_64BIT_STATE,
1255 __ARM_ARCH_ISA_A64, __ARM_FEATURE_CLZ, __ARM_FEATURE_IDIV,
1256 __ARM_FEATURE_UNALIGNED, __ARM_PCS_AAPCS64, __ARM_SIZEOF_WCHAR_T.
1258 2015-01-13 Michael Collison <michael.collison@linaro.org>
1260 Backport from trunk r211789, r211790, r211791, r211792, r211793, r211794,
1261 r211795, r211796, r211797.
1262 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1264 * config/arm/bpabi.c (__gnu_uldivmod_helper): Remove.
1266 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1268 * config/arm/bpabi-v6m.S (__aeabi_uldivmod): Perform division using
1269 __udivmoddi4.
1271 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1273 * config/arm/bpabi.S (__aeabi_ldivmod, __aeabi_uldivmod,
1274 push_for_divide, pop_for_divide): Use .cfi_* directives for DWARF
1275 annotations. Fix DWARF information.
1277 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1279 * config/arm/bpabi.S (__aeabi_ldivmod): Perform division using
1280 __udivmoddi4, and fixups for negative operands.
1282 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1284 * config/arm/bpabi.S (__aeabi_ldivmod): Optimise stack manipulation.
1286 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1288 * config/arm/bpabi.S (__aeabi_uldivmod): Perform division using call
1289 to __udivmoddi4.
1291 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1293 * config/arm/bpabi.S (__aeabi_uldivmod): Optimise stack pointer
1294 manipulation.
1296 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1298 * config/arm/bpabi.S (__aeabi_uldivmod, __aeabi_ldivmod): Add comment
1299 describing register usage on function entry and exit.
1301 2014-06-18 Charles Baylis <charles.baylis@linaro.org>
1303 * config/arm/bpabi.S (__aeabi_uldivmod): Fix whitespace.
1304 (__aeabi_ldivmod): Fix whitespace.
1306 2015-01-13 Yvan Roux <yvan.roux@linaro.org>
1308 Backport from trunk r217593.
1309 2014-11-14 Andrew Pinski <apinski@cavium.com>
1311 * config/aarch64/aarch64-cores.def (thunderx): Change the scheduler
1312 over to thunderx.
1313 * config/aarch64/aarch64.md: Include thunderx.md.
1314 (generic_sched): Set to no for thunderx.
1315 * config/aarch64/thunderx.md: New file.
1317 2015-01-12 Yvan Roux <yvan.roux@linaro.org>
1319 Backport from trunk r217717.
1320 2014-11-18 Felix Yang <felix.yang@huawei.com>
1322 * config/aarch64/aarch64.c (doloop_end): New pattern.
1323 * config/aarch64/aarch64.md (TARGET_CAN_USE_DOLOOP_P): Implement.
1325 2015-01-12 Yvan Roux <yvan.roux@linaro.org>
1327 Backport from trunk r217661.
1328 2014-11-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1330 * config/aarch64/aarch64-cores.def (cortex-a53): Remove
1331 AARCH64_FL_CRYPTO from feature flags.
1332 (cortex-a57): Likewise.
1333 (cortex-a57.cortex-a53): Likewise.
1335 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1337 Backport from trunk r218319.
1338 2014-12-03 Andrew Stubbs <ams@codesourcery.com>
1340 Revert:
1342 2014-09-17 Andrew Stubbs <ams@codesourcery.com>
1344 * config/arm/arm.c (arm_option_override): Reject -mfpu=neon
1345 when architecture is older than ARMv7.
1347 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1349 Backport from trunk r217691.
1350 2014-11-18 Jiong Wang <jiong.wang@arm.com>
1352 * lra-eliminations.c (update_reg_eliminate): Relax gcc_assert for fixed
1353 registers.
1355 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1357 Backport from trunk r215503.
1358 2014-09-23 Wilco Dijkstra <wdijkstr@arm.com>
1360 * common/config/aarch64/aarch64-common.c:
1361 (default_options aarch_option_optimization_table):
1362 Default to -fsched-pressure.
1364 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1366 Backport from trunk r211132.
1367 2014-06-02 Tom de Vries <tom@codesourcery.com>
1369 * config/aarch64/aarch64.c (aarch64_float_const_representable_p): Handle
1370 case that x has VOIDmode.
1372 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1374 Backport from trunk r209620.
1375 2014-04-22 Vidya Praveen <vidyapraveen@arm.com>
1377 * aarch64.md (float<GPI:mode><GPF:mode>2): Remove.
1378 (floatuns<GPI:mode><GPF:mode>2): Remove.
1379 (<optab><fcvt_target><GPF:mode>2): New pattern for equal width float
1380 and floatuns conversions.
1381 (<optab><fcvt_iesize><GPF:mode>2): New pattern for inequal width float
1382 and floatuns conversions.
1383 * iterators.md (fcvt_target, FCVT_TARGET): Support SF and DF modes.
1384 (w1,w2): New mode attributes for inequal width conversions.
1386 2015-01-11 Yvan Roux <yvan.roux@linaro.org>
1388 Backport from trunk r217362, r217546.
1389 2014-11-14 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1391 PR target/63724
1392 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Split out
1393 numerical immediate handling to...
1394 (aarch64_internal_mov_immediate): ...this. New.
1395 (aarch64_rtx_costs): Use aarch64_internal_mov_immediate.
1396 (aarch64_mov_operand_p): Relax predicate.
1397 * config/aarch64/aarch64.md (mov<mode>:GPI): Do not expand CONST_INTs.
1398 (*movsi_aarch64): Turn into define_insn_and_split and new alternative
1399 for 'n'.
1400 (*movdi_aarch64): Likewise.
1402 2014-11-11 James Greenhalgh <james.greenhalgh@arm.com>
1404 * config/aarch64/aarch64-simd.md
1405 (aarch64_simd_bsl<mode>_internal): Remove float cases, canonicalize.
1406 (aarch64_simd_bsl<mode>): Add gen_lowpart expressions where we
1407 are punning between float vectors and integer vectors.
1409 2014-12-11 Yvan Roux <yvan.roux@linaro.org>
1411 * LINARO-VERSION: Bump version.
1413 2014-12-11 Yvan Roux <yvan.roux@linaro.org>
1415 GCC Linaro 4.9-2014.12 released.
1416 * LINARO-VERSION: Update.
1418 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1420 Backport from trunk r217079, r217080.
1421 2014-11-04 Alan Lawrence <alan.lawrence@arm.com>
1423 config/arm/neon.md (reduc_smin_<mode> *2): Rename to...
1424 (reduc_smin_scal_<mode> *2): ...this; extract scalar result.
1425 (reduc_smax_<mode> *2): Rename to...
1426 (reduc_smax_scal_<mode> *2): ...this; extract scalar result.
1427 (reduc_umin_<mode> *2): Rename to...
1428 (reduc_umin_scal_<mode> *2): ...this; extract scalar result.
1429 (reduc_umax_<mode> *2): Rename to...
1430 (reduc_umax_scal_<mode> *2): ...this; extract scalar result.
1432 2014-11-04 Alan Lawrence <alan.lawrence@arm.com>
1434 config/arm/neon.md (reduc_plus_*): Rename to...
1435 (reduc_plus_scal_*): ...this; reduce to temp and extract scalar result.
1437 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1439 Fix Backport from trunk r216524 (committed at r218379).
1440 Add missing file: config/aarch64/aarch64-cost-tables.h
1442 * config/aarch64/aarch64-cost-tables.h: New file.
1444 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1446 Backport from trunk r217076.
1447 2014-11-04 Michael Collison <michael.collison@linaro.org>
1449 * config/aarch64/iterators.md (lconst_atomic): New mode attribute
1450 to support constraints for CONST_INT in atomic operations.
1451 * config/aarch64/atomics.md
1452 (atomic_<atomic_optab><mode>): Use lconst_atomic constraint.
1453 (atomic_nand<mode>): Likewise.
1454 (atomic_fetch_<atomic_optab><mode>): Likewise.
1455 (atomic_fetch_nand<mode>): Likewise.
1456 (atomic_<atomic_optab>_fetch<mode>): Likewise.
1457 (atomic_nand_fetch<mode>): Likewise.
1459 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1461 Backport from trunk r217026.
1462 2014-11-03 Zhenqiang Chen <zhenqiang.chen@arm.com>
1464 * ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
1465 Allow CC mode if HAVE_cbranchcc4.
1467 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1469 Backport from trunk r217014.
1470 2014-11-02 Michael Collison <michael.collison@linaro.org>
1472 * config/arm/arm.h (CLZ_DEFINED_VALUE_AT_ZERO) : Update
1473 to support vector modes.
1474 (CTZ_DEFINED_VALUE_AT_ZERO): Ditto.
1476 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1478 Backport from trunk r216996, r216998, r216999, r217001, r217002, r217003,
1479 r217004, r217742.
1480 2014-11-18 James Greenhalgh <james.greenhalgh@arm.com>
1482 PR target/63937
1483 * target.def (use_by_pieces_infrastructure_p): Take unsigned
1484 HOST_WIDE_INT as the size parameter.
1485 * targhooks.c (default_use_by_pieces_infrastructure_p): Likewise.
1486 * targhooks.h (default_use_by_pieces_infrastructure_p): Likewise.
1487 * config/arc/arc.c (arc_use_by_pieces_infrastructure_p)): Likewise.
1488 * config/mips/mips.c (mips_use_by_pieces_infrastructure_p)): Likewise.
1489 * config/s390/s390.c (s390_use_by_pieces_infrastructure_p)): Likewise.
1490 * config/sh/sh.c (sh_use_by_pieces_infrastructure_p)): Likewise.
1491 * config/aarch64/aarch64.c
1492 (aarch64_use_by_pieces_infrastructure_p)): Likewise.
1493 * doc/tm.texi: Regenerate.
1495 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1497 * doc/tm.texi.in (MOVE_BY_PIECES_P): Remove.
1498 (CLEAR_BY_PIECES_P): Likewise.
1499 (SET_BY_PIECES_P): Likewise.
1500 (STORE_BY_PIECES_P): Likewise.
1501 * doc/tm.texi: Regenerate.
1502 * system.h: Poison MOVE_BY_PIECES_P, CLEAR_BY_PIECES_P,
1503 SET_BY_PIECES_P, STORE_BY_PIECES_P.
1504 * expr.c (MOVE_BY_PIECES_P): Remove.
1505 (CLEAR_BY_PIECES_P): Likewise.
1506 (SET_BY_PIECES_P): Likewise.
1507 (STORE_BY_PIECES_P): Likewise.
1508 (can_move_by_pieces): Rewrite in terms of
1509 targetm.use_by_pieces_infrastructure_p.
1510 (emit_block_move_hints): Likewise.
1511 (can_store_by_pieces): Likewise.
1512 (store_by_pieces): Likewise.
1513 (clear_storage_hints): Likewise.
1514 (emit_push_insn): Likewise.
1515 (expand_constructor): Likewise.
1517 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1519 * config/aarch64/aarch64.c
1520 (aarch64_use_by_pieces_infrastructre_p): New.
1521 (TARGET_USE_BY_PIECES_INFRASTRUCTURE): Likewise.
1522 * config/aarch64/aarch64.h (STORE_BY_PIECES_P): Delete.
1524 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1526 * config/mips/mips.h (MOVE_BY_PIECES_P): Remove.
1527 (STORE_BY_PIECES_P): Likewise.
1528 * config/mips/mips.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
1529 (mips_move_by_pieces_p): Rename to...
1530 (mips_use_by_pieces_infrastructure_p): ...this, use new hook
1531 parameters, use the default hook implementation as a
1532 fall-back.
1534 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1536 * config/sh/sh.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
1537 (sh_use_by_pieces_infrastructure_p): Likewise.
1538 * config/sh/sh.h (MOVE_BY_PIECES_P): Remove.
1539 (STORE_BY_PIECES_P): Likewise.
1540 (SET_BY_PIECES_P): Likewise.
1542 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1544 * config/arc/arc.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
1545 (arc_use_by_pieces_infrastructure_p): Likewise.
1546 * confir/arc/arc.h (MOVE_BY_PIECES_P): Delete.
1547 (CAN_MOVE_BY_PIECES): Likewise.
1549 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1551 * config/s390/s390.c (s390_use_by_pieces_infrastructure_p): New.
1552 (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Likewise.
1553 * config/s390/s390.h (MOVE_BY_PIECES_P): Remove.
1554 (CLEAR_BY_PIECES): Likewise.
1555 (SET_BY_PIECES): Likewise.
1556 (STORE_BY_PIECES): Likewise.
1558 2014-11-01 James Greenhalgh <james.greenhalgh@arm.com>
1560 * target.def (use_by_pieces_infrastructure_p): New.
1561 * doc/tm.texi.in (MOVE_BY_PIECES_P): Describe that this macro
1562 is deprecated.
1563 (STORE_BY_PIECES_P): Likewise.
1564 (CLEAR_BY_PIECES_P): Likewise.
1565 (SET_BY_PIECES_P): Likewise.
1566 (TARGET_MOVE_BY_PIECES_PROFITABLE_P): Add hook.
1567 * doc/tm.texi: Regenerate.
1568 * expr.c (MOVE_BY_PIECES_P): Rewrite in terms of
1569 TARGET_USE_BY_PIECES_INFRASTRUCTURE_P.
1570 (STORE_BY_PIECES_P): Likewise.
1571 (CLEAR_BY_PIECES_P): Likewise.
1572 (SET_BY_PIECES_P): Likewise.
1573 (STORE_MAX_PIECES): Move to...
1574 * defaults.h (STORE_MAX_PIECES): ...here.
1575 * targhooks.c (get_move_ratio): New.
1576 (default_use_by_pieces_infrastructure_p): Likewise.
1577 * targhooks.h (default_use_by_pieces_infrastructure_p): New.
1578 * target.h (by_pieces_operation): New.
1580 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1582 Backport from trunk r216765.
1583 2014-10-27 Jiong Wang <jiong.wang@arm.com>
1585 PR target/63442
1586 * optabs.c (prepare_cmp_insn): Use "ret_mode" instead of "word_mode".
1588 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1590 Backport from trunk r216630.
1591 2014-10-24 Felix Yang <felix.yang@huawei.com>
1592 Jiji Jiang <jiangjiji@huawei.com>
1594 PR target/63173
1595 * config/aarch64/arm_neon.h (__LD2R_FUNC): Remove macro.
1596 (__LD3R_FUNC): Ditto.
1597 (__LD4R_FUNC): Ditto.
1598 (vld2_dup_s8, vld2_dup_s16, vld2_dup_s32, vld2_dup_f32, vld2_dup_f64,
1599 vld2_dup_u8, vld2_dup_u16, vld2_dup_u32, vld2_dup_p8, vld2_dup_p16
1600 vld2_dup_s64, vld2_dup_u64, vld2q_dup_s8, vld2q_dup_p8,
1601 vld2q_dup_s16, vld2q_dup_p16, vld2q_dup_s32, vld2q_dup_s64,
1602 vld2q_dup_u8, vld2q_dup_u16, vld2q_dup_u32, vld2q_dup_u64
1603 vld2q_dup_f32, vld2q_dup_f64): Rewrite using builtin functions.
1604 (vld3_dup_s64, vld3_dup_u64, vld3_dup_f64, vld3_dup_s8
1605 vld3_dup_p8, vld3_dup_s16, vld3_dup_p16, vld3_dup_s32
1606 vld3_dup_u8, vld3_dup_u16, vld3_dup_u32, vld3_dup_f32
1607 vld3q_dup_s8, vld3q_dup_p8, vld3q_dup_s16, vld3q_dup_p16
1608 vld3q_dup_s32, vld3q_dup_s64, vld3q_dup_u8, vld3q_dup_u16
1609 vld3q_dup_u32, vld3q_dup_u64, vld3q_dup_f32, vld3q_dup_f64): Likewise.
1610 (vld4_dup_s64, vld4_dup_u64, vld4_dup_f64, vld4_dup_s8
1611 vld4_dup_p8, vld4_dup_s16, vld4_dup_p16, vld4_dup_s32
1612 vld4_dup_u8, vld4_dup_u16, vld4_dup_u32, vld4_dup_f32
1613 vld4q_dup_s8, vld4q_dup_p8, vld4q_dup_s16, vld4q_dup_p16
1614 vld4q_dup_s32, vld4q_dup_s64, vld4q_dup_u8, vld4q_dup_u16
1615 vld4q_dup_u32, vld4q_dup_u64, vld4q_dup_f32, vld4q_dup_f64): Likewise.
1616 * config/aarch64/aarch64.md (define_c_enum "unspec"): Add
1617 UNSPEC_LD2_DUP, UNSPEC_LD3_DUP, UNSPEC_LD4_DUP.
1618 * config/aarch64/aarch64-simd-builtins.def (ld2r, ld3r, ld4r): New
1619 builtins.
1620 * config/aarch64/aarch64-simd.md (aarch64_simd_ld2r<mode>): New pattern.
1621 (aarch64_simd_ld3r<mode>): Likewise.
1622 (aarch64_simd_ld4r<mode>): Likewise.
1623 (aarch64_ld2r<mode>): New expand.
1624 (aarch64_ld3r<mode>): Likewise.
1625 (aarch64_ld4r<mode>): Likewise.
1627 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1629 Backport from trunk r217971.
1630 2014-11-22 Uros Bizjak <ubizjak@gmail.com>
1632 * params.def (PARAM_MAX_COMPLETELY_PEELED_INSNS): Increase to 200.
1633 * config/i386/i386.c (ix86_option_override_internal): Do not increase
1634 PARAM_MAX_COMPLETELY_PEELED_INSNS.
1636 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1638 Backport from trunk r216524.
1639 2014-10-21 Andrew Pinski <apinski@cavium.com>
1641 * doc/invoke.texi (AARCH64/mtune): Document thunderx as an
1642 available option also.
1643 * config/aarch64/aarch64-cost-tables.h: New file.
1644 * config/aarch64/aarch64-cores.def (thunderx): New core.
1645 * config/aarch64/aarch64-tune.md: Regenerate.
1646 * config/aarch64/aarch64.c: Include aarch64-cost-tables.h instead
1647 of config/arm/aarch-cost-tables.h.
1648 (thunderx_regmove_cost): New variable.
1649 (thunderx_tunings): New variable.
1651 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1653 Backport from trunk r216336.
1654 2014-10-16 Richard Earnshaw <rearnsha@arm.com>
1656 * config/aarch64/aarch64.c (aarch64_legitimize_address): New function.
1657 (TARGET_LEGITIMIZE_ADDRESS): Redefine.
1659 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1661 Backport from trunk r216253.
1662 2014-10-15 Renlin Li <renlin.li@arm.com>
1664 * config/aarch64/aarch64.h (ARM_DEFAULT_PCS, arm_pcs_variant): Delete.
1666 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1668 Backport from trunk r215711.
1669 2014-09-30 Terry Guo <terry.guo@arm.com>
1671 * config/arm/arm-cores.def (cortex-m7): New core name.
1672 * config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
1673 (fpv5-d16): Ditto.
1674 * config/arm/arm-tables.opt: Regenerated.
1675 * config/arm/arm-tune.md: Regenerated.
1676 * config/arm/arm.h (TARGET_VFP5): New macro.
1677 * config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
1678 * config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
1679 smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
1680 * doc/invoke.texi: Document new cpu and fpu names.
1682 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1684 Backport from trunk r215707, r215842.
1685 2014-10-03 David Sherwood <david.sherwood@arm.com>
1687 * ira-int.h (ira_allocno): Mark hard_regno as signed.
1689 2014-09-30 David Sherwood <david.sherwood@arm.com>
1691 * ira-int.h (ira_allocno): Add "wmode" field.
1692 * ira-build.c (create_insn_allocnos): Add new "parent" function
1693 parameter.
1694 * ira-conflicts.c (ira_build_conflicts): Add conflicts for registers
1695 that cannot be accessed in wmode.
1697 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1699 Backport from trunk r215540.
1700 2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com>
1702 PR rtl-optimization/63210
1703 * ira-color.c (assign_hard_reg): Ignore conflict cost if the
1704 HARD_REGNO is not available for CONFLICT_A.
1706 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1708 Backport from trunk r215046.
1709 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1711 PR target/61749
1712 * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
1713 Use qualifier_immediate for last operand. Rename to...
1714 (aarch64_types_ternop_lane_qualifiers): ... This.
1715 (TYPES_QUADOP): Rename to...
1716 (TYPES_TERNOP_LANE): ... This.
1717 (aarch64_simd_expand_args): Return const0_rtx when encountering user
1718 error. Change return of 0 to return of NULL_RTX.
1719 (aarch64_crc32_expand_builtin): Likewise.
1720 (aarch64_expand_builtin): Return NULL_RTX instead of 0.
1721 ICE when expanding unknown builtin.
1722 * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
1723 TERNOP_LANE qualifiers.
1724 (sqdmlsl_lane): Likewise.
1725 (sqdmlal_laneq): Likewise.
1726 (sqdmlsl_laneq): Likewise.
1727 (sqdmlal2_lane): Likewise.
1728 (sqdmlsl2_lane): Likewise.
1729 (sqdmlal2_laneq): Likewise.
1730 (sqdmlsl2_laneq): Likewise.
1732 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1734 Backport from trunk r215013.
1735 2014-09-08 Joseph Myers <joseph@codesourcery.com>
1737 * defaults.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
1738 Remove.
1739 * doc/tm.texi.in (ROUND_TOWARDS_ZERO, LARGEST_EXPONENT_IS_NORMAL):
1740 Remove.
1741 * doc/tm.texi: Regenerate.
1742 * system.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
1743 Poison.
1744 * config/arm/arm.h (LARGEST_EXPONENT_IS_NORMAL): Remove.
1745 * config/cris/cris.h (__make_dp): Remove.
1747 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1749 Backport from trunk r214952.
1750 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
1752 * config/aarch64/arm_neon.h (__GET_HIGH): New macro.
1753 (vget_high_f32, vget_high_f64, vget_high_p8, vget_high_p16,
1754 vget_high_s8, vget_high_s16, vget_high_s32, vget_high_s64,
1755 vget_high_u8, vget_high_u16, vget_high_u32, vget_high_u64):
1756 Remove temporary __asm__ and reimplement.
1758 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1760 Backport from trunk r214948, r214949.
1761 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
1763 * config/aarch64/aarch64-builtins.c (aarch64_fold_builtin): Remove code
1764 handling cmge, cmgt, cmeq, cmtst.
1766 * config/aarch64/aarch64-simd-builtins.def (cmeq, cmge, cmgt, cmle,
1767 cmlt, cmgeu, cmgtu, cmtst): Remove.
1769 * config/aarch64/arm_neon.h (vceq_*, vceqq_*, vceqz_*, vceqzq_*,
1770 vcge_*, vcgeq_*, vcgez_*, vcgezq_*, vcgt_*, vcgtq_*, vcgtz_*,
1771 vcgtzq_*, vcle_*, vcleq_*, vclez_*, vclezq_*, vclt_*, vcltq_*,
1772 vcltz_*, vcltzq_*, vtst_*, vtstq_*): Use gcc vector extensions.
1774 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
1776 * config/aarch64/aarch64-builtins.c (aarch64_types_cmtst_qualifiers,
1777 TYPES_TST): Define.
1778 (aarch64_fold_builtin): Update pattern for cmtst.
1780 * config/aarch64/aarch64-protos.h (aarch64_const_vec_all_same_int_p):
1781 Declare.
1783 * config/aarch64/aarch64-simd-builtins.def (cmtst): Update qualifiers.
1785 * config/aarch64/aarch64-simd.md (aarch64_vcond_internal<mode><mode>):
1786 Switch operands, separate out more cases, refactor.
1788 (aarch64_cmtst<mode>): Rewrite pattern to match (plus ... -1).
1790 * config/aarch64.c (aarch64_const_vec_all_same_int_p): Take single
1791 argument; rename old version to...
1792 (aarch64_const_vec_all_same_in_range_p): ...this.
1793 (aarch64_print_operand, aarch64_simd_shift_imm_p): Follow renaming.
1795 * config/aarch64/predicates.md (aarch64_simd_imm_minus_one): Define.
1797 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1799 Backport from trunk r214008.
1800 2014-08-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1802 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Move
1803 one_match > zero_match case to just before simple_sequence.
1805 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1807 Backport from trunk r213382.
1808 2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
1810 * config/aarch64/arm_neon.h (vpadd_<suf><8,16,32,64>): Move to
1811 correct alphabetical position.
1812 (vpaddd_f64): Rewrite using builtins.
1813 (vpaddd_s64): Move to correct alphabetical position.
1814 (vpaddd_u64): New.
1816 2014-12-04 Yvan Roux <yvan.roux@linaro.org>
1818 Backport from trunk r210735, r215206, r215207, r215208.
1819 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1821 * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
1822 for A57.
1823 (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
1824 cost to spilling from integer to FP registers.
1826 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1828 * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
1829 move handling.
1830 (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
1831 are now handled correctly.
1833 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1835 * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
1836 handling of CALLER_SAVE_REGS and POINTER_REGS.
1838 2014-05-22 Kugan Vivekanandarajah <kuganv@linaro.org>
1840 * config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
1841 to GENERAL_REGS.
1842 (aarch64_secondary_reload) : LikeWise.
1843 (aarch64_class_max_nregs) : Remove CORE_REGS.
1844 * config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
1845 (REG_CLASS_NAMES) : Likewise.
1846 (REG_CLASS_CONTENTS) : LikeWise.
1847 (INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.
1849 2014-11-14 Yvan Roux <yvan.roux@linaro.org>
1851 * LINARO-VERSION: Bump version.
1853 2014-11-14 Yvan Roux <yvan.roux@linaro.org>
1855 GCC Linaro 4.9-2014.11 released.
1856 * LINARO-VERSION: Update.
1858 2014-11-14 Yvan Roux <yvan.roux@linaro.org>
1860 Add Linaro release macros (Linaro only patch.)
1862 * Makefile.in (LINAROVER, LINAROVER_C, LINAROVER_S): Define.
1863 (CFLAGS-cppbuiltin.o): Add LINAROVER macro definition.
1864 (cppbuiltin.o): Depend on $(LINAROVER).
1865 * cppbuiltin.c (parse_linarover): New.
1866 (define_GNUC__): Define __LINARO_RELEASE__ and __LINARO_SPIN__ macros.
1868 2014-11-13 Yvan Roux <yvan.roux@linaro.org>
1870 Backport from trunk r216229, r216230.
1871 2014-10-14 Andrew Pinski <apinski@cavium.com>
1873 * explow.c (convert_memory_address_addr_space): Rename to ...
1874 (convert_memory_address_addr_space_1): This. Add in_const argument.
1875 Inside a CONST RTL, permute the conversion and addition of constant
1876 for zero and sign extended pointers.
1877 (convert_memory_address_addr_space): New function.
1879 2014-10-14 Andrew Pinski <apinski@cavium.com>
1881 Revert:
1882 2011-08-19 H.J. Lu <hongjiu.lu@intel.com>
1884 PR middle-end/49721
1885 * explow.c (convert_memory_address_addr_space): Also permute the
1886 conversion and addition of constant for zero-extend.
1888 2014-10-24 Yvan Roux <yvan.roux@linaro.org>
1890 * LINARO-VERSION: Bump version.
1892 2014-10-24 Yvan Roux <yvan.roux@linaro.org>
1894 GCC Linaro 4.9-2014.10-1 released.
1895 * LINARO-VERSION: Update.
1897 2014-10-17 Yvan Roux <yvan.roux@linaro.org>
1899 * LINARO-VERSION: Bump version.
1901 2014-10-17 Yvan Roux <yvan.roux@linaro.org>
1903 GCC Linaro 4.9-2014.10 released.
1904 * LINARO-VERSION: Update.
1906 2014-10-10 Yvan Roux <yvan.roux@linaro.org>
1908 Revert:
1909 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
1911 Backport from trunk r215206, r215207, r215208.
1912 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1914 * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
1915 for A57.
1916 (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
1917 cost to spilling from integer to FP registers.
1919 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1921 * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
1922 move handling.
1923 (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
1924 are now handled correctly.
1926 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1928 * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
1929 handling of CALLER_SAVE_REGS and POINTER_REGS.
1931 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
1933 Backport from trunk r214825, r214826.
1934 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1936 PR target/62275
1937 * config/arm/neon.md
1938 (neon_vcvt<NEON_VCVT:nvrint_variant><su_optab><VCVTF:mode>
1939 <v_cmp_result>): New pattern.
1940 * config/arm/iterators.md (NEON_VCVT): New int iterator.
1941 * config/arm/arm_neon_builtins.def (vcvtav2sf, vcvtav4sf, vcvtauv2sf,
1942 vcvtauv4sf, vcvtpv2sf, vcvtpv4sf, vcvtpuv2sf, vcvtpuv4sf, vcvtmv2sf,
1943 vcvtmv4sf, vcvtmuv2sf, vcvtmuv4sf): New builtin definitions.
1944 * config/arm/arm.c (arm_builtin_vectorized_function): Handle
1945 BUILT_IN_LROUNDF, BUILT_IN_LFLOORF, BUILT_IN_LCEILF.
1947 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1949 PR target/62275
1950 * config/arm/iterators.md (FIXUORS): New code iterator.
1951 (VCVT): New int iterator.
1952 (su_optab): New code attribute.
1953 (su): Likewise.
1954 * config/arm/vfp.md (l<vrint_pattern><su_optab><mode>si2): New pattern.
1956 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
1958 Backport from trunk r215471.
1959 2014-09-22 James Greenhalgh <james.greenhalgh@arm.com>
1961 * config/aarch64/geniterators.sh: New.
1962 * config/aarch64/iterators.md (VDQF_DF): New.
1963 * config/aarch64/t-aarch64: Generate aarch64-builtin-iterators.h.
1964 * config/aarch64/aarch64-builtins.c (BUILTIN_*) Remove.
1966 2014-10-08 Yvan Roux <yvan.roux@linaro.org>
1968 Backport from trunk r215206, r215207, r215208.
1969 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1971 * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
1972 for A57.
1973 (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
1974 cost to spilling from integer to FP registers.
1976 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1978 * config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
1979 move handling.
1980 (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
1981 are now handled correctly.
1983 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
1985 * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
1986 handling of CALLER_SAVE_REGS and POINTER_REGS.
1988 2014-10-07 Yvan Roux <yvan.roux@linaro.org>
1990 Backport from trunk r214824.
1991 2014-09-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1993 * config/aarch64/predicates.md (aarch64_comparison_operation):
1994 New special predicate.
1995 * config/aarch64/aarch64.md (*csinc2<mode>_insn): Use
1996 aarch64_comparison_operation instead of matching an operator.
1997 Update operand numbers.
1998 (csinc3<mode>_insn): Likewise.
1999 (*csinv3<mode>_insn): Likewise.
2000 (*csneg3<mode>_insn): Likewise.
2001 (ffs<mode>2): Update gen_csinc3<mode>_insn callsite.
2002 * config/aarch64/aarch64.c (aarch64_get_condition_code):
2003 Return -1 instead of aborting on invalid condition codes.
2004 (aarch64_print_operand): Update aarch64_get_condition_code callsites
2005 to assert that the returned condition code is valid.
2006 * config/aarch64/aarch64-protos.h (aarch64_get_condition_code): Export.
2008 2014-10-07 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
2010 Backport from trunk r209643, r211881.
2011 2014-06-22 Richard Henderson <rth@redhat.com>
2013 PR target/61565
2014 * compare-elim.c (struct comparison): Add eh_note.
2015 (find_comparison_dom_walker::before_dom_children): Don't eliminate
2016 a redundant comparison in a different EH region. Purge EH edges if
2017 necessary.
2019 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2021 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
2023 2014-10-06 Charles Baylis <charles.baylis@linaro.org>
2025 Backport from trunk r214945.
2026 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
2028 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Replace
2029 varargs with pointer parameter.
2030 (aarch64_simd_expand_builtin): pass pointer into previous.
2032 2014-10-06 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
2034 Backport from trunk r214944.
2035 2014-09-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2037 * config/arm/cortex-a53.md (cortex_a53_alu_shift): Add alu_ext,
2038 alus_ext.
2040 2014-10-06 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
2042 Backport from trunk r214943.
2043 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
2045 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): New pattern.
2046 * config/aarch64/aarch64-simd-builtins.def (rbit): New builtin.
2047 * config/aarch64/arm_neon.h (vrbit_s8, vrbit_u8, vrbitq_s8, vrbitq_u8):
2048 Replace temporary asm with call to builtin.
2049 (vrbit_p8, vrbitq_p8): New functions.
2051 2014-10-06 Michael Collison <michael.collison@linaro.org>
2053 Backport from trunk r214886.
2054 2014-09-03 Richard Henderson <rth@redhat.com>
2056 * config/aarch64/aarch64.c (aarch64_popwb_single_reg): Remove.
2057 (aarch64_popwb_pair_reg): Remove.
2058 (aarch64_set_frame_expr): Remove.
2059 (aarch64_restore_callee_saves): Add CFI_OPS argument; fill it with
2060 the restore ops performed by the insns generated.
2061 (aarch64_expand_epilogue): Attach CFI_OPS to the stack deallocation
2062 insn. Perform the calls_eh_return addition later; do not attempt to
2063 preserve the CFA in that case. Don't use aarch64_set_frame_expr.
2064 (aarch64_expand_prologue): Use REG_CFA_ADJUST_CFA directly, or no
2065 special markup at all. Load cfun->machine->frame.hard_fp_offset
2066 into a local variable.
2067 (aarch64_frame_pointer_required): Don't check calls_alloca.
2069 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2071 Backport from trunk r215385.
2072 2014-09-19 James Greenhalgh <james.greenhalgh@arm.com>
2074 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Mark
2075 scratch register as written.
2077 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2079 Backport from trunk r215346.
2080 2014-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2082 * config/arm/neon.md (*movmisalign<mode>_neon_load): Change type
2083 to neon_load1_1reg<q>.
2085 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2087 Backport from trunk r215321.
2088 2014-09-17 Andrew Stubbs <ams@codesourcery.com>
2090 * config/arm/arm.c (arm_option_override): Reject -mfpu=neon
2091 when architecture is older than ARMv7.
2093 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2095 Backport from trunk r215260.
2096 2014-09-14 David Sherwood <david.sherwood@arm.com>
2098 * gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit simd mov.
2100 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2102 Backport from trunk r215205.
2103 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
2105 * gcc/ree.c (combine_reaching_defs): Ensure inserted copy don't change
2106 the number of hard registers.
2108 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2110 Backport from trunk r215136.
2111 2014-09-10 Xinliang David Li <davidxl@google.com>
2113 PR target/63209
2114 * config/arm/arm.md (movcond_addsi): Handle case where source
2115 and target operands are the same.
2117 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2119 Backport from trunk r215086.
2120 2014-09-09 Marcus Shawcroft <marcus.shawcroft@arm.com>
2121 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2123 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Add crtfastmath.o.
2124 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATH_ENDFILE_SPEC):
2125 Define.
2126 (ENDFILE_SPEC): Define and use GNU_USER_TARGET_MATH_ENDFILE_SPEC.
2128 2014-10-06 Yvan Roux <yvan.roux@linaro.org>
2130 Backport from trunk r215067.
2131 2014-09-09 Jiong Wang <jiong.wang@arm.com>
2133 * config/arm/arm.c (NEON_COPYSIGNF): New enum.
2134 (arm_init_neon_builtins): Support NEON_COPYSIGNF.
2135 (arm_builtin_vectorized_function): Likewise.
2136 * config/arm/arm_neon_builtins.def: New macro for copysignf.
2137 * config/arm/neon.md (neon_copysignf<mode>): New pattern for vector
2138 copysignf.
2140 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2142 Backport from trunk r215050, r215051, r215052, r215053, r215054,
2143 r215055, r215056.
2144 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2146 * config/arm/arm.md (vfp_pop_multiple_with_writeback): Use vldm
2147 mnemonic instead of fldmfdd.
2148 * config/arm/arm.c (vfp_output_fstmd): Rename to...
2149 (vfp_output_vstmd): ... This. Convert output to UAL syntax.
2150 Output vpush when address register is SP.
2151 * config/arm/arm-protos.h (vfp_output_fstmd): Rename to...
2152 (vfp_output_vstmd): ... This.
2153 * config/arm/vfp.md (push_multi_vfp): Update call to
2154 vfp_output_vstmd.
2156 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2158 * config/arm/vfp.md (*movcc_vfp): Use UAL syntax.
2160 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2162 * config/arm/vfp.md (*sqrtsf2_vfp): Use UAL assembly syntax.
2163 (*sqrtdf2_vfp): Likewise.
2164 (*cmpsf_vfp): Likewise.
2165 (*cmpsf_trap_vfp): Likewise.
2166 (*cmpdf_vfp): Likewise.
2167 (*cmpdf_trap_vfp): Likewise.
2169 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2171 * config/arm/vfp.md (*extendsfdf2_vfp): Use UAL assembly syntax.
2172 (*truncdfsf2_vfp): Likewise.
2173 (*truncsisf2_vfp): Likewise.
2174 (*truncsidf2_vfp): Likewise.
2175 (fixuns_truncsfsi2): Likewise.
2176 (fixuns_truncdfsi2): Likewise.
2177 (*floatsisf2_vfp): Likewise.
2178 (*floatsidf2_vfp): Likewise.
2179 (floatunssisf2): Likewise.
2180 (floatunssidf2): Likewise.
2182 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2184 * config/arm/vfp.md (*mulsf3_vfp): Use UAL assembly syntax.
2185 (*muldf3_vfp): Likewise.
2186 (*mulsf3negsf_vfp): Likewise.
2187 (*muldf3negdf_vfp): Likewise.
2188 (*mulsf3addsf_vfp): Likewise.
2189 (*muldf3adddf_vfp): Likewise.
2190 (*mulsf3subsf_vfp): Likewise.
2191 (*muldf3subdf_vfp): Likewise.
2192 (*mulsf3negsfaddsf_vfp): Likewise.
2193 (*fmuldf3negdfadddf_vfp): Likewise.
2194 (*mulsf3negsfsubsf_vfp): Likewise.
2195 (*muldf3negdfsubdf_vfp): Likewise.
2197 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2199 * config/arm/vfp.md (*abssf2_vfp): Use UAL assembly syntax.
2200 (*absdf2_vfp): Likewise.
2201 (*negsf2_vfp): Likewise.
2202 (*negdf2_vfp): Likewise.
2203 (*addsf3_vfp): Likewise.
2204 (*adddf3_vfp): Likewise.
2205 (*subsf3_vfp): Likewise.
2206 (*subdf3_vfp): Likewise.
2207 (*divsf3_vfp): Likewise.
2208 (*divdf3_vfp): Likewise.
2210 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2212 * config/arm/arm.c (output_move_vfp): Use UAL syntax for load/store
2213 multiple.
2214 (arm_print_operand): Don't convert real values to decimal
2215 representation in default case.
2216 (fp_immediate_constant): Delete.
2217 * config/arm/arm-protos.h (fp_immediate_constant): Likewise.
2218 * config/arm/vfp.md (*arm_movsi_vfp): Convert to VFP moves to UAL
2219 syntax.
2220 (*thumb2_movsi_vfp): Likewise.
2221 (*movdi_vfp): Likewise.
2222 (*movdi_vfp_cortexa8): Likewise.
2223 (*movhf_vfp_neon): Likewise.
2224 (*movhf_vfp): Likewise.
2225 (*movsf_vfp): Likewise.
2226 (*thumb2_movsf_vfp): Likewise.
2227 (*movdf_vfp): Likewise.
2228 (*thumb2_movdf_vfp): Likewise.
2229 (*movsfcc_vfp): Likewise.
2230 (*thumb2_movsfcc_vfp): Likewise.
2231 (*movdfcc_vfp): Likewise.
2232 (*thumb2_movdfcc_vfp): Likewise.
2234 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2236 Backport from trunk r214959.
2237 2014-09-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2239 * config/arm/cortex-a53.md (cortex_a53_fpalu): Add f_rints, f_rintd,
2240 f_minmaxs, f_minmaxd types.
2242 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2244 Backport from trunk r214947.
2245 2014-09-05 Alan Lawrence <alan.lawrence@arm.com>
2247 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
2248 Remove qualifier_const_pointer, update comment.
2250 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2252 Backport from trunk r214940.
2253 2014-09-05 James Greenhalgh <james.greenhalgh@arm.com>
2255 * config/aarch64/aarch64.md (sibcall_value_insn): Give operand 1
2256 DImode.
2258 2014-10-03 Yvan Roux <yvan.roux@linaro.org>
2260 Backport from trunk r213090.
2261 2014-07-26 Andrew Pinski <apinski@cavium.com>
2263 * config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
2264 from the read only register.
2266 2014-09-11 Yvan Roux <yvan.roux@linaro.org>
2268 * LINARO-VERSION: Bump version.
2270 2014-09-10 Yvan Roux <yvan.roux@linaro.org>
2272 GCC Linaro 4.9-2014.09 released.
2273 * LINARO-VERSION: Update.
2275 2014-09-09 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
2277 Backport from trunk r215004.
2278 2014-09-07 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
2280 PR target/63190
2281 * config/aarch64/aarch64.md (stack_protect_test_<mode>) Add register
2282 constraint for operand0 and remove write only modifier from operand3.
2284 2014-09-09 Michael Collison <michael.collison@linaro.org>
2286 Backport from trunk r212178
2287 2014-06-30 Joseph Myers <joseph@codesourcery.com>
2289 * var-tracking.c (add_stores): Return instead of asserting if old
2290 and new values for conditional store are the same.
2292 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2294 Revert:
2295 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2297 Backport from trunk r213712.
2298 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2300 * config/aarch64/aarch64.md (absdi2): Set simd attribute.
2301 (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
2302 (aarch64_movdi_<mode>high): Likewise.
2303 (aarch64_mov<mode>high_di): Likewise.
2304 (aarch64_movdi_<mode>low): Likewise.
2305 (aarch64_mov<mode>low_di): Likewise.
2306 (aarch64_movtilow_tilow): Likewise.
2307 Add comment explaining usage of fp,simd attributes and of
2308 TARGET_FLOAT and TARGET_SIMD.
2310 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2312 Backport from trunk r213712.
2313 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2315 * config/aarch64/aarch64.md (absdi2): Set simd attribute.
2316 (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
2317 (aarch64_movdi_<mode>high): Likewise.
2318 (aarch64_mov<mode>high_di): Likewise.
2319 (aarch64_movdi_<mode>low): Likewise.
2320 (aarch64_mov<mode>low_di): Likewise.
2321 (aarch64_movtilow_tilow): Likewise.
2322 Add comment explaining usage of fp,simd attributes and of
2323 TARGET_FLOAT and TARGET_SIMD.
2325 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2327 Backport from trunk r214526.
2328 2014-08-26 Joseph Myers <joseph@codesourcery.com>
2330 PR target/60606
2331 PR target/61330
2332 * varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
2333 DECL_HARD_REGISTER and return for invalid register specifications.
2334 * cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
2335 DECL_HARD_REGISTER, call expand_one_error_var.
2336 * config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
2337 CC_REGNUM with non-MODE_CC modes.
2338 (arm_regno_class): Return NO_REGS for PC_REGNUM.
2340 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2342 Backport from trunk r214503.
2343 2014-08-26 Evandro Menezes <e.menezes@samsung.com>
2345 * config/arm/aarch64/aarch64.c (generic_addrcost_table): Delete
2346 qi cost; add di cost.
2347 (cortexa57_addrcost_table): Likewise.
2349 2014-09-03 Yvan Roux <yvan.roux@linaro.org>
2351 Backport from trunk r213659.
2352 2014-08-06 Alan Lawrence <alan.lawrence@arm.com>
2354 * config/aarch64/aarch64.c (aarch64_evpc_dup): Enable for bigendian.
2355 (aarch64_expand_vec_perm_const): Check for dup before zip.
2357 2014-09-02 Yvan Roux <yvan.roux@linaro.org>
2359 Backport from trunk r213651.
2360 2014-08-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2362 * config/aarch64/aarch64.c (aarch64_classify_address): Use REG_P and
2363 CONST_INT_P instead of GET_CODE and compare.
2364 (aarch64_select_cc_mode): Likewise.
2365 (aarch64_print_operand): Likewise.
2366 (aarch64_rtx_costs): Likewise.
2367 (aarch64_simd_valid_immediate): Likewise.
2368 (aarch64_simd_check_vect_par_cnst_half): Likewise.
2369 (aarch64_simd_emit_pair_result_insn): Likewise.
2371 2014-08-29 Yvan Roux <yvan.roux@linaro.org>
2373 Backport from trunk r212978.
2374 2014-07-24 Andreas Schwab <schwab@suse.de>
2376 * lib/target-supports.exp (check_effective_target_arm_nothumb):
2377 Also check for __arm__.
2379 2014-08-29 Christophe Lyon <christophe.lyon@linaro.org>
2381 Fix backport from trunk 211440:
2382 * config.gcc (aarch64*-*-*): Restore need_64bit_hwint=yes.
2384 This is necessary to build aarch64* compilers on i686 host.
2386 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2388 Backport from trunk r213627.
2389 2014-08-05 James Greenhalgh <james.greenhalgh@arm.com>
2391 * config/aarch64/aarch64-builtins.c
2392 (aarch64_simd_builtin_type_mode): Delete.
2393 (v8qi_UP): Remap to V8QImode.
2394 (v4hi_UP): Remap to V4HImode.
2395 (v2si_UP): Remap to V2SImode.
2396 (v2sf_UP): Remap to V2SFmode.
2397 (v1df_UP): Remap to V1DFmode.
2398 (di_UP): Remap to DImode.
2399 (df_UP): Remap to DFmode.
2400 (v16qi_UP):V16QImode.
2401 (v8hi_UP): Remap to V8HImode.
2402 (v4si_UP): Remap to V4SImode.
2403 (v4sf_UP): Remap to V4SFmode.
2404 (v2di_UP): Remap to V2DImode.
2405 (v2df_UP): Remap to V2DFmode.
2406 (ti_UP): Remap to TImode.
2407 (ei_UP): Remap to EImode.
2408 (oi_UP): Remap to OImode.
2409 (ci_UP): Map to CImode.
2410 (xi_UP): Remap to XImode.
2411 (si_UP): Remap to SImode.
2412 (sf_UP): Remap to SFmode.
2413 (hi_UP): Remap to HImode.
2414 (qi_UP): Remap to QImode.
2415 (aarch64_simd_builtin_datum): Make mode a machine_mode.
2416 (VAR1): Build builtin name.
2417 (aarch64_init_simd_builtins): Remove dead code.
2419 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2421 Backport from trunk r213713.
2422 2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2424 * config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
2425 * config/arm/types.md (f_sels, f_seld): Delete.
2427 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2429 Backport from trunk r213711.
2430 2014-08-07 Ian Bolton <ian.bolton@arm.com>
2431 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2433 * config/aarch64/aarch64.c (aarch64_expand_mov_immediate):
2434 Use MOVN when one of the half-words is 0xffff.
2436 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2438 Backport from trunk r213632.
2439 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2441 * config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type
2442 to reservation.
2443 * config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.
2445 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2447 Backport from trunk r213630.
2448 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2450 * config/arm/arm.md (clzsi2): Set predicable_short_it attr to no.
2451 (rbitsi2): Likewise.
2452 (*arm_rev): Set predicable and predicable_short_it attributes.
2454 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2456 Backport from trunk r213557.
2457 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2458 James Greenhalgh <james.greenhalgh@arm.com>
2460 * doc/md.texi (clrsb): Document.
2461 (clz): Change reference to x into operand 1.
2462 (ctz): Likewise.
2463 (popcount): Likewise.
2465 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2467 Backport from trunk r213551, r213556.
2468 2014-08-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2469 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2471 * sched-deps.c (try_group_insn): Generalise macro fusion hook usage
2472 to any two insns. Update comment. Rename to sched_macro_fuse_insns.
2473 (sched_analyze_insn): Update use of try_group_insn to
2474 sched_macro_fuse_insns.
2475 * config/i386/i386.c (ix86_macro_fusion_pair_p): Reject 2nd
2476 arguments that are not conditional jumps.
2478 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2480 Backport from trunk r213490.
2481 2014-08-01 Alan Lawrence <alan.lawrence@arm.com>
2483 * config/aarch64/aarch64-simd-builtins.def (dup_lane, get_lane): Delete.
2485 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2487 Backport from trunk r213488.
2488 2014-08-01 Jiong Wang <jiong.wang@arm.com>
2490 * config/aarch64/aarch64.c (aarch64_classify_address): Accept all offset
2491 for frame access when strict_p is false.
2493 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2495 Backport from trunk r213485, r213486, r213487.
2496 2014-08-01 Renlin Li <renlin.li@arm.com>
2497 Jiong Wang <jiong.wang@arm.com>
2499 * config/aarch64/aarch64.c (offset_7bit_signed_scaled_p): Rename to
2500 aarch64_offset_7bit_signed_scaled_p, remove static and use it.
2501 * config/aarch64/aarch64-protos.h (aarch64_offset_7bit_signed_scaled_p):
2502 Declaration.
2503 * config/aarch64/predicates.md (aarch64_mem_pair_offset): Define new
2504 predicate.
2505 * config/aarch64/aarch64.md (loadwb_pair, storewb_pair): Use
2506 aarch64_mem_pair_offset.
2508 2014-08-01 Jiong Wang <jiong.wang@arm.com>
2510 * config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Fix
2511 offset.
2512 (loadwb_pair<GPI:mode>_<P:mode>): Likewise.
2513 * config/aarch64/aarch64.c (aarch64_gen_loadwb_pair): Likewise.
2515 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2517 Backport from trunk r213379.
2518 2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
2520 * config/aarch64/aarch64-builtins.c
2521 (aarch64_gimple_fold_builtin): Don't fold reduction operations for
2522 BYTES_BIG_ENDIAN.
2524 2014-08-26 Yvan Roux <yvan.roux@linaro.org>
2526 Backport from trunk r213378.
2527 2014-07-31 James Greenhalgh <james.greenhalgh@arm.com>
2529 * config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Vary
2530 the generated mask based on BYTES_BIG_ENDIAN.
2531 (aarch64_simd_check_vect_par_cnst_half): New.
2532 * config/aarch64/aarch64-protos.h
2533 (aarch64_simd_check_vect_par_cnst_half): New.
2534 * config/aarch64/predicates.md (vect_par_cnst_hi_half): Refactor
2535 the check out to aarch64_simd_check_vect_par_cnst_half.
2536 (vect_par_cnst_lo_half): Likewise.
2537 * config/aarch64/aarch64-simd.md
2538 (aarch64_simd_move_hi_quad_<mode>): Always use vec_par_cnst_lo_half.
2539 (move_hi_quad_<mode>): Always generate a low mask.
2541 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
2543 Backport from trunk r212927, r213304.
2544 2014-07-30 Jiong Wang <jiong.wang@arm.com>
2546 * config/arm/arm.c (arm_get_frame_offsets): Adjust condition for
2547 Thumb2.
2549 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2551 * config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
2552 callee-saved registers are available for padding purpose
2553 and r3 is not mandatory, then prefer use those callee-saved
2554 instead of r3.
2556 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
2558 Backport from trunk r211717, r213692.
2559 2014-08-07 Kugan Vivekanandarajah <kuganv@linaro.org>
2561 * config/arm/arm.c (bdesc_2arg): Fix typo.
2562 (arm_atomic_assign_expand_fenv): Remove The default implementation.
2564 2014-06-17 Kugan Vivekanandarajah <kuganv@linaro.org>
2566 * config/arm/arm.c (arm_atomic_assign_expand_fenv): call
2567 default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
2568 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
2569 __builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
2570 * config/arm/vfp.md (set_fpscr): Make pattern conditional on
2571 TARGET_HARD_FLOAT.
2572 (get_fpscr) : Likewise.
2574 2014-08-22 Yvan Roux <yvan.roux@linaro.org>
2576 Backport from trunk r212989, r213628.
2577 2014-08-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2579 * convert.c (convert_to_integer): Guard transformation to lrint by
2580 -fno-math-errno.
2582 2014-07-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2584 PR middle-end/61876
2585 * convert.c (convert_to_integer): Do not convert BUILT_IN_ROUND and cast
2586 when flag_errno_math is on.
2588 2014-08-15 Yvan Roux <yvan.roux@linaro.org>
2590 * LINARO-VERSION: Bump version.
2592 2014-08-14 Yvan Roux <yvan.roux@linaro.org>
2594 GCC Linaro 4.9-2014.08 released.
2595 * LINARO-VERSION: Update.
2597 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2599 Backport from trunk r212912, r212913.
2600 2014-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2602 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
2603 (case UNSPEC): Handle UNSPEC_RBIT.
2605 2014-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2607 * config/aarch64/aarch64.md: Delete UNSPEC_CLS.
2608 (clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.
2610 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2612 Backport from trunk r213555.
2613 2014-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2615 PR target/61713
2616 * gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
2617 move to subtarget in serial version if result is ignored.
2619 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2621 Backport from trunk r213376.
2622 2014-07-31 Charles Baylis <charles.baylis@linaro.org>
2624 PR target/61948
2625 * config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
2626 constraints are satisfied.
2627 (<shift>di3_neon): Likewise.
2629 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2631 Backport from trunk r211270, r211271, r211273, r211275, r212943,
2632 r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
2633 r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
2634 r213000.
2635 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2637 * config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
2638 (aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.
2640 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2642 * config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
2643 (aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.
2645 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2647 * config/aarch64/aarch64.c (aarch64_restore_callee_saves)
2648 (aarch64_save_callee_saves): New parameter "skip_wb".
2649 (aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.
2651 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2653 * config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
2654 "wb_candidate2".
2655 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.
2657 2014-07-24 Jiong Wang <jiong.wang@arm.com>
2659 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
2660 subtract outgoing area size when restoring stack_pointer_rtx.
2662 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2664 * config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
2665 (aarch64_gen_loadwb_pair): New helper function.
2666 (aarch64_expand_epilogue): Simplify code using new helper functions.
2667 * config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.
2669 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2671 * config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
2672 (aarch64_gen_storewb_pair): New helper function.
2673 (aarch64_expand_prologue): Simplify code using new helper functions.
2674 * config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.
2676 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2678 * config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
2679 Rename to aarch64_save_callee_saves, remove restore code.
2680 (aarch64_restore_callee_saves): New function.
2682 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2684 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
2685 (aarch64_save_callee_saves): New function to handle reg save
2686 for both core and vectore regs.
2688 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2690 * config/aarch64/aarch64.c (aarch64_gen_load_pair)
2691 (aarch64_gen_store_pair): New helper function.
2692 (aarch64_save_or_restore_callee_save_registers)
2693 (aarch64_save_or_restore_fprs): Use new helper functions.
2695 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2697 * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
2698 (aarch64_save_or_restore_callee_save_registers)
2699 (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
2701 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2703 * config/aarch64/aarch64.c
2704 (aarch64_save_or_restore_callee_save_registers)
2705 (aarch64_save_or_restore_fprs): Hoist calculation of register rtx.
2707 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2709 * config/aarch64/aarch64.c
2710 (aarch64_save_or_restore_callee_save_registers)
2711 (aarch64_save_or_restore_fprs): Remove 'increment'.
2713 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2715 * config/aarch64/aarch64.c
2716 (aarch64_save_or_restore_callee_save_registers)
2717 (aarch64_save_or_restore_fprs): Use register offset in
2718 cfun->machine->frame.reg_offset.
2720 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2722 * config/aarch64/aarch64.c
2723 (aarch64_save_or_restore_callee_save_registers)
2724 (aarch64_save_or_restore_fprs): Remove base_rtx.
2726 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2728 * config/aarch64/aarch64.c
2729 (aarch64_save_or_restore_callee_save_registers): Rename 'offset'
2730 to 'start_offset'. Remove local variable 'start_offset'.
2732 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2734 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
2735 type to HOST_WIDE_INT.
2737 2014-07-23 Jiong Wang <jiong.wang@arm.com>
2739 * config/aarch64/aarch64.c (aarch64_expand_prologue)
2740 (aarch64_save_or_restore_fprs)
2741 (aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.
2743 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
2745 * config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
2746 frame_size.
2747 * config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
2748 aarch64_frame hard_fp_offset and frame_size.
2749 (aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
2750 frame_size; remove original_frame_size.
2751 (aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
2752 (aarch64_initial_elimination_offset): Remove frame_size and
2753 offset. Use aarch64_frame frame_size.
2755 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
2756 Jiong Wang <jiong.wang@arm.com>
2758 * config/aarch64/aarch64.c (aarch64_layout_frame): Correct
2759 initialization of R30 offset. Update offset. Iterate core
2760 regisers upto X30. Remove X29, X30 specific code.
2762 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
2763 Jiong Wang <jiong.wang@arm.com>
2765 * config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
2766 (aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
2767 (aarch64_register_saved_on_entry): Adjust test.
2769 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
2771 * config/aarch64/aarch64.h (machine_function): Move
2772 saved_varargs_size from here...
2773 (aarch64_frameGTY): ... to here.
2775 * config/aarch64/aarch64.c (aarch64_expand_prologue)
2776 (aarch64_expand_epilogue, aarch64_final_eh_return_addr)
2777 (aarch64_initial_elimination_offset)
2778 (aarch64_setup_incoming_varargs): Adjust location of
2779 saved_varargs_size.
2781 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2783 Backport from trunk r212753.
2784 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2786 * config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
2787 (aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
2789 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2791 Backport from trunk r212752.
2792 2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2794 * config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
2795 (vmlal_high_lane_s32): Likewise.
2796 (vmlal_high_lane_u16): Likewise.
2797 (vmlal_high_lane_u32): Likewise.
2798 (vmlsl_high_lane_s16): Likewise.
2799 (vmlsl_high_lane_s32): Likewise.
2800 (vmlsl_high_lane_u16): Likewise.
2801 (vmlsl_high_lane_u32): Likewise.
2803 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2805 Backport from trunk r212512.
2806 2014-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2808 * config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
2809 * config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
2810 * config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
2811 * config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
2812 * config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
2813 * config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
2814 * config/arm/cortex-r4.md (cortex_r4_alu): Likewise.
2816 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2818 Backport from trunk r212358.
2819 2014-07-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2821 * config/arm/arm.c (cortexa5_extra_costs): New table.
2822 (arm_cortex_a5_tune): Use cortexa5_extra_costs.
2824 2014-08-11 Yvan Roux <yvan.roux@linaro.org>
2826 Backport from trunk r212296.
2827 2014-07-04 Tom de Vries <tom@codesourcery.com>
2829 * config/aarch64/aarch64-simd.md
2830 (define_insn "vec_unpack_trunc_<mode>"): Fix constraint.
2832 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
2834 Backport from trunk r212142, r212225.
2835 2014-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2837 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
2838 variable i.
2840 2014-06-30 Alan Lawrence <alan.lawrence@arm.com>
2842 * config/aarch64/aarch64-simd.md (vec_perm): Enable for bigendian.
2843 * config/aarch64/aarch64.c (aarch64_expand_vec_perm): Remove assert
2844 against bigendian and adjust indices.
2846 2014-08-10 Yvan Roux <yvan.roux@linaro.org>
2848 Backport from trunk r211779.
2849 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2851 * config/arm/arm_neon.h (vadd_f32): Change #ifdef to __FAST_MATH.
2853 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
2855 Backport from trunk r211503.
2856 2014-06-12 Alan Lawrence <alan.lawrence@arm.com>
2858 * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64,
2859 vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, vcgez_u64,
2860 vcgezq_p8, vcgezq_u8, vcgezq_u16, vcgezq_u32, vcgezq_u64, vcgezd_u64,
2861 vcgt_p8, vcgtq_p8, vcgtz_p8, vcgtz_u8, vcgtz_u16, vcgtz_u32, vcgtz_u64,
2862 vcgtzq_p8, vcgtzq_u8, vcgtzq_u16, vcgtzq_u32, vcgtzq_u64, vcgtzd_u64,
2863 vcle_p8, vcleq_p8, vclez_p8, vclez_u64, vclezq_p8, vclezd_u64, vclt_p8,
2864 vcltq_p8, vcltz_p8, vcltzq_p8, vcltzd_u64): Remove functions as they are
2865 not in the spec.
2867 2014-07-30 Yvan Roux <yvan.roux@linaro.org>
2869 Backport from trunk r211140.
2870 2014-06-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
2872 * config/aarch64/aarch64.md (set_fpcr): Drop ISB after FPCR write.
2874 2014-07-29 Yvan Roux <yvan.roux@linaro.org>
2876 * LINARO-VERSION: Bump version.
2878 2014-07-24 Yvan Roux <yvan.roux@linaro.org>
2880 GCC Linaro 4.9-2014.07-1 released.
2881 * LINARO-VERSION: Update.
2883 2014-07-20 Yvan Roux <yvan.roux@linaro.org>
2885 Revert:
2886 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
2888 Backport from trunk r211129.
2889 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2891 PR target/61154
2892 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
2893 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
2894 with immediate_operand.
2896 2014-07-19 Yvan Roux <yvan.roux@linaro.org>
2898 * LINARO-VERSION: Bump version.
2900 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2902 GCC Linaro 4.9-2014.07 released.
2903 * LINARO-VERSION: Update.
2905 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2907 Backport from trunk r211887, r211899.
2908 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
2910 * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
2911 "yes" where needed.
2913 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com>
2915 * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
2916 vector registers.
2918 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2920 Backport from trunk r211440.
2921 2014-06-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2923 * config.gcc (aarch64*-*-*): Add arm_acle.h to extra headers.
2924 * Makefile.in (TEXI_GCC_FILES): Add aarch64-acle-intrinsics.texi to
2925 dependencies.
2926 * config/aarch64/aarch64-builtins.c (AARCH64_CRC32_BUILTINS): Define.
2927 (aarch64_crc_builtin_datum): New struct.
2928 (aarch64_crc_builtin_data): New.
2929 (aarch64_init_crc32_builtins): New function.
2930 (aarch64_init_builtins): Initialise CRC32 builtins when appropriate.
2931 (aarch64_crc32_expand_builtin): New.
2932 (aarch64_expand_builtin): Add CRC32 builtin expansion case.
2933 * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
2934 __ARM_FEATURE_CRC32 when appropriate.
2935 (TARGET_CRC32): Define.
2936 * config/aarch64/aarch64.md (UNSPEC_CRC32B, UNSPEC_CRC32H,
2937 UNSPEC_CRC32W, UNSPEC_CRC32X, UNSPEC_CRC32CB, UNSPEC_CRC32CH,
2938 UNSPEC_CRC32CW, UNSPEC_CRC32CX): New unspec values.
2939 (aarch64_<crc_variant>): New pattern.
2940 * config/aarch64/arm_acle.h: New file.
2941 * config/aarch64/iterators.md (CRC): New int iterator.
2942 (crc_variant, crc_mode): New int attributes.
2943 * doc/aarch64-acle-intrinsics.texi: New file.
2944 * doc/extend.texi (aarch64): Document aarch64 ACLE intrinsics.
2945 Include aarch64-acle-intrinsics.texi.
2947 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2949 Backport from trunk r211174.
2950 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
2952 * config/aarch64/aarch64-simd.md (aarch64_rev<REVERSE:rev-op><mode>):
2953 New pattern.
2954 * config/aarch64/aarch64.c (aarch64_evpc_rev): New function.
2955 (aarch64_expand_vec_perm_const_1): Add call to aarch64_evpc_rev.
2956 * config/aarch64/iterators.md (REVERSE): New iterator.
2957 (UNSPEC_REV64, UNSPEC_REV32, UNSPEC_REV16): New enum elements.
2958 (rev_op): New int_attribute.
2959 * config/aarch64/arm_neon.h (vrev16_p8, vrev16_s8, vrev16_u8,
2960 vrev16q_p8, vrev16q_s8, vrev16q_u8, vrev32_p8, vrev32_p16, vrev32_s8,
2961 vrev32_s16, vrev32_u8, vrev32_u16, vrev32q_p8, vrev32q_p16, vrev32q_s8,
2962 vrev32q_s16, vrev32q_u8, vrev32q_u16, vrev64_f32, vrev64_p8,
2963 vrev64_p16, vrev64_s8, vrev64_s16, vrev64_s32, vrev64_u8, vrev64_u16,
2964 vrev64_u32, vrev64q_f32, vrev64q_p8, vrev64q_p16, vrev64q_s8,
2965 vrev64q_s16, vrev64q_s32, vrev64q_u8, vrev64q_u16, vrev64q_u32):
2966 Replace temporary __asm__ with __builtin_shuffle.
2968 2014-07-17 Yvan Roux <yvan.roux@linaro.org>
2970 Backport from trunk r210216, r210218, r210219.
2971 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2973 * config/arm/arm_neon.h: Update comment.
2974 * config/arm/neon-docgen.ml: Delete.
2975 * config/arm/neon-gen.ml: Delete.
2976 * doc/arm-neon-intrinsics.texi: Update comment.
2978 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2980 * config/arm/arm_neon_builtins.def (vadd, vsub): Only define the v2sf
2981 and v4sf versions.
2982 (vand, vorr, veor, vorn, vbic): Remove.
2983 * config/arm/neon.md (neon_vadd, neon_vsub, neon_vadd_unspec): Adjust
2984 iterator.
2985 (neon_vsub_unspec): Likewise.
2986 (neon_vorr, neon_vand, neon_vbic, neon_veor, neon_vorn): Remove.
2988 2014-05-08 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
2990 * config/arm/arm_neon.h (vadd_s8): GNU C implementation
2991 (vadd_s16): Likewise.
2992 (vadd_s32): Likewise.
2993 (vadd_f32): Likewise.
2994 (vadd_u8): Likewise.
2995 (vadd_u16): Likewise.
2996 (vadd_u32): Likewise.
2997 (vadd_s64): Likewise.
2998 (vadd_u64): Likewise.
2999 (vaddq_s8): Likewise.
3000 (vaddq_s16): Likewise.
3001 (vaddq_s32): Likewise.
3002 (vaddq_s64): Likewise.
3003 (vaddq_f32): Likewise.
3004 (vaddq_u8): Likewise.
3005 (vaddq_u16): Likewise.
3006 (vaddq_u32): Likewise.
3007 (vaddq_u64): Likewise.
3008 (vmul_s8): Likewise.
3009 (vmul_s16): Likewise.
3010 (vmul_s32): Likewise.
3011 (vmul_f32): Likewise.
3012 (vmul_u8): Likewise.
3013 (vmul_u16): Likewise.
3014 (vmul_u32): Likewise.
3015 (vmul_p8): Likewise.
3016 (vmulq_s8): Likewise.
3017 (vmulq_s16): Likewise.
3018 (vmulq_s32): Likewise.
3019 (vmulq_f32): Likewise.
3020 (vmulq_u8): Likewise.
3021 (vmulq_u16): Likewise.
3022 (vmulq_u32): Likewise.
3023 (vsub_s8): Likewise.
3024 (vsub_s16): Likewise.
3025 (vsub_s32): Likewise.
3026 (vsub_f32): Likewise.
3027 (vsub_u8): Likewise.
3028 (vsub_u16): Likewise.
3029 (vsub_u32): Likewise.
3030 (vsub_s64): Likewise.
3031 (vsub_u64): Likewise.
3032 (vsubq_s8): Likewise.
3033 (vsubq_s16): Likewise.
3034 (vsubq_s32): Likewise.
3035 (vsubq_s64): Likewise.
3036 (vsubq_f32): Likewise.
3037 (vsubq_u8): Likewise.
3038 (vsubq_u16): Likewise.
3039 (vsubq_u32): Likewise.
3040 (vsubq_u64): Likewise.
3041 (vand_s8): Likewise.
3042 (vand_s16): Likewise.
3043 (vand_s32): Likewise.
3044 (vand_u8): Likewise.
3045 (vand_u16): Likewise.
3046 (vand_u32): Likewise.
3047 (vand_s64): Likewise.
3048 (vand_u64): Likewise.
3049 (vandq_s8): Likewise.
3050 (vandq_s16): Likewise.
3051 (vandq_s32): Likewise.
3052 (vandq_s64): Likewise.
3053 (vandq_u8): Likewise.
3054 (vandq_u16): Likewise.
3055 (vandq_u32): Likewise.
3056 (vandq_u64): Likewise.
3057 (vorr_s8): Likewise.
3058 (vorr_s16): Likewise.
3059 (vorr_s32): Likewise.
3060 (vorr_u8): Likewise.
3061 (vorr_u16): Likewise.
3062 (vorr_u32): Likewise.
3063 (vorr_s64): Likewise.
3064 (vorr_u64): Likewise.
3065 (vorrq_s8): Likewise.
3066 (vorrq_s16): Likewise.
3067 (vorrq_s32): Likewise.
3068 (vorrq_s64): Likewise.
3069 (vorrq_u8): Likewise.
3070 (vorrq_u16): Likewise.
3071 (vorrq_u32): Likewise.
3072 (vorrq_u64): Likewise.
3073 (veor_s8): Likewise.
3074 (veor_s16): Likewise.
3075 (veor_s32): Likewise.
3076 (veor_u8): Likewise.
3077 (veor_u16): Likewise.
3078 (veor_u32): Likewise.
3079 (veor_s64): Likewise.
3080 (veor_u64): Likewise.
3081 (veorq_s8): Likewise.
3082 (veorq_s16): Likewise.
3083 (veorq_s32): Likewise.
3084 (veorq_s64): Likewise.
3085 (veorq_u8): Likewise.
3086 (veorq_u16): Likewise.
3087 (veorq_u32): Likewise.
3088 (veorq_u64): Likewise.
3089 (vbic_s8): Likewise.
3090 (vbic_s16): Likewise.
3091 (vbic_s32): Likewise.
3092 (vbic_u8): Likewise.
3093 (vbic_u16): Likewise.
3094 (vbic_u32): Likewise.
3095 (vbic_s64): Likewise.
3096 (vbic_u64): Likewise.
3097 (vbicq_s8): Likewise.
3098 (vbicq_s16): Likewise.
3099 (vbicq_s32): Likewise.
3100 (vbicq_s64): Likewise.
3101 (vbicq_u8): Likewise.
3102 (vbicq_u16): Likewise.
3103 (vbicq_u32): Likewise.
3104 (vbicq_u64): Likewise.
3105 (vorn_s8): Likewise.
3106 (vorn_s16): Likewise.
3107 (vorn_s32): Likewise.
3108 (vorn_u8): Likewise.
3109 (vorn_u16): Likewise.
3110 (vorn_u32): Likewise.
3111 (vorn_s64): Likewise.
3112 (vorn_u64): Likewise.
3113 (vornq_s8): Likewise.
3114 (vornq_s16): Likewise.
3115 (vornq_s32): Likewise.
3116 (vornq_s64): Likewise.
3117 (vornq_u8): Likewise.
3118 (vornq_u16): Likewise.
3119 (vornq_u32): Likewise.
3120 (vornq_u64): Likewise.
3122 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3124 Backport from trunk r210151.
3125 2014-05-07 Alan Lawrence <alan.lawrence@arm.com>
3127 * config/aarch64/arm_neon.h (vtrn1_f32, vtrn1_p8, vtrn1_p16, vtrn1_s8,
3128 vtrn1_s16, vtrn1_s32, vtrn1_u8, vtrn1_u16, vtrn1_u32, vtrn1q_f32,
3129 vtrn1q_f64, vtrn1q_p8, vtrn1q_p16, vtrn1q_s8, vtrn1q_s16, vtrn1q_s32,
3130 vtrn1q_s64, vtrn1q_u8, vtrn1q_u16, vtrn1q_u32, vtrn1q_u64, vtrn2_f32,
3131 vtrn2_p8, vtrn2_p16, vtrn2_s8, vtrn2_s16, vtrn2_s32, vtrn2_u8,
3132 vtrn2_u16, vtrn2_u32, vtrn2q_f32, vtrn2q_f64, vtrn2q_p8, vtrn2q_p16,
3133 vtrn2q_s8, vtrn2q_s16, vtrn2q_s32, vtrn2q_s64, vtrn2q_u8, vtrn2q_u16,
3134 vtrn2q_u32, vtrn2q_u64): Replace temporary asm with __builtin_shuffle.
3136 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3138 Backport from trunk r209794.
3139 2014-04-25 Marek Polacek <polacek@redhat.com>
3141 PR c/60114
3142 * c-parser.c (c_parser_initelt): Pass input_location to
3143 process_init_element.
3144 (c_parser_initval): Pass loc to process_init_element.
3145 * c-tree.h (process_init_element): Adjust declaration.
3146 * c-typeck.c (push_init_level): Pass input_location to
3147 process_init_element.
3148 (pop_init_level): Likewise.
3149 (set_designator): Likewise.
3150 (output_init_element): Add location_t parameter. Pass loc to
3151 digest_init.
3152 (output_pending_init_elements): Pass input_location to
3153 output_init_element.
3154 (process_init_element): Add location_t parameter. Pass loc to
3155 output_init_element.
3157 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3159 Backport from trunk r211771.
3160 2014-06-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3162 * genattrtab.c (n_bypassed): New variable.
3163 (process_bypasses): Initialise n_bypassed.
3164 Count number of bypassed reservations.
3165 (make_automaton_attrs): Allocate space for bypassed reservations
3166 rather than number of bypasses.
3168 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3170 Backport from trunk r210861.
3171 2014-05-23 Jiong Wang <jiong.wang@arm.com>
3173 * config/aarch64/predicates.md (aarch64_call_insn_operand): New
3174 predicate.
3175 * config/aarch64/constraints.md ("Ucs", "Usf"): New constraints.
3176 * config/aarch64/aarch64.md (*sibcall_insn, *sibcall_value_insn):
3177 Adjust for tailcalling through registers.
3178 * config/aarch64/aarch64.h (enum reg_class): New caller save
3179 register class.
3180 (REG_CLASS_NAMES): Likewise.
3181 (REG_CLASS_CONTENTS): Likewise.
3182 * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall):
3183 Allow tailcalling without decls.
3185 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3187 Backport from trunk r211314.
3188 2014-06-06 James Greenhalgh <james.greenhalgh@arm.com>
3190 * config/aarch64/aarch64-protos.h (aarch64_expand_movmem): New.
3191 * config/aarch64/aarch64.c (aarch64_move_pointer): New.
3192 (aarch64_progress_pointer): Likewise.
3193 (aarch64_copy_one_part_and_move_pointers): Likewise.
3194 (aarch64_expand_movmen): Likewise.
3195 * config/aarch64/aarch64.h (MOVE_RATIO): Set low.
3196 * config/aarch64/aarch64.md (movmem<mode>): New.
3198 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3200 Backport from trunk r211185, 211186.
3201 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
3203 * gcc/config/aarch64/aarch64-builtins.c
3204 (aarch64_types_binop_uus_qualifiers,
3205 aarch64_types_shift_to_unsigned_qualifiers,
3206 aarch64_types_unsigned_shiftacc_qualifiers): Define.
3207 * gcc/config/aarch64/aarch64-simd-builtins.def (uqshl, uqrshl, uqadd,
3208 uqsub, usqadd, usra_n, ursra_n, uqshrn_n, uqrshrn_n, usri_n, usli_n,
3209 sqshlu_n, uqshl_n): Update qualifiers.
3210 * gcc/config/aarch64/arm_neon.h (vqadd_u8, vqadd_u16, vqadd_u32,
3211 vqadd_u64, vqaddq_u8, vqaddq_u16, vqaddq_u32, vqaddq_u64, vqsub_u8,
3212 vqsub_u16, vqsub_u32, vqsub_u64, vqsubq_u8, vqsubq_u16, vqsubq_u32,
3213 vqsubq_u64, vqaddb_u8, vqaddh_u16, vqadds_u32, vqaddd_u64, vqrshl_u8,
3214 vqrshl_u16, vqrshl_u32, vqrshl_u64, vqrshlq_u8, vqrshlq_u16,
3215 vqrshlq_u32, vqrshlq_u64, vqrshlb_u8, vqrshlh_u16, vqrshls_u32,
3216 vqrshld_u64, vqrshrn_n_u16, vqrshrn_n_u32, vqrshrn_n_u64,
3217 vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqshl_u8, vqshl_u16,
3218 vqshl_u32, vqshl_u64, vqshlq_u8, vqshlq_u16, vqshlq_u32, vqshlq_u64,
3219 vqshlb_u8, vqshlh_u16, vqshls_u32, vqshld_u64, vqshl_n_u8, vqshl_n_u16,
3220 vqshl_n_u32, vqshl_n_u64, vqshlq_n_u8, vqshlq_n_u16, vqshlq_n_u32,
3221 vqshlq_n_u64, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshld_n_u64,
3222 vqshlu_n_s8, vqshlu_n_s16, vqshlu_n_s32, vqshlu_n_s64, vqshluq_n_s8,
3223 vqshluq_n_s16, vqshluq_n_s32, vqshluq_n_s64, vqshlub_n_s8,
3224 vqshluh_n_s16, vqshlus_n_s32, vqshlud_n_s64, vqshrn_n_u16,
3225 vqshrn_n_u32, vqshrn_n_u64, vqshrnh_n_u16, vqshrns_n_u32,
3226 vqshrnd_n_u64, vqsubb_u8, vqsubh_u16, vqsubs_u32, vqsubd_u64,
3227 vrsra_n_u8, vrsra_n_u16, vrsra_n_u32, vrsra_n_u64, vrsraq_n_u8,
3228 vrsraq_n_u16, vrsraq_n_u32, vrsraq_n_u64, vrsrad_n_u64, vsli_n_u8,
3229 vsli_n_u16, vsli_n_u32,vsli_n_u64, vsliq_n_u8, vsliq_n_u16,
3230 vsliq_n_u32, vsliq_n_u64, vslid_n_u64, vsqadd_u8, vsqadd_u16,
3231 vsqadd_u32, vsqadd_u64, vsqaddq_u8, vsqaddq_u16, vsqaddq_u32,
3232 vsqaddq_u64, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vsqaddd_u64,
3233 vsra_n_u8, vsra_n_u16, vsra_n_u32, vsra_n_u64, vsraq_n_u8,
3234 vsraq_n_u16, vsraq_n_u32, vsraq_n_u64, vsrad_n_u64, vsri_n_u8,
3235 vsri_n_u16, vsri_n_u32, vsri_n_u64, vsriq_n_u8, vsriq_n_u16,
3236 vsriq_n_u32, vsriq_n_u64, vsrid_n_u64): Remove casts.
3238 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
3240 * gcc/config/aarch64/aarch64-builtins.c
3241 (aarch64_types_binop_ssu_qualifiers): New static data.
3242 (TYPES_BINOP_SSU): Define.
3243 * gcc/config/aarch64/aarch64-simd-builtins.def (suqadd, ushl, urshl,
3244 urshr_n, ushll_n): Use appropriate unsigned qualifiers. 47
3245 * gcc/config/aarch64/arm_neon.h (vrshl_u8, vrshl_u16, vrshl_u32,
3246 vrshl_u64, vrshlq_u8, vrshlq_u16, vrshlq_u32, vrshlq_u64, vrshld_u64,
3247 vrshr_n_u8, vrshr_n_u16, vrshr_n_u32, vrshr_n_u64, vrshrq_n_u8, 50
3248 vrshrq_n_u16, vrshrq_n_u32, vrshrq_n_u64, vrshrd_n_u64, vshll_n_u8,
3249 vshll_n_u16, vshll_n_u32, vuqadd_s8, vuqadd_s16, vuqadd_s32, 52
3250 vuqadd_s64, vuqaddq_s8, vuqaddq_s16, vuqaddq_s32, vuqaddq_s64, 53
3251 vuqaddb_s8, vuqaddh_s16, vuqadds_s32, vuqaddd_s64): Add signedness
3252 suffix to builtin function name, remove cast. 55
3253 (vshl_s8, vshl_s16, vshl_s32, vshl_s64, vshl_u8, vshl_u16, vshl_u32,
3254 vshl_u64, vshlq_s8, vshlq_s16, vshlq_s32, vshlq_s64, vshlq_u8, 57
3255 vshlq_u16, vshlq_u32, vshlq_u64, vshld_s64, vshld_u64): Remove cast.
3257 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3259 Backport from trunk r211408, 211416.
3260 2014-06-10 Marcus Shawcroft <marcus.shawcroft@arm.com>
3262 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Fix
3263 REG_CFA_RESTORE mode.
3265 2014-06-10 Jiong Wang <jiong.wang@arm.com>
3267 * config/aarch64/aarch64.c (aarch64_save_or_restore_fprs)
3268 (aarch64_save_or_restore_callee_save_registers): Fix layout.
3270 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3272 Backport from trunk r211418.
3273 2014-06-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3275 * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>):
3276 Change second alternative type to f_mcr.
3277 * config/aarch64/aarch64.md (*movsi_aarch64): Change 11th
3278 and 12th alternatives' types to f_mcr and f_mrc.
3279 (*movdi_aarch64): Same for 12th and 13th alternatives.
3280 (*movsf_aarch64): Change 9th alternatives' type to mov_reg.
3281 (aarch64_movtilow_tilow): Change type to fmov.
3283 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3285 Backport from trunk r211371.
3286 2014-06-09 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3288 * config/arm/arm-modes.def: Remove XFmode.
3290 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3292 Backport from trunk r211268.
3293 2014-06-05 Marcus Shawcroft <marcus.shawcroft@arm.com>
3295 * config/aarch64/aarch64.c (aarch64_expand_prologue): Update stack
3296 layout comment.
3298 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3300 Backport from trunk r211129.
3301 2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3303 PR target/61154
3304 * config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
3305 * config/arm/arm.md (mov64 splitter): Replace const_double_operand
3306 with immediate_operand.
3308 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3310 Backport from trunk r211073.
3311 2014-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3313 * config/arm/thumb2.md (*thumb2_movhi_insn): Set type of movw
3314 to mov_imm.
3315 * config/arm/vfp.md (*thumb2_movsi_vfp): Likewise.
3317 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3319 Backport from trunk r211050.
3320 2014-05-29 Richard Earnshaw <rearnsha@arm.com>
3321 Richard Sandiford <rdsandiford@googlemail.com>
3323 * arm/iterators.md (shiftable_ops): New code iterator.
3324 (t2_binop0, arith_shift_insn): New code attributes.
3325 * arm/predicates.md (shift_nomul_operator): New predicate.
3326 * arm/arm.md (insn_enabled): Delete.
3327 (enabled): Remove insn_enabled test.
3328 (*arith_shiftsi): Delete. Replace with ...
3329 (*<arith_shift_insn>_multsi): ... new pattern.
3330 (*<arith_shift_insn>_shiftsi): ... new pattern.
3331 * config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
3333 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3335 Backport from trunk r210996.
3336 2014-05-27 Andrew Pinski <apinski@cavium.com>
3338 * config/aarch64/aarch64.md (stack_protect_set_<mode>):
3339 Use <w> for the register in assembly template.
3340 (stack_protect_test): Use the mode of operands[0] for the
3341 result.
3342 (stack_protect_test_<mode>): Use <w> for the register
3343 in assembly template.
3345 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3347 Backport from trunk r210967.
3348 2014-05-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3350 * config/arm/neon.md (neon_bswap<mode>): New pattern.
3351 * config/arm/arm.c (neon_itype): Add NEON_BSWAP.
3352 (arm_init_neon_builtins): Handle NEON_BSWAP.
3353 Define required type nodes.
3354 (arm_expand_neon_builtin): Handle NEON_BSWAP.
3355 (arm_builtin_vectorized_function): Handle BUILTIN_BSWAP builtins.
3356 * config/arm/arm_neon_builtins.def (bswap): Define builtins.
3357 * config/arm/iterators.md (VDQHSD): New mode iterator.
3359 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3361 Backport from trunk r210471.
3362 2014-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3364 * config/arm/arm.c (arm_option_override): Use the SCHED_PRESSURE_MODEL
3365 enum name for PARAM_SCHED_PRESSURE_ALGORITHM.
3367 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3369 Backport from trunk r210369.
3370 2014-05-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3372 * config/arm/arm.c (neon_itype): Remove NEON_RESULTPAIR.
3373 (arm_init_neon_builtins): Remove handling of NEON_RESULTPAIR.
3374 Remove associated type declarations and initialisations.
3375 (arm_expand_neon_builtin): Likewise.
3376 (neon_emit_pair_result_insn): Delete.
3377 * config/arm/arm_neon_builtins (vtrn, vzip, vuzp): Delete.
3378 * config/arm/neon.md (neon_vtrn<mode>): Delete.
3379 (neon_vzip<mode>): Likewise.
3380 (neon_vuzp<mode>): Likewise.
3382 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3384 Backport from trunk r211058, 211177.
3385 2014-05-29 Alan Lawrence <alan.lawrence@arm.com>
3387 * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers,
3388 TYPES_BINOPV): New static data.
3389 * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): New builtin.
3390 * config/aarch64/aarch64-simd.md (aarch64_ext, aarch64_im_lane_boundsi):
3391 New patterns.
3392 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const_1): Match
3393 patterns for EXT.
3394 (aarch64_evpc_ext): New function.
3396 * config/aarch64/iterators.md (UNSPEC_EXT): New enum element.
3398 * config/aarch64/arm_neon.h (vext_f32, vext_f64, vext_p8, vext_p16,
3399 vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32,
3400 vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8,
3401 vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32,
3402 vextq_u64): Replace __asm with __builtin_shuffle and im_lane_boundsi.
3404 2014-06-03 Alan Lawrence <alan.lawrence@arm.com>
3406 * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle
3407 location == 0.
3409 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3411 Backport from trunk r209797.
3412 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3414 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p):
3415 Use HOST_WIDE_INT_C for mask literal.
3416 (aarch_rev16_shleft_mask_imm_p): Likewise.
3418 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3420 Backport from trunk r211148.
3421 2014-06-02 Andrew Pinski <apinski@cavium.com>
3423 * config/aarch64/aarch64-linux.h (GLIBC_DYNAMIC_LINKER):
3424 /lib/ld-linux32-aarch64.so.1 is used for ILP32.
3425 (LINUX_TARGET_LINK_SPEC): Update linker script for ILP32.
3426 file whose name depends on -mabi= and -mbig-endian.
3427 * config/aarch64/t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle LP64
3428 better and handle ilp32 too.
3429 (MULTILIB_OPTIONS): Delete.
3430 (MULTILIB_DIRNAMES): Delete.
3432 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3434 Backport from trunk r210828, r211103.
3435 2014-05-31 Kugan Vivekanandarajah <kuganv@linaro.org>
3437 * config/arm/arm.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New define.
3438 (arm_builtins) : Add ARM_BUILTIN_GET_FPSCR and ARM_BUILTIN_SET_FPSCR.
3439 (bdesc_2arg) : Add description for builtins __builtins_arm_set_fpscr
3440 and __builtins_arm_get_fpscr.
3441 (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
3442 __builtins_arm_get_fpscr.
3443 (arm_expand_builtin) : Expand builtins __builtins_arm_set_fpscr and
3444 __builtins_arm_ldfpscr.
3445 (arm_atomic_assign_expand_fenv): New function.
3446 * config/arm/vfp.md (set_fpscr): New pattern.
3447 (get_fpscr) : Likewise.
3448 * config/arm/unspecs.md (unspecv): Add VUNSPEC_GET_FPSCR and
3449 VUNSPEC_SET_FPSCR.
3450 * doc/extend.texi (AARCH64 Built-in Functions) : Document
3451 __builtins_arm_set_fpscr, __builtins_arm_get_fpscr.
3453 2014-05-23 Kugan Vivekanandarajah <kuganv@linaro.org>
3455 * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
3456 define.
3457 * config/aarch64/aarch64-protos.h (aarch64_atomic_assign_expand_fenv):
3458 New function declaration.
3459 * config/aarch64/aarch64-builtins.c (aarch64_builtins) : Add
3460 AARCH64_BUILTIN_GET_FPCR, AARCH64_BUILTIN_SET_FPCR.
3461 AARCH64_BUILTIN_GET_FPSR and AARCH64_BUILTIN_SET_FPSR.
3462 (aarch64_init_builtins) : Initialize builtins
3463 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
3464 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
3465 (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_set_fpcr
3466 __builtins_aarch64_get_fpcr, __builtins_aarch64_get_fpsr,
3467 and __builtins_aarch64_set_fpsr.
3468 (aarch64_atomic_assign_expand_fenv): New function.
3469 * config/aarch64/aarch64.md (set_fpcr): New pattern.
3470 (get_fpcr) : Likewise.
3471 (set_fpsr) : Likewise.
3472 (get_fpsr) : Likewise.
3473 (unspecv): Add UNSPECV_GET_FPCR and UNSPECV_SET_FPCR, UNSPECV_GET_FPSR
3474 and UNSPECV_SET_FPSR.
3475 * doc/extend.texi (AARCH64 Built-in Functions) : Document
3476 __builtins_aarch64_set_fpcr, __builtins_aarch64_get_fpcr.
3477 __builtins_aarch64_set_fpsr and __builtins_aarch64_get_fpsr.
3479 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3481 Backport from trunk r210355.
3482 2014-05-13 Ian Bolton <ian.bolton@arm.com>
3484 * config/aarch64/aarch64-protos.h
3485 (aarch64_hard_regno_caller_save_mode): New prototype.
3486 * config/aarch64/aarch64.c (aarch64_hard_regno_caller_save_mode):
3487 New function.
3488 * config/aarch64/aarch64.h (HARD_REGNO_CALLER_SAVE_MODE): New macro.
3490 2014-07-16 Yvan Roux <yvan.roux@linaro.org>
3492 Backport from trunk r209943.
3493 2014-04-30 Alan Lawrence <alan.lawrence@arm.com>
3495 * config/aarch64/arm_neon.h (vuzp1_f32, vuzp1_p8, vuzp1_p16, vuzp1_s8,
3496 vuzp1_s16, vuzp1_s32, vuzp1_u8, vuzp1_u16, vuzp1_u32, vuzp1q_f32,
3497 vuzp1q_f64, vuzp1q_p8, vuzp1q_p16, vuzp1q_s8, vuzp1q_s16, vuzp1q_s32,
3498 vuzp1q_s64, vuzp1q_u8, vuzp1q_u16, vuzp1q_u32, vuzp1q_u64, vuzp2_f32,
3499 vuzp2_p8, vuzp2_p16, vuzp2_s8, vuzp2_s16, vuzp2_s32, vuzp2_u8,
3500 vuzp2_u16, vuzp2_u32, vuzp2q_f32, vuzp2q_f64, vuzp2q_p8, vuzp2q_p16,
3501 vuzp2q_s8, vuzp2q_s16, vuzp2q_s32, vuzp2q_s64, vuzp2q_u8, vuzp2q_u16,
3502 vuzp2q_u32, vuzp2q_u64): Replace temporary asm with __builtin_shuffle.
3504 2014-06-26 Yvan Roux <yvan.roux@linaro.org>
3506 * LINARO-VERSION: Bump version.
3508 2014-06-25 Yvan Roux <yvan.roux@linaro.org>
3510 GCC Linaro 4.9-2014.06-1 released.
3511 * LINARO-VERSION: Update.
3513 2014-06-24 Yvan Roux <yvan.roux@linaro.org>
3515 Revert:
3516 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3518 Backport from trunk r209643.
3519 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3521 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
3523 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
3525 Backport from trunk r210493, 210494, 210495, 210496, 210497, 210498,
3526 210499, 210500, 210501, 210502, 210503, 210504, 210505, 210506, 210507,
3527 210508, 210509, 210510, 210512, 211205, 211206.
3528 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3530 * config/aarch64/aarch64-protos.h (scale_addr_mode_cost): New.
3531 (cpu_addrcost_table): Use it.
3532 * config/aarch64/aarch64.c (generic_addrcost_table): Initialize it.
3533 (aarch64_address_cost): Rewrite using aarch64_classify_address,
3534 move it.
3536 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3538 * config/aarch64/aarch64.c (cortexa57_addrcost_table): New.
3539 (cortexa57_vector_cost): Likewise.
3540 (cortexa57_tunings): Use them.
3542 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3544 * config/aarch64/aarch64.c (aarch64_rtx_costs_wrapper): New.
3545 (TARGET_RTX_COSTS): Call it.
3547 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3548 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3550 * config/aarch64/aarch64.c (aarch64_build_constant): Conditionally
3551 emit instructions, return number of instructions which would
3552 be emitted.
3553 (aarch64_add_constant): Update call to aarch64_build_constant.
3554 (aarch64_output_mi_thunk): Likewise.
3555 (aarch64_rtx_costs): Estimate cost of a CONST_INT, cost
3556 a CONST_DOUBLE.
3558 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3559 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3561 * config/aarch64/aarch64.c (aarch64_strip_shift_or_extend): Rename
3562 to...
3563 (aarch64_strip_extend): ...this, don't strip shifts, check RTX is
3564 well formed.
3565 (aarch64_rtx_mult_cost): New.
3566 (aarch64_rtx_costs): Use it, refactor as appropriate.
3568 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3570 * config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
3572 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3573 Philip Tomsich <philipp.tomsich@theobroma-systems.com>
3575 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
3576 for SET RTX.
3578 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3579 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3581 * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
3582 costs when costing loads and stores to memory.
3584 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3585 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3587 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve cost for
3588 logical operations.
3590 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3591 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3593 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost
3594 ZERO_EXTEND and SIGN_EXTEND better.
3596 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3597 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3599 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
3600 rotates and shifts.
3602 2014-03-16 James Greenhalgh <james.greenhalgh@arm.com>
3603 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3605 * config/aarch64/aarch64.c (aarch64_rtx_arith_op_extract_p): New.
3606 (aarch64_rtx_costs): Improve costs for SIGN/ZERO_EXTRACT.
3608 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3609 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3611 * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costs for
3612 DIV/MOD.
3614 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3615 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3617 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost comparison
3618 operators.
3620 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3621 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3623 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost FMA,
3624 FLOAT_EXTEND, FLOAT_TRUNCATE, ABS, SMAX, and SMIN.
3626 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3627 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
3629 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost TRUNCATE.
3631 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3633 * config/aarch64/aarch64.c (aarch64_rtx_costs): Cost SYMBOL_REF,
3634 HIGH, LO_SUM.
3636 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3638 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle the case
3639 where we were unable to cost an RTX.
3641 2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
3643 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.
3645 2014-06-03 Andrew Pinski <apinski@cavium.com>
3647 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): New function.
3648 (aarch64_rtx_costs): Use aarch64_if_then_else_costs.
3650 2014-06-03 Andrew Pinski <apinski@cavium.com>
3652 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Allow non
3653 comparisons for OP0.
3655 2014-06-13 Yvan Roux <yvan.roux@linaro.org>
3657 * LINARO-VERSION: Bump version.
3659 2014-06-12 Yvan Roux <yvan.roux@linaro.org>
3661 GCC Linaro 4.9-2014.06 released.
3662 * LINARO-VERSION: Update.
3664 2014-06-04 Yvan Roux <yvan.roux@linaro.org>
3666 Backport from trunk r211211.
3667 2014-06-04 Bin Cheng <bin.cheng@arm.com>
3669 * config/aarch64/aarch64.c (aarch64_classify_address)
3670 (aarch64_legitimize_reload_address): Support full addressing modes
3671 for vector modes.
3672 * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
3673 (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax predicates.
3675 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3677 Backport from trunk r209906.
3678 2014-04-29 Alan Lawrence <alan.lawrence@arm.com>
3680 * config/aarch64/arm_neon.h (vzip1_f32, vzip1_p8, vzip1_p16, vzip1_s8,
3681 vzip1_s16, vzip1_s32, vzip1_u8, vzip1_u16, vzip1_u32, vzip1q_f32,
3682 vzip1q_f64, vzip1q_p8, vzip1q_p16, vzip1q_s8, vzip1q_s16, vzip1q_s32,
3683 vzip1q_s64, vzip1q_u8, vzip1q_u16, vzip1q_u32, vzip1q_u64, vzip2_f32,
3684 vzip2_p8, vzip2_p16, vzip2_s8, vzip2_s16, vzip2_s32, vzip2_u8,
3685 vzip2_u16, vzip2_u32, vzip2q_f32, vzip2q_f64, vzip2q_p8, vzip2q_p16,
3686 vzip2q_s8, vzip2q_s16, vzip2q_s32, vzip2q_s64, vzip2q_u8, vzip2q_u16,
3687 vzip2q_u32, vzip2q_u64): Replace inline __asm__ with __builtin_shuffle.
3689 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3691 Backport from trunk r209897.
3692 2014-04-29 James Greenhalgh <james.greenhalgh@arm.com>
3694 * calls.c (initialize_argument_information): Always treat
3695 PUSH_ARGS_REVERSED as 1, simplify code accordingly.
3696 (expand_call): Likewise.
3697 (emit_library_call_calue_1): Likewise.
3698 * expr.c (PUSH_ARGS_REVERSED): Do not define.
3699 (emit_push_insn): Always treat PUSH_ARGS_REVERSED as 1, simplify
3700 code accordingly.
3702 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3704 Backport from trunk r209880.
3705 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
3707 * config/aarch64/aarch64-builtins.c
3708 (aarch64_types_storestruct_lane_qualifiers): New.
3709 (TYPES_STORESTRUCT_LANE): Likewise.
3710 * config/aarch64/aarch64-simd-builtins.def (st2_lane): New.
3711 (st3_lane): Likewise.
3712 (st4_lane): Likewise.
3713 * config/aarch64/aarch64-simd.md (vec_store_lanesoi_lane<mode>): New.
3714 (vec_store_lanesci_lane<mode>): Likewise.
3715 (vec_store_lanesxi_lane<mode>): Likewise.
3716 (aarch64_st2_lane<VQ:mode>): Likewise.
3717 (aarch64_st3_lane<VQ:mode>): Likewise.
3718 (aarch64_st4_lane<VQ:mode>): Likewise.
3719 * config/aarch64/aarch64.md (unspec): Add UNSPEC_ST{2,3,4}_LANE.
3720 * config/aarch64/arm_neon.h
3721 (__ST2_LANE_FUNC): Rewrite using builtins, update use points to
3722 use new macro arguments.
3723 (__ST3_LANE_FUNC): Likewise.
3724 (__ST4_LANE_FUNC): Likewise.
3725 * config/aarch64/iterators.md (V_TWO_ELEM): New.
3726 (V_THREE_ELEM): Likewise.
3727 (V_FOUR_ELEM): Likewise.
3729 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3731 Backport from trunk r209878.
3732 2014-04-28 James Greenhalgh <james.greenhalgh@arm.com>
3734 * config/aarch64/aarch64-protos.h (aarch64_modes_tieable_p): New.
3735 * config/aarch64/aarch64.c
3736 (aarch64_cannot_change_mode_class): Weaken conditions.
3737 (aarch64_modes_tieable_p): New.
3738 * config/aarch64/aarch64.h (MODES_TIEABLE_P): Use it.
3740 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3742 Backport from trunk r209808.
3743 2014-04-25 Jiong Wang <jiong.wang@arm.com>
3745 * config/arm/predicates.md (call_insn_operand): Add long_call check.
3746 * config/arm/arm.md (sibcall, sibcall_value): Force the address to
3747 reg for long_call.
3748 * config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
3749 restriction.
3751 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3753 Backport from trunk r209806.
3754 2014-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3756 * config/arm/arm.c (arm_cortex_a8_tune): Initialise
3757 T16-related fields.
3759 2014-05-25 Yvan Roux <yvan.roux@linaro.org>
3761 Backport from trunk r209742, 209749.
3762 2014-04-24 Alan Lawrence <alan.lawrence@arm.com>
3764 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Enable for bigendian.
3766 2014-04-24 Tejas Belagod <tejas.belagod@arm.com>
3768 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Reverse order of elements
3769 for big-endian.
3771 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3773 Backport from trunk r209736.
3774 2014-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3776 * config/aarch64/aarch64-builtins.c
3777 (aarch64_builtin_vectorized_function): Handle BUILT_IN_BSWAP16,
3778 BUILT_IN_BSWAP32, BUILT_IN_BSWAP64.
3779 * config/aarch64/aarch64-simd.md (bswap<mode>): New pattern.
3780 * config/aarch64/aarch64-simd-builtins.def: Define vector bswap
3781 builtins.
3782 * config/aarch64/iterator.md (VDQHSD): New mode iterator.
3783 (Vrevsuff): New mode attribute.
3785 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3787 Backport from trunk r209712.
3788 2014-04-23 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>
3790 * config/aarch64/aarch64.md (stack_protect_set, stack_protect_test)
3791 (stack_protect_set_<mode>, stack_protect_test_<mode>): Add
3792 machine descriptions for Stack Smashing Protector.
3794 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3796 Backport from trunk r209711.
3797 2014-04-23 Richard Earnshaw <rearnsha@arm.com>
3799 * aarch64.md (<optab>_rol<mode>3): New pattern.
3800 (<optab>_rolsi3_uxtw): Likewise.
3801 * aarch64.c (aarch64_strip_shift): Handle ROTATE and ROTATERT.
3803 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3805 Backport from trunk r209710.
3806 2014-04-23 James Greenhalgh <james.greenhalgh@arm.com>
3808 * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
3809 (arm_cortex_a12_tune): Likewise.
3811 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3813 Backport from trunk r209706.
3814 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3816 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
3818 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3820 Backport from trunk r209701, 209702, 209703, 209704, 209705.
3821 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3823 * config/arm/arm.md (arm_rev16si2): New pattern.
3824 (arm_rev16si2_alt): Likewise.
3825 * config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.
3827 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3828 * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
3829 (rev16<mode>2_alt): Likewise.
3830 * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
3831 * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
3832 (aarch_rev16_shleft_mask_imm_p): Likewise.
3833 (aarch_rev16_p_1): Likewise.
3834 (aarch_rev16_p): Likewise.
3835 * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
3836 (aarch_rev16_shright_mask_imm_p): Likewise.
3837 (aarch_rev16_shleft_mask_imm_p): Likewise.
3839 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3841 * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
3842 * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
3843 rev cost.
3844 (cortex_a53_extra_costs): Likewise.
3845 (cortex_a57_extra_costs): Likewise.
3846 * config/arm/arm.c (cortexa9_extra_costs): Likewise.
3847 (cortexa7_extra_costs): Likewise.
3848 (cortexa8_extra_costs): Likewise.
3849 (cortexa12_extra_costs): Likewise.
3850 (cortexa15_extra_costs): Likewise.
3851 (v7m_extra_costs): Likewise.
3852 (arm_new_rtx_costs): Handle BSWAP.
3854 2013-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3856 * config/arm/arm.c (cortexa8_extra_costs): New table.
3857 (arm_cortex_a8_tune): New tuning struct.
3858 * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.
3860 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3862 * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.
3864 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3866 Backport from trunk r209659.
3867 2014-04-22 Richard Henderson <rth@redhat.com>
3869 * config/aarch64/aarch64 (addti3, subti3): New expanders.
3870 (add<GPI>3_compare0): Remove leading * from name.
3871 (add<GPI>3_carryin): Likewise.
3872 (sub<GPI>3_compare0): Likewise.
3873 (sub<GPI>3_carryin): Likewise.
3874 (<su_optab>mulditi3): New expander.
3875 (multi3): New expander.
3876 (madd<GPI>): Remove leading * from name.
3878 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3880 Backport from trunk r209645.
3881 2014-04-22 Andrew Pinski <apinski@cavium.com>
3883 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
3884 Handle TLS for ILP32.
3885 * config/aarch64/aarch64.md (tlsie_small): Rename to ...
3886 (tlsie_small_<mode>): this and handle PTR.
3887 (tlsie_small_sidi): New pattern.
3888 (tlsle_small): Change to an expand to handle ILP32.
3889 (tlsle_small_<mode>): New pattern.
3890 (tlsdesc_small): Rename to ...
3891 (tlsdesc_small_<mode>): this and handle PTR.
3893 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3895 Backport from trunk r209643.
3896 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
3898 * config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.
3900 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
3902 Backport from trunk r209641, 209642.
3903 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
3905 * config/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
3906 (aarch64_types_signed_unsigned_qualifiers): Qualifier added.
3907 (aarch64_types_signed_poly_qualifiers): Likewise.
3908 (aarch64_types_unsigned_signed_qualifiers): Likewise.
3909 (aarch64_types_poly_signed_qualifiers): Likewise.
3910 (TYPES_REINTERP_SS): Type macro added.
3911 (TYPES_REINTERP_SU): Likewise.
3912 (TYPES_REINTERP_SP): Likewise.
3913 (TYPES_REINTERP_US): Likewise.
3914 (TYPES_REINTERP_PS): Likewise.
3915 (aarch64_fold_builtin): New expression folding added.
3916 * config/aarch64/aarch64-simd-builtins.def (REINTERP):
3917 Declarations removed.
3918 (REINTERP_SS): Declarations added.
3919 (REINTERP_US): Likewise.
3920 (REINTERP_PS): Likewise.
3921 (REINTERP_SU): Likewise.
3922 (REINTERP_SP): Likewise.
3923 * config/aarch64/arm_neon.h (vreinterpret_p8_f64): Implemented.
3924 (vreinterpretq_p8_f64): Likewise.
3925 (vreinterpret_p16_f64): Likewise.
3926 (vreinterpretq_p16_f64): Likewise.
3927 (vreinterpret_f32_f64): Likewise.
3928 (vreinterpretq_f32_f64): Likewise.
3929 (vreinterpret_f64_f32): Likewise.
3930 (vreinterpret_f64_p8): Likewise.
3931 (vreinterpret_f64_p16): Likewise.
3932 (vreinterpret_f64_s8): Likewise.
3933 (vreinterpret_f64_s16): Likewise.
3934 (vreinterpret_f64_s32): Likewise.
3935 (vreinterpret_f64_s64): Likewise.
3936 (vreinterpret_f64_u8): Likewise.
3937 (vreinterpret_f64_u16): Likewise.
3938 (vreinterpret_f64_u32): Likewise.
3939 (vreinterpret_f64_u64): Likewise.
3940 (vreinterpretq_f64_f32): Likewise.
3941 (vreinterpretq_f64_p8): Likewise.
3942 (vreinterpretq_f64_p16): Likewise.
3943 (vreinterpretq_f64_s8): Likewise.
3944 (vreinterpretq_f64_s16): Likewise.
3945 (vreinterpretq_f64_s32): Likewise.
3946 (vreinterpretq_f64_s64): Likewise.
3947 (vreinterpretq_f64_u8): Likewise.
3948 (vreinterpretq_f64_u16): Likewise.
3949 (vreinterpretq_f64_u32): Likewise.
3950 (vreinterpretq_f64_u64): Likewise.
3951 (vreinterpret_s64_f64): Likewise.
3952 (vreinterpretq_s64_f64): Likewise.
3953 (vreinterpret_u64_f64): Likewise.
3954 (vreinterpretq_u64_f64): Likewise.
3955 (vreinterpret_s8_f64): Likewise.
3956 (vreinterpretq_s8_f64): Likewise.
3957 (vreinterpret_s16_f64): Likewise.
3958 (vreinterpretq_s16_f64): Likewise.
3959 (vreinterpret_s32_f64): Likewise.
3960 (vreinterpretq_s32_f64): Likewise.
3961 (vreinterpret_u8_f64): Likewise.
3962 (vreinterpretq_u8_f64): Likewise.
3963 (vreinterpret_u16_f64): Likewise.
3964 (vreinterpretq_u16_f64): Likewise.
3965 (vreinterpret_u32_f64): Likewise.
3966 (vreinterpretq_u32_f64): Likewise.
3968 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
3970 * config/aarch64/aarch64/aarch64-builtins.c (TYPES_REINTERP): Removed.
3971 * config/aarch64/aarch64/aarch64-simd-builtins.def (REINTERP): Removed.
3972 (vreinterpret_p8_s8): Likewise.
3973 * config/aarch64/aarch64/arm_neon.h (vreinterpret_p8_s8): Uses cast.
3974 (vreinterpret_p8_s16): Likewise.
3975 (vreinterpret_p8_s32): Likewise.
3976 (vreinterpret_p8_s64): Likewise.
3977 (vreinterpret_p8_f32): Likewise.
3978 (vreinterpret_p8_u8): Likewise.
3979 (vreinterpret_p8_u16): Likewise.
3980 (vreinterpret_p8_u32): Likewise.
3981 (vreinterpret_p8_u64): Likewise.
3982 (vreinterpret_p8_p16): Likewise.
3983 (vreinterpretq_p8_s8): Likewise.
3984 (vreinterpretq_p8_s16): Likewise.
3985 (vreinterpretq_p8_s32): Likewise.
3986 (vreinterpretq_p8_s64): Likewise.
3987 (vreinterpretq_p8_f32): Likewise.
3988 (vreinterpretq_p8_u8): Likewise.
3989 (vreinterpretq_p8_u16): Likewise.
3990 (vreinterpretq_p8_u32): Likewise.
3991 (vreinterpretq_p8_u64): Likewise.
3992 (vreinterpretq_p8_p16): Likewise.
3993 (vreinterpret_p16_s8): Likewise.
3994 (vreinterpret_p16_s16): Likewise.
3995 (vreinterpret_p16_s32): Likewise.
3996 (vreinterpret_p16_s64): Likewise.
3997 (vreinterpret_p16_f32): Likewise.
3998 (vreinterpret_p16_u8): Likewise.
3999 (vreinterpret_p16_u16): Likewise.
4000 (vreinterpret_p16_u32): Likewise.
4001 (vreinterpret_p16_u64): Likewise.
4002 (vreinterpret_p16_p8): Likewise.
4003 (vreinterpretq_p16_s8): Likewise.
4004 (vreinterpretq_p16_s16): Likewise.
4005 (vreinterpretq_p16_s32): Likewise.
4006 (vreinterpretq_p16_s64): Likewise.
4007 (vreinterpretq_p16_f32): Likewise.
4008 (vreinterpretq_p16_u8): Likewise.
4009 (vreinterpretq_p16_u16): Likewise.
4010 (vreinterpretq_p16_u32): Likewise.
4011 (vreinterpretq_p16_u64): Likewise.
4012 (vreinterpretq_p16_p8): Likewise.
4013 (vreinterpret_f32_s8): Likewise.
4014 (vreinterpret_f32_s16): Likewise.
4015 (vreinterpret_f32_s32): Likewise.
4016 (vreinterpret_f32_s64): Likewise.
4017 (vreinterpret_f32_u8): Likewise.
4018 (vreinterpret_f32_u16): Likewise.
4019 (vreinterpret_f32_u32): Likewise.
4020 (vreinterpret_f32_u64): Likewise.
4021 (vreinterpret_f32_p8): Likewise.
4022 (vreinterpret_f32_p16): Likewise.
4023 (vreinterpretq_f32_s8): Likewise.
4024 (vreinterpretq_f32_s16): Likewise.
4025 (vreinterpretq_f32_s32): Likewise.
4026 (vreinterpretq_f32_s64): Likewise.
4027 (vreinterpretq_f32_u8): Likewise.
4028 (vreinterpretq_f32_u16): Likewise.
4029 (vreinterpretq_f32_u32): Likewise.
4030 (vreinterpretq_f32_u64): Likewise.
4031 (vreinterpretq_f32_p8): Likewise.
4032 (vreinterpretq_f32_p16): Likewise.
4033 (vreinterpret_s64_s8): Likewise.
4034 (vreinterpret_s64_s16): Likewise.
4035 (vreinterpret_s64_s32): Likewise.
4036 (vreinterpret_s64_f32): Likewise.
4037 (vreinterpret_s64_u8): Likewise.
4038 (vreinterpret_s64_u16): Likewise.
4039 (vreinterpret_s64_u32): Likewise.
4040 (vreinterpret_s64_u64): Likewise.
4041 (vreinterpret_s64_p8): Likewise.
4042 (vreinterpret_s64_p16): Likewise.
4043 (vreinterpretq_s64_s8): Likewise.
4044 (vreinterpretq_s64_s16): Likewise.
4045 (vreinterpretq_s64_s32): Likewise.
4046 (vreinterpretq_s64_f32): Likewise.
4047 (vreinterpretq_s64_u8): Likewise.
4048 (vreinterpretq_s64_u16): Likewise.
4049 (vreinterpretq_s64_u32): Likewise.
4050 (vreinterpretq_s64_u64): Likewise.
4051 (vreinterpretq_s64_p8): Likewise.
4052 (vreinterpretq_s64_p16): Likewise.
4053 (vreinterpret_u64_s8): Likewise.
4054 (vreinterpret_u64_s16): Likewise.
4055 (vreinterpret_u64_s32): Likewise.
4056 (vreinterpret_u64_s64): Likewise.
4057 (vreinterpret_u64_f32): Likewise.
4058 (vreinterpret_u64_u8): Likewise.
4059 (vreinterpret_u64_u16): Likewise.
4060 (vreinterpret_u64_u32): Likewise.
4061 (vreinterpret_u64_p8): Likewise.
4062 (vreinterpret_u64_p16): Likewise.
4063 (vreinterpretq_u64_s8): Likewise.
4064 (vreinterpretq_u64_s16): Likewise.
4065 (vreinterpretq_u64_s32): Likewise.
4066 (vreinterpretq_u64_s64): Likewise.
4067 (vreinterpretq_u64_f32): Likewise.
4068 (vreinterpretq_u64_u8): Likewise.
4069 (vreinterpretq_u64_u16): Likewise.
4070 (vreinterpretq_u64_u32): Likewise.
4071 (vreinterpretq_u64_p8): Likewise.
4072 (vreinterpretq_u64_p16): Likewise.
4073 (vreinterpret_s8_s16): Likewise.
4074 (vreinterpret_s8_s32): Likewise.
4075 (vreinterpret_s8_s64): Likewise.
4076 (vreinterpret_s8_f32): Likewise.
4077 (vreinterpret_s8_u8): Likewise.
4078 (vreinterpret_s8_u16): Likewise.
4079 (vreinterpret_s8_u32): Likewise.
4080 (vreinterpret_s8_u64): Likewise.
4081 (vreinterpret_s8_p8): Likewise.
4082 (vreinterpret_s8_p16): Likewise.
4083 (vreinterpretq_s8_s16): Likewise.
4084 (vreinterpretq_s8_s32): Likewise.
4085 (vreinterpretq_s8_s64): Likewise.
4086 (vreinterpretq_s8_f32): Likewise.
4087 (vreinterpretq_s8_u8): Likewise.
4088 (vreinterpretq_s8_u16): Likewise.
4089 (vreinterpretq_s8_u32): Likewise.
4090 (vreinterpretq_s8_u64): Likewise.
4091 (vreinterpretq_s8_p8): Likewise.
4092 (vreinterpretq_s8_p16): Likewise.
4093 (vreinterpret_s16_s8): Likewise.
4094 (vreinterpret_s16_s32): Likewise.
4095 (vreinterpret_s16_s64): Likewise.
4096 (vreinterpret_s16_f32): Likewise.
4097 (vreinterpret_s16_u8): Likewise.
4098 (vreinterpret_s16_u16): Likewise.
4099 (vreinterpret_s16_u32): Likewise.
4100 (vreinterpret_s16_u64): Likewise.
4101 (vreinterpret_s16_p8): Likewise.
4102 (vreinterpret_s16_p16): Likewise.
4103 (vreinterpretq_s16_s8): Likewise.
4104 (vreinterpretq_s16_s32): Likewise.
4105 (vreinterpretq_s16_s64): Likewise.
4106 (vreinterpretq_s16_f32): Likewise.
4107 (vreinterpretq_s16_u8): Likewise.
4108 (vreinterpretq_s16_u16): Likewise.
4109 (vreinterpretq_s16_u32): Likewise.
4110 (vreinterpretq_s16_u64): Likewise.
4111 (vreinterpretq_s16_p8): Likewise.
4112 (vreinterpretq_s16_p16): Likewise.
4113 (vreinterpret_s32_s8): Likewise.
4114 (vreinterpret_s32_s16): Likewise.
4115 (vreinterpret_s32_s64): Likewise.
4116 (vreinterpret_s32_f32): Likewise.
4117 (vreinterpret_s32_u8): Likewise.
4118 (vreinterpret_s32_u16): Likewise.
4119 (vreinterpret_s32_u32): Likewise.
4120 (vreinterpret_s32_u64): Likewise.
4121 (vreinterpret_s32_p8): Likewise.
4122 (vreinterpret_s32_p16): Likewise.
4123 (vreinterpretq_s32_s8): Likewise.
4124 (vreinterpretq_s32_s16): Likewise.
4125 (vreinterpretq_s32_s64): Likewise.
4126 (vreinterpretq_s32_f32): Likewise.
4127 (vreinterpretq_s32_u8): Likewise.
4128 (vreinterpretq_s32_u16): Likewise.
4129 (vreinterpretq_s32_u32): Likewise.
4130 (vreinterpretq_s32_u64): Likewise.
4131 (vreinterpretq_s32_p8): Likewise.
4132 (vreinterpretq_s32_p16): Likewise.
4133 (vreinterpret_u8_s8): Likewise.
4134 (vreinterpret_u8_s16): Likewise.
4135 (vreinterpret_u8_s32): Likewise.
4136 (vreinterpret_u8_s64): Likewise.
4137 (vreinterpret_u8_f32): Likewise.
4138 (vreinterpret_u8_u16): Likewise.
4139 (vreinterpret_u8_u32): Likewise.
4140 (vreinterpret_u8_u64): Likewise.
4141 (vreinterpret_u8_p8): Likewise.
4142 (vreinterpret_u8_p16): Likewise.
4143 (vreinterpretq_u8_s8): Likewise.
4144 (vreinterpretq_u8_s16): Likewise.
4145 (vreinterpretq_u8_s32): Likewise.
4146 (vreinterpretq_u8_s64): Likewise.
4147 (vreinterpretq_u8_f32): Likewise.
4148 (vreinterpretq_u8_u16): Likewise.
4149 (vreinterpretq_u8_u32): Likewise.
4150 (vreinterpretq_u8_u64): Likewise.
4151 (vreinterpretq_u8_p8): Likewise.
4152 (vreinterpretq_u8_p16): Likewise.
4153 (vreinterpret_u16_s8): Likewise.
4154 (vreinterpret_u16_s16): Likewise.
4155 (vreinterpret_u16_s32): Likewise.
4156 (vreinterpret_u16_s64): Likewise.
4157 (vreinterpret_u16_f32): Likewise.
4158 (vreinterpret_u16_u8): Likewise.
4159 (vreinterpret_u16_u32): Likewise.
4160 (vreinterpret_u16_u64): Likewise.
4161 (vreinterpret_u16_p8): Likewise.
4162 (vreinterpret_u16_p16): Likewise.
4163 (vreinterpretq_u16_s8): Likewise.
4164 (vreinterpretq_u16_s16): Likewise.
4165 (vreinterpretq_u16_s32): Likewise.
4166 (vreinterpretq_u16_s64): Likewise.
4167 (vreinterpretq_u16_f32): Likewise.
4168 (vreinterpretq_u16_u8): Likewise.
4169 (vreinterpretq_u16_u32): Likewise.
4170 (vreinterpretq_u16_u64): Likewise.
4171 (vreinterpretq_u16_p8): Likewise.
4172 (vreinterpretq_u16_p16): Likewise.
4173 (vreinterpret_u32_s8): Likewise.
4174 (vreinterpret_u32_s16): Likewise.
4175 (vreinterpret_u32_s32): Likewise.
4176 (vreinterpret_u32_s64): Likewise.
4177 (vreinterpret_u32_f32): Likewise.
4178 (vreinterpret_u32_u8): Likewise.
4179 (vreinterpret_u32_u16): Likewise.
4180 (vreinterpret_u32_u64): Likewise.
4181 (vreinterpret_u32_p8): Likewise.
4182 (vreinterpret_u32_p16): Likewise.
4183 (vreinterpretq_u32_s8): Likewise.
4184 (vreinterpretq_u32_s16): Likewise.
4185 (vreinterpretq_u32_s32): Likewise.
4186 (vreinterpretq_u32_s64): Likewise.
4187 (vreinterpretq_u32_f32): Likewise.
4188 (vreinterpretq_u32_u8): Likewise.
4189 (vreinterpretq_u32_u16): Likewise.
4190 (vreinterpretq_u32_u64): Likewise.
4191 (vreinterpretq_u32_p8): Likewise.
4192 (vreinterpretq_u32_p16): Likewise.
4194 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4196 Backport from trunk r209640.
4197 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
4199 * gcc/config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>):
4200 Pattern extended.
4201 * config/aarch64/aarch64-simd-builtins.def (sqneg): Iterator
4202 extended.
4203 (sqabs): Likewise.
4204 * config/aarch64/arm_neon.h (vqneg_s64): New intrinsic.
4205 (vqnegd_s64): Likewise.
4206 (vqabs_s64): Likewise.
4207 (vqabsd_s64): Likewise.
4209 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4211 Backport from trunk r209627, 209636.
4212 2014-04-22 Renlin <renlin.li@arm.com>
4213 Jiong Wang <jiong.wang@arm.com>
4215 * config/aarch64/aarch64.h (aarch64_frame): Delete "fp_lr_offset".
4216 * config/aarch64/aarch64.c (aarch64_layout_frame)
4217 (aarch64_initial_elimination_offset): Likewise.
4219 2014-04-22 Marcus Shawcroft <marcus.shawcroft@arm.com>
4221 * config/aarch64/aarch64.c (aarch64_initial_elimination_offset):
4222 Fix indentation.
4224 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4226 Backport from trunk r209618.
4227 2014-04-22 Renlin Li <Renlin.Li@arm.com>
4229 * config/aarch64/aarch64.c (aarch64_print_operand_address): Adjust
4230 the output asm format.
4232 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4234 Backport from trunk r209617.
4235 2014-04-22 James Greenhalgh <james.greenhalgh@arm.com>
4237 * config/aarch64/aarch64-simd.md
4238 (aarch64_cm<optab>di): Always split.
4239 (*aarch64_cm<optab>di): New.
4240 (aarch64_cmtstdi): Always split.
4241 (*aarch64_cmtstdi): New.
4243 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4245 Backport from trunk r209615.
4246 2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
4248 * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
4249 restrictions on core registers for DImode values in Thumb2.
4251 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4253 Backport from trunk r209613, r209614.
4254 2014-04-22 Ian Bolton <ian.bolton@arm.com>
4256 * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.
4257 * config/arm/thumb2.md (*iordi_notdi_zesidi): New pattern.
4259 2014-04-22 Ian Bolton <ian.bolton@arm.com>
4261 * config/arm/thumb2.md (*iordi_notdi_di): New pattern.
4262 (*iordi_notzesidi_di): Likewise.
4263 (*iordi_notsesidi_di): Likewise.
4265 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4267 Backport from trunk r209561.
4268 2014-04-22 Ian Bolton <ian.bolton@arm.com>
4270 * config/arm/arm-protos.h (tune_params): New struct members.
4271 * config/arm/arm.c: Initialise tune_params per processor.
4272 (thumb2_reorg): Suppress conversion from t32 to t16 when optimizing
4273 for speed, based on new tune_params.
4275 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4277 Backport from trunk r209559.
4278 2014-04-22 Alex Velenko <Alex.Velenko@arm.com>
4280 * config/aarch64/aarch64-builtins.c (BUILTIN_VDQF_DF): Macro
4281 added.
4282 * config/aarch64/aarch64-simd-builtins.def (frintn): Use added
4283 macro.
4284 * config/aarch64/aarch64-simd.md (<frint_pattern>): Comment
4285 corrected.
4286 * config/aarch64/aarch64.md (<frint_pattern>): Likewise.
4287 * config/aarch64/arm_neon.h (vrnd_f64): Added.
4288 (vrnda_f64): Likewise.
4289 (vrndi_f64): Likewise.
4290 (vrndm_f64): Likewise.
4291 (vrndn_f64): Likewise.
4292 (vrndp_f64): Likewise.
4293 (vrndx_f64): Likewise.
4295 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4297 Backport from trunk r209419.
4298 2014-04-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
4300 PR rtl-optimization/60663
4301 * config/arm/arm.c (arm_new_rtx_costs): Improve ASM_OPERANDS case,
4302 avoid 0 cost.
4304 2014-05-23 Yvan Roux <yvan.roux@linaro.org>
4306 Backport from trunk r209457.
4307 2014-04-16 Andrew Pinski <apinski@cavium.com>
4309 * config/host-linux.c (TRY_EMPTY_VM_SPACE): Change aarch64 ilp32
4310 definition.
4312 2014-05-19 Yvan Roux <yvan.roux@linaro.org>
4314 * LINARO-VERSION: Bump version.
4316 2014-05-14 Yvan Roux <yvan.roux@linaro.org>
4318 GCC Linaro 4.9-2014.05 released.
4319 * LINARO-VERSION: Update.
4321 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
4323 Backport from trunk r209889.
4324 2014-04-29 Zhenqiang Chen <zhenqiang.chen@linaro.org>
4326 * config/aarch64/aarch64.md (mov<mode>cc): New for GPF.
4328 2014-05-13 Yvan Roux <yvan.roux@linaro.org>
4330 Backport from trunk r209556.
4331 2014-04-22 Zhenqiang Chen <zhenqiang.chen@linaro.org>
4333 * config/arm/arm.c (arm_print_operand, thumb_exit): Make sure
4334 GET_MODE_SIZE argument is enum machine_mode.
4336 2014-04-28 Yvan Roux <yvan.roux@linaro.org>
4338 * LINARO-VERSION: Bump version.
4340 2014-04-22 Yvan Roux <yvan.roux@linaro.org>
4342 GCC Linaro 4.9-2014.04 released.
4343 * LINARO-VERSION: New file.
4344 * configure.ac: Add Linaro version string.