1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2014 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
59 Three techniques for filling delay slots have been implemented so far:
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
105 #include "coretypes.h"
107 #include "diagnostic-core.h"
111 #include "function.h"
112 #include "insn-config.h"
113 #include "conditions.h"
114 #include "hard-reg-set.h"
115 #include "basic-block.h"
120 #include "insn-attr.h"
121 #include "resource.h"
125 #include "tree-pass.h"
126 #include "emit-rtl.h"
130 #ifndef ANNUL_IFTRUE_SLOTS
131 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
133 #ifndef ANNUL_IFFALSE_SLOTS
134 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
138 /* First, some functions that were used before GCC got a control flow graph.
139 These functions are now only used here in reorg.c, and have therefore
140 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
142 /* Return the last label to mark the same position as LABEL. Return LABEL
143 itself if it is null or any return rtx. */
146 skip_consecutive_labels (rtx label
)
150 if (label
&& ANY_RETURN_P (label
))
153 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
161 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
162 and REG_CC_USER notes so we can find it. */
165 link_cc0_insns (rtx insn
)
167 rtx user
= next_nonnote_insn (insn
);
169 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
170 user
= XVECEXP (PATTERN (user
), 0, 0);
172 add_reg_note (user
, REG_CC_SETTER
, insn
);
173 add_reg_note (insn
, REG_CC_USER
, user
);
177 /* Insns which have delay slots that have not yet been filled. */
179 static struct obstack unfilled_slots_obstack
;
180 static rtx
*unfilled_firstobj
;
182 /* Define macros to refer to the first and last slot containing unfilled
183 insns. These are used because the list may move and its address
184 should be recomputed at each use. */
186 #define unfilled_slots_base \
187 ((rtx *) obstack_base (&unfilled_slots_obstack))
189 #define unfilled_slots_next \
190 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
192 /* Points to the label before the end of the function, or before a
194 static rtx function_return_label
;
195 /* Likewise for a simple_return. */
196 static rtx function_simple_return_label
;
198 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
199 not always monotonically increase. */
200 static int *uid_to_ruid
;
202 /* Highest valid index in `uid_to_ruid'. */
205 static int stop_search_p (rtx
, int);
206 static int resource_conflicts_p (struct resources
*, struct resources
*);
207 static int insn_references_resource_p (rtx
, struct resources
*, bool);
208 static int insn_sets_resource_p (rtx
, struct resources
*, bool);
209 static rtx
find_end_label (rtx
);
210 static rtx
emit_delay_sequence (rtx
, rtx
, int);
211 static rtx
add_to_delay_list (rtx
, rtx
);
212 static rtx
delete_from_delay_slot (rtx
);
213 static void delete_scheduled_jump (rtx
);
214 static void note_delay_statistics (int, int);
215 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
216 static rtx
optimize_skip (rtx
);
218 static int get_jump_flags (rtx
, rtx
);
219 static int mostly_true_jump (rtx
);
220 static rtx
get_branch_condition (rtx
, rtx
);
221 static int condition_dominates_p (rtx
, rtx
);
222 static int redirect_with_delay_slots_safe_p (rtx
, rtx
, rtx
);
223 static int redirect_with_delay_list_safe_p (rtx
, rtx
, rtx
);
224 static int check_annul_list_true_false (int, rtx
);
225 static rtx
steal_delay_list_from_target (rtx
, rtx
, rtx
, rtx
,
229 int, int *, int *, rtx
*);
230 static rtx
steal_delay_list_from_fallthrough (rtx
, rtx
, rtx
, rtx
,
235 static void try_merge_delay_insns (rtx
, rtx
);
236 static rtx
redundant_insn (rtx
, rtx
, rtx
);
237 static int own_thread_p (rtx
, rtx
, int);
238 static void update_block (rtx
, rtx
);
239 static int reorg_redirect_jump (rtx
, rtx
);
240 static void update_reg_dead_notes (rtx
, rtx
);
241 static void fix_reg_dead_note (rtx
, rtx
);
242 static void update_reg_unused_notes (rtx
, rtx
);
243 static void fill_simple_delay_slots (int);
244 static rtx
fill_slots_from_thread (rtx
, rtx
, rtx
, rtx
,
247 static void fill_eager_delay_slots (void);
248 static void relax_delay_slots (rtx
);
249 static void make_return_insns (rtx
);
251 /* A wrapper around next_active_insn which takes care to return ret_rtx
255 first_active_target_insn (rtx insn
)
257 if (ANY_RETURN_P (insn
))
259 return next_active_insn (insn
);
262 /* Return true iff INSN is a simplejump, or any kind of return insn. */
265 simplejump_or_return_p (rtx insn
)
267 return (JUMP_P (insn
)
268 && (simplejump_p (insn
) || ANY_RETURN_P (PATTERN (insn
))));
271 /* Return TRUE if this insn should stop the search for insn to fill delay
272 slots. LABELS_P indicates that labels should terminate the search.
273 In all cases, jumps terminate the search. */
276 stop_search_p (rtx insn
, int labels_p
)
281 /* If the insn can throw an exception that is caught within the function,
282 it may effectively perform a jump from the viewpoint of the function.
283 Therefore act like for a jump. */
284 if (can_throw_internal (insn
))
287 switch (GET_CODE (insn
))
301 /* OK unless it contains a delay slot or is an `asm' insn of some type.
302 We don't know anything about these. */
303 return (GET_CODE (PATTERN (insn
)) == SEQUENCE
304 || GET_CODE (PATTERN (insn
)) == ASM_INPUT
305 || asm_noperands (PATTERN (insn
)) >= 0);
312 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
313 resource set contains a volatile memory reference. Otherwise, return FALSE. */
316 resource_conflicts_p (struct resources
*res1
, struct resources
*res2
)
318 if ((res1
->cc
&& res2
->cc
) || (res1
->memory
&& res2
->memory
)
319 || res1
->volatil
|| res2
->volatil
)
322 return hard_reg_set_intersect_p (res1
->regs
, res2
->regs
);
325 /* Return TRUE if any resource marked in RES, a `struct resources', is
326 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
327 routine is using those resources.
329 We compute this by computing all the resources referenced by INSN and
330 seeing if this conflicts with RES. It might be faster to directly check
331 ourselves, and this is the way it used to work, but it means duplicating
332 a large block of complex code. */
335 insn_references_resource_p (rtx insn
, struct resources
*res
,
336 bool include_delayed_effects
)
338 struct resources insn_res
;
340 CLEAR_RESOURCE (&insn_res
);
341 mark_referenced_resources (insn
, &insn_res
, include_delayed_effects
);
342 return resource_conflicts_p (&insn_res
, res
);
345 /* Return TRUE if INSN modifies resources that are marked in RES.
346 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
347 included. CC0 is only modified if it is explicitly set; see comments
348 in front of mark_set_resources for details. */
351 insn_sets_resource_p (rtx insn
, struct resources
*res
,
352 bool include_delayed_effects
)
354 struct resources insn_sets
;
356 CLEAR_RESOURCE (&insn_sets
);
357 mark_set_resources (insn
, &insn_sets
, 0,
358 (include_delayed_effects
361 return resource_conflicts_p (&insn_sets
, res
);
364 /* Find a label at the end of the function or before a RETURN. If there
365 is none, try to make one. If that fails, returns 0.
367 The property of such a label is that it is placed just before the
368 epilogue or a bare RETURN insn, so that another bare RETURN can be
369 turned into a jump to the label unconditionally. In particular, the
370 label cannot be placed before a RETURN insn with a filled delay slot.
372 ??? There may be a problem with the current implementation. Suppose
373 we start with a bare RETURN insn and call find_end_label. It may set
374 function_return_label just before the RETURN. Suppose the machinery
375 is able to fill the delay slot of the RETURN insn afterwards. Then
376 function_return_label is no longer valid according to the property
377 described above and find_end_label will still return it unmodified.
378 Note that this is probably mitigated by the following observation:
379 once function_return_label is made, it is very likely the target of
380 a jump, so filling the delay slot of the RETURN will be much more
382 KIND is either simple_return_rtx or ret_rtx, indicating which type of
383 return we're looking for. */
386 find_end_label (rtx kind
)
392 plabel
= &function_return_label
;
395 gcc_assert (kind
== simple_return_rtx
);
396 plabel
= &function_simple_return_label
;
399 /* If we found one previously, return it. */
403 /* Otherwise, see if there is a label at the end of the function. If there
404 is, it must be that RETURN insns aren't needed, so that is our return
405 label and we don't have to do anything else. */
407 insn
= get_last_insn ();
409 || (NONJUMP_INSN_P (insn
)
410 && (GET_CODE (PATTERN (insn
)) == USE
411 || GET_CODE (PATTERN (insn
)) == CLOBBER
)))
412 insn
= PREV_INSN (insn
);
414 /* When a target threads its epilogue we might already have a
415 suitable return insn. If so put a label before it for the
416 function_return_label. */
418 && JUMP_P (PREV_INSN (insn
))
419 && PATTERN (PREV_INSN (insn
)) == kind
)
421 rtx temp
= PREV_INSN (PREV_INSN (insn
));
422 rtx label
= gen_label_rtx ();
423 LABEL_NUSES (label
) = 0;
425 /* Put the label before any USE insns that may precede the RETURN
427 while (GET_CODE (temp
) == USE
)
428 temp
= PREV_INSN (temp
);
430 emit_label_after (label
, temp
);
434 else if (LABEL_P (insn
))
438 rtx label
= gen_label_rtx ();
439 LABEL_NUSES (label
) = 0;
440 /* If the basic block reorder pass moves the return insn to
441 some other place try to locate it again and put our
442 function_return_label there. */
443 while (insn
&& ! (JUMP_P (insn
) && (PATTERN (insn
) == kind
)))
444 insn
= PREV_INSN (insn
);
447 insn
= PREV_INSN (insn
);
449 /* Put the label before any USE insns that may precede the
451 while (GET_CODE (insn
) == USE
)
452 insn
= PREV_INSN (insn
);
454 emit_label_after (label
, insn
);
464 /* The RETURN insn has its delay slot filled so we cannot
465 emit the label just before it. Since we already have
466 an epilogue and cannot emit a new RETURN, we cannot
467 emit the label at all. */
469 #endif /* HAVE_epilogue */
471 /* Otherwise, make a new label and emit a RETURN and BARRIER,
477 /* The return we make may have delay slots too. */
478 rtx insn
= gen_return ();
479 insn
= emit_jump_insn (insn
);
480 set_return_jump_label (insn
);
482 if (num_delay_slots (insn
) > 0)
483 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
490 /* Show one additional use for this label so it won't go away until
492 ++LABEL_NUSES (*plabel
);
497 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
498 the pattern of INSN with the SEQUENCE.
500 Returns the SEQUENCE that replaces INSN. */
503 emit_delay_sequence (rtx insn
, rtx list
, int length
)
505 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
506 rtvec seqv
= rtvec_alloc (length
+ 1);
507 rtx seq
= gen_rtx_SEQUENCE (VOIDmode
, seqv
);
508 rtx seq_insn
= make_insn_raw (seq
);
510 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
511 not have a location, but one of the delayed insns does, we pick up a
512 location from there later. */
513 INSN_LOCATION (seq_insn
) = INSN_LOCATION (insn
);
515 /* Unlink INSN from the insn chain, so that we can put it into
516 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
517 rtx after
= PREV_INSN (insn
);
519 NEXT_INSN (insn
) = PREV_INSN (insn
) = NULL
;
521 /* Build our SEQUENCE and rebuild the insn chain. */
524 XVECEXP (seq
, 0, 0) = emit_insn (insn
);
525 for (rtx li
= list
; li
; li
= XEXP (li
, 1), i
++)
527 rtx tem
= XEXP (li
, 0);
530 /* Show that this copy of the insn isn't deleted. */
531 INSN_DELETED_P (tem
) = 0;
533 /* Unlink insn from its original place, and re-emit it into
535 NEXT_INSN (tem
) = PREV_INSN (tem
) = NULL
;
536 XVECEXP (seq
, 0, i
) = emit_insn (tem
);
538 /* SPARC assembler, for instance, emit warning when debug info is output
539 into the delay slot. */
540 if (INSN_LOCATION (tem
) && !INSN_LOCATION (seq_insn
))
541 INSN_LOCATION (seq_insn
) = INSN_LOCATION (tem
);
542 INSN_LOCATION (tem
) = 0;
544 for (note
= REG_NOTES (tem
); note
; note
= next
)
546 next
= XEXP (note
, 1);
547 switch (REG_NOTE_KIND (note
))
550 /* Remove any REG_DEAD notes because we can't rely on them now
551 that the insn has been moved. */
552 remove_note (tem
, note
);
555 case REG_LABEL_OPERAND
:
556 case REG_LABEL_TARGET
:
557 /* Keep the label reference count up to date. */
558 if (LABEL_P (XEXP (note
, 0)))
559 LABEL_NUSES (XEXP (note
, 0)) ++;
568 gcc_assert (i
== length
+ 1);
570 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
571 add_insn_after (seq_insn
, after
, NULL
);
576 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
577 be in the order in which the insns are to be executed. */
580 add_to_delay_list (rtx insn
, rtx delay_list
)
582 /* If we have an empty list, just make a new list element. If
583 INSN has its block number recorded, clear it since we may
584 be moving the insn to a new block. */
588 clear_hashed_info_for_insn (insn
);
589 return gen_rtx_INSN_LIST (VOIDmode
, insn
, NULL_RTX
);
592 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
594 XEXP (delay_list
, 1) = add_to_delay_list (insn
, XEXP (delay_list
, 1));
599 /* Delete INSN from the delay slot of the insn that it is in, which may
600 produce an insn with no delay slots. Return the new insn. */
603 delete_from_delay_slot (rtx insn
)
605 rtx trial
, seq_insn
, seq
, prev
;
610 /* We first must find the insn containing the SEQUENCE with INSN in its
611 delay slot. Do this by finding an insn, TRIAL, where
612 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
615 PREV_INSN (NEXT_INSN (trial
)) == trial
;
616 trial
= NEXT_INSN (trial
))
619 seq_insn
= PREV_INSN (NEXT_INSN (trial
));
620 seq
= PATTERN (seq_insn
);
622 if (NEXT_INSN (seq_insn
) && BARRIER_P (NEXT_INSN (seq_insn
)))
625 /* Create a delay list consisting of all the insns other than the one
626 we are deleting (unless we were the only one). */
627 if (XVECLEN (seq
, 0) > 2)
628 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
629 if (XVECEXP (seq
, 0, i
) != insn
)
630 delay_list
= add_to_delay_list (XVECEXP (seq
, 0, i
), delay_list
);
632 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
633 list, and rebuild the delay list if non-empty. */
634 prev
= PREV_INSN (seq_insn
);
635 trial
= XVECEXP (seq
, 0, 0);
636 delete_related_insns (seq_insn
);
637 add_insn_after (trial
, prev
, NULL
);
639 /* If there was a barrier after the old SEQUENCE, remit it. */
641 emit_barrier_after (trial
);
643 /* If there are any delay insns, remit them. Otherwise clear the
646 trial
= emit_delay_sequence (trial
, delay_list
, XVECLEN (seq
, 0) - 2);
647 else if (JUMP_P (trial
))
648 INSN_ANNULLED_BRANCH_P (trial
) = 0;
650 INSN_FROM_TARGET_P (insn
) = 0;
652 /* Show we need to fill this insn again. */
653 obstack_ptr_grow (&unfilled_slots_obstack
, trial
);
658 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
659 the insn that sets CC0 for it and delete it too. */
662 delete_scheduled_jump (rtx insn
)
664 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
665 delete the insn that sets the condition code, but it is hard to find it.
666 Since this case is rare anyway, don't bother trying; there would likely
667 be other insns that became dead anyway, which we wouldn't know to
671 if (reg_mentioned_p (cc0_rtx
, insn
))
673 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
675 /* If a reg-note was found, it points to an insn to set CC0. This
676 insn is in the delay list of some other insn. So delete it from
677 the delay list it was in. */
680 if (! FIND_REG_INC_NOTE (XEXP (note
, 0), NULL_RTX
)
681 && sets_cc0_p (PATTERN (XEXP (note
, 0))) == 1)
682 delete_from_delay_slot (XEXP (note
, 0));
686 /* The insn setting CC0 is our previous insn, but it may be in
687 a delay slot. It will be the last insn in the delay slot, if
689 rtx trial
= previous_insn (insn
);
691 trial
= prev_nonnote_insn (trial
);
692 if (sets_cc0_p (PATTERN (trial
)) != 1
693 || FIND_REG_INC_NOTE (trial
, NULL_RTX
))
695 if (PREV_INSN (NEXT_INSN (trial
)) == trial
)
696 delete_related_insns (trial
);
698 delete_from_delay_slot (trial
);
703 delete_related_insns (insn
);
706 /* Counters for delay-slot filling. */
708 #define NUM_REORG_FUNCTIONS 2
709 #define MAX_DELAY_HISTOGRAM 3
710 #define MAX_REORG_PASSES 2
712 static int num_insns_needing_delays
[NUM_REORG_FUNCTIONS
][MAX_REORG_PASSES
];
714 static int num_filled_delays
[NUM_REORG_FUNCTIONS
][MAX_DELAY_HISTOGRAM
+1][MAX_REORG_PASSES
];
716 static int reorg_pass_number
;
719 note_delay_statistics (int slots_filled
, int index
)
721 num_insns_needing_delays
[index
][reorg_pass_number
]++;
722 if (slots_filled
> MAX_DELAY_HISTOGRAM
)
723 slots_filled
= MAX_DELAY_HISTOGRAM
;
724 num_filled_delays
[index
][slots_filled
][reorg_pass_number
]++;
727 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
729 /* Optimize the following cases:
731 1. When a conditional branch skips over only one instruction,
732 use an annulling branch and put that insn in the delay slot.
733 Use either a branch that annuls when the condition if true or
734 invert the test with a branch that annuls when the condition is
735 false. This saves insns, since otherwise we must copy an insn
738 (orig) (skip) (otherwise)
739 Bcc.n L1 Bcc',a L1 Bcc,a L1'
746 2. When a conditional branch skips over only one instruction,
747 and after that, it unconditionally branches somewhere else,
748 perform the similar optimization. This saves executing the
749 second branch in the case where the inverted condition is true.
758 This should be expanded to skip over N insns, where N is the number
759 of delay slots required. */
762 optimize_skip (rtx insn
)
764 rtx trial
= next_nonnote_insn (insn
);
765 rtx next_trial
= next_active_insn (trial
);
769 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
772 || !NONJUMP_INSN_P (trial
)
773 || GET_CODE (PATTERN (trial
)) == SEQUENCE
774 || recog_memoized (trial
) < 0
775 || (! eligible_for_annul_false (insn
, 0, trial
, flags
)
776 && ! eligible_for_annul_true (insn
, 0, trial
, flags
))
777 || can_throw_internal (trial
))
780 /* There are two cases where we are just executing one insn (we assume
781 here that a branch requires only one insn; this should be generalized
782 at some point): Where the branch goes around a single insn or where
783 we have one insn followed by a branch to the same label we branch to.
784 In both of these cases, inverting the jump and annulling the delay
785 slot give the same effect in fewer insns. */
786 if (next_trial
== next_active_insn (JUMP_LABEL (insn
))
788 && simplejump_or_return_p (next_trial
)
789 && JUMP_LABEL (insn
) == JUMP_LABEL (next_trial
)))
791 if (eligible_for_annul_false (insn
, 0, trial
, flags
))
793 if (invert_jump (insn
, JUMP_LABEL (insn
), 1))
794 INSN_FROM_TARGET_P (trial
) = 1;
795 else if (! eligible_for_annul_true (insn
, 0, trial
, flags
))
799 delay_list
= add_to_delay_list (trial
, NULL_RTX
);
800 next_trial
= next_active_insn (trial
);
801 update_block (trial
, trial
);
802 delete_related_insns (trial
);
804 /* Also, if we are targeting an unconditional
805 branch, thread our jump to the target of that branch. Don't
806 change this into a RETURN here, because it may not accept what
807 we have in the delay slot. We'll fix this up later. */
808 if (next_trial
&& simplejump_or_return_p (next_trial
))
810 rtx target_label
= JUMP_LABEL (next_trial
);
811 if (ANY_RETURN_P (target_label
))
812 target_label
= find_end_label (target_label
);
816 /* Recompute the flags based on TARGET_LABEL since threading
817 the jump to TARGET_LABEL may change the direction of the
818 jump (which may change the circumstances in which the
819 delay slot is nullified). */
820 flags
= get_jump_flags (insn
, target_label
);
821 if (eligible_for_annul_true (insn
, 0, trial
, flags
))
822 reorg_redirect_jump (insn
, target_label
);
826 INSN_ANNULLED_BRANCH_P (insn
) = 1;
833 /* Encode and return branch direction and prediction information for
834 INSN assuming it will jump to LABEL.
836 Non conditional branches return no direction information and
837 are predicted as very likely taken. */
840 get_jump_flags (rtx insn
, rtx label
)
844 /* get_jump_flags can be passed any insn with delay slots, these may
845 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
846 direction information, and only if they are conditional jumps.
848 If LABEL is a return, then there is no way to determine the branch
851 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
852 && !ANY_RETURN_P (label
)
853 && INSN_UID (insn
) <= max_uid
854 && INSN_UID (label
) <= max_uid
)
856 = (uid_to_ruid
[INSN_UID (label
)] > uid_to_ruid
[INSN_UID (insn
)])
857 ? ATTR_FLAG_forward
: ATTR_FLAG_backward
;
858 /* No valid direction information. */
865 /* Return truth value of the statement that this branch
866 is mostly taken. If we think that the branch is extremely likely
867 to be taken, we return 2. If the branch is slightly more likely to be
868 taken, return 1. If the branch is slightly less likely to be taken,
869 return 0 and if the branch is highly unlikely to be taken, return -1. */
872 mostly_true_jump (rtx jump_insn
)
874 /* If branch probabilities are available, then use that number since it
875 always gives a correct answer. */
876 rtx note
= find_reg_note (jump_insn
, REG_BR_PROB
, 0);
879 int prob
= XINT (note
, 0);
881 if (prob
>= REG_BR_PROB_BASE
* 9 / 10)
883 else if (prob
>= REG_BR_PROB_BASE
/ 2)
885 else if (prob
>= REG_BR_PROB_BASE
/ 10)
891 /* If there is no note, assume branches are not taken.
892 This should be rare. */
896 /* Return the condition under which INSN will branch to TARGET. If TARGET
897 is zero, return the condition under which INSN will return. If INSN is
898 an unconditional branch, return const_true_rtx. If INSN isn't a simple
899 type of jump, or it doesn't go to TARGET, return 0. */
902 get_branch_condition (rtx insn
, rtx target
)
904 rtx pat
= PATTERN (insn
);
907 if (condjump_in_parallel_p (insn
))
908 pat
= XVECEXP (pat
, 0, 0);
910 if (ANY_RETURN_P (pat
) && pat
== target
)
911 return const_true_rtx
;
913 if (GET_CODE (pat
) != SET
|| SET_DEST (pat
) != pc_rtx
)
917 if (GET_CODE (src
) == LABEL_REF
&& XEXP (src
, 0) == target
)
918 return const_true_rtx
;
920 else if (GET_CODE (src
) == IF_THEN_ELSE
921 && XEXP (src
, 2) == pc_rtx
922 && ((GET_CODE (XEXP (src
, 1)) == LABEL_REF
923 && XEXP (XEXP (src
, 1), 0) == target
)
924 || (ANY_RETURN_P (XEXP (src
, 1)) && XEXP (src
, 1) == target
)))
925 return XEXP (src
, 0);
927 else if (GET_CODE (src
) == IF_THEN_ELSE
928 && XEXP (src
, 1) == pc_rtx
929 && ((GET_CODE (XEXP (src
, 2)) == LABEL_REF
930 && XEXP (XEXP (src
, 2), 0) == target
)
931 || (ANY_RETURN_P (XEXP (src
, 2)) && XEXP (src
, 2) == target
)))
934 rev
= reversed_comparison_code (XEXP (src
, 0), insn
);
936 return gen_rtx_fmt_ee (rev
, GET_MODE (XEXP (src
, 0)),
937 XEXP (XEXP (src
, 0), 0),
938 XEXP (XEXP (src
, 0), 1));
944 /* Return nonzero if CONDITION is more strict than the condition of
945 INSN, i.e., if INSN will always branch if CONDITION is true. */
948 condition_dominates_p (rtx condition
, rtx insn
)
950 rtx other_condition
= get_branch_condition (insn
, JUMP_LABEL (insn
));
951 enum rtx_code code
= GET_CODE (condition
);
952 enum rtx_code other_code
;
954 if (rtx_equal_p (condition
, other_condition
)
955 || other_condition
== const_true_rtx
)
958 else if (condition
== const_true_rtx
|| other_condition
== 0)
961 other_code
= GET_CODE (other_condition
);
962 if (GET_RTX_LENGTH (code
) != 2 || GET_RTX_LENGTH (other_code
) != 2
963 || ! rtx_equal_p (XEXP (condition
, 0), XEXP (other_condition
, 0))
964 || ! rtx_equal_p (XEXP (condition
, 1), XEXP (other_condition
, 1)))
967 return comparison_dominates_p (code
, other_code
);
970 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
971 any insns already in the delay slot of JUMP. */
974 redirect_with_delay_slots_safe_p (rtx jump
, rtx newlabel
, rtx seq
)
977 rtx pat
= PATTERN (seq
);
979 /* Make sure all the delay slots of this jump would still
980 be valid after threading the jump. If they are still
981 valid, then return nonzero. */
983 flags
= get_jump_flags (jump
, newlabel
);
984 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
986 #ifdef ANNUL_IFFALSE_SLOTS
987 (INSN_ANNULLED_BRANCH_P (jump
)
988 && INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
989 ? eligible_for_annul_false (jump
, i
- 1,
990 XVECEXP (pat
, 0, i
), flags
) :
992 #ifdef ANNUL_IFTRUE_SLOTS
993 (INSN_ANNULLED_BRANCH_P (jump
)
994 && ! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
995 ? eligible_for_annul_true (jump
, i
- 1,
996 XVECEXP (pat
, 0, i
), flags
) :
998 eligible_for_delay (jump
, i
- 1, XVECEXP (pat
, 0, i
), flags
)))
1001 return (i
== XVECLEN (pat
, 0));
1004 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1005 any insns we wish to place in the delay slot of JUMP. */
1008 redirect_with_delay_list_safe_p (rtx jump
, rtx newlabel
, rtx delay_list
)
1013 /* Make sure all the insns in DELAY_LIST would still be
1014 valid after threading the jump. If they are still
1015 valid, then return nonzero. */
1017 flags
= get_jump_flags (jump
, newlabel
);
1018 for (li
= delay_list
, i
= 0; li
; li
= XEXP (li
, 1), i
++)
1020 #ifdef ANNUL_IFFALSE_SLOTS
1021 (INSN_ANNULLED_BRANCH_P (jump
)
1022 && INSN_FROM_TARGET_P (XEXP (li
, 0)))
1023 ? eligible_for_annul_false (jump
, i
, XEXP (li
, 0), flags
) :
1025 #ifdef ANNUL_IFTRUE_SLOTS
1026 (INSN_ANNULLED_BRANCH_P (jump
)
1027 && ! INSN_FROM_TARGET_P (XEXP (li
, 0)))
1028 ? eligible_for_annul_true (jump
, i
, XEXP (li
, 0), flags
) :
1030 eligible_for_delay (jump
, i
, XEXP (li
, 0), flags
)))
1033 return (li
== NULL
);
1036 /* DELAY_LIST is a list of insns that have already been placed into delay
1037 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1038 If not, return 0; otherwise return 1. */
1041 check_annul_list_true_false (int annul_true_p
, rtx delay_list
)
1047 for (temp
= delay_list
; temp
; temp
= XEXP (temp
, 1))
1049 rtx trial
= XEXP (temp
, 0);
1051 if ((annul_true_p
&& INSN_FROM_TARGET_P (trial
))
1052 || (!annul_true_p
&& !INSN_FROM_TARGET_P (trial
)))
1060 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1061 the condition tested by INSN is CONDITION and the resources shown in
1062 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1063 from SEQ's delay list, in addition to whatever insns it may execute
1064 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1065 needed while searching for delay slot insns. Return the concatenated
1066 delay list if possible, otherwise, return 0.
1068 SLOTS_TO_FILL is the total number of slots required by INSN, and
1069 PSLOTS_FILLED points to the number filled so far (also the number of
1070 insns in DELAY_LIST). It is updated with the number that have been
1071 filled from the SEQUENCE, if any.
1073 PANNUL_P points to a nonzero value if we already know that we need
1074 to annul INSN. If this routine determines that annulling is needed,
1075 it may set that value nonzero.
1077 PNEW_THREAD points to a location that is to receive the place at which
1078 execution should continue. */
1081 steal_delay_list_from_target (rtx insn
, rtx condition
, rtx seq
,
1082 rtx delay_list
, struct resources
*sets
,
1083 struct resources
*needed
,
1084 struct resources
*other_needed
,
1085 int slots_to_fill
, int *pslots_filled
,
1086 int *pannul_p
, rtx
*pnew_thread
)
1089 int slots_remaining
= slots_to_fill
- *pslots_filled
;
1090 int total_slots_filled
= *pslots_filled
;
1091 rtx new_delay_list
= 0;
1092 int must_annul
= *pannul_p
;
1095 struct resources cc_set
;
1098 /* We can't do anything if there are more delay slots in SEQ than we
1099 can handle, or if we don't know that it will be a taken branch.
1100 We know that it will be a taken branch if it is either an unconditional
1101 branch or a conditional branch with a stricter branch condition.
1103 Also, exit if the branch has more than one set, since then it is computing
1104 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1105 ??? It may be possible to move other sets into INSN in addition to
1106 moving the instructions in the delay slots.
1108 We can not steal the delay list if one of the instructions in the
1109 current delay_list modifies the condition codes and the jump in the
1110 sequence is a conditional jump. We can not do this because we can
1111 not change the direction of the jump because the condition codes
1112 will effect the direction of the jump in the sequence. */
1114 CLEAR_RESOURCE (&cc_set
);
1115 for (temp
= delay_list
; temp
; temp
= XEXP (temp
, 1))
1117 rtx trial
= XEXP (temp
, 0);
1119 mark_set_resources (trial
, &cc_set
, 0, MARK_SRC_DEST_CALL
);
1120 if (insn_references_resource_p (XVECEXP (seq
, 0, 0), &cc_set
, false))
1124 if (XVECLEN (seq
, 0) - 1 > slots_remaining
1125 || ! condition_dominates_p (condition
, XVECEXP (seq
, 0, 0))
1126 || ! single_set (XVECEXP (seq
, 0, 0)))
1129 #ifdef MD_CAN_REDIRECT_BRANCH
1130 /* On some targets, branches with delay slots can have a limited
1131 displacement. Give the back end a chance to tell us we can't do
1133 if (! MD_CAN_REDIRECT_BRANCH (insn
, XVECEXP (seq
, 0, 0)))
1137 redundant
= XALLOCAVEC (bool, XVECLEN (seq
, 0));
1138 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
1140 rtx trial
= XVECEXP (seq
, 0, i
);
1143 if (insn_references_resource_p (trial
, sets
, false)
1144 || insn_sets_resource_p (trial
, needed
, false)
1145 || insn_sets_resource_p (trial
, sets
, false)
1147 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1149 || find_reg_note (trial
, REG_CC_USER
, NULL_RTX
)
1151 /* If TRIAL is from the fallthrough code of an annulled branch insn
1152 in SEQ, we cannot use it. */
1153 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq
, 0, 0))
1154 && ! INSN_FROM_TARGET_P (trial
)))
1157 /* If this insn was already done (usually in a previous delay slot),
1158 pretend we put it in our delay slot. */
1159 redundant
[i
] = redundant_insn (trial
, insn
, new_delay_list
);
1163 /* We will end up re-vectoring this branch, so compute flags
1164 based on jumping to the new label. */
1165 flags
= get_jump_flags (insn
, JUMP_LABEL (XVECEXP (seq
, 0, 0)));
1168 && ((condition
== const_true_rtx
1169 || (! insn_sets_resource_p (trial
, other_needed
, false)
1170 && ! may_trap_or_fault_p (PATTERN (trial
)))))
1171 ? eligible_for_delay (insn
, total_slots_filled
, trial
, flags
)
1172 : (must_annul
|| (delay_list
== NULL
&& new_delay_list
== NULL
))
1174 check_annul_list_true_false (0, delay_list
)
1175 && check_annul_list_true_false (0, new_delay_list
)
1176 && eligible_for_annul_false (insn
, total_slots_filled
,
1181 temp
= copy_delay_slot_insn (trial
);
1182 INSN_FROM_TARGET_P (temp
) = 1;
1183 new_delay_list
= add_to_delay_list (temp
, new_delay_list
);
1184 total_slots_filled
++;
1186 if (--slots_remaining
== 0)
1193 /* Record the effect of the instructions that were redundant and which
1194 we therefore decided not to copy. */
1195 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
1197 update_block (XVECEXP (seq
, 0, i
), insn
);
1199 /* Show the place to which we will be branching. */
1200 *pnew_thread
= first_active_target_insn (JUMP_LABEL (XVECEXP (seq
, 0, 0)));
1202 /* Add any new insns to the delay list and update the count of the
1203 number of slots filled. */
1204 *pslots_filled
= total_slots_filled
;
1208 if (delay_list
== 0)
1209 return new_delay_list
;
1211 for (temp
= new_delay_list
; temp
; temp
= XEXP (temp
, 1))
1212 delay_list
= add_to_delay_list (XEXP (temp
, 0), delay_list
);
1217 /* Similar to steal_delay_list_from_target except that SEQ is on the
1218 fallthrough path of INSN. Here we only do something if the delay insn
1219 of SEQ is an unconditional branch. In that case we steal its delay slot
1220 for INSN since unconditional branches are much easier to fill. */
1223 steal_delay_list_from_fallthrough (rtx insn
, rtx condition
, rtx seq
,
1224 rtx delay_list
, struct resources
*sets
,
1225 struct resources
*needed
,
1226 struct resources
*other_needed
,
1227 int slots_to_fill
, int *pslots_filled
,
1232 int must_annul
= *pannul_p
;
1235 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
1237 /* We can't do anything if SEQ's delay insn isn't an
1238 unconditional branch. */
1240 if (! simplejump_or_return_p (XVECEXP (seq
, 0, 0)))
1243 for (i
= 1; i
< XVECLEN (seq
, 0); i
++)
1245 rtx trial
= XVECEXP (seq
, 0, i
);
1247 /* If TRIAL sets CC0, stealing it will move it too far from the use
1249 if (insn_references_resource_p (trial
, sets
, false)
1250 || insn_sets_resource_p (trial
, needed
, false)
1251 || insn_sets_resource_p (trial
, sets
, false)
1253 || sets_cc0_p (PATTERN (trial
))
1259 /* If this insn was already done, we don't need it. */
1260 if (redundant_insn (trial
, insn
, delay_list
))
1262 update_block (trial
, insn
);
1263 delete_from_delay_slot (trial
);
1268 && ((condition
== const_true_rtx
1269 || (! insn_sets_resource_p (trial
, other_needed
, false)
1270 && ! may_trap_or_fault_p (PATTERN (trial
)))))
1271 ? eligible_for_delay (insn
, *pslots_filled
, trial
, flags
)
1272 : (must_annul
|| delay_list
== NULL
) && (must_annul
= 1,
1273 check_annul_list_true_false (1, delay_list
)
1274 && eligible_for_annul_true (insn
, *pslots_filled
, trial
, flags
)))
1278 delete_from_delay_slot (trial
);
1279 delay_list
= add_to_delay_list (trial
, delay_list
);
1281 if (++(*pslots_filled
) == slots_to_fill
)
1293 /* Try merging insns starting at THREAD which match exactly the insns in
1296 If all insns were matched and the insn was previously annulling, the
1297 annul bit will be cleared.
1299 For each insn that is merged, if the branch is or will be non-annulling,
1300 we delete the merged insn. */
1303 try_merge_delay_insns (rtx insn
, rtx thread
)
1305 rtx trial
, next_trial
;
1306 rtx delay_insn
= XVECEXP (PATTERN (insn
), 0, 0);
1307 int annul_p
= JUMP_P (delay_insn
) && INSN_ANNULLED_BRANCH_P (delay_insn
);
1308 int slot_number
= 1;
1309 int num_slots
= XVECLEN (PATTERN (insn
), 0);
1310 rtx next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1311 struct resources set
, needed
;
1312 rtx merged_insns
= 0;
1316 flags
= get_jump_flags (delay_insn
, JUMP_LABEL (delay_insn
));
1318 CLEAR_RESOURCE (&needed
);
1319 CLEAR_RESOURCE (&set
);
1321 /* If this is not an annulling branch, take into account anything needed in
1322 INSN's delay slot. This prevents two increments from being incorrectly
1323 folded into one. If we are annulling, this would be the correct
1324 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1325 will essentially disable this optimization. This method is somewhat of
1326 a kludge, but I don't see a better way.) */
1328 for (i
= 1 ; i
< num_slots
; i
++)
1329 if (XVECEXP (PATTERN (insn
), 0, i
))
1330 mark_referenced_resources (XVECEXP (PATTERN (insn
), 0, i
), &needed
,
1333 for (trial
= thread
; !stop_search_p (trial
, 1); trial
= next_trial
)
1335 rtx pat
= PATTERN (trial
);
1336 rtx oldtrial
= trial
;
1338 next_trial
= next_nonnote_insn (trial
);
1340 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1341 if (NONJUMP_INSN_P (trial
)
1342 && (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
))
1345 if (GET_CODE (next_to_match
) == GET_CODE (trial
)
1347 /* We can't share an insn that sets cc0. */
1348 && ! sets_cc0_p (pat
)
1350 && ! insn_references_resource_p (trial
, &set
, true)
1351 && ! insn_sets_resource_p (trial
, &set
, true)
1352 && ! insn_sets_resource_p (trial
, &needed
, true)
1353 && (trial
= try_split (pat
, trial
, 0)) != 0
1354 /* Update next_trial, in case try_split succeeded. */
1355 && (next_trial
= next_nonnote_insn (trial
))
1356 /* Likewise THREAD. */
1357 && (thread
= oldtrial
== thread
? trial
: thread
)
1358 && rtx_equal_p (PATTERN (next_to_match
), PATTERN (trial
))
1359 /* Have to test this condition if annul condition is different
1360 from (and less restrictive than) non-annulling one. */
1361 && eligible_for_delay (delay_insn
, slot_number
- 1, trial
, flags
))
1366 update_block (trial
, thread
);
1367 if (trial
== thread
)
1368 thread
= next_active_insn (thread
);
1370 delete_related_insns (trial
);
1371 INSN_FROM_TARGET_P (next_to_match
) = 0;
1374 merged_insns
= gen_rtx_INSN_LIST (VOIDmode
, trial
, merged_insns
);
1376 if (++slot_number
== num_slots
)
1379 next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1382 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
1383 mark_referenced_resources (trial
, &needed
, true);
1386 /* See if we stopped on a filled insn. If we did, try to see if its
1387 delay slots match. */
1388 if (slot_number
!= num_slots
1389 && trial
&& NONJUMP_INSN_P (trial
)
1390 && GET_CODE (PATTERN (trial
)) == SEQUENCE
1391 && !(JUMP_P (XVECEXP (PATTERN (trial
), 0, 0))
1392 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial
), 0, 0))))
1394 rtx pat
= PATTERN (trial
);
1395 rtx filled_insn
= XVECEXP (pat
, 0, 0);
1397 /* Account for resources set/needed by the filled insn. */
1398 mark_set_resources (filled_insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1399 mark_referenced_resources (filled_insn
, &needed
, true);
1401 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
1403 rtx dtrial
= XVECEXP (pat
, 0, i
);
1405 if (! insn_references_resource_p (dtrial
, &set
, true)
1406 && ! insn_sets_resource_p (dtrial
, &set
, true)
1407 && ! insn_sets_resource_p (dtrial
, &needed
, true)
1409 && ! sets_cc0_p (PATTERN (dtrial
))
1411 && rtx_equal_p (PATTERN (next_to_match
), PATTERN (dtrial
))
1412 && eligible_for_delay (delay_insn
, slot_number
- 1, dtrial
, flags
))
1418 update_block (dtrial
, thread
);
1419 new_rtx
= delete_from_delay_slot (dtrial
);
1420 if (INSN_DELETED_P (thread
))
1422 INSN_FROM_TARGET_P (next_to_match
) = 0;
1425 merged_insns
= gen_rtx_INSN_LIST (SImode
, dtrial
,
1428 if (++slot_number
== num_slots
)
1431 next_to_match
= XVECEXP (PATTERN (insn
), 0, slot_number
);
1435 /* Keep track of the set/referenced resources for the delay
1436 slots of any trial insns we encounter. */
1437 mark_set_resources (dtrial
, &set
, 0, MARK_SRC_DEST_CALL
);
1438 mark_referenced_resources (dtrial
, &needed
, true);
1443 /* If all insns in the delay slot have been matched and we were previously
1444 annulling the branch, we need not any more. In that case delete all the
1445 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1446 the delay list so that we know that it isn't only being used at the
1448 if (slot_number
== num_slots
&& annul_p
)
1450 for (; merged_insns
; merged_insns
= XEXP (merged_insns
, 1))
1452 if (GET_MODE (merged_insns
) == SImode
)
1456 update_block (XEXP (merged_insns
, 0), thread
);
1457 new_rtx
= delete_from_delay_slot (XEXP (merged_insns
, 0));
1458 if (INSN_DELETED_P (thread
))
1463 update_block (XEXP (merged_insns
, 0), thread
);
1464 delete_related_insns (XEXP (merged_insns
, 0));
1468 INSN_ANNULLED_BRANCH_P (delay_insn
) = 0;
1470 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1471 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
)) = 0;
1475 /* See if INSN is redundant with an insn in front of TARGET. Often this
1476 is called when INSN is a candidate for a delay slot of TARGET.
1477 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1478 of INSN. Often INSN will be redundant with an insn in a delay slot of
1479 some previous insn. This happens when we have a series of branches to the
1480 same label; in that case the first insn at the target might want to go
1481 into each of the delay slots.
1483 If we are not careful, this routine can take up a significant fraction
1484 of the total compilation time (4%), but only wins rarely. Hence we
1485 speed this routine up by making two passes. The first pass goes back
1486 until it hits a label and sees if it finds an insn with an identical
1487 pattern. Only in this (relatively rare) event does it check for
1490 We do not split insns we encounter. This could cause us not to find a
1491 redundant insn, but the cost of splitting seems greater than the possible
1492 gain in rare cases. */
1495 redundant_insn (rtx insn
, rtx target
, rtx delay_list
)
1497 rtx target_main
= target
;
1498 rtx ipat
= PATTERN (insn
);
1500 struct resources needed
, set
;
1502 unsigned insns_to_search
;
1504 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1505 are allowed to not actually assign to such a register. */
1506 if (find_reg_note (insn
, REG_UNUSED
, NULL_RTX
) != 0)
1509 /* Scan backwards looking for a match. */
1510 for (trial
= PREV_INSN (target
),
1511 insns_to_search
= MAX_DELAY_SLOT_INSN_SEARCH
;
1512 trial
&& insns_to_search
> 0;
1513 trial
= PREV_INSN (trial
))
1515 if (LABEL_P (trial
))
1518 if (!INSN_P (trial
))
1522 pat
= PATTERN (trial
);
1523 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
1526 if (GET_CODE (pat
) == SEQUENCE
)
1528 /* Stop for a CALL and its delay slots because it is difficult to
1529 track its resource needs correctly. */
1530 if (CALL_P (XVECEXP (pat
, 0, 0)))
1533 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1534 slots because it is difficult to track its resource needs
1537 #ifdef INSN_SETS_ARE_DELAYED
1538 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat
, 0, 0)))
1542 #ifdef INSN_REFERENCES_ARE_DELAYED
1543 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat
, 0, 0)))
1547 /* See if any of the insns in the delay slot match, updating
1548 resource requirements as we go. */
1549 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; i
--)
1550 if (GET_CODE (XVECEXP (pat
, 0, i
)) == GET_CODE (insn
)
1551 && rtx_equal_p (PATTERN (XVECEXP (pat
, 0, i
)), ipat
)
1552 && ! find_reg_note (XVECEXP (pat
, 0, i
), REG_UNUSED
, NULL_RTX
))
1555 /* If found a match, exit this loop early. */
1560 else if (GET_CODE (trial
) == GET_CODE (insn
) && rtx_equal_p (pat
, ipat
)
1561 && ! find_reg_note (trial
, REG_UNUSED
, NULL_RTX
))
1565 /* If we didn't find an insn that matches, return 0. */
1569 /* See what resources this insn sets and needs. If they overlap, or
1570 if this insn references CC0, it can't be redundant. */
1572 CLEAR_RESOURCE (&needed
);
1573 CLEAR_RESOURCE (&set
);
1574 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
1575 mark_referenced_resources (insn
, &needed
, true);
1577 /* If TARGET is a SEQUENCE, get the main insn. */
1578 if (NONJUMP_INSN_P (target
) && GET_CODE (PATTERN (target
)) == SEQUENCE
)
1579 target_main
= XVECEXP (PATTERN (target
), 0, 0);
1581 if (resource_conflicts_p (&needed
, &set
)
1583 || reg_mentioned_p (cc0_rtx
, ipat
)
1585 /* The insn requiring the delay may not set anything needed or set by
1587 || insn_sets_resource_p (target_main
, &needed
, true)
1588 || insn_sets_resource_p (target_main
, &set
, true))
1591 /* Insns we pass may not set either NEEDED or SET, so merge them for
1593 needed
.memory
|= set
.memory
;
1594 IOR_HARD_REG_SET (needed
.regs
, set
.regs
);
1596 /* This insn isn't redundant if it conflicts with an insn that either is
1597 or will be in a delay slot of TARGET. */
1601 if (insn_sets_resource_p (XEXP (delay_list
, 0), &needed
, true))
1603 delay_list
= XEXP (delay_list
, 1);
1606 if (NONJUMP_INSN_P (target
) && GET_CODE (PATTERN (target
)) == SEQUENCE
)
1607 for (i
= 1; i
< XVECLEN (PATTERN (target
), 0); i
++)
1608 if (insn_sets_resource_p (XVECEXP (PATTERN (target
), 0, i
), &needed
,
1612 /* Scan backwards until we reach a label or an insn that uses something
1613 INSN sets or sets something insn uses or sets. */
1615 for (trial
= PREV_INSN (target
),
1616 insns_to_search
= MAX_DELAY_SLOT_INSN_SEARCH
;
1617 trial
&& !LABEL_P (trial
) && insns_to_search
> 0;
1618 trial
= PREV_INSN (trial
))
1620 if (!INSN_P (trial
))
1624 pat
= PATTERN (trial
);
1625 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
1628 if (GET_CODE (pat
) == SEQUENCE
)
1630 bool annul_p
= false;
1631 rtx control
= XVECEXP (pat
, 0, 0);
1633 /* If this is a CALL_INSN and its delay slots, it is hard to track
1634 the resource needs properly, so give up. */
1635 if (CALL_P (control
))
1638 /* If this is an INSN or JUMP_INSN with delayed effects, it
1639 is hard to track the resource needs properly, so give up. */
1641 #ifdef INSN_SETS_ARE_DELAYED
1642 if (INSN_SETS_ARE_DELAYED (control
))
1646 #ifdef INSN_REFERENCES_ARE_DELAYED
1647 if (INSN_REFERENCES_ARE_DELAYED (control
))
1651 if (JUMP_P (control
))
1652 annul_p
= INSN_ANNULLED_BRANCH_P (control
);
1654 /* See if any of the insns in the delay slot match, updating
1655 resource requirements as we go. */
1656 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; i
--)
1658 rtx candidate
= XVECEXP (pat
, 0, i
);
1660 /* If an insn will be annulled if the branch is false, it isn't
1661 considered as a possible duplicate insn. */
1662 if (rtx_equal_p (PATTERN (candidate
), ipat
)
1663 && ! (annul_p
&& INSN_FROM_TARGET_P (candidate
)))
1665 /* Show that this insn will be used in the sequel. */
1666 INSN_FROM_TARGET_P (candidate
) = 0;
1670 /* Unless this is an annulled insn from the target of a branch,
1671 we must stop if it sets anything needed or set by INSN. */
1672 if ((!annul_p
|| !INSN_FROM_TARGET_P (candidate
))
1673 && insn_sets_resource_p (candidate
, &needed
, true))
1677 /* If the insn requiring the delay slot conflicts with INSN, we
1679 if (insn_sets_resource_p (control
, &needed
, true))
1684 /* See if TRIAL is the same as INSN. */
1685 pat
= PATTERN (trial
);
1686 if (rtx_equal_p (pat
, ipat
))
1689 /* Can't go any further if TRIAL conflicts with INSN. */
1690 if (insn_sets_resource_p (trial
, &needed
, true))
1698 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1699 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1700 is nonzero, we are allowed to fall into this thread; otherwise, we are
1703 If LABEL is used more than one or we pass a label other than LABEL before
1704 finding an active insn, we do not own this thread. */
1707 own_thread_p (rtx thread
, rtx label
, int allow_fallthrough
)
1712 /* We don't own the function end. */
1713 if (thread
== 0 || ANY_RETURN_P (thread
))
1716 /* Get the first active insn, or THREAD, if it is an active insn. */
1717 active_insn
= next_active_insn (PREV_INSN (thread
));
1719 for (insn
= thread
; insn
!= active_insn
; insn
= NEXT_INSN (insn
))
1721 && (insn
!= label
|| LABEL_NUSES (insn
) != 1))
1724 if (allow_fallthrough
)
1727 /* Ensure that we reach a BARRIER before any insn or label. */
1728 for (insn
= prev_nonnote_insn (thread
);
1729 insn
== 0 || !BARRIER_P (insn
);
1730 insn
= prev_nonnote_insn (insn
))
1733 || (NONJUMP_INSN_P (insn
)
1734 && GET_CODE (PATTERN (insn
)) != USE
1735 && GET_CODE (PATTERN (insn
)) != CLOBBER
))
1741 /* Called when INSN is being moved from a location near the target of a jump.
1742 We leave a marker of the form (use (INSN)) immediately in front
1743 of WHERE for mark_target_live_regs. These markers will be deleted when
1746 We used to try to update the live status of registers if WHERE is at
1747 the start of a basic block, but that can't work since we may remove a
1748 BARRIER in relax_delay_slots. */
1751 update_block (rtx insn
, rtx where
)
1753 /* Ignore if this was in a delay slot and it came from the target of
1755 if (INSN_FROM_TARGET_P (insn
))
1758 emit_insn_before (gen_rtx_USE (VOIDmode
, insn
), where
);
1760 /* INSN might be making a value live in a block where it didn't use to
1761 be. So recompute liveness information for this block. */
1763 incr_ticks_for_insn (insn
);
1766 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1767 the basic block containing the jump. */
1770 reorg_redirect_jump (rtx jump
, rtx nlabel
)
1772 incr_ticks_for_insn (jump
);
1773 return redirect_jump (jump
, nlabel
, 1);
1776 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1777 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1778 that reference values used in INSN. If we find one, then we move the
1779 REG_DEAD note to INSN.
1781 This is needed to handle the case where a later insn (after INSN) has a
1782 REG_DEAD note for a register used by INSN, and this later insn subsequently
1783 gets moved before a CODE_LABEL because it is a redundant insn. In this
1784 case, mark_target_live_regs may be confused into thinking the register
1785 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1788 update_reg_dead_notes (rtx insn
, rtx delayed_insn
)
1792 for (p
= next_nonnote_insn (insn
); p
!= delayed_insn
;
1793 p
= next_nonnote_insn (p
))
1794 for (link
= REG_NOTES (p
); link
; link
= next
)
1796 next
= XEXP (link
, 1);
1798 if (REG_NOTE_KIND (link
) != REG_DEAD
1799 || !REG_P (XEXP (link
, 0)))
1802 if (reg_referenced_p (XEXP (link
, 0), PATTERN (insn
)))
1804 /* Move the REG_DEAD note from P to INSN. */
1805 remove_note (p
, link
);
1806 XEXP (link
, 1) = REG_NOTES (insn
);
1807 REG_NOTES (insn
) = link
;
1812 /* Called when an insn redundant with start_insn is deleted. If there
1813 is a REG_DEAD note for the target of start_insn between start_insn
1814 and stop_insn, then the REG_DEAD note needs to be deleted since the
1815 value no longer dies there.
1817 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1818 confused into thinking the register is dead. */
1821 fix_reg_dead_note (rtx start_insn
, rtx stop_insn
)
1825 for (p
= next_nonnote_insn (start_insn
); p
!= stop_insn
;
1826 p
= next_nonnote_insn (p
))
1827 for (link
= REG_NOTES (p
); link
; link
= next
)
1829 next
= XEXP (link
, 1);
1831 if (REG_NOTE_KIND (link
) != REG_DEAD
1832 || !REG_P (XEXP (link
, 0)))
1835 if (reg_set_p (XEXP (link
, 0), PATTERN (start_insn
)))
1837 remove_note (p
, link
);
1843 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1845 This handles the case of udivmodXi4 instructions which optimize their
1846 output depending on whether any REG_UNUSED notes are present.
1847 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1851 update_reg_unused_notes (rtx insn
, rtx redundant_insn
)
1855 for (link
= REG_NOTES (insn
); link
; link
= next
)
1857 next
= XEXP (link
, 1);
1859 if (REG_NOTE_KIND (link
) != REG_UNUSED
1860 || !REG_P (XEXP (link
, 0)))
1863 if (! find_regno_note (redundant_insn
, REG_UNUSED
,
1864 REGNO (XEXP (link
, 0))))
1865 remove_note (insn
, link
);
1869 static vec
<rtx
> sibling_labels
;
1871 /* Return the label before INSN, or put a new label there. If SIBLING is
1872 non-zero, it is another label associated with the new label (if any),
1873 typically the former target of the jump that will be redirected to
1877 get_label_before (rtx insn
, rtx sibling
)
1881 /* Find an existing label at this point
1882 or make a new one if there is none. */
1883 label
= prev_nonnote_insn (insn
);
1885 if (label
== 0 || !LABEL_P (label
))
1887 rtx prev
= PREV_INSN (insn
);
1889 label
= gen_label_rtx ();
1890 emit_label_after (label
, prev
);
1891 LABEL_NUSES (label
) = 0;
1894 sibling_labels
.safe_push (label
);
1895 sibling_labels
.safe_push (sibling
);
1901 /* Scan a function looking for insns that need a delay slot and find insns to
1902 put into the delay slot.
1904 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1905 as calls). We do these first since we don't want jump insns (that are
1906 easier to fill) to get the only insns that could be used for non-jump insns.
1907 When it is zero, only try to fill JUMP_INSNs.
1909 When slots are filled in this manner, the insns (including the
1910 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1911 it is possible to tell whether a delay slot has really been filled
1912 or not. `final' knows how to deal with this, by communicating
1913 through FINAL_SEQUENCE. */
1916 fill_simple_delay_slots (int non_jumps_p
)
1918 rtx insn
, pat
, trial
, next_trial
;
1920 int num_unfilled_slots
= unfilled_slots_next
- unfilled_slots_base
;
1921 struct resources needed
, set
;
1922 int slots_to_fill
, slots_filled
;
1925 for (i
= 0; i
< num_unfilled_slots
; i
++)
1928 /* Get the next insn to fill. If it has already had any slots assigned,
1929 we can't do anything with it. Maybe we'll improve this later. */
1931 insn
= unfilled_slots_base
[i
];
1933 || INSN_DELETED_P (insn
)
1934 || (NONJUMP_INSN_P (insn
)
1935 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1936 || (JUMP_P (insn
) && non_jumps_p
)
1937 || (!JUMP_P (insn
) && ! non_jumps_p
))
1940 /* It may have been that this insn used to need delay slots, but
1941 now doesn't; ignore in that case. This can happen, for example,
1942 on the HP PA RISC, where the number of delay slots depends on
1943 what insns are nearby. */
1944 slots_to_fill
= num_delay_slots (insn
);
1946 /* Some machine description have defined instructions to have
1947 delay slots only in certain circumstances which may depend on
1948 nearby insns (which change due to reorg's actions).
1950 For example, the PA port normally has delay slots for unconditional
1953 However, the PA port claims such jumps do not have a delay slot
1954 if they are immediate successors of certain CALL_INSNs. This
1955 allows the port to favor filling the delay slot of the call with
1956 the unconditional jump. */
1957 if (slots_to_fill
== 0)
1960 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1961 says how many. After initialization, first try optimizing
1964 nop add %o7,.-L1,%o7
1968 If this case applies, the delay slot of the call is filled with
1969 the unconditional jump. This is done first to avoid having the
1970 delay slot of the call filled in the backward scan. Also, since
1971 the unconditional jump is likely to also have a delay slot, that
1972 insn must exist when it is subsequently scanned.
1974 This is tried on each insn with delay slots as some machines
1975 have insns which perform calls, but are not represented as
1982 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
1984 flags
= get_jump_flags (insn
, NULL_RTX
);
1986 if ((trial
= next_active_insn (insn
))
1988 && simplejump_p (trial
)
1989 && eligible_for_delay (insn
, slots_filled
, trial
, flags
)
1990 && no_labels_between_p (insn
, trial
)
1991 && ! can_throw_internal (trial
))
1995 delay_list
= add_to_delay_list (trial
, delay_list
);
1997 /* TRIAL may have had its delay slot filled, then unfilled. When
1998 the delay slot is unfilled, TRIAL is placed back on the unfilled
1999 slots obstack. Unfortunately, it is placed on the end of the
2000 obstack, not in its original location. Therefore, we must search
2001 from entry i + 1 to the end of the unfilled slots obstack to
2002 try and find TRIAL. */
2003 tmp
= &unfilled_slots_base
[i
+ 1];
2004 while (*tmp
!= trial
&& tmp
!= unfilled_slots_next
)
2007 /* Remove the unconditional jump from consideration for delay slot
2008 filling and unthread it. */
2012 rtx next
= NEXT_INSN (trial
);
2013 rtx prev
= PREV_INSN (trial
);
2015 NEXT_INSN (prev
) = next
;
2017 PREV_INSN (next
) = prev
;
2021 /* Now, scan backwards from the insn to search for a potential
2022 delay-slot candidate. Stop searching when a label or jump is hit.
2024 For each candidate, if it is to go into the delay slot (moved
2025 forward in execution sequence), it must not need or set any resources
2026 that were set by later insns and must not set any resources that
2027 are needed for those insns.
2029 The delay slot insn itself sets resources unless it is a call
2030 (in which case the called routine, not the insn itself, is doing
2033 if (slots_filled
< slots_to_fill
)
2035 CLEAR_RESOURCE (&needed
);
2036 CLEAR_RESOURCE (&set
);
2037 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST
);
2038 mark_referenced_resources (insn
, &needed
, false);
2040 for (trial
= prev_nonnote_insn (insn
); ! stop_search_p (trial
, 1);
2043 next_trial
= prev_nonnote_insn (trial
);
2045 /* This must be an INSN or CALL_INSN. */
2046 pat
= PATTERN (trial
);
2048 /* Stand-alone USE and CLOBBER are just for flow. */
2049 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2052 /* Check for resource conflict first, to avoid unnecessary
2054 if (! insn_references_resource_p (trial
, &set
, true)
2055 && ! insn_sets_resource_p (trial
, &set
, true)
2056 && ! insn_sets_resource_p (trial
, &needed
, true)
2058 /* Can't separate set of cc0 from its use. */
2059 && ! (reg_mentioned_p (cc0_rtx
, pat
) && ! sets_cc0_p (pat
))
2061 && ! can_throw_internal (trial
))
2063 trial
= try_split (pat
, trial
, 1);
2064 next_trial
= prev_nonnote_insn (trial
);
2065 if (eligible_for_delay (insn
, slots_filled
, trial
, flags
))
2067 /* In this case, we are searching backward, so if we
2068 find insns to put on the delay list, we want
2069 to put them at the head, rather than the
2070 tail, of the list. */
2072 update_reg_dead_notes (trial
, insn
);
2073 delay_list
= gen_rtx_INSN_LIST (VOIDmode
,
2075 update_block (trial
, trial
);
2076 delete_related_insns (trial
);
2077 if (slots_to_fill
== ++slots_filled
)
2083 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2084 mark_referenced_resources (trial
, &needed
, true);
2088 /* If all needed slots haven't been filled, we come here. */
2090 /* Try to optimize case of jumping around a single insn. */
2091 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2092 if (slots_filled
!= slots_to_fill
2095 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
2096 && !ANY_RETURN_P (JUMP_LABEL (insn
)))
2098 delay_list
= optimize_skip (insn
);
2104 /* Try to get insns from beyond the insn needing the delay slot.
2105 These insns can neither set or reference resources set in insns being
2106 skipped, cannot set resources in the insn being skipped, and, if this
2107 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2108 call might not return).
2110 There used to be code which continued past the target label if
2111 we saw all uses of the target label. This code did not work,
2112 because it failed to account for some instructions which were
2113 both annulled and marked as from the target. This can happen as a
2114 result of optimize_skip. Since this code was redundant with
2115 fill_eager_delay_slots anyways, it was just deleted. */
2117 if (slots_filled
!= slots_to_fill
2118 /* If this instruction could throw an exception which is
2119 caught in the same function, then it's not safe to fill
2120 the delay slot with an instruction from beyond this
2121 point. For example, consider:
2132 Even though `i' is a local variable, we must be sure not
2133 to put `i = 3' in the delay slot if `f' might throw an
2136 Presumably, we should also check to see if we could get
2137 back to this function via `setjmp'. */
2138 && ! can_throw_internal (insn
)
2141 int maybe_never
= 0;
2142 rtx pat
, trial_delay
;
2144 CLEAR_RESOURCE (&needed
);
2145 CLEAR_RESOURCE (&set
);
2146 mark_set_resources (insn
, &set
, 0, MARK_SRC_DEST_CALL
);
2147 mark_referenced_resources (insn
, &needed
, true);
2152 for (trial
= next_nonnote_insn (insn
); !stop_search_p (trial
, 1);
2155 next_trial
= next_nonnote_insn (trial
);
2157 /* This must be an INSN or CALL_INSN. */
2158 pat
= PATTERN (trial
);
2160 /* Stand-alone USE and CLOBBER are just for flow. */
2161 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2164 /* If this already has filled delay slots, get the insn needing
2166 if (GET_CODE (pat
) == SEQUENCE
)
2167 trial_delay
= XVECEXP (pat
, 0, 0);
2169 trial_delay
= trial
;
2171 /* Stop our search when seeing a jump. */
2172 if (JUMP_P (trial_delay
))
2175 /* See if we have a resource problem before we try to split. */
2176 if (GET_CODE (pat
) != SEQUENCE
2177 && ! insn_references_resource_p (trial
, &set
, true)
2178 && ! insn_sets_resource_p (trial
, &set
, true)
2179 && ! insn_sets_resource_p (trial
, &needed
, true)
2181 && ! (reg_mentioned_p (cc0_rtx
, pat
) && ! sets_cc0_p (pat
))
2183 && ! (maybe_never
&& may_trap_or_fault_p (pat
))
2184 && (trial
= try_split (pat
, trial
, 0))
2185 && eligible_for_delay (insn
, slots_filled
, trial
, flags
)
2186 && ! can_throw_internal (trial
))
2188 next_trial
= next_nonnote_insn (trial
);
2189 delay_list
= add_to_delay_list (trial
, delay_list
);
2191 if (reg_mentioned_p (cc0_rtx
, pat
))
2192 link_cc0_insns (trial
);
2194 delete_related_insns (trial
);
2195 if (slots_to_fill
== ++slots_filled
)
2200 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2201 mark_referenced_resources (trial
, &needed
, true);
2203 /* Ensure we don't put insns between the setting of cc and the
2204 comparison by moving a setting of cc into an earlier delay
2205 slot since these insns could clobber the condition code. */
2208 /* If this is a call, we might not get here. */
2209 if (CALL_P (trial_delay
))
2213 /* If there are slots left to fill and our search was stopped by an
2214 unconditional branch, try the insn at the branch target. We can
2215 redirect the branch if it works.
2217 Don't do this if the insn at the branch target is a branch. */
2218 if (slots_to_fill
!= slots_filled
2220 && jump_to_label_p (trial
)
2221 && simplejump_p (trial
)
2222 && (next_trial
= next_active_insn (JUMP_LABEL (trial
))) != 0
2223 && ! (NONJUMP_INSN_P (next_trial
)
2224 && GET_CODE (PATTERN (next_trial
)) == SEQUENCE
)
2225 && !JUMP_P (next_trial
)
2226 && ! insn_references_resource_p (next_trial
, &set
, true)
2227 && ! insn_sets_resource_p (next_trial
, &set
, true)
2228 && ! insn_sets_resource_p (next_trial
, &needed
, true)
2230 && ! reg_mentioned_p (cc0_rtx
, PATTERN (next_trial
))
2232 && ! (maybe_never
&& may_trap_or_fault_p (PATTERN (next_trial
)))
2233 && (next_trial
= try_split (PATTERN (next_trial
), next_trial
, 0))
2234 && eligible_for_delay (insn
, slots_filled
, next_trial
, flags
)
2235 && ! can_throw_internal (trial
))
2237 /* See comment in relax_delay_slots about necessity of using
2238 next_real_insn here. */
2239 rtx new_label
= next_real_insn (next_trial
);
2242 new_label
= get_label_before (new_label
, JUMP_LABEL (trial
));
2244 new_label
= find_end_label (simple_return_rtx
);
2249 = add_to_delay_list (copy_delay_slot_insn (next_trial
),
2252 reorg_redirect_jump (trial
, new_label
);
2257 /* If this is an unconditional jump, then try to get insns from the
2258 target of the jump. */
2260 && simplejump_p (insn
)
2261 && slots_filled
!= slots_to_fill
)
2263 = fill_slots_from_thread (insn
, const_true_rtx
,
2264 next_active_insn (JUMP_LABEL (insn
)),
2266 own_thread_p (JUMP_LABEL (insn
),
2267 JUMP_LABEL (insn
), 0),
2268 slots_to_fill
, &slots_filled
,
2272 unfilled_slots_base
[i
]
2273 = emit_delay_sequence (insn
, delay_list
, slots_filled
);
2275 if (slots_to_fill
== slots_filled
)
2276 unfilled_slots_base
[i
] = 0;
2278 note_delay_statistics (slots_filled
, 0);
2282 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2283 return the ultimate label reached by any such chain of jumps.
2284 Return a suitable return rtx if the chain ultimately leads to a
2286 If LABEL is not followed by a jump, return LABEL.
2287 If the chain loops or we can't find end, return LABEL,
2288 since that tells caller to avoid changing the insn.
2289 If the returned label is obtained by following a REG_CROSSING_JUMP
2290 jump, set *CROSSING to true, otherwise set it to false. */
2293 follow_jumps (rtx label
, rtx jump
, bool *crossing
)
2301 if (ANY_RETURN_P (label
))
2305 && (insn
= next_active_insn (value
)) != 0
2307 && JUMP_LABEL (insn
) != NULL_RTX
2308 && ((any_uncondjump_p (insn
) && onlyjump_p (insn
))
2309 || ANY_RETURN_P (PATTERN (insn
)))
2310 && (next
= NEXT_INSN (insn
))
2311 && BARRIER_P (next
));
2314 rtx this_label
= JUMP_LABEL (insn
);
2316 /* If we have found a cycle, make the insn jump to itself. */
2317 if (this_label
== label
)
2320 /* Cannot follow returns and cannot look through tablejumps. */
2321 if (ANY_RETURN_P (this_label
))
2323 if (NEXT_INSN (this_label
)
2324 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label
)))
2327 if (!targetm
.can_follow_jump (jump
, insn
))
2331 = find_reg_note (insn
, REG_CROSSING_JUMP
, NULL_RTX
) != NULL_RTX
;
2339 /* Try to find insns to place in delay slots.
2341 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2342 or is an unconditional branch if CONDITION is const_true_rtx.
2343 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2345 THREAD is a flow-of-control, either the insns to be executed if the
2346 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2348 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2349 to see if any potential delay slot insns set things needed there.
2351 LIKELY is nonzero if it is extremely likely that the branch will be
2352 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2353 end of a loop back up to the top.
2355 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2356 thread. I.e., it is the fallthrough code of our jump or the target of the
2357 jump when we are the only jump going there.
2359 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2360 case, we can only take insns from the head of the thread for our delay
2361 slot. We then adjust the jump to point after the insns we have taken. */
2364 fill_slots_from_thread (rtx insn
, rtx condition
, rtx thread
,
2365 rtx opposite_thread
, int likely
, int thread_if_true
,
2366 int own_thread
, int slots_to_fill
,
2367 int *pslots_filled
, rtx delay_list
)
2370 struct resources opposite_needed
, set
, needed
;
2376 /* Validate our arguments. */
2377 gcc_assert (condition
!= const_true_rtx
|| thread_if_true
);
2378 gcc_assert (own_thread
|| thread_if_true
);
2380 flags
= get_jump_flags (insn
, JUMP_LABEL (insn
));
2382 /* If our thread is the end of subroutine, we can't get any delay
2384 if (thread
== NULL_RTX
|| ANY_RETURN_P (thread
))
2387 /* If this is an unconditional branch, nothing is needed at the
2388 opposite thread. Otherwise, compute what is needed there. */
2389 if (condition
== const_true_rtx
)
2390 CLEAR_RESOURCE (&opposite_needed
);
2392 mark_target_live_regs (get_insns (), opposite_thread
, &opposite_needed
);
2394 /* If the insn at THREAD can be split, do it here to avoid having to
2395 update THREAD and NEW_THREAD if it is done in the loop below. Also
2396 initialize NEW_THREAD. */
2398 new_thread
= thread
= try_split (PATTERN (thread
), thread
, 0);
2400 /* Scan insns at THREAD. We are looking for an insn that can be removed
2401 from THREAD (it neither sets nor references resources that were set
2402 ahead of it and it doesn't set anything needs by the insns ahead of
2403 it) and that either can be placed in an annulling insn or aren't
2404 needed at OPPOSITE_THREAD. */
2406 CLEAR_RESOURCE (&needed
);
2407 CLEAR_RESOURCE (&set
);
2409 /* If we do not own this thread, we must stop as soon as we find
2410 something that we can't put in a delay slot, since all we can do
2411 is branch into THREAD at a later point. Therefore, labels stop
2412 the search if this is not the `true' thread. */
2414 for (trial
= thread
;
2415 ! stop_search_p (trial
, ! thread_if_true
) && (! lose
|| own_thread
);
2416 trial
= next_nonnote_insn (trial
))
2420 /* If we have passed a label, we no longer own this thread. */
2421 if (LABEL_P (trial
))
2427 pat
= PATTERN (trial
);
2428 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
2431 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2432 don't separate or copy insns that set and use CC0. */
2433 if (! insn_references_resource_p (trial
, &set
, true)
2434 && ! insn_sets_resource_p (trial
, &set
, true)
2435 && ! insn_sets_resource_p (trial
, &needed
, true)
2437 && ! (reg_mentioned_p (cc0_rtx
, pat
)
2438 && (! own_thread
|| ! sets_cc0_p (pat
)))
2440 && ! can_throw_internal (trial
))
2444 /* If TRIAL is redundant with some insn before INSN, we don't
2445 actually need to add it to the delay list; we can merely pretend
2447 if ((prior_insn
= redundant_insn (trial
, insn
, delay_list
)))
2449 fix_reg_dead_note (prior_insn
, insn
);
2452 update_block (trial
, thread
);
2453 if (trial
== thread
)
2455 thread
= next_active_insn (thread
);
2456 if (new_thread
== trial
)
2457 new_thread
= thread
;
2460 delete_related_insns (trial
);
2464 update_reg_unused_notes (prior_insn
, trial
);
2465 new_thread
= next_active_insn (trial
);
2471 /* There are two ways we can win: If TRIAL doesn't set anything
2472 needed at the opposite thread and can't trap, or if it can
2473 go into an annulled delay slot. */
2475 && (condition
== const_true_rtx
2476 || (! insn_sets_resource_p (trial
, &opposite_needed
, true)
2477 && ! may_trap_or_fault_p (pat
)
2478 && ! RTX_FRAME_RELATED_P (trial
))))
2481 trial
= try_split (pat
, trial
, 0);
2482 if (new_thread
== old_trial
)
2484 if (thread
== old_trial
)
2486 pat
= PATTERN (trial
);
2487 if (eligible_for_delay (insn
, *pslots_filled
, trial
, flags
))
2491 #ifdef ANNUL_IFTRUE_SLOTS
2494 #ifdef ANNUL_IFFALSE_SLOTS
2500 trial
= try_split (pat
, trial
, 0);
2501 if (new_thread
== old_trial
)
2503 if (thread
== old_trial
)
2505 pat
= PATTERN (trial
);
2506 if ((must_annul
|| delay_list
== NULL
) && (thread_if_true
2507 ? check_annul_list_true_false (0, delay_list
)
2508 && eligible_for_annul_false (insn
, *pslots_filled
, trial
, flags
)
2509 : check_annul_list_true_false (1, delay_list
)
2510 && eligible_for_annul_true (insn
, *pslots_filled
, trial
, flags
)))
2518 if (reg_mentioned_p (cc0_rtx
, pat
))
2519 link_cc0_insns (trial
);
2522 /* If we own this thread, delete the insn. If this is the
2523 destination of a branch, show that a basic block status
2524 may have been updated. In any case, mark the new
2525 starting point of this thread. */
2530 update_block (trial
, thread
);
2531 if (trial
== thread
)
2533 thread
= next_active_insn (thread
);
2534 if (new_thread
== trial
)
2535 new_thread
= thread
;
2538 /* We are moving this insn, not deleting it. We must
2539 temporarily increment the use count on any referenced
2540 label lest it be deleted by delete_related_insns. */
2541 for (note
= REG_NOTES (trial
);
2543 note
= XEXP (note
, 1))
2544 if (REG_NOTE_KIND (note
) == REG_LABEL_OPERAND
2545 || REG_NOTE_KIND (note
) == REG_LABEL_TARGET
)
2547 /* REG_LABEL_OPERAND could be
2548 NOTE_INSN_DELETED_LABEL too. */
2549 if (LABEL_P (XEXP (note
, 0)))
2550 LABEL_NUSES (XEXP (note
, 0))++;
2552 gcc_assert (REG_NOTE_KIND (note
)
2553 == REG_LABEL_OPERAND
);
2555 if (jump_to_label_p (trial
))
2556 LABEL_NUSES (JUMP_LABEL (trial
))++;
2558 delete_related_insns (trial
);
2560 for (note
= REG_NOTES (trial
);
2562 note
= XEXP (note
, 1))
2563 if (REG_NOTE_KIND (note
) == REG_LABEL_OPERAND
2564 || REG_NOTE_KIND (note
) == REG_LABEL_TARGET
)
2566 /* REG_LABEL_OPERAND could be
2567 NOTE_INSN_DELETED_LABEL too. */
2568 if (LABEL_P (XEXP (note
, 0)))
2569 LABEL_NUSES (XEXP (note
, 0))--;
2571 gcc_assert (REG_NOTE_KIND (note
)
2572 == REG_LABEL_OPERAND
);
2574 if (jump_to_label_p (trial
))
2575 LABEL_NUSES (JUMP_LABEL (trial
))--;
2578 new_thread
= next_active_insn (trial
);
2580 temp
= own_thread
? trial
: copy_delay_slot_insn (trial
);
2582 INSN_FROM_TARGET_P (temp
) = 1;
2584 delay_list
= add_to_delay_list (temp
, delay_list
);
2586 if (slots_to_fill
== ++(*pslots_filled
))
2588 /* Even though we have filled all the slots, we
2589 may be branching to a location that has a
2590 redundant insn. Skip any if so. */
2591 while (new_thread
&& ! own_thread
2592 && ! insn_sets_resource_p (new_thread
, &set
, true)
2593 && ! insn_sets_resource_p (new_thread
, &needed
,
2595 && ! insn_references_resource_p (new_thread
,
2598 = redundant_insn (new_thread
, insn
,
2601 /* We know we do not own the thread, so no need
2602 to call update_block and delete_insn. */
2603 fix_reg_dead_note (prior_insn
, insn
);
2604 update_reg_unused_notes (prior_insn
, new_thread
);
2605 new_thread
= next_active_insn (new_thread
);
2615 /* This insn can't go into a delay slot. */
2617 mark_set_resources (trial
, &set
, 0, MARK_SRC_DEST_CALL
);
2618 mark_referenced_resources (trial
, &needed
, true);
2620 /* Ensure we don't put insns between the setting of cc and the comparison
2621 by moving a setting of cc into an earlier delay slot since these insns
2622 could clobber the condition code. */
2625 /* If this insn is a register-register copy and the next insn has
2626 a use of our destination, change it to use our source. That way,
2627 it will become a candidate for our delay slot the next time
2628 through this loop. This case occurs commonly in loops that
2631 We could check for more complex cases than those tested below,
2632 but it doesn't seem worth it. It might also be a good idea to try
2633 to swap the two insns. That might do better.
2635 We can't do this if the next insn modifies our destination, because
2636 that would make the replacement into the insn invalid. We also can't
2637 do this if it modifies our source, because it might be an earlyclobber
2638 operand. This latter test also prevents updating the contents of
2639 a PRE_INC. We also can't do this if there's overlap of source and
2640 destination. Overlap may happen for larger-than-register-size modes. */
2642 if (NONJUMP_INSN_P (trial
) && GET_CODE (pat
) == SET
2643 && REG_P (SET_SRC (pat
))
2644 && REG_P (SET_DEST (pat
))
2645 && !reg_overlap_mentioned_p (SET_DEST (pat
), SET_SRC (pat
)))
2647 rtx next
= next_nonnote_insn (trial
);
2649 if (next
&& NONJUMP_INSN_P (next
)
2650 && GET_CODE (PATTERN (next
)) != USE
2651 && ! reg_set_p (SET_DEST (pat
), next
)
2652 && ! reg_set_p (SET_SRC (pat
), next
)
2653 && reg_referenced_p (SET_DEST (pat
), PATTERN (next
))
2654 && ! modified_in_p (SET_DEST (pat
), next
))
2655 validate_replace_rtx (SET_DEST (pat
), SET_SRC (pat
), next
);
2659 /* If we stopped on a branch insn that has delay slots, see if we can
2660 steal some of the insns in those slots. */
2661 if (trial
&& NONJUMP_INSN_P (trial
)
2662 && GET_CODE (PATTERN (trial
)) == SEQUENCE
2663 && JUMP_P (XVECEXP (PATTERN (trial
), 0, 0)))
2665 /* If this is the `true' thread, we will want to follow the jump,
2666 so we can only do this if we have taken everything up to here. */
2667 if (thread_if_true
&& trial
== new_thread
)
2670 = steal_delay_list_from_target (insn
, condition
, PATTERN (trial
),
2671 delay_list
, &set
, &needed
,
2672 &opposite_needed
, slots_to_fill
,
2673 pslots_filled
, &must_annul
,
2675 /* If we owned the thread and are told that it branched
2676 elsewhere, make sure we own the thread at the new location. */
2677 if (own_thread
&& trial
!= new_thread
)
2678 own_thread
= own_thread_p (new_thread
, new_thread
, 0);
2680 else if (! thread_if_true
)
2682 = steal_delay_list_from_fallthrough (insn
, condition
,
2684 delay_list
, &set
, &needed
,
2685 &opposite_needed
, slots_to_fill
,
2686 pslots_filled
, &must_annul
);
2689 /* If we haven't found anything for this delay slot and it is very
2690 likely that the branch will be taken, see if the insn at our target
2691 increments or decrements a register with an increment that does not
2692 depend on the destination register. If so, try to place the opposite
2693 arithmetic insn after the jump insn and put the arithmetic insn in the
2694 delay slot. If we can't do this, return. */
2695 if (delay_list
== 0 && likely
2696 && new_thread
&& !ANY_RETURN_P (new_thread
)
2697 && NONJUMP_INSN_P (new_thread
)
2698 && !RTX_FRAME_RELATED_P (new_thread
)
2699 && GET_CODE (PATTERN (new_thread
)) != ASM_INPUT
2700 && asm_noperands (PATTERN (new_thread
)) < 0)
2702 rtx pat
= PATTERN (new_thread
);
2707 pat
= PATTERN (trial
);
2709 if (!NONJUMP_INSN_P (trial
)
2710 || GET_CODE (pat
) != SET
2711 || ! eligible_for_delay (insn
, 0, trial
, flags
)
2712 || can_throw_internal (trial
))
2715 dest
= SET_DEST (pat
), src
= SET_SRC (pat
);
2716 if ((GET_CODE (src
) == PLUS
|| GET_CODE (src
) == MINUS
)
2717 && rtx_equal_p (XEXP (src
, 0), dest
)
2718 && (!FLOAT_MODE_P (GET_MODE (src
))
2719 || flag_unsafe_math_optimizations
)
2720 && ! reg_overlap_mentioned_p (dest
, XEXP (src
, 1))
2721 && ! side_effects_p (pat
))
2723 rtx other
= XEXP (src
, 1);
2727 /* If this is a constant adjustment, use the same code with
2728 the negated constant. Otherwise, reverse the sense of the
2730 if (CONST_INT_P (other
))
2731 new_arith
= gen_rtx_fmt_ee (GET_CODE (src
), GET_MODE (src
), dest
,
2732 negate_rtx (GET_MODE (src
), other
));
2734 new_arith
= gen_rtx_fmt_ee (GET_CODE (src
) == PLUS
? MINUS
: PLUS
,
2735 GET_MODE (src
), dest
, other
);
2737 ninsn
= emit_insn_after (gen_rtx_SET (VOIDmode
, dest
, new_arith
),
2740 if (recog_memoized (ninsn
) < 0
2741 || (extract_insn (ninsn
), ! constrain_operands (1)))
2743 delete_related_insns (ninsn
);
2749 update_block (trial
, thread
);
2750 if (trial
== thread
)
2752 thread
= next_active_insn (thread
);
2753 if (new_thread
== trial
)
2754 new_thread
= thread
;
2756 delete_related_insns (trial
);
2759 new_thread
= next_active_insn (trial
);
2761 ninsn
= own_thread
? trial
: copy_delay_slot_insn (trial
);
2763 INSN_FROM_TARGET_P (ninsn
) = 1;
2765 delay_list
= add_to_delay_list (ninsn
, NULL_RTX
);
2770 if (delay_list
&& must_annul
)
2771 INSN_ANNULLED_BRANCH_P (insn
) = 1;
2773 /* If we are to branch into the middle of this thread, find an appropriate
2774 label or make a new one if none, and redirect INSN to it. If we hit the
2775 end of the function, use the end-of-function label. */
2776 if (new_thread
!= thread
)
2779 bool crossing
= false;
2781 gcc_assert (thread_if_true
);
2783 if (new_thread
&& simplejump_or_return_p (new_thread
)
2784 && redirect_with_delay_list_safe_p (insn
,
2785 JUMP_LABEL (new_thread
),
2787 new_thread
= follow_jumps (JUMP_LABEL (new_thread
), insn
, &crossing
);
2789 if (ANY_RETURN_P (new_thread
))
2790 label
= find_end_label (new_thread
);
2791 else if (LABEL_P (new_thread
))
2794 label
= get_label_before (new_thread
, JUMP_LABEL (insn
));
2798 reorg_redirect_jump (insn
, label
);
2800 set_unique_reg_note (insn
, REG_CROSSING_JUMP
, NULL_RTX
);
2807 /* Make another attempt to find insns to place in delay slots.
2809 We previously looked for insns located in front of the delay insn
2810 and, for non-jump delay insns, located behind the delay insn.
2812 Here only try to schedule jump insns and try to move insns from either
2813 the target or the following insns into the delay slot. If annulling is
2814 supported, we will be likely to do this. Otherwise, we can do this only
2818 fill_eager_delay_slots (void)
2822 int num_unfilled_slots
= unfilled_slots_next
- unfilled_slots_base
;
2824 for (i
= 0; i
< num_unfilled_slots
; i
++)
2827 rtx target_label
, insn_at_target
, fallthrough_insn
;
2830 int own_fallthrough
;
2831 int prediction
, slots_to_fill
, slots_filled
;
2833 insn
= unfilled_slots_base
[i
];
2835 || INSN_DELETED_P (insn
)
2837 || ! (condjump_p (insn
) || condjump_in_parallel_p (insn
)))
2840 slots_to_fill
= num_delay_slots (insn
);
2841 /* Some machine description have defined instructions to have
2842 delay slots only in certain circumstances which may depend on
2843 nearby insns (which change due to reorg's actions).
2845 For example, the PA port normally has delay slots for unconditional
2848 However, the PA port claims such jumps do not have a delay slot
2849 if they are immediate successors of certain CALL_INSNs. This
2850 allows the port to favor filling the delay slot of the call with
2851 the unconditional jump. */
2852 if (slots_to_fill
== 0)
2856 target_label
= JUMP_LABEL (insn
);
2857 condition
= get_branch_condition (insn
, target_label
);
2862 /* Get the next active fallthrough and target insns and see if we own
2863 them. Then see whether the branch is likely true. We don't need
2864 to do a lot of this for unconditional branches. */
2866 insn_at_target
= first_active_target_insn (target_label
);
2867 own_target
= own_thread_p (target_label
, target_label
, 0);
2869 if (condition
== const_true_rtx
)
2871 own_fallthrough
= 0;
2872 fallthrough_insn
= 0;
2877 fallthrough_insn
= next_active_insn (insn
);
2878 own_fallthrough
= own_thread_p (NEXT_INSN (insn
), NULL_RTX
, 1);
2879 prediction
= mostly_true_jump (insn
);
2882 /* If this insn is expected to branch, first try to get insns from our
2883 target, then our fallthrough insns. If it is not expected to branch,
2884 try the other order. */
2889 = fill_slots_from_thread (insn
, condition
, insn_at_target
,
2890 fallthrough_insn
, prediction
== 2, 1,
2892 slots_to_fill
, &slots_filled
, delay_list
);
2894 if (delay_list
== 0 && own_fallthrough
)
2896 /* Even though we didn't find anything for delay slots,
2897 we might have found a redundant insn which we deleted
2898 from the thread that was filled. So we have to recompute
2899 the next insn at the target. */
2900 target_label
= JUMP_LABEL (insn
);
2901 insn_at_target
= first_active_target_insn (target_label
);
2904 = fill_slots_from_thread (insn
, condition
, fallthrough_insn
,
2905 insn_at_target
, 0, 0,
2907 slots_to_fill
, &slots_filled
,
2913 if (own_fallthrough
)
2915 = fill_slots_from_thread (insn
, condition
, fallthrough_insn
,
2916 insn_at_target
, 0, 0,
2918 slots_to_fill
, &slots_filled
,
2921 if (delay_list
== 0)
2923 = fill_slots_from_thread (insn
, condition
, insn_at_target
,
2924 next_active_insn (insn
), 0, 1,
2926 slots_to_fill
, &slots_filled
,
2931 unfilled_slots_base
[i
]
2932 = emit_delay_sequence (insn
, delay_list
, slots_filled
);
2934 if (slots_to_fill
== slots_filled
)
2935 unfilled_slots_base
[i
] = 0;
2937 note_delay_statistics (slots_filled
, 1);
2941 static void delete_computation (rtx insn
);
2943 /* Recursively delete prior insns that compute the value (used only by INSN
2944 which the caller is deleting) stored in the register mentioned by NOTE
2945 which is a REG_DEAD note associated with INSN. */
2948 delete_prior_computation (rtx note
, rtx insn
)
2951 rtx reg
= XEXP (note
, 0);
2953 for (our_prev
= prev_nonnote_insn (insn
);
2954 our_prev
&& (NONJUMP_INSN_P (our_prev
)
2955 || CALL_P (our_prev
));
2956 our_prev
= prev_nonnote_insn (our_prev
))
2958 rtx pat
= PATTERN (our_prev
);
2960 /* If we reach a CALL which is not calling a const function
2961 or the callee pops the arguments, then give up. */
2962 if (CALL_P (our_prev
)
2963 && (! RTL_CONST_CALL_P (our_prev
)
2964 || GET_CODE (pat
) != SET
|| GET_CODE (SET_SRC (pat
)) != CALL
))
2967 /* If we reach a SEQUENCE, it is too complex to try to
2968 do anything with it, so give up. We can be run during
2969 and after reorg, so SEQUENCE rtl can legitimately show
2971 if (GET_CODE (pat
) == SEQUENCE
)
2974 if (GET_CODE (pat
) == USE
2975 && NONJUMP_INSN_P (XEXP (pat
, 0)))
2976 /* reorg creates USEs that look like this. We leave them
2977 alone because reorg needs them for its own purposes. */
2980 if (reg_set_p (reg
, pat
))
2982 if (side_effects_p (pat
) && !CALL_P (our_prev
))
2985 if (GET_CODE (pat
) == PARALLEL
)
2987 /* If we find a SET of something else, we can't
2992 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
2994 rtx part
= XVECEXP (pat
, 0, i
);
2996 if (GET_CODE (part
) == SET
2997 && SET_DEST (part
) != reg
)
3001 if (i
== XVECLEN (pat
, 0))
3002 delete_computation (our_prev
);
3004 else if (GET_CODE (pat
) == SET
3005 && REG_P (SET_DEST (pat
)))
3007 int dest_regno
= REGNO (SET_DEST (pat
));
3008 int dest_endregno
= END_REGNO (SET_DEST (pat
));
3009 int regno
= REGNO (reg
);
3010 int endregno
= END_REGNO (reg
);
3012 if (dest_regno
>= regno
3013 && dest_endregno
<= endregno
)
3014 delete_computation (our_prev
);
3016 /* We may have a multi-word hard register and some, but not
3017 all, of the words of the register are needed in subsequent
3018 insns. Write REG_UNUSED notes for those parts that were not
3020 else if (dest_regno
<= regno
3021 && dest_endregno
>= endregno
)
3025 add_reg_note (our_prev
, REG_UNUSED
, reg
);
3027 for (i
= dest_regno
; i
< dest_endregno
; i
++)
3028 if (! find_regno_note (our_prev
, REG_UNUSED
, i
))
3031 if (i
== dest_endregno
)
3032 delete_computation (our_prev
);
3039 /* If PAT references the register that dies here, it is an
3040 additional use. Hence any prior SET isn't dead. However, this
3041 insn becomes the new place for the REG_DEAD note. */
3042 if (reg_overlap_mentioned_p (reg
, pat
))
3044 XEXP (note
, 1) = REG_NOTES (our_prev
);
3045 REG_NOTES (our_prev
) = note
;
3051 /* Delete INSN and recursively delete insns that compute values used only
3052 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3054 Look at all our REG_DEAD notes. If a previous insn does nothing other
3055 than set a register that dies in this insn, we can delete that insn
3058 On machines with CC0, if CC0 is used in this insn, we may be able to
3059 delete the insn that set it. */
3062 delete_computation (rtx insn
)
3067 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
3069 rtx prev
= prev_nonnote_insn (insn
);
3070 /* We assume that at this stage
3071 CC's are always set explicitly
3072 and always immediately before the jump that
3073 will use them. So if the previous insn
3074 exists to set the CC's, delete it
3075 (unless it performs auto-increments, etc.). */
3076 if (prev
&& NONJUMP_INSN_P (prev
)
3077 && sets_cc0_p (PATTERN (prev
)))
3079 if (sets_cc0_p (PATTERN (prev
)) > 0
3080 && ! side_effects_p (PATTERN (prev
)))
3081 delete_computation (prev
);
3083 /* Otherwise, show that cc0 won't be used. */
3084 add_reg_note (prev
, REG_UNUSED
, cc0_rtx
);
3089 for (note
= REG_NOTES (insn
); note
; note
= next
)
3091 next
= XEXP (note
, 1);
3093 if (REG_NOTE_KIND (note
) != REG_DEAD
3094 /* Verify that the REG_NOTE is legitimate. */
3095 || !REG_P (XEXP (note
, 0)))
3098 delete_prior_computation (note
, insn
);
3101 delete_related_insns (insn
);
3104 /* If all INSN does is set the pc, delete it,
3105 and delete the insn that set the condition codes for it
3106 if that's what the previous thing was. */
3109 delete_jump (rtx insn
)
3111 rtx set
= single_set (insn
);
3113 if (set
&& GET_CODE (SET_DEST (set
)) == PC
)
3114 delete_computation (insn
);
3118 label_before_next_insn (rtx x
, rtx scan_limit
)
3120 rtx insn
= next_active_insn (x
);
3123 insn
= PREV_INSN (insn
);
3124 if (insn
== scan_limit
|| insn
== NULL_RTX
)
3133 /* Once we have tried two ways to fill a delay slot, make a pass over the
3134 code to try to improve the results and to do such things as more jump
3138 relax_delay_slots (rtx first
)
3140 rtx insn
, next
, pat
;
3141 rtx trial
, delay_insn
, target_label
;
3143 /* Look at every JUMP_INSN and see if we can improve it. */
3144 for (insn
= first
; insn
; insn
= next
)
3149 next
= next_active_insn (insn
);
3151 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3152 the next insn, or jumps to a label that is not the last of a
3153 group of consecutive labels. */
3155 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
3156 && !ANY_RETURN_P (target_label
= JUMP_LABEL (insn
)))
3159 = skip_consecutive_labels (follow_jumps (target_label
, insn
,
3161 if (ANY_RETURN_P (target_label
))
3162 target_label
= find_end_label (target_label
);
3164 if (target_label
&& next_active_insn (target_label
) == next
3165 && ! condjump_in_parallel_p (insn
))
3171 if (target_label
&& target_label
!= JUMP_LABEL (insn
))
3173 reorg_redirect_jump (insn
, target_label
);
3175 set_unique_reg_note (insn
, REG_CROSSING_JUMP
, NULL_RTX
);
3178 /* See if this jump conditionally branches around an unconditional
3179 jump. If so, invert this jump and point it to the target of the
3181 if (next
&& simplejump_or_return_p (next
)
3182 && any_condjump_p (insn
)
3184 && next_active_insn (target_label
) == next_active_insn (next
)
3185 && no_labels_between_p (insn
, next
))
3187 rtx label
= JUMP_LABEL (next
);
3189 /* Be careful how we do this to avoid deleting code or
3190 labels that are momentarily dead. See similar optimization
3193 We also need to ensure we properly handle the case when
3194 invert_jump fails. */
3196 ++LABEL_NUSES (target_label
);
3197 if (!ANY_RETURN_P (label
))
3198 ++LABEL_NUSES (label
);
3200 if (invert_jump (insn
, label
, 1))
3202 delete_related_insns (next
);
3206 if (!ANY_RETURN_P (label
))
3207 --LABEL_NUSES (label
);
3209 if (--LABEL_NUSES (target_label
) == 0)
3210 delete_related_insns (target_label
);
3216 /* If this is an unconditional jump and the previous insn is a
3217 conditional jump, try reversing the condition of the previous
3218 insn and swapping our targets. The next pass might be able to
3221 Don't do this if we expect the conditional branch to be true, because
3222 we would then be making the more common case longer. */
3224 if (simplejump_or_return_p (insn
)
3225 && (other
= prev_active_insn (insn
)) != 0
3226 && any_condjump_p (other
)
3227 && no_labels_between_p (other
, insn
)
3228 && 0 > mostly_true_jump (other
))
3230 rtx other_target
= JUMP_LABEL (other
);
3231 target_label
= JUMP_LABEL (insn
);
3233 if (invert_jump (other
, target_label
, 0))
3234 reorg_redirect_jump (insn
, other_target
);
3237 /* Now look only at cases where we have a filled delay slot. */
3238 if (!NONJUMP_INSN_P (insn
) || GET_CODE (PATTERN (insn
)) != SEQUENCE
)
3241 pat
= PATTERN (insn
);
3242 delay_insn
= XVECEXP (pat
, 0, 0);
3244 /* See if the first insn in the delay slot is redundant with some
3245 previous insn. Remove it from the delay slot if so; then set up
3246 to reprocess this insn. */
3247 if (redundant_insn (XVECEXP (pat
, 0, 1), delay_insn
, 0))
3249 update_block (XVECEXP (pat
, 0, 1), insn
);
3250 delete_from_delay_slot (XVECEXP (pat
, 0, 1));
3251 next
= prev_active_insn (next
);
3255 /* See if we have a RETURN insn with a filled delay slot followed
3256 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3257 the first RETURN (but not its delay insn). This gives the same
3258 effect in fewer instructions.
3260 Only do so if optimizing for size since this results in slower, but
3262 if (optimize_function_for_size_p (cfun
)
3263 && ANY_RETURN_P (PATTERN (delay_insn
))
3266 && PATTERN (next
) == PATTERN (delay_insn
))
3271 /* Delete the RETURN and just execute the delay list insns.
3273 We do this by deleting the INSN containing the SEQUENCE, then
3274 re-emitting the insns separately, and then deleting the RETURN.
3275 This allows the count of the jump target to be properly
3278 Note that we need to change the INSN_UID of the re-emitted insns
3279 since it is used to hash the insns for mark_target_live_regs and
3280 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3282 Clear the from target bit, since these insns are no longer
3284 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3285 INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)) = 0;
3287 trial
= PREV_INSN (insn
);
3288 delete_related_insns (insn
);
3289 gcc_assert (GET_CODE (pat
) == SEQUENCE
);
3290 add_insn_after (delay_insn
, trial
, NULL
);
3292 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3293 after
= emit_copy_of_insn_after (XVECEXP (pat
, 0, i
), after
);
3294 delete_scheduled_jump (delay_insn
);
3298 /* Now look only at the cases where we have a filled JUMP_INSN. */
3299 if (!JUMP_P (delay_insn
)
3300 || !(condjump_p (delay_insn
) || condjump_in_parallel_p (delay_insn
)))
3303 target_label
= JUMP_LABEL (delay_insn
);
3304 if (target_label
&& ANY_RETURN_P (target_label
))
3307 /* If this jump goes to another unconditional jump, thread it, but
3308 don't convert a jump into a RETURN here. */
3309 trial
= skip_consecutive_labels (follow_jumps (target_label
, delay_insn
,
3311 if (ANY_RETURN_P (trial
))
3312 trial
= find_end_label (trial
);
3314 if (trial
&& trial
!= target_label
3315 && redirect_with_delay_slots_safe_p (delay_insn
, trial
, insn
))
3317 reorg_redirect_jump (delay_insn
, trial
);
3318 target_label
= trial
;
3320 set_unique_reg_note (insn
, REG_CROSSING_JUMP
, NULL_RTX
);
3323 /* If the first insn at TARGET_LABEL is redundant with a previous
3324 insn, redirect the jump to the following insn and process again.
3325 We use next_real_insn instead of next_active_insn so we
3326 don't skip USE-markers, or we'll end up with incorrect
3328 trial
= next_real_insn (target_label
);
3329 if (trial
&& GET_CODE (PATTERN (trial
)) != SEQUENCE
3330 && redundant_insn (trial
, insn
, 0)
3331 && ! can_throw_internal (trial
))
3333 /* Figure out where to emit the special USE insn so we don't
3334 later incorrectly compute register live/death info. */
3335 rtx tmp
= next_active_insn (trial
);
3337 tmp
= find_end_label (simple_return_rtx
);
3341 /* Insert the special USE insn and update dataflow info. */
3342 update_block (trial
, tmp
);
3344 /* Now emit a label before the special USE insn, and
3345 redirect our jump to the new label. */
3346 target_label
= get_label_before (PREV_INSN (tmp
), target_label
);
3347 reorg_redirect_jump (delay_insn
, target_label
);
3353 /* Similarly, if it is an unconditional jump with one insn in its
3354 delay list and that insn is redundant, thread the jump. */
3355 if (trial
&& GET_CODE (PATTERN (trial
)) == SEQUENCE
3356 && XVECLEN (PATTERN (trial
), 0) == 2
3357 && JUMP_P (XVECEXP (PATTERN (trial
), 0, 0))
3358 && simplejump_or_return_p (XVECEXP (PATTERN (trial
), 0, 0))
3359 && redundant_insn (XVECEXP (PATTERN (trial
), 0, 1), insn
, 0))
3361 target_label
= JUMP_LABEL (XVECEXP (PATTERN (trial
), 0, 0));
3362 if (ANY_RETURN_P (target_label
))
3363 target_label
= find_end_label (target_label
);
3366 && redirect_with_delay_slots_safe_p (delay_insn
, target_label
,
3369 update_block (XVECEXP (PATTERN (trial
), 0, 1), insn
);
3370 reorg_redirect_jump (delay_insn
, target_label
);
3376 /* See if we have a simple (conditional) jump that is useless. */
3377 if (! INSN_ANNULLED_BRANCH_P (delay_insn
)
3378 && ! condjump_in_parallel_p (delay_insn
)
3379 && prev_active_insn (target_label
) == insn
3380 && ! BARRIER_P (prev_nonnote_insn (target_label
))
3382 /* If the last insn in the delay slot sets CC0 for some insn,
3383 various code assumes that it is in a delay slot. We could
3384 put it back where it belonged and delete the register notes,
3385 but it doesn't seem worthwhile in this uncommon case. */
3386 && ! find_reg_note (XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1),
3387 REG_CC_USER
, NULL_RTX
)
3394 /* All this insn does is execute its delay list and jump to the
3395 following insn. So delete the jump and just execute the delay
3398 We do this by deleting the INSN containing the SEQUENCE, then
3399 re-emitting the insns separately, and then deleting the jump.
3400 This allows the count of the jump target to be properly
3403 Note that we need to change the INSN_UID of the re-emitted insns
3404 since it is used to hash the insns for mark_target_live_regs and
3405 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3407 Clear the from target bit, since these insns are no longer
3409 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
3410 INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)) = 0;
3412 trial
= PREV_INSN (insn
);
3413 delete_related_insns (insn
);
3414 gcc_assert (GET_CODE (pat
) == SEQUENCE
);
3415 add_insn_after (delay_insn
, trial
, NULL
);
3417 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3418 after
= emit_copy_of_insn_after (XVECEXP (pat
, 0, i
), after
);
3419 delete_scheduled_jump (delay_insn
);
3423 /* See if this is an unconditional jump around a single insn which is
3424 identical to the one in its delay slot. In this case, we can just
3425 delete the branch and the insn in its delay slot. */
3426 if (next
&& NONJUMP_INSN_P (next
)
3427 && label_before_next_insn (next
, insn
) == target_label
3428 && simplejump_p (insn
)
3429 && XVECLEN (pat
, 0) == 2
3430 && rtx_equal_p (PATTERN (next
), PATTERN (XVECEXP (pat
, 0, 1))))
3432 delete_related_insns (insn
);
3436 /* See if this jump (with its delay slots) conditionally branches
3437 around an unconditional jump (without delay slots). If so, invert
3438 this jump and point it to the target of the second jump. We cannot
3439 do this for annulled jumps, though. Again, don't convert a jump to
3441 if (! INSN_ANNULLED_BRANCH_P (delay_insn
)
3442 && any_condjump_p (delay_insn
)
3443 && next
&& simplejump_or_return_p (next
)
3444 && next_active_insn (target_label
) == next_active_insn (next
)
3445 && no_labels_between_p (insn
, next
))
3447 rtx label
= JUMP_LABEL (next
);
3448 rtx old_label
= JUMP_LABEL (delay_insn
);
3450 if (ANY_RETURN_P (label
))
3451 label
= find_end_label (label
);
3453 /* find_end_label can generate a new label. Check this first. */
3455 && no_labels_between_p (insn
, next
)
3456 && redirect_with_delay_slots_safe_p (delay_insn
, label
, insn
))
3458 /* Be careful how we do this to avoid deleting code or labels
3459 that are momentarily dead. See similar optimization in
3462 ++LABEL_NUSES (old_label
);
3464 if (invert_jump (delay_insn
, label
, 1))
3468 /* Must update the INSN_FROM_TARGET_P bits now that
3469 the branch is reversed, so that mark_target_live_regs
3470 will handle the delay slot insn correctly. */
3471 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3473 rtx slot
= XVECEXP (PATTERN (insn
), 0, i
);
3474 INSN_FROM_TARGET_P (slot
) = ! INSN_FROM_TARGET_P (slot
);
3477 delete_related_insns (next
);
3481 if (old_label
&& --LABEL_NUSES (old_label
) == 0)
3482 delete_related_insns (old_label
);
3487 /* If we own the thread opposite the way this insn branches, see if we
3488 can merge its delay slots with following insns. */
3489 if (INSN_FROM_TARGET_P (XVECEXP (pat
, 0, 1))
3490 && own_thread_p (NEXT_INSN (insn
), 0, 1))
3491 try_merge_delay_insns (insn
, next
);
3492 else if (! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, 1))
3493 && own_thread_p (target_label
, target_label
, 0))
3494 try_merge_delay_insns (insn
, next_active_insn (target_label
));
3496 /* If we get here, we haven't deleted INSN. But we may have deleted
3497 NEXT, so recompute it. */
3498 next
= next_active_insn (insn
);
3503 /* Look for filled jumps to the end of function label. We can try to convert
3504 them into RETURN insns if the insns in the delay slot are valid for the
3508 make_return_insns (rtx first
)
3510 rtx insn
, jump_insn
, pat
;
3511 rtx real_return_label
= function_return_label
;
3512 rtx real_simple_return_label
= function_simple_return_label
;
3515 /* See if there is a RETURN insn in the function other than the one we
3516 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3517 into a RETURN to jump to it. */
3518 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3519 if (JUMP_P (insn
) && ANY_RETURN_P (PATTERN (insn
)))
3521 rtx t
= get_label_before (insn
, NULL_RTX
);
3522 if (PATTERN (insn
) == ret_rtx
)
3523 real_return_label
= t
;
3525 real_simple_return_label
= t
;
3529 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3530 was equal to END_OF_FUNCTION_LABEL. */
3531 if (real_return_label
)
3532 LABEL_NUSES (real_return_label
)++;
3533 if (real_simple_return_label
)
3534 LABEL_NUSES (real_simple_return_label
)++;
3536 /* Clear the list of insns to fill so we can use it. */
3537 obstack_free (&unfilled_slots_obstack
, unfilled_firstobj
);
3539 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3542 rtx kind
, real_label
;
3544 /* Only look at filled JUMP_INSNs that go to the end of function
3546 if (!NONJUMP_INSN_P (insn
)
3547 || GET_CODE (PATTERN (insn
)) != SEQUENCE
3548 || !jump_to_label_p (XVECEXP (PATTERN (insn
), 0, 0)))
3551 if (JUMP_LABEL (XVECEXP (PATTERN (insn
), 0, 0)) == function_return_label
)
3554 real_label
= real_return_label
;
3556 else if (JUMP_LABEL (XVECEXP (PATTERN (insn
), 0, 0))
3557 == function_simple_return_label
)
3559 kind
= simple_return_rtx
;
3560 real_label
= real_simple_return_label
;
3565 pat
= PATTERN (insn
);
3566 jump_insn
= XVECEXP (pat
, 0, 0);
3568 /* If we can't make the jump into a RETURN, try to redirect it to the best
3569 RETURN and go on to the next insn. */
3570 if (!reorg_redirect_jump (jump_insn
, kind
))
3572 /* Make sure redirecting the jump will not invalidate the delay
3574 if (redirect_with_delay_slots_safe_p (jump_insn
, real_label
, insn
))
3575 reorg_redirect_jump (jump_insn
, real_label
);
3579 /* See if this RETURN can accept the insns current in its delay slot.
3580 It can if it has more or an equal number of slots and the contents
3581 of each is valid. */
3583 flags
= get_jump_flags (jump_insn
, JUMP_LABEL (jump_insn
));
3584 slots
= num_delay_slots (jump_insn
);
3585 if (slots
>= XVECLEN (pat
, 0) - 1)
3587 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3589 #ifdef ANNUL_IFFALSE_SLOTS
3590 (INSN_ANNULLED_BRANCH_P (jump_insn
)
3591 && INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
3592 ? eligible_for_annul_false (jump_insn
, i
- 1,
3593 XVECEXP (pat
, 0, i
), flags
) :
3595 #ifdef ANNUL_IFTRUE_SLOTS
3596 (INSN_ANNULLED_BRANCH_P (jump_insn
)
3597 && ! INSN_FROM_TARGET_P (XVECEXP (pat
, 0, i
)))
3598 ? eligible_for_annul_true (jump_insn
, i
- 1,
3599 XVECEXP (pat
, 0, i
), flags
) :
3601 eligible_for_delay (jump_insn
, i
- 1,
3602 XVECEXP (pat
, 0, i
), flags
)))
3608 if (i
== XVECLEN (pat
, 0))
3611 /* We have to do something with this insn. If it is an unconditional
3612 RETURN, delete the SEQUENCE and output the individual insns,
3613 followed by the RETURN. Then set things up so we try to find
3614 insns for its delay slots, if it needs some. */
3615 if (ANY_RETURN_P (PATTERN (jump_insn
)))
3617 rtx prev
= PREV_INSN (insn
);
3619 delete_related_insns (insn
);
3620 for (i
= 1; i
< XVECLEN (pat
, 0); i
++)
3621 prev
= emit_insn_after (PATTERN (XVECEXP (pat
, 0, i
)), prev
);
3623 insn
= emit_jump_insn_after (PATTERN (jump_insn
), prev
);
3624 emit_barrier_after (insn
);
3627 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
3630 /* It is probably more efficient to keep this with its current
3631 delay slot as a branch to a RETURN. */
3632 reorg_redirect_jump (jump_insn
, real_label
);
3635 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3636 new delay slots we have created. */
3637 if (real_return_label
!= NULL_RTX
&& --LABEL_NUSES (real_return_label
) == 0)
3638 delete_related_insns (real_return_label
);
3639 if (real_simple_return_label
!= NULL_RTX
3640 && --LABEL_NUSES (real_simple_return_label
) == 0)
3641 delete_related_insns (real_simple_return_label
);
3643 fill_simple_delay_slots (1);
3644 fill_simple_delay_slots (0);
3647 /* Try to find insns to place in delay slots. */
3650 dbr_schedule (rtx first
)
3652 rtx insn
, next
, epilogue_insn
= 0;
3654 bool need_return_insns
;
3656 /* If the current function has no insns other than the prologue and
3657 epilogue, then do not try to fill any delay slots. */
3658 if (n_basic_blocks_for_fn (cfun
) == NUM_FIXED_BLOCKS
)
3661 /* Find the highest INSN_UID and allocate and initialize our map from
3662 INSN_UID's to position in code. */
3663 for (max_uid
= 0, insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3665 if (INSN_UID (insn
) > max_uid
)
3666 max_uid
= INSN_UID (insn
);
3668 && NOTE_KIND (insn
) == NOTE_INSN_EPILOGUE_BEG
)
3669 epilogue_insn
= insn
;
3672 uid_to_ruid
= XNEWVEC (int, max_uid
+ 1);
3673 for (i
= 0, insn
= first
; insn
; i
++, insn
= NEXT_INSN (insn
))
3674 uid_to_ruid
[INSN_UID (insn
)] = i
;
3676 /* Initialize the list of insns that need filling. */
3677 if (unfilled_firstobj
== 0)
3679 gcc_obstack_init (&unfilled_slots_obstack
);
3680 unfilled_firstobj
= XOBNEWVAR (&unfilled_slots_obstack
, rtx
, 0);
3683 for (insn
= next_active_insn (first
); insn
; insn
= next_active_insn (insn
))
3687 /* Skip vector tables. We can't get attributes for them. */
3688 if (JUMP_TABLE_DATA_P (insn
))
3692 INSN_ANNULLED_BRANCH_P (insn
) = 0;
3693 INSN_FROM_TARGET_P (insn
) = 0;
3695 if (num_delay_slots (insn
) > 0)
3696 obstack_ptr_grow (&unfilled_slots_obstack
, insn
);
3698 /* Ensure all jumps go to the last of a set of consecutive labels. */
3700 && (condjump_p (insn
) || condjump_in_parallel_p (insn
))
3701 && !ANY_RETURN_P (JUMP_LABEL (insn
))
3702 && ((target
= skip_consecutive_labels (JUMP_LABEL (insn
)))
3703 != JUMP_LABEL (insn
)))
3704 redirect_jump (insn
, target
, 1);
3707 init_resource_info (epilogue_insn
);
3709 /* Show we haven't computed an end-of-function label yet. */
3710 function_return_label
= function_simple_return_label
= NULL_RTX
;
3712 /* Initialize the statistics for this function. */
3713 memset (num_insns_needing_delays
, 0, sizeof num_insns_needing_delays
);
3714 memset (num_filled_delays
, 0, sizeof num_filled_delays
);
3716 /* Now do the delay slot filling. Try everything twice in case earlier
3717 changes make more slots fillable. */
3719 for (reorg_pass_number
= 0;
3720 reorg_pass_number
< MAX_REORG_PASSES
;
3721 reorg_pass_number
++)
3723 fill_simple_delay_slots (1);
3724 fill_simple_delay_slots (0);
3725 fill_eager_delay_slots ();
3726 relax_delay_slots (first
);
3729 /* If we made an end of function label, indicate that it is now
3730 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3731 If it is now unused, delete it. */
3732 if (function_return_label
&& --LABEL_NUSES (function_return_label
) == 0)
3733 delete_related_insns (function_return_label
);
3734 if (function_simple_return_label
3735 && --LABEL_NUSES (function_simple_return_label
) == 0)
3736 delete_related_insns (function_simple_return_label
);
3738 need_return_insns
= false;
3740 need_return_insns
|= HAVE_return
&& function_return_label
!= 0;
3742 #ifdef HAVE_simple_return
3743 need_return_insns
|= HAVE_simple_return
&& function_simple_return_label
!= 0;
3745 if (need_return_insns
)
3746 make_return_insns (first
);
3748 /* Delete any USE insns made by update_block; subsequent passes don't need
3749 them or know how to deal with them. */
3750 for (insn
= first
; insn
; insn
= next
)
3752 next
= NEXT_INSN (insn
);
3754 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == USE
3755 && INSN_P (XEXP (PATTERN (insn
), 0)))
3756 next
= delete_related_insns (insn
);
3759 obstack_free (&unfilled_slots_obstack
, unfilled_firstobj
);
3761 /* It is not clear why the line below is needed, but it does seem to be. */
3762 unfilled_firstobj
= XOBNEWVAR (&unfilled_slots_obstack
, rtx
, 0);
3766 int i
, j
, need_comma
;
3767 int total_delay_slots
[MAX_DELAY_HISTOGRAM
+ 1];
3768 int total_annul_slots
[MAX_DELAY_HISTOGRAM
+ 1];
3770 for (reorg_pass_number
= 0;
3771 reorg_pass_number
< MAX_REORG_PASSES
;
3772 reorg_pass_number
++)
3774 fprintf (dump_file
, ";; Reorg pass #%d:\n", reorg_pass_number
+ 1);
3775 for (i
= 0; i
< NUM_REORG_FUNCTIONS
; i
++)
3778 fprintf (dump_file
, ";; Reorg function #%d\n", i
);
3780 fprintf (dump_file
, ";; %d insns needing delay slots\n;; ",
3781 num_insns_needing_delays
[i
][reorg_pass_number
]);
3783 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3784 if (num_filled_delays
[i
][j
][reorg_pass_number
])
3787 fprintf (dump_file
, ", ");
3789 fprintf (dump_file
, "%d got %d delays",
3790 num_filled_delays
[i
][j
][reorg_pass_number
], j
);
3792 fprintf (dump_file
, "\n");
3795 memset (total_delay_slots
, 0, sizeof total_delay_slots
);
3796 memset (total_annul_slots
, 0, sizeof total_annul_slots
);
3797 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3799 if (! INSN_DELETED_P (insn
)
3800 && NONJUMP_INSN_P (insn
)
3801 && GET_CODE (PATTERN (insn
)) != USE
3802 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3804 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3807 j
= XVECLEN (PATTERN (insn
), 0) - 1;
3808 if (j
> MAX_DELAY_HISTOGRAM
)
3809 j
= MAX_DELAY_HISTOGRAM
;
3810 control
= XVECEXP (PATTERN (insn
), 0, 0);
3811 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
3812 total_annul_slots
[j
]++;
3814 total_delay_slots
[j
]++;
3816 else if (num_delay_slots (insn
) > 0)
3817 total_delay_slots
[0]++;
3820 fprintf (dump_file
, ";; Reorg totals: ");
3822 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3824 if (total_delay_slots
[j
])
3827 fprintf (dump_file
, ", ");
3829 fprintf (dump_file
, "%d got %d delays", total_delay_slots
[j
], j
);
3832 fprintf (dump_file
, "\n");
3833 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3834 fprintf (dump_file
, ";; Reorg annuls: ");
3836 for (j
= 0; j
< MAX_DELAY_HISTOGRAM
+ 1; j
++)
3838 if (total_annul_slots
[j
])
3841 fprintf (dump_file
, ", ");
3843 fprintf (dump_file
, "%d got %d delays", total_annul_slots
[j
], j
);
3846 fprintf (dump_file
, "\n");
3848 fprintf (dump_file
, "\n");
3851 if (!sibling_labels
.is_empty ())
3853 update_alignments (sibling_labels
);
3854 sibling_labels
.release ();
3857 free_resource_info ();
3859 crtl
->dbr_scheduled_p
= true;
3861 #endif /* DELAY_SLOTS */
3864 gate_handle_delay_slots (void)
3867 /* At -O0 dataflow info isn't updated after RA. */
3868 return optimize
> 0 && flag_delayed_branch
&& !crtl
->dbr_scheduled_p
;
3874 /* Run delay slot optimization. */
3876 rest_of_handle_delay_slots (void)
3879 dbr_schedule (get_insns ());
3886 const pass_data pass_data_delay_slots
=
3888 RTL_PASS
, /* type */
3890 OPTGROUP_NONE
, /* optinfo_flags */
3891 true, /* has_gate */
3892 true, /* has_execute */
3893 TV_DBR_SCHED
, /* tv_id */
3894 0, /* properties_required */
3895 0, /* properties_provided */
3896 0, /* properties_destroyed */
3897 0, /* todo_flags_start */
3898 0, /* todo_flags_finish */
3901 class pass_delay_slots
: public rtl_opt_pass
3904 pass_delay_slots (gcc::context
*ctxt
)
3905 : rtl_opt_pass (pass_data_delay_slots
, ctxt
)
3908 /* opt_pass methods: */
3909 bool gate () { return gate_handle_delay_slots (); }
3910 unsigned int execute () { return rest_of_handle_delay_slots (); }
3912 }; // class pass_delay_slots
3917 make_pass_delay_slots (gcc::context
*ctxt
)
3919 return new pass_delay_slots (ctxt
);
3922 /* Machine dependent reorg pass. */
3924 gate_handle_machine_reorg (void)
3926 return targetm
.machine_dependent_reorg
!= 0;
3931 rest_of_handle_machine_reorg (void)
3933 targetm
.machine_dependent_reorg ();
3939 const pass_data pass_data_machine_reorg
=
3941 RTL_PASS
, /* type */
3943 OPTGROUP_NONE
, /* optinfo_flags */
3944 true, /* has_gate */
3945 true, /* has_execute */
3946 TV_MACH_DEP
, /* tv_id */
3947 0, /* properties_required */
3948 0, /* properties_provided */
3949 0, /* properties_destroyed */
3950 0, /* todo_flags_start */
3951 0, /* todo_flags_finish */
3954 class pass_machine_reorg
: public rtl_opt_pass
3957 pass_machine_reorg (gcc::context
*ctxt
)
3958 : rtl_opt_pass (pass_data_machine_reorg
, ctxt
)
3961 /* opt_pass methods: */
3962 bool gate () { return gate_handle_machine_reorg (); }
3963 unsigned int execute () { return rest_of_handle_machine_reorg (); }
3965 }; // class pass_machine_reorg
3970 make_pass_machine_reorg (gcc::context
*ctxt
)
3972 return new pass_machine_reorg (ctxt
);