| blob | 4c519879fcbd003f4c43ac39224011aec83cf94b |
1 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
3 PR middle-end/83884
4 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
5 rather than the size of inner_type to determine the stack slot size
6 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
8 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
10 PR target/83546
11 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
12 to PTA_SILVERMONT.
14 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
16 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
17 endian Linux systems to optionally enable multilibs for selecting
18 the long double type if the user configured an explicit type.
19 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
20 have no long double multilibs if not defined.
21 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
22 warn if the user used -mabi={ieee,ibm}longdouble and we built
23 multilibs for long double.
24 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
25 appropriate multilib option.
26 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
27 multilib options.
28 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
29 for building long double multilibs.
30 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
32 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
34 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
35 copies.
37 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
38 64 bits.
39 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
40 128 bits.
42 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
43 variables.
45 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
46 return value.
48 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
50 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
51 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
53 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
55 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
56 different rtl trees depending on TARGET_64BIT.
57 (rs6000_gen_lvx): Likewise.
59 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
61 * config/visium/visium.md (nop): Tweak comment.
62 (hazard_nop): Likewise.
64 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
66 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
67 -mspeculate-indirect-jumps.
68 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
69 for -mno-speculate-indirect-jumps.
70 (*call_indirect_elfv2<mode>_nospec): New define_insn.
71 (*call_value_indirect_elfv2<mode>): Disable for
72 -mno-speculate-indirect-jumps.
73 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
74 (indirect_jump): Emit different RTL for
75 -mno-speculate-indirect-jumps.
76 (*indirect_jump<mode>): Disable for
77 -mno-speculate-indirect-jumps.
78 (*indirect_jump<mode>_nospec): New define_insn.
79 (tablejump): Emit different RTL for
80 -mno-speculate-indirect-jumps.
81 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
82 (tablejumpsi_nospec): New define_expand.
83 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
84 (tablejumpdi_nospec): New define_expand.
85 (*tablejump<mode>_internal1): Disable for
86 -mno-speculate-indirect-jumps.
87 (*tablejump<mode>_internal1_nospec): New define_insn.
88 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
89 option.
91 2018-01-16 Artyom Skrobov tyomitch@gmail.com
93 * caller-save.c (insert_save): Drop unnecessary parameter. All
94 callers updated.
96 2018-01-16 Jakub Jelinek <jakub@redhat.com>
97 Richard Biener <rguenth@suse.de>
99 PR libgomp/83590
100 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
101 return early, inline manually is_gimple_sizepos. Make sure if we
102 call gimplify_expr we don't end up with a gimple constant.
103 * tree.c (variably_modified_type_p): Don't return true for
104 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
105 * gimplify.h (is_gimple_sizepos): Remove.
107 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
109 PR tree-optimization/83857
110 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
111 vectorizable_live_operation for pure SLP statements.
112 (vectorizable_live_operation): Handle PHIs.
114 2018-01-16 Richard Biener <rguenther@suse.de>
116 PR tree-optimization/83867
117 * tree-vect-stmts.c (vect_transform_stmt): Precompute
118 nested_in_vect_loop_p since the scalar stmt may get invalidated.
120 2018-01-16 Jakub Jelinek <jakub@redhat.com>
122 PR c/83844
123 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
124 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
125 If off is not INTEGER_CST, issue a may not be aligned warning
126 rather than isn't aligned. Use isn%'t rather than isn't.
127 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
128 into MULT_EXPR.
129 <case MULT_EXPR>: Improve the case when bottom and one of the
130 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
131 operand, in that case check if the other operand is multiple of
132 bottom divided by the INTEGER_CST operand.
134 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
136 PR target/83858
137 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
138 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
139 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
140 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
141 * config/pa/pa.c (pa_function_arg_advance): Likewise.
142 (pa_function_arg, pa_arg_partial_bytes): Likewise.
143 (pa_function_arg_size): New function.
145 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
147 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
148 in a separate statement.
150 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
152 PR tree-optimization/83847
153 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
154 group gathers and scatters.
156 2018-01-16 Jakub Jelinek <jakub@redhat.com>
158 PR rtl-optimization/86620
159 * params.def (max-sched-ready-insns): Bump minimum value to 1.
161 PR rtl-optimization/83213
162 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
163 to last if both are JUMP_INSNs.
165 PR tree-optimization/83843
166 * gimple-ssa-store-merging.c
167 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
168 store_immediate_info for bswap/nop orig_stores.
170 2018-01-15 Andrew Waterman <andrew@sifive.com>
172 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
173 !TARGET_MUL.
174 <UDIV>: Increase cost if !TARGET_DIV.
176 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
178 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
179 (define_attr "cr_logical_3op"): New.
180 (cceq_ior_compare): Adjust.
181 (cceq_ior_compare_complement): Adjust.
182 (*cceq_rev_compare): Adjust.
183 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
184 (is_cracked_insn): Adjust.
185 (insn_must_be_first_in_group): Adjust.
186 * config/rs6000/40x.md: Adjust.
187 * config/rs6000/440.md: Adjust.
188 * config/rs6000/476.md: Adjust.
189 * config/rs6000/601.md: Adjust.
190 * config/rs6000/603.md: Adjust.
191 * config/rs6000/6xx.md: Adjust.
192 * config/rs6000/7450.md: Adjust.
193 * config/rs6000/7xx.md: Adjust.
194 * config/rs6000/8540.md: Adjust.
195 * config/rs6000/cell.md: Adjust.
196 * config/rs6000/e300c2c3.md: Adjust.
197 * config/rs6000/e500mc.md: Adjust.
198 * config/rs6000/e500mc64.md: Adjust.
199 * config/rs6000/e5500.md: Adjust.
200 * config/rs6000/e6500.md: Adjust.
201 * config/rs6000/mpc.md: Adjust.
202 * config/rs6000/power4.md: Adjust.
203 * config/rs6000/power5.md: Adjust.
204 * config/rs6000/power6.md: Adjust.
205 * config/rs6000/power7.md: Adjust.
206 * config/rs6000/power8.md: Adjust.
207 * config/rs6000/power9.md: Adjust.
208 * config/rs6000/rs64.md: Adjust.
209 * config/rs6000/titan.md: Adjust.
211 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
213 * config/i386/predicates.md (indirect_branch_operand): Rewrite
214 ix86_indirect_branch_register logic.
216 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
218 * config/i386/constraints.md (Bs): Update
219 ix86_indirect_branch_register check. Don't check
220 ix86_indirect_branch_register with GOT_memory_operand.
221 (Bw): Likewise.
222 * config/i386/predicates.md (GOT_memory_operand): Don't check
223 ix86_indirect_branch_register here.
224 (GOT32_symbol_operand): Likewise.
226 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
228 * config/i386/predicates.md (constant_call_address_operand):
229 Rewrite ix86_indirect_branch_register logic.
230 (sibcall_insn_operand): Likewise.
232 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
234 * config/i386/constraints.md (Bs): Replace
235 ix86_indirect_branch_thunk_register with
236 ix86_indirect_branch_register.
237 (Bw): Likewise.
238 * config/i386/i386.md (indirect_jump): Likewise.
239 (tablejump): Likewise.
240 (*sibcall_memory): Likewise.
241 (*sibcall_value_memory): Likewise.
242 Peepholes of indirect call and jump via memory: Likewise.
243 * config/i386/i386.opt: Likewise.
244 * config/i386/predicates.md (indirect_branch_operand): Likewise.
245 (GOT_memory_operand): Likewise.
246 (call_insn_operand): Likewise.
247 (sibcall_insn_operand): Likewise.
248 (GOT32_symbol_operand): Likewise.
250 2018-01-15 Jakub Jelinek <jakub@redhat.com>
252 PR middle-end/83837
253 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
254 type rather than type addr's type points to.
255 (expand_omp_atomic_mutex): Likewise.
256 (expand_omp_atomic): Likewise.
258 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
260 PR target/83839
261 * config/i386/i386.c (output_indirect_thunk_function): Use
262 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
263 for __x86_return_thunk.
265 2018-01-15 Richard Biener <rguenther@suse.de>
267 PR middle-end/83850
268 * expmed.c (extract_bit_field_1): Fix typo.
270 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
272 PR target/83687
273 * config/arm/iterators.md (VF): New mode iterator.
274 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
275 Remove integer-related logic from pattern.
276 (neon_vabd<mode>_3): Likewise.
278 2018-01-15 Jakub Jelinek <jakub@redhat.com>
280 PR middle-end/82694
281 * common.opt (fstrict-overflow): No longer an alias.
282 (fwrapv-pointer): New option.
283 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
284 also for pointer types based on flag_wrapv_pointer.
285 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
286 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
287 opts->x_flag_wrapv got set.
288 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
289 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
290 POINTER_TYPE_OVERFLOW_UNDEFINED.
291 * match.pd: Likewise in address comparison pattern.
292 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
294 2018-01-15 Richard Biener <rguenther@suse.de>
296 PR lto/83804
297 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
298 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
299 Reset type names to their identifier if their TYPE_DECL doesn't
300 have linkage (and thus is used for ODR and devirt).
301 (save_debug_info_for_decl): Remove.
302 (save_debug_info_for_type): Likewise.
303 (add_tree_to_fld_list): Adjust.
304 * tree-pretty-print.c (dump_generic_node): Make dumping of
305 type names more robust.
307 2018-01-15 Richard Biener <rguenther@suse.de>
309 * BASE-VER: Bump to 8.0.1.
311 2018-01-14 Martin Sebor <msebor@redhat.com>
313 PR other/83508
314 * builtins.c (check_access): Avoid warning when the no-warning bit
315 is set.
317 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
319 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
320 * ira-color (allocno_hard_regs_compare): Likewise.
322 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
324 PR target/83013
325 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
326 Use .pushsection/.popsection.
328 2018-01-14 Martin Sebor <msebor@redhat.com>
330 PR c++/81327
331 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
333 2018-01-14 Jakub Jelinek <jakub@redhat.com>
335 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
336 entry from extra_headers.
337 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
338 extra_headers, make the list bitwise identical to the i?86-*-* one.
340 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
342 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
343 -mcmodel=large with -mindirect-branch=thunk,
344 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
345 -mfunction-return=thunk-extern.
346 * doc/invoke.texi: Document -mcmodel=large is incompatible with
347 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
348 -mfunction-return=thunk and -mfunction-return=thunk-extern.
350 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
352 * config/i386/i386.c (print_reg): Print the name of the full
353 integer register without '%'.
354 (ix86_print_operand): Handle 'V'.
355 * doc/extend.texi: Document 'V' modifier.
357 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
359 * config/i386/constraints.md (Bs): Disallow memory operand for
360 -mindirect-branch-register.
361 (Bw): Likewise.
362 * config/i386/predicates.md (indirect_branch_operand): Likewise.
363 (GOT_memory_operand): Likewise.
364 (call_insn_operand): Likewise.
365 (sibcall_insn_operand): Likewise.
366 (GOT32_symbol_operand): Likewise.
367 * config/i386/i386.md (indirect_jump): Call convert_memory_address
368 for -mindirect-branch-register.
369 (tablejump): Likewise.
370 (*sibcall_memory): Likewise.
371 (*sibcall_value_memory): Likewise.
372 Disallow peepholes of indirect call and jump via memory for
373 -mindirect-branch-register.
374 (*call_pop): Replace m with Bw.
375 (*call_value_pop): Likewise.
376 (*sibcall_pop_memory): Replace m with Bs.
377 * config/i386/i386.opt (mindirect-branch-register): New option.
378 * doc/invoke.texi: Document -mindirect-branch-register option.
380 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
382 * config/i386/i386-protos.h (ix86_output_function_return): New.
383 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
384 set function_return_type.
385 (indirect_thunk_name): Add ret_p to indicate thunk for function
386 return.
387 (output_indirect_thunk_function): Pass false to
388 indirect_thunk_name.
389 (ix86_output_indirect_branch_via_reg): Likewise.
390 (ix86_output_indirect_branch_via_push): Likewise.
391 (output_indirect_thunk_function): Create alias for function
392 return thunk if regno < 0.
393 (ix86_output_function_return): New function.
394 (ix86_handle_fndecl_attribute): Handle function_return.
395 (ix86_attribute_table): Add function_return.
396 * config/i386/i386.h (machine_function): Add
397 function_return_type.
398 * config/i386/i386.md (simple_return_internal): Use
399 ix86_output_function_return.
400 (simple_return_internal_long): Likewise.
401 * config/i386/i386.opt (mfunction-return=): New option.
402 (indirect_branch): Mention -mfunction-return=.
403 * doc/extend.texi: Document function_return function attribute.
404 * doc/invoke.texi: Document -mfunction-return= option.
406 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
408 * config/i386/i386-opts.h (indirect_branch): New.
409 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
410 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
411 with local indirect jump when converting indirect call and jump.
412 (ix86_set_indirect_branch_type): New.
413 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
414 (indirectlabelno): New.
415 (indirect_thunk_needed): Likewise.
416 (indirect_thunk_bnd_needed): Likewise.
417 (indirect_thunks_used): Likewise.
418 (indirect_thunks_bnd_used): Likewise.
419 (INDIRECT_LABEL): Likewise.
420 (indirect_thunk_name): Likewise.
421 (output_indirect_thunk): Likewise.
422 (output_indirect_thunk_function): Likewise.
423 (ix86_output_indirect_branch_via_reg): Likewise.
424 (ix86_output_indirect_branch_via_push): Likewise.
425 (ix86_output_indirect_branch): Likewise.
426 (ix86_output_indirect_jmp): Likewise.
427 (ix86_code_end): Call output_indirect_thunk_function if needed.
428 (ix86_output_call_insn): Call ix86_output_indirect_branch if
429 needed.
430 (ix86_handle_fndecl_attribute): Handle indirect_branch.
431 (ix86_attribute_table): Add indirect_branch.
432 * config/i386/i386.h (machine_function): Add indirect_branch_type
433 and has_local_indirect_jump.
434 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
435 to true.
436 (tablejump): Likewise.
437 (*indirect_jump): Use ix86_output_indirect_jmp.
438 (*tablejump_1): Likewise.
439 (simple_return_indirect_internal): Likewise.
440 * config/i386/i386.opt (mindirect-branch=): New option.
441 (indirect_branch): New.
442 (keep): Likewise.
443 (thunk): Likewise.
444 (thunk-inline): Likewise.
445 (thunk-extern): Likewise.
446 * doc/extend.texi: Document indirect_branch function attribute.
447 * doc/invoke.texi: Document -mindirect-branch= option.
449 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
451 PR ipa/83051
452 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
454 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
456 * ipa-inline.c (want_inline_small_function_p): Return false if
457 inlining has already failed with CIF_FINAL_ERROR.
458 (update_caller_keys): Call want_inline_small_function_p before
459 can_inline_edge_p.
460 (update_callee_keys): Likewise.
462 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
464 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
465 New function.
466 (rs6000_quadword_masked_address_p): Likewise.
467 (quad_aligned_load_p): Likewise.
468 (quad_aligned_store_p): Likewise.
469 (const_load_sequence_p): Add comment to describe the outer-most loop.
470 (mimic_memory_attributes_and_flags): New function.
471 (rs6000_gen_stvx): Likewise.
472 (replace_swapped_aligned_store): Likewise.
473 (rs6000_gen_lvx): Likewise.
474 (replace_swapped_aligned_load): Likewise.
475 (replace_swapped_load_constant): Capitalize argument name in
476 comment describing this function.
477 (rs6000_analyze_swaps): Add a third pass to search for vector loads
478 and stores that access quad-word aligned addresses and replace
479 with stvx or lvx instructions when appropriate.
480 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
481 New function prototype.
482 (rs6000_quadword_masked_address_p): Likewise.
483 (rs6000_gen_lvx): Likewise.
484 (rs6000_gen_stvx): Likewise.
485 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
486 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
487 when memory address is aligned.
488 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
489 this split to select lvx instruction when memory address is aligned.
490 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
491 instruction when memory address is aligned.
492 (*vsx_le_perm_load_v16qi): Likewise.
493 (four unnamed splitters): Modify to select the stvx instruction
494 when memory is aligned.
496 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
498 * predict.c (determine_unlikely_bbs): Handle correctly BBs
499 which appears in the queue multiple times.
501 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
502 Alan Hayward <alan.hayward@arm.com>
503 David Sherwood <david.sherwood@arm.com>
505 * tree-vectorizer.h (vec_lower_bound): New structure.
506 (_loop_vec_info): Add check_nonzero and lower_bounds.
507 (LOOP_VINFO_CHECK_NONZERO): New macro.
508 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
509 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
510 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
511 fields. Make seg_len the distance travelled, not including the
512 access size.
513 (dr_direction_indicator): Declare.
514 (dr_zero_step_indicator): Likewise.
515 (dr_known_forward_stride_p): Likewise.
516 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
517 tree-ssanames.h.
518 (runtime_alias_check_p): Allow runtime alias checks with
519 variable strides.
520 (operator ==): Compare access_size and align.
521 (prune_runtime_alias_test_list): Rework for new distinction between
522 the access_size and seg_len.
523 (create_intersect_range_checks_index): Likewise. Cope with polynomial
524 segment lengths.
525 (get_segment_min_max): New function.
526 (create_intersect_range_checks): Use it.
527 (dr_step_indicator): New function.
528 (dr_direction_indicator): Likewise.
529 (dr_zero_step_indicator): Likewise.
530 (dr_known_forward_stride_p): Likewise.
531 * tree-loop-distribution.c (data_ref_segment_size): Return
532 DR_STEP * (niters - 1).
533 (compute_alias_check_pairs): Update call to the dr_with_seg_len
534 constructor.
535 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
536 (vect_preserves_scalar_order_p): New function, split out from...
537 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
538 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
539 (vect_vfa_access_size): New function.
540 (vect_vfa_align): Likewise.
541 (vect_compile_time_alias): Take access_size_a and access_b arguments.
542 (dump_lower_bound): New function.
543 (vect_check_lower_bound): Likewise.
544 (vect_small_gap_p): Likewise.
545 (vectorizable_with_step_bound_p): Likewise.
546 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
547 depencies if the vectorization factor is 1. Convert the checks
548 for nonzero steps into checks on the bounds of DR_STEP. Try using
549 a bunds check for variable steps if the minimum required step is
550 relatively small. Update calls to the dr_with_seg_len
551 constructor and to vect_compile_time_alias.
552 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
553 function.
554 (vect_loop_versioning): Call it.
555 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
556 when retrying.
557 (vect_estimate_min_profitable_iters): Account for any bounds checks.
559 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
560 Alan Hayward <alan.hayward@arm.com>
561 David Sherwood <david.sherwood@arm.com>
563 * doc/sourcebuild.texi (vect_scatter_store): Document.
564 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
565 optabs.
566 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
567 Document.
568 * genopinit.c (main): Add supports_vec_scatter_store and
569 supports_vec_scatter_store_cached to target_optabs.
570 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
571 IFN_MASK_SCATTER_STORE.
572 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
573 functions.
574 * internal-fn.h (internal_store_fn_p): Declare.
575 (internal_fn_stored_value_index): Likewise.
576 * internal-fn.c (scatter_store_direct): New macro.
577 (expand_scatter_store_optab_fn): New function.
578 (direct_scatter_store_optab_supported_p): New macro.
579 (internal_store_fn_p): New function.
580 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
581 IFN_MASK_SCATTER_STORE.
582 (internal_fn_mask_index): Likewise.
583 (internal_fn_stored_value_index): New function.
584 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
585 for scatter stores.
586 * optabs-query.h (supports_vec_scatter_store_p): Declare.
587 * optabs-query.c (supports_vec_scatter_store_p): New function.
588 * tree-vectorizer.h (vect_get_store_rhs): Declare.
589 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
590 true for scatter stores.
591 (vect_gather_scatter_fn_p): Handle scatter stores too.
592 (vect_check_gather_scatter): Consider using scatter stores if
593 supports_vec_scatter_store_p.
594 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
595 scatter stores too.
596 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
597 internal_fn_stored_value_index.
598 (check_load_store_masking): Handle scatter stores too.
599 (vect_get_store_rhs): Make public.
600 (vectorizable_call): Use internal_store_fn_p.
601 (vectorizable_store): Handle scatter store internal functions.
602 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
603 when deciding whether the end of the group has been reached.
604 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
605 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
606 (mask_scatter_store<mode>): New insns.
608 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
609 Alan Hayward <alan.hayward@arm.com>
610 David Sherwood <david.sherwood@arm.com>
612 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
613 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
614 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
615 function.
616 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
617 Use vect_truncate_gather_scatter_offset if we can't treat the
618 operation as a normal gather load or scatter store.
619 (get_group_load_store_type): Take the gather_scatter_info
620 as argument. Try using a gather load or scatter store for
621 single-element groups.
622 (get_load_store_type): Update calls to get_group_load_store_type
623 and vect_use_strided_gather_scatters_p.
625 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
626 Alan Hayward <alan.hayward@arm.com>
627 David Sherwood <david.sherwood@arm.com>
629 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
630 optional tree argument.
631 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
632 null target hooks.
633 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
634 but continue to use the current value as a fallback.
635 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
636 to compare the updates.
637 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
638 (get_load_store_type): Use it when handling a strided access.
639 (vect_get_strided_load_store_ops): New function.
640 (vect_get_data_ptr_increment): Likewise.
641 (vectorizable_load): Handle strided gather loads. Always pass
642 a step to vect_create_data_ref_ptr and bump_vector_ptr.
644 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
645 Alan Hayward <alan.hayward@arm.com>
646 David Sherwood <david.sherwood@arm.com>
648 * doc/md.texi (gather_load@var{m}): Document.
649 (mask_gather_load@var{m}): Likewise.
650 * genopinit.c (main): Add supports_vec_gather_load and
651 supports_vec_gather_load_cached to target_optabs.
652 * optabs-tree.c (init_tree_optimization_optabs): Use
653 ggc_cleared_alloc to allocate target_optabs.
654 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
655 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
656 functions.
657 * internal-fn.h (internal_load_fn_p): Declare.
658 (internal_gather_scatter_fn_p): Likewise.
659 (internal_fn_mask_index): Likewise.
660 (internal_gather_scatter_fn_supported_p): Likewise.
661 * internal-fn.c (gather_load_direct): New macro.
662 (expand_gather_load_optab_fn): New function.
663 (direct_gather_load_optab_supported_p): New macro.
664 (direct_internal_fn_optab): New function.
665 (internal_load_fn_p): Likewise.
666 (internal_gather_scatter_fn_p): Likewise.
667 (internal_fn_mask_index): Likewise.
668 (internal_gather_scatter_fn_supported_p): Likewise.
669 * optabs-query.c (supports_at_least_one_mode_p): New function.
670 (supports_vec_gather_load_p): Likewise.
671 * optabs-query.h (supports_vec_gather_load_p): Declare.
672 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
673 and memory_type field.
674 (NUM_PATTERNS): Bump to 15.
675 * tree-vect-data-refs.c: Include internal-fn.h.
676 (vect_gather_scatter_fn_p): New function.
677 (vect_describe_gather_scatter_call): Likewise.
678 (vect_check_gather_scatter): Try using internal functions for
679 gather loads. Recognize existing calls to a gather load function.
680 (vect_analyze_data_refs): Consider using gather loads if
681 supports_vec_gather_load_p.
682 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
683 (vect_get_gather_scatter_offset_type): Likewise.
684 (vect_convert_mask_for_vectype): Likewise.
685 (vect_add_conversion_to_patterm): Likewise.
686 (vect_try_gather_scatter_pattern): Likewise.
687 (vect_recog_gather_scatter_pattern): New pattern recognizer.
688 (vect_vect_recog_func_ptrs): Add it.
689 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
690 internal_fn_mask_index and internal_gather_scatter_fn_p.
691 (check_load_store_masking): Take the gather_scatter_info as an
692 argument and handle gather loads.
693 (vect_get_gather_scatter_ops): New function.
694 (vectorizable_call): Check internal_load_fn_p.
695 (vectorizable_load): Likewise. Handle gather load internal
696 functions.
697 (vectorizable_store): Update call to check_load_store_masking.
698 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
699 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
700 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
701 (aarch64_gather_scale_operand_d): New predicates.
702 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
703 (mask_gather_load<mode>): New insns.
705 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
706 Alan Hayward <alan.hayward@arm.com>
707 David Sherwood <david.sherwood@arm.com>
709 * optabs.def (fold_left_plus_optab): New optab.
710 * doc/md.texi (fold_left_plus_@var{m}): Document.
711 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
712 * internal-fn.c (fold_left_direct): Define.
713 (expand_fold_left_optab_fn): Likewise.
714 (direct_fold_left_optab_supported_p): Likewise.
715 * fold-const-call.c (fold_const_fold_left): New function.
716 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
717 * tree-parloops.c (valid_reduction_p): New function.
718 (gather_scalar_reductions): Use it.
719 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
720 (vect_finish_replace_stmt): Declare.
721 * tree-vect-loop.c (fold_left_reduction_fn): New function.
722 (needs_fold_left_reduction_p): New function, split out from...
723 (vect_is_simple_reduction): ...here. Accept reductions that
724 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
725 (vect_force_simple_reduction): Also store the reduction type in
726 the assignment's STMT_VINFO_REDUC_TYPE.
727 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
728 (merge_with_identity): New function.
729 (vect_expand_fold_left): Likewise.
730 (vectorize_fold_left_reduction): Likewise.
731 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
732 scalar phi in place for it. Check for target support and reject
733 cases that would reassociate the operation. Defer the transform
734 phase to vectorize_fold_left_reduction.
735 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
736 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
737 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
739 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
741 * tree-if-conv.c (predicate_mem_writes): Remove redundant
742 call to ifc_temp_var.
744 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
745 Alan Hayward <alan.hayward@arm.com>
746 David Sherwood <david.sherwood@arm.com>
748 * target.def (legitimize_address_displacement): Take the original
749 offset as a poly_int.
750 * targhooks.h (default_legitimize_address_displacement): Update
751 accordingly.
752 * targhooks.c (default_legitimize_address_displacement): Likewise.
753 * doc/tm.texi: Regenerate.
754 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
755 as an argument, moving assert of ad->disp == ad->disp_term to...
756 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
757 Try calling targetm.legitimize_address_displacement before expanding
758 the address rather than afterwards, and adjust for the new interface.
759 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
760 Match the new hook interface. Handle SVE addresses.
761 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
762 new hook interface.
764 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
766 * Makefile.in (OBJS): Add early-remat.o.
767 * target.def (select_early_remat_modes): New hook.
768 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
769 * doc/tm.texi: Regenerate.
770 * targhooks.h (default_select_early_remat_modes): Declare.
771 * targhooks.c (default_select_early_remat_modes): New function.
772 * timevar.def (TV_EARLY_REMAT): New timevar.
773 * passes.def (pass_early_remat): New pass.
774 * tree-pass.h (make_pass_early_remat): Declare.
775 * early-remat.c: New file.
776 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
777 function.
778 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
780 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
781 Alan Hayward <alan.hayward@arm.com>
782 David Sherwood <david.sherwood@arm.com>
784 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
785 vfm1 with a bound_epilog parameter.
786 (vect_do_peeling): Update calls accordingly, and move the prologue
787 call earlier in the function. Treat the base bound_epilog as 0 for
788 fully-masked loops and retain vf - 1 for other loops. Add 1 to
789 this base when peeling for gaps.
790 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
791 with fully-masked loops.
792 (vect_estimate_min_profitable_iters): Handle the single peeled
793 iteration in that case.
795 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
796 Alan Hayward <alan.hayward@arm.com>
797 David Sherwood <david.sherwood@arm.com>
799 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
800 single-element interleaving even if the size is not a power of 2.
801 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
802 accesses for single-element interleaving if the group size is
803 not a power of 2.
805 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
806 Alan Hayward <alan.hayward@arm.com>
807 David Sherwood <david.sherwood@arm.com>
809 * doc/md.texi (fold_extract_last_@var{m}): Document.
810 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
811 * optabs.def (fold_extract_last_optab): New optab.
812 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
813 * internal-fn.c (fold_extract_direct): New macro.
814 (expand_fold_extract_optab_fn): Likewise.
815 (direct_fold_extract_optab_supported_p): Likewise.
816 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
817 * tree-vect-loop.c (vect_model_reduction_cost): Handle
818 EXTRACT_LAST_REDUCTION.
819 (get_initial_def_for_reduction): Do not create an initial vector
820 for EXTRACT_LAST_REDUCTION reductions.
821 (vectorizable_reduction): Leave the scalar phi in place for
822 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
823 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
824 epilogue code for EXTRACT_LAST_REDUCTION and defer the
825 transform phase to vectorizable_condition.
826 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
827 split out from...
828 (vect_finish_stmt_generation): ...here.
829 (vect_finish_replace_stmt): New function.
830 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
831 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
832 pattern.
833 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
835 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
836 Alan Hayward <alan.hayward@arm.com>
837 David Sherwood <david.sherwood@arm.com>
839 * doc/md.texi (extract_last_@var{m}): Document.
840 * optabs.def (extract_last_optab): New optab.
841 * internal-fn.def (EXTRACT_LAST): New internal function.
842 * internal-fn.c (cond_unary_direct): New macro.
843 (expand_cond_unary_optab_fn): Likewise.
844 (direct_cond_unary_optab_supported_p): Likewise.
845 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
846 loops using EXTRACT_LAST.
847 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
848 (extract_last_<mode>): ...this optab.
849 (vec_extract<mode><Vel>): Update accordingly.
851 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
852 Alan Hayward <alan.hayward@arm.com>
853 David Sherwood <david.sherwood@arm.com>
855 * target.def (empty_mask_is_expensive): New hook.
856 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
857 * doc/tm.texi: Regenerate.
858 * targhooks.h (default_empty_mask_is_expensive): Declare.
859 * targhooks.c (default_empty_mask_is_expensive): New function.
860 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
861 if the target says that empty masks are expensive.
862 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
863 New function.
864 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
866 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
867 Alan Hayward <alan.hayward@arm.com>
868 David Sherwood <david.sherwood@arm.com>
870 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
871 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
872 (vect_use_loop_mask_for_alignment_p): New function.
873 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
874 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
875 niters_skip argument. Make sure that the first niters_skip elements
876 of the first iteration are inactive.
877 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
878 Update call to vect_set_loop_masks_directly.
879 (get_misalign_in_elems): New function, split out from...
880 (vect_gen_prolog_loop_niters): ...here.
881 (vect_update_init_of_dr): Take a code argument that specifies whether
882 the adjustment should be added or subtracted.
883 (vect_update_init_of_drs): Likewise.
884 (vect_prepare_for_masked_peels): New function.
885 (vect_do_peeling): Skip prologue peeling if we're using a mask
886 instead. Update call to vect_update_inits_of_drs.
887 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
888 mask_skip_niters.
889 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
890 alignment. Do not include the number of peeled iterations in
891 the minimum threshold in that case.
892 (vectorizable_induction): Adjust the start value down by
893 LOOP_VINFO_MASK_SKIP_NITERS iterations.
894 (vect_transform_loop): Call vect_prepare_for_masked_peels.
895 Take the number of skipped iterations into account when calculating
896 the loop bounds.
897 * tree-vect-stmts.c (vect_gen_while_not): New function.
899 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
900 Alan Hayward <alan.hayward@arm.com>
901 David Sherwood <david.sherwood@arm.com>
903 * doc/sourcebuild.texi (vect_fully_masked): Document.
904 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
905 default value to 0.
906 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
907 split out from...
908 (vect_analyze_loop_2): ...here. Don't check the vectorization
909 factor against the number of loop iterations if the loop is
910 fully-masked.
912 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
913 Alan Hayward <alan.hayward@arm.com>
914 David Sherwood <david.sherwood@arm.com>
916 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
917 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
918 (dump_groups): Update accordingly.
919 (iv_use::mem_type): New member variable.
920 (address_p): New function.
921 (record_use): Add a mem_type argument and initialize the new
922 mem_type field.
923 (record_group_use): Add a mem_type argument. Use address_p.
924 Remove obsolete null checks of base_object. Update call to record_use.
925 (find_interesting_uses_op): Update call to record_group_use.
926 (find_interesting_uses_cond): Likewise.
927 (find_interesting_uses_address): Likewise.
928 (get_mem_type_for_internal_fn): New function.
929 (find_address_like_use): Likewise.
930 (find_interesting_uses_stmt): Try find_address_like_use before
931 calling find_interesting_uses_op.
932 (addr_offset_valid_p): Use the iv mem_type field as the type
933 of the addressed memory.
934 (add_autoinc_candidates): Likewise.
935 (get_address_cost): Likewise.
936 (split_small_address_groups_p): Use address_p.
937 (split_address_groups): Likewise.
938 (add_iv_candidate_for_use): Likewise.
939 (autoinc_possible_for_pair): Likewise.
940 (rewrite_groups): Likewise.
941 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
942 (determine_group_iv_cost): Update after split of USE_ADDRESS.
943 (get_alias_ptr_type_for_ptr_address): New function.
944 (rewrite_use_address): Rewrite address uses in calls that were
945 identified by find_address_like_use.
947 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
948 Alan Hayward <alan.hayward@arm.com>
949 David Sherwood <david.sherwood@arm.com>
951 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
952 TARGET_MEM_REFs.
953 * gimple-expr.h (is_gimple_addressable: Likewise.
954 * gimple-expr.c (is_gimple_address): Likewise.
955 * internal-fn.c (expand_call_mem_ref): New function.
956 (expand_mask_load_optab_fn): Use it.
957 (expand_mask_store_optab_fn): Likewise.
959 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
960 Alan Hayward <alan.hayward@arm.com>
961 David Sherwood <david.sherwood@arm.com>
963 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
964 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
965 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
966 (cond_umax@var{mode}): Document.
967 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
968 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
969 (cond_umin_optab, cond_umax_optab): New optabs.
970 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
971 (COND_IOR, COND_XOR): New internal functions.
972 * internal-fn.h (get_conditional_internal_fn): Declare.
973 * internal-fn.c (cond_binary_direct): New macro.
974 (expand_cond_binary_optab_fn): Likewise.
975 (direct_cond_binary_optab_supported_p): Likewise.
976 (get_conditional_internal_fn): New function.
977 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
978 Cope with reduction statements that are vectorized as calls rather
979 than assignments.
980 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
981 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
982 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
983 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
984 (UNSPEC_COND_EOR): New unspecs.
985 (optab): Add mappings for them.
986 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
987 (sve_int_op, sve_fp_op): New int attributes.
989 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
990 Alan Hayward <alan.hayward@arm.com>
991 David Sherwood <david.sherwood@arm.com>
993 * optabs.def (while_ult_optab): New optab.
994 * doc/md.texi (while_ult@var{m}@var{n}): Document.
995 * internal-fn.def (WHILE_ULT): New internal function.
996 * internal-fn.h (direct_internal_fn_supported_p): New override
997 that takes two types as argument.
998 * internal-fn.c (while_direct): New macro.
999 (expand_while_optab_fn): New function.
1000 (convert_optab_supported_p): Likewise.
1001 (direct_while_optab_supported_p): New macro.
1002 * wide-int.h (wi::udiv_ceil): New function.
1003 * tree-vectorizer.h (rgroup_masks): New structure.
1004 (vec_loop_masks): New typedef.
1005 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1006 and fully_masked_p.
1007 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1008 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1009 (vect_max_vf): New function.
1010 (slpeel_make_loop_iterate_ntimes): Delete.
1011 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1012 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1013 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1014 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1015 internal-fn.h, stor-layout.h and optabs-query.h.
1016 (vect_set_loop_mask): New function.
1017 (add_preheader_seq): Likewise.
1018 (add_header_seq): Likewise.
1019 (interleave_supported_p): Likewise.
1020 (vect_maybe_permute_loop_masks): Likewise.
1021 (vect_set_loop_masks_directly): Likewise.
1022 (vect_set_loop_condition_masked): Likewise.
1023 (vect_set_loop_condition_unmasked): New function, split out from
1024 slpeel_make_loop_iterate_ntimes.
1025 (slpeel_make_loop_iterate_ntimes): Rename to..
1026 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1027 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1028 (vect_do_peeling): Update call accordingly.
1029 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1030 loops.
1031 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1032 mask_compare_type, can_fully_mask_p and fully_masked_p.
1033 (release_vec_loop_masks): New function.
1034 (_loop_vec_info): Use it to free the loop masks.
1035 (can_produce_all_loop_masks_p): New function.
1036 (vect_get_max_nscalars_per_iter): Likewise.
1037 (vect_verify_full_masking): Likewise.
1038 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1039 retries, and free the mask rgroups before retrying. Check loop-wide
1040 reasons for disallowing fully-masked loops. Make the final decision
1041 about whether use a fully-masked loop or not.
1042 (vect_estimate_min_profitable_iters): Do not assume that peeling
1043 for the number of iterations will be needed for fully-masked loops.
1044 (vectorizable_reduction): Disable fully-masked loops.
1045 (vectorizable_live_operation): Likewise.
1046 (vect_halve_mask_nunits): New function.
1047 (vect_double_mask_nunits): Likewise.
1048 (vect_record_loop_mask): Likewise.
1049 (vect_get_loop_mask): Likewise.
1050 (vect_transform_loop): Handle the case in which the final loop
1051 iteration might handle a partial vector. Call vect_set_loop_condition
1052 instead of slpeel_make_loop_iterate_ntimes.
1053 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1054 (check_load_store_masking): New function.
1055 (prepare_load_store_mask): Likewise.
1056 (vectorizable_store): Handle fully-masked loops.
1057 (vectorizable_load): Likewise.
1058 (supportable_widening_operation): Use vect_halve_mask_nunits for
1059 booleans.
1060 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1061 (vect_gen_while): New function.
1062 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1063 (aarch64_uqdec<mode>): New insn.
1065 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1066 Alan Hayward <alan.hayward@arm.com>
1067 David Sherwood <david.sherwood@arm.com>
1069 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1070 (reduc_xor_scal_optab): New optabs.
1071 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1072 (reduc_xor_scal_@var{m}): Document.
1073 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1074 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1075 internal functions.
1076 * fold-const-call.c (fold_const_call): Handle them.
1077 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1078 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1079 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1080 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1081 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1082 (UNSPEC_XORV): New unspecs.
1083 (optab): Add entries for them.
1084 (BITWISEV): New int iterator.
1085 (bit_reduc_op): New int attributes.
1087 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1088 Alan Hayward <alan.hayward@arm.com>
1089 David Sherwood <david.sherwood@arm.com>
1091 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1092 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1093 * optabs.def (vec_shl_insert_optab): New optab.
1094 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1095 (duplicate_and_interleave): Likewise.
1096 * tree-vect-loop.c: Include internal-fn.h.
1097 (neutral_op_for_slp_reduction): New function, split out from
1098 get_initial_defs_for_reduction.
1099 (get_initial_def_for_reduction): Handle option 2 for variable-length
1100 vectors by loading the neutral value into a vector and then shifting
1101 the initial value into element 0.
1102 (get_initial_defs_for_reduction): Replace the code argument with
1103 the neutral value calculated by neutral_op_for_slp_reduction.
1104 Use gimple_build_vector for constant-length vectors.
1105 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1106 but the first group_size elements have a neutral value.
1107 Use duplicate_and_interleave otherwise.
1108 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1109 Update call to get_initial_defs_for_reduction. Handle SLP
1110 reductions for variable-length vectors by creating one vector
1111 result for each scalar result, with the elements associated
1112 with other scalar results stubbed out with the neutral value.
1113 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1114 Require IFN_VEC_SHL_INSERT for double reductions on
1115 variable-length vectors, or SLP reductions that have
1116 a neutral value. Require can_duplicate_and_interleave_p
1117 support for variable-length unchained SLP reductions if there
1118 is no neutral value, such as for MIN/MAX reductions. Also require
1119 the number of vector elements to be a multiple of the number of
1120 SLP statements when doing variable-length unchained SLP reductions.
1121 Update call to vect_create_epilog_for_reduction.
1122 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1123 and remove initial values.
1124 (duplicate_and_interleave): Make public.
1125 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1126 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1128 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1129 Alan Hayward <alan.hayward@arm.com>
1130 David Sherwood <david.sherwood@arm.com>
1132 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1133 (can_duplicate_and_interleave_p): New function.
1134 (vect_get_and_check_slp_defs): Take the vector of statements
1135 rather than just the current one. Remove excess parentheses.
1136 Restriction rejectinon of vect_constant_def and vect_external_def
1137 for variable-length vectors to boolean types, or types for which
1138 can_duplicate_and_interleave_p is false.
1139 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1140 (duplicate_and_interleave): New function.
1141 (vect_get_constant_vectors): Use gimple_build_vector for
1142 constant-length vectors and suitable variable-length constant
1143 vectors. Use duplicate_and_interleave for other variable-length
1144 vectors. Don't defer the update when inserting new statements.
1146 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1147 Alan Hayward <alan.hayward@arm.com>
1148 David Sherwood <david.sherwood@arm.com>
1150 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1151 min_profitable_iters doesn't go negative.
1153 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1154 Alan Hayward <alan.hayward@arm.com>
1155 David Sherwood <david.sherwood@arm.com>
1157 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1158 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1159 * optabs.def (vec_mask_load_lanes_optab): New optab.
1160 (vec_mask_store_lanes_optab): Likewise.
1161 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1162 (MASK_STORE_LANES): Likewise.
1163 * internal-fn.c (mask_load_lanes_direct): New macro.
1164 (mask_store_lanes_direct): Likewise.
1165 (expand_mask_load_optab_fn): Handle masked operations.
1166 (expand_mask_load_lanes_optab_fn): New macro.
1167 (expand_mask_store_optab_fn): Handle masked operations.
1168 (expand_mask_store_lanes_optab_fn): New macro.
1169 (direct_mask_load_lanes_optab_supported_p): Likewise.
1170 (direct_mask_store_lanes_optab_supported_p): Likewise.
1171 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1172 parameter.
1173 (vect_load_lanes_supported): Likewise.
1174 * tree-vect-data-refs.c (strip_conversion): New function.
1175 (can_group_stmts_p): Likewise.
1176 (vect_analyze_data_ref_accesses): Use it instead of checking
1177 for a pair of assignments.
1178 (vect_store_lanes_supported): Take a masked_p parameter.
1179 (vect_load_lanes_supported): Likewise.
1180 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1181 vect_store_lanes_supported and vect_load_lanes_supported.
1182 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1183 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1184 parameter. Don't allow gaps for masked accesses.
1185 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1186 and vect_load_lanes_supported.
1187 (get_load_store_type): Take a masked_p parameter and update
1188 call to get_group_load_store_type.
1189 (vectorizable_store): Update call to get_load_store_type.
1190 Handle IFN_MASK_STORE_LANES.
1191 (vectorizable_load): Update call to get_load_store_type.
1192 Handle IFN_MASK_LOAD_LANES.
1194 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1195 Alan Hayward <alan.hayward@arm.com>
1196 David Sherwood <david.sherwood@arm.com>
1198 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1199 modes for SVE.
1200 * config/aarch64/aarch64-protos.h
1201 (aarch64_sve_struct_memory_operand_p): Declare.
1202 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1203 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1204 (VPRED, vpred): Handle SVE structure modes.
1205 * config/aarch64/constraints.md (Utx): New constraint.
1206 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1207 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1208 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1209 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1210 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1211 structure modes. Split into pieces after RA.
1212 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1213 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1214 New patterns.
1215 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1216 SVE structure modes.
1217 (aarch64_classify_address): Likewise.
1218 (sizetochar): Move earlier in file.
1219 (aarch64_print_operand): Handle SVE register lists.
1220 (aarch64_array_mode): New function.
1221 (aarch64_sve_struct_memory_operand_p): Likewise.
1222 (TARGET_ARRAY_MODE): Redefine.
1224 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1225 Alan Hayward <alan.hayward@arm.com>
1226 David Sherwood <david.sherwood@arm.com>
1228 * target.def (array_mode): New target hook.
1229 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1230 * doc/tm.texi: Regenerate.
1231 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1232 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1233 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1234 targetm.array_mode.
1235 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1236 type sizes.
1238 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1239 Alan Hayward <alan.hayward@arm.com>
1240 David Sherwood <david.sherwood@arm.com>
1242 * fold-const.c (fold_binary_loc): Check the argument types
1243 rather than the result type when testing for a vector operation.
1245 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1247 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1248 * doc/tm.texi: Regenerate.
1250 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1251 Alan Hayward <alan.hayward@arm.com>
1252 David Sherwood <david.sherwood@arm.com>
1254 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1255 (sve): Document new AArch64 extension.
1256 * doc/md.texi (w): Extend the description of the AArch64
1257 constraint to include SVE vectors.
1258 (Upl, Upa): Document new AArch64 predicate constraints.
1259 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1260 enum.
1261 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1262 (msve-vector-bits=): New option.
1263 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1264 SVE when these are disabled.
1265 (sve): New extension.
1266 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1267 modes. Adjust their number of units based on aarch64_sve_vg.
1268 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1269 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1270 aarch64_addr_query_type.
1271 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1272 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1273 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1274 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1275 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1276 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1277 (aarch64_simd_imm_zero_p): Delete.
1278 (aarch64_check_zero_based_sve_index_immediate): Declare.
1279 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1280 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1281 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1282 (aarch64_sve_float_mul_immediate_p): Likewise.
1283 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1284 rather than an rtx.
1285 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1286 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1287 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1288 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1289 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1290 (aarch64_regmode_natural_size): Likewise.
1291 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1292 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1293 left one place.
1294 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1295 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1296 for VG and the SVE predicate registers.
1297 (V_ALIASES): Add a "z"-prefixed alias.
1298 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1299 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1300 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1301 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1302 (REG_CLASS_NAMES): Add entries for them.
1303 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1304 and the predicate registers.
1305 (aarch64_sve_vg): Declare.
1306 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1307 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1308 (REGMODE_NATURAL_SIZE): Define.
1309 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1310 SVE macros.
1311 * config/aarch64/aarch64.c: Include cfgrtl.h.
1312 (simd_immediate_info): Add a constructor for series vectors,
1313 and an associated step field.
1314 (aarch64_sve_vg): New variable.
1315 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1316 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1317 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1318 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1319 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1320 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1321 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1322 (aarch64_get_mask_mode): New functions.
1323 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1324 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1325 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1326 predicate modes and predicate registers. Explicitly restrict
1327 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1328 to store a vector mode if it is recognized by
1329 aarch64_classify_vector_mode.
1330 (aarch64_regmode_natural_size): New function.
1331 (aarch64_hard_regno_caller_save_mode): Return the original mode
1332 for predicates.
1333 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1334 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1335 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1336 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1337 functions.
1338 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1339 does not overlap dest if the function is frame-related. Handle
1340 SVE constants.
1341 (aarch64_split_add_offset): New function.
1342 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1343 them aarch64_add_offset.
1344 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1345 and update call to aarch64_sub_sp.
1346 (aarch64_add_cfa_expression): New function.
1347 (aarch64_expand_prologue): Pass extra temporary registers to the
1348 functions above. Handle the case in which we need to emit new
1349 DW_CFA_expressions for registers that were originally saved
1350 relative to the stack pointer, but now have to be expressed
1351 relative to the frame pointer.
1352 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1353 functions above.
1354 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1355 IP0 and IP1 values for SVE frames.
1356 (aarch64_expand_vec_series): New function.
1357 (aarch64_expand_sve_widened_duplicate): Likewise.
1358 (aarch64_expand_sve_const_vector): Likewise.
1359 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1360 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1361 into the register, rather than emitting a SET directly.
1362 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1363 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1364 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1365 (offset_9bit_signed_scaled_p): New functions.
1366 (aarch64_replicate_bitmask_imm): New function.
1367 (aarch64_bitmask_imm): Use it.
1368 (aarch64_cannot_force_const_mem): Reject expressions involving
1369 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1370 (aarch64_classify_index): Handle SVE indices, by requiring
1371 a plain register index with a scale that matches the element size.
1372 (aarch64_classify_address): Handle SVE addresses. Assert that
1373 the mode of the address is VOIDmode or an integer mode.
1374 Update call to aarch64_classify_symbol.
1375 (aarch64_classify_symbolic_expression): Update call to
1376 aarch64_classify_symbol.
1377 (aarch64_const_vec_all_in_range_p): New function.
1378 (aarch64_print_vector_float_operand): Likewise.
1379 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1380 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1381 and the FP immediates 1.0 and 0.5.
1382 (aarch64_print_address_internal): Handle SVE addresses.
1383 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1384 (aarch64_regno_regclass): Handle predicate registers.
1385 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1386 data modes.
1387 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1388 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1389 (aarch64_convert_sve_vector_bits): New function.
1390 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1391 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1392 rather than an rtx.
1393 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1394 Handle SVE vector and predicate modes. Accept VL-based constants
1395 that need only one temporary register, and VL offsets that require
1396 no temporary registers.
1397 (aarch64_conditional_register_usage): Mark the predicate registers
1398 as fixed if SVE isn't available.
1399 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1400 Return true for SVE vector and predicate modes.
1401 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1402 rather than an unsigned int. Handle SVE modes.
1403 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1404 SVE modes.
1405 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1406 if SVE is enabled.
1407 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1408 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1409 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1410 (aarch64_sve_float_mul_immediate_p): New functions.
1411 (aarch64_sve_valid_immediate): New function.
1412 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1413 Explicitly reject structure modes. Check for INDEX constants.
1414 Handle PTRUE and PFALSE constants.
1415 (aarch64_check_zero_based_sve_index_immediate): New function.
1416 (aarch64_simd_imm_zero_p): Delete.
1417 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1418 vector modes. Accept constants in the range of CNT[BHWD].
1419 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1420 ask for an Advanced SIMD mode.
1421 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1422 (aarch64_simd_vector_alignment): Handle SVE predicates.
1423 (aarch64_vectorize_preferred_vector_alignment): New function.
1424 (aarch64_simd_vector_alignment_reachable): Use it instead of
1425 the vector size.
1426 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1427 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1428 functions.
1429 (MAX_VECT_LEN): Delete.
1430 (expand_vec_perm_d): Add a vec_flags field.
1431 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1432 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1433 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1434 for SVE modes.
1435 (aarch64_evpc_rev): Rename to...
1436 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1437 (aarch64_evpc_rev_global): New function.
1438 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1439 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1440 MAX_VECT_LEN.
1441 (aarch64_evpc_sve_tbl): New function.
1442 (aarch64_expand_vec_perm_const_1): Update after rename of
1443 aarch64_evpc_rev. Handle SVE permutes too, trying
1444 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1445 than aarch64_evpc_tbl.
1446 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1447 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1448 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1449 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1450 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1451 (aarch64_expand_sve_vcond): New functions.
1452 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1453 of aarch64_vector_mode_p.
1454 (aarch64_dwarf_poly_indeterminate_value): New function.
1455 (aarch64_compute_pressure_classes): Likewise.
1456 (aarch64_can_change_mode_class): Likewise.
1457 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1458 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1459 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1460 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1461 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1462 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1463 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1464 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1465 constraints.
1466 (Dn, Dl, Dr): Accept const as well as const_vector.
1467 (Dz): Likewise. Compare against CONST0_RTX.
1468 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1469 of "vector" where appropriate.
1470 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1471 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1472 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1473 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1474 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1475 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1476 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1477 (v_int_equiv): Extend to SVE modes.
1478 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1479 mode attributes.
1480 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1481 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1482 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1483 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1484 (SVE_COND_FP_CMP): New int iterators.
1485 (perm_hilo): Handle the new unpack unspecs.
1486 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1487 attributes.
1488 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1489 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1490 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1491 (aarch64_equality_operator, aarch64_constant_vector_operand)
1492 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1493 (aarch64_sve_nonimmediate_operand): Likewise.
1494 (aarch64_sve_general_operand): Likewise.
1495 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1496 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1497 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1498 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1499 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1500 (aarch64_sve_float_arith_immediate): Likewise.
1501 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1502 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1503 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1504 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1505 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1506 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1507 (aarch64_sve_float_arith_operand): Likewise.
1508 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1509 (aarch64_sve_float_mul_operand): Likewise.
1510 (aarch64_sve_vec_perm_operand): Likewise.
1511 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1512 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1513 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1514 as well as const_vector.
1515 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1516 in file. Use CONST0_RTX and CONSTM1_RTX.
1517 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1518 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1519 Use aarch64_simd_imm_zero.
1520 * config/aarch64/aarch64-sve.md: New file.
1521 * config/aarch64/aarch64.md: Include it.
1522 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1523 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1524 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1525 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1526 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1527 (sve): New attribute.
1528 (enabled): Disable instructions with the sve attribute unless
1529 TARGET_SVE.
1530 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1531 aarch64_expand_mov_immediate.
1532 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1533 CNT[BHSD] immediates.
1534 (movti): Split CONST_POLY_INT moves into two halves.
1535 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1536 Split additions that need a temporary here if the destination
1537 is the stack pointer.
1538 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1539 (*add<mode>3_poly_1): New instruction.
1540 (set_clobber_cc): New expander.
1542 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1544 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1545 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1546 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1547 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1548 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1549 Change innermode from fixed_mode_size to machine_mode.
1550 (simplify_subreg): Update call accordingly. Handle a constant-sized
1551 subreg of a variable-length CONST_VECTOR.
1553 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1554 Alan Hayward <alan.hayward@arm.com>
1555 David Sherwood <david.sherwood@arm.com>
1557 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1558 (add_offset_to_base): New function, split out from...
1559 (create_mem_ref): ...here. When handling a scale other than 1,
1560 check first whether the address is valid without the offset.
1561 Add it into the base if so, leaving the index and scale as-is.
1563 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1565 PR c++/83778
1566 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1567 fold_for_warn before checking if arg2 is INTEGER_CST.
1569 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1571 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1572 (store_multiple_operation): Delete.
1573 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1574 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1575 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1576 guarded by TARGET_STRING.
1577 (rs6000_output_load_multiple): Delete.
1578 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1579 OPTION_MASK_STRING / TARGET_STRING handling.
1580 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1581 (const rs6000_opt_masks) <"string">: Change mask to 0.
1582 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1583 (MASK_STRING): Delete.
1584 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1585 parts. Simplify.
1586 (load_multiple): Delete.
1587 (*ldmsi8): Delete.
1588 (*ldmsi7): Delete.
1589 (*ldmsi6): Delete.
1590 (*ldmsi5): Delete.
1591 (*ldmsi4): Delete.
1592 (*ldmsi3): Delete.
1593 (store_multiple): Delete.
1594 (*stmsi8): Delete.
1595 (*stmsi7): Delete.
1596 (*stmsi6): Delete.
1597 (*stmsi5): Delete.
1598 (*stmsi4): Delete.
1599 (*stmsi3): Delete.
1600 (movmemsi_8reg): Delete.
1601 (corresponding unnamed define_insn): Delete.
1602 (movmemsi_6reg): Delete.
1603 (corresponding unnamed define_insn): Delete.
1604 (movmemsi_4reg): Delete.
1605 (corresponding unnamed define_insn): Delete.
1606 (movmemsi_2reg): Delete.
1607 (corresponding unnamed define_insn): Delete.
1608 (movmemsi_1reg): Delete.
1609 (corresponding unnamed define_insn): Delete.
1610 * config/rs6000/rs6000.opt (mno-string): New.
1611 (mstring): Replace by deprecation warning stub.
1612 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1614 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1616 * regrename.c (regrename_do_replace): If replacing the same
1617 reg multiple times, try to reuse last created gen_raw_REG.
1619 PR debug/81155
1620 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1621 main to workaround a bug in GDB.
1623 2018-01-12 Tom de Vries <tom@codesourcery.com>
1625 PR target/83737
1626 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1628 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1630 PR rtl-optimization/80481
1631 * ira-color.c (get_cap_member): New function.
1632 (allocnos_conflict_by_live_ranges_p): Use it.
1633 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1634 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1636 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1638 PR target/83628
1639 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1640 (*saddl_se_1): Ditto.
1641 (*ssubsi_1): Ditto.
1642 (*saddl_se_1): Ditto.
1644 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1646 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1647 rather than wi::to_widest for DR_INITs.
1648 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1649 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1650 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1651 INTEGER_CSTs.
1652 (vect_analyze_group_access_1): Note that here.
1654 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1656 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1657 polynomial type sizes.
1659 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1661 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1662 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1663 (gimple_add_tmp_var): Likewise.
1665 2018-01-12 Martin Liska <mliska@suse.cz>
1667 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1668 (gimple_alloc_sizes): Likewise.
1669 (dump_gimple_statistics): Use PRIu64 in printf format.
1670 * gimple.h: Change uint64_t to int.
1672 2018-01-12 Martin Liska <mliska@suse.cz>
1674 * tree-core.h: Use uint64_t instead of int.
1675 * tree.c (tree_node_counts): Likewise.
1676 (tree_node_sizes): Likewise.
1677 (dump_tree_statistics): Use PRIu64 in printf format.
1679 2018-01-12 Martin Liska <mliska@suse.cz>
1681 * Makefile.in: As qsort_chk is implemented in vec.c, add
1682 vec.o to linkage of gencfn-macros.
1683 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1684 passing the info to record_node_allocation_statistics.
1685 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1686 and pass the info.
1687 * ggc-common.c (struct ggc_usage): Add operator== and use
1688 it in operator< and compare function.
1689 * mem-stats.h (struct mem_usage): Likewise.
1690 * vec.c (struct vec_usage): Remove operator< and compare
1691 function. Can be simply inherited.
1693 2018-01-12 Martin Jambor <mjambor@suse.cz>
1695 PR target/81616
1696 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1697 * tree-ssa-math-opts.c: Include domwalk.h.
1698 (convert_mult_to_fma_1): New function.
1699 (fma_transformation_info): New type.
1700 (fma_deferring_state): Likewise.
1701 (cancel_fma_deferring): New function.
1702 (result_of_phi): Likewise.
1703 (last_fma_candidate_feeds_initial_phi): Likewise.
1704 (convert_mult_to_fma): Added deferring logic, split actual
1705 transformation to convert_mult_to_fma_1.
1706 (math_opts_dom_walker): New type.
1707 (math_opts_dom_walker::after_dom_children): New method, body moved
1708 here from pass_optimize_widening_mul::execute, added deferring logic
1709 bits.
1710 (pass_optimize_widening_mul::execute): Moved most of code to
1711 math_opts_dom_walker::after_dom_children.
1712 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1713 * config/i386/i386.c (ix86_option_override_internal): Added
1714 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1716 2018-01-12 Richard Biener <rguenther@suse.de>
1718 PR debug/83157
1719 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1720 inline instance vars.
1722 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1724 PR target/81819
1725 * config/rx/rx.c (rx_is_restricted_memory_address):
1726 Handle SUBREG case.
1728 2018-01-12 Richard Biener <rguenther@suse.de>
1730 PR tree-optimization/80846
1731 * target.def (split_reduction): New target hook.
1732 * targhooks.c (default_split_reduction): New function.
1733 * targhooks.h (default_split_reduction): Declare.
1734 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1735 target requests first reduce vectors by combining low and high
1736 parts.
1737 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1738 (get_vectype_for_scalar_type_and_size): Export.
1739 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1740 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1741 * doc/tm.texi: Regenerate.
1742 * config/i386/i386.c (ix86_split_reduction): Implement
1743 TARGET_VECTORIZE_SPLIT_REDUCTION.
1745 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1747 PR target/83368
1748 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1749 in PIC mode except for TARGET_VXWORKS_RTP.
1750 * config/sparc/sparc.c: Include cfgrtl.h.
1751 (TARGET_INIT_PIC_REG): Define.
1752 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1753 (sparc_pic_register_p): New predicate.
1754 (sparc_legitimate_address_p): Use it.
1755 (sparc_legitimize_pic_address): Likewise.
1756 (sparc_delegitimize_address): Likewise.
1757 (sparc_mode_dependent_address_p): Likewise.
1758 (gen_load_pcrel_sym): Remove 4th parameter.
1759 (load_got_register): Adjust call to above. Remove obsolete stuff.
1760 (sparc_expand_prologue): Do not call load_got_register here.
1761 (sparc_flat_expand_prologue): Likewise.
1762 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1763 (sparc_use_pseudo_pic_reg): New function.
1764 (sparc_init_pic_reg): Likewise.
1765 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1766 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1768 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1770 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1771 Add item for branch_cost.
1773 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1775 PR rtl-optimization/83565
1776 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1777 not extend the result to a larger mode for rotate operations.
1778 (num_sign_bit_copies1): Likewise.
1780 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1782 PR target/40411
1783 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1784 -symbolic.
1785 Use values-Xc.o for -pedantic.
1786 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1788 2018-01-12 Martin Liska <mliska@suse.cz>
1790 PR ipa/83054
1791 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1792 New function.
1793 (possible_polymorphic_call_targets): Use it.
1794 (ipa_devirt): Likewise.
1796 2018-01-12 Martin Liska <mliska@suse.cz>
1798 * profile-count.h (enum profile_quality): Use 0 as invalid
1799 enum value of profile_quality.
1801 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1803 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1804 -mext-string options.
1806 2018-01-12 Richard Biener <rguenther@suse.de>
1808 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1809 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1810 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1811 Likewise.
1812 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1814 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1816 * configure.ac (--with-long-double-format): Add support for the
1817 configuration option to change the default long double format on
1818 PowerPC systems.
1819 * config.gcc (powerpc*-linux*-*): Likewise.
1820 * configure: Regenerate.
1821 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1822 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1823 used without modification.
1825 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1827 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1828 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1829 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1830 MISC_BUILTIN_SPEC_BARRIER.
1831 (rs6000_init_builtins): Likewise.
1832 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1833 enum value.
1834 (speculation_barrier): New define_insn.
1835 * doc/extend.texi: Document __builtin_speculation_barrier.
1837 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1839 PR target/83203
1840 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1841 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1842 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1843 iterators.
1844 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1845 integral modes instead of "ss" and "sd".
1846 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1847 vectors with 32-bit and 64-bit elements.
1848 (vecdupssescalarmodesuffix): New mode attribute.
1849 (vec_dup<mode>): Use it.
1851 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1853 PR target/83330
1854 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1855 frame if argument is passed on stack.
1857 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1859 PR target/82682
1860 * ree.c (combine_reaching_defs): Optimize also
1861 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1862 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1864 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1866 PR middle-end/83189
1867 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1869 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1871 PR middle-end/83718
1872 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1873 after they are computed.
1875 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1877 PR tree-optimization/83695
1878 * gimple-loop-linterchange.cc
1879 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1880 reset cached scev information after interchange.
1881 (pass_linterchange::execute): Remove call to scev_reset_htab.
1883 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1885 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1886 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1887 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1888 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1889 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1890 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1891 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1892 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1893 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1894 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1895 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1896 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1897 (V_lane_reg): Likewise.
1898 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1899 New define_expand.
1900 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1901 (vfmal_lane_low<mode>_intrinsic,
1902 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1903 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1904 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1905 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1906 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1907 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1909 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1911 * config/arm/arm-cpus.in (fp16fml): New feature.
1912 (ALL_SIMD): Add fp16fml.
1913 (armv8.2-a): Add fp16fml as an option.
1914 (armv8.3-a): Likewise.
1915 (armv8.4-a): Add fp16fml as part of fp16.
1916 * config/arm/arm.h (TARGET_FP16FML): Define.
1917 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1918 when appropriate.
1919 * config/arm/arm-modes.def (V2HF): Define.
1920 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1921 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1922 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1923 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1924 vfmsl_low, vfmsl_high): New set of builtins.
1925 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1926 (vfml_op): New code attribute.
1927 (VFMLHALVES): New int iterator.
1928 (VFML, VFMLSEL): New mode attributes.
1929 (V_reg): Define mapping for V2HF.
1930 (V_hi, V_lo): New mode attributes.
1931 (VF_constraint): Likewise.
1932 (vfml_half, vfml_half_selector): New int attributes.
1933 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1934 define_expand.
1935 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1936 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1937 New define_insn.
1938 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1939 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1940 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1941 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1942 documentation.
1943 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1944 Document new effective target and option set.
1946 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1948 * config/arm/arm-cpus.in (armv8_4): New feature.
1949 (ARMv8_4a): New fgroup.
1950 (armv8.4-a): New arch.
1951 * config/arm/arm-tables.opt: Regenerate.
1952 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1953 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1954 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1955 Add matching rules for -march=armv8.4-a and extensions.
1956 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1958 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1960 PR target/81821
1961 * config/rx/rx.md (BW): New mode attribute.
1962 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1964 2018-01-11 Richard Biener <rguenther@suse.de>
1966 PR tree-optimization/83435
1967 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1968 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1969 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1971 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1972 Alan Hayward <alan.hayward@arm.com>
1973 David Sherwood <david.sherwood@arm.com>
1975 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1976 field.
1977 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1978 (aarch64_print_address_internal): Use it to check for a zero offset.
1980 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1981 Alan Hayward <alan.hayward@arm.com>
1982 David Sherwood <david.sherwood@arm.com>
1984 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1985 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1986 Return a poly_int64 rather than a HOST_WIDE_INT.
1987 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1988 rather than a HOST_WIDE_INT.
1989 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1990 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1991 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1992 final_offset from HOST_WIDE_INT to poly_int64.
1993 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1994 to_constant when getting the number of units in an Advanced SIMD
1995 mode.
1996 (aarch64_builtin_vectorized_function): Check for a constant number
1997 of units.
1998 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1999 GET_MODE_SIZE.
2000 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2001 attribute instead of GET_MODE_NUNITS.
2002 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2003 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2004 GET_MODE_SIZE for fixed-size registers.
2005 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2006 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2007 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2008 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2009 (aarch64_print_operand, aarch64_print_address_internal)
2010 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2011 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2012 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2013 Handle polynomial GET_MODE_SIZE.
2014 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2015 wider than SImode without modification.
2016 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2017 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2018 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2019 passing and returning SVE modes.
2020 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2021 rather than GEN_INT.
2022 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2023 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2024 (aarch64_allocate_and_probe_stack_space): Likewise.
2025 (aarch64_layout_frame): Cope with polynomial offsets.
2026 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2027 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2028 polynomial offsets.
2029 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2030 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2031 poly_int64 rather than a HOST_WIDE_INT.
2032 (aarch64_get_separate_components, aarch64_process_components)
2033 (aarch64_expand_prologue, aarch64_expand_epilogue)
2034 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2035 (aarch64_anchor_offset): New function, split out from...
2036 (aarch64_legitimize_address): ...here.
2037 (aarch64_builtin_vectorization_cost): Handle polynomial
2038 TYPE_VECTOR_SUBPARTS.
2039 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2040 GET_MODE_NUNITS.
2041 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2042 number of elements from the PARALLEL rather than the mode.
2043 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2044 rather than GET_MODE_BITSIZE.
2045 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2046 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2047 (aarch64_expand_vec_perm_const_1): Handle polynomial
2048 d->perm.length () and d->perm elements.
2049 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2050 Apply to_constant to d->perm elements.
2051 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2052 polynomial CONST_VECTOR_NUNITS.
2053 (aarch64_move_pointer): Take amount as a poly_int64 rather
2054 than an int.
2055 (aarch64_progress_pointer): Avoid temporary variable.
2056 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2057 the mode attribute instead of GET_MODE.
2059 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2060 Alan Hayward <alan.hayward@arm.com>
2061 David Sherwood <david.sherwood@arm.com>
2063 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2064 x exists before using it.
2065 (aarch64_add_constant_internal): Rename to...
2066 (aarch64_add_offset_1): ...this. Replace regnum with separate
2067 src and dest rtxes. Handle the case in which they're different,
2068 including when the offset is zero. Replace scratchreg with an rtx.
2069 Use 2 additions if there is no spare register into which we can
2070 move a 16-bit constant.
2071 (aarch64_add_constant): Delete.
2072 (aarch64_add_offset): Replace reg with separate src and dest
2073 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2074 Use aarch64_add_offset_1.
2075 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2076 an rtx rather than an int. Take the delta as a poly_int64
2077 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2078 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2079 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2080 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2081 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2082 and aarch64_add_sp.
2083 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2084 aarch64_add_constant.
2086 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2088 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2089 Use scalar_float_mode.
2091 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2093 * config/aarch64/aarch64-simd.md
2094 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2095 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2096 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2097 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2098 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2099 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2100 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2101 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2102 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2103 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2105 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2107 PR target/83514
2108 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2109 targ_options->x_arm_arch_string is non NULL.
2111 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2113 * config/aarch64/aarch64.h
2114 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2116 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2118 PR target/82096
2119 * expmed.c (emit_store_flag_force): Swap if const op0
2120 and change VOIDmode to mode of op0.
2122 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2124 PR rtl-optimization/83761
2125 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2126 than bytes to mode_for_size.
2128 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2130 PR middle-end/83189
2131 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2132 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2133 profile.
2135 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2137 PR middle-end/83575
2138 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2139 when in layout mode.
2140 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2141 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2142 partition fixup.
2144 2018-01-10 Michael Collison <michael.collison@arm.com>
2146 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2147 * config/aarch64/aarch64-option-extension.def: Add
2148 AARCH64_OPT_EXTENSION of 'fp16fml'.
2149 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2150 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2151 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2152 * config/aarch64/constraints.md (Ui7): New constraint.
2153 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2154 (VFMLA_SEL_W): Ditto.
2155 (f16quad): Ditto.
2156 (f16mac1): Ditto.
2157 (VFMLA16_LOW): New int iterator.
2158 (VFMLA16_HIGH): Ditto.
2159 (UNSPEC_FMLAL): New unspec.
2160 (UNSPEC_FMLSL): Ditto.
2161 (UNSPEC_FMLAL2): Ditto.
2162 (UNSPEC_FMLSL2): Ditto.
2163 (f16mac): New code attribute.
2164 * config/aarch64/aarch64-simd-builtins.def
2165 (aarch64_fmlal_lowv2sf): Ditto.
2166 (aarch64_fmlsl_lowv2sf): Ditto.
2167 (aarch64_fmlalq_lowv4sf): Ditto.
2168 (aarch64_fmlslq_lowv4sf): Ditto.
2169 (aarch64_fmlal_highv2sf): Ditto.
2170 (aarch64_fmlsl_highv2sf): Ditto.
2171 (aarch64_fmlalq_highv4sf): Ditto.
2172 (aarch64_fmlslq_highv4sf): Ditto.
2173 (aarch64_fmlal_lane_lowv2sf): Ditto.
2174 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2175 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2176 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2177 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2178 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2179 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2180 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2181 (aarch64_fmlal_lane_highv2sf): Ditto.
2182 (aarch64_fmlsl_lane_highv2sf): Ditto.
2183 (aarch64_fmlal_laneq_highv2sf): Ditto.
2184 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2185 (aarch64_fmlalq_lane_highv4sf): Ditto.
2186 (aarch64_fmlsl_lane_highv4sf): Ditto.
2187 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2188 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2189 * config/aarch64/aarch64-simd.md:
2190 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2191 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2192 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2193 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2194 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2195 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2196 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2197 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2198 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2199 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2200 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2201 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2202 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2203 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2204 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2205 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2206 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2207 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2208 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2209 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2210 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2211 (vfmlsl_low_u32): Ditto.
2212 (vfmlalq_low_u32): Ditto.
2213 (vfmlslq_low_u32): Ditto.
2214 (vfmlal_high_u32): Ditto.
2215 (vfmlsl_high_u32): Ditto.
2216 (vfmlalq_high_u32): Ditto.
2217 (vfmlslq_high_u32): Ditto.
2218 (vfmlal_lane_low_u32): Ditto.
2219 (vfmlsl_lane_low_u32): Ditto.
2220 (vfmlal_laneq_low_u32): Ditto.
2221 (vfmlsl_laneq_low_u32): Ditto.
2222 (vfmlalq_lane_low_u32): Ditto.
2223 (vfmlslq_lane_low_u32): Ditto.
2224 (vfmlalq_laneq_low_u32): Ditto.
2225 (vfmlslq_laneq_low_u32): Ditto.
2226 (vfmlal_lane_high_u32): Ditto.
2227 (vfmlsl_lane_high_u32): Ditto.
2228 (vfmlal_laneq_high_u32): Ditto.
2229 (vfmlsl_laneq_high_u32): Ditto.
2230 (vfmlalq_lane_high_u32): Ditto.
2231 (vfmlslq_lane_high_u32): Ditto.
2232 (vfmlalq_laneq_high_u32): Ditto.
2233 (vfmlslq_laneq_high_u32): Ditto.
2234 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2235 (AARCH64_FL_FOR_ARCH8_4): New.
2236 (AARCH64_ISA_F16FML): New ISA flag.
2237 (TARGET_F16FML): New feature flag for fp16fml.
2238 (doc/invoke.texi): Document new fp16fml option.
2240 2018-01-10 Michael Collison <michael.collison@arm.com>
2242 * config/aarch64/aarch64-builtins.c:
2243 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2244 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2245 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2246 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2247 (AARCH64_ISA_SHA3): New ISA flag.
2248 (TARGET_SHA3): New feature flag for sha3.
2249 * config/aarch64/iterators.md (sha512_op): New int attribute.
2250 (CRYPTO_SHA512): New int iterator.
2251 (UNSPEC_SHA512H): New unspec.
2252 (UNSPEC_SHA512H2): Ditto.
2253 (UNSPEC_SHA512SU0): Ditto.
2254 (UNSPEC_SHA512SU1): Ditto.
2255 * config/aarch64/aarch64-simd-builtins.def
2256 (aarch64_crypto_sha512hqv2di): New builtin.
2257 (aarch64_crypto_sha512h2qv2di): Ditto.
2258 (aarch64_crypto_sha512su0qv2di): Ditto.
2259 (aarch64_crypto_sha512su1qv2di): Ditto.
2260 (aarch64_eor3qv8hi): Ditto.
2261 (aarch64_rax1qv2di): Ditto.
2262 (aarch64_xarqv2di): Ditto.
2263 (aarch64_bcaxqv8hi): Ditto.
2264 * config/aarch64/aarch64-simd.md:
2265 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2266 (aarch64_crypto_sha512su0qv2di): Ditto.
2267 (aarch64_crypto_sha512su1qv2di): Ditto.
2268 (aarch64_eor3qv8hi): Ditto.
2269 (aarch64_rax1qv2di): Ditto.
2270 (aarch64_xarqv2di): Ditto.
2271 (aarch64_bcaxqv8hi): Ditto.
2272 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2273 (vsha512h2q_u64): Ditto.
2274 (vsha512su0q_u64): Ditto.
2275 (vsha512su1q_u64): Ditto.
2276 (veor3q_u16): Ditto.
2277 (vrax1q_u64): Ditto.
2278 (vxarq_u64): Ditto.
2279 (vbcaxq_u16): Ditto.
2280 * config/arm/types.md (crypto_sha512): New type attribute.
2281 (crypto_sha3): Ditto.
2282 (doc/invoke.texi): Document new sha3 option.
2284 2018-01-10 Michael Collison <michael.collison@arm.com>
2286 * config/aarch64/aarch64-builtins.c:
2287 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2288 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2289 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2290 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2291 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2292 (AARCH64_ISA_SM4): New ISA flag.
2293 (TARGET_SM4): New feature flag for sm4.
2294 * config/aarch64/aarch64-simd-builtins.def
2295 (aarch64_sm3ss1qv4si): Ditto.
2296 (aarch64_sm3tt1aq4si): Ditto.
2297 (aarch64_sm3tt1bq4si): Ditto.
2298 (aarch64_sm3tt2aq4si): Ditto.
2299 (aarch64_sm3tt2bq4si): Ditto.
2300 (aarch64_sm3partw1qv4si): Ditto.
2301 (aarch64_sm3partw2qv4si): Ditto.
2302 (aarch64_sm4eqv4si): Ditto.
2303 (aarch64_sm4ekeyqv4si): Ditto.
2304 * config/aarch64/aarch64-simd.md:
2305 (aarch64_sm3ss1qv4si): Ditto.
2306 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2307 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2308 (aarch64_sm4eqv4si): Ditto.
2309 (aarch64_sm4ekeyqv4si): Ditto.
2310 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2311 (sm3part_op): Ditto.
2312 (CRYPTO_SM3TT): Ditto.
2313 (CRYPTO_SM3PART): Ditto.
2314 (UNSPEC_SM3SS1): New unspec.
2315 (UNSPEC_SM3TT1A): Ditto.
2316 (UNSPEC_SM3TT1B): Ditto.
2317 (UNSPEC_SM3TT2A): Ditto.
2318 (UNSPEC_SM3TT2B): Ditto.
2319 (UNSPEC_SM3PARTW1): Ditto.
2320 (UNSPEC_SM3PARTW2): Ditto.
2321 (UNSPEC_SM4E): Ditto.
2322 (UNSPEC_SM4EKEY): Ditto.
2323 * config/aarch64/constraints.md (Ui2): New constraint.
2324 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2325 * config/arm/types.md (crypto_sm3): New type attribute.
2326 (crypto_sm4): Ditto.
2327 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2328 (vsm3tt1aq_u32): Ditto.
2329 (vsm3tt1bq_u32): Ditto.
2330 (vsm3tt2aq_u32): Ditto.
2331 (vsm3tt2bq_u32): Ditto.
2332 (vsm3partw1q_u32): Ditto.
2333 (vsm3partw2q_u32): Ditto.
2334 (vsm4eq_u32): Ditto.
2335 (vsm4ekeyq_u32): Ditto.
2336 (doc/invoke.texi): Document new sm4 option.
2338 2018-01-10 Michael Collison <michael.collison@arm.com>
2340 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2341 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2342 (AARCH64_FL_FOR_ARCH8_4): New.
2343 (AARCH64_FL_V8_4): New flag.
2344 (doc/invoke.texi): Document new armv8.4-a option.
2346 2018-01-10 Michael Collison <michael.collison@arm.com>
2348 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2349 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2350 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2351 * config/aarch64/aarch64-option-extension.def: Add
2352 AARCH64_OPT_EXTENSION of 'sha2'.
2353 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2354 (crypto): Disable sha2 and aes if crypto disabled.
2355 (crypto): Enable aes and sha2 if enabled.
2356 (simd): Disable sha2 and aes if simd disabled.
2357 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2358 New flags.
2359 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2360 (TARGET_SHA2): New feature flag for sha2.
2361 (TARGET_AES): New feature flag for aes.
2362 * config/aarch64/aarch64-simd.md:
2363 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2364 conditional on TARGET_AES.
2365 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2366 (aarch64_crypto_sha1hsi): Make pattern conditional
2367 on TARGET_SHA2.
2368 (aarch64_crypto_sha1hv4si): Ditto.
2369 (aarch64_be_crypto_sha1hv4si): Ditto.
2370 (aarch64_crypto_sha1su1v4si): Ditto.
2371 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2372 (aarch64_crypto_sha1su0v4si): Ditto.
2373 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2374 (aarch64_crypto_sha256su0v4si): Ditto.
2375 (aarch64_crypto_sha256su1v4si): Ditto.
2376 (doc/invoke.texi): Document new aes and sha2 options.
2378 2018-01-10 Martin Sebor <msebor@redhat.com>
2380 PR tree-optimization/83781
2381 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2382 as string arrays.
2384 2018-01-11 Martin Sebor <msebor@gmail.com>
2385 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2387 PR tree-optimization/83501
2388 PR tree-optimization/81703
2390 * tree-ssa-strlen.c (get_string_cst): Rename...
2391 (get_string_len): ...to this. Handle global constants.
2392 (handle_char_store): Adjust.
2394 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2395 Jim Wilson <jimw@sifive.com>
2397 * config/riscv/riscv-protos.h (riscv_output_return): New.
2398 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2399 (riscv_attribute_table, riscv_output_return),
2400 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2401 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2402 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2403 function.
2404 (riscv_expand_prologue): Add early return for naked function.
2405 (riscv_expand_epilogue): Likewise.
2406 (riscv_function_ok_for_sibcall): Return false for naked function.
2407 (riscv_set_current_function): New.
2408 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2409 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2410 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2411 * doc/extend.texi (RISC-V Function Attributes): New.
2413 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2415 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2416 check for 128-bit long double before checking TCmode.
2417 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2418 128-bit long doubles before checking TFmode or TCmode.
2419 (FLOAT128_IBM_P): Likewise.
2421 2018-01-10 Martin Sebor <msebor@redhat.com>
2423 PR tree-optimization/83671
2424 * builtins.c (c_strlen): Unconditionally return zero for the empty
2425 string.
2426 Use -Warray-bounds for warnings.
2427 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2428 for non-constant array indices with COMPONENT_REF, arrays of
2429 arrays, and pointers to arrays.
2430 (gimple_fold_builtin_strlen): Determine and set length range for
2431 non-constant character arrays.
2433 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2435 PR middle-end/81897
2436 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2437 empty blocks.
2439 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2441 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2443 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2445 PR target/83399
2446 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2447 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2448 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2449 indexed_or_indirect_operand predicate.
2450 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2451 (*vsx_le_perm_load_v8hi): Likewise.
2452 (*vsx_le_perm_load_v16qi): Likewise.
2453 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2454 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2455 (*vsx_le_perm_store_v8hi): Likewise.
2456 (*vsx_le_perm_store_v16qi): Likewise.
2457 (eight unnamed splitters): Likewise.
2459 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2461 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2462 * config/rs6000/emmintrin.h: Likewise.
2463 * config/rs6000/mmintrin.h: Likewise.
2464 * config/rs6000/xmmintrin.h: Likewise.
2466 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2468 PR c++/43486
2469 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2470 "public_flag".
2471 * tree.c (tree_nop_conversion): Return true for location wrapper
2472 nodes.
2473 (maybe_wrap_with_location): New function.
2474 (selftest::check_strip_nops): New function.
2475 (selftest::test_location_wrappers): New function.
2476 (selftest::tree_c_tests): Call it.
2477 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2478 (maybe_wrap_with_location): New decl.
2479 (EXPR_LOCATION_WRAPPER_P): New macro.
2480 (location_wrapper_p): New inline function.
2481 (tree_strip_any_location_wrapper): New inline function.
2483 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2485 PR target/83735
2486 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2487 stack_realign_offset for the largest alignment of stack slot
2488 actually used.
2489 (ix86_find_max_used_stack_alignment): New function.
2490 (ix86_finalize_stack_frame_flags): Use it. Set
2491 max_used_stack_alignment if we don't realign stack.
2492 * config/i386/i386.h (machine_function): Add
2493 max_used_stack_alignment.
2495 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2497 * config/arm/arm.opt (-mbranch-cost): New option.
2498 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2499 account.
2501 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2503 PR target/83629
2504 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2505 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2507 2018-01-10 Richard Biener <rguenther@suse.de>
2509 PR debug/83765
2510 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2511 early out so it also covers the case where we have a non-NULL
2512 origin.
2514 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2516 PR tree-optimization/83753
2517 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2518 for non-strided grouped accesses if the number of elements is 1.
2520 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2522 PR target/81616
2523 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2524 * i386.h (TARGET_USE_GATHER): Define.
2525 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2527 2018-01-10 Martin Liska <mliska@suse.cz>
2529 PR bootstrap/82831
2530 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2531 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2532 partitioning.
2533 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2534 CLEANUP_NO_PARTITIONING is not set.
2536 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2538 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2539 for vectors, as a partial revert of r254296.
2540 * rtl.h (const_vec_p): Delete.
2541 (const_vec_duplicate_p): Don't test for vector CONSTs.
2542 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2543 * expmed.c (make_tree): Likewise.
2545 Revert:
2546 * common.md (E, F): Use CONSTANT_P instead of checking for
2547 CONST_VECTOR.
2548 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2549 checking for CONST_VECTOR.
2551 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2553 PR middle-end/83575
2554 * predict.c (force_edge_cold): Handle in more sane way edges
2555 with no prediction.
2557 2018-01-09 Carl Love <cel@us.ibm.com>
2559 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2560 V4SI, V4SF types.
2561 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2562 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2563 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2564 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2565 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2566 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2567 * config/rs6000/rs6000-protos.h: Add extern defition for
2568 rs6000_generate_float2_double_code.
2569 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2570 function.
2571 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2572 (float2_v2df): Add define_expand.
2574 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2576 PR target/83628
2577 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2578 op_mode in the force_to_mode call.
2580 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2582 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2583 instead of checking each element individually.
2584 (aarch64_evpc_uzp): Likewise.
2585 (aarch64_evpc_zip): Likewise.
2586 (aarch64_evpc_ext): Likewise.
2587 (aarch64_evpc_rev): Likewise.
2588 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2589 instead of checking each element individually. Return true without
2590 generating rtl if
2591 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2592 whether all selected elements come from the same input, instead of
2593 checking each element individually. Remove calls to gen_rtx_REG,
2594 start_sequence and end_sequence and instead assert that no rtl is
2595 generated.
2597 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2599 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2600 order of HIGH and CONST checks.
2602 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2604 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2605 if the destination isn't an SSA_NAME.
2607 2018-01-09 Richard Biener <rguenther@suse.de>
2609 PR tree-optimization/83668
2610 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2611 move prologue...
2612 (canonicalize_loop_form): ... here, renamed from ...
2613 (canonicalize_loop_closed_ssa_form): ... this and amended to
2614 swap successor edges for loop exit blocks to make us use
2615 the RPO order we need for initial schedule generation.
2617 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2619 PR tree-optimization/64811
2620 * match.pd: When optimizing comparisons with Inf, avoid
2621 introducing or losing exceptions from comparisons with NaN.
2623 2018-01-09 Martin Liska <mliska@suse.cz>
2625 PR sanitizer/82517
2626 * asan.c (shadow_mem_size): Add gcc_assert.
2628 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2630 Don't save registers in main().
2632 PR target/83738
2633 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2634 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2635 * config/avr/avr.c (avr_set_current_function): Don't error if
2636 naked, OS_task or OS_main are specified at the same time.
2637 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2638 OS_main.
2639 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2640 attribute.
2641 * common/config/avr/avr-common.c (avr_option_optimization_table):
2642 Switch on -mmain-is-OS_task for optimizing compilations.
2644 2018-01-09 Richard Biener <rguenther@suse.de>
2646 PR tree-optimization/83572
2647 * graphite.c: Include cfganal.h.
2648 (graphite_transform_loops): Connect infinite loops to exit
2649 and remove fake edges at the end.
2651 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2653 * ipa-inline.c (edge_badness): Revert accidental checkin.
2655 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2657 PR ipa/80763
2658 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2659 symbols; not inline clones.
2661 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2663 PR target/83507
2664 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2665 hard registers. Formatting fixes.
2667 PR preprocessor/83722
2668 * gcc.c (try_generate_repro): Pass
2669 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2670 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2671 do_report_bug.
2673 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2674 Kito Cheng <kito.cheng@gmail.com>
2676 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2677 (riscv_leaf_function_p): Delete.
2678 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2680 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2682 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2683 function.
2684 (do_ifelse): New function.
2685 (do_isel): New function.
2686 (do_sub3): New function.
2687 (do_add3): New function.
2688 (do_load_mask_compare): New function.
2689 (do_overlap_load_compare): New function.
2690 (expand_compare_loop): New function.
2691 (expand_block_compare): Call expand_compare_loop() when appropriate.
2692 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2693 option description.
2694 (-mblock-compare-inline-loop-limit): New option.
2696 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2698 PR target/83677
2699 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2700 Reverse order of second and third operands in first alternative.
2701 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2702 of first and second elements in UNSPEC_VPERMR vector.
2703 (altivec_expand_vec_perm_le): Likewise.
2705 2017-01-08 Jeff Law <law@redhat.com>
2707 PR rtl-optimizatin/81308
2708 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2709 (process_switch): If group_case_labels makes a change, then set
2710 cfg_altered.
2711 (pass_convert_switch::execute): If a switch is converted, then
2712 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2714 PR rtl-optimization/81308
2715 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2716 splitting insns.
2718 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2720 PR target/83663 - Revert r255946
2721 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2722 generation for cases where splatting a value is not useful.
2723 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2724 across a vec_duplicate and a paradoxical subreg forming a vector
2725 mode to a vec_concat.
2727 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2729 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2730 -march=armv8.3-a variants.
2731 * config/arm/t-multilib: Likewise.
2732 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2734 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2736 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2737 to generate rtl.
2738 (cceq_ior_compare_complement): Give it a name so I can use it, and
2739 change boolean_or_operator predicate to boolean_operator so it can
2740 be used to generate a crand.
2741 (eqne): New code iterator.
2742 (bd/bd_neg): New code_attrs.
2743 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2744 a single define_insn.
2745 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2746 decrement (bdnzt/bdnzf/bdzt/bdzf).
2747 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2748 with the new names of the branch decrement patterns, and added the
2749 names of the branch decrement conditional patterns.
2751 2018-01-08 Richard Biener <rguenther@suse.de>
2753 PR tree-optimization/83563
2754 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2755 cache.
2757 2018-01-08 Richard Biener <rguenther@suse.de>
2759 PR middle-end/83713
2760 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2762 2018-01-08 Richard Biener <rguenther@suse.de>
2764 PR tree-optimization/83685
2765 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2766 references to abnormals.
2768 2018-01-08 Richard Biener <rguenther@suse.de>
2770 PR lto/83719
2771 * dwarf2out.c (output_indirect_strings): Handle empty
2772 skeleton_debug_str_hash.
2773 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2775 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2777 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2778 (emit_store_direct): Likewise.
2779 (arc_trampoline_adjust_address): Likewise.
2780 (arc_asm_trampoline_template): New function.
2781 (arc_initialize_trampoline): Use asm_trampoline_template.
2782 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2783 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2784 * config/arc/arc.md (flush_icache): Delete pattern.
2786 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2788 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2789 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2790 munaligned-access.
2792 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2794 PR target/83681
2795 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2796 by not USED_FOR_TARGET.
2797 (make_pass_resolve_sw_modes): Likewise.
2799 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2801 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2802 USED_FOR_TARGET.
2804 2018-01-08 Richard Biener <rguenther@suse.de>
2806 PR middle-end/83580
2807 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2809 2018-01-08 Richard Biener <rguenther@suse.de>
2811 PR middle-end/83517
2812 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2814 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2816 PR middle-end/81897
2817 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2818 basic blocks with a small number of successors.
2819 (convert_control_dep_chain_into_preds): Improve handling of
2820 forwarder blocks.
2821 (dump_predicates): Split apart into...
2822 (dump_pred_chain): ...here...
2823 (dump_pred_info): ...and here.
2824 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2825 (can_chain_union_be_invalidated_p): Improve check for invalidation
2826 of paths.
2827 (uninit_uses_cannot_happen): Avoid unnecessary if
2828 convert_control_dep_chain_into_preds yielded nothing.
2830 2018-01-06 Martin Sebor <msebor@redhat.com>
2832 PR tree-optimization/83640
2833 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2834 subtracting negative offset from size.
2835 (builtin_access::overlap): Adjust offset bounds of the access to fall
2836 within the size of the object if possible.
2838 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2840 PR rtl-optimization/83699
2841 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2842 extract_bit_field_as_subreg to cases in which the extracted
2843 value is also a vector.
2845 * lra-constraints.c (process_alt_operands): Test for the equivalence
2846 substitutions when detecting a possible reload cycle.
2848 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2850 PR debug/83480
2851 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2852 by default if flag_selective_schedling{,2}. Formatting fixes.
2854 PR rtl-optimization/83682
2855 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2856 if it has non-VECTOR_MODE element mode.
2857 (vec_duplicate_p): Likewise.
2859 PR middle-end/83694
2860 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2861 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2863 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2865 PR target/83604
2866 * config/i386/i386-builtin.def
2867 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2868 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2869 Require also OPTION_MASK_ISA_AVX512F in addition to
2870 OPTION_MASK_ISA_GFNI.
2871 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2872 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2873 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2874 to OPTION_MASK_ISA_GFNI.
2875 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2876 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2877 OPTION_MASK_ISA_AVX512BW.
2878 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2879 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2880 addition to OPTION_MASK_ISA_GFNI.
2881 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2882 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2883 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2884 to OPTION_MASK_ISA_GFNI.
2885 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2886 a requirement for all ISAs rather than any of them with a few
2887 exceptions.
2888 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2889 processing.
2890 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2891 bitmasks to be enabled with 3 exceptions, instead of requiring any
2892 enabled ISA with lots of exceptions.
2893 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2894 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2895 Change avx512bw in isa attribute to avx512f.
2896 * config/i386/sgxintrin.h: Add license boilerplate.
2897 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2898 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2899 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2900 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2901 defined.
2902 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2903 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2904 temporarily sse2 rather than sse if not enabled already.
2906 PR target/83604
2907 * config/i386/sse.md (VI248_VLBW): Rename to ...
2908 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2909 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2910 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2911 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2912 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2913 mode iterator instead of VI248_VLBW.
2915 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2917 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2918 (record_modified): Skip clobbers; add debug output.
2919 (param_change_prob): Use sreal frequencies.
2921 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2923 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2924 punt for user-aligned variables.
2926 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2928 * tree-chrec.c (chrec_contains_symbols): Return true for
2929 POLY_INT_CST.
2931 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2933 PR target/82439
2934 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2935 of (x|y) == x for BICS pattern.
2937 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2939 PR tree-optimization/83605
2940 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2941 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2942 can throw.
2944 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2946 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2947 * config/epiphany/rtems.h: New file.
2949 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2950 Uros Bizjak <ubizjak@gmail.com>
2952 PR target/83554
2953 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2954 QIreg_operand instead of register_operand predicate.
2955 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2956 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2957 comments instead of -fmitigate[-_]rop.
2959 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2961 PR bootstrap/81926
2962 * cgraphunit.c (symbol_table::compile): Switch to text_section
2963 before calling assembly_start debug hook.
2964 * run-rtl-passes.c (run_rtl_passes): Likewise.
2965 Include output.h.
2967 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2969 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2970 range_int_cst_p rather than !symbolic_range_p before calling
2971 extract_range_from_multiplicative_op_1.
2973 2017-01-04 Jeff Law <law@redhat.com>
2975 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2976 redundant test in assertion.
2978 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2980 * doc/rtl.texi: Document machine_mode wrapper classes.
2982 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2984 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2985 using tree_to_uhwi.
2987 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2989 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2990 the VEC_PERM_EXPR fold to fail.
2992 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2994 PR debug/83585
2995 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2996 to switched_sections.
2998 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3000 PR target/83680
3001 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3002 test for d.testing.
3004 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3006 PR target/83387
3007 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3008 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3010 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3012 PR debug/83666
3013 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3014 is BLKmode and bitpos not zero or mode change is needed.
3016 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3018 PR target/83675
3019 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3020 TARGET_VIS2.
3022 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3024 PR target/83628
3025 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3026 instead of MULT rtx. Update all corresponding splitters.
3027 (*saddl_se): Ditto.
3028 (*ssub<modesuffix>): Ditto.
3029 (*ssubl_se): Ditto.
3030 (*cmp_sadd_di): Update split patterns.
3031 (*cmp_sadd_si): Ditto.
3032 (*cmp_sadd_sidi): Ditto.
3033 (*cmp_ssub_di): Ditto.
3034 (*cmp_ssub_si): Ditto.
3035 (*cmp_ssub_sidi): Ditto.
3036 * config/alpha/predicates.md (const23_operand): New predicate.
3037 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3038 Look for ASHIFT, not MULT inner operand.
3039 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3041 2018-01-04 Martin Liska <mliska@suse.cz>
3043 PR gcov-profile/83669
3044 * gcov.c (output_intermediate_file): Add version to intermediate
3045 gcov file.
3046 * doc/gcov.texi: Document new field 'version' in intermediate
3047 file format. Fix location of '-k' option of gcov command.
3049 2018-01-04 Martin Liska <mliska@suse.cz>
3051 PR ipa/82352
3052 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3054 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3056 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3058 2018-01-03 Martin Sebor <msebor@redhat.com>
3060 PR tree-optimization/83655
3061 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3062 checking calls with invalid arguments.
3064 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3066 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3067 (vectorizable_mask_load_store): Delete.
3068 (vectorizable_call): Return false for masked loads and stores.
3069 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3070 instead of gimple_assign_rhs1.
3071 (vectorizable_load): Handle IFN_MASK_LOAD.
3072 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3074 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3076 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3077 split out from..,
3078 (vectorizable_mask_load_store): ...here.
3079 (vectorizable_load): ...and here.
3081 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3083 * tree-vect-stmts.c (vect_build_all_ones_mask)
3084 (vect_build_zero_merge_argument): New functions, split out from...
3085 (vectorizable_load): ...here.
3087 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3089 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3090 split out from...
3091 (vectorizable_mask_load_store): ...here.
3092 (vectorizable_store): ...and here.
3094 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3096 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3097 split out from...
3098 (vectorizable_mask_load_store): ...here.
3100 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3102 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3103 (vect_model_store_cost): Take a vec_load_store_type instead of a
3104 vect_def_type.
3105 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3106 (vect_model_store_cost): Take a vec_load_store_type instead of a
3107 vect_def_type.
3108 (vectorizable_mask_load_store): Update accordingly.
3109 (vectorizable_store): Likewise.
3110 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3112 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3114 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3115 IFN_MASK_LOAD calls here rather than...
3116 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3118 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3119 Alan Hayward <alan.hayward@arm.com>
3120 David Sherwood <david.sherwood@arm.com>
3122 * expmed.c (extract_bit_field_1): For vector extracts,
3123 fall back to extract_bit_field_as_subreg if vec_extract
3124 isn't available.
3126 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3127 Alan Hayward <alan.hayward@arm.com>
3128 David Sherwood <david.sherwood@arm.com>
3130 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3131 they are variable or constant sized.
3132 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3133 slots for constant-sized data.
3135 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3136 Alan Hayward <alan.hayward@arm.com>
3137 David Sherwood <david.sherwood@arm.com>
3139 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3140 handling COND_EXPRs with boolean comparisons, try to find a better
3141 basis for the mask type than the boolean itself.
3143 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3145 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3146 is calculated and how it can be overridden.
3147 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3148 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3149 if defined.
3150 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3151 if nonzero.
3153 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3154 Alan Hayward <alan.hayward@arm.com>
3155 David Sherwood <david.sherwood@arm.com>
3157 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3158 Remove the mode argument.
3159 (aarch64_simd_valid_immediate): Remove the mode and inverse
3160 arguments.
3161 * config/aarch64/iterators.md (bitsize): New iterator.
3162 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3163 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3164 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3165 aarch64_simd_valid_immediate.
3166 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3167 (aarch64_reg_or_bic_imm): Likewise.
3168 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3169 with an insn_type enum and msl with a modifier_type enum.
3170 Replace element_width with a scalar_mode. Change the shift
3171 to unsigned int. Add constructors for scalar_float_mode and
3172 scalar_int_mode elements.
3173 (aarch64_vect_float_const_representable_p): Delete.
3174 (aarch64_can_const_movi_rtx_p)
3175 (aarch64_simd_scalar_immediate_valid_for_move)
3176 (aarch64_simd_make_constant): Update call to
3177 aarch64_simd_valid_immediate.
3178 (aarch64_advsimd_valid_immediate_hs): New function.
3179 (aarch64_advsimd_valid_immediate): Likewise.
3180 (aarch64_simd_valid_immediate): Remove mode and inverse
3181 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3182 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3183 and aarch64_float_const_representable_p on the result.
3184 (aarch64_output_simd_mov_immediate): Remove mode argument.
3185 Update call to aarch64_simd_valid_immediate and use of
3186 simd_immediate_info.
3187 (aarch64_output_scalar_simd_mov_immediate): Update call
3188 accordingly.
3190 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3191 Alan Hayward <alan.hayward@arm.com>
3192 David Sherwood <david.sherwood@arm.com>
3194 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3195 (mode_nunits): Likewise CONST_MODE_NUNITS.
3196 * machmode.def (ADJUST_NUNITS): Document.
3197 * genmodes.c (mode_data::need_nunits_adj): New field.
3198 (blank_mode): Update accordingly.
3199 (adj_nunits): New variable.
3200 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3201 parameter.
3202 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3203 listed in adj_nunits.
3204 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3205 listed in adj_nunits. Don't emit case statements for such modes.
3206 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3207 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3208 nothing if adj_nunits is nonnull.
3209 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3210 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3211 (emit_mode_fbit): Update use of print_maybe_const_decl.
3212 (emit_move_size): Likewise. Treat the array as non-const
3213 if adj_nunits.
3214 (emit_mode_adjustments): Handle adj_nunits.
3216 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3218 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3219 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3220 (VECTOR_MODES): Use it.
3221 (make_vector_modes): Take the prefix as an argument.
3223 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3224 Alan Hayward <alan.hayward@arm.com>
3225 David Sherwood <david.sherwood@arm.com>
3227 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3228 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3229 for MODE_VECTOR_BOOL.
3230 * machmode.def (VECTOR_BOOL_MODE): Document.
3231 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3232 (make_vector_bool_mode): New function.
3233 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3234 MODE_VECTOR_BOOL.
3235 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3236 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3237 Likewise.
3238 * stor-layout.c (int_mode_for_mode): Likewise.
3239 * tree.c (build_vector_type_for_mode): Likewise.
3240 * varasm.c (output_constant_pool_2): Likewise.
3241 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3242 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3243 for MODE_VECTOR_BOOL.
3244 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3245 of mode class checks.
3246 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3247 instead of a list of mode class checks.
3248 (expand_vector_scalar_condition): Likewise.
3249 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3251 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3252 Alan Hayward <alan.hayward@arm.com>
3253 David Sherwood <david.sherwood@arm.com>
3255 * machmode.h (mode_size): Change from unsigned short to
3256 poly_uint16_pod.
3257 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3258 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3259 or if measurement_type is not polynomial.
3260 (fixed_size_mode::includes_p): Check for constant-sized modes.
3261 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3262 return a poly_uint16 rather than an unsigned short.
3263 (emit_mode_size): Change the type of mode_size from unsigned short
3264 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3265 (emit_mode_adjustments): Cope with polynomial vector sizes.
3266 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3267 for GET_MODE_SIZE.
3268 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3269 for GET_MODE_SIZE.
3270 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3271 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3272 * caller-save.c (setup_save_areas): Likewise.
3273 (replace_reg_with_saved_mem): Likewise.
3274 * calls.c (emit_library_call_value_1): Likewise.
3275 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3276 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3277 (gen_lowpart_for_combine): Likewise.
3278 * convert.c (convert_to_integer_1): Likewise.
3279 * cse.c (equiv_constant, cse_insn): Likewise.
3280 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3281 (cselib_subst_to_values): Likewise.
3282 * dce.c (word_dce_process_block): Likewise.
3283 * df-problems.c (df_word_lr_mark_ref): Likewise.
3284 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3285 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3286 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3287 (rtl_for_decl_location): Likewise.
3288 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3289 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3290 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3291 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3292 (expand_expr_real_1): Likewise.
3293 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3294 (pad_below): Likewise.
3295 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3296 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3297 * ira.c (get_subreg_tracking_sizes): Likewise.
3298 * ira-build.c (ira_create_allocno_objects): Likewise.
3299 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3300 (ira_sort_regnos_for_alter_reg): Likewise.
3301 * ira-costs.c (record_operand_costs): Likewise.
3302 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3303 (resolve_simple_move): Likewise.
3304 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3305 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3306 (lra_constraints): Likewise.
3307 (CONST_POOL_OK_P): Reject variable-sized modes.
3308 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3309 (add_pseudo_to_slot, lra_spill): Likewise.
3310 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3311 * optabs-query.c (get_best_extraction_insn): Likewise.
3312 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3313 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3314 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3315 * recog.c (offsettable_address_addr_space_p): Likewise.
3316 * regcprop.c (maybe_mode_change): Likewise.
3317 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3318 * regrename.c (build_def_use): Likewise.
3319 * regstat.c (dump_reg_info): Likewise.
3320 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3321 (find_reloads, find_reloads_subreg_address): Likewise.
3322 * reload1.c (eliminate_regs_1): Likewise.
3323 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3324 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3325 (simplify_binary_operation_1, simplify_subreg): Likewise.
3326 * targhooks.c (default_function_arg_padding): Likewise.
3327 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3328 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3329 (verify_gimple_assign_ternary): Likewise.
3330 * tree-inline.c (estimate_move_cost): Likewise.
3331 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3332 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3333 (get_address_cost_ainc): Likewise.
3334 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3335 (vect_supportable_dr_alignment): Likewise.
3336 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3337 (vectorizable_reduction): Likewise.
3338 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3339 (vectorizable_operation, vectorizable_load): Likewise.
3340 * tree.c (build_same_sized_truth_vector_type): Likewise.
3341 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3342 * var-tracking.c (emit_note_insn_var_location): Likewise.
3343 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3344 (ADDR_VEC_ALIGN): Likewise.
3346 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3347 Alan Hayward <alan.hayward@arm.com>
3348 David Sherwood <david.sherwood@arm.com>
3350 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3351 unsigned short.
3352 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3353 or if measurement_type is polynomial.
3354 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3355 * combine.c (make_extraction): Likewise.
3356 * dse.c (find_shift_sequence): Likewise.
3357 * dwarf2out.c (mem_loc_descriptor): Likewise.
3358 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3359 (extract_bit_field, extract_low_bits): Likewise.
3360 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3361 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3362 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3363 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3364 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3365 * reload.c (find_reloads): Likewise.
3366 * reload1.c (alter_reg): Likewise.
3367 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3368 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3369 * tree-if-conv.c (predicate_mem_writes): Likewise.
3370 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3371 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3372 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3373 * valtrack.c (dead_debug_insert_temp): Likewise.
3374 * varasm.c (mergeable_constant_section): Likewise.
3375 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3377 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3378 Alan Hayward <alan.hayward@arm.com>
3379 David Sherwood <david.sherwood@arm.com>
3381 * expr.c (expand_assignment): Cope with polynomial mode sizes
3382 when assigning to a CONCAT.
3384 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3385 Alan Hayward <alan.hayward@arm.com>
3386 David Sherwood <david.sherwood@arm.com>
3388 * machmode.h (mode_precision): Change from unsigned short to
3389 poly_uint16_pod.
3390 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3391 short.
3392 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3393 or if measurement_type is not polynomial.
3394 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3395 in which the mode is already known to be a scalar_int_mode.
3396 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3397 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3398 initializer.
3399 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3400 for GET_MODE_PRECISION.
3401 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3402 for GET_MODE_PRECISION.
3403 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3404 as polynomial.
3405 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3406 (expand_field_assignment, make_extraction): Likewise.
3407 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3408 (get_last_value): Likewise.
3409 * convert.c (convert_to_integer_1): Likewise.
3410 * cse.c (cse_insn): Likewise.
3411 * expr.c (expand_expr_real_1): Likewise.
3412 * lra-constraints.c (simplify_operand_subreg): Likewise.
3413 * optabs-query.c (can_atomic_load_p): Likewise.
3414 * optabs.c (expand_atomic_load): Likewise.
3415 (expand_atomic_store): Likewise.
3416 * ree.c (combine_reaching_defs): Likewise.
3417 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3418 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3419 * tree.h (type_has_mode_precision_p): Likewise.
3420 * ubsan.c (instrument_si_overflow): Likewise.
3422 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3423 Alan Hayward <alan.hayward@arm.com>
3424 David Sherwood <david.sherwood@arm.com>
3426 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3427 polynomial numbers of units.
3428 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3429 (valid_vector_subparts_p): New function.
3430 (build_vector_type): Remove temporary shim and take the number
3431 of units as a poly_uint64 rather than an int.
3432 (build_opaque_vector_type): Take the number of units as a
3433 poly_uint64 rather than an int.
3434 * tree.c (build_vector_from_ctor): Handle polynomial
3435 TYPE_VECTOR_SUBPARTS.
3436 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3437 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3438 (build_vector_from_val): If the number of units is variable,
3439 use build_vec_duplicate_cst for constant operands and
3440 VEC_DUPLICATE_EXPR otherwise.
3441 (make_vector_type): Remove temporary is_constant ().
3442 (build_vector_type, build_opaque_vector_type): Take the number of
3443 units as a poly_uint64 rather than an int.
3444 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3445 VECTOR_CST_NELTS.
3446 * cfgexpand.c (expand_debug_expr): Likewise.
3447 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3448 (store_constructor, expand_expr_real_1): Likewise.
3449 (const_scalar_mask_from_tree): Likewise.
3450 * fold-const-call.c (fold_const_reduction): Likewise.
3451 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3452 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3453 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3454 (fold_relational_const): Likewise.
3455 (native_interpret_vector): Likewise. Change the size from an
3456 int to an unsigned int.
3457 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3458 TYPE_VECTOR_SUBPARTS.
3459 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3460 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3461 duplicating a non-constant operand into a variable-length vector.
3462 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3463 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3464 * ipa-icf.c (sem_variable::equals): Likewise.
3465 * match.pd: Likewise.
3466 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3467 * print-tree.c (print_node): Likewise.
3468 * stor-layout.c (layout_type): Likewise.
3469 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3470 * tree-cfg.c (verify_gimple_comparison): Likewise.
3471 (verify_gimple_assign_binary): Likewise.
3472 (verify_gimple_assign_ternary): Likewise.
3473 (verify_gimple_assign_single): Likewise.
3474 * tree-pretty-print.c (dump_generic_node): Likewise.
3475 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3476 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3477 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3478 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3479 (vect_shift_permute_load_chain): Likewise.
3480 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3481 (expand_vector_condition, optimize_vector_constructor): Likewise.
3482 (lower_vec_perm, get_compute_type): Likewise.
3483 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3484 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3485 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3486 (vect_recog_mask_conversion_pattern): Likewise.
3487 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3488 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3489 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3490 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3491 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3492 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3493 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3494 (supportable_widening_operation): Likewise.
3495 (supportable_narrowing_operation): Likewise.
3496 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3497 Likewise.
3498 * varasm.c (output_constant): Likewise.
3500 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3501 Alan Hayward <alan.hayward@arm.com>
3502 David Sherwood <david.sherwood@arm.com>
3504 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3505 so that both the length == 3 and length != 3 cases set up their
3506 own permute vectors. Add comments explaining why we know the
3507 number of elements is constant.
3508 (vect_permute_load_chain): Likewise.
3510 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3511 Alan Hayward <alan.hayward@arm.com>
3512 David Sherwood <david.sherwood@arm.com>
3514 * machmode.h (mode_nunits): Change from unsigned char to
3515 poly_uint16_pod.
3516 (ONLY_FIXED_SIZE_MODES): New macro.
3517 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3518 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3519 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3520 New typedefs.
3521 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3522 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3523 or if measurement_type is not polynomial.
3524 * genmodes.c (ZERO_COEFFS): New macro.
3525 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3526 poly_uint16.
3527 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3528 Use ZERO_COEFFS when emitting initializers.
3529 * data-streamer.h (bp_pack_poly_value): New function.
3530 (bp_unpack_poly_value): Likewise.
3531 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3532 for GET_MODE_NUNITS.
3533 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3534 for GET_MODE_NUNITS.
3535 * tree.c (make_vector_type): Remove temporary shim and make
3536 the real function take the number of units as a poly_uint64
3537 rather than an int.
3538 (build_vector_type_for_mode): Handle polynomial nunits.
3539 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3540 * emit-rtl.c (const_vec_series_p_1): Likewise.
3541 (gen_rtx_CONST_VECTOR): Likewise.
3542 * fold-const.c (test_vec_duplicate_folding): Likewise.
3543 * genrecog.c (validate_pattern): Likewise.
3544 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3545 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3546 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3547 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3548 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3549 * rtlanal.c (subreg_get_info): Likewise.
3550 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3551 (vect_grouped_load_supported): Likewise.
3552 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3553 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3554 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3555 (simplify_const_unary_operation, simplify_binary_operation_1)
3556 (simplify_const_binary_operation, simplify_ternary_operation)
3557 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3558 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3559 instead of CONST_VECTOR_NUNITS.
3560 * varasm.c (output_constant_pool_2): Likewise.
3561 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3562 explicit-encoded elements in the XVEC for variable-length vectors.
3564 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3566 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3568 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3569 Alan Hayward <alan.hayward@arm.com>
3570 David Sherwood <david.sherwood@arm.com>
3572 * coretypes.h (fixed_size_mode): Declare.
3573 (fixed_size_mode_pod): New typedef.
3574 * builtins.h (target_builtins::x_apply_args_mode)
3575 (target_builtins::x_apply_result_mode): Change type to
3576 fixed_size_mode_pod.
3577 * builtins.c (apply_args_size, apply_result_size, result_vector)
3578 (expand_builtin_apply_args_1, expand_builtin_apply)
3579 (expand_builtin_return): Update accordingly.
3581 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3583 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3584 * cselib.c (cselib_hash_rtx): Likewise.
3585 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3586 CONST_VECTOR encoding.
3588 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3589 Jeff Law <law@redhat.com>
3591 PR target/83641
3592 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3593 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3594 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3595 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3597 PR target/83641
3598 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3599 explicitly probe *sp in a noreturn function if there were any callee
3600 register saves or frame pointer is needed.
3602 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3604 PR debug/83621
3605 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3606 BLKmode for ternary, binary or unary expressions.
3608 PR debug/83645
3609 * var-tracking.c (delete_vta_debug_insn): New inline function.
3610 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3611 insns from get_insns () to NULL instead of each bb separately.
3612 Use delete_vta_debug_insn. No longer static.
3613 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3614 delete_vta_debug_insns callers.
3615 * rtl.h (delete_vta_debug_insns): Declare.
3616 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3617 instead of variable_tracking_main.
3619 2018-01-03 Martin Sebor <msebor@redhat.com>
3621 PR tree-optimization/83603
3622 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3623 arguments past the endof the argument list in functions declared
3624 without a prototype.
3625 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3626 Avoid checking when arguments are null.
3628 2018-01-03 Martin Sebor <msebor@redhat.com>
3630 PR c/83559
3631 * doc/extend.texi (attribute const): Fix a typo.
3632 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3633 issuing -Wsuggest-attribute for void functions.
3635 2018-01-03 Martin Sebor <msebor@redhat.com>
3637 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3638 offset_int::from instead of wide_int::to_shwi.
3639 (maybe_diag_overlap): Remove assertion.
3640 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3641 * gimple-ssa-sprintf.c (format_directive): Same.
3642 (parse_directive): Same.
3643 (sprintf_dom_walker::compute_format_length): Same.
3644 (try_substitute_return_value): Same.
3646 2017-01-03 Jeff Law <law@redhat.com>
3648 PR middle-end/83654
3649 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3650 non-constant residual for zero at runtime and avoid probing in
3651 that case. Reorganize code for trailing problem to mirror handling
3652 of the residual.
3654 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3656 PR tree-optimization/83501
3657 * tree-ssa-strlen.c (get_string_cst): New.
3658 (handle_char_store): Call get_string_cst.
3660 2018-01-03 Martin Liska <mliska@suse.cz>
3662 PR tree-optimization/83593
3663 * tree-ssa-strlen.c: Include tree-cfg.h.
3664 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3665 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3666 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3667 to false.
3668 (strlen_dom_walker::before_dom_children): Call
3669 gimple_purge_dead_eh_edges. Dump tranformation with details
3670 dump flags.
3671 (strlen_dom_walker::before_dom_children): Update call by adding
3672 new argument cleanup_eh.
3673 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3675 2018-01-03 Martin Liska <mliska@suse.cz>
3677 PR ipa/83549
3678 * cif-code.def (VARIADIC_THUNK): New enum value.
3679 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3680 thunks.
3682 2018-01-03 Jan Beulich <jbeulich@suse.com>
3684 * sse.md (mov<mode>_internal): Tighten condition for when to use
3685 vmovdqu<ssescalarsize> for TI and OI modes.
3687 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3689 Update copyright years.
3691 2018-01-03 Martin Liska <mliska@suse.cz>
3693 PR ipa/83594
3694 * ipa-visibility.c (function_and_variable_visibility): Skip
3695 functions with noipa attribure.
3697 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3699 * gcc.c (process_command): Update copyright notice dates.
3700 * gcov-dump.c (print_version): Ditto.
3701 * gcov.c (print_version): Ditto.
3702 * gcov-tool.c (print_version): Ditto.
3703 * gengtype.c (create_file): Ditto.
3704 * doc/cpp.texi: Bump @copying's copyright year.
3705 * doc/cppinternals.texi: Ditto.
3706 * doc/gcc.texi: Ditto.
3707 * doc/gccint.texi: Ditto.
3708 * doc/gcov.texi: Ditto.
3709 * doc/install.texi: Ditto.
3710 * doc/invoke.texi: Ditto.
3712 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3714 * vector-builder.h (vector_builder::m_full_nelts): Change from
3715 unsigned int to poly_uint64.
3716 (vector_builder::full_nelts): Update prototype accordingly.
3717 (vector_builder::new_vector): Likewise.
3718 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3719 (vector_builder::operator ==): Likewise.
3720 (vector_builder::finalize): Likewise.
3721 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3722 Take the number of elements as a poly_uint64 rather than an
3723 unsigned int.
3724 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3725 from unsigned int to poly_uint64.
3726 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3727 (vec_perm_indices::new_vector): Likewise.
3728 (vec_perm_indices::length): Likewise.
3729 (vec_perm_indices::nelts_per_input): Likewise.
3730 (vec_perm_indices::input_nelts): Likewise.
3731 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3732 number of elements per input as a poly_uint64 rather than an
3733 unsigned int. Use the original encoding for variable-length
3734 vectors, rather than clamping each individual element.
3735 For the second and subsequent elements in each pattern,
3736 clamp the step and base before clamping their sum.
3737 (vec_perm_indices::series_p): Handle polynomial element counts.
3738 (vec_perm_indices::all_in_range_p): Likewise.
3739 (vec_perm_indices_to_tree): Likewise.
3740 (vec_perm_indices_to_rtx): Likewise.
3741 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3742 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3743 (tree_vector_builder::new_binary_operation): Handle polynomial
3744 element counts. Return false if we need to know the number
3745 of elements at compile time.
3746 * fold-const.c (fold_vec_perm): Punt if the number of elements
3747 isn't known at compile time.
3749 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3751 * vec-perm-indices.h (vec_perm_builder): Change element type
3752 from HOST_WIDE_INT to poly_int64.
3753 (vec_perm_indices::element_type): Update accordingly.
3754 (vec_perm_indices::clamp): Handle polynomial element_types.
3755 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3756 (vec_perm_indices::all_in_range_p): Likewise.
3757 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3758 than shwi trees.
3759 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3760 polynomial vec_perm_indices element types.
3761 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3762 * fold-const.c (fold_vec_perm): Likewise.
3763 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3764 * tree-vect-generic.c (lower_vec_perm): Likewise.
3765 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3766 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3767 element type to HOST_WIDE_INT.
3769 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3770 Alan Hayward <alan.hayward@arm.com>
3771 David Sherwood <david.sherwood@arm.com>
3773 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3774 rather than an int. Use plus_constant.
3775 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3776 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3778 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3779 Alan Hayward <alan.hayward@arm.com>
3780 David Sherwood <david.sherwood@arm.com>
3782 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3783 a HOST_WIDE_INT to a poly_int64.
3785 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3786 Alan Hayward <alan.hayward@arm.com>
3787 David Sherwood <david.sherwood@arm.com>
3789 * calls.c (load_register_parameters): Cope with polynomial
3790 mode sizes. Require a constant size for BLKmode parameters
3791 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3792 forces a parameter to be padded at the lsb end in order to
3793 fill a complete number of words, require the parameter size
3794 to be ordered wrt UNITS_PER_WORD.
3796 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3797 Alan Hayward <alan.hayward@arm.com>
3798 David Sherwood <david.sherwood@arm.com>
3800 * reload1.c (spill_stack_slot_width): Change element type
3801 from unsigned int to poly_uint64_pod.
3802 (alter_reg): Treat mode sizes as polynomial.
3804 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3805 Alan Hayward <alan.hayward@arm.com>
3806 David Sherwood <david.sherwood@arm.com>
3808 * reload.c (complex_word_subreg_p): New function.
3809 (reload_inner_reg_of_subreg, push_reload): Use it.
3811 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3812 Alan Hayward <alan.hayward@arm.com>
3813 David Sherwood <david.sherwood@arm.com>
3815 * lra-constraints.c (process_alt_operands): Reject matched
3816 operands whose sizes aren't ordered.
3817 (match_reload): Refer to this check here.
3819 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3820 Alan Hayward <alan.hayward@arm.com>
3821 David Sherwood <david.sherwood@arm.com>
3823 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3824 that the mode size is in the set {1, 2, 4, 8, 16}.
3826 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3827 Alan Hayward <alan.hayward@arm.com>
3828 David Sherwood <david.sherwood@arm.com>
3830 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3831 Use plus_constant instead of gen_rtx_PLUS.
3833 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3834 Alan Hayward <alan.hayward@arm.com>
3835 David Sherwood <david.sherwood@arm.com>
3837 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3838 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3839 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3840 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3841 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3842 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3843 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3844 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3845 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3846 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3847 a poly_int64.
3848 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3849 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3850 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3851 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3852 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3853 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3854 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3855 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3856 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3857 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3858 function.
3859 * expr.c (emit_move_resolve_push): Treat the input and result
3860 of PUSH_ROUNDING as a poly_int64.
3861 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3862 (emit_push_insn): Likewise.
3863 * lra-eliminations.c (mark_not_eliminable): Likewise.
3864 * recog.c (push_operand): Likewise.
3865 * reload1.c (elimination_effects): Likewise.
3866 * rtlanal.c (nonzero_bits1): Likewise.
3867 * calls.c (store_one_arg): Likewise. Require the padding to be
3868 known at compile time.
3870 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3871 Alan Hayward <alan.hayward@arm.com>
3872 David Sherwood <david.sherwood@arm.com>
3874 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3875 Use plus_constant instead of gen_rtx_PLUS.
3877 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3878 Alan Hayward <alan.hayward@arm.com>
3879 David Sherwood <david.sherwood@arm.com>
3881 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3882 rather than an int.
3884 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3885 Alan Hayward <alan.hayward@arm.com>
3886 David Sherwood <david.sherwood@arm.com>
3888 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3889 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3890 via stack temporaries. Treat the mode size as polynomial too.
3892 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3893 Alan Hayward <alan.hayward@arm.com>
3894 David Sherwood <david.sherwood@arm.com>
3896 * expr.c (expand_expr_real_2): When handling conversions involving
3897 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3898 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3899 as a poly_uint64 too.
3901 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3902 Alan Hayward <alan.hayward@arm.com>
3903 David Sherwood <david.sherwood@arm.com>
3905 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3907 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3908 Alan Hayward <alan.hayward@arm.com>
3909 David Sherwood <david.sherwood@arm.com>
3911 * combine.c (can_change_dest_mode): Handle polynomial
3912 REGMODE_NATURAL_SIZE.
3913 * expmed.c (store_bit_field_1): Likewise.
3914 * expr.c (store_constructor): Likewise.
3915 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3916 and polynomial REGMODE_NATURAL_SIZE.
3917 (gen_lowpart_common): Likewise.
3918 * reginfo.c (record_subregs_of_mode): Likewise.
3919 * rtlanal.c (read_modify_subreg_p): Likewise.
3921 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3922 Alan Hayward <alan.hayward@arm.com>
3923 David Sherwood <david.sherwood@arm.com>
3925 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3926 numbers of elements.
3928 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3929 Alan Hayward <alan.hayward@arm.com>
3930 David Sherwood <david.sherwood@arm.com>
3932 * match.pd: Cope with polynomial numbers of vector elements.
3934 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3935 Alan Hayward <alan.hayward@arm.com>
3936 David Sherwood <david.sherwood@arm.com>
3938 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3939 in a POINTER_PLUS_EXPR.
3941 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3942 Alan Hayward <alan.hayward@arm.com>
3943 David Sherwood <david.sherwood@arm.com>
3945 * omp-simd-clone.c (simd_clone_subparts): New function.
3946 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3947 (ipa_simd_modify_function_body): Likewise.
3949 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3950 Alan Hayward <alan.hayward@arm.com>
3951 David Sherwood <david.sherwood@arm.com>
3953 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3954 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3955 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3956 (expand_vector_condition, vector_element): Likewise.
3957 (subparts_gt): New function.
3958 (get_compute_type): Use subparts_gt.
3959 (count_type_subparts): Delete.
3960 (expand_vector_operations_1): Use subparts_gt instead of
3961 count_type_subparts.
3963 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3964 Alan Hayward <alan.hayward@arm.com>
3965 David Sherwood <david.sherwood@arm.com>
3967 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3968 (vect_compile_time_alias): ...this new function. Do the calculation
3969 on poly_ints rather than trees.
3970 (vect_prune_runtime_alias_test_list): Update call accordingly.
3972 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3973 Alan Hayward <alan.hayward@arm.com>
3974 David Sherwood <david.sherwood@arm.com>
3976 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3977 numbers of units.
3978 (vect_schedule_slp_instance): Likewise.
3980 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3981 Alan Hayward <alan.hayward@arm.com>
3982 David Sherwood <david.sherwood@arm.com>
3984 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3985 constant and extern definitions for variable-length vectors.
3986 (vect_get_constant_vectors): Note that the number of units
3987 is known to be constant.
3989 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3990 Alan Hayward <alan.hayward@arm.com>
3991 David Sherwood <david.sherwood@arm.com>
3993 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3994 of units as polynomial. Choose between WIDE and NARROW based
3995 on multiple_p.
3997 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3998 Alan Hayward <alan.hayward@arm.com>
3999 David Sherwood <david.sherwood@arm.com>
4001 * tree-vect-stmts.c (simd_clone_subparts): New function.
4002 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4004 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4005 Alan Hayward <alan.hayward@arm.com>
4006 David Sherwood <david.sherwood@arm.com>
4008 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4009 vectors as polynomial. Use build_index_vector for
4010 IFN_GOMP_SIMD_LANE.
4012 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4013 Alan Hayward <alan.hayward@arm.com>
4014 David Sherwood <david.sherwood@arm.com>
4016 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4017 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4018 for variable-length vectors.
4019 (vectorizable_mask_load_store): Treat the number of units as
4020 polynomial, asserting that it is constant if the condition has
4021 already been enforced.
4022 (vectorizable_store, vectorizable_load): Likewise.
4024 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4025 Alan Hayward <alan.hayward@arm.com>
4026 David Sherwood <david.sherwood@arm.com>
4028 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4029 of units as polynomial. Punt if we can't tell at compile time
4030 which vector contains the final result.
4032 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4033 Alan Hayward <alan.hayward@arm.com>
4034 David Sherwood <david.sherwood@arm.com>
4036 * tree-vect-loop.c (vectorizable_induction): Treat the number
4037 of units as polynomial. Punt on SLP inductions. Use an integer
4038 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4039 cast of such a series for variable-length floating-point
4040 reductions.
4042 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4043 Alan Hayward <alan.hayward@arm.com>
4044 David Sherwood <david.sherwood@arm.com>
4046 * tree.h (build_index_vector): Declare.
4047 * tree.c (build_index_vector): New function.
4048 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4049 of units as polynomial, forcibly converting it to a constant if
4050 vectorizable_reduction has already enforced the condition.
4051 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4052 to create a {1,2,3,...} vector.
4053 (vectorizable_reduction): Treat the number of units as polynomial.
4054 Choose vectype_in based on the largest scalar element size rather
4055 than the smallest number of units. Enforce the restrictions
4056 relied on above.
4058 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4059 Alan Hayward <alan.hayward@arm.com>
4060 David Sherwood <david.sherwood@arm.com>
4062 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4063 number of units as polynomial.
4065 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4066 Alan Hayward <alan.hayward@arm.com>
4067 David Sherwood <david.sherwood@arm.com>
4069 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4070 * target.def (autovectorize_vector_sizes): Return the vector sizes
4071 by pointer, using vector_sizes rather than a bitmask.
4072 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4073 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4074 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4075 Likewise.
4076 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4077 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4078 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4079 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4080 * omp-general.c (omp_max_vf): Likewise.
4081 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4082 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4083 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4084 * tree-vect-slp.c (vect_slp_bb): Likewise.
4085 * doc/tm.texi: Regenerate.
4086 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4087 to a poly_uint64.
4088 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4089 the vector size as a poly_uint64 rather than an unsigned int.
4090 (current_vector_size): Change from an unsigned int to a poly_uint64.
4091 (get_vectype_for_scalar_type): Update accordingly.
4092 * tree.h (build_truth_vector_type): Take the size and number of
4093 units as a poly_uint64 rather than an unsigned int.
4094 (build_vector_type): Add a temporary overload that takes
4095 the number of units as a poly_uint64 rather than an unsigned int.
4096 * tree.c (make_vector_type): Likewise.
4097 (build_truth_vector_type): Take the number of units as a poly_uint64
4098 rather than an unsigned int.
4100 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4101 Alan Hayward <alan.hayward@arm.com>
4102 David Sherwood <david.sherwood@arm.com>
4104 * target.def (get_mask_mode): Take the number of units and length
4105 as poly_uint64s rather than unsigned ints.
4106 * targhooks.h (default_get_mask_mode): Update accordingly.
4107 * targhooks.c (default_get_mask_mode): Likewise.
4108 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4109 * doc/tm.texi: Regenerate.
4111 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4112 Alan Hayward <alan.hayward@arm.com>
4113 David Sherwood <david.sherwood@arm.com>
4115 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4116 * omp-general.c (omp_max_vf): Likewise.
4117 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4118 (expand_omp_simd): Handle polynomial safelen.
4119 * omp-low.c (omplow_simd_context): Add a default constructor.
4120 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4121 (lower_rec_simd_input_clauses): Update accordingly.
4122 (lower_rec_input_clauses): Likewise.
4124 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4125 Alan Hayward <alan.hayward@arm.com>
4126 David Sherwood <david.sherwood@arm.com>
4128 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4129 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4130 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4131 (vect_analyze_slp_cost): Likewise.
4132 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4133 (vect_model_load_cost): Likewise.
4135 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4136 Alan Hayward <alan.hayward@arm.com>
4137 David Sherwood <david.sherwood@arm.com>
4139 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4140 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4141 from an unsigned int * to a poly_uint64_pod *.
4142 (calculate_unrolling_factor): New function.
4143 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4145 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4146 Alan Hayward <alan.hayward@arm.com>
4147 David Sherwood <david.sherwood@arm.com>
4149 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4150 from an unsigned int to a poly_uint64.
4151 (_loop_vec_info::slp_unrolling_factor): Likewise.
4152 (_loop_vec_info::vectorization_factor): Change from an int
4153 to a poly_uint64.
4154 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4155 (vect_get_num_vectors): New function.
4156 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4157 (vect_get_num_copies): Use vect_get_num_vectors.
4158 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4159 to an unsigned int *.
4160 (vect_analyze_data_refs): Change min_vf from an int * to a
4161 poly_uint64 *.
4162 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4163 than an unsigned HOST_WIDE_INT.
4164 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4165 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4166 to an unsigned int *.
4167 (vect_analyze_data_ref_dependences): Likewise.
4168 (vect_compute_data_ref_alignment): Handle polynomial vf.
4169 (vect_enhance_data_refs_alignment): Likewise.
4170 (vect_prune_runtime_alias_test_list): Likewise.
4171 (vect_shift_permute_load_chain): Likewise.
4172 (vect_supportable_dr_alignment): Likewise.
4173 (dependence_distance_ge_vf): Take the vectorization factor as a
4174 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4175 (vect_analyze_data_refs): Change min_vf from an int * to a
4176 poly_uint64 *.
4177 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4178 vfm1 as a poly_uint64 rather than an int. Make the same change
4179 for the returned bound_scalar.
4180 (vect_gen_vector_loop_niters): Handle polynomial vf.
4181 (vect_do_peeling): Likewise. Update call to
4182 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4183 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4184 be constant.
4185 * tree-vect-loop.c (vect_determine_vectorization_factor)
4186 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4187 (vect_get_known_peeling_cost): Likewise.
4188 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4189 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4190 (vect_transform_loop): Likewise. Use the lowest possible VF when
4191 updating the upper bounds of the loop.
4192 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4193 rather than an int.
4194 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4195 polynomial unroll factors.
4196 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4197 (vect_make_slp_decision): Likewise.
4198 (vect_supported_load_permutation_p): Likewise, and polynomial
4199 vf too.
4200 (vect_analyze_slp_cost): Handle polynomial vf.
4201 (vect_slp_analyze_node_operations): Likewise.
4202 (vect_slp_analyze_bb_1): Likewise.
4203 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4204 than an unsigned HOST_WIDE_INT.
4205 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4206 (vectorizable_load): Handle polynomial vf.
4207 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4208 a poly_uint64.
4209 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4211 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4212 Alan Hayward <alan.hayward@arm.com>
4213 David Sherwood <david.sherwood@arm.com>
4215 * match.pd: Handle bit operations involving three constants
4216 and try to fold one pair.
4218 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4220 * tree-vect-loop-manip.c: Include gimple-fold.h.
4221 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4222 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4223 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4224 Add a path that uses a step of VF instead of 1, but disable it
4225 for now.
4226 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4227 and niters_no_overflow parameters. Update calls to
4228 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4229 Create a new SSA name if the latter choses to use a ste other
4230 than zero, and return it via niters_vector_mult_vf_var.
4231 * tree-vect-loop.c (vect_transform_loop): Update calls to
4232 vect_do_peeling, vect_gen_vector_loop_niters and
4233 slpeel_make_loop_iterate_ntimes.
4234 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4235 (vect_gen_vector_loop_niters): Update declarations after above changes.
4237 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4239 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4240 128-bit round to integer instructions.
4241 (ceil<mode>2): Likewise.
4242 (btrunc<mode>2): Likewise.
4243 (round<mode>2): Likewise.
4245 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4247 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4248 unaligned VSX load/store on P8/P9.
4249 (expand_block_clear): Allow the use of unaligned VSX
4250 load/store on P8/P9.
4252 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4254 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4255 New function.
4256 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4257 swap associated with both a load and a store.
4259 2018-01-02 Andrew Waterman <andrew@sifive.com>
4261 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4262 * config/riscv/riscv.md (clear_cache): Use it.
4264 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4266 * web.c: Remove out-of-date comment.
4268 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4270 * expr.c (fixup_args_size_notes): Check that any existing
4271 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4272 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4273 (emit_single_push_insn): ...here.
4275 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4277 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4278 (const_vector_encoded_nelts): New function.
4279 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4280 (const_vector_int_elt, const_vector_elt): Declare.
4281 * emit-rtl.c (const_vector_int_elt_1): New function.
4282 (const_vector_elt): Likewise.
4283 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4284 of CONST_VECTOR_ELT.
4286 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4288 * expr.c: Include rtx-vector-builder.h.
4289 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4290 directly on the tree encoding.
4291 (const_vector_from_tree): Likewise.
4292 * optabs.c: Include rtx-vector-builder.h.
4293 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4294 sequence of "u" values.
4295 * vec-perm-indices.c: Include rtx-vector-builder.h.
4296 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4297 directly on the vec_perm_indices encoding.
4299 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4301 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4302 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4303 * rtx-vector-builder.h: New file.
4304 * rtx-vector-builder.c: Likewise.
4305 * rtl.h (rtx_def::u2): Add a const_vector field.
4306 (CONST_VECTOR_NPATTERNS): New macro.
4307 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4308 (CONST_VECTOR_DUPLICATE_P): Likewise.
4309 (CONST_VECTOR_STEPPED_P): Likewise.
4310 (CONST_VECTOR_ENCODED_ELT): Likewise.
4311 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4312 (unwrap_const_vec_duplicate): Likewise.
4313 (const_vec_series_p): Check for a non-duplicated vector encoding.
4314 Say that the function only returns true for integer vectors.
4315 * emit-rtl.c: Include rtx-vector-builder.h.
4316 (gen_const_vec_duplicate_1): Delete.
4317 (gen_const_vector): Call gen_const_vec_duplicate instead of
4318 gen_const_vec_duplicate_1.
4319 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4320 (gen_const_vec_duplicate): Use rtx_vector_builder.
4321 (gen_const_vec_series): Likewise.
4322 (gen_rtx_CONST_VECTOR): Likewise.
4323 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4324 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4325 Build a new vector rather than modifying a CONST_VECTOR in-place.
4326 (handle_special_swappables): Update call accordingly.
4327 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4328 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4329 Build a new vector rather than modifying a CONST_VECTOR in-place.
4330 (handle_special_swappables): Update call accordingly.
4332 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4334 * simplify-rtx.c (simplify_const_binary_operation): Use
4335 CONST_VECTOR_ELT instead of XVECEXP.
4337 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4339 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4340 the selector elements to be different from the data elements
4341 if the selector is a VECTOR_CST.
4342 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4343 ssizetype for the selector.
4345 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4347 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4348 before testing each element individually.
4349 * tree-vect-generic.c (lower_vec_perm): Likewise.
4351 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4353 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4354 * selftest-run-tests.c (selftest::run_tests): Call it.
4355 * vector-builder.h (vector_builder::operator ==): New function.
4356 (vector_builder::operator !=): Likewise.
4357 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4358 (vec_perm_indices::all_from_input_p): New function.
4359 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4360 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4361 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4362 instead of reading the VECTOR_CST directly. Detect whether both
4363 vector inputs are the same before constructing the vec_perm_indices,
4364 and update the number of inputs argument accordingly. Use the
4365 utility functions added above. Only construct sel2 if we need to.
4367 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4369 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4370 the broadcast of the low byte.
4371 (expand_mult_highpart): Use an explicit encoding for the permutes.
4372 * optabs-query.c (can_mult_highpart_p): Likewise.
4373 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4374 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4375 (vectorizable_bswap): Likewise.
4376 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4377 explicit encoding for the power-of-2 permutes.
4378 (vect_permute_store_chain): Likewise.
4379 (vect_grouped_load_supported): Likewise.
4380 (vect_permute_load_chain): Likewise.
4382 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4384 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4385 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4386 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4387 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4388 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4389 (vect_gen_perm_mask_any): Likewise.
4391 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4393 * int-vector-builder.h: New file.
4394 * vec-perm-indices.h: Include int-vector-builder.h.
4395 (vec_perm_indices): Redefine as an int_vector_builder.
4396 (auto_vec_perm_indices): Delete.
4397 (vec_perm_builder): Redefine as a stand-alone class.
4398 (vec_perm_indices::vec_perm_indices): New function.
4399 (vec_perm_indices::clamp): Likewise.
4400 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4401 (vec_perm_indices::new_vector): New function.
4402 (vec_perm_indices::new_expanded_vector): Update for new
4403 vec_perm_indices class.
4404 (vec_perm_indices::rotate_inputs): New function.
4405 (vec_perm_indices::all_in_range_p): Operate directly on the
4406 encoded form, without computing elided elements.
4407 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4408 encoding. Update for new vec_perm_indices class.
4409 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4410 the given vec_perm_builder.
4411 (expand_vec_perm_var): Update vec_perm_builder constructor.
4412 (expand_mult_highpart): Use vec_perm_builder instead of
4413 auto_vec_perm_indices.
4414 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4415 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4416 or double series encoding as appropriate.
4417 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4418 vec_perm_indices instead of auto_vec_perm_indices.
4419 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4420 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4421 (vect_permute_store_chain): Likewise.
4422 (vect_grouped_load_supported): Likewise.
4423 (vect_permute_load_chain): Likewise.
4424 (vect_shift_permute_load_chain): Likewise.
4425 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4426 (vect_transform_slp_perm_load): Likewise.
4427 (vect_schedule_slp_instance): Likewise.
4428 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4429 (vectorizable_mask_load_store): Likewise.
4430 (vectorizable_bswap): Likewise.
4431 (vectorizable_store): Likewise.
4432 (vectorizable_load): Likewise.
4433 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4434 vec_perm_indices instead of auto_vec_perm_indices. Use
4435 tree_to_vec_perm_builder to read the vector from a tree.
4436 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4437 vec_perm_builder instead of a vec_perm_indices.
4438 (have_whole_vector_shift): Use vec_perm_builder and
4439 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4440 truncation to calc_vec_perm_mask_for_shift.
4441 (vect_create_epilog_for_reduction): Likewise.
4442 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4443 from auto_vec_perm_indices to vec_perm_indices.
4444 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4445 instead of changing individual elements.
4446 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4447 the vector in d.perm.
4448 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4449 from auto_vec_perm_indices to vec_perm_indices.
4450 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4451 instead of changing individual elements.
4452 (arm_vectorize_vec_perm_const): Use new_vector to install
4453 the vector in d.perm.
4454 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4455 Update vec_perm_builder constructor.
4456 (rs6000_expand_interleave): Likewise.
4457 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4458 (rs6000_expand_interleave): Likewise.
4460 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4462 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4463 to qimode could truncate the indices.
4464 * optabs.c (expand_vec_perm_var): Likewise.
4466 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4468 * Makefile.in (OBJS): Add vec-perm-indices.o.
4469 * vec-perm-indices.h: New file.
4470 * vec-perm-indices.c: Likewise.
4471 * target.h (vec_perm_indices): Replace with a forward class
4472 declaration.
4473 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4474 * optabs.h: Include vec-perm-indices.h.
4475 (expand_vec_perm): Delete.
4476 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4477 (expand_vec_perm_const): Declare.
4478 * target.def (vec_perm_const_ok): Replace with...
4479 (vec_perm_const): ...this new hook.
4480 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4481 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4482 * doc/tm.texi: Regenerate.
4483 * optabs.def (vec_perm_const): Delete.
4484 * doc/md.texi (vec_perm_const): Likewise.
4485 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4486 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4487 expand_vec_perm for constant permutation vectors. Assert that
4488 the mode of variable permutation vectors is the integer equivalent
4489 of the mode that is being permuted.
4490 * optabs-query.h (selector_fits_mode_p): Declare.
4491 * optabs-query.c: Include vec-perm-indices.h.
4492 (selector_fits_mode_p): New function.
4493 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4494 is defined, instead of checking whether the vec_perm_const_optab
4495 exists. Use targetm.vectorize.vec_perm_const instead of
4496 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4497 fit in the vector mode before using a variable permute.
4498 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4499 vec_perm_indices instead of an rtx.
4500 (expand_vec_perm): Replace with...
4501 (expand_vec_perm_const): ...this new function. Take the selector
4502 as a vec_perm_indices rather than an rtx. Also take the mode of
4503 the selector. Update call to shift_amt_for_vec_perm_mask.
4504 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4505 Use vec_perm_indices::new_expanded_vector to expand the original
4506 selector into bytes. Check whether the indices fit in the vector
4507 mode before using a variable permute.
4508 (expand_vec_perm_var): Make global.
4509 (expand_mult_highpart): Use expand_vec_perm_const.
4510 * fold-const.c: Includes vec-perm-indices.h.
4511 * tree-ssa-forwprop.c: Likewise.
4512 * tree-vect-data-refs.c: Likewise.
4513 * tree-vect-generic.c: Likewise.
4514 * tree-vect-loop.c: Likewise.
4515 * tree-vect-slp.c: Likewise.
4516 * tree-vect-stmts.c: Likewise.
4517 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4518 Delete.
4519 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4520 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4521 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4522 (aarch64_vectorize_vec_perm_const): ...this new function.
4523 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4524 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4525 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4526 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4527 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4528 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4529 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4530 into...
4531 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4532 check for NEON modes.
4533 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4534 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4535 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4536 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4537 into...
4538 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4539 the old VEC_PERM_CONST conditions.
4540 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4541 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4542 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4543 (ia64_vectorize_vec_perm_const_ok): Merge into...
4544 (ia64_vectorize_vec_perm_const): ...this new function.
4545 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4546 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4547 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4548 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4549 * config/mips/mips.c (mips_expand_vec_perm_const)
4550 (mips_vectorize_vec_perm_const_ok): Merge into...
4551 (mips_vectorize_vec_perm_const): ...this new function.
4552 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4553 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4554 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4555 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4556 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4557 (rs6000_expand_vec_perm_const): Delete.
4558 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4559 Delete.
4560 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4561 (altivec_expand_vec_perm_const_le): Take each operand individually.
4562 Operate on constant selectors rather than rtxes.
4563 (altivec_expand_vec_perm_const): Likewise. Update call to
4564 altivec_expand_vec_perm_const_le.
4565 (rs6000_expand_vec_perm_const): Delete.
4566 (rs6000_vectorize_vec_perm_const_ok): Delete.
4567 (rs6000_vectorize_vec_perm_const): New function.
4568 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4569 an element count and rtx array.
4570 (rs6000_expand_extract_even): Update call accordingly.
4571 (rs6000_expand_interleave): Likewise.
4572 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4573 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4574 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4575 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4576 (rs6000_expand_vec_perm_const): Delete.
4577 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4578 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4579 (altivec_expand_vec_perm_const_le): Take each operand individually.
4580 Operate on constant selectors rather than rtxes.
4581 (altivec_expand_vec_perm_const): Likewise. Update call to
4582 altivec_expand_vec_perm_const_le.
4583 (rs6000_expand_vec_perm_const): Delete.
4584 (rs6000_vectorize_vec_perm_const_ok): Delete.
4585 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4586 reference to the SPE evmerge intructions.
4587 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4588 an element count and rtx array.
4589 (rs6000_expand_extract_even): Update call accordingly.
4590 (rs6000_expand_interleave): Likewise.
4591 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4592 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4593 new function.
4594 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4596 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4598 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4599 vector mode and that that mode matches the mode of the data
4600 being permuted.
4601 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4602 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4603 directly using expand_vec_perm_1 when forcing selectors into
4604 registers.
4605 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4607 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4609 * optabs-query.h (can_vec_perm_p): Delete.
4610 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4611 * optabs-query.c (can_vec_perm_p): Split into...
4612 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4613 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4614 particular selector is valid.
4615 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4616 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4617 (vect_grouped_load_supported): Likewise.
4618 (vect_shift_permute_load_chain): Likewise.
4619 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4620 (vect_transform_slp_perm_load): Likewise.
4621 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4622 (vectorizable_bswap): Likewise.
4623 (vect_gen_perm_mask_checked): Likewise.
4624 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4625 implementations of variable permutation vectors into account
4626 when deciding which selector to use.
4627 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4628 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4629 with a false third argument.
4630 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4631 to test whether the constant selector is valid and can_vec_perm_var_p
4632 to test whether a variable selector is valid.
4634 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4636 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4637 * optabs-query.c (can_vec_perm_p): Likewise.
4638 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4639 instead of vec_perm_indices.
4640 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4641 (vect_gen_perm_mask_checked): Likewise,
4642 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4643 (vect_gen_perm_mask_checked): Likewise,
4645 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4647 * optabs-query.h (qimode_for_vec_perm): Declare.
4648 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4649 (qimode_for_vec_perm): ...this new function.
4650 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4652 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4654 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4655 does not have a conditional at the top.
4657 2018-01-02 Richard Biener <rguenther@suse.de>
4659 * ipa-inline.c (big_speedup_p): Fix expression.
4661 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4663 PR target/81616
4664 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4665 for generic 4->6.
4667 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4669 PR target/81616
4670 Generic tuning.
4671 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4672 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4673 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4674 cond_taken_branch_cost 3->4.
4676 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4678 PR tree-optimization/83581
4679 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4680 TODO_cleanup_cfg if any changes have been made.
4682 PR middle-end/83608
4683 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4684 convert_modes if target mode has the right side, but different mode
4685 class.
4687 PR middle-end/83609
4688 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4689 last argument when extracting from CONCAT. If either from_real or
4690 from_imag is NULL, use expansion through memory. If result is not
4691 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4692 the parts directly to inner mode, if even that fails, use expansion
4693 through memory.
4695 PR middle-end/83623
4696 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4697 check for bswap in mode rather than HImode and use that in expand_unop
4698 too.
4699 \f
4700 Copyright (C) 2018 Free Software Foundation, Inc.
4702 Copying and distribution of this file, with or without modification,
4703 are permitted in any medium without royalty provided the copyright
4704 notice and this notice are preserved.