* doc/tm.texi (INIT_CUMULATIVE_ARGS): Update doco.
[official-gcc.git] / gcc / config / ip2k / ip2k.h
blob8c9a66c89d4453875f6fe86914214252b381d0dc
1 /* Definitions of target machine for GCC,
2 For Ubicom IP2022 Communications Controller
4 Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 Contributed by Red Hat, Inc and Ubicom, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
25 #undef ASM_SPEC /* We have a GAS assembler. */
27 #define TARGET_CPU_CPP_BUILTINS() \
28 do \
29 { \
30 builtin_define_std ("IP2K"); \
31 builtin_define ("_DOUBLE_IS_32BITS"); \
32 builtin_define ("_BUFSIZ=512"); \
33 builtin_define ("__FILENAME_MAX__=128"); \
34 } \
35 while (0)
37 /* This declaration should be present. */
38 extern int target_flags;
40 #define TARGET_SWITCHES {{"",0, NULL}}
42 #define TARGET_VERSION fprintf (stderr, " (ip2k, GNU assembler syntax)")
44 /* Caller-saves is not a win for the IP2K. Pretty much anywhere that
45 a register is permitted allows SP-relative addresses too.
47 This machine doesn't have PIC addressing modes, so disable that also. */
49 #define OVERRIDE_OPTIONS \
50 do { \
51 flag_caller_saves = 0; \
52 flag_pic = 0; \
53 } while (0)
55 /* Put each function in its own section so that PAGE-instruction
56 relaxation can do its best. */
57 #define OPTIMIZATION_OPTIONS(LEVEL, SIZEFLAG) \
58 do { \
59 if ((LEVEL) || (SIZEFLAG)) \
60 flag_function_sections = 1; \
61 } while (0)
63 #define BITS_BIG_ENDIAN 0
64 #define BYTES_BIG_ENDIAN 1
65 #define WORDS_BIG_ENDIAN 1
66 #define BITS_PER_WORD 8
67 #define UNITS_PER_WORD (BITS_PER_WORD / BITS_PER_UNIT)
69 /* Width in bits of a pointer.
70 See also the macro `Pmode' defined below. */
71 #define POINTER_SIZE 16
73 /* Maximum sized of reasonable data type DImode or Dfmode ... */
74 #define MAX_FIXED_MODE_SIZE 64
76 #define PARM_BOUNDARY 8
77 #define FUNCTION_BOUNDARY 16
78 #define EMPTY_FIELD_BOUNDARY 8
79 #define BIGGEST_ALIGNMENT 8
81 #define STRICT_ALIGNMENT 0
83 #define PCC_BITFIELD_TYPE_MATTERS 1
85 #undef INT_TYPE_SIZE
86 #define INT_TYPE_SIZE 16
88 #undef SHORT_TYPE_SIZE
89 #define SHORT_TYPE_SIZE 16
91 #undef LONG_TYPE_SIZE
92 #define LONG_TYPE_SIZE 32
93 #define MAX_LONG_TYPE_SIZE 32
95 #undef LONG_LONG_TYPE_SIZE
96 #define LONG_LONG_TYPE_SIZE 64
98 #undef CHAR_TYPE_SIZE
99 #define CHAR_TYPE_SIZE 8
101 #undef FLOAT_TYPE_SIZE
102 #define FLOAT_TYPE_SIZE 32
104 #undef DOUBLE_TYPE_SIZE
105 #define DOUBLE_TYPE_SIZE 32
107 #undef LONG_DOUBLE_TYPE_SIZE
108 #define LONG_DOUBLE_TYPE_SIZE 32
110 #define DEFAULT_SIGNED_CHAR 1
112 /* #define DEFAULT_SHORT_ENUMS 1
113 This was the default for the IP2k but gcc has a bug (as of 17th May
114 2001) in the way that library calls to the memory checker functions
115 are issues that screws things up if an enum is not equivalent to
116 an int. */
118 #define SIZE_TYPE "unsigned int"
120 #define PTRDIFF_TYPE "int"
122 #undef WCHAR_TYPE
123 #define WCHAR_TYPE "int"
124 #undef WCHAR_TYPE_SIZE
125 #define WCHAR_TYPE_SIZE 16
127 #define HARD_REG_SIZE (UNITS_PER_WORD)
128 /* Standard register usage.
130 for the IP2K, we are going to have a LOT of registers, but only some of them
131 are named. */
133 #define FIRST_PSEUDO_REGISTER (0x104) /* Skip over physical regs, VFP, AP. */
135 #define REG_IP 0x4
136 #define REG_IPH REG_IP
137 #define REG_IPL 0x5
139 #define REG_SP 0x6
140 #define REG_SPH REG_SP
141 #define REG_SPL 0x7
143 #define REG_PCH 0x8
144 #define REG_PCL 0x9
146 #define REG_W 0xa
147 #define REG_STATUS 0xb
149 #define REG_DP 0xc
150 #define REG_DPH REG_DP
151 #define REG_DPL 0xd
153 #define REG_MULH 0xf
155 #define REG_CALLH 0x7e /* Call-stack readout. */
156 #define REG_CALLL 0x7f
159 #define REG_RESULT 0x80 /* Result register (upto 8 bytes). */
160 #define REG_FP 0xfd /* 2 bytes for FRAME chain */
162 #define REG_ZERO 0xff /* Initialized to zero by runtime. */
164 #define REG_VFP 0x100 /* Virtual frame pointer. */
165 #define REG_AP 0x102 /* Virtual arg pointer. */
167 /* Status register bits. */
168 #define Z_FLAG 0x2
169 #define DC_FLAG 0x1
170 #define C_FLAG 0x0
172 #define FIXED_REGISTERS {\
173 1,1,1,1,0,0,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r0.. r31*/\
174 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
175 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
176 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
177 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,/*r128..r159*/\
178 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
179 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
180 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
181 1,1,1,1}
183 #define CALL_USED_REGISTERS { \
184 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r0.. r31*/\
185 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
186 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
187 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
188 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r128..r159*/\
189 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
190 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
191 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
192 1,1,1,1}
194 #define NON_SAVING_SETJMP 0
196 #define REG_ALLOC_ORDER { \
197 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f, \
198 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97, \
199 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f, \
200 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \
201 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7, \
202 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf, \
203 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7, \
204 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf, \
205 0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7, \
206 0xc8,0xc9,0xca,0xcb,0xcc,0xcd,0xce,0xcf, \
207 0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,0xd7, \
208 0xd8,0xd9,0xda,0xdb,0xdc,0xdd,0xde,0xdf, \
209 0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7, \
210 0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xef, \
211 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7, \
212 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff, \
213 0x00,0x01,0x02,0x03,0x0c,0x0d,0x06,0x07, \
214 0x08,0x09,0x0a,0x0b,0x04,0x05,0x0e,0x0f, \
215 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, \
216 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f, \
217 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27, \
218 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f, \
219 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37, \
220 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, \
221 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47, \
222 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f, \
223 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57, \
224 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f, \
225 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67, \
226 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f, \
227 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77, \
228 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f, \
229 0x100,0x101,0x102,0x103}
232 #define ORDER_REGS_FOR_LOCAL_ALLOC ip2k_init_local_alloc (reg_alloc_order)
234 /* Are we allowed to rename registers? For some reason, regrename was
235 changing DP to IP (when it appeared in addresses like (plus:HI
236 (reg: DP) (const_int 37)) - and that's bad because IP doesn't
237 permit offsets! */
239 #define HARD_REGNO_RENAME_OK(REG, NREG) \
240 (((REG) == REG_DPH) ? 0 \
241 : ((REG) == REG_IPH) ? ((NREG) == REG_DPH) \
242 : (((NREG) == REG_IPL) || ((NREG) == REG_DPL)) ? 0 : 1)
244 #define HARD_REGNO_NREGS(REGNO, MODE) \
245 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
247 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
249 #define MODES_TIEABLE_P(MODE1, MODE2) \
250 (((MODE1) == QImode && (MODE2) == HImode) \
251 || ((MODE2) == QImode && (MODE1) == HImode))
252 /* We originally had this as follows - this isn't a win on the IP2k
253 though as registers just get in our way!
255 #define MODES_TIEABLE_P(MODE1, MODE2) \
256 (((MODE1) > HImode && (MODE2) == HImode)
257 || ((MODE1) == HImode && (MODE2) > HImode)) */
259 enum reg_class {
260 NO_REGS,
261 DPH_REGS,
262 DPL_REGS,
263 DP_REGS,
264 SP_REGS,
265 IPH_REGS,
266 IPL_REGS,
267 IP_REGS,
268 DP_SP_REGS,
269 PTR_REGS,
270 NONPTR_REGS,
271 NONSP_REGS,
272 GENERAL_REGS,
273 ALL_REGS = GENERAL_REGS,
274 LIM_REG_CLASSES
277 #define N_REG_CLASSES (int)LIM_REG_CLASSES
279 #define REG_CLASS_NAMES { \
280 "NO_REGS", \
281 "DPH_REGS", \
282 "DPL_REGS", \
283 "DP_REGS", \
284 "SP_REGS", \
285 "IPH_REGS", \
286 "IPL_REGS", \
287 "IP_REGS", \
288 "DP_SP_REGS", \
289 "PTR_REGS", \
290 "NONPTR_REGS", \
291 "NONSP_REGS", \
292 "GENERAL_REGS" \
296 #define REG_CLASS_CONTENTS { \
297 {0x00000000, 0, 0, 0, 0, 0, 0, 0, 0}, /* NO_REGS */ \
298 {0x00001000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPH_REGS */ \
299 {0x00002000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPL_REGS */ \
300 {0x00003000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_REGS */ \
301 {0x000000c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SP_REGS */ \
302 {0x00000010, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPH_REGS */ \
303 {0x00000020, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPL_REGS */ \
304 {0x00000030, 0, 0, 0, 0, 0, 0, 0, 0}, /* IP_REGS */ \
305 {0x000030c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_SP_REGS */ \
306 {0x000030f0, 0, 0, 0, 0, 0, 0, 0, 0}, /* PTR_REGS */ \
307 {0xffffcf0f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONPTR_REGS */ \
308 {0xffffff3f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONSP_REGS */ \
309 {0xffffffff,-1,-1,-1,-1,-1,-1,-1,15} /* GENERAL_REGS */ \
312 #define REGNO_REG_CLASS(R) \
313 ( (R) == REG_IPH ? IPH_REGS \
314 : (R) == REG_IPL ? IPL_REGS \
315 : (R) == REG_DPH ? DPH_REGS \
316 : (R) == REG_DPL ? DPL_REGS \
317 : (R) == REG_SPH ? SP_REGS \
318 : (R) == REG_SPL ? SP_REGS \
319 : NONPTR_REGS)
321 #define MODE_BASE_REG_CLASS(MODE) ((MODE) == QImode ? PTR_REGS : DP_SP_REGS)
323 #define BASE_REG_CLASS PTR_REGS
325 #define INDEX_REG_CLASS NO_REGS
327 #define REG_CLASS_FROM_LETTER(C) \
328 ( (C) == 'j' ? IPH_REGS \
329 : (C) == 'k' ? IPL_REGS \
330 : (C) == 'f' ? IP_REGS \
331 : (C) == 'y' ? DPH_REGS \
332 : (C) == 'z' ? DPL_REGS \
333 : (C) == 'b' ? DP_REGS \
334 : (C) == 'u' ? NONSP_REGS \
335 : (C) == 'q' ? SP_REGS \
336 : (C) == 'c' ? DP_SP_REGS \
337 : (C) == 'a' ? PTR_REGS \
338 : (C) == 'd' ? NONPTR_REGS \
339 : NO_REGS)
341 #define REGNO_OK_FOR_BASE_P(R) \
342 ((R) == REG_DP || (R) == REG_IP || (R) == REG_SP)
344 #define REGNO_MODE_OK_FOR_BASE_P(R,M) \
345 ((R) == REG_DP || (R) == REG_SP \
346 || ((R) == REG_IP && GET_MODE_SIZE (M) <= 1))
348 #define REGNO_OK_FOR_INDEX_P(NUM) 0
350 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
352 #define SMALL_REGISTER_CLASSES 1
354 #define CLASS_LIKELY_SPILLED_P(CLASS) class_likely_spilled_p(CLASS)
356 #define CLASS_MAX_NREGS(CLASS, MODE) GET_MODE_SIZE (MODE)
358 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
359 ((C) == 'I' ? (VALUE) >= -255 && (VALUE) <= -1 : \
360 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 7 : \
361 (C) == 'K' ? (VALUE) >= 0 && (VALUE) <= 127 : \
362 (C) == 'L' ? (VALUE) > 0 && (VALUE) < 128: \
363 (C) == 'M' ? (VALUE) == -1: \
364 (C) == 'N' ? (VALUE) == 1: \
365 (C) == 'O' ? (VALUE) == 0: \
366 (C) == 'P' ? (VALUE) >= 0 && (VALUE) <= 255: \
369 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
371 #define EXTRA_CONSTRAINT(X, C) ip2k_extra_constraint (X, C)
373 /* This is an undocumented variable which describes
374 how GCC will pop a data. */
375 #define STACK_POP_CODE PRE_INC
377 #define STACK_PUSH_CODE POST_DEC
379 #define STACK_CHECK_BUILTIN 1
380 /* Prologue code will do stack checking as necessary. */
382 #define STARTING_FRAME_OFFSET (0)
384 #define FRAME_GROWS_DOWNWARD 1
385 #define STACK_GROWS_DOWNWARD 1
387 /* On IP2K arg pointer is virtual and resolves to either SP or FP
388 after we've resolved what registers are saved (fp chain, return
389 pc, etc. */
391 #define FIRST_PARM_OFFSET(FUNDECL) 0
393 #define STACK_POINTER_OFFSET 1
394 /* IP2K stack is post-decremented, so 0(sp) is address of open space
395 and 1(sp) is offset to the location avobe the forst location at which
396 outgoing arguments are placed. */
398 #define STACK_BOUNDARY 8
400 #define STACK_POINTER_REGNUM REG_SP
402 #define FRAME_POINTER_REGNUM REG_VFP
403 #define HARD_FRAME_POINTER_REGNUM REG_FP
405 #define ARG_POINTER_REGNUM REG_AP
407 /* We don't really want to support nested functions. But we'll crash
408 in various testsuite tests if we don't at least define the register
409 to contain the static chain. The return value register is about as
410 bad a place as any for this. */
412 #define STATIC_CHAIN_REGNUM REG_RESULT
414 #define FRAME_POINTER_REQUIRED (!flag_omit_frame_pointer)
416 #define ELIMINABLE_REGS { \
417 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
418 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
419 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
420 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
421 {HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
424 #define CAN_ELIMINATE(FROM, TO) \
425 ((FROM) == HARD_FRAME_POINTER_REGNUM \
426 ? (flag_omit_frame_pointer && !frame_pointer_needed) : 1)
427 /* Don't eliminate FP unless we EXPLICITLY_ASKED */
429 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
430 ((OFFSET) = ip2k_init_elim_offset ((FROM), (TO)))
432 #define RETURN_ADDR_RTX(COUNT, X) \
433 (((COUNT) == 0) ? gen_rtx_REG (HImode, REG_CALLH) : NULL_RTX)
435 #define PUSH_ROUNDING(NPUSHED) (NPUSHED)
437 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
438 ip2k_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))
440 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
442 #define CUMULATIVE_ARGS int
444 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
445 ((CUM) = 0)
447 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
449 /* All arguments are passed on stack - do nothing here. */
451 #define FUNCTION_ARG_REGNO_P(R) 0
453 #define FUNCTION_VALUE(VALTYPE, FUNC) \
454 ((TYPE_MODE (VALTYPE) == QImode) \
455 ? gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT + 1) \
456 : gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT))
458 /* Because functions returning 'char' actually widen to 'int', we have to
459 use $81 as the return location if we think we only have a 'char'. */
461 #define LIBCALL_VALUE(MODE) gen_rtx_REG ((MODE), REG_RESULT)
463 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_RESULT)
465 /* Indicate that large structures are passed by reference. */
466 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM,MODE,TYPE,NAMED) 0
468 #define DEFAULT_PCC_STRUCT_RETURN 0
470 #define EPILOGUE_USES(REGNO) 0
473 /* Hmmm. We don't actually like constants as addresses - they always need
474 to be loaded to a register, except for function calls which take an
475 address by immediate value. But changing this to zero had negative
476 effects, causing the compiler to get very confused.... */
478 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
480 #define MAX_REGS_PER_ADDRESS 1
482 #ifdef REG_OK_STRICT
483 # define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
485 if (legitimate_address_p ((MODE), (OPERAND), 1)) \
486 goto ADDR; \
488 #else
489 # define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
491 if (legitimate_address_p ((MODE), (OPERAND), 0)) \
492 goto ADDR; \
494 #endif
496 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
498 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
499 (REGNO (X) >= FIRST_PSEUDO_REGISTER \
500 || (REGNO (X) == REG_FP) \
501 || (REGNO (X) == REG_VFP) \
502 || (REGNO (X) == REG_AP) \
503 || REG_OK_FOR_BASE_STRICT_P(X))
505 #ifdef REG_OK_STRICT
506 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
507 #else
508 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
509 #endif
511 #define REG_OK_FOR_INDEX_P(X) 0
513 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
514 do { rtx orig_x = (X); \
515 (X) = legitimize_address ((X), (OLDX), (MODE), 0); \
516 if ((X) != orig_x && memory_address_p ((MODE), (X))) \
517 goto WIN; \
518 } while (0)
520 /* Is X a legitimate register to reload, or is it a pseudo stack-temp
521 that is problematic for push_reload() ? */
523 #define LRA_REG(X) \
524 (! (reg_equiv_memory_loc[REGNO (X)] \
525 && (reg_equiv_address[REGNO (X)] \
526 || num_not_at_initial_offset)))
528 /* Given a register X that failed the LRA_REG test, replace X
529 by its memory equivalent, find the reloads needed for THAT memory
530 location and substitute that back for the higher-level reload
531 that we're conducting... */
533 /* WARNING: we reference 'ind_levels' and 'insn' which are local variables
534 in find_reloads_address (), where the LEGITIMIZE_RELOAD_ADDRESS macro
535 expands. */
537 #define FRA_REG(X,MODE,OPNUM,TYPE) \
538 do { \
539 rtx tem = make_memloc ((X), REGNO (X)); \
541 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0))) \
543 /* Note that we're doing address in address - cf. ADDR_TYPE */ \
544 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), \
545 &XEXP (tem, 0), (OPNUM), \
546 ADDR_TYPE (TYPE), ind_levels, insn); \
548 (X) = tem; \
549 } while (0)
552 /* For the IP2K, we want to be clever about picking IP vs DP for a
553 base pointer since IP only directly supports a zero displacement.
554 (Note that we have modified all the HI patterns to correctly handle
555 IP references by manipulating iph:ipl as we fetch the pieces). */
556 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND,WIN) \
558 if (GET_CODE (X) == PLUS \
559 && REG_P (XEXP (X, 0)) \
560 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
562 int disp = INTVAL (XEXP (X, 1)); \
563 int fit = (disp >= 0 && disp <= (127 - 2 * GET_MODE_SIZE (MODE))); \
564 rtx reg = XEXP (X, 0); \
565 if (!fit) \
567 push_reload ((X), NULL_RTX, &(X), \
568 NULL, MODE_BASE_REG_CLASS (MODE), GET_MODE (X), \
569 VOIDmode, 0, 0, OPNUM, TYPE); \
570 goto WIN; \
572 if (reg_equiv_memory_loc[REGNO (reg)] \
573 && (reg_equiv_address[REGNO (reg)] || num_not_at_initial_offset)) \
575 rtx mem = make_memloc (reg, REGNO (reg)); \
576 if (! strict_memory_address_p (GET_MODE (mem), XEXP (mem, 0))) \
578 /* Note that we're doing address in address - cf. ADDR_TYPE */\
579 find_reloads_address (GET_MODE (mem), &mem, XEXP (mem, 0), \
580 &XEXP (mem, 0), (OPNUM), \
581 ADDR_TYPE (TYPE), (IND), insn); \
583 push_reload (mem, NULL, &XEXP (X, 0), NULL, \
584 GENERAL_REGS, Pmode, VOIDmode, 0, 0, \
585 OPNUM, TYPE); \
586 push_reload (X, NULL, &X, NULL, \
587 MODE_BASE_REG_CLASS (MODE), GET_MODE (X), VOIDmode, \
588 0, 0, OPNUM, TYPE); \
589 goto WIN; \
594 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
595 do { \
596 if (ip2k_mode_dependent_address (ADDR)) goto LABEL; \
597 } while (0)
599 #define LEGITIMATE_CONSTANT_P(X) 1
601 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 7
603 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 6
605 #define SLOW_BYTE_ACCESS 0
607 #define NO_FUNCTION_CSE
608 #define NO_RECURSIVE_FUNCTION_CSE
610 #define TEXT_SECTION_ASM_OP ".text"
611 #define DATA_SECTION_ASM_OP ".data"
613 #define JUMP_TABLES_IN_TEXT_SECTION 1
615 #define ASM_COMMENT_START " ; "
617 #define ASM_APP_ON "/* #APP */\n"
619 #define ASM_APP_OFF "/* #NOAPP */\n"
621 #define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
622 fprintf ((STREAM), ".double %.20e\n", (VALUE))
623 #define ASM_OUTPUT_FLOAT(STREAM, VALUE) \
624 asm_output_float ((STREAM), (VALUE))
626 #define ASM_OUTPUT_INT(FILE, VALUE) \
627 ( fprintf ((FILE), "\t.long "), \
628 output_addr_const ((FILE), (VALUE)), \
629 fputs ("\n", (FILE)))
631 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
632 asm_output_short ((FILE), (VALUE))
633 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
634 asm_output_char ((FILE), (VALUE))
636 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
637 asm_output_byte ((FILE), (VALUE))
639 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) \
640 ((C) == '\n' || ((C) == '$'))
642 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
643 do { \
644 fputs ("\t.comm ", (STREAM)); \
645 assemble_name ((STREAM), (NAME)); \
646 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
647 } while (0)
649 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
650 do { \
651 fputs ("\t.lcomm ", (STREAM)); \
652 assemble_name ((STREAM), (NAME)); \
653 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
654 } while (0)
656 #undef WEAK_ASM_OP
657 #define WEAK_ASM_OP ".weak"
659 #undef ASM_DECLARE_FUNCTION_SIZE
660 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
661 do { \
662 if (!flag_inhibit_size_directive) \
663 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
664 } while (0)
666 #define ESCAPES \
667 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
668 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
669 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
670 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
671 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
672 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
673 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
674 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
675 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
676 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
677 corresponds to a particular byte value [0..255]. For any
678 given byte value, if the value in the corresponding table
679 position is zero, the given character can be output directly.
680 If the table value is 1, the byte must be output as a \ooo
681 octal escape. If the tables value is anything else, then the
682 byte value should be output as a \ followed by the value
683 in the table. Note that we can use standard UN*X escape
684 sequences for many control characters, but we don't use
685 \a to represent BEL because some svr4 assemblers (e.g. on
686 the i386) don't know about that. Also, we don't use \v
687 since some versions of gas, such as 2.2 did not accept it. */
689 /* Globalizing directive for a label. */
690 #define GLOBAL_ASM_OP ".global\t"
692 #define REGISTER_NAMES { \
693 "$00","$01","$02","$03","iph","ipl","sph","spl", \
694 "pch","pcl","wreg","status","dph","dpl","$0e","mulh", \
695 "$10","$11","$12","$13","$14","$15","$16","$17", \
696 "$18","$19","$1a","$1b","$1c","$1d","$1e","$1f", \
697 "$20","$21","$22","$23","$24","$25","$26","$27", \
698 "$28","$29","$2a","$2b","$2c","$2d","$2e","$2f", \
699 "$30","$31","$32","$33","$34","$35","$36","$37", \
700 "$38","$39","$3a","$3b","$3c","$3d","$3e","$3f", \
701 "$40","$41","$42","$43","$44","$45","$46","$47", \
702 "$48","$49","$4a","$4b","$4c","$4d","$4e","$4f", \
703 "$50","$51","$52","$53","$54","$55","$56","$57", \
704 "$58","$59","$5a","$5b","$5c","$5d","$5e","$5f", \
705 "$60","$61","$62","$63","$64","$65","$66","$67", \
706 "$68","$69","$6a","$6b","$6c","$6d","$6e","$6f", \
707 "$70","$71","$72","$73","$74","$75","$76","$77", \
708 "$78","$79","$7a","$7b","$7c","$7d","callh","calll", \
709 "$80","$81","$82","$83","$84","$85","$86","$87", \
710 "$88","$89","$8a","$8b","$8c","$8d","$8e","$8f", \
711 "$90","$91","$92","$93","$94","$95","$96","$97", \
712 "$98","$99","$9a","$9b","$9c","$9d","$9e","$9f", \
713 "$a0","$a1","$a2","$a3","$a4","$a5","$a6","$a7", \
714 "$a8","$a9","$aa","$ab","$ac","$ad","$ae","$af", \
715 "$b0","$b1","$b2","$b3","$b4","$b5","$b6","$b7", \
716 "$b8","$b9","$ba","$bb","$bc","$bd","$be","$bf", \
717 "$c0","$c1","$c2","$c3","$c4","$c5","$c6","$c7", \
718 "$c8","$c9","$ca","$cb","$cc","$cd","$ce","$cf", \
719 "$d0","$d1","$d2","$d3","$d4","$d5","$d6","$d7", \
720 "$d8","$d9","$da","$db","$dc","$dd","$de","$df", \
721 "$e0","$e1","$e2","$e3","$e4","$e5","$e6","$e7", \
722 "$e8","$e9","$ea","$eb","$ec","$ed","$ee","$ef", \
723 "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7", \
724 "$f8","$f9","$fa","$fb","$fc","$fd","$fe","$ff", \
725 "vfph","vfpl","vaph","vapl"}
727 #define PRINT_OPERAND(STREAM, X, CODE) \
728 print_operand ((STREAM), (X), (CODE))
730 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
731 ((CODE) == '<' || (CODE) == '>')
733 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
735 /* Since register names don't have a prefix, we must preface all
736 user identifiers with the '_' to prevent confusion. */
738 #undef USER_LABEL_PREFIX
739 #define USER_LABEL_PREFIX "_"
740 #define LOCAL_LABEL_PREFIX ".L"
742 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
743 asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
745 /* elfos.h presumes that we will want switch/case dispatch tables aligned.
746 This is not so for the ip2k. */
747 #undef ASM_OUTPUT_CASE_LABEL
749 #undef ASM_OUTPUT_ADDR_VEC_ELT
750 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
751 asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
753 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
754 fprintf ((STREAM), "\t.align %d\n", (POWER))
756 /* Since instructions are 16 bit word addresses, we should lie and claim that
757 the dispatch vectors are in QImode. Otherwise the offset into the jump
758 table will be scaled by the MODE_SIZE. */
760 #define CASE_VECTOR_MODE QImode
762 #undef WORD_REGISTER_OPERATIONS
764 #define MOVE_MAX 1
766 #define MOVE_RATIO 3
767 /* MOVE_RATIO is the number of move instructions that is better than a
768 block move. Make this small on the IP2k, since the code size grows very
769 large with each move. */
771 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
773 #define Pmode HImode
775 #define FUNCTION_MODE HImode
777 #define INTEGRATE_THRESHOLD(DECL) \
778 (1 + (3 * list_length (DECL_ARGUMENTS (DECL)) / 2))
780 #define DOLLARS_IN_IDENTIFIERS 0
782 extern int ip2k_reorg_in_progress;
783 /* Flag if we're in the middle of IP2k-specific reorganization. */
785 extern int ip2k_reorg_completed;
786 /* Flag if we've completed our IP2k-specific reorganization. If we have
787 then we allow quite a few more tricks than before. */
789 extern int ip2k_reorg_split_dimode;
790 extern int ip2k_reorg_split_simode;
791 extern int ip2k_reorg_split_qimode;
792 extern int ip2k_reorg_split_himode;
793 /* Flags for various split operations that we run in sequence. */
795 extern int ip2k_reorg_merge_qimode;
796 /* Flag to indicate that it's safe to merge QImode operands. */
798 #define TRAMPOLINE_TEMPLATE(FILE) abort ()
800 #define TRAMPOLINE_SIZE 4
802 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
804 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), \
805 CXT); \
806 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), \
807 FNADDR); \
809 /* Store in cc_status the expressions
810 that the condition codes will describe
811 after execution of an instruction whose pattern is EXP.
812 Do not alter them if the instruction would not alter the cc's. */
814 #define NOTICE_UPDATE_CC(EXP, INSN) (void)(0)
816 /* Output assembler code to FILE to increment profiler label # LABELNO
817 for profiling a function entry. */
819 #define FUNCTION_PROFILER(FILE, LABELNO) \
820 fprintf ((FILE), "/* profiler %d */", (LABELNO))
822 #define TARGET_MEM_FUNCTIONS
824 #undef ENDFILE_SPEC
825 #undef LINK_SPEC
826 #undef STARTFILE_SPEC
828 #if defined(__STDC__) || defined(ALMOST_STDC)
829 #define AS2(a,b,c) #a "\t" #b "," #c
830 #define AS1(a,b) #a "\t" #b
831 #else
832 #define AS1(a,b) "a b"
833 #define AS2(a,b,c) "a b,c"
834 #endif
835 #define OUT_AS1(a,b) output_asm_insn (AS1 (a,b), operands)
836 #define OUT_AS2(a,b,c) output_asm_insn (AS2 (a,b,c), operands)
837 #define CR_TAB "\n\t"
839 #define PREDICATE_CODES \
840 {"ip2k_ip_operand", {MEM}}, \
841 {"ip2k_short_operand", {MEM}}, \
842 {"ip2k_gen_operand", {MEM, REG, SUBREG}}, \
843 {"ip2k_nonptr_operand", {REG, SUBREG}}, \
844 {"ip2k_ptr_operand", {REG, SUBREG}}, \
845 {"ip2k_split_dest_operand", {REG, SUBREG, MEM}}, \
846 {"ip2k_sp_operand", {REG}}, \
847 {"ip2k_nonsp_reg_operand", {REG, SUBREG}}, \
848 {"ip2k_symbol_ref_operand", {SYMBOL_REF}}, \
849 {"ip2k_binary_operator", {PLUS, MINUS, MULT, DIV, \
850 UDIV, MOD, UMOD, AND, IOR, \
851 XOR, COMPARE, ASHIFT, \
852 ASHIFTRT, LSHIFTRT}}, \
853 {"ip2k_unary_operator", {NEG, NOT, SIGN_EXTEND, \
854 ZERO_EXTEND}}, \
855 {"ip2k_unsigned_comparison_operator", {LTU, GTU, NE, \
856 EQ, LEU, GEU}},\
857 {"ip2k_signed_comparison_operator", {LT, GT, LE, GE}},
859 #define DWARF2_DEBUGGING_INFO 1
861 #define DWARF2_ASM_LINE_DEBUG_INFO 1
863 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
865 /* Miscellaneous macros to describe machine specifics. */
867 #define IS_PSEUDO_P(R) (REGNO (R) >= FIRST_PSEUDO_REGISTER)
869 /* Default calculations would cause DWARF address sizes to be 2 bytes,
870 but the Harvard architecture of the IP2k and the word-addressed 64k
871 of instruction memory causes us to want a 32-bit "address" field. */
872 #undef DWARF2_ADDR_SIZE
873 #define DWARF2_ADDR_SIZE 4