* doc/tm.texi (INIT_CUMULATIVE_ARGS): Update doco.
[official-gcc.git] / gcc / config / h8300 / h8300.h
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1 /* Definitions of target machine for GNU compiler.
2 Renesas H8/300 (generic)
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999,
4 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 Contributed by Steve Chamberlain (sac@cygnus.com),
6 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
15 GCC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 #ifndef GCC_H8300_H
26 #define GCC_H8300_H
28 /* Which CPU to compile for.
29 We use int for CPU_TYPE to avoid lots of casts. */
30 #if 0 /* defined in insn-attr.h, here for documentation */
31 enum attr_cpu { CPU_H8300, CPU_H8300H };
32 #endif
33 extern int cpu_type;
35 /* Various globals defined in h8300.c. */
37 extern const char *h8_push_op, *h8_pop_op, *h8_mov_op;
38 extern const char * const *h8_reg_names;
40 /* Target CPU builtins. */
41 #define TARGET_CPU_CPP_BUILTINS() \
42 do \
43 { \
44 if (TARGET_H8300H) \
45 { \
46 builtin_define ("__H8300H__"); \
47 builtin_assert ("cpu=h8300h"); \
48 builtin_assert ("machine=h8300h"); \
49 if (TARGET_NORMAL_MODE) \
50 { \
51 builtin_define ("__NORMAL_MODE__"); \
52 } \
53 } \
54 else if (TARGET_H8300S) \
55 { \
56 builtin_define ("__H8300S__"); \
57 builtin_assert ("cpu=h8300s"); \
58 builtin_assert ("machine=h8300s"); \
59 if (TARGET_NORMAL_MODE) \
60 { \
61 builtin_define ("__NORMAL_MODE__"); \
62 } \
63 } \
64 else \
65 { \
66 builtin_define ("__H8300__"); \
67 builtin_assert ("cpu=h8300"); \
68 builtin_assert ("machine=h8300"); \
69 } \
70 } \
71 while (0)
73 #define LINK_SPEC "%{mh:%{mn:-m h8300hn}} %{mh:%{!mn:-m h8300h}} %{ms:%{mn:-m h8300sn}} %{ms:%{!mn:-m h8300s}}"
75 #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
77 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
78 do \
79 { \
80 /* Basic block reordering is only beneficial on targets with cache \
81 and/or variable-cycle branches where (cycle count taken != \
82 cycle count not taken). */ \
83 flag_reorder_blocks = 0; \
84 } \
85 while (0)
87 /* Print subsidiary information on the compiler version in use. */
89 #define TARGET_VERSION fprintf (stderr, " (Renesas H8/300)");
91 /* Run-time compilation parameters selecting different hardware subsets. */
93 extern int target_flags;
95 /* Masks for the -m switches. */
96 #define MASK_H8300S 0x00000001
97 #define MASK_MAC 0x00000002
98 #define MASK_INT32 0x00000008
99 #define MASK_ADDRESSES 0x00000040
100 #define MASK_QUICKCALL 0x00000080
101 #define MASK_SLOWBYTE 0x00000100
102 #define MASK_NORMAL_MODE 0x00000200
103 #define MASK_RELAX 0x00000400
104 #define MASK_H8300H 0x00001000
105 #define MASK_ALIGN_300 0x00002000
107 /* Macros used in the machine description to test the flags. */
109 /* Make int's 32 bits. */
110 #define TARGET_INT32 (target_flags & MASK_INT32)
112 /* Dump recorded insn lengths into the output file. This helps debug the
113 md file. */
114 #define TARGET_ADDRESSES (target_flags & MASK_ADDRESSES)
116 /* Pass the first few arguments in registers. */
117 #define TARGET_QUICKCALL (target_flags & MASK_QUICKCALL)
119 /* Pretend byte accesses are slow. */
120 #define TARGET_SLOWBYTE (target_flags & MASK_SLOWBYTE)
122 /* Select between the H8/300 and H8/300H CPUs. */
123 #define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S)
124 #define TARGET_H8300H (target_flags & MASK_H8300H)
125 #define TARGET_H8300S (target_flags & MASK_H8300S)
126 #define TARGET_NORMAL_MODE (target_flags & MASK_NORMAL_MODE)
128 /* mac register and relevant instructions are available. */
129 #define TARGET_MAC (target_flags & MASK_MAC)
131 /* Align all values on the H8/300H the same way as the H8/300. Specifically,
132 32 bit and larger values are aligned on 16 bit boundaries.
133 This is all the hardware requires, but the default is 32 bits for the H8/300H.
134 ??? Now watch someone add hardware floating point requiring 32 bit
135 alignment. */
136 #define TARGET_ALIGN_300 (target_flags & MASK_ALIGN_300)
138 /* Macro to define tables used to set the flags.
139 This is a list in braces of pairs in braces,
140 each pair being { "NAME", VALUE }
141 where VALUE is the bits to set or minus the bits to clear.
142 An empty string NAME is used to identify the default VALUE. */
144 #define TARGET_SWITCHES \
145 { {"s", MASK_H8300S, N_("Generate H8S code")}, \
146 {"no-s", -MASK_H8300S, N_("Do not generate H8S code")}, \
147 {"s2600", MASK_MAC, N_("Generate H8S/2600 code")}, \
148 {"no-s2600", -MASK_MAC, N_("Do not generate H8S/2600 code")}, \
149 {"int32", MASK_INT32, N_("Make integers 32 bits wide")}, \
150 {"addresses", MASK_ADDRESSES, NULL}, \
151 {"quickcall", MASK_QUICKCALL, \
152 N_("Use registers for argument passing")}, \
153 {"no-quickcall", -MASK_QUICKCALL, \
154 N_("Do not use registers for argument passing")}, \
155 {"slowbyte", MASK_SLOWBYTE, \
156 N_("Consider access to byte sized memory slow")}, \
157 {"relax", MASK_RELAX, N_("Enable linker relaxing")}, \
158 {"h", MASK_H8300H, N_("Generate H8/300H code")}, \
159 {"n", MASK_NORMAL_MODE, N_("Enable the normal mode")}, \
160 {"no-h", -MASK_H8300H, N_("Do not generate H8/300H code")}, \
161 {"align-300", MASK_ALIGN_300, N_("Use H8/300 alignment rules")}, \
162 { "", TARGET_DEFAULT, NULL}}
164 #ifdef IN_LIBGCC2
165 #undef TARGET_H8300H
166 #undef TARGET_H8300S
167 #undef TARGET_NORMAL_MODE
168 /* If compiling libgcc2, make these compile time constants based on what
169 flags are we actually compiling with. */
170 #ifdef __H8300H__
171 #define TARGET_H8300H 1
172 #else
173 #define TARGET_H8300H 0
174 #endif
175 #ifdef __H8300S__
176 #define TARGET_H8300S 1
177 #else
178 #define TARGET_H8300S 0
179 #endif
180 #ifdef __NORMAL_MODE__
181 #define TARGET_NORMAL_MODE 1
182 #else
183 #define TARGET_NORMAL_MODE 0
184 #endif
185 #endif /* !IN_LIBGCC2 */
187 /* Do things that must be done once at start up. */
189 #define OVERRIDE_OPTIONS \
190 do \
192 h8300_init_once (); \
194 while (0)
196 /* Default target_flags if no switches specified. */
198 #ifndef TARGET_DEFAULT
199 #define TARGET_DEFAULT (MASK_QUICKCALL)
200 #endif
202 /* Show we can debug even without a frame pointer. */
203 /* #define CAN_DEBUG_WITHOUT_FP */
205 /* Define this if addresses of constant functions
206 shouldn't be put through pseudo regs where they can be cse'd.
207 Desirable on machines where ordinary constants are expensive
208 but a CALL with constant address is cheap.
210 Calls through a register are cheaper than calls to named
211 functions; however, the register pressure this causes makes
212 CSEing of function addresses generally a lose. */
213 #define NO_FUNCTION_CSE
215 /* Target machine storage layout */
217 /* Define this if most significant bit is lowest numbered
218 in instructions that operate on numbered bit-fields.
219 This is not true on the H8/300. */
220 #define BITS_BIG_ENDIAN 0
222 /* Define this if most significant byte of a word is the lowest numbered. */
223 /* That is true on the H8/300. */
224 #define BYTES_BIG_ENDIAN 1
226 /* Define this if most significant word of a multiword number is lowest
227 numbered. */
228 #define WORDS_BIG_ENDIAN 1
230 #define MAX_BITS_PER_WORD 32
232 /* Width of a word, in units (bytes). */
233 #define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
234 #define MIN_UNITS_PER_WORD 2
236 #define SHORT_TYPE_SIZE 16
237 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
238 #define LONG_TYPE_SIZE 32
239 #define LONG_LONG_TYPE_SIZE 64
240 #define FLOAT_TYPE_SIZE 32
241 #define DOUBLE_TYPE_SIZE 32
242 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
244 #define MAX_FIXED_MODE_SIZE 32
246 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
247 #define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
249 /* Allocation boundary (in *bits*) for the code of a function. */
250 #define FUNCTION_BOUNDARY 16
252 /* Alignment of field after `int : 0' in a structure. */
253 /* One can argue this should be 32 for -mint32, but since 32 bit ints only
254 need 16 bit alignment, this is left as is so that -mint32 doesn't change
255 structure layouts. */
256 #define EMPTY_FIELD_BOUNDARY 16
258 /* No data type wants to be aligned rounder than this.
259 32 bit values are aligned as such on the H8/300H and H8S for speed. */
260 #define BIGGEST_ALIGNMENT \
261 (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)
263 /* The stack goes in 16/32 bit lumps. */
264 #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32)
266 /* Define this if move instructions will actually fail to work
267 when given unaligned data. */
268 /* On the H8/300, longs can be aligned on halfword boundaries, but not
269 byte boundaries. */
270 #define STRICT_ALIGNMENT 1
272 /* Standard register usage. */
274 /* Number of actual hardware registers.
275 The hardware registers are assigned numbers for the compiler
276 from 0 to just below FIRST_PSEUDO_REGISTER.
278 All registers that the compiler knows about must be given numbers,
279 even those that are not normally considered general registers.
281 Reg 9 does not correspond to any hardware register, but instead
282 appears in the RTL as an argument pointer prior to reload, and is
283 eliminated during reloading in favor of either the stack or frame
284 pointer. */
286 #define FIRST_PSEUDO_REGISTER 12
288 /* 1 for registers that have pervasive standard uses
289 and are not available for the register allocator. */
291 #define FIXED_REGISTERS \
292 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1}
294 /* 1 for registers not available across function calls.
295 These must include the FIXED_REGISTERS and also any
296 registers that can be used without being saved.
297 The latter must include the registers where values are returned
298 and the register where structure-value addresses are passed.
299 Aside from that, you can include as many other registers as you
300 like.
302 H8 destroys r0,r1,r2,r3. */
304 #define CALL_USED_REGISTERS \
305 { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1 }
307 #define REG_ALLOC_ORDER \
308 { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10}
310 #define CONDITIONAL_REGISTER_USAGE \
312 if (!TARGET_MAC) \
313 fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1; \
316 /* Return number of consecutive hard regs needed starting at reg REGNO
317 to hold something of mode MODE.
319 This is ordinarily the length in words of a value of mode MODE
320 but can be less for certain modes in special long registers.
322 We pretend the MAC register is 32bits -- we don't have any data
323 types on the H8 series to handle more than 32bits. */
325 #define HARD_REGNO_NREGS(REGNO, MODE) \
326 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
328 /* Value is 1 if hard register REGNO can hold a value of machine-mode
329 MODE.
331 H8/300: If an even reg, then anything goes. Otherwise the mode must be QI
332 or HI.
333 H8/300H: Anything goes. */
335 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
336 (TARGET_H8300 \
337 ? ((((REGNO) & 1) == 0) || ((MODE) == HImode) || ((MODE) == QImode)) \
338 : (REGNO) == MAC_REG ? (MODE) == SImode : 1)
340 /* Value is 1 if it is a good idea to tie two pseudo registers
341 when one has mode MODE1 and one has mode MODE2.
342 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
343 for any hard reg, then this must be 0 for correct output. */
344 #define MODES_TIEABLE_P(MODE1, MODE2) \
345 ((MODE1) == (MODE2) \
346 || (((MODE1) == QImode || (MODE1) == HImode \
347 || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \
348 && ((MODE2) == QImode || (MODE2) == HImode \
349 || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode))))
351 /* A C expression that is nonzero if hard register NEW_REG can be
352 considered for use as a rename register for OLD_REG register */
354 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
355 h8300_hard_regno_rename_ok (OLD_REG, NEW_REG)
357 /* Specify the registers used for certain standard purposes.
358 The values of these macros are register numbers. */
360 /* H8/300 pc is not overloaded on a register. */
362 /*#define PC_REGNUM 15*/
364 /* Register to use for pushing function arguments. */
365 #define STACK_POINTER_REGNUM SP_REG
367 /* Base register for access to local variables of the function. */
368 #define HARD_FRAME_POINTER_REGNUM HFP_REG
370 /* Base register for access to local variables of the function. */
371 #define FRAME_POINTER_REGNUM FP_REG
373 /* Value should be nonzero if functions must have frame pointers.
374 Zero means the frame pointer need not be set up (and parms
375 may be accessed via the stack pointer) in functions that seem suitable.
376 This is computed in `reload', in reload1.c. */
377 #define FRAME_POINTER_REQUIRED 0
379 /* Base register for access to arguments of the function. */
380 #define ARG_POINTER_REGNUM AP_REG
382 /* Register in which static-chain is passed to a function. */
383 #define STATIC_CHAIN_REGNUM SC_REG
385 /* Fake register that holds the address on the stack of the
386 current function's return address. */
387 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG
389 /* A C expression whose value is RTL representing the value of the return
390 address for the frame COUNT steps up from the current frame.
391 FRAMEADDR is already the frame pointer of the COUNT frame, assuming
392 a stack layout with the frame pointer as the first saved register. */
393 #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME))
395 /* Define the classes of registers for register constraints in the
396 machine description. Also define ranges of constants.
398 One of the classes must always be named ALL_REGS and include all hard regs.
399 If there is more than one class, another class must be named NO_REGS
400 and contain no registers.
402 The name GENERAL_REGS must be the name of a class (or an alias for
403 another name such as ALL_REGS). This is the class of registers
404 that is allowed by "g" or "r" in a register constraint.
405 Also, registers outside this class are allocated only when
406 instructions express preferences for them.
408 The classes must be numbered in nondecreasing order; that is,
409 a larger-numbered class must never be contained completely
410 in a smaller-numbered class.
412 For any two classes, it is very desirable that there be another
413 class that represents their union. */
415 enum reg_class {
416 NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS, LIM_REG_CLASSES
419 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
421 /* Give names of register classes as strings for dump file. */
423 #define REG_CLASS_NAMES \
424 { "NO_REGS", "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" }
426 /* Define which registers fit in which classes.
427 This is an initializer for a vector of HARD_REG_SET
428 of length N_REG_CLASSES. */
430 #define REG_CLASS_CONTENTS \
431 { {0}, /* No regs */ \
432 {0x6ff}, /* GENERAL_REGS */ \
433 {0x100}, /* MAC_REGS */ \
434 {0x7ff}, /* ALL_REGS */ \
437 /* The same information, inverted:
438 Return the class number of the smallest class containing
439 reg number REGNO. This could be a conditional expression
440 or could index an array. */
442 #define REGNO_REG_CLASS(REGNO) (REGNO != MAC_REG ? GENERAL_REGS : MAC_REGS)
444 /* The class value for index registers, and the one for base regs. */
446 #define INDEX_REG_CLASS NO_REGS
447 #define BASE_REG_CLASS GENERAL_REGS
449 /* Get reg_class from a letter such as appears in the machine description.
451 'a' is the MAC register. */
453 #define REG_CLASS_FROM_LETTER(C) ((C) == 'a' ? MAC_REGS : NO_REGS)
455 /* The letters I, J, K, L, M, N, O, P in a register constraint string
456 can be used to stand for particular ranges of immediate operands.
457 This macro defines what the ranges are.
458 C is the letter, and VALUE is a constant value.
459 Return 1 if VALUE is in the range specified by C. */
461 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
462 #define CONST_OK_FOR_J(VALUE) (((VALUE) & 0xff) == 0)
463 #define CONST_OK_FOR_L(VALUE) \
464 (TARGET_H8300H || TARGET_H8300S \
465 ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \
466 : (VALUE) == 1 || (VALUE) == 2)
467 #define CONST_OK_FOR_M(VALUE) \
468 ((VALUE) == 1 || (VALUE) == 2)
469 #define CONST_OK_FOR_N(VALUE) \
470 (TARGET_H8300H || TARGET_H8300S \
471 ? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \
472 : (VALUE) == -1 || (VALUE) == -2)
473 #define CONST_OK_FOR_O(VALUE) \
474 ((VALUE) == -1 || (VALUE) == -2)
476 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
477 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
478 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
479 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
480 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
481 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
482 (C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
485 /* Similar, but for floating constants, and defining letters G and H.
486 Here VALUE is the CONST_DOUBLE rtx itself.
488 `G' is a floating-point zero. */
490 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
491 ((C) == 'G' ? (VALUE) == CONST0_RTX (SFmode) \
492 : 0)
494 /* Given an rtx X being reloaded into a reg required to be
495 in class CLASS, return the class of reg to actually use.
496 In general this is just CLASS; but on some machines
497 in some cases it is preferable to use a more restrictive class. */
499 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
501 /* Return the maximum number of consecutive registers
502 needed to represent mode MODE in a register of class CLASS. */
504 /* On the H8, this is the size of MODE in words. */
506 #define CLASS_MAX_NREGS(CLASS, MODE) \
507 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
509 /* Any SI register-to-register move may need to be reloaded,
510 so define REGISTER_MOVE_COST to be > 2 so that reload never
511 shortcuts. */
513 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
514 (CLASS1 == MAC_REGS || CLASS2 == MAC_REGS ? 6 : 3)
516 /* Stack layout; function entry, exit and calling. */
518 /* Define this if pushing a word on the stack
519 makes the stack pointer a smaller address. */
521 #define STACK_GROWS_DOWNWARD
523 /* Define this if the nominal address of the stack frame
524 is at the high-address end of the local variables;
525 that is, each additional local variable allocated
526 goes at a more negative offset in the frame. */
528 #define FRAME_GROWS_DOWNWARD
530 /* Offset within stack frame to start allocating local variables at.
531 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
532 first local allocated. Otherwise, it is the offset to the BEGINNING
533 of the first local allocated. */
535 #define STARTING_FRAME_OFFSET 0
537 /* If we generate an insn to push BYTES bytes,
538 this says how many the stack pointer really advances by.
540 On the H8/300, @-sp really pushes a byte if you ask it to - but that's
541 dangerous, so we claim that it always pushes a word, then we catch
542 the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output.
544 On the H8/300H, we simplify TARGET_QUICKCALL by setting this to 4
545 and doing a similar thing. */
547 #define PUSH_ROUNDING(BYTES) \
548 (((BYTES) + PARM_BOUNDARY / 8 - 1) & -PARM_BOUNDARY / 8)
550 /* Offset of first parameter from the argument pointer register value. */
551 /* Is equal to the size of the saved fp + pc, even if an fp isn't
552 saved since the value is used before we know. */
554 #define FIRST_PARM_OFFSET(FNDECL) 0
556 /* Value is the number of bytes of arguments automatically
557 popped when returning from a subroutine call.
558 FUNDECL is the declaration node of the function (as a tree),
559 FUNTYPE is the data type of the function (as a tree),
560 or for a library call it is an identifier node for the subroutine name.
561 SIZE is the number of bytes of arguments passed on the stack.
563 On the H8 the return does not pop anything. */
565 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
567 /* Definitions for register eliminations.
569 This is an array of structures. Each structure initializes one pair
570 of eliminable registers. The "from" register number is given first,
571 followed by "to". Eliminations of the same "from" register are listed
572 in order of preference.
574 We have three registers that can be eliminated on the h8300.
575 First, the frame pointer register can often be eliminated in favor
576 of the stack pointer register. Secondly, the argument pointer
577 register and the return address pointer register are always
578 eliminated; they are replaced with either the stack or frame
579 pointer. */
581 #define ELIMINABLE_REGS \
582 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
583 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
584 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
585 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
586 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
587 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
589 /* Given FROM and TO register numbers, say whether this elimination is allowed.
590 Frame pointer elimination is automatically handled.
592 For the h8300, if frame pointer elimination is being done, we would like to
593 convert ap and rp into sp, not fp.
595 All other eliminations are valid. */
597 #define CAN_ELIMINATE(FROM, TO) \
598 ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
600 /* Define the offset between two registers, one to be eliminated, and the other
601 its replacement, at the start of a routine. */
603 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
604 ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO)))
606 /* Define how to find the value returned by a function.
607 VALTYPE is the data type of the value (as a tree).
608 If the precise function being called is known, FUNC is its FUNCTION_DECL;
609 otherwise, FUNC is 0.
611 On the H8 the return value is in R0/R1. */
613 #define FUNCTION_VALUE(VALTYPE, FUNC) \
614 gen_rtx_REG (TYPE_MODE (VALTYPE), R0_REG)
616 /* Define how to find the value returned by a library function
617 assuming the value has mode MODE. */
619 /* On the H8 the return value is in R0/R1. */
621 #define LIBCALL_VALUE(MODE) \
622 gen_rtx_REG (MODE, R0_REG)
624 /* 1 if N is a possible register number for a function value.
625 On the H8, R0 is the only register thus used. */
627 #define FUNCTION_VALUE_REGNO_P(N) ((N) == R0_REG)
629 /* Define this if PCC uses the nonreentrant convention for returning
630 structure and union values. */
632 /*#define PCC_STATIC_STRUCT_RETURN*/
634 /* 1 if N is a possible register number for function argument passing.
635 On the H8, no registers are used in this way. */
637 #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0)
639 /* When defined, the compiler allows registers explicitly used in the
640 rtl to be used as spill registers but prevents the compiler from
641 extending the lifetime of these registers. */
643 #define SMALL_REGISTER_CLASSES 1
645 /* Define a data type for recording info about an argument list
646 during the scan of that argument list. This data type should
647 hold all necessary information about the function itself
648 and about the args processed so far, enough to enable macros
649 such as FUNCTION_ARG to determine where the next arg should go.
651 On the H8/300, this is a two item struct, the first is the number
652 of bytes scanned so far and the second is the rtx of the called
653 library function if any. */
655 #define CUMULATIVE_ARGS struct cum_arg
656 struct cum_arg
658 int nbytes;
659 struct rtx_def *libcall;
662 /* Initialize a variable CUM of type CUMULATIVE_ARGS
663 for a call to a function whose data type is FNTYPE.
664 For a library call, FNTYPE is 0.
666 On the H8/300, the offset starts at 0. */
668 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
669 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME)
671 /* Update the data in CUM to advance over an argument
672 of mode MODE and data type TYPE.
673 (TYPE is null for libcalls where that information may not be available.) */
675 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
676 ((CUM).nbytes += ((MODE) != BLKmode \
677 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \
678 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))
680 /* Define where to put the arguments to a function.
681 Value is zero to push the argument on the stack,
682 or a hard register in which to store the argument.
684 MODE is the argument's machine mode.
685 TYPE is the data type of the argument (as a tree).
686 This is null for libcalls where that information may
687 not be available.
688 CUM is a variable of type CUMULATIVE_ARGS which gives info about
689 the preceding args and about the function being called.
690 NAMED is nonzero if this argument is a named parameter
691 (otherwise it is an extra parameter matching an ellipsis). */
693 /* On the H8/300 all normal args are pushed, unless -mquickcall in which
694 case the first 3 arguments are passed in registers.
695 See function `function_arg'. */
697 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
698 function_arg (&CUM, MODE, TYPE, NAMED)
700 /* Output assembler code to FILE to increment profiler label # LABELNO
701 for profiling a function entry. */
703 #define FUNCTION_PROFILER(FILE, LABELNO) \
704 fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \
705 h8_mov_op, (LABELNO), h8_reg_names[0]);
707 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
708 the stack pointer does not matter. The value is tested only in
709 functions that have frame pointers.
710 No definition is equivalent to always zero. */
712 #define EXIT_IGNORE_STACK 0
714 /* We emit the entire trampoline with INITIALIZE_TRAMPOLINE.
715 Depending on the pointer size, we use a different trampoline.
717 Pmode == HImode
718 vvvv context
719 1 0000 7903xxxx mov.w #0x1234,r3
720 2 0004 5A00xxxx jmp @0x1234
721 ^^^^ function
723 Pmode == SImode
724 vvvvvvvv context
725 2 0000 7A03xxxxxxxx mov.l #0x12345678,er3
726 3 0006 5Axxxxxx jmp @0x123456
727 ^^^^^^ function
730 /* Length in units of the trampoline for entering a nested function. */
732 #define TRAMPOLINE_SIZE ((Pmode == HImode) ? 8 : 12)
734 /* Emit RTL insns to build a trampoline.
735 FNADDR is an RTX for the address of the function's pure code.
736 CXT is an RTX for the static chain value for the function. */
738 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
739 do \
741 if (Pmode == HImode) \
743 emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7903)); \
744 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \
745 (CXT)); \
746 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 4)), \
747 GEN_INT (0x5a00)); \
748 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \
749 (FNADDR)); \
751 else \
753 rtx tem = gen_reg_rtx (Pmode); \
755 emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7a03)); \
756 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \
757 (CXT)); \
758 emit_move_insn (tem, (FNADDR)); \
759 emit_insn (gen_andsi3 (tem, tem, GEN_INT (0x00ffffff))); \
760 emit_insn (gen_iorsi3 (tem, tem, GEN_INT (0x5a000000))); \
761 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \
762 tem); \
765 while (0)
767 /* Addressing modes, and classification of registers for them. */
769 #define HAVE_POST_INCREMENT 1
770 #define HAVE_PRE_DECREMENT 1
772 /* Macros to check register numbers against specific register classes. */
774 /* These assume that REGNO is a hard or pseudo reg number.
775 They give nonzero only if REGNO is a hard reg of the suitable class
776 or a pseudo reg currently allocated to a suitable hard reg.
777 Since they use reg_renumber, they are safe only once reg_renumber
778 has been allocated, which happens in local-alloc.c. */
780 #define REGNO_OK_FOR_INDEX_P(regno) 0
782 #define REGNO_OK_FOR_BASE_P(regno) \
783 (((regno) < FIRST_PSEUDO_REGISTER && regno != MAC_REG) \
784 || reg_renumber[regno] >= 0)
786 /* Maximum number of registers that can appear in a valid memory address. */
788 #define MAX_REGS_PER_ADDRESS 1
790 /* 1 if X is an rtx for a constant that is a valid address. */
792 #define CONSTANT_ADDRESS_P(X) \
793 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
794 || (GET_CODE (X) == CONST_INT \
795 /* We handle signed and unsigned offsets here. */ \
796 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \
797 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \
798 || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST))
800 /* Nonzero if the constant value X is a legitimate general operand.
801 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
803 #define LEGITIMATE_CONSTANT_P(X) (h8300_legitimate_constant_p (X))
805 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
806 and check its validity for a certain class.
807 We have two alternate definitions for each of them.
808 The usual definition accepts all pseudo regs; the other rejects
809 them unless they have been allocated suitable hard regs.
810 The symbol REG_OK_STRICT causes the latter definition to be used.
812 Most source files want to accept pseudo regs in the hope that
813 they will get allocated to the class that the insn wants them to be in.
814 Source files for reload pass need to be strict.
815 After reload, it makes no difference, since pseudo regs have
816 been eliminated by then. */
818 /* Non-strict versions. */
819 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) 0
820 /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */
821 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
822 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != MAC_REG)
824 /* Strict versions. */
825 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
826 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
828 #ifndef REG_OK_STRICT
830 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
831 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X)
833 #else
835 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X)
836 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
838 #endif
840 /* Extra constraints. */
842 #define OK_FOR_R(OP) \
843 (GET_CODE (OP) == CONST_INT \
844 ? !h8300_shift_needs_scratch_p (INTVAL (OP), QImode) \
845 : 0)
847 #define OK_FOR_S(OP) \
848 (GET_CODE (OP) == CONST_INT \
849 ? !h8300_shift_needs_scratch_p (INTVAL (OP), HImode) \
850 : 0)
852 #define OK_FOR_T(OP) \
853 (GET_CODE (OP) == CONST_INT \
854 ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \
855 : 0)
857 /* 'U' if valid for a bset destination;
858 i.e. a register, register indirect, or the eightbit memory region
859 (a SYMBOL_REF with an SYMBOL_REF_FLAG set).
861 On the H8S 'U' can also be a 16bit or 32bit absolute. */
862 #define OK_FOR_U(OP) \
863 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \
864 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
865 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
866 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \
867 && TARGET_H8300S) \
868 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \
869 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
870 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \
871 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT \
872 && (TARGET_H8300S \
873 || SYMBOL_REF_FLAG (XEXP (XEXP (XEXP (OP, 0), 0), 0)))) \
874 || (GET_CODE (OP) == MEM \
875 && h8300_eightbit_constant_address_p (XEXP (OP, 0))) \
876 || (GET_CODE (OP) == MEM && TARGET_H8300S \
877 && GET_CODE (XEXP (OP, 0)) == CONST_INT))
879 #define EXTRA_CONSTRAINT(OP, C) \
880 ((C) == 'R' ? OK_FOR_R (OP) : \
881 (C) == 'S' ? OK_FOR_S (OP) : \
882 (C) == 'T' ? OK_FOR_T (OP) : \
883 (C) == 'U' ? OK_FOR_U (OP) : \
886 #ifndef REG_OK_STRICT
887 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
888 do \
890 if (h8300_legitimate_address_p ((X), 0)) \
891 goto ADDR; \
893 while (0)
894 #else
895 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
896 do \
898 if (h8300_legitimate_address_p ((X), 1)) \
899 goto ADDR; \
901 while (0)
902 #endif
904 /* Try machine-dependent ways of modifying an illegitimate address
905 to be legitimate. If we find one, return the new, valid address.
906 This macro is used in only one place: `memory_address' in explow.c.
908 OLDX is the address as it was before break_out_memory_refs was called.
909 In some cases it is useful to look at this to decide what needs to be done.
911 MODE and WIN are passed so that this macro can use
912 GO_IF_LEGITIMATE_ADDRESS.
914 It is always safe for this macro to do nothing. It exists to recognize
915 opportunities to optimize the output.
917 For the H8/300, don't do anything. */
919 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) {}
921 /* Go to LABEL if ADDR (a legitimate address expression)
922 has an effect that depends on the machine mode it is used for.
924 On the H8/300, the predecrement and postincrement address depend thus
925 (the amount of decrement or increment being the length of the operand). */
927 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
928 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL;
930 /* Specify the machine mode that this machine uses
931 for the index in the tablejump instruction. */
932 #define CASE_VECTOR_MODE Pmode
934 /* Define as C expression which evaluates to nonzero if the tablejump
935 instruction expects the table to contain offsets from the address of the
936 table.
937 Do not define this if the table should contain absolute addresses. */
938 /*#define CASE_VECTOR_PC_RELATIVE 1 */
940 /* Define this as 1 if `char' should by default be signed; else as 0.
942 On the H8/300, sign extension is expensive, so we'll say that chars
943 are unsigned. */
944 #define DEFAULT_SIGNED_CHAR 0
946 /* This flag, if defined, says the same insns that convert to a signed fixnum
947 also convert validly to an unsigned one. */
948 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
950 /* Max number of bytes we can move from memory to memory
951 in one reasonably fast instruction. */
952 #define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
953 #define MAX_MOVE_MAX 4
955 /* Nonzero if access to memory by bytes is slow and undesirable. */
956 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
958 /* Define if shifts truncate the shift count
959 which implies one can omit a sign-extension or zero-extension
960 of a shift count. */
961 /* #define SHIFT_COUNT_TRUNCATED */
963 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
964 is done just by pretending it is already truncated. */
965 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
967 /* Specify the machine mode that pointers have.
968 After generation of rtl, the compiler makes no further distinction
969 between pointers and any other objects of this machine mode. */
970 #define Pmode \
971 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode)
973 /* ANSI C types.
974 We use longs for the H8/300H and the H8S because ints can be 16 or 32.
975 GCC requires SIZE_TYPE to be the same size as pointers. */
976 #define SIZE_TYPE \
977 (TARGET_H8300 || TARGET_NORMAL_MODE ? "unsigned int" : "long unsigned int")
978 #define PTRDIFF_TYPE \
979 (TARGET_H8300 || TARGET_NORMAL_MODE ? "int" : "long int")
981 #define POINTER_SIZE \
982 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16)
984 #define WCHAR_TYPE "short unsigned int"
985 #define WCHAR_TYPE_SIZE 16
986 #define MAX_WCHAR_TYPE_SIZE 16
988 /* A function address in a call instruction
989 is a byte address (for indexing purposes)
990 so give the MEM rtx a byte's mode. */
991 #define FUNCTION_MODE QImode
993 #define BRANCH_COST 0
995 /* Tell final.c how to eliminate redundant test instructions. */
997 /* Here we define machine-dependent flags and fields in cc_status
998 (see `conditions.h'). No extra ones are needed for the h8300. */
1000 /* Store in cc_status the expressions
1001 that the condition codes will describe
1002 after execution of an instruction whose pattern is EXP.
1003 Do not alter them if the instruction would not alter the cc's. */
1005 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN)
1007 /* The add insns don't set overflow in a usable way. */
1008 #define CC_OVERFLOW_UNUSABLE 01000
1009 /* The mov,and,or,xor insns don't set carry. That's OK though as the
1010 Z bit is all we need when doing unsigned comparisons on the result of
1011 these insns (since they're always with 0). However, conditions.h has
1012 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
1013 understandable. */
1014 #define CC_NO_CARRY CC_NO_OVERFLOW
1016 /* Control the assembler format that we output. */
1018 /* Output to assembler file text saying following lines
1019 may contain character constants, extra white space, comments, etc. */
1021 #define ASM_APP_ON "; #APP\n"
1023 /* Output to assembler file text saying following lines
1024 no longer contain unusual constructs. */
1026 #define ASM_APP_OFF "; #NO_APP\n"
1028 #define FILE_ASM_OP "\t.file\n"
1030 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */
1031 #define ASM_WORD_OP \
1032 (TARGET_H8300 || TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t")
1034 #define TEXT_SECTION_ASM_OP "\t.section .text"
1035 #define DATA_SECTION_ASM_OP "\t.section .data"
1036 #define BSS_SECTION_ASM_OP "\t.section .bss"
1038 #undef DO_GLOBAL_CTORS_BODY
1039 #define DO_GLOBAL_CTORS_BODY \
1041 extern func_ptr __ctors[]; \
1042 extern func_ptr __ctors_end[]; \
1043 func_ptr *p; \
1044 for (p = __ctors_end; p > __ctors; ) \
1046 (*--p)(); \
1050 #undef DO_GLOBAL_DTORS_BODY
1051 #define DO_GLOBAL_DTORS_BODY \
1053 extern func_ptr __dtors[]; \
1054 extern func_ptr __dtors_end[]; \
1055 func_ptr *p; \
1056 for (p = __dtors; p < __dtors_end; p++) \
1058 (*p)(); \
1062 /* How to refer to registers in assembler output.
1063 This sequence is indexed by compiler's hard-register-number (see above). */
1065 #define REGISTER_NAMES \
1066 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap", "fp" }
1068 #define ADDITIONAL_REGISTER_NAMES \
1069 { {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \
1070 {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} }
1072 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)
1074 /* Globalizing directive for a label. */
1075 #define GLOBAL_ASM_OP "\t.global "
1077 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1078 ASM_OUTPUT_LABEL (FILE, NAME)
1080 /* The prefix to add to user-visible assembler symbols. */
1082 #define USER_LABEL_PREFIX "_"
1084 /* This is how to store into the string LABEL
1085 the symbol_ref name of an internal numbered label where
1086 PREFIX is the class of label and NUM is the number within the class.
1087 This is suitable for output with `assemble_name'.
1089 N.B.: The h8300.md branch_true and branch_false patterns also know
1090 how to generate internal labels. */
1091 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1092 sprintf (LABEL, "*.%s%lu", PREFIX, (unsigned long)(NUM))
1094 /* This is how to output an insn to push a register on the stack.
1095 It need not be very fast code. */
1097 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1098 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO])
1100 /* This is how to output an insn to pop a register from the stack.
1101 It need not be very fast code. */
1103 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1104 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO])
1106 /* This is how to output an element of a case-vector that is absolute. */
1108 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1109 fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE)
1111 /* This is how to output an element of a case-vector that is relative. */
1113 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1114 fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL)
1116 /* This is how to output an assembler line
1117 that says to advance the location counter
1118 to a multiple of 2**LOG bytes. */
1120 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1121 if ((LOG) != 0) \
1122 fprintf (FILE, "\t.align %d\n", (LOG))
1124 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1125 fprintf (FILE, "\t.space %d\n", (int)(SIZE))
1127 /* This says how to output an assembler line
1128 to define a global common symbol. */
1130 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1131 ( fputs ("\t.comm ", (FILE)), \
1132 assemble_name ((FILE), (NAME)), \
1133 fprintf ((FILE), ",%lu\n", (unsigned long)(SIZE)))
1135 /* This says how to output the assembler to define a global
1136 uninitialized but not common symbol.
1137 Try to use asm_output_bss to implement this macro. */
1139 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
1140 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
1142 /* This says how to output an assembler line
1143 to define a local common symbol. */
1145 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1146 ( fputs ("\t.lcomm ", (FILE)), \
1147 assemble_name ((FILE), (NAME)), \
1148 fprintf ((FILE), ",%d\n", (int)(SIZE)))
1150 #define ASM_PN_FORMAT "%s___%lu"
1152 /* Print an instruction operand X on file FILE.
1153 Look in h8300.c for details. */
1155 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1156 ((CODE) == '#')
1158 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1160 /* Print a memory operand whose address is X, on file FILE.
1161 This uses a function in h8300.c. */
1163 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1165 /* H8300 specific pragmas. */
1166 #define REGISTER_TARGET_PRAGMAS() \
1167 do \
1169 c_register_pragma (0, "saveall", h8300_pr_saveall); \
1170 c_register_pragma (0, "interrupt", h8300_pr_interrupt); \
1172 while (0)
1174 #define FINAL_PRESCAN_INSN(insn, operand, nop) \
1175 final_prescan_insn (insn, operand, nop)
1177 /* Define this macro if GCC should generate calls to the System V
1178 (and ANSI C) library functions `memcpy' and `memset' rather than
1179 the BSD functions `bcopy' and `bzero'. */
1181 #define TARGET_MEM_FUNCTIONS
1183 #define MOVE_RATIO 3
1185 /* Define the codes that are matched by predicates in h8300.c. */
1187 #define PREDICATE_CODES \
1188 {"general_operand_src", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
1189 LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \
1190 {"general_operand_dst", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
1191 LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \
1192 {"single_one_operand", {CONST_INT}}, \
1193 {"single_zero_operand", {CONST_INT}}, \
1194 {"call_insn_operand", {MEM}}, \
1195 {"small_call_insn_operand", {MEM}}, \
1196 {"jump_address_operand", {REG, MEM}}, \
1197 {"two_insn_adds_subs_operand", {CONST_INT}}, \
1198 {"bit_operand", {REG, SUBREG, MEM}}, \
1199 {"bit_memory_operand", {MEM}}, \
1200 {"stack_pointer_operand", {REG}}, \
1201 {"const_int_gt_2_operand", {CONST_INT}}, \
1202 {"const_int_ge_8_operand", {CONST_INT}}, \
1203 {"const_int_qi_operand", {CONST_INT}}, \
1204 {"const_int_hi_operand", {CONST_INT}}, \
1205 {"incdec_operand", {CONST_INT}}, \
1206 {"bit_operator", {XOR, AND, IOR}}, \
1207 {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}}, \
1208 {"eqne_operator", {EQ, NE}}, \
1209 {"gtle_operator", {GT, LE, GTU, LEU}}, \
1210 {"gtuleu_operator", {GTU, LEU}}, \
1211 {"iorxor_operator", {IOR, XOR}},
1213 #endif /* ! GCC_H8300_H */