Create embedded-5_0-branch branch for development on ARM embedded cores.
[official-gcc.git] / embedded-5_0-branch / gcc / testsuite / gcc.target / arm / neon / vsubls32.c
blobe8acf9240a74278b1168e70cfb0466640023e385
1 /* Test the `vsubls32' ARM Neon intrinsic. */
2 /* This file was autogenerated by neon-testgen. */
4 /* { dg-do assemble } */
5 /* { dg-require-effective-target arm_neon_ok } */
6 /* { dg-options "-save-temps -O0" } */
7 /* { dg-add-options arm_neon } */
9 #include "arm_neon.h"
11 void test_vsubls32 (void)
13 int64x2_t out_int64x2_t;
14 int32x2_t arg0_int32x2_t;
15 int32x2_t arg1_int32x2_t;
17 out_int64x2_t = vsubl_s32 (arg0_int32x2_t, arg1_int32x2_t);
20 /* { dg-final { scan-assembler "vsubl\.s32\[ \]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
21 /* { dg-final { cleanup-saved-temps } } */