Missed one in last change.
[official-gcc.git] / gcc / reload.c
blob6df08c427785fe4219f1cf7800b63113bd9757f4
1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
57 NOTE SIDE EFFECTS:
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
64 better that way.
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
81 register.
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
87 #define REG_OK_STRICT
89 #include "config.h"
90 #include "system.h"
91 #include "coretypes.h"
92 #include "tm.h"
93 #include "rtl.h"
94 #include "tm_p.h"
95 #include "insn-config.h"
96 #include "expr.h"
97 #include "optabs.h"
98 #include "recog.h"
99 #include "reload.h"
100 #include "regs.h"
101 #include "hard-reg-set.h"
102 #include "flags.h"
103 #include "real.h"
104 #include "output.h"
105 #include "function.h"
106 #include "toplev.h"
108 #ifndef REGNO_MODE_OK_FOR_BASE_P
109 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
110 #endif
112 #ifndef REG_MODE_OK_FOR_BASE_P
113 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
114 #endif
116 /* All reloads of the current insn are recorded here. See reload.h for
117 comments. */
118 int n_reloads;
119 struct reload rld[MAX_RELOADS];
121 /* All the "earlyclobber" operands of the current insn
122 are recorded here. */
123 int n_earlyclobbers;
124 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
126 int reload_n_operands;
128 /* Replacing reloads.
130 If `replace_reloads' is nonzero, then as each reload is recorded
131 an entry is made for it in the table `replacements'.
132 Then later `subst_reloads' can look through that table and
133 perform all the replacements needed. */
135 /* Nonzero means record the places to replace. */
136 static int replace_reloads;
138 /* Each replacement is recorded with a structure like this. */
139 struct replacement
141 rtx *where; /* Location to store in */
142 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
143 a SUBREG; 0 otherwise. */
144 int what; /* which reload this is for */
145 enum machine_mode mode; /* mode it must have */
148 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
150 /* Number of replacements currently recorded. */
151 static int n_replacements;
153 /* Used to track what is modified by an operand. */
154 struct decomposition
156 int reg_flag; /* Nonzero if referencing a register. */
157 int safe; /* Nonzero if this can't conflict with anything. */
158 rtx base; /* Base address for MEM. */
159 HOST_WIDE_INT start; /* Starting offset or register number. */
160 HOST_WIDE_INT end; /* Ending offset or register number. */
163 #ifdef SECONDARY_MEMORY_NEEDED
165 /* Save MEMs needed to copy from one class of registers to another. One MEM
166 is used per mode, but normally only one or two modes are ever used.
168 We keep two versions, before and after register elimination. The one
169 after register elimination is record separately for each operand. This
170 is done in case the address is not valid to be sure that we separately
171 reload each. */
173 static rtx secondary_memlocs[NUM_MACHINE_MODES];
174 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
175 #endif
177 /* The instruction we are doing reloads for;
178 so we can test whether a register dies in it. */
179 static rtx this_insn;
181 /* Nonzero if this instruction is a user-specified asm with operands. */
182 static int this_insn_is_asm;
184 /* If hard_regs_live_known is nonzero,
185 we can tell which hard regs are currently live,
186 at least enough to succeed in choosing dummy reloads. */
187 static int hard_regs_live_known;
189 /* Indexed by hard reg number,
190 element is nonnegative if hard reg has been spilled.
191 This vector is passed to `find_reloads' as an argument
192 and is not changed here. */
193 static short *static_reload_reg_p;
195 /* Set to 1 in subst_reg_equivs if it changes anything. */
196 static int subst_reg_equivs_changed;
198 /* On return from push_reload, holds the reload-number for the OUT
199 operand, which can be different for that from the input operand. */
200 static int output_reloadnum;
202 /* Compare two RTX's. */
203 #define MATCHES(x, y) \
204 (x == y || (x != 0 && (GET_CODE (x) == REG \
205 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
206 : rtx_equal_p (x, y) && ! side_effects_p (x))))
208 /* Indicates if two reloads purposes are for similar enough things that we
209 can merge their reloads. */
210 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
211 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
212 || ((when1) == (when2) && (op1) == (op2)) \
213 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
214 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
215 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
216 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
217 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
219 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
220 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
221 ((when1) != (when2) \
222 || ! ((op1) == (op2) \
223 || (when1) == RELOAD_FOR_INPUT \
224 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
225 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
227 /* If we are going to reload an address, compute the reload type to
228 use. */
229 #define ADDR_TYPE(type) \
230 ((type) == RELOAD_FOR_INPUT_ADDRESS \
231 ? RELOAD_FOR_INPADDR_ADDRESS \
232 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
233 ? RELOAD_FOR_OUTADDR_ADDRESS \
234 : (type)))
236 #ifdef HAVE_SECONDARY_RELOADS
237 static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
238 enum machine_mode, enum reload_type,
239 enum insn_code *));
240 #endif
241 static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
242 unsigned int));
243 static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
244 static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
245 static void dup_replacements PARAMS ((rtx *, rtx *));
246 static void combine_reloads PARAMS ((void));
247 static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
248 enum reload_type, int, int));
249 static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
250 enum machine_mode, enum machine_mode,
251 enum reg_class, int, int));
252 static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
253 static struct decomposition decompose PARAMS ((rtx));
254 static int immune_p PARAMS ((rtx, rtx, struct decomposition));
255 static int alternative_allows_memconst PARAMS ((const char *, int));
256 static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
257 int, rtx, int *));
258 static rtx make_memloc PARAMS ((rtx, int));
259 static int maybe_memory_address_p PARAMS ((enum machine_mode, rtx, rtx *));
260 static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
261 int, enum reload_type, int, rtx));
262 static rtx subst_reg_equivs PARAMS ((rtx, rtx));
263 static rtx subst_indexed_address PARAMS ((rtx));
264 static void update_auto_inc_notes PARAMS ((rtx, int, int));
265 static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
266 int, enum reload_type,int, rtx));
267 static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
268 enum machine_mode, int,
269 enum reload_type, int));
270 static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
271 enum reload_type, int, rtx));
272 static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
273 static int find_inc_amount PARAMS ((rtx, rtx));
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 nonzero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
286 static int
287 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
288 type, picode)
289 int in_p;
290 rtx x;
291 int opnum;
292 int optional;
293 enum reg_class reload_class;
294 enum machine_mode reload_mode;
295 enum reload_type type;
296 enum insn_code *picode;
298 enum reg_class class = NO_REGS;
299 enum machine_mode mode = reload_mode;
300 enum insn_code icode = CODE_FOR_nothing;
301 enum reg_class t_class = NO_REGS;
302 enum machine_mode t_mode = VOIDmode;
303 enum insn_code t_icode = CODE_FOR_nothing;
304 enum reload_type secondary_type;
305 int s_reload, t_reload = -1;
307 if (type == RELOAD_FOR_INPUT_ADDRESS
308 || type == RELOAD_FOR_OUTPUT_ADDRESS
309 || type == RELOAD_FOR_INPADDR_ADDRESS
310 || type == RELOAD_FOR_OUTADDR_ADDRESS)
311 secondary_type = type;
312 else
313 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
315 *picode = CODE_FOR_nothing;
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
323 x = SUBREG_REG (x);
324 reload_mode = GET_MODE (x);
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem[REGNO (x)] != 0)
335 x = reg_equiv_mem[REGNO (x)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
338 if (in_p)
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
340 #endif
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
343 if (! in_p)
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
345 #endif
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS)
349 return -1;
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
352 use the insn. */
354 icode = (in_p ? reload_in_optab[(int) reload_mode]
355 : reload_out_optab[(int) reload_mode]);
357 if (icode != CODE_FOR_nothing
358 && insn_data[(int) icode].operand[in_p].predicate
359 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
360 icode = CODE_FOR_nothing;
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
366 register. */
368 if (icode != CODE_FOR_nothing)
370 /* If IN_P is nonzero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
373 skip. */
375 enum reg_class insn_class;
377 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
378 insn_class = ALL_REGS;
379 else
381 const char *insn_constraint
382 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
383 char insn_letter = *insn_constraint;
384 insn_class
385 = (insn_letter == 'r' ? GENERAL_REGS
386 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
387 insn_constraint));
389 if (insn_class == NO_REGS)
390 abort ();
391 if (in_p
392 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
393 abort ();
396 /* The scratch register's constraint must start with "=&". */
397 if (insn_data[(int) icode].operand[2].constraint[0] != '='
398 || insn_data[(int) icode].operand[2].constraint[1] != '&')
399 abort ();
401 if (reg_class_subset_p (reload_class, insn_class))
402 mode = insn_data[(int) icode].operand[2].mode;
403 else
405 const char *t_constraint
406 = &insn_data[(int) icode].operand[2].constraint[2];
407 char t_letter = *t_constraint;
408 class = insn_class;
409 t_mode = insn_data[(int) icode].operand[2].mode;
410 t_class = (t_letter == 'r' ? GENERAL_REGS
411 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
412 t_constraint));
413 t_icode = icode;
414 icode = CODE_FOR_nothing;
418 /* This case isn't valid, so fail. Reload is allowed to use the same
419 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
420 in the case of a secondary register, we actually need two different
421 registers for correct code. We fail here to prevent the possibility of
422 silently generating incorrect code later.
424 The convention is that secondary input reloads are valid only if the
425 secondary_class is different from class. If you have such a case, you
426 can not use secondary reloads, you must work around the problem some
427 other way.
429 Allow this when a reload_in/out pattern is being used. I.e. assume
430 that the generated code handles this case. */
432 if (in_p && class == reload_class && icode == CODE_FOR_nothing
433 && t_icode == CODE_FOR_nothing)
434 abort ();
436 /* If we need a tertiary reload, see if we have one we can reuse or else
437 make a new one. */
439 if (t_class != NO_REGS)
441 for (t_reload = 0; t_reload < n_reloads; t_reload++)
442 if (rld[t_reload].secondary_p
443 && (reg_class_subset_p (t_class, rld[t_reload].class)
444 || reg_class_subset_p (rld[t_reload].class, t_class))
445 && ((in_p && rld[t_reload].inmode == t_mode)
446 || (! in_p && rld[t_reload].outmode == t_mode))
447 && ((in_p && (rld[t_reload].secondary_in_icode
448 == CODE_FOR_nothing))
449 || (! in_p &&(rld[t_reload].secondary_out_icode
450 == CODE_FOR_nothing)))
451 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
452 && MERGABLE_RELOADS (secondary_type,
453 rld[t_reload].when_needed,
454 opnum, rld[t_reload].opnum))
456 if (in_p)
457 rld[t_reload].inmode = t_mode;
458 if (! in_p)
459 rld[t_reload].outmode = t_mode;
461 if (reg_class_subset_p (t_class, rld[t_reload].class))
462 rld[t_reload].class = t_class;
464 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
465 rld[t_reload].optional &= optional;
466 rld[t_reload].secondary_p = 1;
467 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
468 opnum, rld[t_reload].opnum))
469 rld[t_reload].when_needed = RELOAD_OTHER;
472 if (t_reload == n_reloads)
474 /* We need to make a new tertiary reload for this register class. */
475 rld[t_reload].in = rld[t_reload].out = 0;
476 rld[t_reload].class = t_class;
477 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
478 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
479 rld[t_reload].reg_rtx = 0;
480 rld[t_reload].optional = optional;
481 rld[t_reload].inc = 0;
482 /* Maybe we could combine these, but it seems too tricky. */
483 rld[t_reload].nocombine = 1;
484 rld[t_reload].in_reg = 0;
485 rld[t_reload].out_reg = 0;
486 rld[t_reload].opnum = opnum;
487 rld[t_reload].when_needed = secondary_type;
488 rld[t_reload].secondary_in_reload = -1;
489 rld[t_reload].secondary_out_reload = -1;
490 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
491 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
492 rld[t_reload].secondary_p = 1;
494 n_reloads++;
498 /* See if we can reuse an existing secondary reload. */
499 for (s_reload = 0; s_reload < n_reloads; s_reload++)
500 if (rld[s_reload].secondary_p
501 && (reg_class_subset_p (class, rld[s_reload].class)
502 || reg_class_subset_p (rld[s_reload].class, class))
503 && ((in_p && rld[s_reload].inmode == mode)
504 || (! in_p && rld[s_reload].outmode == mode))
505 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
506 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
507 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
508 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
509 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
510 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
511 opnum, rld[s_reload].opnum))
513 if (in_p)
514 rld[s_reload].inmode = mode;
515 if (! in_p)
516 rld[s_reload].outmode = mode;
518 if (reg_class_subset_p (class, rld[s_reload].class))
519 rld[s_reload].class = class;
521 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
522 rld[s_reload].optional &= optional;
523 rld[s_reload].secondary_p = 1;
524 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
525 opnum, rld[s_reload].opnum))
526 rld[s_reload].when_needed = RELOAD_OTHER;
529 if (s_reload == n_reloads)
531 #ifdef SECONDARY_MEMORY_NEEDED
532 /* If we need a memory location to copy between the two reload regs,
533 set it up now. Note that we do the input case before making
534 the reload and the output case after. This is due to the
535 way reloads are output. */
537 if (in_p && icode == CODE_FOR_nothing
538 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
540 get_secondary_mem (x, reload_mode, opnum, type);
542 /* We may have just added new reloads. Make sure we add
543 the new reload at the end. */
544 s_reload = n_reloads;
546 #endif
548 /* We need to make a new secondary reload for this register class. */
549 rld[s_reload].in = rld[s_reload].out = 0;
550 rld[s_reload].class = class;
552 rld[s_reload].inmode = in_p ? mode : VOIDmode;
553 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
554 rld[s_reload].reg_rtx = 0;
555 rld[s_reload].optional = optional;
556 rld[s_reload].inc = 0;
557 /* Maybe we could combine these, but it seems too tricky. */
558 rld[s_reload].nocombine = 1;
559 rld[s_reload].in_reg = 0;
560 rld[s_reload].out_reg = 0;
561 rld[s_reload].opnum = opnum;
562 rld[s_reload].when_needed = secondary_type;
563 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
564 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
565 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
566 rld[s_reload].secondary_out_icode
567 = ! in_p ? t_icode : CODE_FOR_nothing;
568 rld[s_reload].secondary_p = 1;
570 n_reloads++;
572 #ifdef SECONDARY_MEMORY_NEEDED
573 if (! in_p && icode == CODE_FOR_nothing
574 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
575 get_secondary_mem (x, mode, opnum, type);
576 #endif
579 *picode = icode;
580 return s_reload;
582 #endif /* HAVE_SECONDARY_RELOADS */
584 #ifdef SECONDARY_MEMORY_NEEDED
586 /* Return a memory location that will be used to copy X in mode MODE.
587 If we haven't already made a location for this mode in this insn,
588 call find_reloads_address on the location being returned. */
591 get_secondary_mem (x, mode, opnum, type)
592 rtx x ATTRIBUTE_UNUSED;
593 enum machine_mode mode;
594 int opnum;
595 enum reload_type type;
597 rtx loc;
598 int mem_valid;
600 /* By default, if MODE is narrower than a word, widen it to a word.
601 This is required because most machines that require these memory
602 locations do not support short load and stores from all registers
603 (e.g., FP registers). */
605 #ifdef SECONDARY_MEMORY_NEEDED_MODE
606 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
607 #else
608 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
609 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
610 #endif
612 /* If we already have made a MEM for this operand in MODE, return it. */
613 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
614 return secondary_memlocs_elim[(int) mode][opnum];
616 /* If this is the first time we've tried to get a MEM for this mode,
617 allocate a new one. `something_changed' in reload will get set
618 by noticing that the frame size has changed. */
620 if (secondary_memlocs[(int) mode] == 0)
622 #ifdef SECONDARY_MEMORY_NEEDED_RTX
623 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
624 #else
625 secondary_memlocs[(int) mode]
626 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
627 #endif
630 /* Get a version of the address doing any eliminations needed. If that
631 didn't give us a new MEM, make a new one if it isn't valid. */
633 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
634 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
636 if (! mem_valid && loc == secondary_memlocs[(int) mode])
637 loc = copy_rtx (loc);
639 /* The only time the call below will do anything is if the stack
640 offset is too large. In that case IND_LEVELS doesn't matter, so we
641 can just pass a zero. Adjust the type to be the address of the
642 corresponding object. If the address was valid, save the eliminated
643 address. If it wasn't valid, we need to make a reload each time, so
644 don't save it. */
646 if (! mem_valid)
648 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
649 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
650 : RELOAD_OTHER);
652 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
653 opnum, type, 0, 0);
656 secondary_memlocs_elim[(int) mode][opnum] = loc;
657 return loc;
660 /* Clear any secondary memory locations we've made. */
662 void
663 clear_secondary_mem ()
665 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
667 #endif /* SECONDARY_MEMORY_NEEDED */
669 /* Find the largest class for which every register number plus N is valid in
670 M1 (if in range) and is cheap to move into REGNO.
671 Abort if no such class exists. */
673 static enum reg_class
674 find_valid_class (m1, n, dest_regno)
675 enum machine_mode m1 ATTRIBUTE_UNUSED;
676 int n;
677 unsigned int dest_regno ATTRIBUTE_UNUSED;
679 int best_cost = -1;
680 int class;
681 int regno;
682 enum reg_class best_class = NO_REGS;
683 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
684 unsigned int best_size = 0;
685 int cost;
687 for (class = 1; class < N_REG_CLASSES; class++)
689 int bad = 0;
690 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
691 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
692 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
693 && ! HARD_REGNO_MODE_OK (regno + n, m1))
694 bad = 1;
696 if (bad)
697 continue;
698 cost = REGISTER_MOVE_COST (m1, class, dest_class);
700 if ((reg_class_size[class] > best_size
701 && (best_cost < 0 || best_cost >= cost))
702 || best_cost > cost)
704 best_class = class;
705 best_size = reg_class_size[class];
706 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
710 if (best_size == 0)
711 abort ();
713 return best_class;
716 /* Return the number of a previously made reload that can be combined with
717 a new one, or n_reloads if none of the existing reloads can be used.
718 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
719 push_reload, they determine the kind of the new reload that we try to
720 combine. P_IN points to the corresponding value of IN, which can be
721 modified by this function.
722 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
724 static int
725 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
726 rtx *p_in, out;
727 enum reg_class class;
728 enum reload_type type;
729 int opnum, dont_share;
731 rtx in = *p_in;
732 int i;
733 /* We can't merge two reloads if the output of either one is
734 earlyclobbered. */
736 if (earlyclobber_operand_p (out))
737 return n_reloads;
739 /* We can use an existing reload if the class is right
740 and at least one of IN and OUT is a match
741 and the other is at worst neutral.
742 (A zero compared against anything is neutral.)
744 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
745 for the same thing since that can cause us to need more reload registers
746 than we otherwise would. */
748 for (i = 0; i < n_reloads; i++)
749 if ((reg_class_subset_p (class, rld[i].class)
750 || reg_class_subset_p (rld[i].class, class))
751 /* If the existing reload has a register, it must fit our class. */
752 && (rld[i].reg_rtx == 0
753 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
754 true_regnum (rld[i].reg_rtx)))
755 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
756 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
757 || (out != 0 && MATCHES (rld[i].out, out)
758 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
759 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
760 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
761 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
762 return i;
764 /* Reloading a plain reg for input can match a reload to postincrement
765 that reg, since the postincrement's value is the right value.
766 Likewise, it can match a preincrement reload, since we regard
767 the preincrementation as happening before any ref in this insn
768 to that register. */
769 for (i = 0; i < n_reloads; i++)
770 if ((reg_class_subset_p (class, rld[i].class)
771 || reg_class_subset_p (rld[i].class, class))
772 /* If the existing reload has a register, it must fit our
773 class. */
774 && (rld[i].reg_rtx == 0
775 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
776 true_regnum (rld[i].reg_rtx)))
777 && out == 0 && rld[i].out == 0 && rld[i].in != 0
778 && ((GET_CODE (in) == REG
779 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
780 && MATCHES (XEXP (rld[i].in, 0), in))
781 || (GET_CODE (rld[i].in) == REG
782 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
783 && MATCHES (XEXP (in, 0), rld[i].in)))
784 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
785 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
786 && MERGABLE_RELOADS (type, rld[i].when_needed,
787 opnum, rld[i].opnum))
789 /* Make sure reload_in ultimately has the increment,
790 not the plain register. */
791 if (GET_CODE (in) == REG)
792 *p_in = rld[i].in;
793 return i;
795 return n_reloads;
798 /* Return nonzero if X is a SUBREG which will require reloading of its
799 SUBREG_REG expression. */
801 static int
802 reload_inner_reg_of_subreg (x, mode, output)
803 rtx x;
804 enum machine_mode mode;
805 int output;
807 rtx inner;
809 /* Only SUBREGs are problematical. */
810 if (GET_CODE (x) != SUBREG)
811 return 0;
813 inner = SUBREG_REG (x);
815 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
816 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
817 return 1;
819 /* If INNER is not a hard register, then INNER will not need to
820 be reloaded. */
821 if (GET_CODE (inner) != REG
822 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
823 return 0;
825 /* If INNER is not ok for MODE, then INNER will need reloading. */
826 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
827 return 1;
829 /* If the outer part is a word or smaller, INNER larger than a
830 word and the number of regs for INNER is not the same as the
831 number of words in INNER, then INNER will need reloading. */
832 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
833 && output
834 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
835 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
836 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
839 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
840 requiring an extra reload register. The caller has already found that
841 IN contains some reference to REGNO, so check that we can produce the
842 new value in a single step. E.g. if we have
843 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
844 instruction that adds one to a register, this should succeed.
845 However, if we have something like
846 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
847 needs to be loaded into a register first, we need a separate reload
848 register.
849 Such PLUS reloads are generated by find_reload_address_part.
850 The out-of-range PLUS expressions are usually introduced in the instruction
851 patterns by register elimination and substituting pseudos without a home
852 by their function-invariant equivalences. */
853 static int
854 can_reload_into (rtx in, int regno, enum machine_mode mode)
856 rtx dst, test_insn;
857 int r = 0;
858 struct recog_data save_recog_data;
860 /* For matching constraints, we often get notional input reloads where
861 we want to use the original register as the reload register. I.e.
862 technically this is a non-optional input-output reload, but IN is
863 already a valid register, and has been chosen as the reload register.
864 Speed this up, since it trivially works. */
865 if (GET_CODE (in) == REG)
866 return 1;
868 /* To test MEMs properly, we'd have to take into account all the reloads
869 that are already scheduled, which can become quite complicated.
870 And since we've already handled address reloads for this MEM, it
871 should always succeed anyway. */
872 if (GET_CODE (in) == MEM)
873 return 1;
875 /* If we can make a simple SET insn that does the job, everything should
876 be fine. */
877 dst = gen_rtx_REG (mode, regno);
878 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
879 save_recog_data = recog_data;
880 if (recog_memoized (test_insn) >= 0)
882 extract_insn (test_insn);
883 r = constrain_operands (1);
885 recog_data = save_recog_data;
886 return r;
889 /* Record one reload that needs to be performed.
890 IN is an rtx saying where the data are to be found before this instruction.
891 OUT says where they must be stored after the instruction.
892 (IN is zero for data not read, and OUT is zero for data not written.)
893 INLOC and OUTLOC point to the places in the instructions where
894 IN and OUT were found.
895 If IN and OUT are both nonzero, it means the same register must be used
896 to reload both IN and OUT.
898 CLASS is a register class required for the reloaded data.
899 INMODE is the machine mode that the instruction requires
900 for the reg that replaces IN and OUTMODE is likewise for OUT.
902 If IN is zero, then OUT's location and mode should be passed as
903 INLOC and INMODE.
905 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
907 OPTIONAL nonzero means this reload does not need to be performed:
908 it can be discarded if that is more convenient.
910 OPNUM and TYPE say what the purpose of this reload is.
912 The return value is the reload-number for this reload.
914 If both IN and OUT are nonzero, in some rare cases we might
915 want to make two separate reloads. (Actually we never do this now.)
916 Therefore, the reload-number for OUT is stored in
917 output_reloadnum when we return; the return value applies to IN.
918 Usually (presently always), when IN and OUT are nonzero,
919 the two reload-numbers are equal, but the caller should be careful to
920 distinguish them. */
923 push_reload (in, out, inloc, outloc, class,
924 inmode, outmode, strict_low, optional, opnum, type)
925 rtx in, out;
926 rtx *inloc, *outloc;
927 enum reg_class class;
928 enum machine_mode inmode, outmode;
929 int strict_low;
930 int optional;
931 int opnum;
932 enum reload_type type;
934 int i;
935 int dont_share = 0;
936 int dont_remove_subreg = 0;
937 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
938 int secondary_in_reload = -1, secondary_out_reload = -1;
939 enum insn_code secondary_in_icode = CODE_FOR_nothing;
940 enum insn_code secondary_out_icode = CODE_FOR_nothing;
942 /* INMODE and/or OUTMODE could be VOIDmode if no mode
943 has been specified for the operand. In that case,
944 use the operand's mode as the mode to reload. */
945 if (inmode == VOIDmode && in != 0)
946 inmode = GET_MODE (in);
947 if (outmode == VOIDmode && out != 0)
948 outmode = GET_MODE (out);
950 /* If IN is a pseudo register everywhere-equivalent to a constant, and
951 it is not in a hard register, reload straight from the constant,
952 since we want to get rid of such pseudo registers.
953 Often this is done earlier, but not always in find_reloads_address. */
954 if (in != 0 && GET_CODE (in) == REG)
956 int regno = REGNO (in);
958 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
959 && reg_equiv_constant[regno] != 0)
960 in = reg_equiv_constant[regno];
963 /* Likewise for OUT. Of course, OUT will never be equivalent to
964 an actual constant, but it might be equivalent to a memory location
965 (in the case of a parameter). */
966 if (out != 0 && GET_CODE (out) == REG)
968 int regno = REGNO (out);
970 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
971 && reg_equiv_constant[regno] != 0)
972 out = reg_equiv_constant[regno];
975 /* If we have a read-write operand with an address side-effect,
976 change either IN or OUT so the side-effect happens only once. */
977 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
978 switch (GET_CODE (XEXP (in, 0)))
980 case POST_INC: case POST_DEC: case POST_MODIFY:
981 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
982 break;
984 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
985 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
986 break;
988 default:
989 break;
992 /* If we are reloading a (SUBREG constant ...), really reload just the
993 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
994 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
995 a pseudo and hence will become a MEM) with M1 wider than M2 and the
996 register is a pseudo, also reload the inside expression.
997 For machines that extend byte loads, do this for any SUBREG of a pseudo
998 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
999 M2 is an integral mode that gets extended when loaded.
1000 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1001 either M1 is not valid for R or M2 is wider than a word but we only
1002 need one word to store an M2-sized quantity in R.
1003 (However, if OUT is nonzero, we need to reload the reg *and*
1004 the subreg, so do nothing here, and let following statement handle it.)
1006 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1007 we can't handle it here because CONST_INT does not indicate a mode.
1009 Similarly, we must reload the inside expression if we have a
1010 STRICT_LOW_PART (presumably, in == out in the cas).
1012 Also reload the inner expression if it does not require a secondary
1013 reload but the SUBREG does.
1015 Finally, reload the inner expression if it is a register that is in
1016 the class whose registers cannot be referenced in a different size
1017 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1018 cannot reload just the inside since we might end up with the wrong
1019 register class. But if it is inside a STRICT_LOW_PART, we have
1020 no choice, so we hope we do get the right register class there. */
1022 if (in != 0 && GET_CODE (in) == SUBREG
1023 && (subreg_lowpart_p (in) || strict_low)
1024 #ifdef CANNOT_CHANGE_MODE_CLASS
1025 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1026 #endif
1027 && (CONSTANT_P (SUBREG_REG (in))
1028 || GET_CODE (SUBREG_REG (in)) == PLUS
1029 || strict_low
1030 || (((GET_CODE (SUBREG_REG (in)) == REG
1031 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1032 || GET_CODE (SUBREG_REG (in)) == MEM)
1033 && ((GET_MODE_SIZE (inmode)
1034 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1035 #ifdef LOAD_EXTEND_OP
1036 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1037 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1038 <= UNITS_PER_WORD)
1039 && (GET_MODE_SIZE (inmode)
1040 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1041 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1042 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
1043 #endif
1044 #ifdef WORD_REGISTER_OPERATIONS
1045 || ((GET_MODE_SIZE (inmode)
1046 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1047 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1048 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1049 / UNITS_PER_WORD)))
1050 #endif
1052 || (GET_CODE (SUBREG_REG (in)) == REG
1053 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1054 /* The case where out is nonzero
1055 is handled differently in the following statement. */
1056 && (out == 0 || subreg_lowpart_p (in))
1057 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1058 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1059 > UNITS_PER_WORD)
1060 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1061 / UNITS_PER_WORD)
1062 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1063 GET_MODE (SUBREG_REG (in)))))
1064 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1065 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1066 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1067 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1068 GET_MODE (SUBREG_REG (in)),
1069 SUBREG_REG (in))
1070 == NO_REGS))
1071 #endif
1072 #ifdef CANNOT_CHANGE_MODE_CLASS
1073 || (GET_CODE (SUBREG_REG (in)) == REG
1074 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1075 && REG_CANNOT_CHANGE_MODE_P
1076 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1077 #endif
1080 in_subreg_loc = inloc;
1081 inloc = &SUBREG_REG (in);
1082 in = *inloc;
1083 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1084 if (GET_CODE (in) == MEM)
1085 /* This is supposed to happen only for paradoxical subregs made by
1086 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1087 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1088 abort ();
1089 #endif
1090 inmode = GET_MODE (in);
1093 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1094 either M1 is not valid for R or M2 is wider than a word but we only
1095 need one word to store an M2-sized quantity in R.
1097 However, we must reload the inner reg *as well as* the subreg in
1098 that case. */
1100 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1101 code above. This can happen if SUBREG_BYTE != 0. */
1103 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1105 enum reg_class in_class = class;
1107 if (GET_CODE (SUBREG_REG (in)) == REG)
1108 in_class
1109 = find_valid_class (inmode,
1110 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1111 GET_MODE (SUBREG_REG (in)),
1112 SUBREG_BYTE (in),
1113 GET_MODE (in)),
1114 REGNO (SUBREG_REG (in)));
1116 /* This relies on the fact that emit_reload_insns outputs the
1117 instructions for input reloads of type RELOAD_OTHER in the same
1118 order as the reloads. Thus if the outer reload is also of type
1119 RELOAD_OTHER, we are guaranteed that this inner reload will be
1120 output before the outer reload. */
1121 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1122 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1123 dont_remove_subreg = 1;
1126 /* Similarly for paradoxical and problematical SUBREGs on the output.
1127 Note that there is no reason we need worry about the previous value
1128 of SUBREG_REG (out); even if wider than out,
1129 storing in a subreg is entitled to clobber it all
1130 (except in the case of STRICT_LOW_PART,
1131 and in that case the constraint should label it input-output.) */
1132 if (out != 0 && GET_CODE (out) == SUBREG
1133 && (subreg_lowpart_p (out) || strict_low)
1134 #ifdef CANNOT_CHANGE_MODE_CLASS
1135 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1136 #endif
1137 && (CONSTANT_P (SUBREG_REG (out))
1138 || strict_low
1139 || (((GET_CODE (SUBREG_REG (out)) == REG
1140 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1141 || GET_CODE (SUBREG_REG (out)) == MEM)
1142 && ((GET_MODE_SIZE (outmode)
1143 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1144 #ifdef WORD_REGISTER_OPERATIONS
1145 || ((GET_MODE_SIZE (outmode)
1146 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1147 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1148 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1149 / UNITS_PER_WORD)))
1150 #endif
1152 || (GET_CODE (SUBREG_REG (out)) == REG
1153 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1154 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1155 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1156 > UNITS_PER_WORD)
1157 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1158 / UNITS_PER_WORD)
1159 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1160 GET_MODE (SUBREG_REG (out)))))
1161 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1162 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1163 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1164 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1165 GET_MODE (SUBREG_REG (out)),
1166 SUBREG_REG (out))
1167 == NO_REGS))
1168 #endif
1169 #ifdef CANNOT_CHANGE_MODE_CLASS
1170 || (GET_CODE (SUBREG_REG (out)) == REG
1171 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1172 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1173 GET_MODE (SUBREG_REG (out)),
1174 outmode))
1175 #endif
1178 out_subreg_loc = outloc;
1179 outloc = &SUBREG_REG (out);
1180 out = *outloc;
1181 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1182 if (GET_CODE (out) == MEM
1183 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1184 abort ();
1185 #endif
1186 outmode = GET_MODE (out);
1189 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1190 either M1 is not valid for R or M2 is wider than a word but we only
1191 need one word to store an M2-sized quantity in R.
1193 However, we must reload the inner reg *as well as* the subreg in
1194 that case. In this case, the inner reg is an in-out reload. */
1196 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1198 /* This relies on the fact that emit_reload_insns outputs the
1199 instructions for output reloads of type RELOAD_OTHER in reverse
1200 order of the reloads. Thus if the outer reload is also of type
1201 RELOAD_OTHER, we are guaranteed that this inner reload will be
1202 output after the outer reload. */
1203 dont_remove_subreg = 1;
1204 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1205 &SUBREG_REG (out),
1206 find_valid_class (outmode,
1207 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1208 GET_MODE (SUBREG_REG (out)),
1209 SUBREG_BYTE (out),
1210 GET_MODE (out)),
1211 REGNO (SUBREG_REG (out))),
1212 VOIDmode, VOIDmode, 0, 0,
1213 opnum, RELOAD_OTHER);
1216 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1217 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1218 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1219 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1220 dont_share = 1;
1222 /* If IN is a SUBREG of a hard register, make a new REG. This
1223 simplifies some of the cases below. */
1225 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1226 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1227 && ! dont_remove_subreg)
1228 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1230 /* Similarly for OUT. */
1231 if (out != 0 && GET_CODE (out) == SUBREG
1232 && GET_CODE (SUBREG_REG (out)) == REG
1233 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1234 && ! dont_remove_subreg)
1235 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1237 /* Narrow down the class of register wanted if that is
1238 desirable on this machine for efficiency. */
1239 if (in != 0)
1240 class = PREFERRED_RELOAD_CLASS (in, class);
1242 /* Output reloads may need analogous treatment, different in detail. */
1243 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1244 if (out != 0)
1245 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1246 #endif
1248 /* Make sure we use a class that can handle the actual pseudo
1249 inside any subreg. For example, on the 386, QImode regs
1250 can appear within SImode subregs. Although GENERAL_REGS
1251 can handle SImode, QImode needs a smaller class. */
1252 #ifdef LIMIT_RELOAD_CLASS
1253 if (in_subreg_loc)
1254 class = LIMIT_RELOAD_CLASS (inmode, class);
1255 else if (in != 0 && GET_CODE (in) == SUBREG)
1256 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1258 if (out_subreg_loc)
1259 class = LIMIT_RELOAD_CLASS (outmode, class);
1260 if (out != 0 && GET_CODE (out) == SUBREG)
1261 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1262 #endif
1264 /* Verify that this class is at least possible for the mode that
1265 is specified. */
1266 if (this_insn_is_asm)
1268 enum machine_mode mode;
1269 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1270 mode = inmode;
1271 else
1272 mode = outmode;
1273 if (mode == VOIDmode)
1275 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1276 mode = word_mode;
1277 if (in != 0)
1278 inmode = word_mode;
1279 if (out != 0)
1280 outmode = word_mode;
1282 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1283 if (HARD_REGNO_MODE_OK (i, mode)
1284 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1286 int nregs = HARD_REGNO_NREGS (i, mode);
1288 int j;
1289 for (j = 1; j < nregs; j++)
1290 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1291 break;
1292 if (j == nregs)
1293 break;
1295 if (i == FIRST_PSEUDO_REGISTER)
1297 error_for_asm (this_insn, "impossible register constraint in `asm'");
1298 class = ALL_REGS;
1302 /* Optional output reloads are always OK even if we have no register class,
1303 since the function of these reloads is only to have spill_reg_store etc.
1304 set, so that the storing insn can be deleted later. */
1305 if (class == NO_REGS
1306 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1307 abort ();
1309 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1311 if (i == n_reloads)
1313 /* See if we need a secondary reload register to move between CLASS
1314 and IN or CLASS and OUT. Get the icode and push any required reloads
1315 needed for each of them if so. */
1317 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1318 if (in != 0)
1319 secondary_in_reload
1320 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1321 &secondary_in_icode);
1322 #endif
1324 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1325 if (out != 0 && GET_CODE (out) != SCRATCH)
1326 secondary_out_reload
1327 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1328 type, &secondary_out_icode);
1329 #endif
1331 /* We found no existing reload suitable for re-use.
1332 So add an additional reload. */
1334 #ifdef SECONDARY_MEMORY_NEEDED
1335 /* If a memory location is needed for the copy, make one. */
1336 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1337 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1338 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1339 class, inmode))
1340 get_secondary_mem (in, inmode, opnum, type);
1341 #endif
1343 i = n_reloads;
1344 rld[i].in = in;
1345 rld[i].out = out;
1346 rld[i].class = class;
1347 rld[i].inmode = inmode;
1348 rld[i].outmode = outmode;
1349 rld[i].reg_rtx = 0;
1350 rld[i].optional = optional;
1351 rld[i].inc = 0;
1352 rld[i].nocombine = 0;
1353 rld[i].in_reg = inloc ? *inloc : 0;
1354 rld[i].out_reg = outloc ? *outloc : 0;
1355 rld[i].opnum = opnum;
1356 rld[i].when_needed = type;
1357 rld[i].secondary_in_reload = secondary_in_reload;
1358 rld[i].secondary_out_reload = secondary_out_reload;
1359 rld[i].secondary_in_icode = secondary_in_icode;
1360 rld[i].secondary_out_icode = secondary_out_icode;
1361 rld[i].secondary_p = 0;
1363 n_reloads++;
1365 #ifdef SECONDARY_MEMORY_NEEDED
1366 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1367 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1368 && SECONDARY_MEMORY_NEEDED (class,
1369 REGNO_REG_CLASS (reg_or_subregno (out)),
1370 outmode))
1371 get_secondary_mem (out, outmode, opnum, type);
1372 #endif
1374 else
1376 /* We are reusing an existing reload,
1377 but we may have additional information for it.
1378 For example, we may now have both IN and OUT
1379 while the old one may have just one of them. */
1381 /* The modes can be different. If they are, we want to reload in
1382 the larger mode, so that the value is valid for both modes. */
1383 if (inmode != VOIDmode
1384 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1385 rld[i].inmode = inmode;
1386 if (outmode != VOIDmode
1387 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1388 rld[i].outmode = outmode;
1389 if (in != 0)
1391 rtx in_reg = inloc ? *inloc : 0;
1392 /* If we merge reloads for two distinct rtl expressions that
1393 are identical in content, there might be duplicate address
1394 reloads. Remove the extra set now, so that if we later find
1395 that we can inherit this reload, we can get rid of the
1396 address reloads altogether.
1398 Do not do this if both reloads are optional since the result
1399 would be an optional reload which could potentially leave
1400 unresolved address replacements.
1402 It is not sufficient to call transfer_replacements since
1403 choose_reload_regs will remove the replacements for address
1404 reloads of inherited reloads which results in the same
1405 problem. */
1406 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1407 && ! (rld[i].optional && optional))
1409 /* We must keep the address reload with the lower operand
1410 number alive. */
1411 if (opnum > rld[i].opnum)
1413 remove_address_replacements (in);
1414 in = rld[i].in;
1415 in_reg = rld[i].in_reg;
1417 else
1418 remove_address_replacements (rld[i].in);
1420 rld[i].in = in;
1421 rld[i].in_reg = in_reg;
1423 if (out != 0)
1425 rld[i].out = out;
1426 rld[i].out_reg = outloc ? *outloc : 0;
1428 if (reg_class_subset_p (class, rld[i].class))
1429 rld[i].class = class;
1430 rld[i].optional &= optional;
1431 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1432 opnum, rld[i].opnum))
1433 rld[i].when_needed = RELOAD_OTHER;
1434 rld[i].opnum = MIN (rld[i].opnum, opnum);
1437 /* If the ostensible rtx being reloaded differs from the rtx found
1438 in the location to substitute, this reload is not safe to combine
1439 because we cannot reliably tell whether it appears in the insn. */
1441 if (in != 0 && in != *inloc)
1442 rld[i].nocombine = 1;
1444 #if 0
1445 /* This was replaced by changes in find_reloads_address_1 and the new
1446 function inc_for_reload, which go with a new meaning of reload_inc. */
1448 /* If this is an IN/OUT reload in an insn that sets the CC,
1449 it must be for an autoincrement. It doesn't work to store
1450 the incremented value after the insn because that would clobber the CC.
1451 So we must do the increment of the value reloaded from,
1452 increment it, store it back, then decrement again. */
1453 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1455 out = 0;
1456 rld[i].out = 0;
1457 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1458 /* If we did not find a nonzero amount-to-increment-by,
1459 that contradicts the belief that IN is being incremented
1460 in an address in this insn. */
1461 if (rld[i].inc == 0)
1462 abort ();
1464 #endif
1466 /* If we will replace IN and OUT with the reload-reg,
1467 record where they are located so that substitution need
1468 not do a tree walk. */
1470 if (replace_reloads)
1472 if (inloc != 0)
1474 struct replacement *r = &replacements[n_replacements++];
1475 r->what = i;
1476 r->subreg_loc = in_subreg_loc;
1477 r->where = inloc;
1478 r->mode = inmode;
1480 if (outloc != 0 && outloc != inloc)
1482 struct replacement *r = &replacements[n_replacements++];
1483 r->what = i;
1484 r->where = outloc;
1485 r->subreg_loc = out_subreg_loc;
1486 r->mode = outmode;
1490 /* If this reload is just being introduced and it has both
1491 an incoming quantity and an outgoing quantity that are
1492 supposed to be made to match, see if either one of the two
1493 can serve as the place to reload into.
1495 If one of them is acceptable, set rld[i].reg_rtx
1496 to that one. */
1498 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1500 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1501 inmode, outmode,
1502 rld[i].class, i,
1503 earlyclobber_operand_p (out));
1505 /* If the outgoing register already contains the same value
1506 as the incoming one, we can dispense with loading it.
1507 The easiest way to tell the caller that is to give a phony
1508 value for the incoming operand (same as outgoing one). */
1509 if (rld[i].reg_rtx == out
1510 && (GET_CODE (in) == REG || CONSTANT_P (in))
1511 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1512 static_reload_reg_p, i, inmode))
1513 rld[i].in = out;
1516 /* If this is an input reload and the operand contains a register that
1517 dies in this insn and is used nowhere else, see if it is the right class
1518 to be used for this reload. Use it if so. (This occurs most commonly
1519 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1520 this if it is also an output reload that mentions the register unless
1521 the output is a SUBREG that clobbers an entire register.
1523 Note that the operand might be one of the spill regs, if it is a
1524 pseudo reg and we are in a block where spilling has not taken place.
1525 But if there is no spilling in this block, that is OK.
1526 An explicitly used hard reg cannot be a spill reg. */
1528 if (rld[i].reg_rtx == 0 && in != 0)
1530 rtx note;
1531 int regno;
1532 enum machine_mode rel_mode = inmode;
1534 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1535 rel_mode = outmode;
1537 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1538 if (REG_NOTE_KIND (note) == REG_DEAD
1539 && GET_CODE (XEXP (note, 0)) == REG
1540 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1541 && reg_mentioned_p (XEXP (note, 0), in)
1542 && ! refers_to_regno_for_reload_p (regno,
1543 (regno
1544 + HARD_REGNO_NREGS (regno,
1545 rel_mode)),
1546 PATTERN (this_insn), inloc)
1547 /* If this is also an output reload, IN cannot be used as
1548 the reload register if it is set in this insn unless IN
1549 is also OUT. */
1550 && (out == 0 || in == out
1551 || ! hard_reg_set_here_p (regno,
1552 (regno
1553 + HARD_REGNO_NREGS (regno,
1554 rel_mode)),
1555 PATTERN (this_insn)))
1556 /* ??? Why is this code so different from the previous?
1557 Is there any simple coherent way to describe the two together?
1558 What's going on here. */
1559 && (in != out
1560 || (GET_CODE (in) == SUBREG
1561 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1562 / UNITS_PER_WORD)
1563 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1564 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1565 /* Make sure the operand fits in the reg that dies. */
1566 && (GET_MODE_SIZE (rel_mode)
1567 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1568 && HARD_REGNO_MODE_OK (regno, inmode)
1569 && HARD_REGNO_MODE_OK (regno, outmode))
1571 unsigned int offs;
1572 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1573 HARD_REGNO_NREGS (regno, outmode));
1575 for (offs = 0; offs < nregs; offs++)
1576 if (fixed_regs[regno + offs]
1577 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1578 regno + offs))
1579 break;
1581 if (offs == nregs
1582 && (! (refers_to_regno_for_reload_p
1583 (regno, (regno + HARD_REGNO_NREGS (regno, inmode)),
1584 in, (rtx *)0))
1585 || can_reload_into (in, regno, inmode)))
1587 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1588 break;
1593 if (out)
1594 output_reloadnum = i;
1596 return i;
1599 /* Record an additional place we must replace a value
1600 for which we have already recorded a reload.
1601 RELOADNUM is the value returned by push_reload
1602 when the reload was recorded.
1603 This is used in insn patterns that use match_dup. */
1605 static void
1606 push_replacement (loc, reloadnum, mode)
1607 rtx *loc;
1608 int reloadnum;
1609 enum machine_mode mode;
1611 if (replace_reloads)
1613 struct replacement *r = &replacements[n_replacements++];
1614 r->what = reloadnum;
1615 r->where = loc;
1616 r->subreg_loc = 0;
1617 r->mode = mode;
1621 /* Duplicate any replacement we have recorded to apply at
1622 location ORIG_LOC to also be performed at DUP_LOC.
1623 This is used in insn patterns that use match_dup. */
1625 static void
1626 dup_replacements (dup_loc, orig_loc)
1627 rtx *dup_loc;
1628 rtx *orig_loc;
1630 int i, n = n_replacements;
1632 for (i = 0; i < n; i++)
1634 struct replacement *r = &replacements[i];
1635 if (r->where == orig_loc)
1636 push_replacement (dup_loc, r->what, r->mode);
1640 /* Transfer all replacements that used to be in reload FROM to be in
1641 reload TO. */
1643 void
1644 transfer_replacements (to, from)
1645 int to, from;
1647 int i;
1649 for (i = 0; i < n_replacements; i++)
1650 if (replacements[i].what == from)
1651 replacements[i].what = to;
1654 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1655 or a subpart of it. If we have any replacements registered for IN_RTX,
1656 cancel the reloads that were supposed to load them.
1657 Return nonzero if we canceled any reloads. */
1659 remove_address_replacements (in_rtx)
1660 rtx in_rtx;
1662 int i, j;
1663 char reload_flags[MAX_RELOADS];
1664 int something_changed = 0;
1666 memset (reload_flags, 0, sizeof reload_flags);
1667 for (i = 0, j = 0; i < n_replacements; i++)
1669 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1670 reload_flags[replacements[i].what] |= 1;
1671 else
1673 replacements[j++] = replacements[i];
1674 reload_flags[replacements[i].what] |= 2;
1677 /* Note that the following store must be done before the recursive calls. */
1678 n_replacements = j;
1680 for (i = n_reloads - 1; i >= 0; i--)
1682 if (reload_flags[i] == 1)
1684 deallocate_reload_reg (i);
1685 remove_address_replacements (rld[i].in);
1686 rld[i].in = 0;
1687 something_changed = 1;
1690 return something_changed;
1693 /* If there is only one output reload, and it is not for an earlyclobber
1694 operand, try to combine it with a (logically unrelated) input reload
1695 to reduce the number of reload registers needed.
1697 This is safe if the input reload does not appear in
1698 the value being output-reloaded, because this implies
1699 it is not needed any more once the original insn completes.
1701 If that doesn't work, see we can use any of the registers that
1702 die in this insn as a reload register. We can if it is of the right
1703 class and does not appear in the value being output-reloaded. */
1705 static void
1706 combine_reloads ()
1708 int i;
1709 int output_reload = -1;
1710 int secondary_out = -1;
1711 rtx note;
1713 /* Find the output reload; return unless there is exactly one
1714 and that one is mandatory. */
1716 for (i = 0; i < n_reloads; i++)
1717 if (rld[i].out != 0)
1719 if (output_reload >= 0)
1720 return;
1721 output_reload = i;
1724 if (output_reload < 0 || rld[output_reload].optional)
1725 return;
1727 /* An input-output reload isn't combinable. */
1729 if (rld[output_reload].in != 0)
1730 return;
1732 /* If this reload is for an earlyclobber operand, we can't do anything. */
1733 if (earlyclobber_operand_p (rld[output_reload].out))
1734 return;
1736 /* If there is a reload for part of the address of this operand, we would
1737 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1738 its life to the point where doing this combine would not lower the
1739 number of spill registers needed. */
1740 for (i = 0; i < n_reloads; i++)
1741 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1742 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1743 && rld[i].opnum == rld[output_reload].opnum)
1744 return;
1746 /* Check each input reload; can we combine it? */
1748 for (i = 0; i < n_reloads; i++)
1749 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1750 /* Life span of this reload must not extend past main insn. */
1751 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1752 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1753 && rld[i].when_needed != RELOAD_OTHER
1754 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1755 == CLASS_MAX_NREGS (rld[output_reload].class,
1756 rld[output_reload].outmode))
1757 && rld[i].inc == 0
1758 && rld[i].reg_rtx == 0
1759 #ifdef SECONDARY_MEMORY_NEEDED
1760 /* Don't combine two reloads with different secondary
1761 memory locations. */
1762 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1763 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1764 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1765 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1766 #endif
1767 && (SMALL_REGISTER_CLASSES
1768 ? (rld[i].class == rld[output_reload].class)
1769 : (reg_class_subset_p (rld[i].class,
1770 rld[output_reload].class)
1771 || reg_class_subset_p (rld[output_reload].class,
1772 rld[i].class)))
1773 && (MATCHES (rld[i].in, rld[output_reload].out)
1774 /* Args reversed because the first arg seems to be
1775 the one that we imagine being modified
1776 while the second is the one that might be affected. */
1777 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1778 rld[i].in)
1779 /* However, if the input is a register that appears inside
1780 the output, then we also can't share.
1781 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1782 If the same reload reg is used for both reg 69 and the
1783 result to be stored in memory, then that result
1784 will clobber the address of the memory ref. */
1785 && ! (GET_CODE (rld[i].in) == REG
1786 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1787 rld[output_reload].out))))
1788 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1789 rld[i].when_needed != RELOAD_FOR_INPUT)
1790 && (reg_class_size[(int) rld[i].class]
1791 || SMALL_REGISTER_CLASSES)
1792 /* We will allow making things slightly worse by combining an
1793 input and an output, but no worse than that. */
1794 && (rld[i].when_needed == RELOAD_FOR_INPUT
1795 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1797 int j;
1799 /* We have found a reload to combine with! */
1800 rld[i].out = rld[output_reload].out;
1801 rld[i].out_reg = rld[output_reload].out_reg;
1802 rld[i].outmode = rld[output_reload].outmode;
1803 /* Mark the old output reload as inoperative. */
1804 rld[output_reload].out = 0;
1805 /* The combined reload is needed for the entire insn. */
1806 rld[i].when_needed = RELOAD_OTHER;
1807 /* If the output reload had a secondary reload, copy it. */
1808 if (rld[output_reload].secondary_out_reload != -1)
1810 rld[i].secondary_out_reload
1811 = rld[output_reload].secondary_out_reload;
1812 rld[i].secondary_out_icode
1813 = rld[output_reload].secondary_out_icode;
1816 #ifdef SECONDARY_MEMORY_NEEDED
1817 /* Copy any secondary MEM. */
1818 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1819 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1820 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1821 #endif
1822 /* If required, minimize the register class. */
1823 if (reg_class_subset_p (rld[output_reload].class,
1824 rld[i].class))
1825 rld[i].class = rld[output_reload].class;
1827 /* Transfer all replacements from the old reload to the combined. */
1828 for (j = 0; j < n_replacements; j++)
1829 if (replacements[j].what == output_reload)
1830 replacements[j].what = i;
1832 return;
1835 /* If this insn has only one operand that is modified or written (assumed
1836 to be the first), it must be the one corresponding to this reload. It
1837 is safe to use anything that dies in this insn for that output provided
1838 that it does not occur in the output (we already know it isn't an
1839 earlyclobber. If this is an asm insn, give up. */
1841 if (INSN_CODE (this_insn) == -1)
1842 return;
1844 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1845 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1846 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1847 return;
1849 /* See if some hard register that dies in this insn and is not used in
1850 the output is the right class. Only works if the register we pick
1851 up can fully hold our output reload. */
1852 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1853 if (REG_NOTE_KIND (note) == REG_DEAD
1854 && GET_CODE (XEXP (note, 0)) == REG
1855 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1856 rld[output_reload].out)
1857 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1858 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1859 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1860 REGNO (XEXP (note, 0)))
1861 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1862 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1863 /* Ensure that a secondary or tertiary reload for this output
1864 won't want this register. */
1865 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1866 || (! (TEST_HARD_REG_BIT
1867 (reg_class_contents[(int) rld[secondary_out].class],
1868 REGNO (XEXP (note, 0))))
1869 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1870 || ! (TEST_HARD_REG_BIT
1871 (reg_class_contents[(int) rld[secondary_out].class],
1872 REGNO (XEXP (note, 0)))))))
1873 && ! fixed_regs[REGNO (XEXP (note, 0))])
1875 rld[output_reload].reg_rtx
1876 = gen_rtx_REG (rld[output_reload].outmode,
1877 REGNO (XEXP (note, 0)));
1878 return;
1882 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1883 See if one of IN and OUT is a register that may be used;
1884 this is desirable since a spill-register won't be needed.
1885 If so, return the register rtx that proves acceptable.
1887 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1888 CLASS is the register class required for the reload.
1890 If FOR_REAL is >= 0, it is the number of the reload,
1891 and in some cases when it can be discovered that OUT doesn't need
1892 to be computed, clear out rld[FOR_REAL].out.
1894 If FOR_REAL is -1, this should not be done, because this call
1895 is just to see if a register can be found, not to find and install it.
1897 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1898 puts an additional constraint on being able to use IN for OUT since
1899 IN must not appear elsewhere in the insn (it is assumed that IN itself
1900 is safe from the earlyclobber). */
1902 static rtx
1903 find_dummy_reload (real_in, real_out, inloc, outloc,
1904 inmode, outmode, class, for_real, earlyclobber)
1905 rtx real_in, real_out;
1906 rtx *inloc, *outloc;
1907 enum machine_mode inmode, outmode;
1908 enum reg_class class;
1909 int for_real;
1910 int earlyclobber;
1912 rtx in = real_in;
1913 rtx out = real_out;
1914 int in_offset = 0;
1915 int out_offset = 0;
1916 rtx value = 0;
1918 /* If operands exceed a word, we can't use either of them
1919 unless they have the same size. */
1920 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1921 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1922 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1923 return 0;
1925 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1926 respectively refers to a hard register. */
1928 /* Find the inside of any subregs. */
1929 while (GET_CODE (out) == SUBREG)
1931 if (GET_CODE (SUBREG_REG (out)) == REG
1932 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1933 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1934 GET_MODE (SUBREG_REG (out)),
1935 SUBREG_BYTE (out),
1936 GET_MODE (out));
1937 out = SUBREG_REG (out);
1939 while (GET_CODE (in) == SUBREG)
1941 if (GET_CODE (SUBREG_REG (in)) == REG
1942 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1943 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1944 GET_MODE (SUBREG_REG (in)),
1945 SUBREG_BYTE (in),
1946 GET_MODE (in));
1947 in = SUBREG_REG (in);
1950 /* Narrow down the reg class, the same way push_reload will;
1951 otherwise we might find a dummy now, but push_reload won't. */
1952 class = PREFERRED_RELOAD_CLASS (in, class);
1954 /* See if OUT will do. */
1955 if (GET_CODE (out) == REG
1956 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1958 unsigned int regno = REGNO (out) + out_offset;
1959 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1960 rtx saved_rtx;
1962 /* When we consider whether the insn uses OUT,
1963 ignore references within IN. They don't prevent us
1964 from copying IN into OUT, because those refs would
1965 move into the insn that reloads IN.
1967 However, we only ignore IN in its role as this reload.
1968 If the insn uses IN elsewhere and it contains OUT,
1969 that counts. We can't be sure it's the "same" operand
1970 so it might not go through this reload. */
1971 saved_rtx = *inloc;
1972 *inloc = const0_rtx;
1974 if (regno < FIRST_PSEUDO_REGISTER
1975 && HARD_REGNO_MODE_OK (regno, outmode)
1976 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1977 PATTERN (this_insn), outloc))
1979 unsigned int i;
1981 for (i = 0; i < nwords; i++)
1982 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1983 regno + i))
1984 break;
1986 if (i == nwords)
1988 if (GET_CODE (real_out) == REG)
1989 value = real_out;
1990 else
1991 value = gen_rtx_REG (outmode, regno);
1995 *inloc = saved_rtx;
1998 /* Consider using IN if OUT was not acceptable
1999 or if OUT dies in this insn (like the quotient in a divmod insn).
2000 We can't use IN unless it is dies in this insn,
2001 which means we must know accurately which hard regs are live.
2002 Also, the result can't go in IN if IN is used within OUT,
2003 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2004 if (hard_regs_live_known
2005 && GET_CODE (in) == REG
2006 && REGNO (in) < FIRST_PSEUDO_REGISTER
2007 && (value == 0
2008 || find_reg_note (this_insn, REG_UNUSED, real_out))
2009 && find_reg_note (this_insn, REG_DEAD, real_in)
2010 && !fixed_regs[REGNO (in)]
2011 && HARD_REGNO_MODE_OK (REGNO (in),
2012 /* The only case where out and real_out might
2013 have different modes is where real_out
2014 is a subreg, and in that case, out
2015 has a real mode. */
2016 (GET_MODE (out) != VOIDmode
2017 ? GET_MODE (out) : outmode)))
2019 unsigned int regno = REGNO (in) + in_offset;
2020 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
2022 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2023 && ! hard_reg_set_here_p (regno, regno + nwords,
2024 PATTERN (this_insn))
2025 && (! earlyclobber
2026 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2027 PATTERN (this_insn), inloc)))
2029 unsigned int i;
2031 for (i = 0; i < nwords; i++)
2032 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2033 regno + i))
2034 break;
2036 if (i == nwords)
2038 /* If we were going to use OUT as the reload reg
2039 and changed our mind, it means OUT is a dummy that
2040 dies here. So don't bother copying value to it. */
2041 if (for_real >= 0 && value == real_out)
2042 rld[for_real].out = 0;
2043 if (GET_CODE (real_in) == REG)
2044 value = real_in;
2045 else
2046 value = gen_rtx_REG (inmode, regno);
2051 return value;
2054 /* This page contains subroutines used mainly for determining
2055 whether the IN or an OUT of a reload can serve as the
2056 reload register. */
2058 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2061 earlyclobber_operand_p (x)
2062 rtx x;
2064 int i;
2066 for (i = 0; i < n_earlyclobbers; i++)
2067 if (reload_earlyclobbers[i] == x)
2068 return 1;
2070 return 0;
2073 /* Return 1 if expression X alters a hard reg in the range
2074 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2075 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2076 X should be the body of an instruction. */
2078 static int
2079 hard_reg_set_here_p (beg_regno, end_regno, x)
2080 unsigned int beg_regno, end_regno;
2081 rtx x;
2083 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2085 rtx op0 = SET_DEST (x);
2087 while (GET_CODE (op0) == SUBREG)
2088 op0 = SUBREG_REG (op0);
2089 if (GET_CODE (op0) == REG)
2091 unsigned int r = REGNO (op0);
2093 /* See if this reg overlaps range under consideration. */
2094 if (r < end_regno
2095 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2096 return 1;
2099 else if (GET_CODE (x) == PARALLEL)
2101 int i = XVECLEN (x, 0) - 1;
2103 for (; i >= 0; i--)
2104 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2105 return 1;
2108 return 0;
2111 /* Return 1 if ADDR is a valid memory address for mode MODE,
2112 and check that each pseudo reg has the proper kind of
2113 hard reg. */
2116 strict_memory_address_p (mode, addr)
2117 enum machine_mode mode ATTRIBUTE_UNUSED;
2118 rtx addr;
2120 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2121 return 0;
2123 win:
2124 return 1;
2127 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2128 if they are the same hard reg, and has special hacks for
2129 autoincrement and autodecrement.
2130 This is specifically intended for find_reloads to use
2131 in determining whether two operands match.
2132 X is the operand whose number is the lower of the two.
2134 The value is 2 if Y contains a pre-increment that matches
2135 a non-incrementing address in X. */
2137 /* ??? To be completely correct, we should arrange to pass
2138 for X the output operand and for Y the input operand.
2139 For now, we assume that the output operand has the lower number
2140 because that is natural in (SET output (... input ...)). */
2143 operands_match_p (x, y)
2144 rtx x, y;
2146 int i;
2147 RTX_CODE code = GET_CODE (x);
2148 const char *fmt;
2149 int success_2;
2151 if (x == y)
2152 return 1;
2153 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2154 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2155 && GET_CODE (SUBREG_REG (y)) == REG)))
2157 int j;
2159 if (code == SUBREG)
2161 i = REGNO (SUBREG_REG (x));
2162 if (i >= FIRST_PSEUDO_REGISTER)
2163 goto slow;
2164 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2165 GET_MODE (SUBREG_REG (x)),
2166 SUBREG_BYTE (x),
2167 GET_MODE (x));
2169 else
2170 i = REGNO (x);
2172 if (GET_CODE (y) == SUBREG)
2174 j = REGNO (SUBREG_REG (y));
2175 if (j >= FIRST_PSEUDO_REGISTER)
2176 goto slow;
2177 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2178 GET_MODE (SUBREG_REG (y)),
2179 SUBREG_BYTE (y),
2180 GET_MODE (y));
2182 else
2183 j = REGNO (y);
2185 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2186 multiple hard register group, so that for example (reg:DI 0) and
2187 (reg:SI 1) will be considered the same register. */
2188 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2189 && i < FIRST_PSEUDO_REGISTER)
2190 i += HARD_REGNO_NREGS (i, GET_MODE (x)) - 1;
2191 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2192 && j < FIRST_PSEUDO_REGISTER)
2193 j += HARD_REGNO_NREGS (j, GET_MODE (y)) - 1;
2195 return i == j;
2197 /* If two operands must match, because they are really a single
2198 operand of an assembler insn, then two postincrements are invalid
2199 because the assembler insn would increment only once.
2200 On the other hand, a postincrement matches ordinary indexing
2201 if the postincrement is the output operand. */
2202 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2203 return operands_match_p (XEXP (x, 0), y);
2204 /* Two preincrements are invalid
2205 because the assembler insn would increment only once.
2206 On the other hand, a preincrement matches ordinary indexing
2207 if the preincrement is the input operand.
2208 In this case, return 2, since some callers need to do special
2209 things when this happens. */
2210 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2211 || GET_CODE (y) == PRE_MODIFY)
2212 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2214 slow:
2216 /* Now we have disposed of all the cases
2217 in which different rtx codes can match. */
2218 if (code != GET_CODE (y))
2219 return 0;
2220 if (code == LABEL_REF)
2221 return XEXP (x, 0) == XEXP (y, 0);
2222 if (code == SYMBOL_REF)
2223 return XSTR (x, 0) == XSTR (y, 0);
2225 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2227 if (GET_MODE (x) != GET_MODE (y))
2228 return 0;
2230 /* Compare the elements. If any pair of corresponding elements
2231 fail to match, return 0 for the whole things. */
2233 success_2 = 0;
2234 fmt = GET_RTX_FORMAT (code);
2235 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2237 int val, j;
2238 switch (fmt[i])
2240 case 'w':
2241 if (XWINT (x, i) != XWINT (y, i))
2242 return 0;
2243 break;
2245 case 'i':
2246 if (XINT (x, i) != XINT (y, i))
2247 return 0;
2248 break;
2250 case 'e':
2251 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2252 if (val == 0)
2253 return 0;
2254 /* If any subexpression returns 2,
2255 we should return 2 if we are successful. */
2256 if (val == 2)
2257 success_2 = 1;
2258 break;
2260 case '0':
2261 break;
2263 case 'E':
2264 if (XVECLEN (x, i) != XVECLEN (y, i))
2265 return 0;
2266 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2268 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2269 if (val == 0)
2270 return 0;
2271 if (val == 2)
2272 success_2 = 1;
2274 break;
2276 /* It is believed that rtx's at this level will never
2277 contain anything but integers and other rtx's,
2278 except for within LABEL_REFs and SYMBOL_REFs. */
2279 default:
2280 abort ();
2283 return 1 + success_2;
2286 /* Describe the range of registers or memory referenced by X.
2287 If X is a register, set REG_FLAG and put the first register
2288 number into START and the last plus one into END.
2289 If X is a memory reference, put a base address into BASE
2290 and a range of integer offsets into START and END.
2291 If X is pushing on the stack, we can assume it causes no trouble,
2292 so we set the SAFE field. */
2294 static struct decomposition
2295 decompose (x)
2296 rtx x;
2298 struct decomposition val;
2299 int all_const = 0;
2301 val.reg_flag = 0;
2302 val.safe = 0;
2303 val.base = 0;
2304 if (GET_CODE (x) == MEM)
2306 rtx base = NULL_RTX, offset = 0;
2307 rtx addr = XEXP (x, 0);
2309 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2310 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2312 val.base = XEXP (addr, 0);
2313 val.start = -GET_MODE_SIZE (GET_MODE (x));
2314 val.end = GET_MODE_SIZE (GET_MODE (x));
2315 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2316 return val;
2319 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2321 if (GET_CODE (XEXP (addr, 1)) == PLUS
2322 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2323 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2325 val.base = XEXP (addr, 0);
2326 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2327 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2328 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2329 return val;
2333 if (GET_CODE (addr) == CONST)
2335 addr = XEXP (addr, 0);
2336 all_const = 1;
2338 if (GET_CODE (addr) == PLUS)
2340 if (CONSTANT_P (XEXP (addr, 0)))
2342 base = XEXP (addr, 1);
2343 offset = XEXP (addr, 0);
2345 else if (CONSTANT_P (XEXP (addr, 1)))
2347 base = XEXP (addr, 0);
2348 offset = XEXP (addr, 1);
2352 if (offset == 0)
2354 base = addr;
2355 offset = const0_rtx;
2357 if (GET_CODE (offset) == CONST)
2358 offset = XEXP (offset, 0);
2359 if (GET_CODE (offset) == PLUS)
2361 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2363 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2364 offset = XEXP (offset, 0);
2366 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2368 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2369 offset = XEXP (offset, 1);
2371 else
2373 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2374 offset = const0_rtx;
2377 else if (GET_CODE (offset) != CONST_INT)
2379 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2380 offset = const0_rtx;
2383 if (all_const && GET_CODE (base) == PLUS)
2384 base = gen_rtx_CONST (GET_MODE (base), base);
2386 if (GET_CODE (offset) != CONST_INT)
2387 abort ();
2389 val.start = INTVAL (offset);
2390 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2391 val.base = base;
2392 return val;
2394 else if (GET_CODE (x) == REG)
2396 val.reg_flag = 1;
2397 val.start = true_regnum (x);
2398 if (val.start < 0)
2400 /* A pseudo with no hard reg. */
2401 val.start = REGNO (x);
2402 val.end = val.start + 1;
2404 else
2405 /* A hard reg. */
2406 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2408 else if (GET_CODE (x) == SUBREG)
2410 if (GET_CODE (SUBREG_REG (x)) != REG)
2411 /* This could be more precise, but it's good enough. */
2412 return decompose (SUBREG_REG (x));
2413 val.reg_flag = 1;
2414 val.start = true_regnum (x);
2415 if (val.start < 0)
2416 return decompose (SUBREG_REG (x));
2417 else
2418 /* A hard reg. */
2419 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2421 else if (CONSTANT_P (x)
2422 /* This hasn't been assigned yet, so it can't conflict yet. */
2423 || GET_CODE (x) == SCRATCH)
2424 val.safe = 1;
2425 else
2426 abort ();
2427 return val;
2430 /* Return 1 if altering Y will not modify the value of X.
2431 Y is also described by YDATA, which should be decompose (Y). */
2433 static int
2434 immune_p (x, y, ydata)
2435 rtx x, y;
2436 struct decomposition ydata;
2438 struct decomposition xdata;
2440 if (ydata.reg_flag)
2441 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2442 if (ydata.safe)
2443 return 1;
2445 if (GET_CODE (y) != MEM)
2446 abort ();
2447 /* If Y is memory and X is not, Y can't affect X. */
2448 if (GET_CODE (x) != MEM)
2449 return 1;
2451 xdata = decompose (x);
2453 if (! rtx_equal_p (xdata.base, ydata.base))
2455 /* If bases are distinct symbolic constants, there is no overlap. */
2456 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2457 return 1;
2458 /* Constants and stack slots never overlap. */
2459 if (CONSTANT_P (xdata.base)
2460 && (ydata.base == frame_pointer_rtx
2461 || ydata.base == hard_frame_pointer_rtx
2462 || ydata.base == stack_pointer_rtx))
2463 return 1;
2464 if (CONSTANT_P (ydata.base)
2465 && (xdata.base == frame_pointer_rtx
2466 || xdata.base == hard_frame_pointer_rtx
2467 || xdata.base == stack_pointer_rtx))
2468 return 1;
2469 /* If either base is variable, we don't know anything. */
2470 return 0;
2473 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2476 /* Similar, but calls decompose. */
2479 safe_from_earlyclobber (op, clobber)
2480 rtx op, clobber;
2482 struct decomposition early_data;
2484 early_data = decompose (clobber);
2485 return immune_p (op, clobber, early_data);
2488 /* Main entry point of this file: search the body of INSN
2489 for values that need reloading and record them with push_reload.
2490 REPLACE nonzero means record also where the values occur
2491 so that subst_reloads can be used.
2493 IND_LEVELS says how many levels of indirection are supported by this
2494 machine; a value of zero means that a memory reference is not a valid
2495 memory address.
2497 LIVE_KNOWN says we have valid information about which hard
2498 regs are live at each point in the program; this is true when
2499 we are called from global_alloc but false when stupid register
2500 allocation has been done.
2502 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2503 which is nonnegative if the reg has been commandeered for reloading into.
2504 It is copied into STATIC_RELOAD_REG_P and referenced from there
2505 by various subroutines.
2507 Return TRUE if some operands need to be changed, because of swapping
2508 commutative operands, reg_equiv_address substitution, or whatever. */
2511 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2512 rtx insn;
2513 int replace, ind_levels;
2514 int live_known;
2515 short *reload_reg_p;
2517 int insn_code_number;
2518 int i, j;
2519 int noperands;
2520 /* These start out as the constraints for the insn
2521 and they are chewed up as we consider alternatives. */
2522 char *constraints[MAX_RECOG_OPERANDS];
2523 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2524 a register. */
2525 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2526 char pref_or_nothing[MAX_RECOG_OPERANDS];
2527 /* Nonzero for a MEM operand whose entire address needs a reload. */
2528 int address_reloaded[MAX_RECOG_OPERANDS];
2529 /* Nonzero for an address operand that needs to be completely reloaded. */
2530 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2531 /* Value of enum reload_type to use for operand. */
2532 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2533 /* Value of enum reload_type to use within address of operand. */
2534 enum reload_type address_type[MAX_RECOG_OPERANDS];
2535 /* Save the usage of each operand. */
2536 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2537 int no_input_reloads = 0, no_output_reloads = 0;
2538 int n_alternatives;
2539 int this_alternative[MAX_RECOG_OPERANDS];
2540 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2541 char this_alternative_win[MAX_RECOG_OPERANDS];
2542 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2543 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2544 int this_alternative_matches[MAX_RECOG_OPERANDS];
2545 int swapped;
2546 int goal_alternative[MAX_RECOG_OPERANDS];
2547 int this_alternative_number;
2548 int goal_alternative_number = 0;
2549 int operand_reloadnum[MAX_RECOG_OPERANDS];
2550 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2551 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2552 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2553 char goal_alternative_win[MAX_RECOG_OPERANDS];
2554 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2555 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2556 int goal_alternative_swapped;
2557 int best;
2558 int commutative;
2559 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2560 rtx substed_operand[MAX_RECOG_OPERANDS];
2561 rtx body = PATTERN (insn);
2562 rtx set = single_set (insn);
2563 int goal_earlyclobber = 0, this_earlyclobber;
2564 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2565 int retval = 0;
2567 this_insn = insn;
2568 n_reloads = 0;
2569 n_replacements = 0;
2570 n_earlyclobbers = 0;
2571 replace_reloads = replace;
2572 hard_regs_live_known = live_known;
2573 static_reload_reg_p = reload_reg_p;
2575 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2576 neither are insns that SET cc0. Insns that use CC0 are not allowed
2577 to have any input reloads. */
2578 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2579 no_output_reloads = 1;
2581 #ifdef HAVE_cc0
2582 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2583 no_input_reloads = 1;
2584 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2585 no_output_reloads = 1;
2586 #endif
2588 #ifdef SECONDARY_MEMORY_NEEDED
2589 /* The eliminated forms of any secondary memory locations are per-insn, so
2590 clear them out here. */
2592 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2593 #endif
2595 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2596 is cheap to move between them. If it is not, there may not be an insn
2597 to do the copy, so we may need a reload. */
2598 if (GET_CODE (body) == SET
2599 && GET_CODE (SET_DEST (body)) == REG
2600 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2601 && GET_CODE (SET_SRC (body)) == REG
2602 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2603 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2604 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2605 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2606 return 0;
2608 extract_insn (insn);
2610 noperands = reload_n_operands = recog_data.n_operands;
2611 n_alternatives = recog_data.n_alternatives;
2613 /* Just return "no reloads" if insn has no operands with constraints. */
2614 if (noperands == 0 || n_alternatives == 0)
2615 return 0;
2617 insn_code_number = INSN_CODE (insn);
2618 this_insn_is_asm = insn_code_number < 0;
2620 memcpy (operand_mode, recog_data.operand_mode,
2621 noperands * sizeof (enum machine_mode));
2622 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2624 commutative = -1;
2626 /* If we will need to know, later, whether some pair of operands
2627 are the same, we must compare them now and save the result.
2628 Reloading the base and index registers will clobber them
2629 and afterward they will fail to match. */
2631 for (i = 0; i < noperands; i++)
2633 char *p;
2634 int c;
2636 substed_operand[i] = recog_data.operand[i];
2637 p = constraints[i];
2639 modified[i] = RELOAD_READ;
2641 /* Scan this operand's constraint to see if it is an output operand,
2642 an in-out operand, is commutative, or should match another. */
2644 while ((c = *p))
2646 p += CONSTRAINT_LEN (c, p);
2647 if (c == '=')
2648 modified[i] = RELOAD_WRITE;
2649 else if (c == '+')
2650 modified[i] = RELOAD_READ_WRITE;
2651 else if (c == '%')
2653 /* The last operand should not be marked commutative. */
2654 if (i == noperands - 1)
2655 abort ();
2657 commutative = i;
2659 else if (ISDIGIT (c))
2661 c = strtoul (p - 1, &p, 10);
2663 operands_match[c][i]
2664 = operands_match_p (recog_data.operand[c],
2665 recog_data.operand[i]);
2667 /* An operand may not match itself. */
2668 if (c == i)
2669 abort ();
2671 /* If C can be commuted with C+1, and C might need to match I,
2672 then C+1 might also need to match I. */
2673 if (commutative >= 0)
2675 if (c == commutative || c == commutative + 1)
2677 int other = c + (c == commutative ? 1 : -1);
2678 operands_match[other][i]
2679 = operands_match_p (recog_data.operand[other],
2680 recog_data.operand[i]);
2682 if (i == commutative || i == commutative + 1)
2684 int other = i + (i == commutative ? 1 : -1);
2685 operands_match[c][other]
2686 = operands_match_p (recog_data.operand[c],
2687 recog_data.operand[other]);
2689 /* Note that C is supposed to be less than I.
2690 No need to consider altering both C and I because in
2691 that case we would alter one into the other. */
2697 /* Examine each operand that is a memory reference or memory address
2698 and reload parts of the addresses into index registers.
2699 Also here any references to pseudo regs that didn't get hard regs
2700 but are equivalent to constants get replaced in the insn itself
2701 with those constants. Nobody will ever see them again.
2703 Finally, set up the preferred classes of each operand. */
2705 for (i = 0; i < noperands; i++)
2707 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2709 address_reloaded[i] = 0;
2710 address_operand_reloaded[i] = 0;
2711 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2712 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2713 : RELOAD_OTHER);
2714 address_type[i]
2715 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2716 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2717 : RELOAD_OTHER);
2719 if (*constraints[i] == 0)
2720 /* Ignore things like match_operator operands. */
2722 else if (constraints[i][0] == 'p'
2723 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2725 address_operand_reloaded[i]
2726 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2727 recog_data.operand[i],
2728 recog_data.operand_loc[i],
2729 i, operand_type[i], ind_levels, insn);
2731 /* If we now have a simple operand where we used to have a
2732 PLUS or MULT, re-recognize and try again. */
2733 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2734 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2735 && (GET_CODE (recog_data.operand[i]) == MULT
2736 || GET_CODE (recog_data.operand[i]) == PLUS))
2738 INSN_CODE (insn) = -1;
2739 retval = find_reloads (insn, replace, ind_levels, live_known,
2740 reload_reg_p);
2741 return retval;
2744 recog_data.operand[i] = *recog_data.operand_loc[i];
2745 substed_operand[i] = recog_data.operand[i];
2747 /* Address operands are reloaded in their existing mode,
2748 no matter what is specified in the machine description. */
2749 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2751 else if (code == MEM)
2753 address_reloaded[i]
2754 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2755 recog_data.operand_loc[i],
2756 XEXP (recog_data.operand[i], 0),
2757 &XEXP (recog_data.operand[i], 0),
2758 i, address_type[i], ind_levels, insn);
2759 recog_data.operand[i] = *recog_data.operand_loc[i];
2760 substed_operand[i] = recog_data.operand[i];
2762 else if (code == SUBREG)
2764 rtx reg = SUBREG_REG (recog_data.operand[i]);
2765 rtx op
2766 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2767 ind_levels,
2768 set != 0
2769 && &SET_DEST (set) == recog_data.operand_loc[i],
2770 insn,
2771 &address_reloaded[i]);
2773 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2774 that didn't get a hard register, emit a USE with a REG_EQUAL
2775 note in front so that we might inherit a previous, possibly
2776 wider reload. */
2778 if (replace
2779 && GET_CODE (op) == MEM
2780 && GET_CODE (reg) == REG
2781 && (GET_MODE_SIZE (GET_MODE (reg))
2782 >= GET_MODE_SIZE (GET_MODE (op))))
2783 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2784 insn),
2785 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2787 substed_operand[i] = recog_data.operand[i] = op;
2789 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2790 /* We can get a PLUS as an "operand" as a result of register
2791 elimination. See eliminate_regs and gen_reload. We handle
2792 a unary operator by reloading the operand. */
2793 substed_operand[i] = recog_data.operand[i]
2794 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2795 ind_levels, 0, insn,
2796 &address_reloaded[i]);
2797 else if (code == REG)
2799 /* This is equivalent to calling find_reloads_toplev.
2800 The code is duplicated for speed.
2801 When we find a pseudo always equivalent to a constant,
2802 we replace it by the constant. We must be sure, however,
2803 that we don't try to replace it in the insn in which it
2804 is being set. */
2805 int regno = REGNO (recog_data.operand[i]);
2806 if (reg_equiv_constant[regno] != 0
2807 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2809 /* Record the existing mode so that the check if constants are
2810 allowed will work when operand_mode isn't specified. */
2812 if (operand_mode[i] == VOIDmode)
2813 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2815 substed_operand[i] = recog_data.operand[i]
2816 = reg_equiv_constant[regno];
2818 if (reg_equiv_memory_loc[regno] != 0
2819 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2820 /* We need not give a valid is_set_dest argument since the case
2821 of a constant equivalence was checked above. */
2822 substed_operand[i] = recog_data.operand[i]
2823 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2824 ind_levels, 0, insn,
2825 &address_reloaded[i]);
2827 /* If the operand is still a register (we didn't replace it with an
2828 equivalent), get the preferred class to reload it into. */
2829 code = GET_CODE (recog_data.operand[i]);
2830 preferred_class[i]
2831 = ((code == REG && REGNO (recog_data.operand[i])
2832 >= FIRST_PSEUDO_REGISTER)
2833 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2834 : NO_REGS);
2835 pref_or_nothing[i]
2836 = (code == REG
2837 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2838 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2841 /* If this is simply a copy from operand 1 to operand 0, merge the
2842 preferred classes for the operands. */
2843 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2844 && recog_data.operand[1] == SET_SRC (set))
2846 preferred_class[0] = preferred_class[1]
2847 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2848 pref_or_nothing[0] |= pref_or_nothing[1];
2849 pref_or_nothing[1] |= pref_or_nothing[0];
2852 /* Now see what we need for pseudo-regs that didn't get hard regs
2853 or got the wrong kind of hard reg. For this, we must consider
2854 all the operands together against the register constraints. */
2856 best = MAX_RECOG_OPERANDS * 2 + 600;
2858 swapped = 0;
2859 goal_alternative_swapped = 0;
2860 try_swapped:
2862 /* The constraints are made of several alternatives.
2863 Each operand's constraint looks like foo,bar,... with commas
2864 separating the alternatives. The first alternatives for all
2865 operands go together, the second alternatives go together, etc.
2867 First loop over alternatives. */
2869 for (this_alternative_number = 0;
2870 this_alternative_number < n_alternatives;
2871 this_alternative_number++)
2873 /* Loop over operands for one constraint alternative. */
2874 /* LOSERS counts those that don't fit this alternative
2875 and would require loading. */
2876 int losers = 0;
2877 /* BAD is set to 1 if it some operand can't fit this alternative
2878 even after reloading. */
2879 int bad = 0;
2880 /* REJECT is a count of how undesirable this alternative says it is
2881 if any reloading is required. If the alternative matches exactly
2882 then REJECT is ignored, but otherwise it gets this much
2883 counted against it in addition to the reloading needed. Each
2884 ? counts three times here since we want the disparaging caused by
2885 a bad register class to only count 1/3 as much. */
2886 int reject = 0;
2888 this_earlyclobber = 0;
2890 for (i = 0; i < noperands; i++)
2892 char *p = constraints[i];
2893 char *end;
2894 int len;
2895 int win = 0;
2896 int did_match = 0;
2897 /* 0 => this operand can be reloaded somehow for this alternative. */
2898 int badop = 1;
2899 /* 0 => this operand can be reloaded if the alternative allows regs. */
2900 int winreg = 0;
2901 int c;
2902 int m;
2903 rtx operand = recog_data.operand[i];
2904 int offset = 0;
2905 /* Nonzero means this is a MEM that must be reloaded into a reg
2906 regardless of what the constraint says. */
2907 int force_reload = 0;
2908 int offmemok = 0;
2909 /* Nonzero if a constant forced into memory would be OK for this
2910 operand. */
2911 int constmemok = 0;
2912 int earlyclobber = 0;
2914 /* If the predicate accepts a unary operator, it means that
2915 we need to reload the operand, but do not do this for
2916 match_operator and friends. */
2917 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2918 operand = XEXP (operand, 0);
2920 /* If the operand is a SUBREG, extract
2921 the REG or MEM (or maybe even a constant) within.
2922 (Constants can occur as a result of reg_equiv_constant.) */
2924 while (GET_CODE (operand) == SUBREG)
2926 /* Offset only matters when operand is a REG and
2927 it is a hard reg. This is because it is passed
2928 to reg_fits_class_p if it is a REG and all pseudos
2929 return 0 from that function. */
2930 if (GET_CODE (SUBREG_REG (operand)) == REG
2931 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2933 if (!subreg_offset_representable_p
2934 (REGNO (SUBREG_REG (operand)),
2935 GET_MODE (SUBREG_REG (operand)),
2936 SUBREG_BYTE (operand),
2937 GET_MODE (operand)))
2938 force_reload = 1;
2939 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2940 GET_MODE (SUBREG_REG (operand)),
2941 SUBREG_BYTE (operand),
2942 GET_MODE (operand));
2944 operand = SUBREG_REG (operand);
2945 /* Force reload if this is a constant or PLUS or if there may
2946 be a problem accessing OPERAND in the outer mode. */
2947 if (CONSTANT_P (operand)
2948 || GET_CODE (operand) == PLUS
2949 /* We must force a reload of paradoxical SUBREGs
2950 of a MEM because the alignment of the inner value
2951 may not be enough to do the outer reference. On
2952 big-endian machines, it may also reference outside
2953 the object.
2955 On machines that extend byte operations and we have a
2956 SUBREG where both the inner and outer modes are no wider
2957 than a word and the inner mode is narrower, is integral,
2958 and gets extended when loaded from memory, combine.c has
2959 made assumptions about the behavior of the machine in such
2960 register access. If the data is, in fact, in memory we
2961 must always load using the size assumed to be in the
2962 register and let the insn do the different-sized
2963 accesses.
2965 This is doubly true if WORD_REGISTER_OPERATIONS. In
2966 this case eliminate_regs has left non-paradoxical
2967 subregs for push_reload to see. Make sure it does
2968 by forcing the reload.
2970 ??? When is it right at this stage to have a subreg
2971 of a mem that is _not_ to be handled specially? IMO
2972 those should have been reduced to just a mem. */
2973 || ((GET_CODE (operand) == MEM
2974 || (GET_CODE (operand)== REG
2975 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2976 #ifndef WORD_REGISTER_OPERATIONS
2977 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2978 < BIGGEST_ALIGNMENT)
2979 && (GET_MODE_SIZE (operand_mode[i])
2980 > GET_MODE_SIZE (GET_MODE (operand))))
2981 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2982 #ifdef LOAD_EXTEND_OP
2983 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2984 && (GET_MODE_SIZE (GET_MODE (operand))
2985 <= UNITS_PER_WORD)
2986 && (GET_MODE_SIZE (operand_mode[i])
2987 > GET_MODE_SIZE (GET_MODE (operand)))
2988 && INTEGRAL_MODE_P (GET_MODE (operand))
2989 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2990 #endif
2992 #endif
2995 force_reload = 1;
2998 this_alternative[i] = (int) NO_REGS;
2999 this_alternative_win[i] = 0;
3000 this_alternative_match_win[i] = 0;
3001 this_alternative_offmemok[i] = 0;
3002 this_alternative_earlyclobber[i] = 0;
3003 this_alternative_matches[i] = -1;
3005 /* An empty constraint or empty alternative
3006 allows anything which matched the pattern. */
3007 if (*p == 0 || *p == ',')
3008 win = 1, badop = 0;
3010 /* Scan this alternative's specs for this operand;
3011 set WIN if the operand fits any letter in this alternative.
3012 Otherwise, clear BADOP if this operand could
3013 fit some letter after reloads,
3014 or set WINREG if this operand could fit after reloads
3015 provided the constraint allows some registers. */
3018 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3020 case '\0':
3021 len = 0;
3022 break;
3023 case ',':
3024 c = '\0';
3025 break;
3027 case '=': case '+': case '*':
3028 break;
3030 case '%':
3031 /* The last operand should not be marked commutative. */
3032 if (i != noperands - 1)
3033 commutative = i;
3034 break;
3036 case '?':
3037 reject += 6;
3038 break;
3040 case '!':
3041 reject = 600;
3042 break;
3044 case '#':
3045 /* Ignore rest of this alternative as far as
3046 reloading is concerned. */
3048 p++;
3049 while (*p && *p != ',');
3050 len = 0;
3051 break;
3053 case '0': case '1': case '2': case '3': case '4':
3054 case '5': case '6': case '7': case '8': case '9':
3055 m = strtoul (p, &end, 10);
3056 p = end;
3057 len = 0;
3059 this_alternative_matches[i] = m;
3060 /* We are supposed to match a previous operand.
3061 If we do, we win if that one did.
3062 If we do not, count both of the operands as losers.
3063 (This is too conservative, since most of the time
3064 only a single reload insn will be needed to make
3065 the two operands win. As a result, this alternative
3066 may be rejected when it is actually desirable.) */
3067 if ((swapped && (m != commutative || i != commutative + 1))
3068 /* If we are matching as if two operands were swapped,
3069 also pretend that operands_match had been computed
3070 with swapped.
3071 But if I is the second of those and C is the first,
3072 don't exchange them, because operands_match is valid
3073 only on one side of its diagonal. */
3074 ? (operands_match
3075 [(m == commutative || m == commutative + 1)
3076 ? 2 * commutative + 1 - m : m]
3077 [(i == commutative || i == commutative + 1)
3078 ? 2 * commutative + 1 - i : i])
3079 : operands_match[m][i])
3081 /* If we are matching a non-offsettable address where an
3082 offsettable address was expected, then we must reject
3083 this combination, because we can't reload it. */
3084 if (this_alternative_offmemok[m]
3085 && GET_CODE (recog_data.operand[m]) == MEM
3086 && this_alternative[m] == (int) NO_REGS
3087 && ! this_alternative_win[m])
3088 bad = 1;
3090 did_match = this_alternative_win[m];
3092 else
3094 /* Operands don't match. */
3095 rtx value;
3096 /* Retroactively mark the operand we had to match
3097 as a loser, if it wasn't already. */
3098 if (this_alternative_win[m])
3099 losers++;
3100 this_alternative_win[m] = 0;
3101 if (this_alternative[m] == (int) NO_REGS)
3102 bad = 1;
3103 /* But count the pair only once in the total badness of
3104 this alternative, if the pair can be a dummy reload. */
3105 value
3106 = find_dummy_reload (recog_data.operand[i],
3107 recog_data.operand[m],
3108 recog_data.operand_loc[i],
3109 recog_data.operand_loc[m],
3110 operand_mode[i], operand_mode[m],
3111 this_alternative[m], -1,
3112 this_alternative_earlyclobber[m]);
3114 if (value != 0)
3115 losers--;
3117 /* This can be fixed with reloads if the operand
3118 we are supposed to match can be fixed with reloads. */
3119 badop = 0;
3120 this_alternative[i] = this_alternative[m];
3122 /* If we have to reload this operand and some previous
3123 operand also had to match the same thing as this
3124 operand, we don't know how to do that. So reject this
3125 alternative. */
3126 if (! did_match || force_reload)
3127 for (j = 0; j < i; j++)
3128 if (this_alternative_matches[j]
3129 == this_alternative_matches[i])
3130 badop = 1;
3131 break;
3133 case 'p':
3134 /* All necessary reloads for an address_operand
3135 were handled in find_reloads_address. */
3136 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3137 win = 1;
3138 badop = 0;
3139 break;
3141 case 'm':
3142 if (force_reload)
3143 break;
3144 if (GET_CODE (operand) == MEM
3145 || (GET_CODE (operand) == REG
3146 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3147 && reg_renumber[REGNO (operand)] < 0))
3148 win = 1;
3149 if (CONSTANT_P (operand)
3150 /* force_const_mem does not accept HIGH. */
3151 && GET_CODE (operand) != HIGH)
3152 badop = 0;
3153 constmemok = 1;
3154 break;
3156 case '<':
3157 if (GET_CODE (operand) == MEM
3158 && ! address_reloaded[i]
3159 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3160 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3161 win = 1;
3162 break;
3164 case '>':
3165 if (GET_CODE (operand) == MEM
3166 && ! address_reloaded[i]
3167 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3168 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3169 win = 1;
3170 break;
3172 /* Memory operand whose address is not offsettable. */
3173 case 'V':
3174 if (force_reload)
3175 break;
3176 if (GET_CODE (operand) == MEM
3177 && ! (ind_levels ? offsettable_memref_p (operand)
3178 : offsettable_nonstrict_memref_p (operand))
3179 /* Certain mem addresses will become offsettable
3180 after they themselves are reloaded. This is important;
3181 we don't want our own handling of unoffsettables
3182 to override the handling of reg_equiv_address. */
3183 && !(GET_CODE (XEXP (operand, 0)) == REG
3184 && (ind_levels == 0
3185 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3186 win = 1;
3187 break;
3189 /* Memory operand whose address is offsettable. */
3190 case 'o':
3191 if (force_reload)
3192 break;
3193 if ((GET_CODE (operand) == MEM
3194 /* If IND_LEVELS, find_reloads_address won't reload a
3195 pseudo that didn't get a hard reg, so we have to
3196 reject that case. */
3197 && ((ind_levels ? offsettable_memref_p (operand)
3198 : offsettable_nonstrict_memref_p (operand))
3199 /* A reloaded address is offsettable because it is now
3200 just a simple register indirect. */
3201 || address_reloaded[i]))
3202 || (GET_CODE (operand) == REG
3203 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3204 && reg_renumber[REGNO (operand)] < 0
3205 /* If reg_equiv_address is nonzero, we will be
3206 loading it into a register; hence it will be
3207 offsettable, but we cannot say that reg_equiv_mem
3208 is offsettable without checking. */
3209 && ((reg_equiv_mem[REGNO (operand)] != 0
3210 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3211 || (reg_equiv_address[REGNO (operand)] != 0))))
3212 win = 1;
3213 /* force_const_mem does not accept HIGH. */
3214 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3215 || GET_CODE (operand) == MEM)
3216 badop = 0;
3217 constmemok = 1;
3218 offmemok = 1;
3219 break;
3221 case '&':
3222 /* Output operand that is stored before the need for the
3223 input operands (and their index registers) is over. */
3224 earlyclobber = 1, this_earlyclobber = 1;
3225 break;
3227 case 'E':
3228 case 'F':
3229 if (GET_CODE (operand) == CONST_DOUBLE
3230 || (GET_CODE (operand) == CONST_VECTOR
3231 && (GET_MODE_CLASS (GET_MODE (operand))
3232 == MODE_VECTOR_FLOAT)))
3233 win = 1;
3234 break;
3236 case 'G':
3237 case 'H':
3238 if (GET_CODE (operand) == CONST_DOUBLE
3239 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3240 win = 1;
3241 break;
3243 case 's':
3244 if (GET_CODE (operand) == CONST_INT
3245 || (GET_CODE (operand) == CONST_DOUBLE
3246 && GET_MODE (operand) == VOIDmode))
3247 break;
3248 case 'i':
3249 if (CONSTANT_P (operand)
3250 #ifdef LEGITIMATE_PIC_OPERAND_P
3251 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3252 #endif
3254 win = 1;
3255 break;
3257 case 'n':
3258 if (GET_CODE (operand) == CONST_INT
3259 || (GET_CODE (operand) == CONST_DOUBLE
3260 && GET_MODE (operand) == VOIDmode))
3261 win = 1;
3262 break;
3264 case 'I':
3265 case 'J':
3266 case 'K':
3267 case 'L':
3268 case 'M':
3269 case 'N':
3270 case 'O':
3271 case 'P':
3272 if (GET_CODE (operand) == CONST_INT
3273 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3274 win = 1;
3275 break;
3277 case 'X':
3278 win = 1;
3279 break;
3281 case 'g':
3282 if (! force_reload
3283 /* A PLUS is never a valid operand, but reload can make
3284 it from a register when eliminating registers. */
3285 && GET_CODE (operand) != PLUS
3286 /* A SCRATCH is not a valid operand. */
3287 && GET_CODE (operand) != SCRATCH
3288 #ifdef LEGITIMATE_PIC_OPERAND_P
3289 && (! CONSTANT_P (operand)
3290 || ! flag_pic
3291 || LEGITIMATE_PIC_OPERAND_P (operand))
3292 #endif
3293 && (GENERAL_REGS == ALL_REGS
3294 || GET_CODE (operand) != REG
3295 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3296 && reg_renumber[REGNO (operand)] < 0)))
3297 win = 1;
3298 /* Drop through into 'r' case. */
3300 case 'r':
3301 this_alternative[i]
3302 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3303 goto reg;
3305 default:
3306 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3308 #ifdef EXTRA_CONSTRAINT_STR
3309 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3311 if (force_reload)
3312 break;
3313 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3314 win = 1;
3315 /* If the address was already reloaded,
3316 we win as well. */
3317 if (GET_CODE (operand) == MEM && address_reloaded[i])
3318 win = 1;
3319 /* Likewise if the address will be reloaded because
3320 reg_equiv_address is nonzero. For reg_equiv_mem
3321 we have to check. */
3322 if (GET_CODE (operand) == REG
3323 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3324 && reg_renumber[REGNO (operand)] < 0
3325 && ((reg_equiv_mem[REGNO (operand)] != 0
3326 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3327 || (reg_equiv_address[REGNO (operand)] != 0)))
3328 win = 1;
3330 /* If we didn't already win, we can reload
3331 constants via force_const_mem, and other
3332 MEMs by reloading the address like for 'o'. */
3333 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3334 || GET_CODE (operand) == MEM)
3335 badop = 0;
3336 constmemok = 1;
3337 offmemok = 1;
3338 break;
3340 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3342 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3343 win = 1;
3345 /* If we didn't already win, we can reload
3346 the address into a base register. */
3347 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3348 badop = 0;
3349 break;
3352 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3353 win = 1;
3354 #endif
3355 break;
3358 this_alternative[i]
3359 = (int) (reg_class_subunion
3360 [this_alternative[i]]
3361 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3362 reg:
3363 if (GET_MODE (operand) == BLKmode)
3364 break;
3365 winreg = 1;
3366 if (GET_CODE (operand) == REG
3367 && reg_fits_class_p (operand, this_alternative[i],
3368 offset, GET_MODE (recog_data.operand[i])))
3369 win = 1;
3370 break;
3372 while ((p += len), c);
3374 constraints[i] = p;
3376 /* If this operand could be handled with a reg,
3377 and some reg is allowed, then this operand can be handled. */
3378 if (winreg && this_alternative[i] != (int) NO_REGS)
3379 badop = 0;
3381 /* Record which operands fit this alternative. */
3382 this_alternative_earlyclobber[i] = earlyclobber;
3383 if (win && ! force_reload)
3384 this_alternative_win[i] = 1;
3385 else if (did_match && ! force_reload)
3386 this_alternative_match_win[i] = 1;
3387 else
3389 int const_to_mem = 0;
3391 this_alternative_offmemok[i] = offmemok;
3392 losers++;
3393 if (badop)
3394 bad = 1;
3395 /* Alternative loses if it has no regs for a reg operand. */
3396 if (GET_CODE (operand) == REG
3397 && this_alternative[i] == (int) NO_REGS
3398 && this_alternative_matches[i] < 0)
3399 bad = 1;
3401 /* If this is a constant that is reloaded into the desired
3402 class by copying it to memory first, count that as another
3403 reload. This is consistent with other code and is
3404 required to avoid choosing another alternative when
3405 the constant is moved into memory by this function on
3406 an early reload pass. Note that the test here is
3407 precisely the same as in the code below that calls
3408 force_const_mem. */
3409 if (CONSTANT_P (operand)
3410 /* force_const_mem does not accept HIGH. */
3411 && GET_CODE (operand) != HIGH
3412 && ((PREFERRED_RELOAD_CLASS (operand,
3413 (enum reg_class) this_alternative[i])
3414 == NO_REGS)
3415 || no_input_reloads)
3416 && operand_mode[i] != VOIDmode)
3418 const_to_mem = 1;
3419 if (this_alternative[i] != (int) NO_REGS)
3420 losers++;
3423 /* If we can't reload this value at all, reject this
3424 alternative. Note that we could also lose due to
3425 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3426 here. */
3428 if (! CONSTANT_P (operand)
3429 && (enum reg_class) this_alternative[i] != NO_REGS
3430 && (PREFERRED_RELOAD_CLASS (operand,
3431 (enum reg_class) this_alternative[i])
3432 == NO_REGS))
3433 bad = 1;
3435 /* Alternative loses if it requires a type of reload not
3436 permitted for this insn. We can always reload SCRATCH
3437 and objects with a REG_UNUSED note. */
3438 else if (GET_CODE (operand) != SCRATCH
3439 && modified[i] != RELOAD_READ && no_output_reloads
3440 && ! find_reg_note (insn, REG_UNUSED, operand))
3441 bad = 1;
3442 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3443 && ! const_to_mem)
3444 bad = 1;
3446 /* We prefer to reload pseudos over reloading other things,
3447 since such reloads may be able to be eliminated later.
3448 If we are reloading a SCRATCH, we won't be generating any
3449 insns, just using a register, so it is also preferred.
3450 So bump REJECT in other cases. Don't do this in the
3451 case where we are forcing a constant into memory and
3452 it will then win since we don't want to have a different
3453 alternative match then. */
3454 if (! (GET_CODE (operand) == REG
3455 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3456 && GET_CODE (operand) != SCRATCH
3457 && ! (const_to_mem && constmemok))
3458 reject += 2;
3460 /* Input reloads can be inherited more often than output
3461 reloads can be removed, so penalize output reloads. */
3462 if (operand_type[i] != RELOAD_FOR_INPUT
3463 && GET_CODE (operand) != SCRATCH)
3464 reject++;
3467 /* If this operand is a pseudo register that didn't get a hard
3468 reg and this alternative accepts some register, see if the
3469 class that we want is a subset of the preferred class for this
3470 register. If not, but it intersects that class, use the
3471 preferred class instead. If it does not intersect the preferred
3472 class, show that usage of this alternative should be discouraged;
3473 it will be discouraged more still if the register is `preferred
3474 or nothing'. We do this because it increases the chance of
3475 reusing our spill register in a later insn and avoiding a pair
3476 of memory stores and loads.
3478 Don't bother with this if this alternative will accept this
3479 operand.
3481 Don't do this for a multiword operand, since it is only a
3482 small win and has the risk of requiring more spill registers,
3483 which could cause a large loss.
3485 Don't do this if the preferred class has only one register
3486 because we might otherwise exhaust the class. */
3488 if (! win && ! did_match
3489 && this_alternative[i] != (int) NO_REGS
3490 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3491 && reg_class_size[(int) preferred_class[i]] > 1)
3493 if (! reg_class_subset_p (this_alternative[i],
3494 preferred_class[i]))
3496 /* Since we don't have a way of forming the intersection,
3497 we just do something special if the preferred class
3498 is a subset of the class we have; that's the most
3499 common case anyway. */
3500 if (reg_class_subset_p (preferred_class[i],
3501 this_alternative[i]))
3502 this_alternative[i] = (int) preferred_class[i];
3503 else
3504 reject += (2 + 2 * pref_or_nothing[i]);
3509 /* Now see if any output operands that are marked "earlyclobber"
3510 in this alternative conflict with any input operands
3511 or any memory addresses. */
3513 for (i = 0; i < noperands; i++)
3514 if (this_alternative_earlyclobber[i]
3515 && (this_alternative_win[i] || this_alternative_match_win[i]))
3517 struct decomposition early_data;
3519 early_data = decompose (recog_data.operand[i]);
3521 if (modified[i] == RELOAD_READ)
3522 abort ();
3524 if (this_alternative[i] == NO_REGS)
3526 this_alternative_earlyclobber[i] = 0;
3527 if (this_insn_is_asm)
3528 error_for_asm (this_insn,
3529 "`&' constraint used with no register class");
3530 else
3531 abort ();
3534 for (j = 0; j < noperands; j++)
3535 /* Is this an input operand or a memory ref? */
3536 if ((GET_CODE (recog_data.operand[j]) == MEM
3537 || modified[j] != RELOAD_WRITE)
3538 && j != i
3539 /* Ignore things like match_operator operands. */
3540 && *recog_data.constraints[j] != 0
3541 /* Don't count an input operand that is constrained to match
3542 the early clobber operand. */
3543 && ! (this_alternative_matches[j] == i
3544 && rtx_equal_p (recog_data.operand[i],
3545 recog_data.operand[j]))
3546 /* Is it altered by storing the earlyclobber operand? */
3547 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3548 early_data))
3550 /* If the output is in a single-reg class,
3551 it's costly to reload it, so reload the input instead. */
3552 if (reg_class_size[this_alternative[i]] == 1
3553 && (GET_CODE (recog_data.operand[j]) == REG
3554 || GET_CODE (recog_data.operand[j]) == SUBREG))
3556 losers++;
3557 this_alternative_win[j] = 0;
3558 this_alternative_match_win[j] = 0;
3560 else
3561 break;
3563 /* If an earlyclobber operand conflicts with something,
3564 it must be reloaded, so request this and count the cost. */
3565 if (j != noperands)
3567 losers++;
3568 this_alternative_win[i] = 0;
3569 this_alternative_match_win[j] = 0;
3570 for (j = 0; j < noperands; j++)
3571 if (this_alternative_matches[j] == i
3572 && this_alternative_match_win[j])
3574 this_alternative_win[j] = 0;
3575 this_alternative_match_win[j] = 0;
3576 losers++;
3581 /* If one alternative accepts all the operands, no reload required,
3582 choose that alternative; don't consider the remaining ones. */
3583 if (losers == 0)
3585 /* Unswap these so that they are never swapped at `finish'. */
3586 if (commutative >= 0)
3588 recog_data.operand[commutative] = substed_operand[commutative];
3589 recog_data.operand[commutative + 1]
3590 = substed_operand[commutative + 1];
3592 for (i = 0; i < noperands; i++)
3594 goal_alternative_win[i] = this_alternative_win[i];
3595 goal_alternative_match_win[i] = this_alternative_match_win[i];
3596 goal_alternative[i] = this_alternative[i];
3597 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3598 goal_alternative_matches[i] = this_alternative_matches[i];
3599 goal_alternative_earlyclobber[i]
3600 = this_alternative_earlyclobber[i];
3602 goal_alternative_number = this_alternative_number;
3603 goal_alternative_swapped = swapped;
3604 goal_earlyclobber = this_earlyclobber;
3605 goto finish;
3608 /* REJECT, set by the ! and ? constraint characters and when a register
3609 would be reloaded into a non-preferred class, discourages the use of
3610 this alternative for a reload goal. REJECT is incremented by six
3611 for each ? and two for each non-preferred class. */
3612 losers = losers * 6 + reject;
3614 /* If this alternative can be made to work by reloading,
3615 and it needs less reloading than the others checked so far,
3616 record it as the chosen goal for reloading. */
3617 if (! bad && best > losers)
3619 for (i = 0; i < noperands; i++)
3621 goal_alternative[i] = this_alternative[i];
3622 goal_alternative_win[i] = this_alternative_win[i];
3623 goal_alternative_match_win[i] = this_alternative_match_win[i];
3624 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3625 goal_alternative_matches[i] = this_alternative_matches[i];
3626 goal_alternative_earlyclobber[i]
3627 = this_alternative_earlyclobber[i];
3629 goal_alternative_swapped = swapped;
3630 best = losers;
3631 goal_alternative_number = this_alternative_number;
3632 goal_earlyclobber = this_earlyclobber;
3636 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3637 then we need to try each alternative twice,
3638 the second time matching those two operands
3639 as if we had exchanged them.
3640 To do this, really exchange them in operands.
3642 If we have just tried the alternatives the second time,
3643 return operands to normal and drop through. */
3645 if (commutative >= 0)
3647 swapped = !swapped;
3648 if (swapped)
3650 enum reg_class tclass;
3651 int t;
3653 recog_data.operand[commutative] = substed_operand[commutative + 1];
3654 recog_data.operand[commutative + 1] = substed_operand[commutative];
3655 /* Swap the duplicates too. */
3656 for (i = 0; i < recog_data.n_dups; i++)
3657 if (recog_data.dup_num[i] == commutative
3658 || recog_data.dup_num[i] == commutative + 1)
3659 *recog_data.dup_loc[i]
3660 = recog_data.operand[(int) recog_data.dup_num[i]];
3662 tclass = preferred_class[commutative];
3663 preferred_class[commutative] = preferred_class[commutative + 1];
3664 preferred_class[commutative + 1] = tclass;
3666 t = pref_or_nothing[commutative];
3667 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3668 pref_or_nothing[commutative + 1] = t;
3670 memcpy (constraints, recog_data.constraints,
3671 noperands * sizeof (char *));
3672 goto try_swapped;
3674 else
3676 recog_data.operand[commutative] = substed_operand[commutative];
3677 recog_data.operand[commutative + 1]
3678 = substed_operand[commutative + 1];
3679 /* Unswap the duplicates too. */
3680 for (i = 0; i < recog_data.n_dups; i++)
3681 if (recog_data.dup_num[i] == commutative
3682 || recog_data.dup_num[i] == commutative + 1)
3683 *recog_data.dup_loc[i]
3684 = recog_data.operand[(int) recog_data.dup_num[i]];
3688 /* The operands don't meet the constraints.
3689 goal_alternative describes the alternative
3690 that we could reach by reloading the fewest operands.
3691 Reload so as to fit it. */
3693 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3695 /* No alternative works with reloads?? */
3696 if (insn_code_number >= 0)
3697 fatal_insn ("unable to generate reloads for:", insn);
3698 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3699 /* Avoid further trouble with this insn. */
3700 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3701 n_reloads = 0;
3702 return 0;
3705 /* Jump to `finish' from above if all operands are valid already.
3706 In that case, goal_alternative_win is all 1. */
3707 finish:
3709 /* Right now, for any pair of operands I and J that are required to match,
3710 with I < J,
3711 goal_alternative_matches[J] is I.
3712 Set up goal_alternative_matched as the inverse function:
3713 goal_alternative_matched[I] = J. */
3715 for (i = 0; i < noperands; i++)
3716 goal_alternative_matched[i] = -1;
3718 for (i = 0; i < noperands; i++)
3719 if (! goal_alternative_win[i]
3720 && goal_alternative_matches[i] >= 0)
3721 goal_alternative_matched[goal_alternative_matches[i]] = i;
3723 for (i = 0; i < noperands; i++)
3724 goal_alternative_win[i] |= goal_alternative_match_win[i];
3726 /* If the best alternative is with operands 1 and 2 swapped,
3727 consider them swapped before reporting the reloads. Update the
3728 operand numbers of any reloads already pushed. */
3730 if (goal_alternative_swapped)
3732 rtx tem;
3734 tem = substed_operand[commutative];
3735 substed_operand[commutative] = substed_operand[commutative + 1];
3736 substed_operand[commutative + 1] = tem;
3737 tem = recog_data.operand[commutative];
3738 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3739 recog_data.operand[commutative + 1] = tem;
3740 tem = *recog_data.operand_loc[commutative];
3741 *recog_data.operand_loc[commutative]
3742 = *recog_data.operand_loc[commutative + 1];
3743 *recog_data.operand_loc[commutative + 1] = tem;
3745 for (i = 0; i < n_reloads; i++)
3747 if (rld[i].opnum == commutative)
3748 rld[i].opnum = commutative + 1;
3749 else if (rld[i].opnum == commutative + 1)
3750 rld[i].opnum = commutative;
3754 for (i = 0; i < noperands; i++)
3756 operand_reloadnum[i] = -1;
3758 /* If this is an earlyclobber operand, we need to widen the scope.
3759 The reload must remain valid from the start of the insn being
3760 reloaded until after the operand is stored into its destination.
3761 We approximate this with RELOAD_OTHER even though we know that we
3762 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3764 One special case that is worth checking is when we have an
3765 output that is earlyclobber but isn't used past the insn (typically
3766 a SCRATCH). In this case, we only need have the reload live
3767 through the insn itself, but not for any of our input or output
3768 reloads.
3769 But we must not accidentally narrow the scope of an existing
3770 RELOAD_OTHER reload - leave these alone.
3772 In any case, anything needed to address this operand can remain
3773 however they were previously categorized. */
3775 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3776 operand_type[i]
3777 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3778 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3781 /* Any constants that aren't allowed and can't be reloaded
3782 into registers are here changed into memory references. */
3783 for (i = 0; i < noperands; i++)
3784 if (! goal_alternative_win[i]
3785 && CONSTANT_P (recog_data.operand[i])
3786 /* force_const_mem does not accept HIGH. */
3787 && GET_CODE (recog_data.operand[i]) != HIGH
3788 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3789 (enum reg_class) goal_alternative[i])
3790 == NO_REGS)
3791 || no_input_reloads)
3792 && operand_mode[i] != VOIDmode)
3794 substed_operand[i] = recog_data.operand[i]
3795 = find_reloads_toplev (force_const_mem (operand_mode[i],
3796 recog_data.operand[i]),
3797 i, address_type[i], ind_levels, 0, insn,
3798 NULL);
3799 if (alternative_allows_memconst (recog_data.constraints[i],
3800 goal_alternative_number))
3801 goal_alternative_win[i] = 1;
3804 /* Record the values of the earlyclobber operands for the caller. */
3805 if (goal_earlyclobber)
3806 for (i = 0; i < noperands; i++)
3807 if (goal_alternative_earlyclobber[i])
3808 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3810 /* Now record reloads for all the operands that need them. */
3811 for (i = 0; i < noperands; i++)
3812 if (! goal_alternative_win[i])
3814 /* Operands that match previous ones have already been handled. */
3815 if (goal_alternative_matches[i] >= 0)
3817 /* Handle an operand with a nonoffsettable address
3818 appearing where an offsettable address will do
3819 by reloading the address into a base register.
3821 ??? We can also do this when the operand is a register and
3822 reg_equiv_mem is not offsettable, but this is a bit tricky,
3823 so we don't bother with it. It may not be worth doing. */
3824 else if (goal_alternative_matched[i] == -1
3825 && goal_alternative_offmemok[i]
3826 && GET_CODE (recog_data.operand[i]) == MEM)
3828 operand_reloadnum[i]
3829 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3830 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3831 MODE_BASE_REG_CLASS (VOIDmode),
3832 GET_MODE (XEXP (recog_data.operand[i], 0)),
3833 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3834 rld[operand_reloadnum[i]].inc
3835 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3837 /* If this operand is an output, we will have made any
3838 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3839 now we are treating part of the operand as an input, so
3840 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3842 if (modified[i] == RELOAD_WRITE)
3844 for (j = 0; j < n_reloads; j++)
3846 if (rld[j].opnum == i)
3848 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3849 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3850 else if (rld[j].when_needed
3851 == RELOAD_FOR_OUTADDR_ADDRESS)
3852 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3857 else if (goal_alternative_matched[i] == -1)
3859 operand_reloadnum[i]
3860 = push_reload ((modified[i] != RELOAD_WRITE
3861 ? recog_data.operand[i] : 0),
3862 (modified[i] != RELOAD_READ
3863 ? recog_data.operand[i] : 0),
3864 (modified[i] != RELOAD_WRITE
3865 ? recog_data.operand_loc[i] : 0),
3866 (modified[i] != RELOAD_READ
3867 ? recog_data.operand_loc[i] : 0),
3868 (enum reg_class) goal_alternative[i],
3869 (modified[i] == RELOAD_WRITE
3870 ? VOIDmode : operand_mode[i]),
3871 (modified[i] == RELOAD_READ
3872 ? VOIDmode : operand_mode[i]),
3873 (insn_code_number < 0 ? 0
3874 : insn_data[insn_code_number].operand[i].strict_low),
3875 0, i, operand_type[i]);
3877 /* In a matching pair of operands, one must be input only
3878 and the other must be output only.
3879 Pass the input operand as IN and the other as OUT. */
3880 else if (modified[i] == RELOAD_READ
3881 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3883 operand_reloadnum[i]
3884 = push_reload (recog_data.operand[i],
3885 recog_data.operand[goal_alternative_matched[i]],
3886 recog_data.operand_loc[i],
3887 recog_data.operand_loc[goal_alternative_matched[i]],
3888 (enum reg_class) goal_alternative[i],
3889 operand_mode[i],
3890 operand_mode[goal_alternative_matched[i]],
3891 0, 0, i, RELOAD_OTHER);
3892 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3894 else if (modified[i] == RELOAD_WRITE
3895 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3897 operand_reloadnum[goal_alternative_matched[i]]
3898 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3899 recog_data.operand[i],
3900 recog_data.operand_loc[goal_alternative_matched[i]],
3901 recog_data.operand_loc[i],
3902 (enum reg_class) goal_alternative[i],
3903 operand_mode[goal_alternative_matched[i]],
3904 operand_mode[i],
3905 0, 0, i, RELOAD_OTHER);
3906 operand_reloadnum[i] = output_reloadnum;
3908 else if (insn_code_number >= 0)
3909 abort ();
3910 else
3912 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3913 /* Avoid further trouble with this insn. */
3914 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3915 n_reloads = 0;
3916 return 0;
3919 else if (goal_alternative_matched[i] < 0
3920 && goal_alternative_matches[i] < 0
3921 && !address_operand_reloaded[i]
3922 && optimize)
3924 /* For each non-matching operand that's a MEM or a pseudo-register
3925 that didn't get a hard register, make an optional reload.
3926 This may get done even if the insn needs no reloads otherwise. */
3928 rtx operand = recog_data.operand[i];
3930 while (GET_CODE (operand) == SUBREG)
3931 operand = SUBREG_REG (operand);
3932 if ((GET_CODE (operand) == MEM
3933 || (GET_CODE (operand) == REG
3934 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3935 /* If this is only for an output, the optional reload would not
3936 actually cause us to use a register now, just note that
3937 something is stored here. */
3938 && ((enum reg_class) goal_alternative[i] != NO_REGS
3939 || modified[i] == RELOAD_WRITE)
3940 && ! no_input_reloads
3941 /* An optional output reload might allow to delete INSN later.
3942 We mustn't make in-out reloads on insns that are not permitted
3943 output reloads.
3944 If this is an asm, we can't delete it; we must not even call
3945 push_reload for an optional output reload in this case,
3946 because we can't be sure that the constraint allows a register,
3947 and push_reload verifies the constraints for asms. */
3948 && (modified[i] == RELOAD_READ
3949 || (! no_output_reloads && ! this_insn_is_asm)))
3950 operand_reloadnum[i]
3951 = push_reload ((modified[i] != RELOAD_WRITE
3952 ? recog_data.operand[i] : 0),
3953 (modified[i] != RELOAD_READ
3954 ? recog_data.operand[i] : 0),
3955 (modified[i] != RELOAD_WRITE
3956 ? recog_data.operand_loc[i] : 0),
3957 (modified[i] != RELOAD_READ
3958 ? recog_data.operand_loc[i] : 0),
3959 (enum reg_class) goal_alternative[i],
3960 (modified[i] == RELOAD_WRITE
3961 ? VOIDmode : operand_mode[i]),
3962 (modified[i] == RELOAD_READ
3963 ? VOIDmode : operand_mode[i]),
3964 (insn_code_number < 0 ? 0
3965 : insn_data[insn_code_number].operand[i].strict_low),
3966 1, i, operand_type[i]);
3967 /* If a memory reference remains (either as a MEM or a pseudo that
3968 did not get a hard register), yet we can't make an optional
3969 reload, check if this is actually a pseudo register reference;
3970 we then need to emit a USE and/or a CLOBBER so that reload
3971 inheritance will do the right thing. */
3972 else if (replace
3973 && (GET_CODE (operand) == MEM
3974 || (GET_CODE (operand) == REG
3975 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3976 && reg_renumber [REGNO (operand)] < 0)))
3978 operand = *recog_data.operand_loc[i];
3980 while (GET_CODE (operand) == SUBREG)
3981 operand = SUBREG_REG (operand);
3982 if (GET_CODE (operand) == REG)
3984 if (modified[i] != RELOAD_WRITE)
3985 /* We mark the USE with QImode so that we recognize
3986 it as one that can be safely deleted at the end
3987 of reload. */
3988 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3989 insn), QImode);
3990 if (modified[i] != RELOAD_READ)
3991 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3995 else if (goal_alternative_matches[i] >= 0
3996 && goal_alternative_win[goal_alternative_matches[i]]
3997 && modified[i] == RELOAD_READ
3998 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3999 && ! no_input_reloads && ! no_output_reloads
4000 && optimize)
4002 /* Similarly, make an optional reload for a pair of matching
4003 objects that are in MEM or a pseudo that didn't get a hard reg. */
4005 rtx operand = recog_data.operand[i];
4007 while (GET_CODE (operand) == SUBREG)
4008 operand = SUBREG_REG (operand);
4009 if ((GET_CODE (operand) == MEM
4010 || (GET_CODE (operand) == REG
4011 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4012 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4013 != NO_REGS))
4014 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4015 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4016 recog_data.operand[i],
4017 recog_data.operand_loc[goal_alternative_matches[i]],
4018 recog_data.operand_loc[i],
4019 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4020 operand_mode[goal_alternative_matches[i]],
4021 operand_mode[i],
4022 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4025 /* Perform whatever substitutions on the operands we are supposed
4026 to make due to commutativity or replacement of registers
4027 with equivalent constants or memory slots. */
4029 for (i = 0; i < noperands; i++)
4031 /* We only do this on the last pass through reload, because it is
4032 possible for some data (like reg_equiv_address) to be changed during
4033 later passes. Moreover, we loose the opportunity to get a useful
4034 reload_{in,out}_reg when we do these replacements. */
4036 if (replace)
4038 rtx substitution = substed_operand[i];
4040 *recog_data.operand_loc[i] = substitution;
4042 /* If we're replacing an operand with a LABEL_REF, we need
4043 to make sure that there's a REG_LABEL note attached to
4044 this instruction. */
4045 if (GET_CODE (insn) != JUMP_INSN
4046 && GET_CODE (substitution) == LABEL_REF
4047 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4048 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4049 XEXP (substitution, 0),
4050 REG_NOTES (insn));
4052 else
4053 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4056 /* If this insn pattern contains any MATCH_DUP's, make sure that
4057 they will be substituted if the operands they match are substituted.
4058 Also do now any substitutions we already did on the operands.
4060 Don't do this if we aren't making replacements because we might be
4061 propagating things allocated by frame pointer elimination into places
4062 it doesn't expect. */
4064 if (insn_code_number >= 0 && replace)
4065 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4067 int opno = recog_data.dup_num[i];
4068 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4069 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4072 #if 0
4073 /* This loses because reloading of prior insns can invalidate the equivalence
4074 (or at least find_equiv_reg isn't smart enough to find it any more),
4075 causing this insn to need more reload regs than it needed before.
4076 It may be too late to make the reload regs available.
4077 Now this optimization is done safely in choose_reload_regs. */
4079 /* For each reload of a reg into some other class of reg,
4080 search for an existing equivalent reg (same value now) in the right class.
4081 We can use it as long as we don't need to change its contents. */
4082 for (i = 0; i < n_reloads; i++)
4083 if (rld[i].reg_rtx == 0
4084 && rld[i].in != 0
4085 && GET_CODE (rld[i].in) == REG
4086 && rld[i].out == 0)
4088 rld[i].reg_rtx
4089 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4090 static_reload_reg_p, 0, rld[i].inmode);
4091 /* Prevent generation of insn to load the value
4092 because the one we found already has the value. */
4093 if (rld[i].reg_rtx)
4094 rld[i].in = rld[i].reg_rtx;
4096 #endif
4098 /* Perhaps an output reload can be combined with another
4099 to reduce needs by one. */
4100 if (!goal_earlyclobber)
4101 combine_reloads ();
4103 /* If we have a pair of reloads for parts of an address, they are reloading
4104 the same object, the operands themselves were not reloaded, and they
4105 are for two operands that are supposed to match, merge the reloads and
4106 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4108 for (i = 0; i < n_reloads; i++)
4110 int k;
4112 for (j = i + 1; j < n_reloads; j++)
4113 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4114 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4115 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4116 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4117 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4118 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4119 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4120 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4121 && rtx_equal_p (rld[i].in, rld[j].in)
4122 && (operand_reloadnum[rld[i].opnum] < 0
4123 || rld[operand_reloadnum[rld[i].opnum]].optional)
4124 && (operand_reloadnum[rld[j].opnum] < 0
4125 || rld[operand_reloadnum[rld[j].opnum]].optional)
4126 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4127 || (goal_alternative_matches[rld[j].opnum]
4128 == rld[i].opnum)))
4130 for (k = 0; k < n_replacements; k++)
4131 if (replacements[k].what == j)
4132 replacements[k].what = i;
4134 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4135 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4136 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4137 else
4138 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4139 rld[j].in = 0;
4143 /* Scan all the reloads and update their type.
4144 If a reload is for the address of an operand and we didn't reload
4145 that operand, change the type. Similarly, change the operand number
4146 of a reload when two operands match. If a reload is optional, treat it
4147 as though the operand isn't reloaded.
4149 ??? This latter case is somewhat odd because if we do the optional
4150 reload, it means the object is hanging around. Thus we need only
4151 do the address reload if the optional reload was NOT done.
4153 Change secondary reloads to be the address type of their operand, not
4154 the normal type.
4156 If an operand's reload is now RELOAD_OTHER, change any
4157 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4158 RELOAD_FOR_OTHER_ADDRESS. */
4160 for (i = 0; i < n_reloads; i++)
4162 if (rld[i].secondary_p
4163 && rld[i].when_needed == operand_type[rld[i].opnum])
4164 rld[i].when_needed = address_type[rld[i].opnum];
4166 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4167 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4168 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4169 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4170 && (operand_reloadnum[rld[i].opnum] < 0
4171 || rld[operand_reloadnum[rld[i].opnum]].optional))
4173 /* If we have a secondary reload to go along with this reload,
4174 change its type to RELOAD_FOR_OPADDR_ADDR. */
4176 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4177 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4178 && rld[i].secondary_in_reload != -1)
4180 int secondary_in_reload = rld[i].secondary_in_reload;
4182 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4184 /* If there's a tertiary reload we have to change it also. */
4185 if (secondary_in_reload > 0
4186 && rld[secondary_in_reload].secondary_in_reload != -1)
4187 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4188 = RELOAD_FOR_OPADDR_ADDR;
4191 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4192 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4193 && rld[i].secondary_out_reload != -1)
4195 int secondary_out_reload = rld[i].secondary_out_reload;
4197 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4199 /* If there's a tertiary reload we have to change it also. */
4200 if (secondary_out_reload
4201 && rld[secondary_out_reload].secondary_out_reload != -1)
4202 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4203 = RELOAD_FOR_OPADDR_ADDR;
4206 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4207 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4208 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4209 else
4210 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4213 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4214 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4215 && operand_reloadnum[rld[i].opnum] >= 0
4216 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4217 == RELOAD_OTHER))
4218 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4220 if (goal_alternative_matches[rld[i].opnum] >= 0)
4221 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4224 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4225 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4226 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4228 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4229 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4230 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4231 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4232 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4233 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4234 This is complicated by the fact that a single operand can have more
4235 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4236 choose_reload_regs without affecting code quality, and cases that
4237 actually fail are extremely rare, so it turns out to be better to fix
4238 the problem here by not generating cases that choose_reload_regs will
4239 fail for. */
4240 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4241 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4242 a single operand.
4243 We can reduce the register pressure by exploiting that a
4244 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4245 does not conflict with any of them, if it is only used for the first of
4246 the RELOAD_FOR_X_ADDRESS reloads. */
4248 int first_op_addr_num = -2;
4249 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4250 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4251 int need_change = 0;
4252 /* We use last_op_addr_reload and the contents of the above arrays
4253 first as flags - -2 means no instance encountered, -1 means exactly
4254 one instance encountered.
4255 If more than one instance has been encountered, we store the reload
4256 number of the first reload of the kind in question; reload numbers
4257 are known to be non-negative. */
4258 for (i = 0; i < noperands; i++)
4259 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4260 for (i = n_reloads - 1; i >= 0; i--)
4262 switch (rld[i].when_needed)
4264 case RELOAD_FOR_OPERAND_ADDRESS:
4265 if (++first_op_addr_num >= 0)
4267 first_op_addr_num = i;
4268 need_change = 1;
4270 break;
4271 case RELOAD_FOR_INPUT_ADDRESS:
4272 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4274 first_inpaddr_num[rld[i].opnum] = i;
4275 need_change = 1;
4277 break;
4278 case RELOAD_FOR_OUTPUT_ADDRESS:
4279 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4281 first_outpaddr_num[rld[i].opnum] = i;
4282 need_change = 1;
4284 break;
4285 default:
4286 break;
4290 if (need_change)
4292 for (i = 0; i < n_reloads; i++)
4294 int first_num;
4295 enum reload_type type;
4297 switch (rld[i].when_needed)
4299 case RELOAD_FOR_OPADDR_ADDR:
4300 first_num = first_op_addr_num;
4301 type = RELOAD_FOR_OPERAND_ADDRESS;
4302 break;
4303 case RELOAD_FOR_INPADDR_ADDRESS:
4304 first_num = first_inpaddr_num[rld[i].opnum];
4305 type = RELOAD_FOR_INPUT_ADDRESS;
4306 break;
4307 case RELOAD_FOR_OUTADDR_ADDRESS:
4308 first_num = first_outpaddr_num[rld[i].opnum];
4309 type = RELOAD_FOR_OUTPUT_ADDRESS;
4310 break;
4311 default:
4312 continue;
4314 if (first_num < 0)
4315 continue;
4316 else if (i > first_num)
4317 rld[i].when_needed = type;
4318 else
4320 /* Check if the only TYPE reload that uses reload I is
4321 reload FIRST_NUM. */
4322 for (j = n_reloads - 1; j > first_num; j--)
4324 if (rld[j].when_needed == type
4325 && (rld[i].secondary_p
4326 ? rld[j].secondary_in_reload == i
4327 : reg_mentioned_p (rld[i].in, rld[j].in)))
4329 rld[i].when_needed = type;
4330 break;
4338 /* See if we have any reloads that are now allowed to be merged
4339 because we've changed when the reload is needed to
4340 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4341 check for the most common cases. */
4343 for (i = 0; i < n_reloads; i++)
4344 if (rld[i].in != 0 && rld[i].out == 0
4345 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4346 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4347 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4348 for (j = 0; j < n_reloads; j++)
4349 if (i != j && rld[j].in != 0 && rld[j].out == 0
4350 && rld[j].when_needed == rld[i].when_needed
4351 && MATCHES (rld[i].in, rld[j].in)
4352 && rld[i].class == rld[j].class
4353 && !rld[i].nocombine && !rld[j].nocombine
4354 && rld[i].reg_rtx == rld[j].reg_rtx)
4356 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4357 transfer_replacements (i, j);
4358 rld[j].in = 0;
4361 #ifdef HAVE_cc0
4362 /* If we made any reloads for addresses, see if they violate a
4363 "no input reloads" requirement for this insn. But loads that we
4364 do after the insn (such as for output addresses) are fine. */
4365 if (no_input_reloads)
4366 for (i = 0; i < n_reloads; i++)
4367 if (rld[i].in != 0
4368 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4369 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4370 abort ();
4371 #endif
4373 /* Compute reload_mode and reload_nregs. */
4374 for (i = 0; i < n_reloads; i++)
4376 rld[i].mode
4377 = (rld[i].inmode == VOIDmode
4378 || (GET_MODE_SIZE (rld[i].outmode)
4379 > GET_MODE_SIZE (rld[i].inmode)))
4380 ? rld[i].outmode : rld[i].inmode;
4382 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4385 /* Special case a simple move with an input reload and a
4386 destination of a hard reg, if the hard reg is ok, use it. */
4387 for (i = 0; i < n_reloads; i++)
4388 if (rld[i].when_needed == RELOAD_FOR_INPUT
4389 && GET_CODE (PATTERN (insn)) == SET
4390 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4391 && SET_SRC (PATTERN (insn)) == rld[i].in)
4393 rtx dest = SET_DEST (PATTERN (insn));
4394 unsigned int regno = REGNO (dest);
4396 if (regno < FIRST_PSEUDO_REGISTER
4397 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4398 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4400 int nr = HARD_REGNO_NREGS (regno, rld[i].mode);
4401 int ok = 1, nri;
4403 for (nri = 1; nri < nr; nri ++)
4404 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4405 ok = 0;
4407 if (ok)
4408 rld[i].reg_rtx = dest;
4412 return retval;
4415 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4416 accepts a memory operand with constant address. */
4418 static int
4419 alternative_allows_memconst (constraint, altnum)
4420 const char *constraint;
4421 int altnum;
4423 int c;
4424 /* Skip alternatives before the one requested. */
4425 while (altnum > 0)
4427 while (*constraint++ != ',');
4428 altnum--;
4430 /* Scan the requested alternative for 'm' or 'o'.
4431 If one of them is present, this alternative accepts memory constants. */
4432 for (; (c = *constraint) && c != ',' && c != '#';
4433 constraint += CONSTRAINT_LEN (c, constraint))
4434 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4435 return 1;
4436 return 0;
4439 /* Scan X for memory references and scan the addresses for reloading.
4440 Also checks for references to "constant" regs that we want to eliminate
4441 and replaces them with the values they stand for.
4442 We may alter X destructively if it contains a reference to such.
4443 If X is just a constant reg, we return the equivalent value
4444 instead of X.
4446 IND_LEVELS says how many levels of indirect addressing this machine
4447 supports.
4449 OPNUM and TYPE identify the purpose of the reload.
4451 IS_SET_DEST is true if X is the destination of a SET, which is not
4452 appropriate to be replaced by a constant.
4454 INSN, if nonzero, is the insn in which we do the reload. It is used
4455 to determine if we may generate output reloads, and where to put USEs
4456 for pseudos that we have to replace with stack slots.
4458 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4459 result of find_reloads_address. */
4461 static rtx
4462 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4463 address_reloaded)
4464 rtx x;
4465 int opnum;
4466 enum reload_type type;
4467 int ind_levels;
4468 int is_set_dest;
4469 rtx insn;
4470 int *address_reloaded;
4472 RTX_CODE code = GET_CODE (x);
4474 const char *fmt = GET_RTX_FORMAT (code);
4475 int i;
4476 int copied;
4478 if (code == REG)
4480 /* This code is duplicated for speed in find_reloads. */
4481 int regno = REGNO (x);
4482 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4483 x = reg_equiv_constant[regno];
4484 #if 0
4485 /* This creates (subreg (mem...)) which would cause an unnecessary
4486 reload of the mem. */
4487 else if (reg_equiv_mem[regno] != 0)
4488 x = reg_equiv_mem[regno];
4489 #endif
4490 else if (reg_equiv_memory_loc[regno]
4491 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4493 rtx mem = make_memloc (x, regno);
4494 if (reg_equiv_address[regno]
4495 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4497 /* If this is not a toplevel operand, find_reloads doesn't see
4498 this substitution. We have to emit a USE of the pseudo so
4499 that delete_output_reload can see it. */
4500 if (replace_reloads && recog_data.operand[opnum] != x)
4501 /* We mark the USE with QImode so that we recognize it
4502 as one that can be safely deleted at the end of
4503 reload. */
4504 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4505 QImode);
4506 x = mem;
4507 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4508 opnum, type, ind_levels, insn);
4509 if (address_reloaded)
4510 *address_reloaded = i;
4513 return x;
4515 if (code == MEM)
4517 rtx tem = x;
4519 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4520 opnum, type, ind_levels, insn);
4521 if (address_reloaded)
4522 *address_reloaded = i;
4524 return tem;
4527 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4529 /* Check for SUBREG containing a REG that's equivalent to a constant.
4530 If the constant has a known value, truncate it right now.
4531 Similarly if we are extracting a single-word of a multi-word
4532 constant. If the constant is symbolic, allow it to be substituted
4533 normally. push_reload will strip the subreg later. If the
4534 constant is VOIDmode, abort because we will lose the mode of
4535 the register (this should never happen because one of the cases
4536 above should handle it). */
4538 int regno = REGNO (SUBREG_REG (x));
4539 rtx tem;
4541 if (subreg_lowpart_p (x)
4542 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4543 && reg_equiv_constant[regno] != 0
4544 && (tem = gen_lowpart_common (GET_MODE (x),
4545 reg_equiv_constant[regno])) != 0)
4546 return tem;
4548 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4549 && reg_equiv_constant[regno] != 0)
4551 tem =
4552 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4553 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4554 if (!tem)
4555 abort ();
4556 return tem;
4559 /* If the subreg contains a reg that will be converted to a mem,
4560 convert the subreg to a narrower memref now.
4561 Otherwise, we would get (subreg (mem ...) ...),
4562 which would force reload of the mem.
4564 We also need to do this if there is an equivalent MEM that is
4565 not offsettable. In that case, alter_subreg would produce an
4566 invalid address on big-endian machines.
4568 For machines that extend byte loads, we must not reload using
4569 a wider mode if we have a paradoxical SUBREG. find_reloads will
4570 force a reload in that case. So we should not do anything here. */
4572 else if (regno >= FIRST_PSEUDO_REGISTER
4573 #ifdef LOAD_EXTEND_OP
4574 && (GET_MODE_SIZE (GET_MODE (x))
4575 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4576 #endif
4577 && (reg_equiv_address[regno] != 0
4578 || (reg_equiv_mem[regno] != 0
4579 && (! strict_memory_address_p (GET_MODE (x),
4580 XEXP (reg_equiv_mem[regno], 0))
4581 || ! offsettable_memref_p (reg_equiv_mem[regno])
4582 || num_not_at_initial_offset))))
4583 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4584 insn);
4587 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4589 if (fmt[i] == 'e')
4591 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4592 ind_levels, is_set_dest, insn,
4593 address_reloaded);
4594 /* If we have replaced a reg with it's equivalent memory loc -
4595 that can still be handled here e.g. if it's in a paradoxical
4596 subreg - we must make the change in a copy, rather than using
4597 a destructive change. This way, find_reloads can still elect
4598 not to do the change. */
4599 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4601 x = shallow_copy_rtx (x);
4602 copied = 1;
4604 XEXP (x, i) = new_part;
4607 return x;
4610 /* Return a mem ref for the memory equivalent of reg REGNO.
4611 This mem ref is not shared with anything. */
4613 static rtx
4614 make_memloc (ad, regno)
4615 rtx ad;
4616 int regno;
4618 /* We must rerun eliminate_regs, in case the elimination
4619 offsets have changed. */
4620 rtx tem
4621 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4623 /* If TEM might contain a pseudo, we must copy it to avoid
4624 modifying it when we do the substitution for the reload. */
4625 if (rtx_varies_p (tem, 0))
4626 tem = copy_rtx (tem);
4628 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4629 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4631 /* Copy the result if it's still the same as the equivalence, to avoid
4632 modifying it when we do the substitution for the reload. */
4633 if (tem == reg_equiv_memory_loc[regno])
4634 tem = copy_rtx (tem);
4635 return tem;
4638 /* Returns true if AD could be turned into a valid memory reference
4639 to mode MODE by reloading the part pointed to by PART into a
4640 register. */
4642 static int
4643 maybe_memory_address_p (mode, ad, part)
4644 enum machine_mode mode;
4645 rtx ad;
4646 rtx *part;
4648 int retv;
4649 rtx tem = *part;
4650 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4652 *part = reg;
4653 retv = memory_address_p (mode, ad);
4654 *part = tem;
4656 return retv;
4659 /* Record all reloads needed for handling memory address AD
4660 which appears in *LOC in a memory reference to mode MODE
4661 which itself is found in location *MEMREFLOC.
4662 Note that we take shortcuts assuming that no multi-reg machine mode
4663 occurs as part of an address.
4665 OPNUM and TYPE specify the purpose of this reload.
4667 IND_LEVELS says how many levels of indirect addressing this machine
4668 supports.
4670 INSN, if nonzero, is the insn in which we do the reload. It is used
4671 to determine if we may generate output reloads, and where to put USEs
4672 for pseudos that we have to replace with stack slots.
4674 Value is nonzero if this address is reloaded or replaced as a whole.
4675 This is interesting to the caller if the address is an autoincrement.
4677 Note that there is no verification that the address will be valid after
4678 this routine does its work. Instead, we rely on the fact that the address
4679 was valid when reload started. So we need only undo things that reload
4680 could have broken. These are wrong register types, pseudos not allocated
4681 to a hard register, and frame pointer elimination. */
4683 static int
4684 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4685 enum machine_mode mode;
4686 rtx *memrefloc;
4687 rtx ad;
4688 rtx *loc;
4689 int opnum;
4690 enum reload_type type;
4691 int ind_levels;
4692 rtx insn;
4694 int regno;
4695 int removed_and = 0;
4696 rtx tem;
4698 /* If the address is a register, see if it is a legitimate address and
4699 reload if not. We first handle the cases where we need not reload
4700 or where we must reload in a non-standard way. */
4702 if (GET_CODE (ad) == REG)
4704 regno = REGNO (ad);
4706 /* If the register is equivalent to an invariant expression, substitute
4707 the invariant, and eliminate any eliminable register references. */
4708 tem = reg_equiv_constant[regno];
4709 if (tem != 0
4710 && (tem = eliminate_regs (tem, mode, insn))
4711 && strict_memory_address_p (mode, tem))
4713 *loc = ad = tem;
4714 return 0;
4717 tem = reg_equiv_memory_loc[regno];
4718 if (tem != 0)
4720 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4722 tem = make_memloc (ad, regno);
4723 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4725 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4726 &XEXP (tem, 0), opnum,
4727 ADDR_TYPE (type), ind_levels, insn);
4729 /* We can avoid a reload if the register's equivalent memory
4730 expression is valid as an indirect memory address.
4731 But not all addresses are valid in a mem used as an indirect
4732 address: only reg or reg+constant. */
4734 if (ind_levels > 0
4735 && strict_memory_address_p (mode, tem)
4736 && (GET_CODE (XEXP (tem, 0)) == REG
4737 || (GET_CODE (XEXP (tem, 0)) == PLUS
4738 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4739 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4741 /* TEM is not the same as what we'll be replacing the
4742 pseudo with after reload, put a USE in front of INSN
4743 in the final reload pass. */
4744 if (replace_reloads
4745 && num_not_at_initial_offset
4746 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4748 *loc = tem;
4749 /* We mark the USE with QImode so that we
4750 recognize it as one that can be safely
4751 deleted at the end of reload. */
4752 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4753 insn), QImode);
4755 /* This doesn't really count as replacing the address
4756 as a whole, since it is still a memory access. */
4758 return 0;
4760 ad = tem;
4764 /* The only remaining case where we can avoid a reload is if this is a
4765 hard register that is valid as a base register and which is not the
4766 subject of a CLOBBER in this insn. */
4768 else if (regno < FIRST_PSEUDO_REGISTER
4769 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4770 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4771 return 0;
4773 /* If we do not have one of the cases above, we must do the reload. */
4774 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4775 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4776 return 1;
4779 if (strict_memory_address_p (mode, ad))
4781 /* The address appears valid, so reloads are not needed.
4782 But the address may contain an eliminable register.
4783 This can happen because a machine with indirect addressing
4784 may consider a pseudo register by itself a valid address even when
4785 it has failed to get a hard reg.
4786 So do a tree-walk to find and eliminate all such regs. */
4788 /* But first quickly dispose of a common case. */
4789 if (GET_CODE (ad) == PLUS
4790 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4791 && GET_CODE (XEXP (ad, 0)) == REG
4792 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4793 return 0;
4795 subst_reg_equivs_changed = 0;
4796 *loc = subst_reg_equivs (ad, insn);
4798 if (! subst_reg_equivs_changed)
4799 return 0;
4801 /* Check result for validity after substitution. */
4802 if (strict_memory_address_p (mode, ad))
4803 return 0;
4806 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4809 if (memrefloc)
4811 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4812 ind_levels, win);
4814 break;
4815 win:
4816 *memrefloc = copy_rtx (*memrefloc);
4817 XEXP (*memrefloc, 0) = ad;
4818 move_replacements (&ad, &XEXP (*memrefloc, 0));
4819 return 1;
4821 while (0);
4822 #endif
4824 /* The address is not valid. We have to figure out why. First see if
4825 we have an outer AND and remove it if so. Then analyze what's inside. */
4827 if (GET_CODE (ad) == AND)
4829 removed_and = 1;
4830 loc = &XEXP (ad, 0);
4831 ad = *loc;
4834 /* One possibility for why the address is invalid is that it is itself
4835 a MEM. This can happen when the frame pointer is being eliminated, a
4836 pseudo is not allocated to a hard register, and the offset between the
4837 frame and stack pointers is not its initial value. In that case the
4838 pseudo will have been replaced by a MEM referring to the
4839 stack pointer. */
4840 if (GET_CODE (ad) == MEM)
4842 /* First ensure that the address in this MEM is valid. Then, unless
4843 indirect addresses are valid, reload the MEM into a register. */
4844 tem = ad;
4845 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4846 opnum, ADDR_TYPE (type),
4847 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4849 /* If tem was changed, then we must create a new memory reference to
4850 hold it and store it back into memrefloc. */
4851 if (tem != ad && memrefloc)
4853 *memrefloc = copy_rtx (*memrefloc);
4854 copy_replacements (tem, XEXP (*memrefloc, 0));
4855 loc = &XEXP (*memrefloc, 0);
4856 if (removed_and)
4857 loc = &XEXP (*loc, 0);
4860 /* Check similar cases as for indirect addresses as above except
4861 that we can allow pseudos and a MEM since they should have been
4862 taken care of above. */
4864 if (ind_levels == 0
4865 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4866 || GET_CODE (XEXP (tem, 0)) == MEM
4867 || ! (GET_CODE (XEXP (tem, 0)) == REG
4868 || (GET_CODE (XEXP (tem, 0)) == PLUS
4869 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4870 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4872 /* Must use TEM here, not AD, since it is the one that will
4873 have any subexpressions reloaded, if needed. */
4874 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4875 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4876 VOIDmode, 0,
4877 0, opnum, type);
4878 return ! removed_and;
4880 else
4881 return 0;
4884 /* If we have address of a stack slot but it's not valid because the
4885 displacement is too large, compute the sum in a register.
4886 Handle all base registers here, not just fp/ap/sp, because on some
4887 targets (namely SH) we can also get too large displacements from
4888 big-endian corrections. */
4889 else if (GET_CODE (ad) == PLUS
4890 && GET_CODE (XEXP (ad, 0)) == REG
4891 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4892 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4893 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4895 /* Unshare the MEM rtx so we can safely alter it. */
4896 if (memrefloc)
4898 *memrefloc = copy_rtx (*memrefloc);
4899 loc = &XEXP (*memrefloc, 0);
4900 if (removed_and)
4901 loc = &XEXP (*loc, 0);
4904 if (double_reg_address_ok)
4906 /* Unshare the sum as well. */
4907 *loc = ad = copy_rtx (ad);
4909 /* Reload the displacement into an index reg.
4910 We assume the frame pointer or arg pointer is a base reg. */
4911 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4912 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4913 type, ind_levels);
4914 return 0;
4916 else
4918 /* If the sum of two regs is not necessarily valid,
4919 reload the sum into a base reg.
4920 That will at least work. */
4921 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4922 Pmode, opnum, type, ind_levels);
4924 return ! removed_and;
4927 /* If we have an indexed stack slot, there are three possible reasons why
4928 it might be invalid: The index might need to be reloaded, the address
4929 might have been made by frame pointer elimination and hence have a
4930 constant out of range, or both reasons might apply.
4932 We can easily check for an index needing reload, but even if that is the
4933 case, we might also have an invalid constant. To avoid making the
4934 conservative assumption and requiring two reloads, we see if this address
4935 is valid when not interpreted strictly. If it is, the only problem is
4936 that the index needs a reload and find_reloads_address_1 will take care
4937 of it.
4939 Handle all base registers here, not just fp/ap/sp, because on some
4940 targets (namely SPARC) we can also get invalid addresses from preventive
4941 subreg big-endian corrections made by find_reloads_toplev.
4943 If we decide to do something, it must be that `double_reg_address_ok'
4944 is true. We generate a reload of the base register + constant and
4945 rework the sum so that the reload register will be added to the index.
4946 This is safe because we know the address isn't shared.
4948 We check for the base register as both the first and second operand of
4949 the innermost PLUS. */
4951 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4952 && GET_CODE (XEXP (ad, 0)) == PLUS
4953 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4954 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4955 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4956 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4958 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4959 plus_constant (XEXP (XEXP (ad, 0), 0),
4960 INTVAL (XEXP (ad, 1))),
4961 XEXP (XEXP (ad, 0), 1));
4962 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4963 MODE_BASE_REG_CLASS (mode),
4964 GET_MODE (ad), opnum, type, ind_levels);
4965 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4966 type, 0, insn);
4968 return 0;
4971 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4972 && GET_CODE (XEXP (ad, 0)) == PLUS
4973 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4974 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4975 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4976 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4978 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4979 XEXP (XEXP (ad, 0), 0),
4980 plus_constant (XEXP (XEXP (ad, 0), 1),
4981 INTVAL (XEXP (ad, 1))));
4982 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4983 MODE_BASE_REG_CLASS (mode),
4984 GET_MODE (ad), opnum, type, ind_levels);
4985 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4986 type, 0, insn);
4988 return 0;
4991 /* See if address becomes valid when an eliminable register
4992 in a sum is replaced. */
4994 tem = ad;
4995 if (GET_CODE (ad) == PLUS)
4996 tem = subst_indexed_address (ad);
4997 if (tem != ad && strict_memory_address_p (mode, tem))
4999 /* Ok, we win that way. Replace any additional eliminable
5000 registers. */
5002 subst_reg_equivs_changed = 0;
5003 tem = subst_reg_equivs (tem, insn);
5005 /* Make sure that didn't make the address invalid again. */
5007 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5009 *loc = tem;
5010 return 0;
5014 /* If constants aren't valid addresses, reload the constant address
5015 into a register. */
5016 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5018 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5019 Unshare it so we can safely alter it. */
5020 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5021 && CONSTANT_POOL_ADDRESS_P (ad))
5023 *memrefloc = copy_rtx (*memrefloc);
5024 loc = &XEXP (*memrefloc, 0);
5025 if (removed_and)
5026 loc = &XEXP (*loc, 0);
5029 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
5030 Pmode, opnum, type, ind_levels);
5031 return ! removed_and;
5034 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
5035 insn);
5038 /* Find all pseudo regs appearing in AD
5039 that are eliminable in favor of equivalent values
5040 and do not have hard regs; replace them by their equivalents.
5041 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5042 front of it for pseudos that we have to replace with stack slots. */
5044 static rtx
5045 subst_reg_equivs (ad, insn)
5046 rtx ad;
5047 rtx insn;
5049 RTX_CODE code = GET_CODE (ad);
5050 int i;
5051 const char *fmt;
5053 switch (code)
5055 case HIGH:
5056 case CONST_INT:
5057 case CONST:
5058 case CONST_DOUBLE:
5059 case CONST_VECTOR:
5060 case SYMBOL_REF:
5061 case LABEL_REF:
5062 case PC:
5063 case CC0:
5064 return ad;
5066 case REG:
5068 int regno = REGNO (ad);
5070 if (reg_equiv_constant[regno] != 0)
5072 subst_reg_equivs_changed = 1;
5073 return reg_equiv_constant[regno];
5075 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5077 rtx mem = make_memloc (ad, regno);
5078 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5080 subst_reg_equivs_changed = 1;
5081 /* We mark the USE with QImode so that we recognize it
5082 as one that can be safely deleted at the end of
5083 reload. */
5084 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5085 QImode);
5086 return mem;
5090 return ad;
5092 case PLUS:
5093 /* Quickly dispose of a common case. */
5094 if (XEXP (ad, 0) == frame_pointer_rtx
5095 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5096 return ad;
5097 break;
5099 default:
5100 break;
5103 fmt = GET_RTX_FORMAT (code);
5104 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5105 if (fmt[i] == 'e')
5106 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5107 return ad;
5110 /* Compute the sum of X and Y, making canonicalizations assumed in an
5111 address, namely: sum constant integers, surround the sum of two
5112 constants with a CONST, put the constant as the second operand, and
5113 group the constant on the outermost sum.
5115 This routine assumes both inputs are already in canonical form. */
5118 form_sum (x, y)
5119 rtx x, y;
5121 rtx tem;
5122 enum machine_mode mode = GET_MODE (x);
5124 if (mode == VOIDmode)
5125 mode = GET_MODE (y);
5127 if (mode == VOIDmode)
5128 mode = Pmode;
5130 if (GET_CODE (x) == CONST_INT)
5131 return plus_constant (y, INTVAL (x));
5132 else if (GET_CODE (y) == CONST_INT)
5133 return plus_constant (x, INTVAL (y));
5134 else if (CONSTANT_P (x))
5135 tem = x, x = y, y = tem;
5137 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5138 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5140 /* Note that if the operands of Y are specified in the opposite
5141 order in the recursive calls below, infinite recursion will occur. */
5142 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5143 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5145 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5146 constant will have been placed second. */
5147 if (CONSTANT_P (x) && CONSTANT_P (y))
5149 if (GET_CODE (x) == CONST)
5150 x = XEXP (x, 0);
5151 if (GET_CODE (y) == CONST)
5152 y = XEXP (y, 0);
5154 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5157 return gen_rtx_PLUS (mode, x, y);
5160 /* If ADDR is a sum containing a pseudo register that should be
5161 replaced with a constant (from reg_equiv_constant),
5162 return the result of doing so, and also apply the associative
5163 law so that the result is more likely to be a valid address.
5164 (But it is not guaranteed to be one.)
5166 Note that at most one register is replaced, even if more are
5167 replaceable. Also, we try to put the result into a canonical form
5168 so it is more likely to be a valid address.
5170 In all other cases, return ADDR. */
5172 static rtx
5173 subst_indexed_address (addr)
5174 rtx addr;
5176 rtx op0 = 0, op1 = 0, op2 = 0;
5177 rtx tem;
5178 int regno;
5180 if (GET_CODE (addr) == PLUS)
5182 /* Try to find a register to replace. */
5183 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5184 if (GET_CODE (op0) == REG
5185 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5186 && reg_renumber[regno] < 0
5187 && reg_equiv_constant[regno] != 0)
5188 op0 = reg_equiv_constant[regno];
5189 else if (GET_CODE (op1) == REG
5190 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5191 && reg_renumber[regno] < 0
5192 && reg_equiv_constant[regno] != 0)
5193 op1 = reg_equiv_constant[regno];
5194 else if (GET_CODE (op0) == PLUS
5195 && (tem = subst_indexed_address (op0)) != op0)
5196 op0 = tem;
5197 else if (GET_CODE (op1) == PLUS
5198 && (tem = subst_indexed_address (op1)) != op1)
5199 op1 = tem;
5200 else
5201 return addr;
5203 /* Pick out up to three things to add. */
5204 if (GET_CODE (op1) == PLUS)
5205 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5206 else if (GET_CODE (op0) == PLUS)
5207 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5209 /* Compute the sum. */
5210 if (op2 != 0)
5211 op1 = form_sum (op1, op2);
5212 if (op1 != 0)
5213 op0 = form_sum (op0, op1);
5215 return op0;
5217 return addr;
5220 /* Update the REG_INC notes for an insn. It updates all REG_INC
5221 notes for the instruction which refer to REGNO the to refer
5222 to the reload number.
5224 INSN is the insn for which any REG_INC notes need updating.
5226 REGNO is the register number which has been reloaded.
5228 RELOADNUM is the reload number. */
5230 static void
5231 update_auto_inc_notes (insn, regno, reloadnum)
5232 rtx insn ATTRIBUTE_UNUSED;
5233 int regno ATTRIBUTE_UNUSED;
5234 int reloadnum ATTRIBUTE_UNUSED;
5236 #ifdef AUTO_INC_DEC
5237 rtx link;
5239 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5240 if (REG_NOTE_KIND (link) == REG_INC
5241 && (int) REGNO (XEXP (link, 0)) == regno)
5242 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5243 #endif
5246 /* Record the pseudo registers we must reload into hard registers in a
5247 subexpression of a would-be memory address, X referring to a value
5248 in mode MODE. (This function is not called if the address we find
5249 is strictly valid.)
5251 CONTEXT = 1 means we are considering regs as index regs,
5252 = 0 means we are considering them as base regs.
5254 OPNUM and TYPE specify the purpose of any reloads made.
5256 IND_LEVELS says how many levels of indirect addressing are
5257 supported at this point in the address.
5259 INSN, if nonzero, is the insn in which we do the reload. It is used
5260 to determine if we may generate output reloads.
5262 We return nonzero if X, as a whole, is reloaded or replaced. */
5264 /* Note that we take shortcuts assuming that no multi-reg machine mode
5265 occurs as part of an address.
5266 Also, this is not fully machine-customizable; it works for machines
5267 such as VAXen and 68000's and 32000's, but other possible machines
5268 could have addressing modes that this does not handle right. */
5270 static int
5271 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5272 enum machine_mode mode;
5273 rtx x;
5274 int context;
5275 rtx *loc;
5276 int opnum;
5277 enum reload_type type;
5278 int ind_levels;
5279 rtx insn;
5281 RTX_CODE code = GET_CODE (x);
5283 switch (code)
5285 case PLUS:
5287 rtx orig_op0 = XEXP (x, 0);
5288 rtx orig_op1 = XEXP (x, 1);
5289 RTX_CODE code0 = GET_CODE (orig_op0);
5290 RTX_CODE code1 = GET_CODE (orig_op1);
5291 rtx op0 = orig_op0;
5292 rtx op1 = orig_op1;
5294 if (GET_CODE (op0) == SUBREG)
5296 op0 = SUBREG_REG (op0);
5297 code0 = GET_CODE (op0);
5298 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5299 op0 = gen_rtx_REG (word_mode,
5300 (REGNO (op0) +
5301 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5302 GET_MODE (SUBREG_REG (orig_op0)),
5303 SUBREG_BYTE (orig_op0),
5304 GET_MODE (orig_op0))));
5307 if (GET_CODE (op1) == SUBREG)
5309 op1 = SUBREG_REG (op1);
5310 code1 = GET_CODE (op1);
5311 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5312 /* ??? Why is this given op1's mode and above for
5313 ??? op0 SUBREGs we use word_mode? */
5314 op1 = gen_rtx_REG (GET_MODE (op1),
5315 (REGNO (op1) +
5316 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5317 GET_MODE (SUBREG_REG (orig_op1)),
5318 SUBREG_BYTE (orig_op1),
5319 GET_MODE (orig_op1))));
5321 /* Plus in the index register may be created only as a result of
5322 register remateralization for expression like &localvar*4. Reload it.
5323 It may be possible to combine the displacement on the outer level,
5324 but it is probably not worthwhile to do so. */
5325 if (context)
5327 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5328 opnum, ADDR_TYPE (type), ind_levels, insn);
5329 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5330 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5331 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5332 return 1;
5335 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5336 || code0 == ZERO_EXTEND || code1 == MEM)
5338 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5339 type, ind_levels, insn);
5340 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5341 type, ind_levels, insn);
5344 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5345 || code1 == ZERO_EXTEND || code0 == MEM)
5347 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5348 type, ind_levels, insn);
5349 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5350 type, ind_levels, insn);
5353 else if (code0 == CONST_INT || code0 == CONST
5354 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5355 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5356 type, ind_levels, insn);
5358 else if (code1 == CONST_INT || code1 == CONST
5359 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5360 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5361 type, ind_levels, insn);
5363 else if (code0 == REG && code1 == REG)
5365 if (REG_OK_FOR_INDEX_P (op0)
5366 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5367 return 0;
5368 else if (REG_OK_FOR_INDEX_P (op1)
5369 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5370 return 0;
5371 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5372 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5373 type, ind_levels, insn);
5374 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5375 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5376 type, ind_levels, insn);
5377 else if (REG_OK_FOR_INDEX_P (op1))
5378 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5379 type, ind_levels, insn);
5380 else if (REG_OK_FOR_INDEX_P (op0))
5381 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5382 type, ind_levels, insn);
5383 else
5385 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5386 type, ind_levels, insn);
5387 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5388 type, ind_levels, insn);
5392 else if (code0 == REG)
5394 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5395 type, ind_levels, insn);
5396 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5397 type, ind_levels, insn);
5400 else if (code1 == REG)
5402 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5403 type, ind_levels, insn);
5404 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5405 type, ind_levels, insn);
5409 return 0;
5411 case POST_MODIFY:
5412 case PRE_MODIFY:
5414 rtx op0 = XEXP (x, 0);
5415 rtx op1 = XEXP (x, 1);
5417 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5418 return 0;
5420 /* Currently, we only support {PRE,POST}_MODIFY constructs
5421 where a base register is {inc,dec}remented by the contents
5422 of another register or by a constant value. Thus, these
5423 operands must match. */
5424 if (op0 != XEXP (op1, 0))
5425 abort ();
5427 /* Require index register (or constant). Let's just handle the
5428 register case in the meantime... If the target allows
5429 auto-modify by a constant then we could try replacing a pseudo
5430 register with its equivalent constant where applicable. */
5431 if (REG_P (XEXP (op1, 1)))
5432 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5433 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5434 opnum, type, ind_levels, insn);
5436 if (REG_P (XEXP (op1, 0)))
5438 int regno = REGNO (XEXP (op1, 0));
5439 int reloadnum;
5441 /* A register that is incremented cannot be constant! */
5442 if (regno >= FIRST_PSEUDO_REGISTER
5443 && reg_equiv_constant[regno] != 0)
5444 abort ();
5446 /* Handle a register that is equivalent to a memory location
5447 which cannot be addressed directly. */
5448 if (reg_equiv_memory_loc[regno] != 0
5449 && (reg_equiv_address[regno] != 0
5450 || num_not_at_initial_offset))
5452 rtx tem = make_memloc (XEXP (x, 0), regno);
5454 if (reg_equiv_address[regno]
5455 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5457 /* First reload the memory location's address.
5458 We can't use ADDR_TYPE (type) here, because we need to
5459 write back the value after reading it, hence we actually
5460 need two registers. */
5461 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5462 &XEXP (tem, 0), opnum,
5463 RELOAD_OTHER,
5464 ind_levels, insn);
5466 /* Then reload the memory location into a base
5467 register. */
5468 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5469 &XEXP (op1, 0),
5470 MODE_BASE_REG_CLASS (mode),
5471 GET_MODE (x), GET_MODE (x), 0,
5472 0, opnum, RELOAD_OTHER);
5474 update_auto_inc_notes (this_insn, regno, reloadnum);
5475 return 0;
5479 if (reg_renumber[regno] >= 0)
5480 regno = reg_renumber[regno];
5482 /* We require a base register here... */
5483 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5485 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5486 &XEXP (op1, 0), &XEXP (x, 0),
5487 MODE_BASE_REG_CLASS (mode),
5488 GET_MODE (x), GET_MODE (x), 0, 0,
5489 opnum, RELOAD_OTHER);
5491 update_auto_inc_notes (this_insn, regno, reloadnum);
5492 return 0;
5495 else
5496 abort ();
5498 return 0;
5500 case POST_INC:
5501 case POST_DEC:
5502 case PRE_INC:
5503 case PRE_DEC:
5504 if (GET_CODE (XEXP (x, 0)) == REG)
5506 int regno = REGNO (XEXP (x, 0));
5507 int value = 0;
5508 rtx x_orig = x;
5510 /* A register that is incremented cannot be constant! */
5511 if (regno >= FIRST_PSEUDO_REGISTER
5512 && reg_equiv_constant[regno] != 0)
5513 abort ();
5515 /* Handle a register that is equivalent to a memory location
5516 which cannot be addressed directly. */
5517 if (reg_equiv_memory_loc[regno] != 0
5518 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5520 rtx tem = make_memloc (XEXP (x, 0), regno);
5521 if (reg_equiv_address[regno]
5522 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5524 /* First reload the memory location's address.
5525 We can't use ADDR_TYPE (type) here, because we need to
5526 write back the value after reading it, hence we actually
5527 need two registers. */
5528 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5529 &XEXP (tem, 0), opnum, type,
5530 ind_levels, insn);
5531 /* Put this inside a new increment-expression. */
5532 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5533 /* Proceed to reload that, as if it contained a register. */
5537 /* If we have a hard register that is ok as an index,
5538 don't make a reload. If an autoincrement of a nice register
5539 isn't "valid", it must be that no autoincrement is "valid".
5540 If that is true and something made an autoincrement anyway,
5541 this must be a special context where one is allowed.
5542 (For example, a "push" instruction.)
5543 We can't improve this address, so leave it alone. */
5545 /* Otherwise, reload the autoincrement into a suitable hard reg
5546 and record how much to increment by. */
5548 if (reg_renumber[regno] >= 0)
5549 regno = reg_renumber[regno];
5550 if ((regno >= FIRST_PSEUDO_REGISTER
5551 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5552 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5554 int reloadnum;
5556 /* If we can output the register afterwards, do so, this
5557 saves the extra update.
5558 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5559 CALL_INSN - and it does not set CC0.
5560 But don't do this if we cannot directly address the
5561 memory location, since this will make it harder to
5562 reuse address reloads, and increases register pressure.
5563 Also don't do this if we can probably update x directly. */
5564 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5565 ? XEXP (x, 0)
5566 : reg_equiv_mem[regno]);
5567 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5568 if (insn && GET_CODE (insn) == INSN && equiv
5569 && memory_operand (equiv, GET_MODE (equiv))
5570 #ifdef HAVE_cc0
5571 && ! sets_cc0_p (PATTERN (insn))
5572 #endif
5573 && ! (icode != CODE_FOR_nothing
5574 && ((*insn_data[icode].operand[0].predicate)
5575 (equiv, Pmode))
5576 && ((*insn_data[icode].operand[1].predicate)
5577 (equiv, Pmode))))
5579 /* We use the original pseudo for loc, so that
5580 emit_reload_insns() knows which pseudo this
5581 reload refers to and updates the pseudo rtx, not
5582 its equivalent memory location, as well as the
5583 corresponding entry in reg_last_reload_reg. */
5584 loc = &XEXP (x_orig, 0);
5585 x = XEXP (x, 0);
5586 reloadnum
5587 = push_reload (x, x, loc, loc,
5588 (context ? INDEX_REG_CLASS :
5589 MODE_BASE_REG_CLASS (mode)),
5590 GET_MODE (x), GET_MODE (x), 0, 0,
5591 opnum, RELOAD_OTHER);
5593 else
5595 reloadnum
5596 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5597 (context ? INDEX_REG_CLASS :
5598 MODE_BASE_REG_CLASS (mode)),
5599 GET_MODE (x), GET_MODE (x), 0, 0,
5600 opnum, type);
5601 rld[reloadnum].inc
5602 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5604 value = 1;
5607 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5608 reloadnum);
5610 return value;
5613 else if (GET_CODE (XEXP (x, 0)) == MEM)
5615 /* This is probably the result of a substitution, by eliminate_regs,
5616 of an equivalent address for a pseudo that was not allocated to a
5617 hard register. Verify that the specified address is valid and
5618 reload it into a register. */
5619 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5620 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5621 rtx link;
5622 int reloadnum;
5624 /* Since we know we are going to reload this item, don't decrement
5625 for the indirection level.
5627 Note that this is actually conservative: it would be slightly
5628 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5629 reload1.c here. */
5630 /* We can't use ADDR_TYPE (type) here, because we need to
5631 write back the value after reading it, hence we actually
5632 need two registers. */
5633 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5634 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5635 opnum, type, ind_levels, insn);
5637 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5638 (context ? INDEX_REG_CLASS :
5639 MODE_BASE_REG_CLASS (mode)),
5640 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5641 rld[reloadnum].inc
5642 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5644 link = FIND_REG_INC_NOTE (this_insn, tem);
5645 if (link != 0)
5646 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5648 return 1;
5650 return 0;
5652 case MEM:
5653 /* This is probably the result of a substitution, by eliminate_regs, of
5654 an equivalent address for a pseudo that was not allocated to a hard
5655 register. Verify that the specified address is valid and reload it
5656 into a register.
5658 Since we know we are going to reload this item, don't decrement for
5659 the indirection level.
5661 Note that this is actually conservative: it would be slightly more
5662 efficient to use the value of SPILL_INDIRECT_LEVELS from
5663 reload1.c here. */
5665 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5666 opnum, ADDR_TYPE (type), ind_levels, insn);
5667 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5668 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5669 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5670 return 1;
5672 case REG:
5674 int regno = REGNO (x);
5676 if (reg_equiv_constant[regno] != 0)
5678 find_reloads_address_part (reg_equiv_constant[regno], loc,
5679 (context ? INDEX_REG_CLASS :
5680 MODE_BASE_REG_CLASS (mode)),
5681 GET_MODE (x), opnum, type, ind_levels);
5682 return 1;
5685 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5686 that feeds this insn. */
5687 if (reg_equiv_mem[regno] != 0)
5689 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5690 (context ? INDEX_REG_CLASS :
5691 MODE_BASE_REG_CLASS (mode)),
5692 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5693 return 1;
5695 #endif
5697 if (reg_equiv_memory_loc[regno]
5698 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5700 rtx tem = make_memloc (x, regno);
5701 if (reg_equiv_address[regno] != 0
5702 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5704 x = tem;
5705 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5706 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5707 ind_levels, insn);
5711 if (reg_renumber[regno] >= 0)
5712 regno = reg_renumber[regno];
5714 if ((regno >= FIRST_PSEUDO_REGISTER
5715 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5716 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5718 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5719 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5720 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5721 return 1;
5724 /* If a register appearing in an address is the subject of a CLOBBER
5725 in this insn, reload it into some other register to be safe.
5726 The CLOBBER is supposed to make the register unavailable
5727 from before this insn to after it. */
5728 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5730 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5731 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5732 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5733 return 1;
5736 return 0;
5738 case SUBREG:
5739 if (GET_CODE (SUBREG_REG (x)) == REG)
5741 /* If this is a SUBREG of a hard register and the resulting register
5742 is of the wrong class, reload the whole SUBREG. This avoids
5743 needless copies if SUBREG_REG is multi-word. */
5744 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5746 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5748 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5749 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5751 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5752 (context ? INDEX_REG_CLASS :
5753 MODE_BASE_REG_CLASS (mode)),
5754 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5755 return 1;
5758 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5759 is larger than the class size, then reload the whole SUBREG. */
5760 else
5762 enum reg_class class = (context ? INDEX_REG_CLASS
5763 : MODE_BASE_REG_CLASS (mode));
5764 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5765 > reg_class_size[class])
5767 x = find_reloads_subreg_address (x, 0, opnum, type,
5768 ind_levels, insn);
5769 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5770 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5771 return 1;
5775 break;
5777 default:
5778 break;
5782 const char *fmt = GET_RTX_FORMAT (code);
5783 int i;
5785 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5787 if (fmt[i] == 'e')
5788 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5789 opnum, type, ind_levels, insn);
5793 return 0;
5796 /* X, which is found at *LOC, is a part of an address that needs to be
5797 reloaded into a register of class CLASS. If X is a constant, or if
5798 X is a PLUS that contains a constant, check that the constant is a
5799 legitimate operand and that we are supposed to be able to load
5800 it into the register.
5802 If not, force the constant into memory and reload the MEM instead.
5804 MODE is the mode to use, in case X is an integer constant.
5806 OPNUM and TYPE describe the purpose of any reloads made.
5808 IND_LEVELS says how many levels of indirect addressing this machine
5809 supports. */
5811 static void
5812 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5813 rtx x;
5814 rtx *loc;
5815 enum reg_class class;
5816 enum machine_mode mode;
5817 int opnum;
5818 enum reload_type type;
5819 int ind_levels;
5821 if (CONSTANT_P (x)
5822 && (! LEGITIMATE_CONSTANT_P (x)
5823 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5825 rtx tem;
5827 tem = x = force_const_mem (mode, x);
5828 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5829 opnum, type, ind_levels, 0);
5832 else if (GET_CODE (x) == PLUS
5833 && CONSTANT_P (XEXP (x, 1))
5834 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5835 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5837 rtx tem;
5839 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5840 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5841 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5842 opnum, type, ind_levels, 0);
5845 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5846 mode, VOIDmode, 0, 0, opnum, type);
5849 /* X, a subreg of a pseudo, is a part of an address that needs to be
5850 reloaded.
5852 If the pseudo is equivalent to a memory location that cannot be directly
5853 addressed, make the necessary address reloads.
5855 If address reloads have been necessary, or if the address is changed
5856 by register elimination, return the rtx of the memory location;
5857 otherwise, return X.
5859 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5860 memory location.
5862 OPNUM and TYPE identify the purpose of the reload.
5864 IND_LEVELS says how many levels of indirect addressing are
5865 supported at this point in the address.
5867 INSN, if nonzero, is the insn in which we do the reload. It is used
5868 to determine where to put USEs for pseudos that we have to replace with
5869 stack slots. */
5871 static rtx
5872 find_reloads_subreg_address (x, force_replace, opnum, type,
5873 ind_levels, insn)
5874 rtx x;
5875 int force_replace;
5876 int opnum;
5877 enum reload_type type;
5878 int ind_levels;
5879 rtx insn;
5881 int regno = REGNO (SUBREG_REG (x));
5883 if (reg_equiv_memory_loc[regno])
5885 /* If the address is not directly addressable, or if the address is not
5886 offsettable, then it must be replaced. */
5887 if (! force_replace
5888 && (reg_equiv_address[regno]
5889 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5890 force_replace = 1;
5892 if (force_replace || num_not_at_initial_offset)
5894 rtx tem = make_memloc (SUBREG_REG (x), regno);
5896 /* If the address changes because of register elimination, then
5897 it must be replaced. */
5898 if (force_replace
5899 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5901 int offset = SUBREG_BYTE (x);
5902 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5903 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5905 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5906 PUT_MODE (tem, GET_MODE (x));
5908 /* If this was a paradoxical subreg that we replaced, the
5909 resulting memory must be sufficiently aligned to allow
5910 us to widen the mode of the memory. */
5911 if (outer_size > inner_size && STRICT_ALIGNMENT)
5913 rtx base;
5915 base = XEXP (tem, 0);
5916 if (GET_CODE (base) == PLUS)
5918 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5919 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5920 return x;
5921 base = XEXP (base, 0);
5923 if (GET_CODE (base) != REG
5924 || (REGNO_POINTER_ALIGN (REGNO (base))
5925 < outer_size * BITS_PER_UNIT))
5926 return x;
5929 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5930 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5931 ind_levels, insn);
5933 /* If this is not a toplevel operand, find_reloads doesn't see
5934 this substitution. We have to emit a USE of the pseudo so
5935 that delete_output_reload can see it. */
5936 if (replace_reloads && recog_data.operand[opnum] != x)
5937 /* We mark the USE with QImode so that we recognize it
5938 as one that can be safely deleted at the end of
5939 reload. */
5940 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5941 SUBREG_REG (x)),
5942 insn), QImode);
5943 x = tem;
5947 return x;
5950 /* Substitute into the current INSN the registers into which we have reloaded
5951 the things that need reloading. The array `replacements'
5952 contains the locations of all pointers that must be changed
5953 and says what to replace them with.
5955 Return the rtx that X translates into; usually X, but modified. */
5957 void
5958 subst_reloads (insn)
5959 rtx insn;
5961 int i;
5963 for (i = 0; i < n_replacements; i++)
5965 struct replacement *r = &replacements[i];
5966 rtx reloadreg = rld[r->what].reg_rtx;
5967 if (reloadreg)
5969 #ifdef ENABLE_CHECKING
5970 /* Internal consistency test. Check that we don't modify
5971 anything in the equivalence arrays. Whenever something from
5972 those arrays needs to be reloaded, it must be unshared before
5973 being substituted into; the equivalence must not be modified.
5974 Otherwise, if the equivalence is used after that, it will
5975 have been modified, and the thing substituted (probably a
5976 register) is likely overwritten and not a usable equivalence. */
5977 int check_regno;
5979 for (check_regno = 0; check_regno < max_regno; check_regno++)
5981 #define CHECK_MODF(ARRAY) \
5982 if (ARRAY[check_regno] \
5983 && loc_mentioned_in_p (r->where, \
5984 ARRAY[check_regno])) \
5985 abort ()
5987 CHECK_MODF (reg_equiv_constant);
5988 CHECK_MODF (reg_equiv_memory_loc);
5989 CHECK_MODF (reg_equiv_address);
5990 CHECK_MODF (reg_equiv_mem);
5991 #undef CHECK_MODF
5993 #endif /* ENABLE_CHECKING */
5995 /* If we're replacing a LABEL_REF with a register, add a
5996 REG_LABEL note to indicate to flow which label this
5997 register refers to. */
5998 if (GET_CODE (*r->where) == LABEL_REF
5999 && GET_CODE (insn) == JUMP_INSN)
6000 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
6001 XEXP (*r->where, 0),
6002 REG_NOTES (insn));
6004 /* Encapsulate RELOADREG so its machine mode matches what
6005 used to be there. Note that gen_lowpart_common will
6006 do the wrong thing if RELOADREG is multi-word. RELOADREG
6007 will always be a REG here. */
6008 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6009 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6011 /* If we are putting this into a SUBREG and RELOADREG is a
6012 SUBREG, we would be making nested SUBREGs, so we have to fix
6013 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6015 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6017 if (GET_MODE (*r->subreg_loc)
6018 == GET_MODE (SUBREG_REG (reloadreg)))
6019 *r->subreg_loc = SUBREG_REG (reloadreg);
6020 else
6022 int final_offset =
6023 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6025 /* When working with SUBREGs the rule is that the byte
6026 offset must be a multiple of the SUBREG's mode. */
6027 final_offset = (final_offset /
6028 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6029 final_offset = (final_offset *
6030 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6032 *r->where = SUBREG_REG (reloadreg);
6033 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6036 else
6037 *r->where = reloadreg;
6039 /* If reload got no reg and isn't optional, something's wrong. */
6040 else if (! rld[r->what].optional)
6041 abort ();
6045 /* Make a copy of any replacements being done into X and move those
6046 copies to locations in Y, a copy of X. */
6048 void
6049 copy_replacements (x, y)
6050 rtx x, y;
6052 /* We can't support X being a SUBREG because we might then need to know its
6053 location if something inside it was replaced. */
6054 if (GET_CODE (x) == SUBREG)
6055 abort ();
6057 copy_replacements_1 (&x, &y, n_replacements);
6060 static void
6061 copy_replacements_1 (px, py, orig_replacements)
6062 rtx *px;
6063 rtx *py;
6064 int orig_replacements;
6066 int i, j;
6067 rtx x, y;
6068 struct replacement *r;
6069 enum rtx_code code;
6070 const char *fmt;
6072 for (j = 0; j < orig_replacements; j++)
6074 if (replacements[j].subreg_loc == px)
6076 r = &replacements[n_replacements++];
6077 r->where = replacements[j].where;
6078 r->subreg_loc = py;
6079 r->what = replacements[j].what;
6080 r->mode = replacements[j].mode;
6082 else if (replacements[j].where == px)
6084 r = &replacements[n_replacements++];
6085 r->where = py;
6086 r->subreg_loc = 0;
6087 r->what = replacements[j].what;
6088 r->mode = replacements[j].mode;
6092 x = *px;
6093 y = *py;
6094 code = GET_CODE (x);
6095 fmt = GET_RTX_FORMAT (code);
6097 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6099 if (fmt[i] == 'e')
6100 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6101 else if (fmt[i] == 'E')
6102 for (j = XVECLEN (x, i); --j >= 0; )
6103 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6104 orig_replacements);
6108 /* Change any replacements being done to *X to be done to *Y. */
6110 void
6111 move_replacements (x, y)
6112 rtx *x;
6113 rtx *y;
6115 int i;
6117 for (i = 0; i < n_replacements; i++)
6118 if (replacements[i].subreg_loc == x)
6119 replacements[i].subreg_loc = y;
6120 else if (replacements[i].where == x)
6122 replacements[i].where = y;
6123 replacements[i].subreg_loc = 0;
6127 /* If LOC was scheduled to be replaced by something, return the replacement.
6128 Otherwise, return *LOC. */
6131 find_replacement (loc)
6132 rtx *loc;
6134 struct replacement *r;
6136 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6138 rtx reloadreg = rld[r->what].reg_rtx;
6140 if (reloadreg && r->where == loc)
6142 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6143 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6145 return reloadreg;
6147 else if (reloadreg && r->subreg_loc == loc)
6149 /* RELOADREG must be either a REG or a SUBREG.
6151 ??? Is it actually still ever a SUBREG? If so, why? */
6153 if (GET_CODE (reloadreg) == REG)
6154 return gen_rtx_REG (GET_MODE (*loc),
6155 (REGNO (reloadreg) +
6156 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6157 GET_MODE (SUBREG_REG (*loc)),
6158 SUBREG_BYTE (*loc),
6159 GET_MODE (*loc))));
6160 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6161 return reloadreg;
6162 else
6164 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6166 /* When working with SUBREGs the rule is that the byte
6167 offset must be a multiple of the SUBREG's mode. */
6168 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6169 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6170 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6171 final_offset);
6176 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6177 what's inside and make a new rtl if so. */
6178 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6179 || GET_CODE (*loc) == MULT)
6181 rtx x = find_replacement (&XEXP (*loc, 0));
6182 rtx y = find_replacement (&XEXP (*loc, 1));
6184 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6185 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6188 return *loc;
6191 /* Return nonzero if register in range [REGNO, ENDREGNO)
6192 appears either explicitly or implicitly in X
6193 other than being stored into (except for earlyclobber operands).
6195 References contained within the substructure at LOC do not count.
6196 LOC may be zero, meaning don't ignore anything.
6198 This is similar to refers_to_regno_p in rtlanal.c except that we
6199 look at equivalences for pseudos that didn't get hard registers. */
6202 refers_to_regno_for_reload_p (regno, endregno, x, loc)
6203 unsigned int regno, endregno;
6204 rtx x;
6205 rtx *loc;
6207 int i;
6208 unsigned int r;
6209 RTX_CODE code;
6210 const char *fmt;
6212 if (x == 0)
6213 return 0;
6215 repeat:
6216 code = GET_CODE (x);
6218 switch (code)
6220 case REG:
6221 r = REGNO (x);
6223 /* If this is a pseudo, a hard register must not have been allocated.
6224 X must therefore either be a constant or be in memory. */
6225 if (r >= FIRST_PSEUDO_REGISTER)
6227 if (reg_equiv_memory_loc[r])
6228 return refers_to_regno_for_reload_p (regno, endregno,
6229 reg_equiv_memory_loc[r],
6230 (rtx*) 0);
6232 if (reg_equiv_constant[r])
6233 return 0;
6235 abort ();
6238 return (endregno > r
6239 && regno < r + (r < FIRST_PSEUDO_REGISTER
6240 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6241 : 1));
6243 case SUBREG:
6244 /* If this is a SUBREG of a hard reg, we can see exactly which
6245 registers are being modified. Otherwise, handle normally. */
6246 if (GET_CODE (SUBREG_REG (x)) == REG
6247 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6249 unsigned int inner_regno = subreg_regno (x);
6250 unsigned int inner_endregno
6251 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6252 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6254 return endregno > inner_regno && regno < inner_endregno;
6256 break;
6258 case CLOBBER:
6259 case SET:
6260 if (&SET_DEST (x) != loc
6261 /* Note setting a SUBREG counts as referring to the REG it is in for
6262 a pseudo but not for hard registers since we can
6263 treat each word individually. */
6264 && ((GET_CODE (SET_DEST (x)) == SUBREG
6265 && loc != &SUBREG_REG (SET_DEST (x))
6266 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6267 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6268 && refers_to_regno_for_reload_p (regno, endregno,
6269 SUBREG_REG (SET_DEST (x)),
6270 loc))
6271 /* If the output is an earlyclobber operand, this is
6272 a conflict. */
6273 || ((GET_CODE (SET_DEST (x)) != REG
6274 || earlyclobber_operand_p (SET_DEST (x)))
6275 && refers_to_regno_for_reload_p (regno, endregno,
6276 SET_DEST (x), loc))))
6277 return 1;
6279 if (code == CLOBBER || loc == &SET_SRC (x))
6280 return 0;
6281 x = SET_SRC (x);
6282 goto repeat;
6284 default:
6285 break;
6288 /* X does not match, so try its subexpressions. */
6290 fmt = GET_RTX_FORMAT (code);
6291 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6293 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6295 if (i == 0)
6297 x = XEXP (x, 0);
6298 goto repeat;
6300 else
6301 if (refers_to_regno_for_reload_p (regno, endregno,
6302 XEXP (x, i), loc))
6303 return 1;
6305 else if (fmt[i] == 'E')
6307 int j;
6308 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6309 if (loc != &XVECEXP (x, i, j)
6310 && refers_to_regno_for_reload_p (regno, endregno,
6311 XVECEXP (x, i, j), loc))
6312 return 1;
6315 return 0;
6318 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6319 we check if any register number in X conflicts with the relevant register
6320 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6321 contains a MEM (we don't bother checking for memory addresses that can't
6322 conflict because we expect this to be a rare case.
6324 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6325 that we look at equivalences for pseudos that didn't get hard registers. */
6328 reg_overlap_mentioned_for_reload_p (x, in)
6329 rtx x, in;
6331 int regno, endregno;
6333 /* Overly conservative. */
6334 if (GET_CODE (x) == STRICT_LOW_PART
6335 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6336 x = XEXP (x, 0);
6338 /* If either argument is a constant, then modifying X can not affect IN. */
6339 if (CONSTANT_P (x) || CONSTANT_P (in))
6340 return 0;
6341 else if (GET_CODE (x) == SUBREG)
6343 regno = REGNO (SUBREG_REG (x));
6344 if (regno < FIRST_PSEUDO_REGISTER)
6345 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6346 GET_MODE (SUBREG_REG (x)),
6347 SUBREG_BYTE (x),
6348 GET_MODE (x));
6350 else if (GET_CODE (x) == REG)
6352 regno = REGNO (x);
6354 /* If this is a pseudo, it must not have been assigned a hard register.
6355 Therefore, it must either be in memory or be a constant. */
6357 if (regno >= FIRST_PSEUDO_REGISTER)
6359 if (reg_equiv_memory_loc[regno])
6360 return refers_to_mem_for_reload_p (in);
6361 else if (reg_equiv_constant[regno])
6362 return 0;
6363 abort ();
6366 else if (GET_CODE (x) == MEM)
6367 return refers_to_mem_for_reload_p (in);
6368 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6369 || GET_CODE (x) == CC0)
6370 return reg_mentioned_p (x, in);
6371 else if (GET_CODE (x) == PLUS)
6372 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6373 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6374 else
6375 abort ();
6377 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6378 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6380 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6383 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6384 registers. */
6387 refers_to_mem_for_reload_p (x)
6388 rtx x;
6390 const char *fmt;
6391 int i;
6393 if (GET_CODE (x) == MEM)
6394 return 1;
6396 if (GET_CODE (x) == REG)
6397 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6398 && reg_equiv_memory_loc[REGNO (x)]);
6400 fmt = GET_RTX_FORMAT (GET_CODE (x));
6401 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6402 if (fmt[i] == 'e'
6403 && (GET_CODE (XEXP (x, i)) == MEM
6404 || refers_to_mem_for_reload_p (XEXP (x, i))))
6405 return 1;
6407 return 0;
6410 /* Check the insns before INSN to see if there is a suitable register
6411 containing the same value as GOAL.
6412 If OTHER is -1, look for a register in class CLASS.
6413 Otherwise, just see if register number OTHER shares GOAL's value.
6415 Return an rtx for the register found, or zero if none is found.
6417 If RELOAD_REG_P is (short *)1,
6418 we reject any hard reg that appears in reload_reg_rtx
6419 because such a hard reg is also needed coming into this insn.
6421 If RELOAD_REG_P is any other nonzero value,
6422 it is a vector indexed by hard reg number
6423 and we reject any hard reg whose element in the vector is nonnegative
6424 as well as any that appears in reload_reg_rtx.
6426 If GOAL is zero, then GOALREG is a register number; we look
6427 for an equivalent for that register.
6429 MODE is the machine mode of the value we want an equivalence for.
6430 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6432 This function is used by jump.c as well as in the reload pass.
6434 If GOAL is the sum of the stack pointer and a constant, we treat it
6435 as if it were a constant except that sp is required to be unchanging. */
6438 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6439 rtx goal;
6440 rtx insn;
6441 enum reg_class class;
6442 int other;
6443 short *reload_reg_p;
6444 int goalreg;
6445 enum machine_mode mode;
6447 rtx p = insn;
6448 rtx goaltry, valtry, value, where;
6449 rtx pat;
6450 int regno = -1;
6451 int valueno;
6452 int goal_mem = 0;
6453 int goal_const = 0;
6454 int goal_mem_addr_varies = 0;
6455 int need_stable_sp = 0;
6456 int nregs;
6457 int valuenregs;
6459 if (goal == 0)
6460 regno = goalreg;
6461 else if (GET_CODE (goal) == REG)
6462 regno = REGNO (goal);
6463 else if (GET_CODE (goal) == MEM)
6465 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6466 if (MEM_VOLATILE_P (goal))
6467 return 0;
6468 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6469 return 0;
6470 /* An address with side effects must be reexecuted. */
6471 switch (code)
6473 case POST_INC:
6474 case PRE_INC:
6475 case POST_DEC:
6476 case PRE_DEC:
6477 case POST_MODIFY:
6478 case PRE_MODIFY:
6479 return 0;
6480 default:
6481 break;
6483 goal_mem = 1;
6485 else if (CONSTANT_P (goal))
6486 goal_const = 1;
6487 else if (GET_CODE (goal) == PLUS
6488 && XEXP (goal, 0) == stack_pointer_rtx
6489 && CONSTANT_P (XEXP (goal, 1)))
6490 goal_const = need_stable_sp = 1;
6491 else if (GET_CODE (goal) == PLUS
6492 && XEXP (goal, 0) == frame_pointer_rtx
6493 && CONSTANT_P (XEXP (goal, 1)))
6494 goal_const = 1;
6495 else
6496 return 0;
6498 /* Scan insns back from INSN, looking for one that copies
6499 a value into or out of GOAL.
6500 Stop and give up if we reach a label. */
6502 while (1)
6504 p = PREV_INSN (p);
6505 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6506 return 0;
6508 if (GET_CODE (p) == INSN
6509 /* If we don't want spill regs ... */
6510 && (! (reload_reg_p != 0
6511 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6512 /* ... then ignore insns introduced by reload; they aren't
6513 useful and can cause results in reload_as_needed to be
6514 different from what they were when calculating the need for
6515 spills. If we notice an input-reload insn here, we will
6516 reject it below, but it might hide a usable equivalent.
6517 That makes bad code. It may even abort: perhaps no reg was
6518 spilled for this insn because it was assumed we would find
6519 that equivalent. */
6520 || INSN_UID (p) < reload_first_uid))
6522 rtx tem;
6523 pat = single_set (p);
6525 /* First check for something that sets some reg equal to GOAL. */
6526 if (pat != 0
6527 && ((regno >= 0
6528 && true_regnum (SET_SRC (pat)) == regno
6529 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6531 (regno >= 0
6532 && true_regnum (SET_DEST (pat)) == regno
6533 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6535 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6536 /* When looking for stack pointer + const,
6537 make sure we don't use a stack adjust. */
6538 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6539 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6540 || (goal_mem
6541 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6542 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6543 || (goal_mem
6544 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6545 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6546 /* If we are looking for a constant,
6547 and something equivalent to that constant was copied
6548 into a reg, we can use that reg. */
6549 || (goal_const && REG_NOTES (p) != 0
6550 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6551 && ((rtx_equal_p (XEXP (tem, 0), goal)
6552 && (valueno
6553 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6554 || (GET_CODE (SET_DEST (pat)) == REG
6555 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6556 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6557 == MODE_FLOAT)
6558 && GET_CODE (goal) == CONST_INT
6559 && 0 != (goaltry
6560 = operand_subword (XEXP (tem, 0), 0, 0,
6561 VOIDmode))
6562 && rtx_equal_p (goal, goaltry)
6563 && (valtry
6564 = operand_subword (SET_DEST (pat), 0, 0,
6565 VOIDmode))
6566 && (valueno = true_regnum (valtry)) >= 0)))
6567 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6568 NULL_RTX))
6569 && GET_CODE (SET_DEST (pat)) == REG
6570 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6571 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6572 == MODE_FLOAT)
6573 && GET_CODE (goal) == CONST_INT
6574 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6575 VOIDmode))
6576 && rtx_equal_p (goal, goaltry)
6577 && (valtry
6578 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6579 && (valueno = true_regnum (valtry)) >= 0)))
6581 if (other >= 0)
6583 if (valueno != other)
6584 continue;
6586 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6587 continue;
6588 else
6590 int i;
6592 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6593 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6594 valueno + i))
6595 break;
6596 if (i >= 0)
6597 continue;
6599 value = valtry;
6600 where = p;
6601 break;
6606 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6607 (or copying VALUE into GOAL, if GOAL is also a register).
6608 Now verify that VALUE is really valid. */
6610 /* VALUENO is the register number of VALUE; a hard register. */
6612 /* Don't try to re-use something that is killed in this insn. We want
6613 to be able to trust REG_UNUSED notes. */
6614 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6615 return 0;
6617 /* If we propose to get the value from the stack pointer or if GOAL is
6618 a MEM based on the stack pointer, we need a stable SP. */
6619 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6620 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6621 goal)))
6622 need_stable_sp = 1;
6624 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6625 if (GET_MODE (value) != mode)
6626 return 0;
6628 /* Reject VALUE if it was loaded from GOAL
6629 and is also a register that appears in the address of GOAL. */
6631 if (goal_mem && value == SET_DEST (single_set (where))
6632 && refers_to_regno_for_reload_p (valueno,
6633 (valueno
6634 + HARD_REGNO_NREGS (valueno, mode)),
6635 goal, (rtx*) 0))
6636 return 0;
6638 /* Reject registers that overlap GOAL. */
6640 if (!goal_mem && !goal_const
6641 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6642 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6643 return 0;
6645 nregs = HARD_REGNO_NREGS (regno, mode);
6646 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6648 /* Reject VALUE if it is one of the regs reserved for reloads.
6649 Reload1 knows how to reuse them anyway, and it would get
6650 confused if we allocated one without its knowledge.
6651 (Now that insns introduced by reload are ignored above,
6652 this case shouldn't happen, but I'm not positive.) */
6654 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6656 int i;
6657 for (i = 0; i < valuenregs; ++i)
6658 if (reload_reg_p[valueno + i] >= 0)
6659 return 0;
6662 /* Reject VALUE if it is a register being used for an input reload
6663 even if it is not one of those reserved. */
6665 if (reload_reg_p != 0)
6667 int i;
6668 for (i = 0; i < n_reloads; i++)
6669 if (rld[i].reg_rtx != 0 && rld[i].in)
6671 int regno1 = REGNO (rld[i].reg_rtx);
6672 int nregs1 = HARD_REGNO_NREGS (regno1,
6673 GET_MODE (rld[i].reg_rtx));
6674 if (regno1 < valueno + valuenregs
6675 && regno1 + nregs1 > valueno)
6676 return 0;
6680 if (goal_mem)
6681 /* We must treat frame pointer as varying here,
6682 since it can vary--in a nonlocal goto as generated by expand_goto. */
6683 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6685 /* Now verify that the values of GOAL and VALUE remain unaltered
6686 until INSN is reached. */
6688 p = insn;
6689 while (1)
6691 p = PREV_INSN (p);
6692 if (p == where)
6693 return value;
6695 /* Don't trust the conversion past a function call
6696 if either of the two is in a call-clobbered register, or memory. */
6697 if (GET_CODE (p) == CALL_INSN)
6699 int i;
6701 if (goal_mem || need_stable_sp)
6702 return 0;
6704 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6705 for (i = 0; i < nregs; ++i)
6706 if (call_used_regs[regno + i])
6707 return 0;
6709 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6710 for (i = 0; i < valuenregs; ++i)
6711 if (call_used_regs[valueno + i])
6712 return 0;
6713 #ifdef NON_SAVING_SETJMP
6714 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6715 return 0;
6716 #endif
6719 if (INSN_P (p))
6721 pat = PATTERN (p);
6723 /* Watch out for unspec_volatile, and volatile asms. */
6724 if (volatile_insn_p (pat))
6725 return 0;
6727 /* If this insn P stores in either GOAL or VALUE, return 0.
6728 If GOAL is a memory ref and this insn writes memory, return 0.
6729 If GOAL is a memory ref and its address is not constant,
6730 and this insn P changes a register used in GOAL, return 0. */
6732 if (GET_CODE (pat) == COND_EXEC)
6733 pat = COND_EXEC_CODE (pat);
6734 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6736 rtx dest = SET_DEST (pat);
6737 while (GET_CODE (dest) == SUBREG
6738 || GET_CODE (dest) == ZERO_EXTRACT
6739 || GET_CODE (dest) == SIGN_EXTRACT
6740 || GET_CODE (dest) == STRICT_LOW_PART)
6741 dest = XEXP (dest, 0);
6742 if (GET_CODE (dest) == REG)
6744 int xregno = REGNO (dest);
6745 int xnregs;
6746 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6747 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6748 else
6749 xnregs = 1;
6750 if (xregno < regno + nregs && xregno + xnregs > regno)
6751 return 0;
6752 if (xregno < valueno + valuenregs
6753 && xregno + xnregs > valueno)
6754 return 0;
6755 if (goal_mem_addr_varies
6756 && reg_overlap_mentioned_for_reload_p (dest, goal))
6757 return 0;
6758 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6759 return 0;
6761 else if (goal_mem && GET_CODE (dest) == MEM
6762 && ! push_operand (dest, GET_MODE (dest)))
6763 return 0;
6764 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6765 && reg_equiv_memory_loc[regno] != 0)
6766 return 0;
6767 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6768 return 0;
6770 else if (GET_CODE (pat) == PARALLEL)
6772 int i;
6773 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6775 rtx v1 = XVECEXP (pat, 0, i);
6776 if (GET_CODE (v1) == COND_EXEC)
6777 v1 = COND_EXEC_CODE (v1);
6778 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6780 rtx dest = SET_DEST (v1);
6781 while (GET_CODE (dest) == SUBREG
6782 || GET_CODE (dest) == ZERO_EXTRACT
6783 || GET_CODE (dest) == SIGN_EXTRACT
6784 || GET_CODE (dest) == STRICT_LOW_PART)
6785 dest = XEXP (dest, 0);
6786 if (GET_CODE (dest) == REG)
6788 int xregno = REGNO (dest);
6789 int xnregs;
6790 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6791 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6792 else
6793 xnregs = 1;
6794 if (xregno < regno + nregs
6795 && xregno + xnregs > regno)
6796 return 0;
6797 if (xregno < valueno + valuenregs
6798 && xregno + xnregs > valueno)
6799 return 0;
6800 if (goal_mem_addr_varies
6801 && reg_overlap_mentioned_for_reload_p (dest,
6802 goal))
6803 return 0;
6804 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6805 return 0;
6807 else if (goal_mem && GET_CODE (dest) == MEM
6808 && ! push_operand (dest, GET_MODE (dest)))
6809 return 0;
6810 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6811 && reg_equiv_memory_loc[regno] != 0)
6812 return 0;
6813 else if (need_stable_sp
6814 && push_operand (dest, GET_MODE (dest)))
6815 return 0;
6820 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6822 rtx link;
6824 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6825 link = XEXP (link, 1))
6827 pat = XEXP (link, 0);
6828 if (GET_CODE (pat) == CLOBBER)
6830 rtx dest = SET_DEST (pat);
6832 if (GET_CODE (dest) == REG)
6834 int xregno = REGNO (dest);
6835 int xnregs
6836 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6838 if (xregno < regno + nregs
6839 && xregno + xnregs > regno)
6840 return 0;
6841 else if (xregno < valueno + valuenregs
6842 && xregno + xnregs > valueno)
6843 return 0;
6844 else if (goal_mem_addr_varies
6845 && reg_overlap_mentioned_for_reload_p (dest,
6846 goal))
6847 return 0;
6850 else if (goal_mem && GET_CODE (dest) == MEM
6851 && ! push_operand (dest, GET_MODE (dest)))
6852 return 0;
6853 else if (need_stable_sp
6854 && push_operand (dest, GET_MODE (dest)))
6855 return 0;
6860 #ifdef AUTO_INC_DEC
6861 /* If this insn auto-increments or auto-decrements
6862 either regno or valueno, return 0 now.
6863 If GOAL is a memory ref and its address is not constant,
6864 and this insn P increments a register used in GOAL, return 0. */
6866 rtx link;
6868 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6869 if (REG_NOTE_KIND (link) == REG_INC
6870 && GET_CODE (XEXP (link, 0)) == REG)
6872 int incno = REGNO (XEXP (link, 0));
6873 if (incno < regno + nregs && incno >= regno)
6874 return 0;
6875 if (incno < valueno + valuenregs && incno >= valueno)
6876 return 0;
6877 if (goal_mem_addr_varies
6878 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6879 goal))
6880 return 0;
6883 #endif
6888 /* Find a place where INCED appears in an increment or decrement operator
6889 within X, and return the amount INCED is incremented or decremented by.
6890 The value is always positive. */
6892 static int
6893 find_inc_amount (x, inced)
6894 rtx x, inced;
6896 enum rtx_code code = GET_CODE (x);
6897 const char *fmt;
6898 int i;
6900 if (code == MEM)
6902 rtx addr = XEXP (x, 0);
6903 if ((GET_CODE (addr) == PRE_DEC
6904 || GET_CODE (addr) == POST_DEC
6905 || GET_CODE (addr) == PRE_INC
6906 || GET_CODE (addr) == POST_INC)
6907 && XEXP (addr, 0) == inced)
6908 return GET_MODE_SIZE (GET_MODE (x));
6909 else if ((GET_CODE (addr) == PRE_MODIFY
6910 || GET_CODE (addr) == POST_MODIFY)
6911 && GET_CODE (XEXP (addr, 1)) == PLUS
6912 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6913 && XEXP (addr, 0) == inced
6914 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6916 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6917 return i < 0 ? -i : i;
6921 fmt = GET_RTX_FORMAT (code);
6922 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6924 if (fmt[i] == 'e')
6926 int tem = find_inc_amount (XEXP (x, i), inced);
6927 if (tem != 0)
6928 return tem;
6930 if (fmt[i] == 'E')
6932 int j;
6933 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6935 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6936 if (tem != 0)
6937 return tem;
6942 return 0;
6945 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6946 If SETS is nonzero, also consider SETs. */
6949 regno_clobbered_p (regno, insn, mode, sets)
6950 unsigned int regno;
6951 rtx insn;
6952 enum machine_mode mode;
6953 int sets;
6955 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6956 unsigned int endregno = regno + nregs;
6958 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6959 || (sets && GET_CODE (PATTERN (insn)) == SET))
6960 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6962 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6964 return test >= regno && test < endregno;
6967 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6969 int i = XVECLEN (PATTERN (insn), 0) - 1;
6971 for (; i >= 0; i--)
6973 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6974 if ((GET_CODE (elt) == CLOBBER
6975 || (sets && GET_CODE (PATTERN (insn)) == SET))
6976 && GET_CODE (XEXP (elt, 0)) == REG)
6978 unsigned int test = REGNO (XEXP (elt, 0));
6980 if (test >= regno && test < endregno)
6981 return 1;
6986 return 0;
6989 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6991 reload_adjust_reg_for_mode (reloadreg, mode)
6992 rtx reloadreg;
6993 enum machine_mode mode;
6995 int regno;
6997 if (GET_MODE (reloadreg) == mode)
6998 return reloadreg;
7000 regno = REGNO (reloadreg);
7002 if (WORDS_BIG_ENDIAN)
7003 regno += HARD_REGNO_NREGS (regno, GET_MODE (reloadreg))
7004 - HARD_REGNO_NREGS (regno, mode);
7006 return gen_rtx_REG (mode, regno);
7009 static const char *const reload_when_needed_name[] =
7011 "RELOAD_FOR_INPUT",
7012 "RELOAD_FOR_OUTPUT",
7013 "RELOAD_FOR_INSN",
7014 "RELOAD_FOR_INPUT_ADDRESS",
7015 "RELOAD_FOR_INPADDR_ADDRESS",
7016 "RELOAD_FOR_OUTPUT_ADDRESS",
7017 "RELOAD_FOR_OUTADDR_ADDRESS",
7018 "RELOAD_FOR_OPERAND_ADDRESS",
7019 "RELOAD_FOR_OPADDR_ADDR",
7020 "RELOAD_OTHER",
7021 "RELOAD_FOR_OTHER_ADDRESS"
7024 static const char * const reg_class_names[] = REG_CLASS_NAMES;
7026 /* These functions are used to print the variables set by 'find_reloads' */
7028 void
7029 debug_reload_to_stream (f)
7030 FILE *f;
7032 int r;
7033 const char *prefix;
7035 if (! f)
7036 f = stderr;
7037 for (r = 0; r < n_reloads; r++)
7039 fprintf (f, "Reload %d: ", r);
7041 if (rld[r].in != 0)
7043 fprintf (f, "reload_in (%s) = ",
7044 GET_MODE_NAME (rld[r].inmode));
7045 print_inline_rtx (f, rld[r].in, 24);
7046 fprintf (f, "\n\t");
7049 if (rld[r].out != 0)
7051 fprintf (f, "reload_out (%s) = ",
7052 GET_MODE_NAME (rld[r].outmode));
7053 print_inline_rtx (f, rld[r].out, 24);
7054 fprintf (f, "\n\t");
7057 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7059 fprintf (f, "%s (opnum = %d)",
7060 reload_when_needed_name[(int) rld[r].when_needed],
7061 rld[r].opnum);
7063 if (rld[r].optional)
7064 fprintf (f, ", optional");
7066 if (rld[r].nongroup)
7067 fprintf (f, ", nongroup");
7069 if (rld[r].inc != 0)
7070 fprintf (f, ", inc by %d", rld[r].inc);
7072 if (rld[r].nocombine)
7073 fprintf (f, ", can't combine");
7075 if (rld[r].secondary_p)
7076 fprintf (f, ", secondary_reload_p");
7078 if (rld[r].in_reg != 0)
7080 fprintf (f, "\n\treload_in_reg: ");
7081 print_inline_rtx (f, rld[r].in_reg, 24);
7084 if (rld[r].out_reg != 0)
7086 fprintf (f, "\n\treload_out_reg: ");
7087 print_inline_rtx (f, rld[r].out_reg, 24);
7090 if (rld[r].reg_rtx != 0)
7092 fprintf (f, "\n\treload_reg_rtx: ");
7093 print_inline_rtx (f, rld[r].reg_rtx, 24);
7096 prefix = "\n\t";
7097 if (rld[r].secondary_in_reload != -1)
7099 fprintf (f, "%ssecondary_in_reload = %d",
7100 prefix, rld[r].secondary_in_reload);
7101 prefix = ", ";
7104 if (rld[r].secondary_out_reload != -1)
7105 fprintf (f, "%ssecondary_out_reload = %d\n",
7106 prefix, rld[r].secondary_out_reload);
7108 prefix = "\n\t";
7109 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7111 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7112 insn_data[rld[r].secondary_in_icode].name);
7113 prefix = ", ";
7116 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7117 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7118 insn_data[rld[r].secondary_out_icode].name);
7120 fprintf (f, "\n");
7124 void
7125 debug_reload ()
7127 debug_reload_to_stream (stderr);