| blob | 8bffc6627d71dd95871b0e3b104f062b4d81b8ab |
1 2018-01-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
3 PR rtl-optimization/83147
4 * lra-constraints.c (remove_inheritance_pseudos): Use
5 lra_substitute_pseudo_within_insn.
7 2018-01-19 Tom de Vries <tom@codesourcery.com>
8 Cesar Philippidis <cesar@codesourcery.com>
10 PR target/83920
11 * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
13 2018-01-19 Cesar Philippidis <cesar@codesourcery.com>
15 PR target/83790
16 * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
17 spaces for function labels.
19 2018-01-19 Martin Liska <mliska@suse.cz>
21 * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
22 (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
23 (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
24 (PRED_OPCODE_POSITIVE): Change from 64 to 59.
25 (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
26 (PRED_CONST_RETURN): Change from 69 to 65.
27 (PRED_NULL_RETURN): Change from 91 to 71.
28 (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
29 (PRED_LOOP_GUARD): Change from 66 to 73.
31 2018-01-19 Martin Liska <mliska@suse.cz>
33 * predict.c (predict_insn_def): Add new assert.
34 (struct branch_predictor): Change type to signed integer.
35 (test_prediction_value_range): Amend test to cover
36 PROB_UNINITIALIZED.
37 * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
38 (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
39 (PRED_LOOP_ITERATIONS_MAX): Likewise.
40 (PRED_LOOP_IV_COMPARE): Likewise.
41 * predict.h (PROB_UNINITIALIZED): Define new constant.
43 2018-01-19 Martin Liska <mliska@suse.cz>
45 * predict.c (dump_prediction): Add new format for
46 analyze_brprob.py script which is enabled with -details
47 suboption.
48 * profile-count.h (precise_p): New function.
50 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
52 PR tree-optimization/83922
53 * tree-vect-loop.c (vect_verify_full_masking): Return false if
54 there are no statements that need masking.
55 (vect_active_double_reduction_p): New function.
56 (vect_analyze_loop_operations): Use it when handling phis that
57 are not in the loop header.
59 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
61 PR tree-optimization/83914
62 * tree-vect-loop.c (vectorizable_induction): Don't convert
63 init_expr or apply the peeling adjustment for inductions
64 that are nested within the vectorized loop.
66 2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
68 * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
69 instead of NEG.
71 2018-01-18 Jakub Jelinek <jakub@redhat.com>
73 PR sanitizer/81715
74 PR testsuite/83882
75 * function.h (gimplify_parameters): Add gimple_seq * argument.
76 * function.c: Include gimple.h and options.h.
77 (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
78 for the added local temporaries if needed.
79 * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
80 if there are any parameter cleanups, wrap whole body into a
81 try/finally with the cleanups.
83 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
85 PR target/82964
86 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
87 Use GET_MODE_CLASS for scalar floating point.
89 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
91 PR ipa/82256
92 patch by PaX Team
93 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
94 Fix call of call_cgraph_insertion_hooks.
96 2018-01-18 Martin Sebor <msebor@redhat.com>
98 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
100 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
102 PR ipa/83619
103 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
104 frequencies.
106 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
108 PR other/70268
109 * common.opt: (-ffile-prefix-map): New option.
110 * opts.c (common_handle_option): Defer it.
111 * opts-global.c (handle_common_deferred_options): Handle it.
112 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
113 * file-prefix-map.h: New file.
114 (remap_debug_filename, add_debug_prefix_map): ...here.
115 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
116 * final.c (debug_prefix_map, add_debug_prefix_map
117 remap_debug_filename): Move to...
118 * file-prefix-map.c: New file.
119 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
120 generalize, get rid of alloca(), use strrchr() instead of strchr().
121 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
122 Implement in terms of add_prefix_map().
123 (remap_macro_filename, remap_debug_filename): Implement in term of
124 remap_filename().
125 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
126 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
127 * dbxout.c: Include file-prefix-map.h.
128 * varasm.c: Likewise.
129 * vmsdbgout.c: Likewise.
130 * xcoffout.c: Likewise.
131 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
132 * doc/cppopts.texi (-fmacro-prefix-map): Document.
133 * doc/invoke.texi (-ffile-prefix-map): Document.
134 (-fdebug-prefix-map): Update description.
136 2018-01-18 Martin Liska <mliska@suse.cz>
138 * config/i386/i386.c (indirect_thunk_name): Document that also
139 lfence is emitted.
140 (output_indirect_thunk): Document why both instructions
141 (pause and lfence) are generated.
143 2018-01-18 Richard Biener <rguenther@suse.de>
145 PR tree-optimization/83887
146 * graphite-scop-detection.c
147 (scop_detection::get_nearest_dom_with_single_entry): Remove.
148 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
149 (scop_detection::merge_sese): Re-implement with a flood-fill
150 algorithm that properly finds a SESE region if it exists.
152 2018-01-18 Jakub Jelinek <jakub@redhat.com>
154 PR c/61240
155 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
156 pointer_diff optimizations use view_convert instead of convert.
158 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
160 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
161 Generate different code for -mno-speculate-indirect-jumps.
162 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
163 (*call_indirect_aix<mode>): Disable for
164 -mno-speculate-indirect-jumps.
165 (*call_indirect_aix<mode>_nospec): New define_insn.
166 (*call_value_indirect_aix<mode>): Disable for
167 -mno-speculate-indirect-jumps.
168 (*call_value_indirect_aix<mode>_nospec): New define_insn.
169 (*sibcall_nonlocal_sysv<mode>): Generate different code for
170 -mno-speculate-indirect-jumps.
171 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
173 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
175 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
176 long double type, set the flags for noting the default long double
177 type, even if we don't pass or return a long double type.
179 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
181 PR ipa/83051
182 * ipa-inline.c (flatten_function): Do not overwrite final inlining
183 failure.
185 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
187 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
188 support for merge[hl].
189 (fold_mergehl_helper): New helper function.
190 (tree-vector-builder.h): New #include for tree_vector_builder usage.
191 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
192 (altivec_vmrglw_direct): Add xxmrglw insn.
194 2018-01-17 Andrew Waterman <andrew@sifive.com>
196 * config/riscv/riscv.c (riscv_conditional_register_usage): If
197 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
199 2018-01-17 David Malcolm <dmalcolm@redhat.com>
201 PR lto/83121
202 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
203 call the lto_location_cache before reading the
204 DECL_SOURCE_LOCATION of the types.
206 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
207 Richard Sandiford <richard.sandiford@linaro.org>
209 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
210 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
211 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
212 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
213 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
214 Add declaration.
215 * config/aarch64/constraints.md (aarch64_movti_operand):
216 Limit immediates.
217 * config/aarch64/predicates.md (Uti): Add new constraint.
219 2018-01-17 Carl Love <cel@us.ibm.com>
220 * config/rs6000/vsx.md (define_expand xl_len_r,
221 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
222 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
223 lxvll.
224 (define_expand, define_insn): Move the shift left from the
225 define_insn to the define_expand for lxvl and stxvl instructions.
226 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
227 and XL_LEN_R definitions to PURE.
229 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
231 * config/i386/i386.c (indirect_thunk_name): Declare regno
232 as unsigned int. Compare regno with INVALID_REGNUM.
233 (output_indirect_thunk): Ditto.
234 (output_indirect_thunk_function): Ditto.
235 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
236 in the call to output_indirect_thunk_function.
238 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
240 PR middle-end/83884
241 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
242 rather than the size of inner_type to determine the stack slot size
243 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
245 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
247 PR target/83546
248 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
249 to PTA_SILVERMONT.
251 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
253 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
254 endian Linux systems to optionally enable multilibs for selecting
255 the long double type if the user configured an explicit type.
256 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
257 have no long double multilibs if not defined.
258 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
259 warn if the user used -mabi={ieee,ibm}longdouble and we built
260 multilibs for long double.
261 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
262 appropriate multilib option.
263 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
264 multilib options.
265 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
266 for building long double multilibs.
267 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
269 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
271 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
272 copies.
274 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
275 64 bits.
276 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
277 128 bits.
279 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
280 variables.
282 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
283 return value.
285 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
287 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
288 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
290 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
292 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
293 different rtl trees depending on TARGET_64BIT.
294 (rs6000_gen_lvx): Likewise.
296 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
298 * config/visium/visium.md (nop): Tweak comment.
299 (hazard_nop): Likewise.
301 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
303 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
304 -mspeculate-indirect-jumps.
305 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
306 for -mno-speculate-indirect-jumps.
307 (*call_indirect_elfv2<mode>_nospec): New define_insn.
308 (*call_value_indirect_elfv2<mode>): Disable for
309 -mno-speculate-indirect-jumps.
310 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
311 (indirect_jump): Emit different RTL for
312 -mno-speculate-indirect-jumps.
313 (*indirect_jump<mode>): Disable for
314 -mno-speculate-indirect-jumps.
315 (*indirect_jump<mode>_nospec): New define_insn.
316 (tablejump): Emit different RTL for
317 -mno-speculate-indirect-jumps.
318 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
319 (tablejumpsi_nospec): New define_expand.
320 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
321 (tablejumpdi_nospec): New define_expand.
322 (*tablejump<mode>_internal1): Disable for
323 -mno-speculate-indirect-jumps.
324 (*tablejump<mode>_internal1_nospec): New define_insn.
325 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
326 option.
328 2018-01-16 Artyom Skrobov tyomitch@gmail.com
330 * caller-save.c (insert_save): Drop unnecessary parameter. All
331 callers updated.
333 2018-01-16 Jakub Jelinek <jakub@redhat.com>
334 Richard Biener <rguenth@suse.de>
336 PR libgomp/83590
337 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
338 return early, inline manually is_gimple_sizepos. Make sure if we
339 call gimplify_expr we don't end up with a gimple constant.
340 * tree.c (variably_modified_type_p): Don't return true for
341 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
342 * gimplify.h (is_gimple_sizepos): Remove.
344 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
346 PR tree-optimization/83857
347 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
348 vectorizable_live_operation for pure SLP statements.
349 (vectorizable_live_operation): Handle PHIs.
351 2018-01-16 Richard Biener <rguenther@suse.de>
353 PR tree-optimization/83867
354 * tree-vect-stmts.c (vect_transform_stmt): Precompute
355 nested_in_vect_loop_p since the scalar stmt may get invalidated.
357 2018-01-16 Jakub Jelinek <jakub@redhat.com>
359 PR c/83844
360 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
361 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
362 If off is not INTEGER_CST, issue a may not be aligned warning
363 rather than isn't aligned. Use isn%'t rather than isn't.
364 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
365 into MULT_EXPR.
366 <case MULT_EXPR>: Improve the case when bottom and one of the
367 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
368 operand, in that case check if the other operand is multiple of
369 bottom divided by the INTEGER_CST operand.
371 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
373 PR target/83858
374 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
375 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
376 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
377 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
378 * config/pa/pa.c (pa_function_arg_advance): Likewise.
379 (pa_function_arg, pa_arg_partial_bytes): Likewise.
380 (pa_function_arg_size): New function.
382 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
384 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
385 in a separate statement.
387 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
389 PR tree-optimization/83847
390 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
391 group gathers and scatters.
393 2018-01-16 Jakub Jelinek <jakub@redhat.com>
395 PR rtl-optimization/86620
396 * params.def (max-sched-ready-insns): Bump minimum value to 1.
398 PR rtl-optimization/83213
399 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
400 to last if both are JUMP_INSNs.
402 PR tree-optimization/83843
403 * gimple-ssa-store-merging.c
404 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
405 store_immediate_info for bswap/nop orig_stores.
407 2018-01-15 Andrew Waterman <andrew@sifive.com>
409 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
410 !TARGET_MUL.
411 <UDIV>: Increase cost if !TARGET_DIV.
413 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
415 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
416 (define_attr "cr_logical_3op"): New.
417 (cceq_ior_compare): Adjust.
418 (cceq_ior_compare_complement): Adjust.
419 (*cceq_rev_compare): Adjust.
420 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
421 (is_cracked_insn): Adjust.
422 (insn_must_be_first_in_group): Adjust.
423 * config/rs6000/40x.md: Adjust.
424 * config/rs6000/440.md: Adjust.
425 * config/rs6000/476.md: Adjust.
426 * config/rs6000/601.md: Adjust.
427 * config/rs6000/603.md: Adjust.
428 * config/rs6000/6xx.md: Adjust.
429 * config/rs6000/7450.md: Adjust.
430 * config/rs6000/7xx.md: Adjust.
431 * config/rs6000/8540.md: Adjust.
432 * config/rs6000/cell.md: Adjust.
433 * config/rs6000/e300c2c3.md: Adjust.
434 * config/rs6000/e500mc.md: Adjust.
435 * config/rs6000/e500mc64.md: Adjust.
436 * config/rs6000/e5500.md: Adjust.
437 * config/rs6000/e6500.md: Adjust.
438 * config/rs6000/mpc.md: Adjust.
439 * config/rs6000/power4.md: Adjust.
440 * config/rs6000/power5.md: Adjust.
441 * config/rs6000/power6.md: Adjust.
442 * config/rs6000/power7.md: Adjust.
443 * config/rs6000/power8.md: Adjust.
444 * config/rs6000/power9.md: Adjust.
445 * config/rs6000/rs64.md: Adjust.
446 * config/rs6000/titan.md: Adjust.
448 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
450 * config/i386/predicates.md (indirect_branch_operand): Rewrite
451 ix86_indirect_branch_register logic.
453 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
455 * config/i386/constraints.md (Bs): Update
456 ix86_indirect_branch_register check. Don't check
457 ix86_indirect_branch_register with GOT_memory_operand.
458 (Bw): Likewise.
459 * config/i386/predicates.md (GOT_memory_operand): Don't check
460 ix86_indirect_branch_register here.
461 (GOT32_symbol_operand): Likewise.
463 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
465 * config/i386/predicates.md (constant_call_address_operand):
466 Rewrite ix86_indirect_branch_register logic.
467 (sibcall_insn_operand): Likewise.
469 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
471 * config/i386/constraints.md (Bs): Replace
472 ix86_indirect_branch_thunk_register with
473 ix86_indirect_branch_register.
474 (Bw): Likewise.
475 * config/i386/i386.md (indirect_jump): Likewise.
476 (tablejump): Likewise.
477 (*sibcall_memory): Likewise.
478 (*sibcall_value_memory): Likewise.
479 Peepholes of indirect call and jump via memory: Likewise.
480 * config/i386/i386.opt: Likewise.
481 * config/i386/predicates.md (indirect_branch_operand): Likewise.
482 (GOT_memory_operand): Likewise.
483 (call_insn_operand): Likewise.
484 (sibcall_insn_operand): Likewise.
485 (GOT32_symbol_operand): Likewise.
487 2018-01-15 Jakub Jelinek <jakub@redhat.com>
489 PR middle-end/83837
490 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
491 type rather than type addr's type points to.
492 (expand_omp_atomic_mutex): Likewise.
493 (expand_omp_atomic): Likewise.
495 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
497 PR target/83839
498 * config/i386/i386.c (output_indirect_thunk_function): Use
499 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
500 for __x86_return_thunk.
502 2018-01-15 Richard Biener <rguenther@suse.de>
504 PR middle-end/83850
505 * expmed.c (extract_bit_field_1): Fix typo.
507 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
509 PR target/83687
510 * config/arm/iterators.md (VF): New mode iterator.
511 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
512 Remove integer-related logic from pattern.
513 (neon_vabd<mode>_3): Likewise.
515 2018-01-15 Jakub Jelinek <jakub@redhat.com>
517 PR middle-end/82694
518 * common.opt (fstrict-overflow): No longer an alias.
519 (fwrapv-pointer): New option.
520 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
521 also for pointer types based on flag_wrapv_pointer.
522 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
523 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
524 opts->x_flag_wrapv got set.
525 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
526 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
527 POINTER_TYPE_OVERFLOW_UNDEFINED.
528 * match.pd: Likewise in address comparison pattern.
529 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
531 2018-01-15 Richard Biener <rguenther@suse.de>
533 PR lto/83804
534 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
535 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
536 Reset type names to their identifier if their TYPE_DECL doesn't
537 have linkage (and thus is used for ODR and devirt).
538 (save_debug_info_for_decl): Remove.
539 (save_debug_info_for_type): Likewise.
540 (add_tree_to_fld_list): Adjust.
541 * tree-pretty-print.c (dump_generic_node): Make dumping of
542 type names more robust.
544 2018-01-15 Richard Biener <rguenther@suse.de>
546 * BASE-VER: Bump to 8.0.1.
548 2018-01-14 Martin Sebor <msebor@redhat.com>
550 PR other/83508
551 * builtins.c (check_access): Avoid warning when the no-warning bit
552 is set.
554 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
556 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
557 * ira-color (allocno_hard_regs_compare): Likewise.
559 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
561 PR target/83013
562 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
563 Use .pushsection/.popsection.
565 2018-01-14 Martin Sebor <msebor@redhat.com>
567 PR c++/81327
568 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
570 2018-01-14 Jakub Jelinek <jakub@redhat.com>
572 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
573 entry from extra_headers.
574 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
575 extra_headers, make the list bitwise identical to the i?86-*-* one.
577 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
579 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
580 -mcmodel=large with -mindirect-branch=thunk,
581 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
582 -mfunction-return=thunk-extern.
583 * doc/invoke.texi: Document -mcmodel=large is incompatible with
584 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
585 -mfunction-return=thunk and -mfunction-return=thunk-extern.
587 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
589 * config/i386/i386.c (print_reg): Print the name of the full
590 integer register without '%'.
591 (ix86_print_operand): Handle 'V'.
592 * doc/extend.texi: Document 'V' modifier.
594 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
596 * config/i386/constraints.md (Bs): Disallow memory operand for
597 -mindirect-branch-register.
598 (Bw): Likewise.
599 * config/i386/predicates.md (indirect_branch_operand): Likewise.
600 (GOT_memory_operand): Likewise.
601 (call_insn_operand): Likewise.
602 (sibcall_insn_operand): Likewise.
603 (GOT32_symbol_operand): Likewise.
604 * config/i386/i386.md (indirect_jump): Call convert_memory_address
605 for -mindirect-branch-register.
606 (tablejump): Likewise.
607 (*sibcall_memory): Likewise.
608 (*sibcall_value_memory): Likewise.
609 Disallow peepholes of indirect call and jump via memory for
610 -mindirect-branch-register.
611 (*call_pop): Replace m with Bw.
612 (*call_value_pop): Likewise.
613 (*sibcall_pop_memory): Replace m with Bs.
614 * config/i386/i386.opt (mindirect-branch-register): New option.
615 * doc/invoke.texi: Document -mindirect-branch-register option.
617 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
619 * config/i386/i386-protos.h (ix86_output_function_return): New.
620 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
621 set function_return_type.
622 (indirect_thunk_name): Add ret_p to indicate thunk for function
623 return.
624 (output_indirect_thunk_function): Pass false to
625 indirect_thunk_name.
626 (ix86_output_indirect_branch_via_reg): Likewise.
627 (ix86_output_indirect_branch_via_push): Likewise.
628 (output_indirect_thunk_function): Create alias for function
629 return thunk if regno < 0.
630 (ix86_output_function_return): New function.
631 (ix86_handle_fndecl_attribute): Handle function_return.
632 (ix86_attribute_table): Add function_return.
633 * config/i386/i386.h (machine_function): Add
634 function_return_type.
635 * config/i386/i386.md (simple_return_internal): Use
636 ix86_output_function_return.
637 (simple_return_internal_long): Likewise.
638 * config/i386/i386.opt (mfunction-return=): New option.
639 (indirect_branch): Mention -mfunction-return=.
640 * doc/extend.texi: Document function_return function attribute.
641 * doc/invoke.texi: Document -mfunction-return= option.
643 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
645 * config/i386/i386-opts.h (indirect_branch): New.
646 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
647 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
648 with local indirect jump when converting indirect call and jump.
649 (ix86_set_indirect_branch_type): New.
650 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
651 (indirectlabelno): New.
652 (indirect_thunk_needed): Likewise.
653 (indirect_thunk_bnd_needed): Likewise.
654 (indirect_thunks_used): Likewise.
655 (indirect_thunks_bnd_used): Likewise.
656 (INDIRECT_LABEL): Likewise.
657 (indirect_thunk_name): Likewise.
658 (output_indirect_thunk): Likewise.
659 (output_indirect_thunk_function): Likewise.
660 (ix86_output_indirect_branch_via_reg): Likewise.
661 (ix86_output_indirect_branch_via_push): Likewise.
662 (ix86_output_indirect_branch): Likewise.
663 (ix86_output_indirect_jmp): Likewise.
664 (ix86_code_end): Call output_indirect_thunk_function if needed.
665 (ix86_output_call_insn): Call ix86_output_indirect_branch if
666 needed.
667 (ix86_handle_fndecl_attribute): Handle indirect_branch.
668 (ix86_attribute_table): Add indirect_branch.
669 * config/i386/i386.h (machine_function): Add indirect_branch_type
670 and has_local_indirect_jump.
671 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
672 to true.
673 (tablejump): Likewise.
674 (*indirect_jump): Use ix86_output_indirect_jmp.
675 (*tablejump_1): Likewise.
676 (simple_return_indirect_internal): Likewise.
677 * config/i386/i386.opt (mindirect-branch=): New option.
678 (indirect_branch): New.
679 (keep): Likewise.
680 (thunk): Likewise.
681 (thunk-inline): Likewise.
682 (thunk-extern): Likewise.
683 * doc/extend.texi: Document indirect_branch function attribute.
684 * doc/invoke.texi: Document -mindirect-branch= option.
686 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
688 PR ipa/83051
689 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
691 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
693 * ipa-inline.c (want_inline_small_function_p): Return false if
694 inlining has already failed with CIF_FINAL_ERROR.
695 (update_caller_keys): Call want_inline_small_function_p before
696 can_inline_edge_p.
697 (update_callee_keys): Likewise.
699 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
701 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
702 New function.
703 (rs6000_quadword_masked_address_p): Likewise.
704 (quad_aligned_load_p): Likewise.
705 (quad_aligned_store_p): Likewise.
706 (const_load_sequence_p): Add comment to describe the outer-most loop.
707 (mimic_memory_attributes_and_flags): New function.
708 (rs6000_gen_stvx): Likewise.
709 (replace_swapped_aligned_store): Likewise.
710 (rs6000_gen_lvx): Likewise.
711 (replace_swapped_aligned_load): Likewise.
712 (replace_swapped_load_constant): Capitalize argument name in
713 comment describing this function.
714 (rs6000_analyze_swaps): Add a third pass to search for vector loads
715 and stores that access quad-word aligned addresses and replace
716 with stvx or lvx instructions when appropriate.
717 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
718 New function prototype.
719 (rs6000_quadword_masked_address_p): Likewise.
720 (rs6000_gen_lvx): Likewise.
721 (rs6000_gen_stvx): Likewise.
722 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
723 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
724 when memory address is aligned.
725 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
726 this split to select lvx instruction when memory address is aligned.
727 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
728 instruction when memory address is aligned.
729 (*vsx_le_perm_load_v16qi): Likewise.
730 (four unnamed splitters): Modify to select the stvx instruction
731 when memory is aligned.
733 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
735 * predict.c (determine_unlikely_bbs): Handle correctly BBs
736 which appears in the queue multiple times.
738 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
739 Alan Hayward <alan.hayward@arm.com>
740 David Sherwood <david.sherwood@arm.com>
742 * tree-vectorizer.h (vec_lower_bound): New structure.
743 (_loop_vec_info): Add check_nonzero and lower_bounds.
744 (LOOP_VINFO_CHECK_NONZERO): New macro.
745 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
746 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
747 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
748 fields. Make seg_len the distance travelled, not including the
749 access size.
750 (dr_direction_indicator): Declare.
751 (dr_zero_step_indicator): Likewise.
752 (dr_known_forward_stride_p): Likewise.
753 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
754 tree-ssanames.h.
755 (runtime_alias_check_p): Allow runtime alias checks with
756 variable strides.
757 (operator ==): Compare access_size and align.
758 (prune_runtime_alias_test_list): Rework for new distinction between
759 the access_size and seg_len.
760 (create_intersect_range_checks_index): Likewise. Cope with polynomial
761 segment lengths.
762 (get_segment_min_max): New function.
763 (create_intersect_range_checks): Use it.
764 (dr_step_indicator): New function.
765 (dr_direction_indicator): Likewise.
766 (dr_zero_step_indicator): Likewise.
767 (dr_known_forward_stride_p): Likewise.
768 * tree-loop-distribution.c (data_ref_segment_size): Return
769 DR_STEP * (niters - 1).
770 (compute_alias_check_pairs): Update call to the dr_with_seg_len
771 constructor.
772 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
773 (vect_preserves_scalar_order_p): New function, split out from...
774 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
775 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
776 (vect_vfa_access_size): New function.
777 (vect_vfa_align): Likewise.
778 (vect_compile_time_alias): Take access_size_a and access_b arguments.
779 (dump_lower_bound): New function.
780 (vect_check_lower_bound): Likewise.
781 (vect_small_gap_p): Likewise.
782 (vectorizable_with_step_bound_p): Likewise.
783 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
784 depencies if the vectorization factor is 1. Convert the checks
785 for nonzero steps into checks on the bounds of DR_STEP. Try using
786 a bunds check for variable steps if the minimum required step is
787 relatively small. Update calls to the dr_with_seg_len
788 constructor and to vect_compile_time_alias.
789 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
790 function.
791 (vect_loop_versioning): Call it.
792 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
793 when retrying.
794 (vect_estimate_min_profitable_iters): Account for any bounds checks.
796 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
797 Alan Hayward <alan.hayward@arm.com>
798 David Sherwood <david.sherwood@arm.com>
800 * doc/sourcebuild.texi (vect_scatter_store): Document.
801 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
802 optabs.
803 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
804 Document.
805 * genopinit.c (main): Add supports_vec_scatter_store and
806 supports_vec_scatter_store_cached to target_optabs.
807 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
808 IFN_MASK_SCATTER_STORE.
809 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
810 functions.
811 * internal-fn.h (internal_store_fn_p): Declare.
812 (internal_fn_stored_value_index): Likewise.
813 * internal-fn.c (scatter_store_direct): New macro.
814 (expand_scatter_store_optab_fn): New function.
815 (direct_scatter_store_optab_supported_p): New macro.
816 (internal_store_fn_p): New function.
817 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
818 IFN_MASK_SCATTER_STORE.
819 (internal_fn_mask_index): Likewise.
820 (internal_fn_stored_value_index): New function.
821 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
822 for scatter stores.
823 * optabs-query.h (supports_vec_scatter_store_p): Declare.
824 * optabs-query.c (supports_vec_scatter_store_p): New function.
825 * tree-vectorizer.h (vect_get_store_rhs): Declare.
826 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
827 true for scatter stores.
828 (vect_gather_scatter_fn_p): Handle scatter stores too.
829 (vect_check_gather_scatter): Consider using scatter stores if
830 supports_vec_scatter_store_p.
831 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
832 scatter stores too.
833 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
834 internal_fn_stored_value_index.
835 (check_load_store_masking): Handle scatter stores too.
836 (vect_get_store_rhs): Make public.
837 (vectorizable_call): Use internal_store_fn_p.
838 (vectorizable_store): Handle scatter store internal functions.
839 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
840 when deciding whether the end of the group has been reached.
841 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
842 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
843 (mask_scatter_store<mode>): New insns.
845 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
846 Alan Hayward <alan.hayward@arm.com>
847 David Sherwood <david.sherwood@arm.com>
849 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
850 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
851 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
852 function.
853 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
854 Use vect_truncate_gather_scatter_offset if we can't treat the
855 operation as a normal gather load or scatter store.
856 (get_group_load_store_type): Take the gather_scatter_info
857 as argument. Try using a gather load or scatter store for
858 single-element groups.
859 (get_load_store_type): Update calls to get_group_load_store_type
860 and vect_use_strided_gather_scatters_p.
862 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
863 Alan Hayward <alan.hayward@arm.com>
864 David Sherwood <david.sherwood@arm.com>
866 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
867 optional tree argument.
868 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
869 null target hooks.
870 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
871 but continue to use the current value as a fallback.
872 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
873 to compare the updates.
874 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
875 (get_load_store_type): Use it when handling a strided access.
876 (vect_get_strided_load_store_ops): New function.
877 (vect_get_data_ptr_increment): Likewise.
878 (vectorizable_load): Handle strided gather loads. Always pass
879 a step to vect_create_data_ref_ptr and bump_vector_ptr.
881 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
882 Alan Hayward <alan.hayward@arm.com>
883 David Sherwood <david.sherwood@arm.com>
885 * doc/md.texi (gather_load@var{m}): Document.
886 (mask_gather_load@var{m}): Likewise.
887 * genopinit.c (main): Add supports_vec_gather_load and
888 supports_vec_gather_load_cached to target_optabs.
889 * optabs-tree.c (init_tree_optimization_optabs): Use
890 ggc_cleared_alloc to allocate target_optabs.
891 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
892 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
893 functions.
894 * internal-fn.h (internal_load_fn_p): Declare.
895 (internal_gather_scatter_fn_p): Likewise.
896 (internal_fn_mask_index): Likewise.
897 (internal_gather_scatter_fn_supported_p): Likewise.
898 * internal-fn.c (gather_load_direct): New macro.
899 (expand_gather_load_optab_fn): New function.
900 (direct_gather_load_optab_supported_p): New macro.
901 (direct_internal_fn_optab): New function.
902 (internal_load_fn_p): Likewise.
903 (internal_gather_scatter_fn_p): Likewise.
904 (internal_fn_mask_index): Likewise.
905 (internal_gather_scatter_fn_supported_p): Likewise.
906 * optabs-query.c (supports_at_least_one_mode_p): New function.
907 (supports_vec_gather_load_p): Likewise.
908 * optabs-query.h (supports_vec_gather_load_p): Declare.
909 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
910 and memory_type field.
911 (NUM_PATTERNS): Bump to 15.
912 * tree-vect-data-refs.c: Include internal-fn.h.
913 (vect_gather_scatter_fn_p): New function.
914 (vect_describe_gather_scatter_call): Likewise.
915 (vect_check_gather_scatter): Try using internal functions for
916 gather loads. Recognize existing calls to a gather load function.
917 (vect_analyze_data_refs): Consider using gather loads if
918 supports_vec_gather_load_p.
919 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
920 (vect_get_gather_scatter_offset_type): Likewise.
921 (vect_convert_mask_for_vectype): Likewise.
922 (vect_add_conversion_to_patterm): Likewise.
923 (vect_try_gather_scatter_pattern): Likewise.
924 (vect_recog_gather_scatter_pattern): New pattern recognizer.
925 (vect_vect_recog_func_ptrs): Add it.
926 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
927 internal_fn_mask_index and internal_gather_scatter_fn_p.
928 (check_load_store_masking): Take the gather_scatter_info as an
929 argument and handle gather loads.
930 (vect_get_gather_scatter_ops): New function.
931 (vectorizable_call): Check internal_load_fn_p.
932 (vectorizable_load): Likewise. Handle gather load internal
933 functions.
934 (vectorizable_store): Update call to check_load_store_masking.
935 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
936 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
937 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
938 (aarch64_gather_scale_operand_d): New predicates.
939 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
940 (mask_gather_load<mode>): New insns.
942 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
943 Alan Hayward <alan.hayward@arm.com>
944 David Sherwood <david.sherwood@arm.com>
946 * optabs.def (fold_left_plus_optab): New optab.
947 * doc/md.texi (fold_left_plus_@var{m}): Document.
948 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
949 * internal-fn.c (fold_left_direct): Define.
950 (expand_fold_left_optab_fn): Likewise.
951 (direct_fold_left_optab_supported_p): Likewise.
952 * fold-const-call.c (fold_const_fold_left): New function.
953 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
954 * tree-parloops.c (valid_reduction_p): New function.
955 (gather_scalar_reductions): Use it.
956 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
957 (vect_finish_replace_stmt): Declare.
958 * tree-vect-loop.c (fold_left_reduction_fn): New function.
959 (needs_fold_left_reduction_p): New function, split out from...
960 (vect_is_simple_reduction): ...here. Accept reductions that
961 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
962 (vect_force_simple_reduction): Also store the reduction type in
963 the assignment's STMT_VINFO_REDUC_TYPE.
964 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
965 (merge_with_identity): New function.
966 (vect_expand_fold_left): Likewise.
967 (vectorize_fold_left_reduction): Likewise.
968 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
969 scalar phi in place for it. Check for target support and reject
970 cases that would reassociate the operation. Defer the transform
971 phase to vectorize_fold_left_reduction.
972 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
973 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
974 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
976 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
978 * tree-if-conv.c (predicate_mem_writes): Remove redundant
979 call to ifc_temp_var.
981 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
982 Alan Hayward <alan.hayward@arm.com>
983 David Sherwood <david.sherwood@arm.com>
985 * target.def (legitimize_address_displacement): Take the original
986 offset as a poly_int.
987 * targhooks.h (default_legitimize_address_displacement): Update
988 accordingly.
989 * targhooks.c (default_legitimize_address_displacement): Likewise.
990 * doc/tm.texi: Regenerate.
991 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
992 as an argument, moving assert of ad->disp == ad->disp_term to...
993 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
994 Try calling targetm.legitimize_address_displacement before expanding
995 the address rather than afterwards, and adjust for the new interface.
996 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
997 Match the new hook interface. Handle SVE addresses.
998 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
999 new hook interface.
1001 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1003 * Makefile.in (OBJS): Add early-remat.o.
1004 * target.def (select_early_remat_modes): New hook.
1005 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
1006 * doc/tm.texi: Regenerate.
1007 * targhooks.h (default_select_early_remat_modes): Declare.
1008 * targhooks.c (default_select_early_remat_modes): New function.
1009 * timevar.def (TV_EARLY_REMAT): New timevar.
1010 * passes.def (pass_early_remat): New pass.
1011 * tree-pass.h (make_pass_early_remat): Declare.
1012 * early-remat.c: New file.
1013 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1014 function.
1015 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1017 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1018 Alan Hayward <alan.hayward@arm.com>
1019 David Sherwood <david.sherwood@arm.com>
1021 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1022 vfm1 with a bound_epilog parameter.
1023 (vect_do_peeling): Update calls accordingly, and move the prologue
1024 call earlier in the function. Treat the base bound_epilog as 0 for
1025 fully-masked loops and retain vf - 1 for other loops. Add 1 to
1026 this base when peeling for gaps.
1027 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1028 with fully-masked loops.
1029 (vect_estimate_min_profitable_iters): Handle the single peeled
1030 iteration in that case.
1032 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1033 Alan Hayward <alan.hayward@arm.com>
1034 David Sherwood <david.sherwood@arm.com>
1036 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1037 single-element interleaving even if the size is not a power of 2.
1038 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1039 accesses for single-element interleaving if the group size is
1040 not a power of 2.
1042 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1043 Alan Hayward <alan.hayward@arm.com>
1044 David Sherwood <david.sherwood@arm.com>
1046 * doc/md.texi (fold_extract_last_@var{m}): Document.
1047 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1048 * optabs.def (fold_extract_last_optab): New optab.
1049 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1050 * internal-fn.c (fold_extract_direct): New macro.
1051 (expand_fold_extract_optab_fn): Likewise.
1052 (direct_fold_extract_optab_supported_p): Likewise.
1053 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1054 * tree-vect-loop.c (vect_model_reduction_cost): Handle
1055 EXTRACT_LAST_REDUCTION.
1056 (get_initial_def_for_reduction): Do not create an initial vector
1057 for EXTRACT_LAST_REDUCTION reductions.
1058 (vectorizable_reduction): Leave the scalar phi in place for
1059 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
1060 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
1061 epilogue code for EXTRACT_LAST_REDUCTION and defer the
1062 transform phase to vectorizable_condition.
1063 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1064 split out from...
1065 (vect_finish_stmt_generation): ...here.
1066 (vect_finish_replace_stmt): New function.
1067 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1068 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1069 pattern.
1070 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1072 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1073 Alan Hayward <alan.hayward@arm.com>
1074 David Sherwood <david.sherwood@arm.com>
1076 * doc/md.texi (extract_last_@var{m}): Document.
1077 * optabs.def (extract_last_optab): New optab.
1078 * internal-fn.def (EXTRACT_LAST): New internal function.
1079 * internal-fn.c (cond_unary_direct): New macro.
1080 (expand_cond_unary_optab_fn): Likewise.
1081 (direct_cond_unary_optab_supported_p): Likewise.
1082 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1083 loops using EXTRACT_LAST.
1084 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1085 (extract_last_<mode>): ...this optab.
1086 (vec_extract<mode><Vel>): Update accordingly.
1088 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1089 Alan Hayward <alan.hayward@arm.com>
1090 David Sherwood <david.sherwood@arm.com>
1092 * target.def (empty_mask_is_expensive): New hook.
1093 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1094 * doc/tm.texi: Regenerate.
1095 * targhooks.h (default_empty_mask_is_expensive): Declare.
1096 * targhooks.c (default_empty_mask_is_expensive): New function.
1097 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1098 if the target says that empty masks are expensive.
1099 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1100 New function.
1101 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1103 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1104 Alan Hayward <alan.hayward@arm.com>
1105 David Sherwood <david.sherwood@arm.com>
1107 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1108 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1109 (vect_use_loop_mask_for_alignment_p): New function.
1110 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1111 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1112 niters_skip argument. Make sure that the first niters_skip elements
1113 of the first iteration are inactive.
1114 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1115 Update call to vect_set_loop_masks_directly.
1116 (get_misalign_in_elems): New function, split out from...
1117 (vect_gen_prolog_loop_niters): ...here.
1118 (vect_update_init_of_dr): Take a code argument that specifies whether
1119 the adjustment should be added or subtracted.
1120 (vect_update_init_of_drs): Likewise.
1121 (vect_prepare_for_masked_peels): New function.
1122 (vect_do_peeling): Skip prologue peeling if we're using a mask
1123 instead. Update call to vect_update_inits_of_drs.
1124 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1125 mask_skip_niters.
1126 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1127 alignment. Do not include the number of peeled iterations in
1128 the minimum threshold in that case.
1129 (vectorizable_induction): Adjust the start value down by
1130 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1131 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1132 Take the number of skipped iterations into account when calculating
1133 the loop bounds.
1134 * tree-vect-stmts.c (vect_gen_while_not): New function.
1136 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1137 Alan Hayward <alan.hayward@arm.com>
1138 David Sherwood <david.sherwood@arm.com>
1140 * doc/sourcebuild.texi (vect_fully_masked): Document.
1141 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1142 default value to 0.
1143 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1144 split out from...
1145 (vect_analyze_loop_2): ...here. Don't check the vectorization
1146 factor against the number of loop iterations if the loop is
1147 fully-masked.
1149 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1150 Alan Hayward <alan.hayward@arm.com>
1151 David Sherwood <david.sherwood@arm.com>
1153 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1154 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1155 (dump_groups): Update accordingly.
1156 (iv_use::mem_type): New member variable.
1157 (address_p): New function.
1158 (record_use): Add a mem_type argument and initialize the new
1159 mem_type field.
1160 (record_group_use): Add a mem_type argument. Use address_p.
1161 Remove obsolete null checks of base_object. Update call to record_use.
1162 (find_interesting_uses_op): Update call to record_group_use.
1163 (find_interesting_uses_cond): Likewise.
1164 (find_interesting_uses_address): Likewise.
1165 (get_mem_type_for_internal_fn): New function.
1166 (find_address_like_use): Likewise.
1167 (find_interesting_uses_stmt): Try find_address_like_use before
1168 calling find_interesting_uses_op.
1169 (addr_offset_valid_p): Use the iv mem_type field as the type
1170 of the addressed memory.
1171 (add_autoinc_candidates): Likewise.
1172 (get_address_cost): Likewise.
1173 (split_small_address_groups_p): Use address_p.
1174 (split_address_groups): Likewise.
1175 (add_iv_candidate_for_use): Likewise.
1176 (autoinc_possible_for_pair): Likewise.
1177 (rewrite_groups): Likewise.
1178 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1179 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1180 (get_alias_ptr_type_for_ptr_address): New function.
1181 (rewrite_use_address): Rewrite address uses in calls that were
1182 identified by find_address_like_use.
1184 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1185 Alan Hayward <alan.hayward@arm.com>
1186 David Sherwood <david.sherwood@arm.com>
1188 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1189 TARGET_MEM_REFs.
1190 * gimple-expr.h (is_gimple_addressable: Likewise.
1191 * gimple-expr.c (is_gimple_address): Likewise.
1192 * internal-fn.c (expand_call_mem_ref): New function.
1193 (expand_mask_load_optab_fn): Use it.
1194 (expand_mask_store_optab_fn): Likewise.
1196 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1197 Alan Hayward <alan.hayward@arm.com>
1198 David Sherwood <david.sherwood@arm.com>
1200 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1201 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1202 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1203 (cond_umax@var{mode}): Document.
1204 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1205 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1206 (cond_umin_optab, cond_umax_optab): New optabs.
1207 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1208 (COND_IOR, COND_XOR): New internal functions.
1209 * internal-fn.h (get_conditional_internal_fn): Declare.
1210 * internal-fn.c (cond_binary_direct): New macro.
1211 (expand_cond_binary_optab_fn): Likewise.
1212 (direct_cond_binary_optab_supported_p): Likewise.
1213 (get_conditional_internal_fn): New function.
1214 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1215 Cope with reduction statements that are vectorized as calls rather
1216 than assignments.
1217 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1218 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1219 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1220 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1221 (UNSPEC_COND_EOR): New unspecs.
1222 (optab): Add mappings for them.
1223 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1224 (sve_int_op, sve_fp_op): New int attributes.
1226 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1227 Alan Hayward <alan.hayward@arm.com>
1228 David Sherwood <david.sherwood@arm.com>
1230 * optabs.def (while_ult_optab): New optab.
1231 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1232 * internal-fn.def (WHILE_ULT): New internal function.
1233 * internal-fn.h (direct_internal_fn_supported_p): New override
1234 that takes two types as argument.
1235 * internal-fn.c (while_direct): New macro.
1236 (expand_while_optab_fn): New function.
1237 (convert_optab_supported_p): Likewise.
1238 (direct_while_optab_supported_p): New macro.
1239 * wide-int.h (wi::udiv_ceil): New function.
1240 * tree-vectorizer.h (rgroup_masks): New structure.
1241 (vec_loop_masks): New typedef.
1242 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1243 and fully_masked_p.
1244 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1245 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1246 (vect_max_vf): New function.
1247 (slpeel_make_loop_iterate_ntimes): Delete.
1248 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1249 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1250 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1251 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1252 internal-fn.h, stor-layout.h and optabs-query.h.
1253 (vect_set_loop_mask): New function.
1254 (add_preheader_seq): Likewise.
1255 (add_header_seq): Likewise.
1256 (interleave_supported_p): Likewise.
1257 (vect_maybe_permute_loop_masks): Likewise.
1258 (vect_set_loop_masks_directly): Likewise.
1259 (vect_set_loop_condition_masked): Likewise.
1260 (vect_set_loop_condition_unmasked): New function, split out from
1261 slpeel_make_loop_iterate_ntimes.
1262 (slpeel_make_loop_iterate_ntimes): Rename to..
1263 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1264 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1265 (vect_do_peeling): Update call accordingly.
1266 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1267 loops.
1268 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1269 mask_compare_type, can_fully_mask_p and fully_masked_p.
1270 (release_vec_loop_masks): New function.
1271 (_loop_vec_info): Use it to free the loop masks.
1272 (can_produce_all_loop_masks_p): New function.
1273 (vect_get_max_nscalars_per_iter): Likewise.
1274 (vect_verify_full_masking): Likewise.
1275 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1276 retries, and free the mask rgroups before retrying. Check loop-wide
1277 reasons for disallowing fully-masked loops. Make the final decision
1278 about whether use a fully-masked loop or not.
1279 (vect_estimate_min_profitable_iters): Do not assume that peeling
1280 for the number of iterations will be needed for fully-masked loops.
1281 (vectorizable_reduction): Disable fully-masked loops.
1282 (vectorizable_live_operation): Likewise.
1283 (vect_halve_mask_nunits): New function.
1284 (vect_double_mask_nunits): Likewise.
1285 (vect_record_loop_mask): Likewise.
1286 (vect_get_loop_mask): Likewise.
1287 (vect_transform_loop): Handle the case in which the final loop
1288 iteration might handle a partial vector. Call vect_set_loop_condition
1289 instead of slpeel_make_loop_iterate_ntimes.
1290 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1291 (check_load_store_masking): New function.
1292 (prepare_load_store_mask): Likewise.
1293 (vectorizable_store): Handle fully-masked loops.
1294 (vectorizable_load): Likewise.
1295 (supportable_widening_operation): Use vect_halve_mask_nunits for
1296 booleans.
1297 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1298 (vect_gen_while): New function.
1299 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1300 (aarch64_uqdec<mode>): New insn.
1302 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1303 Alan Hayward <alan.hayward@arm.com>
1304 David Sherwood <david.sherwood@arm.com>
1306 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1307 (reduc_xor_scal_optab): New optabs.
1308 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1309 (reduc_xor_scal_@var{m}): Document.
1310 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1311 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1312 internal functions.
1313 * fold-const-call.c (fold_const_call): Handle them.
1314 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1315 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1316 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1317 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1318 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1319 (UNSPEC_XORV): New unspecs.
1320 (optab): Add entries for them.
1321 (BITWISEV): New int iterator.
1322 (bit_reduc_op): New int attributes.
1324 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1325 Alan Hayward <alan.hayward@arm.com>
1326 David Sherwood <david.sherwood@arm.com>
1328 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1329 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1330 * optabs.def (vec_shl_insert_optab): New optab.
1331 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1332 (duplicate_and_interleave): Likewise.
1333 * tree-vect-loop.c: Include internal-fn.h.
1334 (neutral_op_for_slp_reduction): New function, split out from
1335 get_initial_defs_for_reduction.
1336 (get_initial_def_for_reduction): Handle option 2 for variable-length
1337 vectors by loading the neutral value into a vector and then shifting
1338 the initial value into element 0.
1339 (get_initial_defs_for_reduction): Replace the code argument with
1340 the neutral value calculated by neutral_op_for_slp_reduction.
1341 Use gimple_build_vector for constant-length vectors.
1342 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1343 but the first group_size elements have a neutral value.
1344 Use duplicate_and_interleave otherwise.
1345 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1346 Update call to get_initial_defs_for_reduction. Handle SLP
1347 reductions for variable-length vectors by creating one vector
1348 result for each scalar result, with the elements associated
1349 with other scalar results stubbed out with the neutral value.
1350 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1351 Require IFN_VEC_SHL_INSERT for double reductions on
1352 variable-length vectors, or SLP reductions that have
1353 a neutral value. Require can_duplicate_and_interleave_p
1354 support for variable-length unchained SLP reductions if there
1355 is no neutral value, such as for MIN/MAX reductions. Also require
1356 the number of vector elements to be a multiple of the number of
1357 SLP statements when doing variable-length unchained SLP reductions.
1358 Update call to vect_create_epilog_for_reduction.
1359 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1360 and remove initial values.
1361 (duplicate_and_interleave): Make public.
1362 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1363 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1365 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1366 Alan Hayward <alan.hayward@arm.com>
1367 David Sherwood <david.sherwood@arm.com>
1369 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1370 (can_duplicate_and_interleave_p): New function.
1371 (vect_get_and_check_slp_defs): Take the vector of statements
1372 rather than just the current one. Remove excess parentheses.
1373 Restriction rejectinon of vect_constant_def and vect_external_def
1374 for variable-length vectors to boolean types, or types for which
1375 can_duplicate_and_interleave_p is false.
1376 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1377 (duplicate_and_interleave): New function.
1378 (vect_get_constant_vectors): Use gimple_build_vector for
1379 constant-length vectors and suitable variable-length constant
1380 vectors. Use duplicate_and_interleave for other variable-length
1381 vectors. Don't defer the update when inserting new statements.
1383 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1384 Alan Hayward <alan.hayward@arm.com>
1385 David Sherwood <david.sherwood@arm.com>
1387 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1388 min_profitable_iters doesn't go negative.
1390 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1391 Alan Hayward <alan.hayward@arm.com>
1392 David Sherwood <david.sherwood@arm.com>
1394 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1395 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1396 * optabs.def (vec_mask_load_lanes_optab): New optab.
1397 (vec_mask_store_lanes_optab): Likewise.
1398 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1399 (MASK_STORE_LANES): Likewise.
1400 * internal-fn.c (mask_load_lanes_direct): New macro.
1401 (mask_store_lanes_direct): Likewise.
1402 (expand_mask_load_optab_fn): Handle masked operations.
1403 (expand_mask_load_lanes_optab_fn): New macro.
1404 (expand_mask_store_optab_fn): Handle masked operations.
1405 (expand_mask_store_lanes_optab_fn): New macro.
1406 (direct_mask_load_lanes_optab_supported_p): Likewise.
1407 (direct_mask_store_lanes_optab_supported_p): Likewise.
1408 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1409 parameter.
1410 (vect_load_lanes_supported): Likewise.
1411 * tree-vect-data-refs.c (strip_conversion): New function.
1412 (can_group_stmts_p): Likewise.
1413 (vect_analyze_data_ref_accesses): Use it instead of checking
1414 for a pair of assignments.
1415 (vect_store_lanes_supported): Take a masked_p parameter.
1416 (vect_load_lanes_supported): Likewise.
1417 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1418 vect_store_lanes_supported and vect_load_lanes_supported.
1419 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1420 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1421 parameter. Don't allow gaps for masked accesses.
1422 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1423 and vect_load_lanes_supported.
1424 (get_load_store_type): Take a masked_p parameter and update
1425 call to get_group_load_store_type.
1426 (vectorizable_store): Update call to get_load_store_type.
1427 Handle IFN_MASK_STORE_LANES.
1428 (vectorizable_load): Update call to get_load_store_type.
1429 Handle IFN_MASK_LOAD_LANES.
1431 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1432 Alan Hayward <alan.hayward@arm.com>
1433 David Sherwood <david.sherwood@arm.com>
1435 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1436 modes for SVE.
1437 * config/aarch64/aarch64-protos.h
1438 (aarch64_sve_struct_memory_operand_p): Declare.
1439 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1440 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1441 (VPRED, vpred): Handle SVE structure modes.
1442 * config/aarch64/constraints.md (Utx): New constraint.
1443 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1444 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1445 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1446 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1447 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1448 structure modes. Split into pieces after RA.
1449 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1450 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1451 New patterns.
1452 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1453 SVE structure modes.
1454 (aarch64_classify_address): Likewise.
1455 (sizetochar): Move earlier in file.
1456 (aarch64_print_operand): Handle SVE register lists.
1457 (aarch64_array_mode): New function.
1458 (aarch64_sve_struct_memory_operand_p): Likewise.
1459 (TARGET_ARRAY_MODE): Redefine.
1461 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1462 Alan Hayward <alan.hayward@arm.com>
1463 David Sherwood <david.sherwood@arm.com>
1465 * target.def (array_mode): New target hook.
1466 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1467 * doc/tm.texi: Regenerate.
1468 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1469 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1470 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1471 targetm.array_mode.
1472 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1473 type sizes.
1475 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1476 Alan Hayward <alan.hayward@arm.com>
1477 David Sherwood <david.sherwood@arm.com>
1479 * fold-const.c (fold_binary_loc): Check the argument types
1480 rather than the result type when testing for a vector operation.
1482 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1484 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1485 * doc/tm.texi: Regenerate.
1487 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1488 Alan Hayward <alan.hayward@arm.com>
1489 David Sherwood <david.sherwood@arm.com>
1491 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1492 (sve): Document new AArch64 extension.
1493 * doc/md.texi (w): Extend the description of the AArch64
1494 constraint to include SVE vectors.
1495 (Upl, Upa): Document new AArch64 predicate constraints.
1496 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1497 enum.
1498 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1499 (msve-vector-bits=): New option.
1500 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1501 SVE when these are disabled.
1502 (sve): New extension.
1503 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1504 modes. Adjust their number of units based on aarch64_sve_vg.
1505 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1506 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1507 aarch64_addr_query_type.
1508 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1509 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1510 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1511 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1512 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1513 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1514 (aarch64_simd_imm_zero_p): Delete.
1515 (aarch64_check_zero_based_sve_index_immediate): Declare.
1516 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1517 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1518 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1519 (aarch64_sve_float_mul_immediate_p): Likewise.
1520 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1521 rather than an rtx.
1522 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1523 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1524 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1525 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1526 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1527 (aarch64_regmode_natural_size): Likewise.
1528 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1529 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1530 left one place.
1531 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1532 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1533 for VG and the SVE predicate registers.
1534 (V_ALIASES): Add a "z"-prefixed alias.
1535 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1536 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1537 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1538 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1539 (REG_CLASS_NAMES): Add entries for them.
1540 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1541 and the predicate registers.
1542 (aarch64_sve_vg): Declare.
1543 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1544 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1545 (REGMODE_NATURAL_SIZE): Define.
1546 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1547 SVE macros.
1548 * config/aarch64/aarch64.c: Include cfgrtl.h.
1549 (simd_immediate_info): Add a constructor for series vectors,
1550 and an associated step field.
1551 (aarch64_sve_vg): New variable.
1552 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1553 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1554 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1555 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1556 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1557 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1558 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1559 (aarch64_get_mask_mode): New functions.
1560 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1561 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1562 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1563 predicate modes and predicate registers. Explicitly restrict
1564 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1565 to store a vector mode if it is recognized by
1566 aarch64_classify_vector_mode.
1567 (aarch64_regmode_natural_size): New function.
1568 (aarch64_hard_regno_caller_save_mode): Return the original mode
1569 for predicates.
1570 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1571 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1572 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1573 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1574 functions.
1575 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1576 does not overlap dest if the function is frame-related. Handle
1577 SVE constants.
1578 (aarch64_split_add_offset): New function.
1579 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1580 them aarch64_add_offset.
1581 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1582 and update call to aarch64_sub_sp.
1583 (aarch64_add_cfa_expression): New function.
1584 (aarch64_expand_prologue): Pass extra temporary registers to the
1585 functions above. Handle the case in which we need to emit new
1586 DW_CFA_expressions for registers that were originally saved
1587 relative to the stack pointer, but now have to be expressed
1588 relative to the frame pointer.
1589 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1590 functions above.
1591 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1592 IP0 and IP1 values for SVE frames.
1593 (aarch64_expand_vec_series): New function.
1594 (aarch64_expand_sve_widened_duplicate): Likewise.
1595 (aarch64_expand_sve_const_vector): Likewise.
1596 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1597 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1598 into the register, rather than emitting a SET directly.
1599 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1600 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1601 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1602 (offset_9bit_signed_scaled_p): New functions.
1603 (aarch64_replicate_bitmask_imm): New function.
1604 (aarch64_bitmask_imm): Use it.
1605 (aarch64_cannot_force_const_mem): Reject expressions involving
1606 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1607 (aarch64_classify_index): Handle SVE indices, by requiring
1608 a plain register index with a scale that matches the element size.
1609 (aarch64_classify_address): Handle SVE addresses. Assert that
1610 the mode of the address is VOIDmode or an integer mode.
1611 Update call to aarch64_classify_symbol.
1612 (aarch64_classify_symbolic_expression): Update call to
1613 aarch64_classify_symbol.
1614 (aarch64_const_vec_all_in_range_p): New function.
1615 (aarch64_print_vector_float_operand): Likewise.
1616 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1617 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1618 and the FP immediates 1.0 and 0.5.
1619 (aarch64_print_address_internal): Handle SVE addresses.
1620 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1621 (aarch64_regno_regclass): Handle predicate registers.
1622 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1623 data modes.
1624 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1625 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1626 (aarch64_convert_sve_vector_bits): New function.
1627 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1628 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1629 rather than an rtx.
1630 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1631 Handle SVE vector and predicate modes. Accept VL-based constants
1632 that need only one temporary register, and VL offsets that require
1633 no temporary registers.
1634 (aarch64_conditional_register_usage): Mark the predicate registers
1635 as fixed if SVE isn't available.
1636 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1637 Return true for SVE vector and predicate modes.
1638 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1639 rather than an unsigned int. Handle SVE modes.
1640 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1641 SVE modes.
1642 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1643 if SVE is enabled.
1644 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1645 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1646 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1647 (aarch64_sve_float_mul_immediate_p): New functions.
1648 (aarch64_sve_valid_immediate): New function.
1649 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1650 Explicitly reject structure modes. Check for INDEX constants.
1651 Handle PTRUE and PFALSE constants.
1652 (aarch64_check_zero_based_sve_index_immediate): New function.
1653 (aarch64_simd_imm_zero_p): Delete.
1654 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1655 vector modes. Accept constants in the range of CNT[BHWD].
1656 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1657 ask for an Advanced SIMD mode.
1658 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1659 (aarch64_simd_vector_alignment): Handle SVE predicates.
1660 (aarch64_vectorize_preferred_vector_alignment): New function.
1661 (aarch64_simd_vector_alignment_reachable): Use it instead of
1662 the vector size.
1663 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1664 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1665 functions.
1666 (MAX_VECT_LEN): Delete.
1667 (expand_vec_perm_d): Add a vec_flags field.
1668 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1669 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1670 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1671 for SVE modes.
1672 (aarch64_evpc_rev): Rename to...
1673 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1674 (aarch64_evpc_rev_global): New function.
1675 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1676 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1677 MAX_VECT_LEN.
1678 (aarch64_evpc_sve_tbl): New function.
1679 (aarch64_expand_vec_perm_const_1): Update after rename of
1680 aarch64_evpc_rev. Handle SVE permutes too, trying
1681 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1682 than aarch64_evpc_tbl.
1683 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1684 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1685 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1686 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1687 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1688 (aarch64_expand_sve_vcond): New functions.
1689 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1690 of aarch64_vector_mode_p.
1691 (aarch64_dwarf_poly_indeterminate_value): New function.
1692 (aarch64_compute_pressure_classes): Likewise.
1693 (aarch64_can_change_mode_class): Likewise.
1694 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1695 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1696 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1697 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1698 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1699 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1700 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1701 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1702 constraints.
1703 (Dn, Dl, Dr): Accept const as well as const_vector.
1704 (Dz): Likewise. Compare against CONST0_RTX.
1705 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1706 of "vector" where appropriate.
1707 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1708 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1709 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1710 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1711 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1712 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1713 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1714 (v_int_equiv): Extend to SVE modes.
1715 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1716 mode attributes.
1717 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1718 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1719 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1720 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1721 (SVE_COND_FP_CMP): New int iterators.
1722 (perm_hilo): Handle the new unpack unspecs.
1723 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1724 attributes.
1725 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1726 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1727 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1728 (aarch64_equality_operator, aarch64_constant_vector_operand)
1729 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1730 (aarch64_sve_nonimmediate_operand): Likewise.
1731 (aarch64_sve_general_operand): Likewise.
1732 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1733 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1734 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1735 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1736 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1737 (aarch64_sve_float_arith_immediate): Likewise.
1738 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1739 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1740 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1741 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1742 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1743 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1744 (aarch64_sve_float_arith_operand): Likewise.
1745 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1746 (aarch64_sve_float_mul_operand): Likewise.
1747 (aarch64_sve_vec_perm_operand): Likewise.
1748 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1749 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1750 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1751 as well as const_vector.
1752 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1753 in file. Use CONST0_RTX and CONSTM1_RTX.
1754 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1755 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1756 Use aarch64_simd_imm_zero.
1757 * config/aarch64/aarch64-sve.md: New file.
1758 * config/aarch64/aarch64.md: Include it.
1759 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1760 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1761 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1762 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1763 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1764 (sve): New attribute.
1765 (enabled): Disable instructions with the sve attribute unless
1766 TARGET_SVE.
1767 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1768 aarch64_expand_mov_immediate.
1769 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1770 CNT[BHSD] immediates.
1771 (movti): Split CONST_POLY_INT moves into two halves.
1772 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1773 Split additions that need a temporary here if the destination
1774 is the stack pointer.
1775 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1776 (*add<mode>3_poly_1): New instruction.
1777 (set_clobber_cc): New expander.
1779 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1781 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1782 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1783 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1784 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1785 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1786 Change innermode from fixed_mode_size to machine_mode.
1787 (simplify_subreg): Update call accordingly. Handle a constant-sized
1788 subreg of a variable-length CONST_VECTOR.
1790 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1791 Alan Hayward <alan.hayward@arm.com>
1792 David Sherwood <david.sherwood@arm.com>
1794 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1795 (add_offset_to_base): New function, split out from...
1796 (create_mem_ref): ...here. When handling a scale other than 1,
1797 check first whether the address is valid without the offset.
1798 Add it into the base if so, leaving the index and scale as-is.
1800 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1802 PR c++/83778
1803 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1804 fold_for_warn before checking if arg2 is INTEGER_CST.
1806 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1808 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1809 (store_multiple_operation): Delete.
1810 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1811 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1812 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1813 guarded by TARGET_STRING.
1814 (rs6000_output_load_multiple): Delete.
1815 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1816 OPTION_MASK_STRING / TARGET_STRING handling.
1817 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1818 (const rs6000_opt_masks) <"string">: Change mask to 0.
1819 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1820 (MASK_STRING): Delete.
1821 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1822 parts. Simplify.
1823 (load_multiple): Delete.
1824 (*ldmsi8): Delete.
1825 (*ldmsi7): Delete.
1826 (*ldmsi6): Delete.
1827 (*ldmsi5): Delete.
1828 (*ldmsi4): Delete.
1829 (*ldmsi3): Delete.
1830 (store_multiple): Delete.
1831 (*stmsi8): Delete.
1832 (*stmsi7): Delete.
1833 (*stmsi6): Delete.
1834 (*stmsi5): Delete.
1835 (*stmsi4): Delete.
1836 (*stmsi3): Delete.
1837 (movmemsi_8reg): Delete.
1838 (corresponding unnamed define_insn): Delete.
1839 (movmemsi_6reg): Delete.
1840 (corresponding unnamed define_insn): Delete.
1841 (movmemsi_4reg): Delete.
1842 (corresponding unnamed define_insn): Delete.
1843 (movmemsi_2reg): Delete.
1844 (corresponding unnamed define_insn): Delete.
1845 (movmemsi_1reg): Delete.
1846 (corresponding unnamed define_insn): Delete.
1847 * config/rs6000/rs6000.opt (mno-string): New.
1848 (mstring): Replace by deprecation warning stub.
1849 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1851 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1853 * regrename.c (regrename_do_replace): If replacing the same
1854 reg multiple times, try to reuse last created gen_raw_REG.
1856 PR debug/81155
1857 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1858 main to workaround a bug in GDB.
1860 2018-01-12 Tom de Vries <tom@codesourcery.com>
1862 PR target/83737
1863 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1865 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1867 PR rtl-optimization/80481
1868 * ira-color.c (get_cap_member): New function.
1869 (allocnos_conflict_by_live_ranges_p): Use it.
1870 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1871 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1873 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1875 PR target/83628
1876 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1877 (*saddl_se_1): Ditto.
1878 (*ssubsi_1): Ditto.
1879 (*ssubl_se_1): Ditto.
1881 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1883 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1884 rather than wi::to_widest for DR_INITs.
1885 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1886 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1887 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1888 INTEGER_CSTs.
1889 (vect_analyze_group_access_1): Note that here.
1891 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1893 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1894 polynomial type sizes.
1896 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1898 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1899 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1900 (gimple_add_tmp_var): Likewise.
1902 2018-01-12 Martin Liska <mliska@suse.cz>
1904 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1905 (gimple_alloc_sizes): Likewise.
1906 (dump_gimple_statistics): Use PRIu64 in printf format.
1907 * gimple.h: Change uint64_t to int.
1909 2018-01-12 Martin Liska <mliska@suse.cz>
1911 * tree-core.h: Use uint64_t instead of int.
1912 * tree.c (tree_node_counts): Likewise.
1913 (tree_node_sizes): Likewise.
1914 (dump_tree_statistics): Use PRIu64 in printf format.
1916 2018-01-12 Martin Liska <mliska@suse.cz>
1918 * Makefile.in: As qsort_chk is implemented in vec.c, add
1919 vec.o to linkage of gencfn-macros.
1920 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1921 passing the info to record_node_allocation_statistics.
1922 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1923 and pass the info.
1924 * ggc-common.c (struct ggc_usage): Add operator== and use
1925 it in operator< and compare function.
1926 * mem-stats.h (struct mem_usage): Likewise.
1927 * vec.c (struct vec_usage): Remove operator< and compare
1928 function. Can be simply inherited.
1930 2018-01-12 Martin Jambor <mjambor@suse.cz>
1932 PR target/81616
1933 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1934 * tree-ssa-math-opts.c: Include domwalk.h.
1935 (convert_mult_to_fma_1): New function.
1936 (fma_transformation_info): New type.
1937 (fma_deferring_state): Likewise.
1938 (cancel_fma_deferring): New function.
1939 (result_of_phi): Likewise.
1940 (last_fma_candidate_feeds_initial_phi): Likewise.
1941 (convert_mult_to_fma): Added deferring logic, split actual
1942 transformation to convert_mult_to_fma_1.
1943 (math_opts_dom_walker): New type.
1944 (math_opts_dom_walker::after_dom_children): New method, body moved
1945 here from pass_optimize_widening_mul::execute, added deferring logic
1946 bits.
1947 (pass_optimize_widening_mul::execute): Moved most of code to
1948 math_opts_dom_walker::after_dom_children.
1949 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1950 * config/i386/i386.c (ix86_option_override_internal): Added
1951 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1953 2018-01-12 Richard Biener <rguenther@suse.de>
1955 PR debug/83157
1956 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1957 inline instance vars.
1959 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1961 PR target/81819
1962 * config/rx/rx.c (rx_is_restricted_memory_address):
1963 Handle SUBREG case.
1965 2018-01-12 Richard Biener <rguenther@suse.de>
1967 PR tree-optimization/80846
1968 * target.def (split_reduction): New target hook.
1969 * targhooks.c (default_split_reduction): New function.
1970 * targhooks.h (default_split_reduction): Declare.
1971 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1972 target requests first reduce vectors by combining low and high
1973 parts.
1974 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1975 (get_vectype_for_scalar_type_and_size): Export.
1976 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1977 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1978 * doc/tm.texi: Regenerate.
1979 * config/i386/i386.c (ix86_split_reduction): Implement
1980 TARGET_VECTORIZE_SPLIT_REDUCTION.
1982 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1984 PR target/83368
1985 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1986 in PIC mode except for TARGET_VXWORKS_RTP.
1987 * config/sparc/sparc.c: Include cfgrtl.h.
1988 (TARGET_INIT_PIC_REG): Define.
1989 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1990 (sparc_pic_register_p): New predicate.
1991 (sparc_legitimate_address_p): Use it.
1992 (sparc_legitimize_pic_address): Likewise.
1993 (sparc_delegitimize_address): Likewise.
1994 (sparc_mode_dependent_address_p): Likewise.
1995 (gen_load_pcrel_sym): Remove 4th parameter.
1996 (load_got_register): Adjust call to above. Remove obsolete stuff.
1997 (sparc_expand_prologue): Do not call load_got_register here.
1998 (sparc_flat_expand_prologue): Likewise.
1999 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
2000 (sparc_use_pseudo_pic_reg): New function.
2001 (sparc_init_pic_reg): Likewise.
2002 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
2003 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
2005 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
2007 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
2008 Add item for branch_cost.
2010 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2012 PR rtl-optimization/83565
2013 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2014 not extend the result to a larger mode for rotate operations.
2015 (num_sign_bit_copies1): Likewise.
2017 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2019 PR target/40411
2020 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2021 -symbolic.
2022 Use values-Xc.o for -pedantic.
2023 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2025 2018-01-12 Martin Liska <mliska@suse.cz>
2027 PR ipa/83054
2028 * ipa-devirt.c (final_warning_record::grow_type_warnings):
2029 New function.
2030 (possible_polymorphic_call_targets): Use it.
2031 (ipa_devirt): Likewise.
2033 2018-01-12 Martin Liska <mliska@suse.cz>
2035 * profile-count.h (enum profile_quality): Use 0 as invalid
2036 enum value of profile_quality.
2038 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
2040 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2041 -mext-string options.
2043 2018-01-12 Richard Biener <rguenther@suse.de>
2045 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2046 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2047 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2048 Likewise.
2049 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2051 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
2053 * configure.ac (--with-long-double-format): Add support for the
2054 configuration option to change the default long double format on
2055 PowerPC systems.
2056 * config.gcc (powerpc*-linux*-*): Likewise.
2057 * configure: Regenerate.
2058 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2059 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2060 used without modification.
2062 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2064 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2065 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2066 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2067 MISC_BUILTIN_SPEC_BARRIER.
2068 (rs6000_init_builtins): Likewise.
2069 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2070 enum value.
2071 (speculation_barrier): New define_insn.
2072 * doc/extend.texi: Document __builtin_speculation_barrier.
2074 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2076 PR target/83203
2077 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2078 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2079 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2080 iterators.
2081 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2082 integral modes instead of "ss" and "sd".
2083 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2084 vectors with 32-bit and 64-bit elements.
2085 (vecdupssescalarmodesuffix): New mode attribute.
2086 (vec_dup<mode>): Use it.
2088 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2090 PR target/83330
2091 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2092 frame if argument is passed on stack.
2094 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2096 PR target/82682
2097 * ree.c (combine_reaching_defs): Optimize also
2098 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2099 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2101 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2103 PR middle-end/83189
2104 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2106 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2108 PR middle-end/83718
2109 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2110 after they are computed.
2112 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2114 PR tree-optimization/83695
2115 * gimple-loop-linterchange.cc
2116 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2117 reset cached scev information after interchange.
2118 (pass_linterchange::execute): Remove call to scev_reset_htab.
2120 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2122 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2123 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2124 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2125 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2126 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2127 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2128 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2129 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2130 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2131 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2132 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2133 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2134 (V_lane_reg): Likewise.
2135 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2136 New define_expand.
2137 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2138 (vfmal_lane_low<mode>_intrinsic,
2139 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2140 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2141 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2142 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2143 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2144 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2146 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2148 * config/arm/arm-cpus.in (fp16fml): New feature.
2149 (ALL_SIMD): Add fp16fml.
2150 (armv8.2-a): Add fp16fml as an option.
2151 (armv8.3-a): Likewise.
2152 (armv8.4-a): Add fp16fml as part of fp16.
2153 * config/arm/arm.h (TARGET_FP16FML): Define.
2154 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2155 when appropriate.
2156 * config/arm/arm-modes.def (V2HF): Define.
2157 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2158 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2159 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2160 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2161 vfmsl_low, vfmsl_high): New set of builtins.
2162 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2163 (vfml_op): New code attribute.
2164 (VFMLHALVES): New int iterator.
2165 (VFML, VFMLSEL): New mode attributes.
2166 (V_reg): Define mapping for V2HF.
2167 (V_hi, V_lo): New mode attributes.
2168 (VF_constraint): Likewise.
2169 (vfml_half, vfml_half_selector): New int attributes.
2170 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2171 define_expand.
2172 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2173 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2174 New define_insn.
2175 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2176 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2177 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2178 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2179 documentation.
2180 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2181 Document new effective target and option set.
2183 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2185 * config/arm/arm-cpus.in (armv8_4): New feature.
2186 (ARMv8_4a): New fgroup.
2187 (armv8.4-a): New arch.
2188 * config/arm/arm-tables.opt: Regenerate.
2189 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2190 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2191 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2192 Add matching rules for -march=armv8.4-a and extensions.
2193 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2195 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2197 PR target/81821
2198 * config/rx/rx.md (BW): New mode attribute.
2199 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2201 2018-01-11 Richard Biener <rguenther@suse.de>
2203 PR tree-optimization/83435
2204 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2205 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2206 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2208 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2209 Alan Hayward <alan.hayward@arm.com>
2210 David Sherwood <david.sherwood@arm.com>
2212 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2213 field.
2214 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2215 (aarch64_print_address_internal): Use it to check for a zero offset.
2217 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2218 Alan Hayward <alan.hayward@arm.com>
2219 David Sherwood <david.sherwood@arm.com>
2221 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2222 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2223 Return a poly_int64 rather than a HOST_WIDE_INT.
2224 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2225 rather than a HOST_WIDE_INT.
2226 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2227 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2228 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2229 final_offset from HOST_WIDE_INT to poly_int64.
2230 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2231 to_constant when getting the number of units in an Advanced SIMD
2232 mode.
2233 (aarch64_builtin_vectorized_function): Check for a constant number
2234 of units.
2235 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2236 GET_MODE_SIZE.
2237 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2238 attribute instead of GET_MODE_NUNITS.
2239 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2240 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2241 GET_MODE_SIZE for fixed-size registers.
2242 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2243 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2244 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2245 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2246 (aarch64_print_operand, aarch64_print_address_internal)
2247 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2248 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2249 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2250 Handle polynomial GET_MODE_SIZE.
2251 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2252 wider than SImode without modification.
2253 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2254 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2255 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2256 passing and returning SVE modes.
2257 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2258 rather than GEN_INT.
2259 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2260 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2261 (aarch64_allocate_and_probe_stack_space): Likewise.
2262 (aarch64_layout_frame): Cope with polynomial offsets.
2263 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2264 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2265 polynomial offsets.
2266 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2267 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2268 poly_int64 rather than a HOST_WIDE_INT.
2269 (aarch64_get_separate_components, aarch64_process_components)
2270 (aarch64_expand_prologue, aarch64_expand_epilogue)
2271 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2272 (aarch64_anchor_offset): New function, split out from...
2273 (aarch64_legitimize_address): ...here.
2274 (aarch64_builtin_vectorization_cost): Handle polynomial
2275 TYPE_VECTOR_SUBPARTS.
2276 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2277 GET_MODE_NUNITS.
2278 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2279 number of elements from the PARALLEL rather than the mode.
2280 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2281 rather than GET_MODE_BITSIZE.
2282 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2283 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2284 (aarch64_expand_vec_perm_const_1): Handle polynomial
2285 d->perm.length () and d->perm elements.
2286 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2287 Apply to_constant to d->perm elements.
2288 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2289 polynomial CONST_VECTOR_NUNITS.
2290 (aarch64_move_pointer): Take amount as a poly_int64 rather
2291 than an int.
2292 (aarch64_progress_pointer): Avoid temporary variable.
2293 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2294 the mode attribute instead of GET_MODE.
2296 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2297 Alan Hayward <alan.hayward@arm.com>
2298 David Sherwood <david.sherwood@arm.com>
2300 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2301 x exists before using it.
2302 (aarch64_add_constant_internal): Rename to...
2303 (aarch64_add_offset_1): ...this. Replace regnum with separate
2304 src and dest rtxes. Handle the case in which they're different,
2305 including when the offset is zero. Replace scratchreg with an rtx.
2306 Use 2 additions if there is no spare register into which we can
2307 move a 16-bit constant.
2308 (aarch64_add_constant): Delete.
2309 (aarch64_add_offset): Replace reg with separate src and dest
2310 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2311 Use aarch64_add_offset_1.
2312 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2313 an rtx rather than an int. Take the delta as a poly_int64
2314 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2315 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2316 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2317 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2318 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2319 and aarch64_add_sp.
2320 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2321 aarch64_add_constant.
2323 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2325 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2326 Use scalar_float_mode.
2328 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2330 * config/aarch64/aarch64-simd.md
2331 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2332 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2333 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2334 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2335 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2336 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2337 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2338 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2339 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2340 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2342 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2344 PR target/83514
2345 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2346 targ_options->x_arm_arch_string is non NULL.
2348 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2350 * config/aarch64/aarch64.h
2351 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2353 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2355 PR target/82096
2356 * expmed.c (emit_store_flag_force): Swap if const op0
2357 and change VOIDmode to mode of op0.
2359 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2361 PR rtl-optimization/83761
2362 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2363 than bytes to mode_for_size.
2365 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2367 PR middle-end/83189
2368 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2369 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2370 profile.
2372 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2374 PR middle-end/83575
2375 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2376 when in layout mode.
2377 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2378 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2379 partition fixup.
2381 2018-01-10 Michael Collison <michael.collison@arm.com>
2383 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2384 * config/aarch64/aarch64-option-extension.def: Add
2385 AARCH64_OPT_EXTENSION of 'fp16fml'.
2386 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2387 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2388 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2389 * config/aarch64/constraints.md (Ui7): New constraint.
2390 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2391 (VFMLA_SEL_W): Ditto.
2392 (f16quad): Ditto.
2393 (f16mac1): Ditto.
2394 (VFMLA16_LOW): New int iterator.
2395 (VFMLA16_HIGH): Ditto.
2396 (UNSPEC_FMLAL): New unspec.
2397 (UNSPEC_FMLSL): Ditto.
2398 (UNSPEC_FMLAL2): Ditto.
2399 (UNSPEC_FMLSL2): Ditto.
2400 (f16mac): New code attribute.
2401 * config/aarch64/aarch64-simd-builtins.def
2402 (aarch64_fmlal_lowv2sf): Ditto.
2403 (aarch64_fmlsl_lowv2sf): Ditto.
2404 (aarch64_fmlalq_lowv4sf): Ditto.
2405 (aarch64_fmlslq_lowv4sf): Ditto.
2406 (aarch64_fmlal_highv2sf): Ditto.
2407 (aarch64_fmlsl_highv2sf): Ditto.
2408 (aarch64_fmlalq_highv4sf): Ditto.
2409 (aarch64_fmlslq_highv4sf): Ditto.
2410 (aarch64_fmlal_lane_lowv2sf): Ditto.
2411 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2412 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2413 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2414 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2415 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2416 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2417 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2418 (aarch64_fmlal_lane_highv2sf): Ditto.
2419 (aarch64_fmlsl_lane_highv2sf): Ditto.
2420 (aarch64_fmlal_laneq_highv2sf): Ditto.
2421 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2422 (aarch64_fmlalq_lane_highv4sf): Ditto.
2423 (aarch64_fmlsl_lane_highv4sf): Ditto.
2424 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2425 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2426 * config/aarch64/aarch64-simd.md:
2427 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2428 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2429 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2430 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2431 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2432 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2433 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2434 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2435 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2436 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2437 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2438 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2439 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2440 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2441 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2442 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2443 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2444 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2445 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2446 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2447 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2448 (vfmlsl_low_u32): Ditto.
2449 (vfmlalq_low_u32): Ditto.
2450 (vfmlslq_low_u32): Ditto.
2451 (vfmlal_high_u32): Ditto.
2452 (vfmlsl_high_u32): Ditto.
2453 (vfmlalq_high_u32): Ditto.
2454 (vfmlslq_high_u32): Ditto.
2455 (vfmlal_lane_low_u32): Ditto.
2456 (vfmlsl_lane_low_u32): Ditto.
2457 (vfmlal_laneq_low_u32): Ditto.
2458 (vfmlsl_laneq_low_u32): Ditto.
2459 (vfmlalq_lane_low_u32): Ditto.
2460 (vfmlslq_lane_low_u32): Ditto.
2461 (vfmlalq_laneq_low_u32): Ditto.
2462 (vfmlslq_laneq_low_u32): Ditto.
2463 (vfmlal_lane_high_u32): Ditto.
2464 (vfmlsl_lane_high_u32): Ditto.
2465 (vfmlal_laneq_high_u32): Ditto.
2466 (vfmlsl_laneq_high_u32): Ditto.
2467 (vfmlalq_lane_high_u32): Ditto.
2468 (vfmlslq_lane_high_u32): Ditto.
2469 (vfmlalq_laneq_high_u32): Ditto.
2470 (vfmlslq_laneq_high_u32): Ditto.
2471 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2472 (AARCH64_FL_FOR_ARCH8_4): New.
2473 (AARCH64_ISA_F16FML): New ISA flag.
2474 (TARGET_F16FML): New feature flag for fp16fml.
2475 (doc/invoke.texi): Document new fp16fml option.
2477 2018-01-10 Michael Collison <michael.collison@arm.com>
2479 * config/aarch64/aarch64-builtins.c:
2480 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2481 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2482 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2483 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2484 (AARCH64_ISA_SHA3): New ISA flag.
2485 (TARGET_SHA3): New feature flag for sha3.
2486 * config/aarch64/iterators.md (sha512_op): New int attribute.
2487 (CRYPTO_SHA512): New int iterator.
2488 (UNSPEC_SHA512H): New unspec.
2489 (UNSPEC_SHA512H2): Ditto.
2490 (UNSPEC_SHA512SU0): Ditto.
2491 (UNSPEC_SHA512SU1): Ditto.
2492 * config/aarch64/aarch64-simd-builtins.def
2493 (aarch64_crypto_sha512hqv2di): New builtin.
2494 (aarch64_crypto_sha512h2qv2di): Ditto.
2495 (aarch64_crypto_sha512su0qv2di): Ditto.
2496 (aarch64_crypto_sha512su1qv2di): Ditto.
2497 (aarch64_eor3qv8hi): Ditto.
2498 (aarch64_rax1qv2di): Ditto.
2499 (aarch64_xarqv2di): Ditto.
2500 (aarch64_bcaxqv8hi): Ditto.
2501 * config/aarch64/aarch64-simd.md:
2502 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2503 (aarch64_crypto_sha512su0qv2di): Ditto.
2504 (aarch64_crypto_sha512su1qv2di): Ditto.
2505 (aarch64_eor3qv8hi): Ditto.
2506 (aarch64_rax1qv2di): Ditto.
2507 (aarch64_xarqv2di): Ditto.
2508 (aarch64_bcaxqv8hi): Ditto.
2509 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2510 (vsha512h2q_u64): Ditto.
2511 (vsha512su0q_u64): Ditto.
2512 (vsha512su1q_u64): Ditto.
2513 (veor3q_u16): Ditto.
2514 (vrax1q_u64): Ditto.
2515 (vxarq_u64): Ditto.
2516 (vbcaxq_u16): Ditto.
2517 * config/arm/types.md (crypto_sha512): New type attribute.
2518 (crypto_sha3): Ditto.
2519 (doc/invoke.texi): Document new sha3 option.
2521 2018-01-10 Michael Collison <michael.collison@arm.com>
2523 * config/aarch64/aarch64-builtins.c:
2524 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2525 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2526 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2527 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2528 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2529 (AARCH64_ISA_SM4): New ISA flag.
2530 (TARGET_SM4): New feature flag for sm4.
2531 * config/aarch64/aarch64-simd-builtins.def
2532 (aarch64_sm3ss1qv4si): Ditto.
2533 (aarch64_sm3tt1aq4si): Ditto.
2534 (aarch64_sm3tt1bq4si): Ditto.
2535 (aarch64_sm3tt2aq4si): Ditto.
2536 (aarch64_sm3tt2bq4si): Ditto.
2537 (aarch64_sm3partw1qv4si): Ditto.
2538 (aarch64_sm3partw2qv4si): Ditto.
2539 (aarch64_sm4eqv4si): Ditto.
2540 (aarch64_sm4ekeyqv4si): Ditto.
2541 * config/aarch64/aarch64-simd.md:
2542 (aarch64_sm3ss1qv4si): Ditto.
2543 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2544 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2545 (aarch64_sm4eqv4si): Ditto.
2546 (aarch64_sm4ekeyqv4si): Ditto.
2547 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2548 (sm3part_op): Ditto.
2549 (CRYPTO_SM3TT): Ditto.
2550 (CRYPTO_SM3PART): Ditto.
2551 (UNSPEC_SM3SS1): New unspec.
2552 (UNSPEC_SM3TT1A): Ditto.
2553 (UNSPEC_SM3TT1B): Ditto.
2554 (UNSPEC_SM3TT2A): Ditto.
2555 (UNSPEC_SM3TT2B): Ditto.
2556 (UNSPEC_SM3PARTW1): Ditto.
2557 (UNSPEC_SM3PARTW2): Ditto.
2558 (UNSPEC_SM4E): Ditto.
2559 (UNSPEC_SM4EKEY): Ditto.
2560 * config/aarch64/constraints.md (Ui2): New constraint.
2561 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2562 * config/arm/types.md (crypto_sm3): New type attribute.
2563 (crypto_sm4): Ditto.
2564 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2565 (vsm3tt1aq_u32): Ditto.
2566 (vsm3tt1bq_u32): Ditto.
2567 (vsm3tt2aq_u32): Ditto.
2568 (vsm3tt2bq_u32): Ditto.
2569 (vsm3partw1q_u32): Ditto.
2570 (vsm3partw2q_u32): Ditto.
2571 (vsm4eq_u32): Ditto.
2572 (vsm4ekeyq_u32): Ditto.
2573 (doc/invoke.texi): Document new sm4 option.
2575 2018-01-10 Michael Collison <michael.collison@arm.com>
2577 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2578 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2579 (AARCH64_FL_FOR_ARCH8_4): New.
2580 (AARCH64_FL_V8_4): New flag.
2581 (doc/invoke.texi): Document new armv8.4-a option.
2583 2018-01-10 Michael Collison <michael.collison@arm.com>
2585 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2586 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2587 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2588 * config/aarch64/aarch64-option-extension.def: Add
2589 AARCH64_OPT_EXTENSION of 'sha2'.
2590 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2591 (crypto): Disable sha2 and aes if crypto disabled.
2592 (crypto): Enable aes and sha2 if enabled.
2593 (simd): Disable sha2 and aes if simd disabled.
2594 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2595 New flags.
2596 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2597 (TARGET_SHA2): New feature flag for sha2.
2598 (TARGET_AES): New feature flag for aes.
2599 * config/aarch64/aarch64-simd.md:
2600 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2601 conditional on TARGET_AES.
2602 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2603 (aarch64_crypto_sha1hsi): Make pattern conditional
2604 on TARGET_SHA2.
2605 (aarch64_crypto_sha1hv4si): Ditto.
2606 (aarch64_be_crypto_sha1hv4si): Ditto.
2607 (aarch64_crypto_sha1su1v4si): Ditto.
2608 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2609 (aarch64_crypto_sha1su0v4si): Ditto.
2610 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2611 (aarch64_crypto_sha256su0v4si): Ditto.
2612 (aarch64_crypto_sha256su1v4si): Ditto.
2613 (doc/invoke.texi): Document new aes and sha2 options.
2615 2018-01-10 Martin Sebor <msebor@redhat.com>
2617 PR tree-optimization/83781
2618 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2619 as string arrays.
2621 2018-01-11 Martin Sebor <msebor@gmail.com>
2622 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2624 PR tree-optimization/83501
2625 PR tree-optimization/81703
2627 * tree-ssa-strlen.c (get_string_cst): Rename...
2628 (get_string_len): ...to this. Handle global constants.
2629 (handle_char_store): Adjust.
2631 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2632 Jim Wilson <jimw@sifive.com>
2634 * config/riscv/riscv-protos.h (riscv_output_return): New.
2635 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2636 (riscv_attribute_table, riscv_output_return),
2637 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2638 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2639 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2640 function.
2641 (riscv_expand_prologue): Add early return for naked function.
2642 (riscv_expand_epilogue): Likewise.
2643 (riscv_function_ok_for_sibcall): Return false for naked function.
2644 (riscv_set_current_function): New.
2645 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2646 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2647 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2648 * doc/extend.texi (RISC-V Function Attributes): New.
2650 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2652 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2653 check for 128-bit long double before checking TCmode.
2654 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2655 128-bit long doubles before checking TFmode or TCmode.
2656 (FLOAT128_IBM_P): Likewise.
2658 2018-01-10 Martin Sebor <msebor@redhat.com>
2660 PR tree-optimization/83671
2661 * builtins.c (c_strlen): Unconditionally return zero for the empty
2662 string.
2663 Use -Warray-bounds for warnings.
2664 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2665 for non-constant array indices with COMPONENT_REF, arrays of
2666 arrays, and pointers to arrays.
2667 (gimple_fold_builtin_strlen): Determine and set length range for
2668 non-constant character arrays.
2670 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2672 PR middle-end/81897
2673 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2674 empty blocks.
2676 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2678 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2680 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2682 PR target/83399
2683 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2684 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2685 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2686 indexed_or_indirect_operand predicate.
2687 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2688 (*vsx_le_perm_load_v8hi): Likewise.
2689 (*vsx_le_perm_load_v16qi): Likewise.
2690 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2691 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2692 (*vsx_le_perm_store_v8hi): Likewise.
2693 (*vsx_le_perm_store_v16qi): Likewise.
2694 (eight unnamed splitters): Likewise.
2696 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2698 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2699 * config/rs6000/emmintrin.h: Likewise.
2700 * config/rs6000/mmintrin.h: Likewise.
2701 * config/rs6000/xmmintrin.h: Likewise.
2703 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2705 PR c++/43486
2706 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2707 "public_flag".
2708 * tree.c (tree_nop_conversion): Return true for location wrapper
2709 nodes.
2710 (maybe_wrap_with_location): New function.
2711 (selftest::check_strip_nops): New function.
2712 (selftest::test_location_wrappers): New function.
2713 (selftest::tree_c_tests): Call it.
2714 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2715 (maybe_wrap_with_location): New decl.
2716 (EXPR_LOCATION_WRAPPER_P): New macro.
2717 (location_wrapper_p): New inline function.
2718 (tree_strip_any_location_wrapper): New inline function.
2720 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2722 PR target/83735
2723 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2724 stack_realign_offset for the largest alignment of stack slot
2725 actually used.
2726 (ix86_find_max_used_stack_alignment): New function.
2727 (ix86_finalize_stack_frame_flags): Use it. Set
2728 max_used_stack_alignment if we don't realign stack.
2729 * config/i386/i386.h (machine_function): Add
2730 max_used_stack_alignment.
2732 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2734 * config/arm/arm.opt (-mbranch-cost): New option.
2735 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2736 account.
2738 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2740 PR target/83629
2741 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2742 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2744 2018-01-10 Richard Biener <rguenther@suse.de>
2746 PR debug/83765
2747 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2748 early out so it also covers the case where we have a non-NULL
2749 origin.
2751 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2753 PR tree-optimization/83753
2754 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2755 for non-strided grouped accesses if the number of elements is 1.
2757 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2759 PR target/81616
2760 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2761 * i386.h (TARGET_USE_GATHER): Define.
2762 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2764 2018-01-10 Martin Liska <mliska@suse.cz>
2766 PR bootstrap/82831
2767 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2768 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2769 partitioning.
2770 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2771 CLEANUP_NO_PARTITIONING is not set.
2773 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2775 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2776 for vectors, as a partial revert of r254296.
2777 * rtl.h (const_vec_p): Delete.
2778 (const_vec_duplicate_p): Don't test for vector CONSTs.
2779 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2780 * expmed.c (make_tree): Likewise.
2782 Revert:
2783 * common.md (E, F): Use CONSTANT_P instead of checking for
2784 CONST_VECTOR.
2785 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2786 checking for CONST_VECTOR.
2788 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2790 PR middle-end/83575
2791 * predict.c (force_edge_cold): Handle in more sane way edges
2792 with no prediction.
2794 2018-01-09 Carl Love <cel@us.ibm.com>
2796 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2797 V4SI, V4SF types.
2798 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2799 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2800 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2801 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2802 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2803 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2804 * config/rs6000/rs6000-protos.h: Add extern defition for
2805 rs6000_generate_float2_double_code.
2806 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2807 function.
2808 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2809 (float2_v2df): Add define_expand.
2811 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2813 PR target/83628
2814 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2815 op_mode in the force_to_mode call.
2817 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2819 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2820 instead of checking each element individually.
2821 (aarch64_evpc_uzp): Likewise.
2822 (aarch64_evpc_zip): Likewise.
2823 (aarch64_evpc_ext): Likewise.
2824 (aarch64_evpc_rev): Likewise.
2825 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2826 instead of checking each element individually. Return true without
2827 generating rtl if
2828 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2829 whether all selected elements come from the same input, instead of
2830 checking each element individually. Remove calls to gen_rtx_REG,
2831 start_sequence and end_sequence and instead assert that no rtl is
2832 generated.
2834 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2836 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2837 order of HIGH and CONST checks.
2839 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2841 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2842 if the destination isn't an SSA_NAME.
2844 2018-01-09 Richard Biener <rguenther@suse.de>
2846 PR tree-optimization/83668
2847 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2848 move prologue...
2849 (canonicalize_loop_form): ... here, renamed from ...
2850 (canonicalize_loop_closed_ssa_form): ... this and amended to
2851 swap successor edges for loop exit blocks to make us use
2852 the RPO order we need for initial schedule generation.
2854 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2856 PR tree-optimization/64811
2857 * match.pd: When optimizing comparisons with Inf, avoid
2858 introducing or losing exceptions from comparisons with NaN.
2860 2018-01-09 Martin Liska <mliska@suse.cz>
2862 PR sanitizer/82517
2863 * asan.c (shadow_mem_size): Add gcc_assert.
2865 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2867 Don't save registers in main().
2869 PR target/83738
2870 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2871 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2872 * config/avr/avr.c (avr_set_current_function): Don't error if
2873 naked, OS_task or OS_main are specified at the same time.
2874 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2875 OS_main.
2876 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2877 attribute.
2878 * common/config/avr/avr-common.c (avr_option_optimization_table):
2879 Switch on -mmain-is-OS_task for optimizing compilations.
2881 2018-01-09 Richard Biener <rguenther@suse.de>
2883 PR tree-optimization/83572
2884 * graphite.c: Include cfganal.h.
2885 (graphite_transform_loops): Connect infinite loops to exit
2886 and remove fake edges at the end.
2888 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2890 * ipa-inline.c (edge_badness): Revert accidental checkin.
2892 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2894 PR ipa/80763
2895 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2896 symbols; not inline clones.
2898 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2900 PR target/83507
2901 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2902 hard registers. Formatting fixes.
2904 PR preprocessor/83722
2905 * gcc.c (try_generate_repro): Pass
2906 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2907 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2908 do_report_bug.
2910 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2911 Kito Cheng <kito.cheng@gmail.com>
2913 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2914 (riscv_leaf_function_p): Delete.
2915 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2917 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2919 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2920 function.
2921 (do_ifelse): New function.
2922 (do_isel): New function.
2923 (do_sub3): New function.
2924 (do_add3): New function.
2925 (do_load_mask_compare): New function.
2926 (do_overlap_load_compare): New function.
2927 (expand_compare_loop): New function.
2928 (expand_block_compare): Call expand_compare_loop() when appropriate.
2929 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2930 option description.
2931 (-mblock-compare-inline-loop-limit): New option.
2933 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2935 PR target/83677
2936 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2937 Reverse order of second and third operands in first alternative.
2938 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2939 of first and second elements in UNSPEC_VPERMR vector.
2940 (altivec_expand_vec_perm_le): Likewise.
2942 2017-01-08 Jeff Law <law@redhat.com>
2944 PR rtl-optimizatin/81308
2945 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2946 (process_switch): If group_case_labels makes a change, then set
2947 cfg_altered.
2948 (pass_convert_switch::execute): If a switch is converted, then
2949 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2951 PR rtl-optimization/81308
2952 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2953 splitting insns.
2955 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2957 PR target/83663 - Revert r255946
2958 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2959 generation for cases where splatting a value is not useful.
2960 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2961 across a vec_duplicate and a paradoxical subreg forming a vector
2962 mode to a vec_concat.
2964 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2966 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2967 -march=armv8.3-a variants.
2968 * config/arm/t-multilib: Likewise.
2969 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2971 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2973 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2974 to generate rtl.
2975 (cceq_ior_compare_complement): Give it a name so I can use it, and
2976 change boolean_or_operator predicate to boolean_operator so it can
2977 be used to generate a crand.
2978 (eqne): New code iterator.
2979 (bd/bd_neg): New code_attrs.
2980 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2981 a single define_insn.
2982 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2983 decrement (bdnzt/bdnzf/bdzt/bdzf).
2984 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2985 with the new names of the branch decrement patterns, and added the
2986 names of the branch decrement conditional patterns.
2988 2018-01-08 Richard Biener <rguenther@suse.de>
2990 PR tree-optimization/83563
2991 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2992 cache.
2994 2018-01-08 Richard Biener <rguenther@suse.de>
2996 PR middle-end/83713
2997 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2999 2018-01-08 Richard Biener <rguenther@suse.de>
3001 PR tree-optimization/83685
3002 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
3003 references to abnormals.
3005 2018-01-08 Richard Biener <rguenther@suse.de>
3007 PR lto/83719
3008 * dwarf2out.c (output_indirect_strings): Handle empty
3009 skeleton_debug_str_hash.
3010 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
3012 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3014 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3015 (emit_store_direct): Likewise.
3016 (arc_trampoline_adjust_address): Likewise.
3017 (arc_asm_trampoline_template): New function.
3018 (arc_initialize_trampoline): Use asm_trampoline_template.
3019 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3020 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3021 * config/arc/arc.md (flush_icache): Delete pattern.
3023 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3025 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3026 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3027 munaligned-access.
3029 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3031 PR target/83681
3032 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3033 by not USED_FOR_TARGET.
3034 (make_pass_resolve_sw_modes): Likewise.
3036 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3038 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3039 USED_FOR_TARGET.
3041 2018-01-08 Richard Biener <rguenther@suse.de>
3043 PR middle-end/83580
3044 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3046 2018-01-08 Richard Biener <rguenther@suse.de>
3048 PR middle-end/83517
3049 * match.pd ((t * 2) / 2) -> t): Add missing :c.
3051 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
3053 PR middle-end/81897
3054 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3055 basic blocks with a small number of successors.
3056 (convert_control_dep_chain_into_preds): Improve handling of
3057 forwarder blocks.
3058 (dump_predicates): Split apart into...
3059 (dump_pred_chain): ...here...
3060 (dump_pred_info): ...and here.
3061 (can_one_predicate_be_invalidated_p): Add debugging printfs.
3062 (can_chain_union_be_invalidated_p): Improve check for invalidation
3063 of paths.
3064 (uninit_uses_cannot_happen): Avoid unnecessary if
3065 convert_control_dep_chain_into_preds yielded nothing.
3067 2018-01-06 Martin Sebor <msebor@redhat.com>
3069 PR tree-optimization/83640
3070 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3071 subtracting negative offset from size.
3072 (builtin_access::overlap): Adjust offset bounds of the access to fall
3073 within the size of the object if possible.
3075 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
3077 PR rtl-optimization/83699
3078 * expmed.c (extract_bit_field_1): Restrict the vector usage of
3079 extract_bit_field_as_subreg to cases in which the extracted
3080 value is also a vector.
3082 * lra-constraints.c (process_alt_operands): Test for the equivalence
3083 substitutions when detecting a possible reload cycle.
3085 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3087 PR debug/83480
3088 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3089 by default if flag_selective_schedling{,2}. Formatting fixes.
3091 PR rtl-optimization/83682
3092 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3093 if it has non-VECTOR_MODE element mode.
3094 (vec_duplicate_p): Likewise.
3096 PR middle-end/83694
3097 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3098 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3100 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3102 PR target/83604
3103 * config/i386/i386-builtin.def
3104 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3105 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3106 Require also OPTION_MASK_ISA_AVX512F in addition to
3107 OPTION_MASK_ISA_GFNI.
3108 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3109 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3110 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3111 to OPTION_MASK_ISA_GFNI.
3112 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3113 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3114 OPTION_MASK_ISA_AVX512BW.
3115 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3116 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3117 addition to OPTION_MASK_ISA_GFNI.
3118 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3119 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3120 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3121 to OPTION_MASK_ISA_GFNI.
3122 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3123 a requirement for all ISAs rather than any of them with a few
3124 exceptions.
3125 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3126 processing.
3127 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3128 bitmasks to be enabled with 3 exceptions, instead of requiring any
3129 enabled ISA with lots of exceptions.
3130 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3131 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3132 Change avx512bw in isa attribute to avx512f.
3133 * config/i386/sgxintrin.h: Add license boilerplate.
3134 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3135 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3136 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3137 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3138 defined.
3139 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3140 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3141 temporarily sse2 rather than sse if not enabled already.
3143 PR target/83604
3144 * config/i386/sse.md (VI248_VLBW): Rename to ...
3145 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3146 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3147 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3148 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3149 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3150 mode iterator instead of VI248_VLBW.
3152 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3154 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3155 (record_modified): Skip clobbers; add debug output.
3156 (param_change_prob): Use sreal frequencies.
3158 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3160 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3161 punt for user-aligned variables.
3163 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3165 * tree-chrec.c (chrec_contains_symbols): Return true for
3166 POLY_INT_CST.
3168 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3170 PR target/82439
3171 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3172 of (x|y) == x for BICS pattern.
3174 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3176 PR tree-optimization/83605
3177 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3178 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3179 can throw.
3181 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3183 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3184 * config/epiphany/rtems.h: New file.
3186 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3187 Uros Bizjak <ubizjak@gmail.com>
3189 PR target/83554
3190 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3191 QIreg_operand instead of register_operand predicate.
3192 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3193 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3194 comments instead of -fmitigate[-_]rop.
3196 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3198 PR bootstrap/81926
3199 * cgraphunit.c (symbol_table::compile): Switch to text_section
3200 before calling assembly_start debug hook.
3201 * run-rtl-passes.c (run_rtl_passes): Likewise.
3202 Include output.h.
3204 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3206 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3207 range_int_cst_p rather than !symbolic_range_p before calling
3208 extract_range_from_multiplicative_op_1.
3210 2017-01-04 Jeff Law <law@redhat.com>
3212 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3213 redundant test in assertion.
3215 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3217 * doc/rtl.texi: Document machine_mode wrapper classes.
3219 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3221 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3222 using tree_to_uhwi.
3224 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3226 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3227 the VEC_PERM_EXPR fold to fail.
3229 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3231 PR debug/83585
3232 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3233 to switched_sections.
3235 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3237 PR target/83680
3238 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3239 test for d.testing.
3241 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3243 PR target/83387
3244 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3245 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3247 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3249 PR debug/83666
3250 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3251 is BLKmode and bitpos not zero or mode change is needed.
3253 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3255 PR target/83675
3256 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3257 TARGET_VIS2.
3259 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3261 PR target/83628
3262 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3263 instead of MULT rtx. Update all corresponding splitters.
3264 (*saddl_se): Ditto.
3265 (*ssub<modesuffix>): Ditto.
3266 (*ssubl_se): Ditto.
3267 (*cmp_sadd_di): Update split patterns.
3268 (*cmp_sadd_si): Ditto.
3269 (*cmp_sadd_sidi): Ditto.
3270 (*cmp_ssub_di): Ditto.
3271 (*cmp_ssub_si): Ditto.
3272 (*cmp_ssub_sidi): Ditto.
3273 * config/alpha/predicates.md (const23_operand): New predicate.
3274 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3275 Look for ASHIFT, not MULT inner operand.
3276 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3278 2018-01-04 Martin Liska <mliska@suse.cz>
3280 PR gcov-profile/83669
3281 * gcov.c (output_intermediate_file): Add version to intermediate
3282 gcov file.
3283 * doc/gcov.texi: Document new field 'version' in intermediate
3284 file format. Fix location of '-k' option of gcov command.
3286 2018-01-04 Martin Liska <mliska@suse.cz>
3288 PR ipa/82352
3289 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3291 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3293 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3295 2018-01-03 Martin Sebor <msebor@redhat.com>
3297 PR tree-optimization/83655
3298 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3299 checking calls with invalid arguments.
3301 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3303 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3304 (vectorizable_mask_load_store): Delete.
3305 (vectorizable_call): Return false for masked loads and stores.
3306 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3307 instead of gimple_assign_rhs1.
3308 (vectorizable_load): Handle IFN_MASK_LOAD.
3309 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3311 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3313 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3314 split out from..,
3315 (vectorizable_mask_load_store): ...here.
3316 (vectorizable_load): ...and here.
3318 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3320 * tree-vect-stmts.c (vect_build_all_ones_mask)
3321 (vect_build_zero_merge_argument): New functions, split out from...
3322 (vectorizable_load): ...here.
3324 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3326 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3327 split out from...
3328 (vectorizable_mask_load_store): ...here.
3329 (vectorizable_store): ...and here.
3331 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3333 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3334 split out from...
3335 (vectorizable_mask_load_store): ...here.
3337 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3339 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3340 (vect_model_store_cost): Take a vec_load_store_type instead of a
3341 vect_def_type.
3342 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3343 (vect_model_store_cost): Take a vec_load_store_type instead of a
3344 vect_def_type.
3345 (vectorizable_mask_load_store): Update accordingly.
3346 (vectorizable_store): Likewise.
3347 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3349 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3351 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3352 IFN_MASK_LOAD calls here rather than...
3353 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3355 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3356 Alan Hayward <alan.hayward@arm.com>
3357 David Sherwood <david.sherwood@arm.com>
3359 * expmed.c (extract_bit_field_1): For vector extracts,
3360 fall back to extract_bit_field_as_subreg if vec_extract
3361 isn't available.
3363 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3364 Alan Hayward <alan.hayward@arm.com>
3365 David Sherwood <david.sherwood@arm.com>
3367 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3368 they are variable or constant sized.
3369 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3370 slots for constant-sized data.
3372 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3373 Alan Hayward <alan.hayward@arm.com>
3374 David Sherwood <david.sherwood@arm.com>
3376 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3377 handling COND_EXPRs with boolean comparisons, try to find a better
3378 basis for the mask type than the boolean itself.
3380 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3382 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3383 is calculated and how it can be overridden.
3384 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3385 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3386 if defined.
3387 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3388 if nonzero.
3390 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3391 Alan Hayward <alan.hayward@arm.com>
3392 David Sherwood <david.sherwood@arm.com>
3394 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3395 Remove the mode argument.
3396 (aarch64_simd_valid_immediate): Remove the mode and inverse
3397 arguments.
3398 * config/aarch64/iterators.md (bitsize): New iterator.
3399 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3400 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3401 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3402 aarch64_simd_valid_immediate.
3403 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3404 (aarch64_reg_or_bic_imm): Likewise.
3405 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3406 with an insn_type enum and msl with a modifier_type enum.
3407 Replace element_width with a scalar_mode. Change the shift
3408 to unsigned int. Add constructors for scalar_float_mode and
3409 scalar_int_mode elements.
3410 (aarch64_vect_float_const_representable_p): Delete.
3411 (aarch64_can_const_movi_rtx_p)
3412 (aarch64_simd_scalar_immediate_valid_for_move)
3413 (aarch64_simd_make_constant): Update call to
3414 aarch64_simd_valid_immediate.
3415 (aarch64_advsimd_valid_immediate_hs): New function.
3416 (aarch64_advsimd_valid_immediate): Likewise.
3417 (aarch64_simd_valid_immediate): Remove mode and inverse
3418 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3419 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3420 and aarch64_float_const_representable_p on the result.
3421 (aarch64_output_simd_mov_immediate): Remove mode argument.
3422 Update call to aarch64_simd_valid_immediate and use of
3423 simd_immediate_info.
3424 (aarch64_output_scalar_simd_mov_immediate): Update call
3425 accordingly.
3427 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3428 Alan Hayward <alan.hayward@arm.com>
3429 David Sherwood <david.sherwood@arm.com>
3431 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3432 (mode_nunits): Likewise CONST_MODE_NUNITS.
3433 * machmode.def (ADJUST_NUNITS): Document.
3434 * genmodes.c (mode_data::need_nunits_adj): New field.
3435 (blank_mode): Update accordingly.
3436 (adj_nunits): New variable.
3437 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3438 parameter.
3439 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3440 listed in adj_nunits.
3441 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3442 listed in adj_nunits. Don't emit case statements for such modes.
3443 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3444 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3445 nothing if adj_nunits is nonnull.
3446 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3447 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3448 (emit_mode_fbit): Update use of print_maybe_const_decl.
3449 (emit_move_size): Likewise. Treat the array as non-const
3450 if adj_nunits.
3451 (emit_mode_adjustments): Handle adj_nunits.
3453 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3455 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3456 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3457 (VECTOR_MODES): Use it.
3458 (make_vector_modes): Take the prefix as an argument.
3460 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3461 Alan Hayward <alan.hayward@arm.com>
3462 David Sherwood <david.sherwood@arm.com>
3464 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3465 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3466 for MODE_VECTOR_BOOL.
3467 * machmode.def (VECTOR_BOOL_MODE): Document.
3468 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3469 (make_vector_bool_mode): New function.
3470 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3471 MODE_VECTOR_BOOL.
3472 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3473 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3474 Likewise.
3475 * stor-layout.c (int_mode_for_mode): Likewise.
3476 * tree.c (build_vector_type_for_mode): Likewise.
3477 * varasm.c (output_constant_pool_2): Likewise.
3478 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3479 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3480 for MODE_VECTOR_BOOL.
3481 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3482 of mode class checks.
3483 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3484 instead of a list of mode class checks.
3485 (expand_vector_scalar_condition): Likewise.
3486 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3488 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3489 Alan Hayward <alan.hayward@arm.com>
3490 David Sherwood <david.sherwood@arm.com>
3492 * machmode.h (mode_size): Change from unsigned short to
3493 poly_uint16_pod.
3494 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3495 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3496 or if measurement_type is not polynomial.
3497 (fixed_size_mode::includes_p): Check for constant-sized modes.
3498 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3499 return a poly_uint16 rather than an unsigned short.
3500 (emit_mode_size): Change the type of mode_size from unsigned short
3501 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3502 (emit_mode_adjustments): Cope with polynomial vector sizes.
3503 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3504 for GET_MODE_SIZE.
3505 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3506 for GET_MODE_SIZE.
3507 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3508 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3509 * caller-save.c (setup_save_areas): Likewise.
3510 (replace_reg_with_saved_mem): Likewise.
3511 * calls.c (emit_library_call_value_1): Likewise.
3512 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3513 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3514 (gen_lowpart_for_combine): Likewise.
3515 * convert.c (convert_to_integer_1): Likewise.
3516 * cse.c (equiv_constant, cse_insn): Likewise.
3517 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3518 (cselib_subst_to_values): Likewise.
3519 * dce.c (word_dce_process_block): Likewise.
3520 * df-problems.c (df_word_lr_mark_ref): Likewise.
3521 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3522 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3523 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3524 (rtl_for_decl_location): Likewise.
3525 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3526 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3527 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3528 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3529 (expand_expr_real_1): Likewise.
3530 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3531 (pad_below): Likewise.
3532 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3533 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3534 * ira.c (get_subreg_tracking_sizes): Likewise.
3535 * ira-build.c (ira_create_allocno_objects): Likewise.
3536 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3537 (ira_sort_regnos_for_alter_reg): Likewise.
3538 * ira-costs.c (record_operand_costs): Likewise.
3539 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3540 (resolve_simple_move): Likewise.
3541 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3542 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3543 (lra_constraints): Likewise.
3544 (CONST_POOL_OK_P): Reject variable-sized modes.
3545 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3546 (add_pseudo_to_slot, lra_spill): Likewise.
3547 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3548 * optabs-query.c (get_best_extraction_insn): Likewise.
3549 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3550 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3551 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3552 * recog.c (offsettable_address_addr_space_p): Likewise.
3553 * regcprop.c (maybe_mode_change): Likewise.
3554 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3555 * regrename.c (build_def_use): Likewise.
3556 * regstat.c (dump_reg_info): Likewise.
3557 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3558 (find_reloads, find_reloads_subreg_address): Likewise.
3559 * reload1.c (eliminate_regs_1): Likewise.
3560 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3561 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3562 (simplify_binary_operation_1, simplify_subreg): Likewise.
3563 * targhooks.c (default_function_arg_padding): Likewise.
3564 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3565 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3566 (verify_gimple_assign_ternary): Likewise.
3567 * tree-inline.c (estimate_move_cost): Likewise.
3568 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3569 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3570 (get_address_cost_ainc): Likewise.
3571 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3572 (vect_supportable_dr_alignment): Likewise.
3573 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3574 (vectorizable_reduction): Likewise.
3575 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3576 (vectorizable_operation, vectorizable_load): Likewise.
3577 * tree.c (build_same_sized_truth_vector_type): Likewise.
3578 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3579 * var-tracking.c (emit_note_insn_var_location): Likewise.
3580 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3581 (ADDR_VEC_ALIGN): Likewise.
3583 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3584 Alan Hayward <alan.hayward@arm.com>
3585 David Sherwood <david.sherwood@arm.com>
3587 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3588 unsigned short.
3589 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3590 or if measurement_type is polynomial.
3591 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3592 * combine.c (make_extraction): Likewise.
3593 * dse.c (find_shift_sequence): Likewise.
3594 * dwarf2out.c (mem_loc_descriptor): Likewise.
3595 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3596 (extract_bit_field, extract_low_bits): Likewise.
3597 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3598 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3599 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3600 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3601 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3602 * reload.c (find_reloads): Likewise.
3603 * reload1.c (alter_reg): Likewise.
3604 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3605 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3606 * tree-if-conv.c (predicate_mem_writes): Likewise.
3607 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3608 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3609 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3610 * valtrack.c (dead_debug_insert_temp): Likewise.
3611 * varasm.c (mergeable_constant_section): Likewise.
3612 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3614 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3615 Alan Hayward <alan.hayward@arm.com>
3616 David Sherwood <david.sherwood@arm.com>
3618 * expr.c (expand_assignment): Cope with polynomial mode sizes
3619 when assigning to a CONCAT.
3621 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3622 Alan Hayward <alan.hayward@arm.com>
3623 David Sherwood <david.sherwood@arm.com>
3625 * machmode.h (mode_precision): Change from unsigned short to
3626 poly_uint16_pod.
3627 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3628 short.
3629 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3630 or if measurement_type is not polynomial.
3631 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3632 in which the mode is already known to be a scalar_int_mode.
3633 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3634 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3635 initializer.
3636 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3637 for GET_MODE_PRECISION.
3638 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3639 for GET_MODE_PRECISION.
3640 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3641 as polynomial.
3642 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3643 (expand_field_assignment, make_extraction): Likewise.
3644 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3645 (get_last_value): Likewise.
3646 * convert.c (convert_to_integer_1): Likewise.
3647 * cse.c (cse_insn): Likewise.
3648 * expr.c (expand_expr_real_1): Likewise.
3649 * lra-constraints.c (simplify_operand_subreg): Likewise.
3650 * optabs-query.c (can_atomic_load_p): Likewise.
3651 * optabs.c (expand_atomic_load): Likewise.
3652 (expand_atomic_store): Likewise.
3653 * ree.c (combine_reaching_defs): Likewise.
3654 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3655 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3656 * tree.h (type_has_mode_precision_p): Likewise.
3657 * ubsan.c (instrument_si_overflow): Likewise.
3659 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3660 Alan Hayward <alan.hayward@arm.com>
3661 David Sherwood <david.sherwood@arm.com>
3663 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3664 polynomial numbers of units.
3665 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3666 (valid_vector_subparts_p): New function.
3667 (build_vector_type): Remove temporary shim and take the number
3668 of units as a poly_uint64 rather than an int.
3669 (build_opaque_vector_type): Take the number of units as a
3670 poly_uint64 rather than an int.
3671 * tree.c (build_vector_from_ctor): Handle polynomial
3672 TYPE_VECTOR_SUBPARTS.
3673 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3674 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3675 (build_vector_from_val): If the number of units is variable,
3676 use build_vec_duplicate_cst for constant operands and
3677 VEC_DUPLICATE_EXPR otherwise.
3678 (make_vector_type): Remove temporary is_constant ().
3679 (build_vector_type, build_opaque_vector_type): Take the number of
3680 units as a poly_uint64 rather than an int.
3681 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3682 VECTOR_CST_NELTS.
3683 * cfgexpand.c (expand_debug_expr): Likewise.
3684 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3685 (store_constructor, expand_expr_real_1): Likewise.
3686 (const_scalar_mask_from_tree): Likewise.
3687 * fold-const-call.c (fold_const_reduction): Likewise.
3688 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3689 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3690 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3691 (fold_relational_const): Likewise.
3692 (native_interpret_vector): Likewise. Change the size from an
3693 int to an unsigned int.
3694 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3695 TYPE_VECTOR_SUBPARTS.
3696 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3697 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3698 duplicating a non-constant operand into a variable-length vector.
3699 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3700 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3701 * ipa-icf.c (sem_variable::equals): Likewise.
3702 * match.pd: Likewise.
3703 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3704 * print-tree.c (print_node): Likewise.
3705 * stor-layout.c (layout_type): Likewise.
3706 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3707 * tree-cfg.c (verify_gimple_comparison): Likewise.
3708 (verify_gimple_assign_binary): Likewise.
3709 (verify_gimple_assign_ternary): Likewise.
3710 (verify_gimple_assign_single): Likewise.
3711 * tree-pretty-print.c (dump_generic_node): Likewise.
3712 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3713 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3714 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3715 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3716 (vect_shift_permute_load_chain): Likewise.
3717 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3718 (expand_vector_condition, optimize_vector_constructor): Likewise.
3719 (lower_vec_perm, get_compute_type): Likewise.
3720 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3721 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3722 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3723 (vect_recog_mask_conversion_pattern): Likewise.
3724 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3725 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3726 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3727 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3728 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3729 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3730 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3731 (supportable_widening_operation): Likewise.
3732 (supportable_narrowing_operation): Likewise.
3733 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3734 Likewise.
3735 * varasm.c (output_constant): Likewise.
3737 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3738 Alan Hayward <alan.hayward@arm.com>
3739 David Sherwood <david.sherwood@arm.com>
3741 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3742 so that both the length == 3 and length != 3 cases set up their
3743 own permute vectors. Add comments explaining why we know the
3744 number of elements is constant.
3745 (vect_permute_load_chain): Likewise.
3747 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3748 Alan Hayward <alan.hayward@arm.com>
3749 David Sherwood <david.sherwood@arm.com>
3751 * machmode.h (mode_nunits): Change from unsigned char to
3752 poly_uint16_pod.
3753 (ONLY_FIXED_SIZE_MODES): New macro.
3754 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3755 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3756 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3757 New typedefs.
3758 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3759 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3760 or if measurement_type is not polynomial.
3761 * genmodes.c (ZERO_COEFFS): New macro.
3762 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3763 poly_uint16.
3764 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3765 Use ZERO_COEFFS when emitting initializers.
3766 * data-streamer.h (bp_pack_poly_value): New function.
3767 (bp_unpack_poly_value): Likewise.
3768 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3769 for GET_MODE_NUNITS.
3770 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3771 for GET_MODE_NUNITS.
3772 * tree.c (make_vector_type): Remove temporary shim and make
3773 the real function take the number of units as a poly_uint64
3774 rather than an int.
3775 (build_vector_type_for_mode): Handle polynomial nunits.
3776 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3777 * emit-rtl.c (const_vec_series_p_1): Likewise.
3778 (gen_rtx_CONST_VECTOR): Likewise.
3779 * fold-const.c (test_vec_duplicate_folding): Likewise.
3780 * genrecog.c (validate_pattern): Likewise.
3781 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3782 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3783 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3784 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3785 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3786 * rtlanal.c (subreg_get_info): Likewise.
3787 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3788 (vect_grouped_load_supported): Likewise.
3789 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3790 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3791 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3792 (simplify_const_unary_operation, simplify_binary_operation_1)
3793 (simplify_const_binary_operation, simplify_ternary_operation)
3794 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3795 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3796 instead of CONST_VECTOR_NUNITS.
3797 * varasm.c (output_constant_pool_2): Likewise.
3798 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3799 explicit-encoded elements in the XVEC for variable-length vectors.
3801 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3803 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3805 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3806 Alan Hayward <alan.hayward@arm.com>
3807 David Sherwood <david.sherwood@arm.com>
3809 * coretypes.h (fixed_size_mode): Declare.
3810 (fixed_size_mode_pod): New typedef.
3811 * builtins.h (target_builtins::x_apply_args_mode)
3812 (target_builtins::x_apply_result_mode): Change type to
3813 fixed_size_mode_pod.
3814 * builtins.c (apply_args_size, apply_result_size, result_vector)
3815 (expand_builtin_apply_args_1, expand_builtin_apply)
3816 (expand_builtin_return): Update accordingly.
3818 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3820 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3821 * cselib.c (cselib_hash_rtx): Likewise.
3822 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3823 CONST_VECTOR encoding.
3825 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3826 Jeff Law <law@redhat.com>
3828 PR target/83641
3829 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3830 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3831 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3832 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3834 PR target/83641
3835 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3836 explicitly probe *sp in a noreturn function if there were any callee
3837 register saves or frame pointer is needed.
3839 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3841 PR debug/83621
3842 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3843 BLKmode for ternary, binary or unary expressions.
3845 PR debug/83645
3846 * var-tracking.c (delete_vta_debug_insn): New inline function.
3847 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3848 insns from get_insns () to NULL instead of each bb separately.
3849 Use delete_vta_debug_insn. No longer static.
3850 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3851 delete_vta_debug_insns callers.
3852 * rtl.h (delete_vta_debug_insns): Declare.
3853 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3854 instead of variable_tracking_main.
3856 2018-01-03 Martin Sebor <msebor@redhat.com>
3858 PR tree-optimization/83603
3859 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3860 arguments past the endof the argument list in functions declared
3861 without a prototype.
3862 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3863 Avoid checking when arguments are null.
3865 2018-01-03 Martin Sebor <msebor@redhat.com>
3867 PR c/83559
3868 * doc/extend.texi (attribute const): Fix a typo.
3869 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3870 issuing -Wsuggest-attribute for void functions.
3872 2018-01-03 Martin Sebor <msebor@redhat.com>
3874 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3875 offset_int::from instead of wide_int::to_shwi.
3876 (maybe_diag_overlap): Remove assertion.
3877 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3878 * gimple-ssa-sprintf.c (format_directive): Same.
3879 (parse_directive): Same.
3880 (sprintf_dom_walker::compute_format_length): Same.
3881 (try_substitute_return_value): Same.
3883 2017-01-03 Jeff Law <law@redhat.com>
3885 PR middle-end/83654
3886 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3887 non-constant residual for zero at runtime and avoid probing in
3888 that case. Reorganize code for trailing problem to mirror handling
3889 of the residual.
3891 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3893 PR tree-optimization/83501
3894 * tree-ssa-strlen.c (get_string_cst): New.
3895 (handle_char_store): Call get_string_cst.
3897 2018-01-03 Martin Liska <mliska@suse.cz>
3899 PR tree-optimization/83593
3900 * tree-ssa-strlen.c: Include tree-cfg.h.
3901 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3902 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3903 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3904 to false.
3905 (strlen_dom_walker::before_dom_children): Call
3906 gimple_purge_dead_eh_edges. Dump tranformation with details
3907 dump flags.
3908 (strlen_dom_walker::before_dom_children): Update call by adding
3909 new argument cleanup_eh.
3910 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3912 2018-01-03 Martin Liska <mliska@suse.cz>
3914 PR ipa/83549
3915 * cif-code.def (VARIADIC_THUNK): New enum value.
3916 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3917 thunks.
3919 2018-01-03 Jan Beulich <jbeulich@suse.com>
3921 * sse.md (mov<mode>_internal): Tighten condition for when to use
3922 vmovdqu<ssescalarsize> for TI and OI modes.
3924 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3926 Update copyright years.
3928 2018-01-03 Martin Liska <mliska@suse.cz>
3930 PR ipa/83594
3931 * ipa-visibility.c (function_and_variable_visibility): Skip
3932 functions with noipa attribure.
3934 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3936 * gcc.c (process_command): Update copyright notice dates.
3937 * gcov-dump.c (print_version): Ditto.
3938 * gcov.c (print_version): Ditto.
3939 * gcov-tool.c (print_version): Ditto.
3940 * gengtype.c (create_file): Ditto.
3941 * doc/cpp.texi: Bump @copying's copyright year.
3942 * doc/cppinternals.texi: Ditto.
3943 * doc/gcc.texi: Ditto.
3944 * doc/gccint.texi: Ditto.
3945 * doc/gcov.texi: Ditto.
3946 * doc/install.texi: Ditto.
3947 * doc/invoke.texi: Ditto.
3949 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3951 * vector-builder.h (vector_builder::m_full_nelts): Change from
3952 unsigned int to poly_uint64.
3953 (vector_builder::full_nelts): Update prototype accordingly.
3954 (vector_builder::new_vector): Likewise.
3955 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3956 (vector_builder::operator ==): Likewise.
3957 (vector_builder::finalize): Likewise.
3958 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3959 Take the number of elements as a poly_uint64 rather than an
3960 unsigned int.
3961 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3962 from unsigned int to poly_uint64.
3963 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3964 (vec_perm_indices::new_vector): Likewise.
3965 (vec_perm_indices::length): Likewise.
3966 (vec_perm_indices::nelts_per_input): Likewise.
3967 (vec_perm_indices::input_nelts): Likewise.
3968 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3969 number of elements per input as a poly_uint64 rather than an
3970 unsigned int. Use the original encoding for variable-length
3971 vectors, rather than clamping each individual element.
3972 For the second and subsequent elements in each pattern,
3973 clamp the step and base before clamping their sum.
3974 (vec_perm_indices::series_p): Handle polynomial element counts.
3975 (vec_perm_indices::all_in_range_p): Likewise.
3976 (vec_perm_indices_to_tree): Likewise.
3977 (vec_perm_indices_to_rtx): Likewise.
3978 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3979 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3980 (tree_vector_builder::new_binary_operation): Handle polynomial
3981 element counts. Return false if we need to know the number
3982 of elements at compile time.
3983 * fold-const.c (fold_vec_perm): Punt if the number of elements
3984 isn't known at compile time.
3986 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3988 * vec-perm-indices.h (vec_perm_builder): Change element type
3989 from HOST_WIDE_INT to poly_int64.
3990 (vec_perm_indices::element_type): Update accordingly.
3991 (vec_perm_indices::clamp): Handle polynomial element_types.
3992 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3993 (vec_perm_indices::all_in_range_p): Likewise.
3994 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3995 than shwi trees.
3996 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3997 polynomial vec_perm_indices element types.
3998 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3999 * fold-const.c (fold_vec_perm): Likewise.
4000 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
4001 * tree-vect-generic.c (lower_vec_perm): Likewise.
4002 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4003 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
4004 element type to HOST_WIDE_INT.
4006 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4007 Alan Hayward <alan.hayward@arm.com>
4008 David Sherwood <david.sherwood@arm.com>
4010 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
4011 rather than an int. Use plus_constant.
4012 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4013 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4015 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4016 Alan Hayward <alan.hayward@arm.com>
4017 David Sherwood <david.sherwood@arm.com>
4019 * calls.c (emit_call_1, expand_call): Change struct_value_size from
4020 a HOST_WIDE_INT to a poly_int64.
4022 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4023 Alan Hayward <alan.hayward@arm.com>
4024 David Sherwood <david.sherwood@arm.com>
4026 * calls.c (load_register_parameters): Cope with polynomial
4027 mode sizes. Require a constant size for BLKmode parameters
4028 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
4029 forces a parameter to be padded at the lsb end in order to
4030 fill a complete number of words, require the parameter size
4031 to be ordered wrt UNITS_PER_WORD.
4033 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4034 Alan Hayward <alan.hayward@arm.com>
4035 David Sherwood <david.sherwood@arm.com>
4037 * reload1.c (spill_stack_slot_width): Change element type
4038 from unsigned int to poly_uint64_pod.
4039 (alter_reg): Treat mode sizes as polynomial.
4041 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4042 Alan Hayward <alan.hayward@arm.com>
4043 David Sherwood <david.sherwood@arm.com>
4045 * reload.c (complex_word_subreg_p): New function.
4046 (reload_inner_reg_of_subreg, push_reload): Use it.
4048 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4049 Alan Hayward <alan.hayward@arm.com>
4050 David Sherwood <david.sherwood@arm.com>
4052 * lra-constraints.c (process_alt_operands): Reject matched
4053 operands whose sizes aren't ordered.
4054 (match_reload): Refer to this check here.
4056 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4057 Alan Hayward <alan.hayward@arm.com>
4058 David Sherwood <david.sherwood@arm.com>
4060 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4061 that the mode size is in the set {1, 2, 4, 8, 16}.
4063 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4064 Alan Hayward <alan.hayward@arm.com>
4065 David Sherwood <david.sherwood@arm.com>
4067 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4068 Use plus_constant instead of gen_rtx_PLUS.
4070 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4071 Alan Hayward <alan.hayward@arm.com>
4072 David Sherwood <david.sherwood@arm.com>
4074 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4075 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4076 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4077 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4078 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4079 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4080 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4081 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4082 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4083 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4084 a poly_int64.
4085 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4086 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4087 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4088 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4089 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4090 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4091 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4092 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4093 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4094 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4095 function.
4096 * expr.c (emit_move_resolve_push): Treat the input and result
4097 of PUSH_ROUNDING as a poly_int64.
4098 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4099 (emit_push_insn): Likewise.
4100 * lra-eliminations.c (mark_not_eliminable): Likewise.
4101 * recog.c (push_operand): Likewise.
4102 * reload1.c (elimination_effects): Likewise.
4103 * rtlanal.c (nonzero_bits1): Likewise.
4104 * calls.c (store_one_arg): Likewise. Require the padding to be
4105 known at compile time.
4107 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4108 Alan Hayward <alan.hayward@arm.com>
4109 David Sherwood <david.sherwood@arm.com>
4111 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4112 Use plus_constant instead of gen_rtx_PLUS.
4114 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4115 Alan Hayward <alan.hayward@arm.com>
4116 David Sherwood <david.sherwood@arm.com>
4118 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4119 rather than an int.
4121 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4122 Alan Hayward <alan.hayward@arm.com>
4123 David Sherwood <david.sherwood@arm.com>
4125 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4126 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4127 via stack temporaries. Treat the mode size as polynomial too.
4129 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4130 Alan Hayward <alan.hayward@arm.com>
4131 David Sherwood <david.sherwood@arm.com>
4133 * expr.c (expand_expr_real_2): When handling conversions involving
4134 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4135 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4136 as a poly_uint64 too.
4138 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4139 Alan Hayward <alan.hayward@arm.com>
4140 David Sherwood <david.sherwood@arm.com>
4142 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4144 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4145 Alan Hayward <alan.hayward@arm.com>
4146 David Sherwood <david.sherwood@arm.com>
4148 * combine.c (can_change_dest_mode): Handle polynomial
4149 REGMODE_NATURAL_SIZE.
4150 * expmed.c (store_bit_field_1): Likewise.
4151 * expr.c (store_constructor): Likewise.
4152 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4153 and polynomial REGMODE_NATURAL_SIZE.
4154 (gen_lowpart_common): Likewise.
4155 * reginfo.c (record_subregs_of_mode): Likewise.
4156 * rtlanal.c (read_modify_subreg_p): Likewise.
4158 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4159 Alan Hayward <alan.hayward@arm.com>
4160 David Sherwood <david.sherwood@arm.com>
4162 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4163 numbers of elements.
4165 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4166 Alan Hayward <alan.hayward@arm.com>
4167 David Sherwood <david.sherwood@arm.com>
4169 * match.pd: Cope with polynomial numbers of vector elements.
4171 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4172 Alan Hayward <alan.hayward@arm.com>
4173 David Sherwood <david.sherwood@arm.com>
4175 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4176 in a POINTER_PLUS_EXPR.
4178 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4179 Alan Hayward <alan.hayward@arm.com>
4180 David Sherwood <david.sherwood@arm.com>
4182 * omp-simd-clone.c (simd_clone_subparts): New function.
4183 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4184 (ipa_simd_modify_function_body): Likewise.
4186 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4187 Alan Hayward <alan.hayward@arm.com>
4188 David Sherwood <david.sherwood@arm.com>
4190 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4191 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4192 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4193 (expand_vector_condition, vector_element): Likewise.
4194 (subparts_gt): New function.
4195 (get_compute_type): Use subparts_gt.
4196 (count_type_subparts): Delete.
4197 (expand_vector_operations_1): Use subparts_gt instead of
4198 count_type_subparts.
4200 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4201 Alan Hayward <alan.hayward@arm.com>
4202 David Sherwood <david.sherwood@arm.com>
4204 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4205 (vect_compile_time_alias): ...this new function. Do the calculation
4206 on poly_ints rather than trees.
4207 (vect_prune_runtime_alias_test_list): Update call accordingly.
4209 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4210 Alan Hayward <alan.hayward@arm.com>
4211 David Sherwood <david.sherwood@arm.com>
4213 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4214 numbers of units.
4215 (vect_schedule_slp_instance): Likewise.
4217 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4218 Alan Hayward <alan.hayward@arm.com>
4219 David Sherwood <david.sherwood@arm.com>
4221 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4222 constant and extern definitions for variable-length vectors.
4223 (vect_get_constant_vectors): Note that the number of units
4224 is known to be constant.
4226 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4227 Alan Hayward <alan.hayward@arm.com>
4228 David Sherwood <david.sherwood@arm.com>
4230 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4231 of units as polynomial. Choose between WIDE and NARROW based
4232 on multiple_p.
4234 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4235 Alan Hayward <alan.hayward@arm.com>
4236 David Sherwood <david.sherwood@arm.com>
4238 * tree-vect-stmts.c (simd_clone_subparts): New function.
4239 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4241 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4242 Alan Hayward <alan.hayward@arm.com>
4243 David Sherwood <david.sherwood@arm.com>
4245 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4246 vectors as polynomial. Use build_index_vector for
4247 IFN_GOMP_SIMD_LANE.
4249 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4250 Alan Hayward <alan.hayward@arm.com>
4251 David Sherwood <david.sherwood@arm.com>
4253 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4254 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4255 for variable-length vectors.
4256 (vectorizable_mask_load_store): Treat the number of units as
4257 polynomial, asserting that it is constant if the condition has
4258 already been enforced.
4259 (vectorizable_store, vectorizable_load): Likewise.
4261 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4262 Alan Hayward <alan.hayward@arm.com>
4263 David Sherwood <david.sherwood@arm.com>
4265 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4266 of units as polynomial. Punt if we can't tell at compile time
4267 which vector contains the final result.
4269 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4270 Alan Hayward <alan.hayward@arm.com>
4271 David Sherwood <david.sherwood@arm.com>
4273 * tree-vect-loop.c (vectorizable_induction): Treat the number
4274 of units as polynomial. Punt on SLP inductions. Use an integer
4275 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4276 cast of such a series for variable-length floating-point
4277 reductions.
4279 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4280 Alan Hayward <alan.hayward@arm.com>
4281 David Sherwood <david.sherwood@arm.com>
4283 * tree.h (build_index_vector): Declare.
4284 * tree.c (build_index_vector): New function.
4285 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4286 of units as polynomial, forcibly converting it to a constant if
4287 vectorizable_reduction has already enforced the condition.
4288 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4289 to create a {1,2,3,...} vector.
4290 (vectorizable_reduction): Treat the number of units as polynomial.
4291 Choose vectype_in based on the largest scalar element size rather
4292 than the smallest number of units. Enforce the restrictions
4293 relied on above.
4295 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4296 Alan Hayward <alan.hayward@arm.com>
4297 David Sherwood <david.sherwood@arm.com>
4299 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4300 number of units as polynomial.
4302 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4303 Alan Hayward <alan.hayward@arm.com>
4304 David Sherwood <david.sherwood@arm.com>
4306 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4307 * target.def (autovectorize_vector_sizes): Return the vector sizes
4308 by pointer, using vector_sizes rather than a bitmask.
4309 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4310 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4311 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4312 Likewise.
4313 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4314 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4315 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4316 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4317 * omp-general.c (omp_max_vf): Likewise.
4318 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4319 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4320 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4321 * tree-vect-slp.c (vect_slp_bb): Likewise.
4322 * doc/tm.texi: Regenerate.
4323 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4324 to a poly_uint64.
4325 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4326 the vector size as a poly_uint64 rather than an unsigned int.
4327 (current_vector_size): Change from an unsigned int to a poly_uint64.
4328 (get_vectype_for_scalar_type): Update accordingly.
4329 * tree.h (build_truth_vector_type): Take the size and number of
4330 units as a poly_uint64 rather than an unsigned int.
4331 (build_vector_type): Add a temporary overload that takes
4332 the number of units as a poly_uint64 rather than an unsigned int.
4333 * tree.c (make_vector_type): Likewise.
4334 (build_truth_vector_type): Take the number of units as a poly_uint64
4335 rather than an unsigned int.
4337 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4338 Alan Hayward <alan.hayward@arm.com>
4339 David Sherwood <david.sherwood@arm.com>
4341 * target.def (get_mask_mode): Take the number of units and length
4342 as poly_uint64s rather than unsigned ints.
4343 * targhooks.h (default_get_mask_mode): Update accordingly.
4344 * targhooks.c (default_get_mask_mode): Likewise.
4345 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4346 * doc/tm.texi: Regenerate.
4348 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4349 Alan Hayward <alan.hayward@arm.com>
4350 David Sherwood <david.sherwood@arm.com>
4352 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4353 * omp-general.c (omp_max_vf): Likewise.
4354 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4355 (expand_omp_simd): Handle polynomial safelen.
4356 * omp-low.c (omplow_simd_context): Add a default constructor.
4357 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4358 (lower_rec_simd_input_clauses): Update accordingly.
4359 (lower_rec_input_clauses): Likewise.
4361 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4362 Alan Hayward <alan.hayward@arm.com>
4363 David Sherwood <david.sherwood@arm.com>
4365 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4366 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4367 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4368 (vect_analyze_slp_cost): Likewise.
4369 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4370 (vect_model_load_cost): Likewise.
4372 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4373 Alan Hayward <alan.hayward@arm.com>
4374 David Sherwood <david.sherwood@arm.com>
4376 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4377 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4378 from an unsigned int * to a poly_uint64_pod *.
4379 (calculate_unrolling_factor): New function.
4380 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4382 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4383 Alan Hayward <alan.hayward@arm.com>
4384 David Sherwood <david.sherwood@arm.com>
4386 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4387 from an unsigned int to a poly_uint64.
4388 (_loop_vec_info::slp_unrolling_factor): Likewise.
4389 (_loop_vec_info::vectorization_factor): Change from an int
4390 to a poly_uint64.
4391 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4392 (vect_get_num_vectors): New function.
4393 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4394 (vect_get_num_copies): Use vect_get_num_vectors.
4395 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4396 to an unsigned int *.
4397 (vect_analyze_data_refs): Change min_vf from an int * to a
4398 poly_uint64 *.
4399 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4400 than an unsigned HOST_WIDE_INT.
4401 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4402 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4403 to an unsigned int *.
4404 (vect_analyze_data_ref_dependences): Likewise.
4405 (vect_compute_data_ref_alignment): Handle polynomial vf.
4406 (vect_enhance_data_refs_alignment): Likewise.
4407 (vect_prune_runtime_alias_test_list): Likewise.
4408 (vect_shift_permute_load_chain): Likewise.
4409 (vect_supportable_dr_alignment): Likewise.
4410 (dependence_distance_ge_vf): Take the vectorization factor as a
4411 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4412 (vect_analyze_data_refs): Change min_vf from an int * to a
4413 poly_uint64 *.
4414 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4415 vfm1 as a poly_uint64 rather than an int. Make the same change
4416 for the returned bound_scalar.
4417 (vect_gen_vector_loop_niters): Handle polynomial vf.
4418 (vect_do_peeling): Likewise. Update call to
4419 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4420 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4421 be constant.
4422 * tree-vect-loop.c (vect_determine_vectorization_factor)
4423 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4424 (vect_get_known_peeling_cost): Likewise.
4425 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4426 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4427 (vect_transform_loop): Likewise. Use the lowest possible VF when
4428 updating the upper bounds of the loop.
4429 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4430 rather than an int.
4431 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4432 polynomial unroll factors.
4433 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4434 (vect_make_slp_decision): Likewise.
4435 (vect_supported_load_permutation_p): Likewise, and polynomial
4436 vf too.
4437 (vect_analyze_slp_cost): Handle polynomial vf.
4438 (vect_slp_analyze_node_operations): Likewise.
4439 (vect_slp_analyze_bb_1): Likewise.
4440 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4441 than an unsigned HOST_WIDE_INT.
4442 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4443 (vectorizable_load): Handle polynomial vf.
4444 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4445 a poly_uint64.
4446 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4448 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4449 Alan Hayward <alan.hayward@arm.com>
4450 David Sherwood <david.sherwood@arm.com>
4452 * match.pd: Handle bit operations involving three constants
4453 and try to fold one pair.
4455 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4457 * tree-vect-loop-manip.c: Include gimple-fold.h.
4458 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4459 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4460 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4461 Add a path that uses a step of VF instead of 1, but disable it
4462 for now.
4463 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4464 and niters_no_overflow parameters. Update calls to
4465 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4466 Create a new SSA name if the latter choses to use a ste other
4467 than zero, and return it via niters_vector_mult_vf_var.
4468 * tree-vect-loop.c (vect_transform_loop): Update calls to
4469 vect_do_peeling, vect_gen_vector_loop_niters and
4470 slpeel_make_loop_iterate_ntimes.
4471 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4472 (vect_gen_vector_loop_niters): Update declarations after above changes.
4474 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4476 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4477 128-bit round to integer instructions.
4478 (ceil<mode>2): Likewise.
4479 (btrunc<mode>2): Likewise.
4480 (round<mode>2): Likewise.
4482 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4484 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4485 unaligned VSX load/store on P8/P9.
4486 (expand_block_clear): Allow the use of unaligned VSX
4487 load/store on P8/P9.
4489 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4491 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4492 New function.
4493 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4494 swap associated with both a load and a store.
4496 2018-01-02 Andrew Waterman <andrew@sifive.com>
4498 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4499 * config/riscv/riscv.md (clear_cache): Use it.
4501 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4503 * web.c: Remove out-of-date comment.
4505 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4507 * expr.c (fixup_args_size_notes): Check that any existing
4508 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4509 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4510 (emit_single_push_insn): ...here.
4512 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4514 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4515 (const_vector_encoded_nelts): New function.
4516 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4517 (const_vector_int_elt, const_vector_elt): Declare.
4518 * emit-rtl.c (const_vector_int_elt_1): New function.
4519 (const_vector_elt): Likewise.
4520 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4521 of CONST_VECTOR_ELT.
4523 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4525 * expr.c: Include rtx-vector-builder.h.
4526 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4527 directly on the tree encoding.
4528 (const_vector_from_tree): Likewise.
4529 * optabs.c: Include rtx-vector-builder.h.
4530 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4531 sequence of "u" values.
4532 * vec-perm-indices.c: Include rtx-vector-builder.h.
4533 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4534 directly on the vec_perm_indices encoding.
4536 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4538 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4539 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4540 * rtx-vector-builder.h: New file.
4541 * rtx-vector-builder.c: Likewise.
4542 * rtl.h (rtx_def::u2): Add a const_vector field.
4543 (CONST_VECTOR_NPATTERNS): New macro.
4544 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4545 (CONST_VECTOR_DUPLICATE_P): Likewise.
4546 (CONST_VECTOR_STEPPED_P): Likewise.
4547 (CONST_VECTOR_ENCODED_ELT): Likewise.
4548 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4549 (unwrap_const_vec_duplicate): Likewise.
4550 (const_vec_series_p): Check for a non-duplicated vector encoding.
4551 Say that the function only returns true for integer vectors.
4552 * emit-rtl.c: Include rtx-vector-builder.h.
4553 (gen_const_vec_duplicate_1): Delete.
4554 (gen_const_vector): Call gen_const_vec_duplicate instead of
4555 gen_const_vec_duplicate_1.
4556 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4557 (gen_const_vec_duplicate): Use rtx_vector_builder.
4558 (gen_const_vec_series): Likewise.
4559 (gen_rtx_CONST_VECTOR): Likewise.
4560 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4561 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4562 Build a new vector rather than modifying a CONST_VECTOR in-place.
4563 (handle_special_swappables): Update call accordingly.
4564 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4565 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4566 Build a new vector rather than modifying a CONST_VECTOR in-place.
4567 (handle_special_swappables): Update call accordingly.
4569 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4571 * simplify-rtx.c (simplify_const_binary_operation): Use
4572 CONST_VECTOR_ELT instead of XVECEXP.
4574 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4576 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4577 the selector elements to be different from the data elements
4578 if the selector is a VECTOR_CST.
4579 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4580 ssizetype for the selector.
4582 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4584 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4585 before testing each element individually.
4586 * tree-vect-generic.c (lower_vec_perm): Likewise.
4588 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4590 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4591 * selftest-run-tests.c (selftest::run_tests): Call it.
4592 * vector-builder.h (vector_builder::operator ==): New function.
4593 (vector_builder::operator !=): Likewise.
4594 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4595 (vec_perm_indices::all_from_input_p): New function.
4596 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4597 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4598 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4599 instead of reading the VECTOR_CST directly. Detect whether both
4600 vector inputs are the same before constructing the vec_perm_indices,
4601 and update the number of inputs argument accordingly. Use the
4602 utility functions added above. Only construct sel2 if we need to.
4604 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4606 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4607 the broadcast of the low byte.
4608 (expand_mult_highpart): Use an explicit encoding for the permutes.
4609 * optabs-query.c (can_mult_highpart_p): Likewise.
4610 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4611 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4612 (vectorizable_bswap): Likewise.
4613 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4614 explicit encoding for the power-of-2 permutes.
4615 (vect_permute_store_chain): Likewise.
4616 (vect_grouped_load_supported): Likewise.
4617 (vect_permute_load_chain): Likewise.
4619 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4621 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4622 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4623 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4624 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4625 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4626 (vect_gen_perm_mask_any): Likewise.
4628 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4630 * int-vector-builder.h: New file.
4631 * vec-perm-indices.h: Include int-vector-builder.h.
4632 (vec_perm_indices): Redefine as an int_vector_builder.
4633 (auto_vec_perm_indices): Delete.
4634 (vec_perm_builder): Redefine as a stand-alone class.
4635 (vec_perm_indices::vec_perm_indices): New function.
4636 (vec_perm_indices::clamp): Likewise.
4637 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4638 (vec_perm_indices::new_vector): New function.
4639 (vec_perm_indices::new_expanded_vector): Update for new
4640 vec_perm_indices class.
4641 (vec_perm_indices::rotate_inputs): New function.
4642 (vec_perm_indices::all_in_range_p): Operate directly on the
4643 encoded form, without computing elided elements.
4644 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4645 encoding. Update for new vec_perm_indices class.
4646 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4647 the given vec_perm_builder.
4648 (expand_vec_perm_var): Update vec_perm_builder constructor.
4649 (expand_mult_highpart): Use vec_perm_builder instead of
4650 auto_vec_perm_indices.
4651 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4652 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4653 or double series encoding as appropriate.
4654 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4655 vec_perm_indices instead of auto_vec_perm_indices.
4656 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4657 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4658 (vect_permute_store_chain): Likewise.
4659 (vect_grouped_load_supported): Likewise.
4660 (vect_permute_load_chain): Likewise.
4661 (vect_shift_permute_load_chain): Likewise.
4662 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4663 (vect_transform_slp_perm_load): Likewise.
4664 (vect_schedule_slp_instance): Likewise.
4665 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4666 (vectorizable_mask_load_store): Likewise.
4667 (vectorizable_bswap): Likewise.
4668 (vectorizable_store): Likewise.
4669 (vectorizable_load): Likewise.
4670 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4671 vec_perm_indices instead of auto_vec_perm_indices. Use
4672 tree_to_vec_perm_builder to read the vector from a tree.
4673 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4674 vec_perm_builder instead of a vec_perm_indices.
4675 (have_whole_vector_shift): Use vec_perm_builder and
4676 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4677 truncation to calc_vec_perm_mask_for_shift.
4678 (vect_create_epilog_for_reduction): Likewise.
4679 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4680 from auto_vec_perm_indices to vec_perm_indices.
4681 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4682 instead of changing individual elements.
4683 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4684 the vector in d.perm.
4685 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4686 from auto_vec_perm_indices to vec_perm_indices.
4687 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4688 instead of changing individual elements.
4689 (arm_vectorize_vec_perm_const): Use new_vector to install
4690 the vector in d.perm.
4691 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4692 Update vec_perm_builder constructor.
4693 (rs6000_expand_interleave): Likewise.
4694 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4695 (rs6000_expand_interleave): Likewise.
4697 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4699 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4700 to qimode could truncate the indices.
4701 * optabs.c (expand_vec_perm_var): Likewise.
4703 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4705 * Makefile.in (OBJS): Add vec-perm-indices.o.
4706 * vec-perm-indices.h: New file.
4707 * vec-perm-indices.c: Likewise.
4708 * target.h (vec_perm_indices): Replace with a forward class
4709 declaration.
4710 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4711 * optabs.h: Include vec-perm-indices.h.
4712 (expand_vec_perm): Delete.
4713 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4714 (expand_vec_perm_const): Declare.
4715 * target.def (vec_perm_const_ok): Replace with...
4716 (vec_perm_const): ...this new hook.
4717 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4718 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4719 * doc/tm.texi: Regenerate.
4720 * optabs.def (vec_perm_const): Delete.
4721 * doc/md.texi (vec_perm_const): Likewise.
4722 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4723 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4724 expand_vec_perm for constant permutation vectors. Assert that
4725 the mode of variable permutation vectors is the integer equivalent
4726 of the mode that is being permuted.
4727 * optabs-query.h (selector_fits_mode_p): Declare.
4728 * optabs-query.c: Include vec-perm-indices.h.
4729 (selector_fits_mode_p): New function.
4730 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4731 is defined, instead of checking whether the vec_perm_const_optab
4732 exists. Use targetm.vectorize.vec_perm_const instead of
4733 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4734 fit in the vector mode before using a variable permute.
4735 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4736 vec_perm_indices instead of an rtx.
4737 (expand_vec_perm): Replace with...
4738 (expand_vec_perm_const): ...this new function. Take the selector
4739 as a vec_perm_indices rather than an rtx. Also take the mode of
4740 the selector. Update call to shift_amt_for_vec_perm_mask.
4741 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4742 Use vec_perm_indices::new_expanded_vector to expand the original
4743 selector into bytes. Check whether the indices fit in the vector
4744 mode before using a variable permute.
4745 (expand_vec_perm_var): Make global.
4746 (expand_mult_highpart): Use expand_vec_perm_const.
4747 * fold-const.c: Includes vec-perm-indices.h.
4748 * tree-ssa-forwprop.c: Likewise.
4749 * tree-vect-data-refs.c: Likewise.
4750 * tree-vect-generic.c: Likewise.
4751 * tree-vect-loop.c: Likewise.
4752 * tree-vect-slp.c: Likewise.
4753 * tree-vect-stmts.c: Likewise.
4754 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4755 Delete.
4756 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4757 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4758 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4759 (aarch64_vectorize_vec_perm_const): ...this new function.
4760 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4761 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4762 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4763 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4764 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4765 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4766 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4767 into...
4768 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4769 check for NEON modes.
4770 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4771 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4772 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4773 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4774 into...
4775 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4776 the old VEC_PERM_CONST conditions.
4777 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4778 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4779 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4780 (ia64_vectorize_vec_perm_const_ok): Merge into...
4781 (ia64_vectorize_vec_perm_const): ...this new function.
4782 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4783 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4784 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4785 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4786 * config/mips/mips.c (mips_expand_vec_perm_const)
4787 (mips_vectorize_vec_perm_const_ok): Merge into...
4788 (mips_vectorize_vec_perm_const): ...this new function.
4789 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4790 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4791 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4792 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4793 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4794 (rs6000_expand_vec_perm_const): Delete.
4795 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4796 Delete.
4797 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4798 (altivec_expand_vec_perm_const_le): Take each operand individually.
4799 Operate on constant selectors rather than rtxes.
4800 (altivec_expand_vec_perm_const): Likewise. Update call to
4801 altivec_expand_vec_perm_const_le.
4802 (rs6000_expand_vec_perm_const): Delete.
4803 (rs6000_vectorize_vec_perm_const_ok): Delete.
4804 (rs6000_vectorize_vec_perm_const): New function.
4805 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4806 an element count and rtx array.
4807 (rs6000_expand_extract_even): Update call accordingly.
4808 (rs6000_expand_interleave): Likewise.
4809 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4810 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4811 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4812 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4813 (rs6000_expand_vec_perm_const): Delete.
4814 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4815 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4816 (altivec_expand_vec_perm_const_le): Take each operand individually.
4817 Operate on constant selectors rather than rtxes.
4818 (altivec_expand_vec_perm_const): Likewise. Update call to
4819 altivec_expand_vec_perm_const_le.
4820 (rs6000_expand_vec_perm_const): Delete.
4821 (rs6000_vectorize_vec_perm_const_ok): Delete.
4822 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4823 reference to the SPE evmerge intructions.
4824 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4825 an element count and rtx array.
4826 (rs6000_expand_extract_even): Update call accordingly.
4827 (rs6000_expand_interleave): Likewise.
4828 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4829 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4830 new function.
4831 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4833 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4835 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4836 vector mode and that that mode matches the mode of the data
4837 being permuted.
4838 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4839 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4840 directly using expand_vec_perm_1 when forcing selectors into
4841 registers.
4842 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4844 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4846 * optabs-query.h (can_vec_perm_p): Delete.
4847 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4848 * optabs-query.c (can_vec_perm_p): Split into...
4849 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4850 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4851 particular selector is valid.
4852 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4853 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4854 (vect_grouped_load_supported): Likewise.
4855 (vect_shift_permute_load_chain): Likewise.
4856 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4857 (vect_transform_slp_perm_load): Likewise.
4858 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4859 (vectorizable_bswap): Likewise.
4860 (vect_gen_perm_mask_checked): Likewise.
4861 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4862 implementations of variable permutation vectors into account
4863 when deciding which selector to use.
4864 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4865 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4866 with a false third argument.
4867 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4868 to test whether the constant selector is valid and can_vec_perm_var_p
4869 to test whether a variable selector is valid.
4871 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4873 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4874 * optabs-query.c (can_vec_perm_p): Likewise.
4875 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4876 instead of vec_perm_indices.
4877 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4878 (vect_gen_perm_mask_checked): Likewise,
4879 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4880 (vect_gen_perm_mask_checked): Likewise,
4882 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4884 * optabs-query.h (qimode_for_vec_perm): Declare.
4885 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4886 (qimode_for_vec_perm): ...this new function.
4887 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4889 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4891 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4892 does not have a conditional at the top.
4894 2018-01-02 Richard Biener <rguenther@suse.de>
4896 * ipa-inline.c (big_speedup_p): Fix expression.
4898 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4900 PR target/81616
4901 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4902 for generic 4->6.
4904 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4906 PR target/81616
4907 Generic tuning.
4908 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4909 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4910 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4911 cond_taken_branch_cost 3->4.
4913 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4915 PR tree-optimization/83581
4916 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4917 TODO_cleanup_cfg if any changes have been made.
4919 PR middle-end/83608
4920 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4921 convert_modes if target mode has the right side, but different mode
4922 class.
4924 PR middle-end/83609
4925 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4926 last argument when extracting from CONCAT. If either from_real or
4927 from_imag is NULL, use expansion through memory. If result is not
4928 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4929 the parts directly to inner mode, if even that fails, use expansion
4930 through memory.
4932 PR middle-end/83623
4933 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4934 check for bswap in mode rather than HImode and use that in expand_unop
4935 too.
4936 \f
4937 Copyright (C) 2018 Free Software Foundation, Inc.
4939 Copying and distribution of this file, with or without modification,
4940 are permitted in any medium without royalty provided the copyright
4941 notice and this notice are preserved.