Merge from the pain train
[official-gcc.git] / gcc / config / avr / avr.h
blob6b54c37626b50d1f671c644dc3677a3cb7a19f39
1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov (denisc@overta.ru)
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* Names to predefine in the preprocessor for this target machine. */
26 #define TARGET_CPU_CPP_BUILTINS() \
27 do \
28 { \
29 builtin_define_std ("AVR"); \
30 if (avr_base_arch_macro) \
31 builtin_define (avr_base_arch_macro); \
32 if (avr_extra_arch_macro) \
33 builtin_define (avr_extra_arch_macro); \
34 if (avr_asm_only_p) \
35 builtin_define ("__AVR_ASM_ONLY__"); \
36 if (avr_enhanced_p) \
37 builtin_define ("__AVR_ENHANCED__"); \
38 if (avr_mega_p) \
39 builtin_define ("__AVR_MEGA__"); \
40 if (TARGET_NO_INTERRUPTS) \
41 builtin_define ("__NO_INTERRUPTS__"); \
42 } \
43 while (0)
45 /* This declaration should be present. */
46 extern int target_flags;
48 #define MASK_ALL_DEBUG 0x00000FE0
49 #define MASK_ORDER_1 0x00001000
50 #define MASK_INSN_SIZE_DUMP 0x00002000
51 #define MASK_ORDER_2 0x00004000
52 #define MASK_NO_TABLEJUMP 0x00008000
53 #define MASK_INT8 0x00010000
54 #define MASK_NO_INTERRUPTS 0x00020000
55 #define MASK_CALL_PROLOGUES 0x00040000
56 #define MASK_TINY_STACK 0x00080000
57 #define MASK_SHORT_CALLS 0x00100000
59 #define TARGET_ORDER_1 (target_flags & MASK_ORDER_1)
60 #define TARGET_ORDER_2 (target_flags & MASK_ORDER_2)
61 #define TARGET_INT8 (target_flags & MASK_INT8)
62 #define TARGET_NO_INTERRUPTS (target_flags & MASK_NO_INTERRUPTS)
63 #define TARGET_INSN_SIZE_DUMP (target_flags & MASK_INSN_SIZE_DUMP)
64 #define TARGET_CALL_PROLOGUES (target_flags & MASK_CALL_PROLOGUES)
65 #define TARGET_TINY_STACK (target_flags & MASK_TINY_STACK)
66 #define TARGET_NO_TABLEJUMP (target_flags & MASK_NO_TABLEJUMP)
67 #define TARGET_SHORT_CALLS (target_flags & MASK_SHORT_CALLS)
68 #define TARGET_ALL_DEBUG (target_flags & MASK_ALL_DEBUG)
70 #define TARGET_SWITCHES { \
71 { "order1", MASK_ORDER_1, NULL }, \
72 { "order2", MASK_ORDER_2, NULL }, \
73 { "int8", MASK_INT8, N_("Assume int to be 8 bit integer") }, \
74 { "no-interrupts", MASK_NO_INTERRUPTS, \
75 N_("Change the stack pointer without disabling interrupts") }, \
76 { "call-prologues", MASK_CALL_PROLOGUES, \
77 N_("Use subroutines for function prologue/epilogue") }, \
78 { "tiny-stack", MASK_TINY_STACK, \
79 N_("Change only the low 8 bits of the stack pointer") }, \
80 { "no-tablejump", MASK_NO_TABLEJUMP, \
81 N_("Do not generate tablejump insns") }, \
82 { "short-calls", MASK_SHORT_CALLS, \
83 N_("Use rjmp/rcall (limited range) on >8K devices") }, \
84 { "size", MASK_INSN_SIZE_DUMP, \
85 N_("Output instruction sizes to the asm file") }, \
86 { "deb", MASK_ALL_DEBUG, NULL }, \
87 { "", 0, NULL } }
89 extern const char *avr_init_stack;
90 extern const char *avr_mcu_name;
92 extern const char *avr_base_arch_macro;
93 extern const char *avr_extra_arch_macro;
94 extern int avr_mega_p;
95 extern int avr_enhanced_p;
96 extern int avr_asm_only_p;
98 #define AVR_MEGA (avr_mega_p && !TARGET_SHORT_CALLS)
99 #define AVR_ENHANCED (avr_enhanced_p)
101 #define TARGET_OPTIONS { \
102 { "init-stack=", &avr_init_stack, N_("Specify the initial stack address"), 0}, \
103 { "mcu=", &avr_mcu_name, N_("Specify the MCU name"), 0} }
105 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
107 #define OVERRIDE_OPTIONS avr_override_options ()
109 #define CAN_DEBUG_WITHOUT_FP
111 #define BITS_BIG_ENDIAN 0
112 #define BYTES_BIG_ENDIAN 0
113 #define WORDS_BIG_ENDIAN 0
115 #ifdef IN_LIBGCC2
116 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
117 #define UNITS_PER_WORD 4
118 #else
119 /* Width of a word, in units (bytes). */
120 #define UNITS_PER_WORD 1
121 #endif
123 #define POINTER_SIZE 16
126 /* Maximum sized of reasonable data type
127 DImode or Dfmode ... */
128 #define MAX_FIXED_MODE_SIZE 32
130 #define PARM_BOUNDARY 8
132 #define FUNCTION_BOUNDARY 8
134 #define EMPTY_FIELD_BOUNDARY 8
136 /* No data type wants to be aligned rounder than this. */
137 #define BIGGEST_ALIGNMENT 8
140 #define STRICT_ALIGNMENT 0
142 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
143 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
144 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
145 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
146 #define FLOAT_TYPE_SIZE 32
147 #define DOUBLE_TYPE_SIZE 32
148 #define LONG_DOUBLE_TYPE_SIZE 32
150 #define DEFAULT_SIGNED_CHAR 1
152 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
153 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
155 #define WCHAR_TYPE_SIZE 16
157 #define FIRST_PSEUDO_REGISTER 36
159 #define FIXED_REGISTERS {\
160 1,1,/* r0 r1 */\
161 0,0,/* r2 r3 */\
162 0,0,/* r4 r5 */\
163 0,0,/* r6 r7 */\
164 0,0,/* r8 r9 */\
165 0,0,/* r10 r11 */\
166 0,0,/* r12 r13 */\
167 0,0,/* r14 r15 */\
168 0,0,/* r16 r17 */\
169 0,0,/* r18 r19 */\
170 0,0,/* r20 r21 */\
171 0,0,/* r22 r23 */\
172 0,0,/* r24 r25 */\
173 0,0,/* r26 r27 */\
174 0,0,/* r28 r29 */\
175 0,0,/* r30 r31 */\
176 1,1,/* STACK */\
177 1,1 /* arg pointer */ }
179 #define CALL_USED_REGISTERS { \
180 1,1,/* r0 r1 */ \
181 0,0,/* r2 r3 */ \
182 0,0,/* r4 r5 */ \
183 0,0,/* r6 r7 */ \
184 0,0,/* r8 r9 */ \
185 0,0,/* r10 r11 */ \
186 0,0,/* r12 r13 */ \
187 0,0,/* r14 r15 */ \
188 0,0,/* r16 r17 */ \
189 1,1,/* r18 r19 */ \
190 1,1,/* r20 r21 */ \
191 1,1,/* r22 r23 */ \
192 1,1,/* r24 r25 */ \
193 1,1,/* r26 r27 */ \
194 0,0,/* r28 r29 */ \
195 1,1,/* r30 r31 */ \
196 1,1,/* STACK */ \
197 1,1 /* arg pointer */ }
199 #define REG_ALLOC_ORDER { \
200 24,25, \
201 18,19, \
202 20,21, \
203 22,23, \
204 30,31, \
205 26,27, \
206 28,29, \
207 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
208 0,1, \
209 32,33,34,35 \
212 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
215 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
217 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
219 #define MODES_TIEABLE_P(MODE1, MODE2) 1
221 enum reg_class {
222 NO_REGS,
223 R0_REG, /* r0 */
224 POINTER_X_REGS, /* r26 - r27 */
225 POINTER_Y_REGS, /* r28 - r29 */
226 POINTER_Z_REGS, /* r30 - r31 */
227 STACK_REG, /* STACK */
228 BASE_POINTER_REGS, /* r28 - r31 */
229 POINTER_REGS, /* r26 - r31 */
230 ADDW_REGS, /* r24 - r31 */
231 SIMPLE_LD_REGS, /* r16 - r23 */
232 LD_REGS, /* r16 - r31 */
233 NO_LD_REGS, /* r0 - r15 */
234 GENERAL_REGS, /* r0 - r31 */
235 ALL_REGS, LIM_REG_CLASSES
239 #define N_REG_CLASSES (int)LIM_REG_CLASSES
241 #define REG_CLASS_NAMES { \
242 "NO_REGS", \
243 "R0_REG", /* r0 */ \
244 "POINTER_X_REGS", /* r26 - r27 */ \
245 "POINTER_Y_REGS", /* r28 - r29 */ \
246 "POINTER_Z_REGS", /* r30 - r31 */ \
247 "STACK_REG", /* STACK */ \
248 "BASE_POINTER_REGS", /* r28 - r31 */ \
249 "POINTER_REGS", /* r26 - r31 */ \
250 "ADDW_REGS", /* r24 - r31 */ \
251 "SIMPLE_LD_REGS", /* r16 - r23 */ \
252 "LD_REGS", /* r16 - r31 */ \
253 "NO_LD_REGS", /* r0 - r15 */ \
254 "GENERAL_REGS", /* r0 - r31 */ \
255 "ALL_REGS" }
257 #define REG_X 26
258 #define REG_Y 28
259 #define REG_Z 30
260 #define REG_W 24
262 #define REG_CLASS_CONTENTS { \
263 {0x00000000,0x00000000}, /* NO_REGS */ \
264 {0x00000001,0x00000000}, /* R0_REG */ \
265 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
266 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
267 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
268 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
269 {(3 << REG_Y) | (3 << REG_Z), \
270 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
271 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
272 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
273 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
274 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
275 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
276 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
277 0x00000000}, /* LD_REGS, r16 - r31 */ \
278 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
279 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
280 {0xffffffff,0x00000003} /* ALL_REGS */ \
283 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
285 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
287 #define INDEX_REG_CLASS NO_REGS
289 #define REG_CLASS_FROM_LETTER(C) avr_reg_class_from_letter(C)
291 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
292 && ((r) == REG_X \
293 || (r) == REG_Y \
294 || (r) == REG_Z \
295 || (r) == ARG_POINTER_REGNUM)) \
296 || (reg_renumber \
297 && (reg_renumber[r] == REG_X \
298 || reg_renumber[r] == REG_Y \
299 || reg_renumber[r] == REG_Z \
300 || (reg_renumber[r] \
301 == ARG_POINTER_REGNUM))))
303 #define REGNO_OK_FOR_INDEX_P(NUM) 0
305 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
307 #define SMALL_REGISTER_CLASSES 1
309 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
311 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
313 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
314 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 63 : \
315 (C) == 'J' ? (VALUE) <= 0 && (VALUE) >= -63: \
316 (C) == 'K' ? (VALUE) == 2 : \
317 (C) == 'L' ? (VALUE) == 0 : \
318 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 0xff : \
319 (C) == 'N' ? (VALUE) == -1: \
320 (C) == 'O' ? (VALUE) == 8 || (VALUE) == 16 || (VALUE) == 24: \
321 (C) == 'P' ? (VALUE) == 1 : \
324 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
325 ((C) == 'G' ? (VALUE) == CONST0_RTX (SFmode) \
326 : 0)
328 #define EXTRA_CONSTRAINT(x, c) extra_constraint(x, c)
330 #define STACK_PUSH_CODE POST_DEC
332 #define STACK_GROWS_DOWNWARD
334 #define STARTING_FRAME_OFFSET 1
336 #define STACK_POINTER_OFFSET 1
338 #define FIRST_PARM_OFFSET(FUNDECL) 0
340 #define STACK_BOUNDARY 8
342 #define STACK_POINTER_REGNUM 32
344 #define FRAME_POINTER_REGNUM REG_Y
346 #define ARG_POINTER_REGNUM 34
348 #define STATIC_CHAIN_REGNUM 2
350 #define FRAME_POINTER_REQUIRED frame_pointer_required_p()
352 #define ELIMINABLE_REGS { \
353 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
354 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
355 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
357 #define CAN_ELIMINATE(FROM, TO) (((FROM) == ARG_POINTER_REGNUM \
358 && (TO) == FRAME_POINTER_REGNUM) \
359 || (((FROM) == FRAME_POINTER_REGNUM \
360 || (FROM) == FRAME_POINTER_REGNUM+1) \
361 && ! FRAME_POINTER_REQUIRED \
364 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
365 OFFSET = initial_elimination_offset (FROM, TO)
367 #define RETURN_ADDR_RTX(count, x) \
368 gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
370 #define PUSH_ROUNDING(NPUSHED) (NPUSHED)
372 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
374 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
376 typedef struct avr_args {
377 int nregs; /* # registers available for passing */
378 int regno; /* next available register number */
379 } CUMULATIVE_ARGS;
381 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
382 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
384 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
385 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
387 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
389 extern int avr_reg_order[];
391 #define RET_REGISTER avr_ret_register ()
393 #define FUNCTION_VALUE(VALTYPE, FUNC) avr_function_value (VALTYPE, FUNC)
395 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
397 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
399 #define DEFAULT_PCC_STRUCT_RETURN 0
401 #define EPILOGUE_USES(REGNO) 0
403 #define HAVE_POST_INCREMENT 1
404 #define HAVE_PRE_DECREMENT 1
406 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
408 #define MAX_REGS_PER_ADDRESS 1
410 #ifdef REG_OK_STRICT
411 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
413 if (legitimate_address_p (mode, operand, 1)) \
414 goto ADDR; \
416 # else
417 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
419 if (legitimate_address_p (mode, operand, 0)) \
420 goto ADDR; \
422 #endif
424 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
425 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
427 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
429 #ifdef REG_OK_STRICT
430 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
431 #else
432 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
433 #endif
435 #define REG_OK_FOR_INDEX_P(X) 0
437 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
439 (X) = legitimize_address (X, OLDX, MODE); \
440 if (memory_address_p (MODE, X)) \
441 goto WIN; \
444 #define XEXP_(X,Y) (X)
445 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
446 do { \
447 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
449 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
450 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
451 OPNUM, RELOAD_OTHER); \
452 goto WIN; \
454 if (GET_CODE (X) == PLUS \
455 && REG_P (XEXP (X, 0)) \
456 && GET_CODE (XEXP (X, 1)) == CONST_INT \
457 && INTVAL (XEXP (X, 1)) >= 1) \
459 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
460 if (fit) \
462 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
464 int regno = REGNO (XEXP (X, 0)); \
465 rtx mem = make_memloc (X, regno); \
466 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
467 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
468 1, ADDR_TYPE (TYPE)); \
469 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
470 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
471 OPNUM, TYPE); \
472 goto WIN; \
474 push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
475 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
476 OPNUM, TYPE); \
477 goto WIN; \
479 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
481 push_reload (X, NULL_RTX, &X, NULL, \
482 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
483 OPNUM, TYPE); \
484 goto WIN; \
487 } while(0)
489 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
490 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
491 goto LABEL
493 #define LEGITIMATE_CONSTANT_P(X) 1
495 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
496 : (TO) == STACK_REG ? 12 \
497 : 2)
499 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \
500 (MODE)==HImode ? 4 : \
501 (MODE)==SImode ? 8 : \
502 (MODE)==SFmode ? 8 : 16)
504 #define BRANCH_COST 0
506 #define SLOW_BYTE_ACCESS 0
508 #define NO_FUNCTION_CSE
510 #define TEXT_SECTION_ASM_OP "\t.text"
512 #define DATA_SECTION_ASM_OP "\t.data"
514 #define BSS_SECTION_ASM_OP "\t.section .bss"
516 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
517 There are no shared libraries on this target, and these sections are
518 placed in the read-only program memory, so they are not writable. */
520 #undef CTORS_SECTION_ASM_OP
521 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
523 #undef DTORS_SECTION_ASM_OP
524 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
526 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
528 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
530 #define EXTRA_SECTIONS in_progmem
532 #define EXTRA_SECTION_FUNCTIONS \
534 void \
535 progmem_section (void) \
537 if (in_section != in_progmem) \
539 fprintf (asm_out_file, \
540 "\t.section .progmem.gcc_sw_table, \"%s\", @progbits\n", \
541 AVR_MEGA ? "a" : "ax"); \
542 /* Should already be aligned, this is just to be safe if it isn't. */ \
543 fprintf (asm_out_file, "\t.p2align 1\n"); \
544 in_section = in_progmem; \
548 #define READONLY_DATA_SECTION data_section
550 #define JUMP_TABLES_IN_TEXT_SECTION 0
552 #define ASM_COMMENT_START " ; "
554 #define ASM_APP_ON "/* #APP */\n"
556 #define ASM_APP_OFF "/* #NOAPP */\n"
558 /* Switch into a generic section. */
559 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
561 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
563 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '\n' \
564 || ((C) == '$'))
566 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
567 do { \
568 fputs ("\t.comm ", (STREAM)); \
569 assemble_name ((STREAM), (NAME)); \
570 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
571 } while (0)
573 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
574 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
576 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
577 do { \
578 fputs ("\t.lcomm ", (STREAM)); \
579 assemble_name ((STREAM), (NAME)); \
580 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
581 } while (0)
583 #undef TYPE_ASM_OP
584 #undef SIZE_ASM_OP
585 #undef WEAK_ASM_OP
586 #define TYPE_ASM_OP "\t.type\t"
587 #define SIZE_ASM_OP "\t.size\t"
588 #define WEAK_ASM_OP "\t.weak\t"
589 /* Define the strings used for the special svr4 .type and .size directives.
590 These strings generally do not vary from one system running svr4 to
591 another, but if a given system (e.g. m88k running svr) needs to use
592 different pseudo-op names for these, they may be overridden in the
593 file which includes this one. */
596 #undef TYPE_OPERAND_FMT
597 #define TYPE_OPERAND_FMT "@%s"
598 /* The following macro defines the format used to output the second
599 operand of the .type assembler directive. Different svr4 assemblers
600 expect various different forms for this operand. The one given here
601 is just a default. You may need to override it in your machine-
602 specific tm.h file (depending upon the particulars of your assembler). */
604 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
605 do { \
606 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
607 ASM_OUTPUT_LABEL (FILE, NAME); \
608 } while (0)
610 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
611 do { \
612 if (!flag_inhibit_size_directive) \
613 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
614 } while (0)
616 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
617 do { \
618 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
619 size_directive_output = 0; \
620 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
622 size_directive_output = 1; \
623 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
624 int_size_in_bytes (TREE_TYPE (DECL))); \
626 ASM_OUTPUT_LABEL(FILE, NAME); \
627 } while (0)
629 #undef ASM_FINISH_DECLARE_OBJECT
630 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
631 do { \
632 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
633 HOST_WIDE_INT size; \
634 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
635 && ! AT_END && TOP_LEVEL \
636 && DECL_INITIAL (DECL) == error_mark_node \
637 && !size_directive_output) \
639 size_directive_output = 1; \
640 size = int_size_in_bytes (TREE_TYPE (DECL)); \
641 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
643 } while (0)
646 #define ESCAPES \
647 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
648 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
649 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
650 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
651 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
652 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
653 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
654 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
655 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
656 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
657 corresponds to a particular byte value [0..255]. For any
658 given byte value, if the value in the corresponding table
659 position is zero, the given character can be output directly.
660 If the table value is 1, the byte must be output as a \ooo
661 octal escape. If the tables value is anything else, then the
662 byte value should be output as a \ followed by the value
663 in the table. Note that we can use standard UN*X escape
664 sequences for many control characters, but we don't use
665 \a to represent BEL because some svr4 assemblers (e.g. on
666 the i386) don't know about that. Also, we don't use \v
667 since some versions of gas, such as 2.2 did not accept it. */
669 #define STRING_LIMIT ((unsigned) 64)
670 #define STRING_ASM_OP "\t.string\t"
671 /* Some svr4 assemblers have a limit on the number of characters which
672 can appear in the operand of a .string directive. If your assembler
673 has such a limitation, you should define STRING_LIMIT to reflect that
674 limit. Note that at least some svr4 assemblers have a limit on the
675 actual number of bytes in the double-quoted string, and that they
676 count each character in an escape sequence as one byte. Thus, an
677 escape sequence like \377 would count as four bytes.
679 If your target assembler doesn't support the .string directive, you
680 should define this to zero. */
682 /* Globalizing directive for a label. */
683 #define GLOBAL_ASM_OP ".global\t"
685 #define ASM_WEAKEN_LABEL(FILE, NAME) \
686 do \
688 fputs ("\t.weak\t", (FILE)); \
689 assemble_name ((FILE), (NAME)); \
690 fputc ('\n', (FILE)); \
692 while (0)
694 #define SUPPORTS_WEAK 1
696 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
697 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
699 #define HAS_INIT_SECTION 1
701 #define REGISTER_NAMES { \
702 "r0","r1","r2","r3","r4","r5","r6","r7", \
703 "r8","r9","r10","r11","r12","r13","r14","r15", \
704 "r16","r17","r18","r19","r20","r21","r22","r23", \
705 "r24","r25","r26","r27","r28","r29","r30","r31", \
706 "__SPL__","__SPH__","argL","argH"}
708 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
710 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
712 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~')
714 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
716 #define USER_LABEL_PREFIX ""
718 #define ASSEMBLER_DIALECT AVR_ENHANCED
720 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
722 if (REGNO > 31) \
723 abort (); \
724 fprintf (STREAM, "\tpush\tr%d", REGNO); \
727 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
729 if (REGNO > 31) \
730 abort (); \
731 fprintf (STREAM, "\tpop\tr%d", REGNO); \
734 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
735 avr_output_addr_vec_elt(STREAM, VALUE)
737 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
738 progmem_section (), (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM)
740 #define ASM_OUTPUT_SKIP(STREAM, N) \
741 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
743 #define ASM_OUTPUT_ALIGN(STREAM, POWER)
745 #define CASE_VECTOR_MODE HImode
747 extern int avr_case_values_threshold;
749 #define CASE_VALUES_THRESHOLD avr_case_values_threshold
751 #undef WORD_REGISTER_OPERATIONS
753 #define MOVE_MAX 4
755 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
757 #define Pmode HImode
759 #define FUNCTION_MODE HImode
761 #define DOLLARS_IN_IDENTIFIERS 0
763 #define NO_DOLLAR_IN_LABEL 1
765 #define TRAMPOLINE_TEMPLATE(FILE) \
766 internal_error ("trampolines not supported")
768 #define TRAMPOLINE_SIZE 4
770 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
772 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
773 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
775 /* Store in cc_status the expressions
776 that the condition codes will describe
777 after execution of an instruction whose pattern is EXP.
778 Do not alter them if the instruction would not alter the cc's. */
780 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
782 /* The add insns don't set overflow in a usable way. */
783 #define CC_OVERFLOW_UNUSABLE 01000
784 /* The mov,and,or,xor insns don't set carry. That's ok though as the
785 Z bit is all we need when doing unsigned comparisons on the result of
786 these insns (since they're always with 0). However, conditions.h has
787 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
788 understandable. */
789 #define CC_NO_CARRY CC_NO_OVERFLOW
792 /* Output assembler code to FILE to increment profiler label # LABELNO
793 for profiling a function entry. */
795 #define FUNCTION_PROFILER(FILE, LABELNO) \
796 fprintf (FILE, "/* profiler %d */", (LABELNO))
798 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
799 adjust_insn_length (INSN, LENGTH))
801 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
803 #define CC1_SPEC "%{profile:-p}"
805 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
806 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
807 %{!fexceptions:-fno-exceptions}"
808 /* A C string constant that tells the GCC drvier program options to
809 pass to `cc1plus'. */
811 #define ASM_SPEC "%{mmcu=*:-mmcu=%*}"
813 #define LINK_SPEC " %{!mmcu*:-m avr2}\
814 %{mmcu=at90s1200|mmcu=attiny11|mmcu=attiny12|mmcu=attiny15|mmcu=attiny28:-m avr1} \
815 %{mmcu=attiny22|mmcu=attiny26|mmcu=at90s2*|mmcu=at90s4*|mmcu=at90s8*|mmcu=at90c8*|mmcu=at86rf401|mmcu=attiny13|mmcu=attiny2313:-m avr2}\
816 %{mmcu=atmega103|mmcu=atmega603|mmcu=at43*|mmcu=at76*:-m avr3}\
817 %{mmcu=atmega8*|mmcu=atmega48:-m avr4}\
818 %{mmcu=atmega16*|mmcu=atmega32*|mmcu=atmega64*|mmcu=atmega128|mmcu=at90can128|mmcu=at94k:-m avr5}\
819 %{mmcu=atmega325|mmcu=atmega3250|mmcu=atmega48|mmcu=atmega88|mmcu=atmega64|mmcu=atmega645|mmcu=atmega6450|mmcu=atmega128|mmcu=at90can128|mmcu=at90can128|mmcu=atmega162|mmcu=atmega165|mmcu=atmega168|mmcu=atmega169: -Tdata 0x800100} "
821 #define LIB_SPEC \
822 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
824 #define LIBSTDCXX "-lgcc"
825 /* No libstdc++ for now. Empty string doesn't work. */
827 #define LIBGCC_SPEC \
828 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
830 #define STARTFILE_SPEC "%(crt_binutils)"
832 #define ENDFILE_SPEC ""
834 #define CRT_BINUTILS_SPECS "\
835 %{mmcu=at90s1200|mmcu=avr1:crts1200.o%s} \
836 %{mmcu=attiny11:crttn11.o%s} \
837 %{mmcu=attiny12:crttn12.o%s} \
838 %{mmcu=attiny15:crttn15.o%s} \
839 %{mmcu=attiny28:crttn28.o%s} \
840 %{!mmcu*|mmcu=at90s8515|mmcu=avr2:crts8515.o%s} \
841 %{mmcu=at90s2313:crts2313.o%s} \
842 %{mmcu=at90s2323:crts2323.o%s} \
843 %{mmcu=at90s2333:crts2333.o%s} \
844 %{mmcu=at90s2343:crts2343.o%s} \
845 %{mmcu=attiny22:crttn22.o%s} \
846 %{mmcu=attiny26:crttn26.o%s} \
847 %{mmcu=at90s4433:crts4433.o%s} \
848 %{mmcu=at90s4414:crts4414.o%s} \
849 %{mmcu=at90s4434:crts4434.o%s} \
850 %{mmcu=at90c8534:crtc8534.o%s} \
851 %{mmcu=at90s8535:crts8535.o%s} \
852 %{mmcu=at86rf401:crt86401.o%s} \
853 %{mmcu=attiny13:crttn13.o%s} \
854 %{mmcu=attiny2313:crttn2313.o%s} \
855 %{mmcu=atmega103|mmcu=avr3:crtm103.o%s} \
856 %{mmcu=atmega603:crtm603.o%s} \
857 %{mmcu=at43usb320:crt43320.o%s} \
858 %{mmcu=at43usb355:crt43355.o%s} \
859 %{mmcu=at76c711:crt76711.o%s} \
860 %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
861 %{mmcu=atmega48:crtm48.o%s} \
862 %{mmcu=atmega88:crtm88.o%s} \
863 %{mmcu=atmega8515:crtm8515.o%s} \
864 %{mmcu=atmega8535:crtm8535.o%s} \
865 %{mmcu=atmega16:crtm16.o%s} \
866 %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
867 %{mmcu=atmega162:crtm162.o%s} \
868 %{mmcu=atmega163:crtm163.o%s} \
869 %{mmcu=atmega165:crtm165.o%s} \
870 %{mmcu=atmega168:crtm168.o%s} \
871 %{mmcu=atmega169:crtm169.o%s} \
872 %{mmcu=atmega32:crtm32.o%s} \
873 %{mmcu=atmega323:crtm323.o%s} \
874 %{mmcu=atmega325:crtm325.o%s} \
875 %{mmcu=atmega3250:crtm3250.o%s} \
876 %{mmcu=atmega64:crtm64.o%s} \
877 %{mmcu=atmega645:crtm6450.o%s} \
878 %{mmcu=atmega6450:crtm6450.o%s} \
879 %{mmcu=atmega128:crtm128.o%s} \
880 %{mmcu=at90can128:crtcan128.o%s} \
881 %{mmcu=at94k:crtat94k.o%s}"
883 #define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
885 /* This is the default without any -mmcu=* option (AT90S*). */
886 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
888 /* This is undefined macro for collect2 disabling */
889 #define LINKER_NAME "ld"
891 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
892 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
894 /* Note that the other files fail to use these
895 in some of the places where they should. */
897 #if defined(__STDC__) || defined(ALMOST_STDC)
898 #define AS2(a,b,c) #a " " #b "," #c
899 #define AS2C(b,c) " " #b "," #c
900 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
901 #define AS1(a,b) #a " " #b
902 #else
903 #define AS1(a,b) "a b"
904 #define AS2(a,b,c) "a b,c"
905 #define AS2C(b,c) " b,c"
906 #define AS3(a,b,c,d) "a b,c,d"
907 #endif
908 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
909 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
910 #define CR_TAB "\n\t"
912 /* Temporary register r0 */
913 #define TMP_REGNO 0
915 /* zero register r1 */
916 #define ZERO_REGNO 1
918 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG