Mark as release
[official-gcc.git] / gcc / caller-save.c
blob0c840c3080b5636f367874fdcf46d98dfc52a2fb
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "regs.h"
28 #include "insn-config.h"
29 #include "flags.h"
30 #include "hard-reg-set.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "reload.h"
34 #include "function.h"
35 #include "expr.h"
36 #include "toplev.h"
37 #include "tm_p.h"
38 #include "addresses.h"
39 #include "output.h"
40 #include "df.h"
41 #include "ggc.h"
43 /* Call used hard registers which can not be saved because there is no
44 insn for this. */
45 HARD_REG_SET no_caller_save_reg_set;
47 #ifndef MAX_MOVE_MAX
48 #define MAX_MOVE_MAX MOVE_MAX
49 #endif
51 #ifndef MIN_UNITS_PER_WORD
52 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
53 #endif
55 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
57 /* Modes for each hard register that we can save. The smallest mode is wide
58 enough to save the entire contents of the register. When saving the
59 register because it is live we first try to save in multi-register modes.
60 If that is not possible the save is done one register at a time. */
62 static enum machine_mode
63 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
65 /* For each hard register, a place on the stack where it can be saved,
66 if needed. */
68 static rtx
69 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
71 /* The number of elements in the subsequent array. */
72 static int save_slots_num;
74 /* Allocated slots so far. */
75 static rtx save_slots[FIRST_PSEUDO_REGISTER];
77 /* We will only make a register eligible for caller-save if it can be
78 saved in its widest mode with a simple SET insn as long as the memory
79 address is valid. We record the INSN_CODE is those insns here since
80 when we emit them, the addresses might not be valid, so they might not
81 be recognized. */
83 static int
84 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
85 static int
86 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
88 /* Set of hard regs currently residing in save area (during insn scan). */
90 static HARD_REG_SET hard_regs_saved;
92 /* Number of registers currently in hard_regs_saved. */
94 static int n_regs_saved;
96 /* Computed by mark_referenced_regs, all regs referenced in a given
97 insn. */
98 static HARD_REG_SET referenced_regs;
101 static int reg_save_code (int, enum machine_mode);
102 static int reg_restore_code (int, enum machine_mode);
104 struct saved_hard_reg;
105 static void initiate_saved_hard_regs (void);
106 static struct saved_hard_reg *new_saved_hard_reg (int, int);
107 static void finish_saved_hard_regs (void);
108 static int saved_hard_reg_compare_func (const void *, const void *);
110 static void mark_set_regs (rtx, const_rtx, void *);
111 static void add_stored_regs (rtx, const_rtx, void *);
112 static void mark_referenced_regs (rtx);
113 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
114 enum machine_mode *);
115 static int insert_restore (struct insn_chain *, int, int, int,
116 enum machine_mode *);
117 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
118 rtx);
119 static void add_stored_regs (rtx, const_rtx, void *);
123 static GTY(()) rtx savepat;
124 static GTY(()) rtx restpat;
125 static GTY(()) rtx test_reg;
126 static GTY(()) rtx test_mem;
127 static GTY(()) rtx saveinsn;
128 static GTY(()) rtx restinsn;
130 /* Return the INSN_CODE used to save register REG in mode MODE. */
131 static int
132 reg_save_code (int reg, enum machine_mode mode)
134 bool ok;
135 if (cached_reg_save_code[reg][mode])
136 return cached_reg_save_code[reg][mode];
137 if (!HARD_REGNO_MODE_OK (reg, mode))
139 cached_reg_save_code[reg][mode] = -1;
140 cached_reg_restore_code[reg][mode] = -1;
141 return -1;
144 /* Update the register number and modes of the register
145 and memory operand. */
146 SET_REGNO (test_reg, reg);
147 PUT_MODE (test_reg, mode);
148 PUT_MODE (test_mem, mode);
150 /* Force re-recognition of the modified insns. */
151 INSN_CODE (saveinsn) = -1;
152 INSN_CODE (restinsn) = -1;
154 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
155 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
157 /* Now extract both insns and see if we can meet their
158 constraints. */
159 ok = (cached_reg_save_code[reg][mode] != -1
160 && cached_reg_restore_code[reg][mode] != -1);
161 if (ok)
163 extract_insn (saveinsn);
164 ok = constrain_operands (1);
165 extract_insn (restinsn);
166 ok &= constrain_operands (1);
169 if (! ok)
171 cached_reg_save_code[reg][mode] = -1;
172 cached_reg_restore_code[reg][mode] = -1;
174 gcc_assert (cached_reg_save_code[reg][mode]);
175 return cached_reg_save_code[reg][mode];
178 /* Return the INSN_CODE used to restore register REG in mode MODE. */
179 static int
180 reg_restore_code (int reg, enum machine_mode mode)
182 if (cached_reg_restore_code[reg][mode])
183 return cached_reg_restore_code[reg][mode];
184 /* Populate our cache. */
185 reg_save_code (reg, mode);
186 return cached_reg_restore_code[reg][mode];
189 /* Initialize for caller-save.
191 Look at all the hard registers that are used by a call and for which
192 reginfo.c has not already excluded from being used across a call.
194 Ensure that we can find a mode to save the register and that there is a
195 simple insn to save and restore the register. This latter check avoids
196 problems that would occur if we tried to save the MQ register of some
197 machines directly into memory. */
199 void
200 init_caller_save (void)
202 rtx addr_reg;
203 int offset;
204 rtx address;
205 int i, j;
207 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
208 /* First find all the registers that we need to deal with and all
209 the modes that they can have. If we can't find a mode to use,
210 we can't have the register live over calls. */
212 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
214 if (call_used_regs[i] && ! call_fixed_regs[i])
216 for (j = 1; j <= MOVE_MAX_WORDS; j++)
218 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
219 VOIDmode);
220 if (regno_save_mode[i][j] == VOIDmode && j == 1)
222 call_fixed_regs[i] = 1;
223 SET_HARD_REG_BIT (call_fixed_reg_set, i);
227 else
228 regno_save_mode[i][1] = VOIDmode;
231 /* The following code tries to approximate the conditions under which
232 we can easily save and restore a register without scratch registers or
233 other complexities. It will usually work, except under conditions where
234 the validity of an insn operand is dependent on the address offset.
235 No such cases are currently known.
237 We first find a typical offset from some BASE_REG_CLASS register.
238 This address is chosen by finding the first register in the class
239 and by finding the smallest power of two that is a valid offset from
240 that register in every mode we will use to save registers. */
242 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
243 if (TEST_HARD_REG_BIT
244 (reg_class_contents
245 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i))
246 break;
248 gcc_assert (i < FIRST_PSEUDO_REGISTER);
250 addr_reg = gen_rtx_REG (Pmode, i);
252 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
254 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
256 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
257 if (regno_save_mode[i][1] != VOIDmode
258 && ! strict_memory_address_p (regno_save_mode[i][1], address))
259 break;
261 if (i == FIRST_PSEUDO_REGISTER)
262 break;
265 /* If we didn't find a valid address, we must use register indirect. */
266 if (offset == 0)
267 address = addr_reg;
269 /* Next we try to form an insn to save and restore the register. We
270 see if such an insn is recognized and meets its constraints.
272 To avoid lots of unnecessary RTL allocation, we construct all the RTL
273 once, then modify the memory and register operands in-place. */
275 test_reg = gen_rtx_REG (VOIDmode, 0);
276 test_mem = gen_rtx_MEM (VOIDmode, address);
277 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
278 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
280 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0);
281 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0);
283 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
284 for (j = 1; j <= MOVE_MAX_WORDS; j++)
285 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
287 regno_save_mode[i][j] = VOIDmode;
288 if (j == 1)
290 call_fixed_regs[i] = 1;
291 SET_HARD_REG_BIT (call_fixed_reg_set, i);
292 if (call_used_regs[i])
293 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
300 /* Initialize save areas by showing that we haven't allocated any yet. */
302 void
303 init_save_areas (void)
305 int i, j;
307 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
308 for (j = 1; j <= MOVE_MAX_WORDS; j++)
309 regno_save_mem[i][j] = 0;
310 save_slots_num = 0;
314 /* The structure represents a hard register which should be saved
315 through the call. It is used when the integrated register
316 allocator (IRA) is used and sharing save slots is on. */
317 struct saved_hard_reg
319 /* Order number starting with 0. */
320 int num;
321 /* The hard regno. */
322 int hard_regno;
323 /* Execution frequency of all calls through which given hard
324 register should be saved. */
325 int call_freq;
326 /* Stack slot reserved to save the hard register through calls. */
327 rtx slot;
328 /* True if it is first hard register in the chain of hard registers
329 sharing the same stack slot. */
330 int first_p;
331 /* Order number of the next hard register structure with the same
332 slot in the chain. -1 represents end of the chain. */
333 int next;
336 /* Map: hard register number to the corresponding structure. */
337 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
339 /* The number of all structures representing hard registers should be
340 saved, in order words, the number of used elements in the following
341 array. */
342 static int saved_regs_num;
344 /* Pointers to all the structures. Index is the order number of the
345 corresponding structure. */
346 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
348 /* First called function for work with saved hard registers. */
349 static void
350 initiate_saved_hard_regs (void)
352 int i;
354 saved_regs_num = 0;
355 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
356 hard_reg_map[i] = NULL;
359 /* Allocate and return new saved hard register with given REGNO and
360 CALL_FREQ. */
361 static struct saved_hard_reg *
362 new_saved_hard_reg (int regno, int call_freq)
364 struct saved_hard_reg *saved_reg;
366 saved_reg
367 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
368 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
369 saved_reg->num = saved_regs_num++;
370 saved_reg->hard_regno = regno;
371 saved_reg->call_freq = call_freq;
372 saved_reg->first_p = FALSE;
373 saved_reg->next = -1;
374 return saved_reg;
377 /* Free memory allocated for the saved hard registers. */
378 static void
379 finish_saved_hard_regs (void)
381 int i;
383 for (i = 0; i < saved_regs_num; i++)
384 free (all_saved_regs[i]);
387 /* The function is used to sort the saved hard register structures
388 according their frequency. */
389 static int
390 saved_hard_reg_compare_func (const void *v1p, const void *v2p)
392 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
393 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
395 if (flag_omit_frame_pointer)
397 if (p1->call_freq - p2->call_freq != 0)
398 return p1->call_freq - p2->call_freq;
400 else if (p2->call_freq - p1->call_freq != 0)
401 return p2->call_freq - p1->call_freq;
403 return p1->num - p2->num;
406 /* Allocate save areas for any hard registers that might need saving.
407 We take a conservative approach here and look for call-clobbered hard
408 registers that are assigned to pseudos that cross calls. This may
409 overestimate slightly (especially if some of these registers are later
410 used as spill registers), but it should not be significant.
412 For IRA we use priority coloring to decrease stack slots needed for
413 saving hard registers through calls. We build conflicts for them
414 to do coloring.
416 Future work:
418 In the fallback case we should iterate backwards across all possible
419 modes for the save, choosing the largest available one instead of
420 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
422 We do not try to use "move multiple" instructions that exist
423 on some machines (such as the 68k moveml). It could be a win to try
424 and use them when possible. The hard part is doing it in a way that is
425 machine independent since they might be saving non-consecutive
426 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
428 void
429 setup_save_areas (void)
431 int i, j, k;
432 unsigned int r;
433 HARD_REG_SET hard_regs_used;
435 /* Allocate space in the save area for the largest multi-register
436 pseudos first, then work backwards to single register
437 pseudos. */
439 /* Find and record all call-used hard-registers in this function. */
440 CLEAR_HARD_REG_SET (hard_regs_used);
441 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
442 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
444 unsigned int regno = reg_renumber[i];
445 unsigned int endregno
446 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
447 for (r = regno; r < endregno; r++)
448 if (call_used_regs[r])
449 SET_HARD_REG_BIT (hard_regs_used, r);
452 if (optimize && flag_ira_share_save_slots)
454 rtx insn, slot;
455 struct insn_chain *chain, *next;
456 char *saved_reg_conflicts;
457 unsigned int regno;
458 int next_k, freq;
459 struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3;
460 int call_saved_regs_num;
461 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
462 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
463 reg_set_iterator rsi;
464 int best_slot_num;
465 int prev_save_slots_num;
466 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
468 initiate_saved_hard_regs ();
469 /* Create hard reg saved regs. */
470 for (chain = reload_insn_chain; chain != 0; chain = next)
472 insn = chain->insn;
473 next = chain->next;
474 if (GET_CODE (insn) != CALL_INSN
475 || find_reg_note (insn, REG_NORETURN, NULL))
476 continue;
477 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
478 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
479 &chain->live_throughout);
480 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
482 /* Record all registers set in this call insn. These don't
483 need to be saved. N.B. the call insn might set a subreg
484 of a multi-hard-reg pseudo; then the pseudo is considered
485 live during the call, but the subreg that is set
486 isn't. */
487 CLEAR_HARD_REG_SET (this_insn_sets);
488 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
489 /* Sibcalls are considered to set the return value. */
490 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
491 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
493 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
494 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
495 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
496 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
497 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
499 if (hard_reg_map[regno] != NULL)
500 hard_reg_map[regno]->call_freq += freq;
501 else
502 saved_reg = new_saved_hard_reg (regno, freq);
504 /* Look through all live pseudos, mark their hard registers. */
505 EXECUTE_IF_SET_IN_REG_SET
506 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
508 int r = reg_renumber[regno];
509 int bound;
511 if (r < 0)
512 continue;
514 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
515 for (; r < bound; r++)
516 if (TEST_HARD_REG_BIT (used_regs, r))
518 if (hard_reg_map[r] != NULL)
519 hard_reg_map[r]->call_freq += freq;
520 else
521 saved_reg = new_saved_hard_reg (r, freq);
522 SET_HARD_REG_BIT (hard_regs_to_save, r);
526 /* Find saved hard register conflicts. */
527 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
528 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
529 for (chain = reload_insn_chain; chain != 0; chain = next)
531 call_saved_regs_num = 0;
532 insn = chain->insn;
533 next = chain->next;
534 if (GET_CODE (insn) != CALL_INSN
535 || find_reg_note (insn, REG_NORETURN, NULL))
536 continue;
537 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
538 &chain->live_throughout);
539 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
541 /* Record all registers set in this call insn. These don't
542 need to be saved. N.B. the call insn might set a subreg
543 of a multi-hard-reg pseudo; then the pseudo is considered
544 live during the call, but the subreg that is set
545 isn't. */
546 CLEAR_HARD_REG_SET (this_insn_sets);
547 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
548 /* Sibcalls are considered to set the return value,
549 compare flow.c:propagate_one_insn. */
550 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
551 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
553 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
554 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
555 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
556 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
557 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
559 gcc_assert (hard_reg_map[regno] != NULL);
560 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
562 /* Look through all live pseudos, mark their hard registers. */
563 EXECUTE_IF_SET_IN_REG_SET
564 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
566 int r = reg_renumber[regno];
567 int bound;
569 if (r < 0)
570 continue;
572 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
573 for (; r < bound; r++)
574 if (TEST_HARD_REG_BIT (used_regs, r))
575 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
577 for (i = 0; i < call_saved_regs_num; i++)
579 saved_reg = call_saved_regs[i];
580 for (j = 0; j < call_saved_regs_num; j++)
581 if (i != j)
583 saved_reg2 = call_saved_regs[j];
584 saved_reg_conflicts[saved_reg->num * saved_regs_num
585 + saved_reg2->num]
586 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
587 + saved_reg->num]
588 = TRUE;
592 /* Sort saved hard regs. */
593 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
594 saved_hard_reg_compare_func);
595 /* Initiate slots available from the previous reload
596 iteration. */
597 prev_save_slots_num = save_slots_num;
598 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
599 save_slots_num = 0;
600 /* Allocate stack slots for the saved hard registers. */
601 for (i = 0; i < saved_regs_num; i++)
603 saved_reg = all_saved_regs[i];
604 regno = saved_reg->hard_regno;
605 for (j = 0; j < i; j++)
607 saved_reg2 = all_saved_regs[j];
608 if (! saved_reg2->first_p)
609 continue;
610 slot = saved_reg2->slot;
611 for (k = j; k >= 0; k = next_k)
613 saved_reg3 = all_saved_regs[k];
614 next_k = saved_reg3->next;
615 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
616 + saved_reg3->num])
617 break;
619 if (k < 0
620 && (GET_MODE_SIZE (regno_save_mode[regno][1])
621 <= GET_MODE_SIZE (regno_save_mode
622 [saved_reg2->hard_regno][1])))
624 saved_reg->slot
625 = adjust_address_nv
626 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
627 regno_save_mem[regno][1] = saved_reg->slot;
628 saved_reg->next = saved_reg2->next;
629 saved_reg2->next = i;
630 if (dump_file != NULL)
631 fprintf (dump_file, "%d uses slot of %d\n",
632 regno, saved_reg2->hard_regno);
633 break;
636 if (j == i)
638 saved_reg->first_p = TRUE;
639 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
641 slot = prev_save_slots[j];
642 if (slot == NULL_RTX)
643 continue;
644 if (GET_MODE_SIZE (regno_save_mode[regno][1])
645 <= GET_MODE_SIZE (GET_MODE (slot))
646 && best_slot_num < 0)
647 best_slot_num = j;
648 if (GET_MODE (slot) == regno_save_mode[regno][1])
649 break;
651 if (best_slot_num >= 0)
653 saved_reg->slot = prev_save_slots[best_slot_num];
654 saved_reg->slot
655 = adjust_address_nv
656 (saved_reg->slot,
657 regno_save_mode[saved_reg->hard_regno][1], 0);
658 if (dump_file != NULL)
659 fprintf (dump_file,
660 "%d uses a slot from prev iteration\n", regno);
661 prev_save_slots[best_slot_num] = NULL_RTX;
662 if (best_slot_num + 1 == prev_save_slots_num)
663 prev_save_slots_num--;
665 else
667 saved_reg->slot
668 = assign_stack_local_1
669 (regno_save_mode[regno][1],
670 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true);
671 if (dump_file != NULL)
672 fprintf (dump_file, "%d uses a new slot\n", regno);
674 regno_save_mem[regno][1] = saved_reg->slot;
675 save_slots[save_slots_num++] = saved_reg->slot;
678 free (saved_reg_conflicts);
679 finish_saved_hard_regs ();
681 else
683 /* Now run through all the call-used hard-registers and allocate
684 space for them in the caller-save area. Try to allocate space
685 in a manner which allows multi-register saves/restores to be done. */
687 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
688 for (j = MOVE_MAX_WORDS; j > 0; j--)
690 int do_save = 1;
692 /* If no mode exists for this size, try another. Also break out
693 if we have already saved this hard register. */
694 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
695 continue;
697 /* See if any register in this group has been saved. */
698 for (k = 0; k < j; k++)
699 if (regno_save_mem[i + k][1])
701 do_save = 0;
702 break;
704 if (! do_save)
705 continue;
707 for (k = 0; k < j; k++)
708 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
710 do_save = 0;
711 break;
713 if (! do_save)
714 continue;
716 /* We have found an acceptable mode to store in. Since
717 hard register is always saved in the widest mode
718 available, the mode may be wider than necessary, it is
719 OK to reduce the alignment of spill space. We will
720 verify that it is equal to or greater than required
721 when we restore and save the hard register in
722 insert_restore and insert_save. */
723 regno_save_mem[i][j]
724 = assign_stack_local_1 (regno_save_mode[i][j],
725 GET_MODE_SIZE (regno_save_mode[i][j]),
726 0, true);
728 /* Setup single word save area just in case... */
729 for (k = 0; k < j; k++)
730 /* This should not depend on WORDS_BIG_ENDIAN.
731 The order of words in regs is the same as in memory. */
732 regno_save_mem[i + k][1]
733 = adjust_address_nv (regno_save_mem[i][j],
734 regno_save_mode[i + k][1],
735 k * UNITS_PER_WORD);
739 /* Now loop again and set the alias set of any save areas we made to
740 the alias set used to represent frame objects. */
741 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
742 for (j = MOVE_MAX_WORDS; j > 0; j--)
743 if (regno_save_mem[i][j] != 0)
744 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
749 /* Find the places where hard regs are live across calls and save them. */
751 void
752 save_call_clobbered_regs (void)
754 struct insn_chain *chain, *next;
755 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
757 /* Computed in mark_set_regs, holds all registers set by the current
758 instruction. */
759 HARD_REG_SET this_insn_sets;
761 CLEAR_HARD_REG_SET (hard_regs_saved);
762 n_regs_saved = 0;
764 for (chain = reload_insn_chain; chain != 0; chain = next)
766 rtx insn = chain->insn;
767 enum rtx_code code = GET_CODE (insn);
769 next = chain->next;
771 gcc_assert (!chain->is_caller_save_insn);
773 if (INSN_P (insn))
775 /* If some registers have been saved, see if INSN references
776 any of them. We must restore them before the insn if so. */
778 if (n_regs_saved)
780 int regno;
782 if (code == JUMP_INSN)
783 /* Restore all registers if this is a JUMP_INSN. */
784 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
785 else
787 CLEAR_HARD_REG_SET (referenced_regs);
788 mark_referenced_regs (PATTERN (insn));
789 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
792 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
793 if (TEST_HARD_REG_BIT (referenced_regs, regno))
794 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
797 if (code == CALL_INSN
798 && ! SIBLING_CALL_P (insn)
799 && ! find_reg_note (insn, REG_NORETURN, NULL))
801 unsigned regno;
802 HARD_REG_SET hard_regs_to_save;
803 reg_set_iterator rsi;
805 /* Use the register life information in CHAIN to compute which
806 regs are live during the call. */
807 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
808 &chain->live_throughout);
809 /* Save hard registers always in the widest mode available. */
810 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
811 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
812 save_mode [regno] = regno_save_mode [regno][1];
813 else
814 save_mode [regno] = VOIDmode;
816 /* Look through all live pseudos, mark their hard registers
817 and choose proper mode for saving. */
818 EXECUTE_IF_SET_IN_REG_SET
819 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
821 int r = reg_renumber[regno];
822 int nregs;
823 enum machine_mode mode;
825 if (r < 0)
826 continue;
827 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
828 mode = HARD_REGNO_CALLER_SAVE_MODE
829 (r, nregs, PSEUDO_REGNO_MODE (regno));
830 if (GET_MODE_BITSIZE (mode)
831 > GET_MODE_BITSIZE (save_mode[r]))
832 save_mode[r] = mode;
833 while (nregs-- > 0)
834 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
837 /* Record all registers set in this call insn. These don't need
838 to be saved. N.B. the call insn might set a subreg of a
839 multi-hard-reg pseudo; then the pseudo is considered live
840 during the call, but the subreg that is set isn't. */
841 CLEAR_HARD_REG_SET (this_insn_sets);
842 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
844 /* Compute which hard regs must be saved before this call. */
845 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
846 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
847 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
848 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
850 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
851 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
852 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
854 /* Must recompute n_regs_saved. */
855 n_regs_saved = 0;
856 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
857 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
858 n_regs_saved++;
862 if (chain->next == 0 || chain->next->block != chain->block)
864 int regno;
865 /* At the end of the basic block, we must restore any registers that
866 remain saved. If the last insn in the block is a JUMP_INSN, put
867 the restore before the insn, otherwise, put it after the insn. */
869 if (n_regs_saved)
870 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
871 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
872 regno += insert_restore (chain, JUMP_P (insn),
873 regno, MOVE_MAX_WORDS, save_mode);
878 /* Here from note_stores, or directly from save_call_clobbered_regs, when
879 an insn stores a value in a register.
880 Set the proper bit or bits in this_insn_sets. All pseudos that have
881 been assigned hard regs have had their register number changed already,
882 so we can ignore pseudos. */
883 static void
884 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
886 int regno, endregno, i;
887 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
889 if (GET_CODE (reg) == SUBREG)
891 rtx inner = SUBREG_REG (reg);
892 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
893 return;
894 regno = subreg_regno (reg);
895 endregno = regno + subreg_nregs (reg);
897 else if (REG_P (reg)
898 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
900 regno = REGNO (reg);
901 endregno = END_HARD_REGNO (reg);
903 else
904 return;
906 for (i = regno; i < endregno; i++)
907 SET_HARD_REG_BIT (*this_insn_sets, i);
910 /* Here from note_stores when an insn stores a value in a register.
911 Set the proper bit or bits in the passed regset. All pseudos that have
912 been assigned hard regs have had their register number changed already,
913 so we can ignore pseudos. */
914 static void
915 add_stored_regs (rtx reg, const_rtx setter, void *data)
917 int regno, endregno, i;
918 enum machine_mode mode = GET_MODE (reg);
919 int offset = 0;
921 if (GET_CODE (setter) == CLOBBER)
922 return;
924 if (GET_CODE (reg) == SUBREG
925 && REG_P (SUBREG_REG (reg))
926 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
928 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
929 GET_MODE (SUBREG_REG (reg)),
930 SUBREG_BYTE (reg),
931 GET_MODE (reg));
932 regno = REGNO (SUBREG_REG (reg)) + offset;
933 endregno = regno + subreg_nregs (reg);
935 else
937 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
938 return;
940 regno = REGNO (reg) + offset;
941 endregno = end_hard_regno (mode, regno);
944 for (i = regno; i < endregno; i++)
945 SET_REGNO_REG_SET ((regset) data, i);
948 /* Walk X and record all referenced registers in REFERENCED_REGS. */
949 static void
950 mark_referenced_regs (rtx x)
952 enum rtx_code code = GET_CODE (x);
953 const char *fmt;
954 int i, j;
956 if (code == SET)
957 mark_referenced_regs (SET_SRC (x));
958 if (code == SET || code == CLOBBER)
960 x = SET_DEST (x);
961 code = GET_CODE (x);
962 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
963 || code == PC || code == CC0
964 || (code == SUBREG && REG_P (SUBREG_REG (x))
965 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
966 /* If we're setting only part of a multi-word register,
967 we shall mark it as referenced, because the words
968 that are not being set should be restored. */
969 && ((GET_MODE_SIZE (GET_MODE (x))
970 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
971 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
972 <= UNITS_PER_WORD))))
973 return;
975 if (code == MEM || code == SUBREG)
977 x = XEXP (x, 0);
978 code = GET_CODE (x);
981 if (code == REG)
983 int regno = REGNO (x);
984 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
985 : reg_renumber[regno]);
987 if (hardregno >= 0)
988 add_to_hard_reg_set (&referenced_regs, GET_MODE (x), hardregno);
989 /* If this is a pseudo that did not get a hard register, scan its
990 memory location, since it might involve the use of another
991 register, which might be saved. */
992 else if (reg_equiv_mem[regno] != 0)
993 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
994 else if (reg_equiv_address[regno] != 0)
995 mark_referenced_regs (reg_equiv_address[regno]);
996 return;
999 fmt = GET_RTX_FORMAT (code);
1000 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1002 if (fmt[i] == 'e')
1003 mark_referenced_regs (XEXP (x, i));
1004 else if (fmt[i] == 'E')
1005 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1006 mark_referenced_regs (XVECEXP (x, i, j));
1010 /* Insert a sequence of insns to restore. Place these insns in front of
1011 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1012 the maximum number of registers which should be restored during this call.
1013 It should never be less than 1 since we only work with entire registers.
1015 Note that we have verified in init_caller_save that we can do this
1016 with a simple SET, so use it. Set INSN_CODE to what we save there
1017 since the address might not be valid so the insn might not be recognized.
1018 These insns will be reloaded and have register elimination done by
1019 find_reload, so we need not worry about that here.
1021 Return the extra number of registers saved. */
1023 static int
1024 insert_restore (struct insn_chain *chain, int before_p, int regno,
1025 int maxrestore, enum machine_mode *save_mode)
1027 int i, k;
1028 rtx pat = NULL_RTX;
1029 int code;
1030 unsigned int numregs = 0;
1031 struct insn_chain *new_chain;
1032 rtx mem;
1034 /* A common failure mode if register status is not correct in the
1035 RTL is for this routine to be called with a REGNO we didn't
1036 expect to save. That will cause us to write an insn with a (nil)
1037 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1038 later, check for this common case here instead. This will remove
1039 one step in debugging such problems. */
1040 gcc_assert (regno_save_mem[regno][1]);
1042 /* Get the pattern to emit and update our status.
1044 See if we can restore `maxrestore' registers at once. Work
1045 backwards to the single register case. */
1046 for (i = maxrestore; i > 0; i--)
1048 int j;
1049 int ok = 1;
1051 if (regno_save_mem[regno][i] == 0)
1052 continue;
1054 for (j = 0; j < i; j++)
1055 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1057 ok = 0;
1058 break;
1060 /* Must do this one restore at a time. */
1061 if (! ok)
1062 continue;
1064 numregs = i;
1065 break;
1068 mem = regno_save_mem [regno][numregs];
1069 if (save_mode [regno] != VOIDmode
1070 && save_mode [regno] != GET_MODE (mem)
1071 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1072 /* Check that insn to restore REGNO in save_mode[regno] is
1073 correct. */
1074 && reg_save_code (regno, save_mode[regno]) >= 0)
1075 mem = adjust_address (mem, save_mode[regno], 0);
1076 else
1077 mem = copy_rtx (mem);
1079 /* Verify that the alignment of spill space is equal to or greater
1080 than required. */
1081 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1082 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1084 pat = gen_rtx_SET (VOIDmode,
1085 gen_rtx_REG (GET_MODE (mem),
1086 regno), mem);
1087 code = reg_restore_code (regno, GET_MODE (mem));
1088 new_chain = insert_one_insn (chain, before_p, code, pat);
1090 /* Clear status for all registers we restored. */
1091 for (k = 0; k < i; k++)
1093 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
1094 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1095 n_regs_saved--;
1098 /* Tell our callers how many extra registers we saved/restored. */
1099 return numregs - 1;
1102 /* Like insert_restore above, but save registers instead. */
1104 static int
1105 insert_save (struct insn_chain *chain, int before_p, int regno,
1106 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
1108 int i;
1109 unsigned int k;
1110 rtx pat = NULL_RTX;
1111 int code;
1112 unsigned int numregs = 0;
1113 struct insn_chain *new_chain;
1114 rtx mem;
1116 /* A common failure mode if register status is not correct in the
1117 RTL is for this routine to be called with a REGNO we didn't
1118 expect to save. That will cause us to write an insn with a (nil)
1119 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1120 later, check for this common case here. This will remove one
1121 step in debugging such problems. */
1122 gcc_assert (regno_save_mem[regno][1]);
1124 /* Get the pattern to emit and update our status.
1126 See if we can save several registers with a single instruction.
1127 Work backwards to the single register case. */
1128 for (i = MOVE_MAX_WORDS; i > 0; i--)
1130 int j;
1131 int ok = 1;
1132 if (regno_save_mem[regno][i] == 0)
1133 continue;
1135 for (j = 0; j < i; j++)
1136 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1138 ok = 0;
1139 break;
1141 /* Must do this one save at a time. */
1142 if (! ok)
1143 continue;
1145 numregs = i;
1146 break;
1149 mem = regno_save_mem [regno][numregs];
1150 if (save_mode [regno] != VOIDmode
1151 && save_mode [regno] != GET_MODE (mem)
1152 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1153 /* Check that insn to save REGNO in save_mode[regno] is
1154 correct. */
1155 && reg_save_code (regno, save_mode[regno]) >= 0)
1156 mem = adjust_address (mem, save_mode[regno], 0);
1157 else
1158 mem = copy_rtx (mem);
1160 /* Verify that the alignment of spill space is equal to or greater
1161 than required. */
1162 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1163 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1165 pat = gen_rtx_SET (VOIDmode, mem,
1166 gen_rtx_REG (GET_MODE (mem),
1167 regno));
1168 code = reg_save_code (regno, GET_MODE (mem));
1169 new_chain = insert_one_insn (chain, before_p, code, pat);
1171 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1172 for (k = 0; k < numregs; k++)
1174 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
1175 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1176 n_regs_saved++;
1179 /* Tell our callers how many extra registers we saved/restored. */
1180 return numregs - 1;
1183 /* A for_each_rtx callback used by add_used_regs. Add the hard-register
1184 equivalent of each REG to regset DATA. */
1186 static int
1187 add_used_regs_1 (rtx *loc, void *data)
1189 int regno, i;
1190 regset live;
1191 rtx x;
1193 x = *loc;
1194 live = (regset) data;
1195 if (REG_P (x))
1197 regno = REGNO (x);
1198 if (!HARD_REGISTER_NUM_P (regno))
1199 regno = reg_renumber[regno];
1200 if (regno >= 0)
1201 for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--)
1202 SET_REGNO_REG_SET (live, regno + i);
1204 return 0;
1207 /* A note_uses callback used by insert_one_insn. Add the hard-register
1208 equivalent of each REG to regset DATA. */
1210 static void
1211 add_used_regs (rtx *loc, void *data)
1213 for_each_rtx (loc, add_used_regs_1, data);
1216 /* Emit a new caller-save insn and set the code. */
1217 static struct insn_chain *
1218 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
1220 rtx insn = chain->insn;
1221 struct insn_chain *new_chain;
1223 #ifdef HAVE_cc0
1224 /* If INSN references CC0, put our insns in front of the insn that sets
1225 CC0. This is always safe, since the only way we could be passed an
1226 insn that references CC0 is for a restore, and doing a restore earlier
1227 isn't a problem. We do, however, assume here that CALL_INSNs don't
1228 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1230 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
1231 && before_p
1232 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
1233 chain = chain->prev, insn = chain->insn;
1234 #endif
1236 new_chain = new_insn_chain ();
1237 if (before_p)
1239 rtx link;
1241 new_chain->prev = chain->prev;
1242 if (new_chain->prev != 0)
1243 new_chain->prev->next = new_chain;
1244 else
1245 reload_insn_chain = new_chain;
1247 chain->prev = new_chain;
1248 new_chain->next = chain;
1249 new_chain->insn = emit_insn_before (pat, insn);
1250 /* ??? It would be nice if we could exclude the already / still saved
1251 registers from the live sets. */
1252 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1253 note_uses (&PATTERN (chain->insn), add_used_regs,
1254 &new_chain->live_throughout);
1255 /* If CHAIN->INSN is a call, then the registers which contain
1256 the arguments to the function are live in the new insn. */
1257 if (CALL_P (chain->insn))
1258 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1259 link != NULL_RTX;
1260 link = XEXP (link, 1))
1261 note_uses (&XEXP (link, 0), add_used_regs,
1262 &new_chain->live_throughout);
1264 CLEAR_REG_SET (&new_chain->dead_or_set);
1265 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
1266 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn;
1268 else
1270 new_chain->next = chain->next;
1271 if (new_chain->next != 0)
1272 new_chain->next->prev = new_chain;
1273 chain->next = new_chain;
1274 new_chain->prev = chain;
1275 new_chain->insn = emit_insn_after (pat, insn);
1276 /* ??? It would be nice if we could exclude the already / still saved
1277 registers from the live sets, and observe REG_UNUSED notes. */
1278 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1279 /* Registers that are set in CHAIN->INSN live in the new insn.
1280 (Unless there is a REG_UNUSED note for them, but we don't
1281 look for them here.) */
1282 note_stores (PATTERN (chain->insn), add_stored_regs,
1283 &new_chain->live_throughout);
1284 CLEAR_REG_SET (&new_chain->dead_or_set);
1285 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
1286 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn;
1288 new_chain->block = chain->block;
1289 new_chain->is_caller_save_insn = 1;
1291 INSN_CODE (new_chain->insn) = code;
1292 return new_chain;
1294 #include "gt-caller-save.h"