2007-01-03 Paul Brook <paul@codesourcery.com>
[official-gcc.git] / gcc / reg-stack.c
blob793c6b58ec4bb34042106a91789f1f2a45ccff53
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
72 * Methodology:
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
78 * asm_operands:
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "toplev.h"
167 #include "recog.h"
168 #include "output.h"
169 #include "basic-block.h"
170 #include "varray.h"
171 #include "reload.h"
172 #include "ggc.h"
173 #include "timevar.h"
174 #include "tree-pass.h"
175 #include "target.h"
176 #include "vecprim.h"
178 #ifdef STACK_REGS
180 /* We use this array to cache info about insns, because otherwise we
181 spend too much time in stack_regs_mentioned_p.
183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
184 the insn uses stack registers, two indicates the insn does not use
185 stack registers. */
186 static VEC(char,heap) *stack_regs_mentioned_data;
188 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
190 int regstack_completed = 0;
192 /* This is the basic stack record. TOP is an index into REG[] such
193 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
195 If TOP is -2, REG[] is not yet initialized. Stack initialization
196 consists of placing each live reg in array `reg' and setting `top'
197 appropriately.
199 REG_SET indicates which registers are live. */
201 typedef struct stack_def
203 int top; /* index to top stack element */
204 HARD_REG_SET reg_set; /* set of live registers */
205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
206 } *stack;
208 /* This is used to carry information about basic blocks. It is
209 attached to the AUX field of the standard CFG block. */
211 typedef struct block_info_def
213 struct stack_def stack_in; /* Input stack configuration. */
214 struct stack_def stack_out; /* Output stack configuration. */
215 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
216 int done; /* True if block already converted. */
217 int predecessors; /* Number of predecessors that need
218 to be visited. */
219 } *block_info;
221 #define BLOCK_INFO(B) ((block_info) (B)->aux)
223 /* Passed to change_stack to indicate where to emit insns. */
224 enum emit_where
226 EMIT_AFTER,
227 EMIT_BEFORE
230 /* The block we're currently working on. */
231 static basic_block current_block;
233 /* In the current_block, whether we're processing the first register
234 stack or call instruction, i.e. the regstack is currently the
235 same as BLOCK_INFO(current_block)->stack_in. */
236 static bool starting_stack_p;
238 /* This is the register file for all register after conversion. */
239 static rtx
240 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
242 #define FP_MODE_REG(regno,mode) \
243 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
245 /* Used to initialize uninitialized registers. */
246 static rtx not_a_num;
248 /* Forward declarations */
250 static int stack_regs_mentioned_p (rtx pat);
251 static void pop_stack (stack, int);
252 static rtx *get_true_reg (rtx *);
254 static int check_asm_stack_operands (rtx);
255 static int get_asm_operand_n_inputs (rtx);
256 static rtx stack_result (tree);
257 static void replace_reg (rtx *, int);
258 static void remove_regno_note (rtx, enum reg_note, unsigned int);
259 static int get_hard_regnum (stack, rtx);
260 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
261 static void swap_to_top(rtx, stack, rtx, rtx);
262 static bool move_for_stack_reg (rtx, stack, rtx);
263 static bool move_nan_for_stack_reg (rtx, stack, rtx);
264 static int swap_rtx_condition_1 (rtx);
265 static int swap_rtx_condition (rtx);
266 static void compare_for_stack_reg (rtx, stack, rtx);
267 static bool subst_stack_regs_pat (rtx, stack, rtx);
268 static void subst_asm_stack_regs (rtx, stack);
269 static bool subst_stack_regs (rtx, stack);
270 static void change_stack (rtx, stack, stack, enum emit_where);
271 static void print_stack (FILE *, stack);
272 static rtx next_flags_user (rtx);
274 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
276 static int
277 stack_regs_mentioned_p (rtx pat)
279 const char *fmt;
280 int i;
282 if (STACK_REG_P (pat))
283 return 1;
285 fmt = GET_RTX_FORMAT (GET_CODE (pat));
286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
288 if (fmt[i] == 'E')
290 int j;
292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
294 return 1;
296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
297 return 1;
300 return 0;
303 /* Return nonzero if INSN mentions stacked registers, else return zero. */
306 stack_regs_mentioned (rtx insn)
308 unsigned int uid, max;
309 int test;
311 if (! INSN_P (insn) || !stack_regs_mentioned_data)
312 return 0;
314 uid = INSN_UID (insn);
315 max = VEC_length (char, stack_regs_mentioned_data);
316 if (uid >= max)
318 /* Allocate some extra size to avoid too many reallocs, but
319 do not grow too quickly. */
320 max = uid + uid / 20 + 1;
321 VEC_safe_grow_cleared (char, heap, stack_regs_mentioned_data, max);
324 test = VEC_index (char, stack_regs_mentioned_data, uid);
325 if (test == 0)
327 /* This insn has yet to be examined. Do so now. */
328 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
329 VEC_replace (char, stack_regs_mentioned_data, uid, test);
332 return test == 1;
335 static rtx ix86_flags_rtx;
337 static rtx
338 next_flags_user (rtx insn)
340 /* Search forward looking for the first use of this value.
341 Stop at block boundaries. */
343 while (insn != BB_END (current_block))
345 insn = NEXT_INSN (insn);
347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
348 return insn;
350 if (CALL_P (insn))
351 return NULL_RTX;
353 return NULL_RTX;
356 /* Reorganize the stack into ascending numbers, before this insn. */
358 static void
359 straighten_stack (rtx insn, stack regstack)
361 struct stack_def temp_stack;
362 int top;
364 /* If there is only a single register on the stack, then the stack is
365 already in increasing order and no reorganization is needed.
367 Similarly if the stack is empty. */
368 if (regstack->top <= 0)
369 return;
371 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
373 for (top = temp_stack.top = regstack->top; top >= 0; top--)
374 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
376 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
379 /* Pop a register from the stack. */
381 static void
382 pop_stack (stack regstack, int regno)
384 int top = regstack->top;
386 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
387 regstack->top--;
388 /* If regno was not at the top of stack then adjust stack. */
389 if (regstack->reg [top] != regno)
391 int i;
392 for (i = regstack->top; i >= 0; i--)
393 if (regstack->reg [i] == regno)
395 int j;
396 for (j = i; j < top; j++)
397 regstack->reg [j] = regstack->reg [j + 1];
398 break;
403 /* Return a pointer to the REG expression within PAT. If PAT is not a
404 REG, possible enclosed by a conversion rtx, return the inner part of
405 PAT that stopped the search. */
407 static rtx *
408 get_true_reg (rtx *pat)
410 for (;;)
411 switch (GET_CODE (*pat))
413 case SUBREG:
414 /* Eliminate FP subregister accesses in favor of the
415 actual FP register in use. */
417 rtx subreg;
418 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
420 int regno_off = subreg_regno_offset (REGNO (subreg),
421 GET_MODE (subreg),
422 SUBREG_BYTE (*pat),
423 GET_MODE (*pat));
424 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
425 GET_MODE (subreg));
426 default:
427 return pat;
430 case FLOAT:
431 case FIX:
432 case FLOAT_EXTEND:
433 pat = & XEXP (*pat, 0);
434 break;
436 case UNSPEC:
437 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP)
438 pat = & XVECEXP (*pat, 0, 0);
439 return pat;
441 case FLOAT_TRUNCATE:
442 if (!flag_unsafe_math_optimizations)
443 return pat;
444 pat = & XEXP (*pat, 0);
445 break;
449 /* Set if we find any malformed asms in a block. */
450 static bool any_malformed_asm;
452 /* There are many rules that an asm statement for stack-like regs must
453 follow. Those rules are explained at the top of this file: the rule
454 numbers below refer to that explanation. */
456 static int
457 check_asm_stack_operands (rtx insn)
459 int i;
460 int n_clobbers;
461 int malformed_asm = 0;
462 rtx body = PATTERN (insn);
464 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
465 char implicitly_dies[FIRST_PSEUDO_REGISTER];
466 int alt;
468 rtx *clobber_reg = 0;
469 int n_inputs, n_outputs;
471 /* Find out what the constraints require. If no constraint
472 alternative matches, this asm is malformed. */
473 extract_insn (insn);
474 constrain_operands (1);
475 alt = which_alternative;
477 preprocess_constraints ();
479 n_inputs = get_asm_operand_n_inputs (body);
480 n_outputs = recog_data.n_operands - n_inputs;
482 if (alt < 0)
484 malformed_asm = 1;
485 /* Avoid further trouble with this insn. */
486 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
487 return 0;
490 /* Strip SUBREGs here to make the following code simpler. */
491 for (i = 0; i < recog_data.n_operands; i++)
492 if (GET_CODE (recog_data.operand[i]) == SUBREG
493 && REG_P (SUBREG_REG (recog_data.operand[i])))
494 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
496 /* Set up CLOBBER_REG. */
498 n_clobbers = 0;
500 if (GET_CODE (body) == PARALLEL)
502 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
504 for (i = 0; i < XVECLEN (body, 0); i++)
505 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
507 rtx clobber = XVECEXP (body, 0, i);
508 rtx reg = XEXP (clobber, 0);
510 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
511 reg = SUBREG_REG (reg);
513 if (STACK_REG_P (reg))
515 clobber_reg[n_clobbers] = reg;
516 n_clobbers++;
521 /* Enforce rule #4: Output operands must specifically indicate which
522 reg an output appears in after an asm. "=f" is not allowed: the
523 operand constraints must select a class with a single reg.
525 Also enforce rule #5: Output operands must start at the top of
526 the reg-stack: output operands may not "skip" a reg. */
528 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
529 for (i = 0; i < n_outputs; i++)
530 if (STACK_REG_P (recog_data.operand[i]))
532 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
534 error_for_asm (insn, "output constraint %d must specify a single register", i);
535 malformed_asm = 1;
537 else
539 int j;
541 for (j = 0; j < n_clobbers; j++)
542 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
544 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
545 i, reg_names [REGNO (clobber_reg[j])]);
546 malformed_asm = 1;
547 break;
549 if (j == n_clobbers)
550 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
555 /* Search for first non-popped reg. */
556 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
557 if (! reg_used_as_output[i])
558 break;
560 /* If there are any other popped regs, that's an error. */
561 for (; i < LAST_STACK_REG + 1; i++)
562 if (reg_used_as_output[i])
563 break;
565 if (i != LAST_STACK_REG + 1)
567 error_for_asm (insn, "output regs must be grouped at top of stack");
568 malformed_asm = 1;
571 /* Enforce rule #2: All implicitly popped input regs must be closer
572 to the top of the reg-stack than any input that is not implicitly
573 popped. */
575 memset (implicitly_dies, 0, sizeof (implicitly_dies));
576 for (i = n_outputs; i < n_outputs + n_inputs; i++)
577 if (STACK_REG_P (recog_data.operand[i]))
579 /* An input reg is implicitly popped if it is tied to an
580 output, or if there is a CLOBBER for it. */
581 int j;
583 for (j = 0; j < n_clobbers; j++)
584 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
585 break;
587 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
588 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
591 /* Search for first non-popped reg. */
592 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
593 if (! implicitly_dies[i])
594 break;
596 /* If there are any other popped regs, that's an error. */
597 for (; i < LAST_STACK_REG + 1; i++)
598 if (implicitly_dies[i])
599 break;
601 if (i != LAST_STACK_REG + 1)
603 error_for_asm (insn,
604 "implicitly popped regs must be grouped at top of stack");
605 malformed_asm = 1;
608 /* Enforce rule #3: If any input operand uses the "f" constraint, all
609 output constraints must use the "&" earlyclobber.
611 ??? Detect this more deterministically by having constrain_asm_operands
612 record any earlyclobber. */
614 for (i = n_outputs; i < n_outputs + n_inputs; i++)
615 if (recog_op_alt[i][alt].matches == -1)
617 int j;
619 for (j = 0; j < n_outputs; j++)
620 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
622 error_for_asm (insn,
623 "output operand %d must use %<&%> constraint", j);
624 malformed_asm = 1;
628 if (malformed_asm)
630 /* Avoid further trouble with this insn. */
631 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
632 any_malformed_asm = true;
633 return 0;
636 return 1;
639 /* Calculate the number of inputs and outputs in BODY, an
640 asm_operands. N_OPERANDS is the total number of operands, and
641 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
642 placed. */
644 static int
645 get_asm_operand_n_inputs (rtx body)
647 switch (GET_CODE (body))
649 case SET:
650 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
651 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
653 case ASM_OPERANDS:
654 return ASM_OPERANDS_INPUT_LENGTH (body);
656 case PARALLEL:
657 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
659 default:
660 gcc_unreachable ();
664 /* If current function returns its result in an fp stack register,
665 return the REG. Otherwise, return 0. */
667 static rtx
668 stack_result (tree decl)
670 rtx result;
672 /* If the value is supposed to be returned in memory, then clearly
673 it is not returned in a stack register. */
674 if (aggregate_value_p (DECL_RESULT (decl), decl))
675 return 0;
677 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
678 if (result != 0)
679 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
680 decl, true);
682 return result != 0 && STACK_REG_P (result) ? result : 0;
687 * This section deals with stack register substitution, and forms the second
688 * pass over the RTL.
691 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
692 the desired hard REGNO. */
694 static void
695 replace_reg (rtx *reg, int regno)
697 gcc_assert (regno >= FIRST_STACK_REG);
698 gcc_assert (regno <= LAST_STACK_REG);
699 gcc_assert (STACK_REG_P (*reg));
701 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
702 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
704 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
707 /* Remove a note of type NOTE, which must be found, for register
708 number REGNO from INSN. Remove only one such note. */
710 static void
711 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
713 rtx *note_link, this;
715 note_link = &REG_NOTES (insn);
716 for (this = *note_link; this; this = XEXP (this, 1))
717 if (REG_NOTE_KIND (this) == note
718 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
720 *note_link = XEXP (this, 1);
721 return;
723 else
724 note_link = &XEXP (this, 1);
726 gcc_unreachable ();
729 /* Find the hard register number of virtual register REG in REGSTACK.
730 The hard register number is relative to the top of the stack. -1 is
731 returned if the register is not found. */
733 static int
734 get_hard_regnum (stack regstack, rtx reg)
736 int i;
738 gcc_assert (STACK_REG_P (reg));
740 for (i = regstack->top; i >= 0; i--)
741 if (regstack->reg[i] == REGNO (reg))
742 break;
744 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
747 /* Emit an insn to pop virtual register REG before or after INSN.
748 REGSTACK is the stack state after INSN and is updated to reflect this
749 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
750 is represented as a SET whose destination is the register to be popped
751 and source is the top of stack. A death note for the top of stack
752 cases the movdf pattern to pop. */
754 static rtx
755 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
757 rtx pop_insn, pop_rtx;
758 int hard_regno;
760 /* For complex types take care to pop both halves. These may survive in
761 CLOBBER and USE expressions. */
762 if (COMPLEX_MODE_P (GET_MODE (reg)))
764 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
765 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
767 pop_insn = NULL_RTX;
768 if (get_hard_regnum (regstack, reg1) >= 0)
769 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
770 if (get_hard_regnum (regstack, reg2) >= 0)
771 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
772 gcc_assert (pop_insn);
773 return pop_insn;
776 hard_regno = get_hard_regnum (regstack, reg);
778 gcc_assert (hard_regno >= FIRST_STACK_REG);
780 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
781 FP_MODE_REG (FIRST_STACK_REG, DFmode));
783 if (where == EMIT_AFTER)
784 pop_insn = emit_insn_after (pop_rtx, insn);
785 else
786 pop_insn = emit_insn_before (pop_rtx, insn);
788 REG_NOTES (pop_insn)
789 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
790 REG_NOTES (pop_insn));
792 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
793 = regstack->reg[regstack->top];
794 regstack->top -= 1;
795 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
797 return pop_insn;
800 /* Emit an insn before or after INSN to swap virtual register REG with
801 the top of stack. REGSTACK is the stack state before the swap, and
802 is updated to reflect the swap. A swap insn is represented as a
803 PARALLEL of two patterns: each pattern moves one reg to the other.
805 If REG is already at the top of the stack, no insn is emitted. */
807 static void
808 emit_swap_insn (rtx insn, stack regstack, rtx reg)
810 int hard_regno;
811 rtx swap_rtx;
812 int tmp, other_reg; /* swap regno temps */
813 rtx i1; /* the stack-reg insn prior to INSN */
814 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
816 hard_regno = get_hard_regnum (regstack, reg);
818 gcc_assert (hard_regno >= FIRST_STACK_REG);
819 if (hard_regno == FIRST_STACK_REG)
820 return;
822 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
824 tmp = regstack->reg[other_reg];
825 regstack->reg[other_reg] = regstack->reg[regstack->top];
826 regstack->reg[regstack->top] = tmp;
828 /* Find the previous insn involving stack regs, but don't pass a
829 block boundary. */
830 i1 = NULL;
831 if (current_block && insn != BB_HEAD (current_block))
833 rtx tmp = PREV_INSN (insn);
834 rtx limit = PREV_INSN (BB_HEAD (current_block));
835 while (tmp != limit)
837 if (LABEL_P (tmp)
838 || CALL_P (tmp)
839 || NOTE_INSN_BASIC_BLOCK_P (tmp)
840 || (NONJUMP_INSN_P (tmp)
841 && stack_regs_mentioned (tmp)))
843 i1 = tmp;
844 break;
846 tmp = PREV_INSN (tmp);
850 if (i1 != NULL_RTX
851 && (i1set = single_set (i1)) != NULL_RTX)
853 rtx i1src = *get_true_reg (&SET_SRC (i1set));
854 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
856 /* If the previous register stack push was from the reg we are to
857 swap with, omit the swap. */
859 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
860 && REG_P (i1src)
861 && REGNO (i1src) == (unsigned) hard_regno - 1
862 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
863 return;
865 /* If the previous insn wrote to the reg we are to swap with,
866 omit the swap. */
868 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
869 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
870 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
871 return;
874 /* Avoid emitting the swap if this is the first register stack insn
875 of the current_block. Instead update the current_block's stack_in
876 and let compensate edges take care of this for us. */
877 if (current_block && starting_stack_p)
879 BLOCK_INFO (current_block)->stack_in = *regstack;
880 starting_stack_p = false;
881 return;
884 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
885 FP_MODE_REG (FIRST_STACK_REG, XFmode));
887 if (i1)
888 emit_insn_after (swap_rtx, i1);
889 else if (current_block)
890 emit_insn_before (swap_rtx, BB_HEAD (current_block));
891 else
892 emit_insn_before (swap_rtx, insn);
895 /* Emit an insns before INSN to swap virtual register SRC1 with
896 the top of stack and virtual register SRC2 with second stack
897 slot. REGSTACK is the stack state before the swaps, and
898 is updated to reflect the swaps. A swap insn is represented as a
899 PARALLEL of two patterns: each pattern moves one reg to the other.
901 If SRC1 and/or SRC2 are already at the right place, no swap insn
902 is emitted. */
904 static void
905 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
907 struct stack_def temp_stack;
908 int regno, j, k, temp;
910 temp_stack = *regstack;
912 /* Place operand 1 at the top of stack. */
913 regno = get_hard_regnum (&temp_stack, src1);
914 gcc_assert (regno >= 0);
915 if (regno != FIRST_STACK_REG)
917 k = temp_stack.top - (regno - FIRST_STACK_REG);
918 j = temp_stack.top;
920 temp = temp_stack.reg[k];
921 temp_stack.reg[k] = temp_stack.reg[j];
922 temp_stack.reg[j] = temp;
925 /* Place operand 2 next on the stack. */
926 regno = get_hard_regnum (&temp_stack, src2);
927 gcc_assert (regno >= 0);
928 if (regno != FIRST_STACK_REG + 1)
930 k = temp_stack.top - (regno - FIRST_STACK_REG);
931 j = temp_stack.top - 1;
933 temp = temp_stack.reg[k];
934 temp_stack.reg[k] = temp_stack.reg[j];
935 temp_stack.reg[j] = temp;
938 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
941 /* Handle a move to or from a stack register in PAT, which is in INSN.
942 REGSTACK is the current stack. Return whether a control flow insn
943 was deleted in the process. */
945 static bool
946 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
948 rtx *psrc = get_true_reg (&SET_SRC (pat));
949 rtx *pdest = get_true_reg (&SET_DEST (pat));
950 rtx src, dest;
951 rtx note;
952 bool control_flow_insn_deleted = false;
954 src = *psrc; dest = *pdest;
956 if (STACK_REG_P (src) && STACK_REG_P (dest))
958 /* Write from one stack reg to another. If SRC dies here, then
959 just change the register mapping and delete the insn. */
961 note = find_regno_note (insn, REG_DEAD, REGNO (src));
962 if (note)
964 int i;
966 /* If this is a no-op move, there must not be a REG_DEAD note. */
967 gcc_assert (REGNO (src) != REGNO (dest));
969 for (i = regstack->top; i >= 0; i--)
970 if (regstack->reg[i] == REGNO (src))
971 break;
973 /* The destination must be dead, or life analysis is borked. */
974 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
976 /* If the source is not live, this is yet another case of
977 uninitialized variables. Load up a NaN instead. */
978 if (i < 0)
979 return move_nan_for_stack_reg (insn, regstack, dest);
981 /* It is possible that the dest is unused after this insn.
982 If so, just pop the src. */
984 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
985 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
986 else
988 regstack->reg[i] = REGNO (dest);
989 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
990 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
993 control_flow_insn_deleted |= control_flow_insn_p (insn);
994 delete_insn (insn);
995 return control_flow_insn_deleted;
998 /* The source reg does not die. */
1000 /* If this appears to be a no-op move, delete it, or else it
1001 will confuse the machine description output patterns. But if
1002 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1003 for REG_UNUSED will not work for deleted insns. */
1005 if (REGNO (src) == REGNO (dest))
1007 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1008 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1010 control_flow_insn_deleted |= control_flow_insn_p (insn);
1011 delete_insn (insn);
1012 return control_flow_insn_deleted;
1015 /* The destination ought to be dead. */
1016 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1018 replace_reg (psrc, get_hard_regnum (regstack, src));
1020 regstack->reg[++regstack->top] = REGNO (dest);
1021 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1022 replace_reg (pdest, FIRST_STACK_REG);
1024 else if (STACK_REG_P (src))
1026 /* Save from a stack reg to MEM, or possibly integer reg. Since
1027 only top of stack may be saved, emit an exchange first if
1028 needs be. */
1030 emit_swap_insn (insn, regstack, src);
1032 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1033 if (note)
1035 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1036 regstack->top--;
1037 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1039 else if ((GET_MODE (src) == XFmode)
1040 && regstack->top < REG_STACK_SIZE - 1)
1042 /* A 387 cannot write an XFmode value to a MEM without
1043 clobbering the source reg. The output code can handle
1044 this by reading back the value from the MEM.
1045 But it is more efficient to use a temp register if one is
1046 available. Push the source value here if the register
1047 stack is not full, and then write the value to memory via
1048 a pop. */
1049 rtx push_rtx;
1050 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1052 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1053 emit_insn_before (push_rtx, insn);
1054 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1055 REG_NOTES (insn));
1058 replace_reg (psrc, FIRST_STACK_REG);
1060 else
1062 gcc_assert (STACK_REG_P (dest));
1064 /* Load from MEM, or possibly integer REG or constant, into the
1065 stack regs. The actual target is always the top of the
1066 stack. The stack mapping is changed to reflect that DEST is
1067 now at top of stack. */
1069 /* The destination ought to be dead. */
1070 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1072 gcc_assert (regstack->top < REG_STACK_SIZE);
1074 regstack->reg[++regstack->top] = REGNO (dest);
1075 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1076 replace_reg (pdest, FIRST_STACK_REG);
1079 return control_flow_insn_deleted;
1082 /* A helper function which replaces INSN with a pattern that loads up
1083 a NaN into DEST, then invokes move_for_stack_reg. */
1085 static bool
1086 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest)
1088 rtx pat;
1090 dest = FP_MODE_REG (REGNO (dest), SFmode);
1091 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1092 PATTERN (insn) = pat;
1093 INSN_CODE (insn) = -1;
1095 return move_for_stack_reg (insn, regstack, pat);
1098 /* Swap the condition on a branch, if there is one. Return true if we
1099 found a condition to swap. False if the condition was not used as
1100 such. */
1102 static int
1103 swap_rtx_condition_1 (rtx pat)
1105 const char *fmt;
1106 int i, r = 0;
1108 if (COMPARISON_P (pat))
1110 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1111 r = 1;
1113 else
1115 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1116 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1118 if (fmt[i] == 'E')
1120 int j;
1122 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1123 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1125 else if (fmt[i] == 'e')
1126 r |= swap_rtx_condition_1 (XEXP (pat, i));
1130 return r;
1133 static int
1134 swap_rtx_condition (rtx insn)
1136 rtx pat = PATTERN (insn);
1138 /* We're looking for a single set to cc0 or an HImode temporary. */
1140 if (GET_CODE (pat) == SET
1141 && REG_P (SET_DEST (pat))
1142 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1144 insn = next_flags_user (insn);
1145 if (insn == NULL_RTX)
1146 return 0;
1147 pat = PATTERN (insn);
1150 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1151 with the cc value right now. We may be able to search for one
1152 though. */
1154 if (GET_CODE (pat) == SET
1155 && GET_CODE (SET_SRC (pat)) == UNSPEC
1156 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1158 rtx dest = SET_DEST (pat);
1160 /* Search forward looking for the first use of this value.
1161 Stop at block boundaries. */
1162 while (insn != BB_END (current_block))
1164 insn = NEXT_INSN (insn);
1165 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1166 break;
1167 if (CALL_P (insn))
1168 return 0;
1171 /* We haven't found it. */
1172 if (insn == BB_END (current_block))
1173 return 0;
1175 /* So we've found the insn using this value. If it is anything
1176 other than sahf or the value does not die (meaning we'd have
1177 to search further), then we must give up. */
1178 pat = PATTERN (insn);
1179 if (GET_CODE (pat) != SET
1180 || GET_CODE (SET_SRC (pat)) != UNSPEC
1181 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1182 || ! dead_or_set_p (insn, dest))
1183 return 0;
1185 /* Now we are prepared to handle this as a normal cc0 setter. */
1186 insn = next_flags_user (insn);
1187 if (insn == NULL_RTX)
1188 return 0;
1189 pat = PATTERN (insn);
1192 if (swap_rtx_condition_1 (pat))
1194 int fail = 0;
1195 INSN_CODE (insn) = -1;
1196 if (recog_memoized (insn) == -1)
1197 fail = 1;
1198 /* In case the flags don't die here, recurse to try fix
1199 following user too. */
1200 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1202 insn = next_flags_user (insn);
1203 if (!insn || !swap_rtx_condition (insn))
1204 fail = 1;
1206 if (fail)
1208 swap_rtx_condition_1 (pat);
1209 return 0;
1211 return 1;
1213 return 0;
1216 /* Handle a comparison. Special care needs to be taken to avoid
1217 causing comparisons that a 387 cannot do correctly, such as EQ.
1219 Also, a pop insn may need to be emitted. The 387 does have an
1220 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1221 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1222 set up. */
1224 static void
1225 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1227 rtx *src1, *src2;
1228 rtx src1_note, src2_note;
1230 src1 = get_true_reg (&XEXP (pat_src, 0));
1231 src2 = get_true_reg (&XEXP (pat_src, 1));
1233 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1234 registers that die in this insn - move those to stack top first. */
1235 if ((! STACK_REG_P (*src1)
1236 || (STACK_REG_P (*src2)
1237 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1238 && swap_rtx_condition (insn))
1240 rtx temp;
1241 temp = XEXP (pat_src, 0);
1242 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1243 XEXP (pat_src, 1) = temp;
1245 src1 = get_true_reg (&XEXP (pat_src, 0));
1246 src2 = get_true_reg (&XEXP (pat_src, 1));
1248 INSN_CODE (insn) = -1;
1251 /* We will fix any death note later. */
1253 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1255 if (STACK_REG_P (*src2))
1256 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1257 else
1258 src2_note = NULL_RTX;
1260 emit_swap_insn (insn, regstack, *src1);
1262 replace_reg (src1, FIRST_STACK_REG);
1264 if (STACK_REG_P (*src2))
1265 replace_reg (src2, get_hard_regnum (regstack, *src2));
1267 if (src1_note)
1269 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1270 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1273 /* If the second operand dies, handle that. But if the operands are
1274 the same stack register, don't bother, because only one death is
1275 needed, and it was just handled. */
1277 if (src2_note
1278 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1279 && REGNO (*src1) == REGNO (*src2)))
1281 /* As a special case, two regs may die in this insn if src2 is
1282 next to top of stack and the top of stack also dies. Since
1283 we have already popped src1, "next to top of stack" is really
1284 at top (FIRST_STACK_REG) now. */
1286 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1287 && src1_note)
1289 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1290 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1292 else
1294 /* The 386 can only represent death of the first operand in
1295 the case handled above. In all other cases, emit a separate
1296 pop and remove the death note from here. */
1298 /* link_cc0_insns (insn); */
1300 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1302 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1303 EMIT_AFTER);
1308 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1309 is the current register layout. Return whether a control flow insn
1310 was deleted in the process. */
1312 static bool
1313 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1315 rtx *dest, *src;
1316 bool control_flow_insn_deleted = false;
1318 switch (GET_CODE (pat))
1320 case USE:
1321 /* Deaths in USE insns can happen in non optimizing compilation.
1322 Handle them by popping the dying register. */
1323 src = get_true_reg (&XEXP (pat, 0));
1324 if (STACK_REG_P (*src)
1325 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1327 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1328 return control_flow_insn_deleted;
1330 /* ??? Uninitialized USE should not happen. */
1331 else
1332 gcc_assert (get_hard_regnum (regstack, *src) != -1);
1333 break;
1335 case CLOBBER:
1337 rtx note;
1339 dest = get_true_reg (&XEXP (pat, 0));
1340 if (STACK_REG_P (*dest))
1342 note = find_reg_note (insn, REG_DEAD, *dest);
1344 if (pat != PATTERN (insn))
1346 /* The fix_truncdi_1 pattern wants to be able to allocate
1347 its own scratch register. It does this by clobbering
1348 an fp reg so that it is assured of an empty reg-stack
1349 register. If the register is live, kill it now.
1350 Remove the DEAD/UNUSED note so we don't try to kill it
1351 later too. */
1353 if (note)
1354 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1355 else
1357 note = find_reg_note (insn, REG_UNUSED, *dest);
1358 gcc_assert (note);
1360 remove_note (insn, note);
1361 replace_reg (dest, FIRST_STACK_REG + 1);
1363 else
1365 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1366 indicates an uninitialized value. Because reload removed
1367 all other clobbers, this must be due to a function
1368 returning without a value. Load up a NaN. */
1370 if (!note)
1372 rtx t = *dest;
1373 if (COMPLEX_MODE_P (GET_MODE (t)))
1375 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1376 if (get_hard_regnum (regstack, u) == -1)
1378 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1379 rtx insn2 = emit_insn_before (pat2, insn);
1380 control_flow_insn_deleted
1381 |= move_nan_for_stack_reg (insn2, regstack, u);
1384 if (get_hard_regnum (regstack, t) == -1)
1385 control_flow_insn_deleted
1386 |= move_nan_for_stack_reg (insn, regstack, t);
1390 break;
1393 case SET:
1395 rtx *src1 = (rtx *) 0, *src2;
1396 rtx src1_note, src2_note;
1397 rtx pat_src;
1399 dest = get_true_reg (&SET_DEST (pat));
1400 src = get_true_reg (&SET_SRC (pat));
1401 pat_src = SET_SRC (pat);
1403 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1404 if (STACK_REG_P (*src)
1405 || (STACK_REG_P (*dest)
1406 && (REG_P (*src) || MEM_P (*src)
1407 || GET_CODE (*src) == CONST_DOUBLE)))
1409 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1410 break;
1413 switch (GET_CODE (pat_src))
1415 case COMPARE:
1416 compare_for_stack_reg (insn, regstack, pat_src);
1417 break;
1419 case CALL:
1421 int count;
1422 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1423 --count >= 0;)
1425 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1426 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1429 replace_reg (dest, FIRST_STACK_REG);
1430 break;
1432 case REG:
1433 /* This is a `tstM2' case. */
1434 gcc_assert (*dest == cc0_rtx);
1435 src1 = src;
1437 /* Fall through. */
1439 case FLOAT_TRUNCATE:
1440 case SQRT:
1441 case ABS:
1442 case NEG:
1443 /* These insns only operate on the top of the stack. DEST might
1444 be cc0_rtx if we're processing a tstM pattern. Also, it's
1445 possible that the tstM case results in a REG_DEAD note on the
1446 source. */
1448 if (src1 == 0)
1449 src1 = get_true_reg (&XEXP (pat_src, 0));
1451 emit_swap_insn (insn, regstack, *src1);
1453 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1455 if (STACK_REG_P (*dest))
1456 replace_reg (dest, FIRST_STACK_REG);
1458 if (src1_note)
1460 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1461 regstack->top--;
1462 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1465 replace_reg (src1, FIRST_STACK_REG);
1466 break;
1468 case MINUS:
1469 case DIV:
1470 /* On i386, reversed forms of subM3 and divM3 exist for
1471 MODE_FLOAT, so the same code that works for addM3 and mulM3
1472 can be used. */
1473 case MULT:
1474 case PLUS:
1475 /* These insns can accept the top of stack as a destination
1476 from a stack reg or mem, or can use the top of stack as a
1477 source and some other stack register (possibly top of stack)
1478 as a destination. */
1480 src1 = get_true_reg (&XEXP (pat_src, 0));
1481 src2 = get_true_reg (&XEXP (pat_src, 1));
1483 /* We will fix any death note later. */
1485 if (STACK_REG_P (*src1))
1486 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1487 else
1488 src1_note = NULL_RTX;
1489 if (STACK_REG_P (*src2))
1490 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1491 else
1492 src2_note = NULL_RTX;
1494 /* If either operand is not a stack register, then the dest
1495 must be top of stack. */
1497 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1498 emit_swap_insn (insn, regstack, *dest);
1499 else
1501 /* Both operands are REG. If neither operand is already
1502 at the top of stack, choose to make the one that is the dest
1503 the new top of stack. */
1505 int src1_hard_regnum, src2_hard_regnum;
1507 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1508 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1509 gcc_assert (src1_hard_regnum != -1);
1510 gcc_assert (src2_hard_regnum != -1);
1512 if (src1_hard_regnum != FIRST_STACK_REG
1513 && src2_hard_regnum != FIRST_STACK_REG)
1514 emit_swap_insn (insn, regstack, *dest);
1517 if (STACK_REG_P (*src1))
1518 replace_reg (src1, get_hard_regnum (regstack, *src1));
1519 if (STACK_REG_P (*src2))
1520 replace_reg (src2, get_hard_regnum (regstack, *src2));
1522 if (src1_note)
1524 rtx src1_reg = XEXP (src1_note, 0);
1526 /* If the register that dies is at the top of stack, then
1527 the destination is somewhere else - merely substitute it.
1528 But if the reg that dies is not at top of stack, then
1529 move the top of stack to the dead reg, as though we had
1530 done the insn and then a store-with-pop. */
1532 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1534 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1535 replace_reg (dest, get_hard_regnum (regstack, *dest));
1537 else
1539 int regno = get_hard_regnum (regstack, src1_reg);
1541 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1542 replace_reg (dest, regno);
1544 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1545 = regstack->reg[regstack->top];
1548 CLEAR_HARD_REG_BIT (regstack->reg_set,
1549 REGNO (XEXP (src1_note, 0)));
1550 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1551 regstack->top--;
1553 else if (src2_note)
1555 rtx src2_reg = XEXP (src2_note, 0);
1556 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1558 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1559 replace_reg (dest, get_hard_regnum (regstack, *dest));
1561 else
1563 int regno = get_hard_regnum (regstack, src2_reg);
1565 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1566 replace_reg (dest, regno);
1568 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1569 = regstack->reg[regstack->top];
1572 CLEAR_HARD_REG_BIT (regstack->reg_set,
1573 REGNO (XEXP (src2_note, 0)));
1574 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1575 regstack->top--;
1577 else
1579 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1580 replace_reg (dest, get_hard_regnum (regstack, *dest));
1583 /* Keep operand 1 matching with destination. */
1584 if (COMMUTATIVE_ARITH_P (pat_src)
1585 && REG_P (*src1) && REG_P (*src2)
1586 && REGNO (*src1) != REGNO (*dest))
1588 int tmp = REGNO (*src1);
1589 replace_reg (src1, REGNO (*src2));
1590 replace_reg (src2, tmp);
1592 break;
1594 case UNSPEC:
1595 switch (XINT (pat_src, 1))
1597 case UNSPEC_FIST:
1599 case UNSPEC_FIST_FLOOR:
1600 case UNSPEC_FIST_CEIL:
1602 /* These insns only operate on the top of the stack. */
1604 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1605 emit_swap_insn (insn, regstack, *src1);
1607 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1609 if (STACK_REG_P (*dest))
1610 replace_reg (dest, FIRST_STACK_REG);
1612 if (src1_note)
1614 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1615 regstack->top--;
1616 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1619 replace_reg (src1, FIRST_STACK_REG);
1620 break;
1622 case UNSPEC_SIN:
1623 case UNSPEC_COS:
1624 case UNSPEC_FRNDINT:
1625 case UNSPEC_F2XM1:
1627 case UNSPEC_FRNDINT_FLOOR:
1628 case UNSPEC_FRNDINT_CEIL:
1629 case UNSPEC_FRNDINT_TRUNC:
1630 case UNSPEC_FRNDINT_MASK_PM:
1632 /* These insns only operate on the top of the stack. */
1634 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1636 emit_swap_insn (insn, regstack, *src1);
1638 /* Input should never die, it is
1639 replaced with output. */
1640 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1641 gcc_assert (!src1_note);
1643 if (STACK_REG_P (*dest))
1644 replace_reg (dest, FIRST_STACK_REG);
1646 replace_reg (src1, FIRST_STACK_REG);
1647 break;
1649 case UNSPEC_FPATAN:
1650 case UNSPEC_FYL2X:
1651 case UNSPEC_FYL2XP1:
1652 /* These insns operate on the top two stack slots. */
1654 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1655 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1657 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1658 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1660 swap_to_top (insn, regstack, *src1, *src2);
1662 replace_reg (src1, FIRST_STACK_REG);
1663 replace_reg (src2, FIRST_STACK_REG + 1);
1665 if (src1_note)
1666 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1667 if (src2_note)
1668 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1670 /* Pop both input operands from the stack. */
1671 CLEAR_HARD_REG_BIT (regstack->reg_set,
1672 regstack->reg[regstack->top]);
1673 CLEAR_HARD_REG_BIT (regstack->reg_set,
1674 regstack->reg[regstack->top - 1]);
1675 regstack->top -= 2;
1677 /* Push the result back onto the stack. */
1678 regstack->reg[++regstack->top] = REGNO (*dest);
1679 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1680 replace_reg (dest, FIRST_STACK_REG);
1681 break;
1683 case UNSPEC_FSCALE_FRACT:
1684 case UNSPEC_FPREM_F:
1685 case UNSPEC_FPREM1_F:
1686 /* These insns operate on the top two stack slots.
1687 first part of double input, double output insn. */
1689 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1690 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1692 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1693 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1695 /* Inputs should never die, they are
1696 replaced with outputs. */
1697 gcc_assert (!src1_note);
1698 gcc_assert (!src2_note);
1700 swap_to_top (insn, regstack, *src1, *src2);
1702 /* Push the result back onto stack. Empty stack slot
1703 will be filled in second part of insn. */
1704 if (STACK_REG_P (*dest))
1706 regstack->reg[regstack->top] = REGNO (*dest);
1707 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1708 replace_reg (dest, FIRST_STACK_REG);
1711 replace_reg (src1, FIRST_STACK_REG);
1712 replace_reg (src2, FIRST_STACK_REG + 1);
1713 break;
1715 case UNSPEC_FSCALE_EXP:
1716 case UNSPEC_FPREM_U:
1717 case UNSPEC_FPREM1_U:
1718 /* These insns operate on the top two stack slots./
1719 second part of double input, double output insn. */
1721 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1722 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1724 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1725 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1727 /* Inputs should never die, they are
1728 replaced with outputs. */
1729 gcc_assert (!src1_note);
1730 gcc_assert (!src2_note);
1732 swap_to_top (insn, regstack, *src1, *src2);
1734 /* Push the result back onto stack. Fill empty slot from
1735 first part of insn and fix top of stack pointer. */
1736 if (STACK_REG_P (*dest))
1738 regstack->reg[regstack->top - 1] = REGNO (*dest);
1739 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1740 replace_reg (dest, FIRST_STACK_REG + 1);
1743 replace_reg (src1, FIRST_STACK_REG);
1744 replace_reg (src2, FIRST_STACK_REG + 1);
1745 break;
1747 case UNSPEC_SINCOS_COS:
1748 case UNSPEC_TAN_ONE:
1749 case UNSPEC_XTRACT_FRACT:
1750 /* These insns operate on the top two stack slots,
1751 first part of one input, double output insn. */
1753 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1755 emit_swap_insn (insn, regstack, *src1);
1757 /* Input should never die, it is
1758 replaced with output. */
1759 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1760 gcc_assert (!src1_note);
1762 /* Push the result back onto stack. Empty stack slot
1763 will be filled in second part of insn. */
1764 if (STACK_REG_P (*dest))
1766 regstack->reg[regstack->top + 1] = REGNO (*dest);
1767 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1768 replace_reg (dest, FIRST_STACK_REG);
1771 replace_reg (src1, FIRST_STACK_REG);
1772 break;
1774 case UNSPEC_SINCOS_SIN:
1775 case UNSPEC_TAN_TAN:
1776 case UNSPEC_XTRACT_EXP:
1777 /* These insns operate on the top two stack slots,
1778 second part of one input, double output insn. */
1780 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1782 emit_swap_insn (insn, regstack, *src1);
1784 /* Input should never die, it is
1785 replaced with output. */
1786 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1787 gcc_assert (!src1_note);
1789 /* Push the result back onto stack. Fill empty slot from
1790 first part of insn and fix top of stack pointer. */
1791 if (STACK_REG_P (*dest))
1793 regstack->reg[regstack->top] = REGNO (*dest);
1794 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1795 replace_reg (dest, FIRST_STACK_REG + 1);
1797 regstack->top++;
1800 replace_reg (src1, FIRST_STACK_REG);
1801 break;
1803 case UNSPEC_SAHF:
1804 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1805 The combination matches the PPRO fcomi instruction. */
1807 pat_src = XVECEXP (pat_src, 0, 0);
1808 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1809 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1810 /* Fall through. */
1812 case UNSPEC_FNSTSW:
1813 /* Combined fcomp+fnstsw generated for doing well with
1814 CSE. When optimizing this would have been broken
1815 up before now. */
1817 pat_src = XVECEXP (pat_src, 0, 0);
1818 gcc_assert (GET_CODE (pat_src) == COMPARE);
1820 compare_for_stack_reg (insn, regstack, pat_src);
1821 break;
1823 default:
1824 gcc_unreachable ();
1826 break;
1828 case IF_THEN_ELSE:
1829 /* This insn requires the top of stack to be the destination. */
1831 src1 = get_true_reg (&XEXP (pat_src, 1));
1832 src2 = get_true_reg (&XEXP (pat_src, 2));
1834 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1835 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1837 /* If the comparison operator is an FP comparison operator,
1838 it is handled correctly by compare_for_stack_reg () who
1839 will move the destination to the top of stack. But if the
1840 comparison operator is not an FP comparison operator, we
1841 have to handle it here. */
1842 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1843 && REGNO (*dest) != regstack->reg[regstack->top])
1845 /* In case one of operands is the top of stack and the operands
1846 dies, it is safe to make it the destination operand by
1847 reversing the direction of cmove and avoid fxch. */
1848 if ((REGNO (*src1) == regstack->reg[regstack->top]
1849 && src1_note)
1850 || (REGNO (*src2) == regstack->reg[regstack->top]
1851 && src2_note))
1853 int idx1 = (get_hard_regnum (regstack, *src1)
1854 - FIRST_STACK_REG);
1855 int idx2 = (get_hard_regnum (regstack, *src2)
1856 - FIRST_STACK_REG);
1858 /* Make reg-stack believe that the operands are already
1859 swapped on the stack */
1860 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1861 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1863 /* Reverse condition to compensate the operand swap.
1864 i386 do have comparison always reversible. */
1865 PUT_CODE (XEXP (pat_src, 0),
1866 reversed_comparison_code (XEXP (pat_src, 0), insn));
1868 else
1869 emit_swap_insn (insn, regstack, *dest);
1873 rtx src_note [3];
1874 int i;
1876 src_note[0] = 0;
1877 src_note[1] = src1_note;
1878 src_note[2] = src2_note;
1880 if (STACK_REG_P (*src1))
1881 replace_reg (src1, get_hard_regnum (regstack, *src1));
1882 if (STACK_REG_P (*src2))
1883 replace_reg (src2, get_hard_regnum (regstack, *src2));
1885 for (i = 1; i <= 2; i++)
1886 if (src_note [i])
1888 int regno = REGNO (XEXP (src_note[i], 0));
1890 /* If the register that dies is not at the top of
1891 stack, then move the top of stack to the dead reg.
1892 Top of stack should never die, as it is the
1893 destination. */
1894 gcc_assert (regno != regstack->reg[regstack->top]);
1895 remove_regno_note (insn, REG_DEAD, regno);
1896 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1897 EMIT_AFTER);
1901 /* Make dest the top of stack. Add dest to regstack if
1902 not present. */
1903 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1904 regstack->reg[++regstack->top] = REGNO (*dest);
1905 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1906 replace_reg (dest, FIRST_STACK_REG);
1907 break;
1909 default:
1910 gcc_unreachable ();
1912 break;
1915 default:
1916 break;
1919 return control_flow_insn_deleted;
1922 /* Substitute hard regnums for any stack regs in INSN, which has
1923 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1924 before the insn, and is updated with changes made here.
1926 There are several requirements and assumptions about the use of
1927 stack-like regs in asm statements. These rules are enforced by
1928 record_asm_stack_regs; see comments there for details. Any
1929 asm_operands left in the RTL at this point may be assume to meet the
1930 requirements, since record_asm_stack_regs removes any problem asm. */
1932 static void
1933 subst_asm_stack_regs (rtx insn, stack regstack)
1935 rtx body = PATTERN (insn);
1936 int alt;
1938 rtx *note_reg; /* Array of note contents */
1939 rtx **note_loc; /* Address of REG field of each note */
1940 enum reg_note *note_kind; /* The type of each note */
1942 rtx *clobber_reg = 0;
1943 rtx **clobber_loc = 0;
1945 struct stack_def temp_stack;
1946 int n_notes;
1947 int n_clobbers;
1948 rtx note;
1949 int i;
1950 int n_inputs, n_outputs;
1952 if (! check_asm_stack_operands (insn))
1953 return;
1955 /* Find out what the constraints required. If no constraint
1956 alternative matches, that is a compiler bug: we should have caught
1957 such an insn in check_asm_stack_operands. */
1958 extract_insn (insn);
1959 constrain_operands (1);
1960 alt = which_alternative;
1962 preprocess_constraints ();
1964 n_inputs = get_asm_operand_n_inputs (body);
1965 n_outputs = recog_data.n_operands - n_inputs;
1967 gcc_assert (alt >= 0);
1969 /* Strip SUBREGs here to make the following code simpler. */
1970 for (i = 0; i < recog_data.n_operands; i++)
1971 if (GET_CODE (recog_data.operand[i]) == SUBREG
1972 && REG_P (SUBREG_REG (recog_data.operand[i])))
1974 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1975 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1978 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1980 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1981 i++;
1983 note_reg = alloca (i * sizeof (rtx));
1984 note_loc = alloca (i * sizeof (rtx *));
1985 note_kind = alloca (i * sizeof (enum reg_note));
1987 n_notes = 0;
1988 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1990 rtx reg = XEXP (note, 0);
1991 rtx *loc = & XEXP (note, 0);
1993 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
1995 loc = & SUBREG_REG (reg);
1996 reg = SUBREG_REG (reg);
1999 if (STACK_REG_P (reg)
2000 && (REG_NOTE_KIND (note) == REG_DEAD
2001 || REG_NOTE_KIND (note) == REG_UNUSED))
2003 note_reg[n_notes] = reg;
2004 note_loc[n_notes] = loc;
2005 note_kind[n_notes] = REG_NOTE_KIND (note);
2006 n_notes++;
2010 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2012 n_clobbers = 0;
2014 if (GET_CODE (body) == PARALLEL)
2016 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2017 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2019 for (i = 0; i < XVECLEN (body, 0); i++)
2020 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2022 rtx clobber = XVECEXP (body, 0, i);
2023 rtx reg = XEXP (clobber, 0);
2024 rtx *loc = & XEXP (clobber, 0);
2026 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2028 loc = & SUBREG_REG (reg);
2029 reg = SUBREG_REG (reg);
2032 if (STACK_REG_P (reg))
2034 clobber_reg[n_clobbers] = reg;
2035 clobber_loc[n_clobbers] = loc;
2036 n_clobbers++;
2041 temp_stack = *regstack;
2043 /* Put the input regs into the desired place in TEMP_STACK. */
2045 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2046 if (STACK_REG_P (recog_data.operand[i])
2047 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2048 FLOAT_REGS)
2049 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2051 /* If an operand needs to be in a particular reg in
2052 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2053 these constraints are for single register classes, and
2054 reload guaranteed that operand[i] is already in that class,
2055 we can just use REGNO (recog_data.operand[i]) to know which
2056 actual reg this operand needs to be in. */
2058 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2060 gcc_assert (regno >= 0);
2062 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2064 /* recog_data.operand[i] is not in the right place. Find
2065 it and swap it with whatever is already in I's place.
2066 K is where recog_data.operand[i] is now. J is where it
2067 should be. */
2068 int j, k, temp;
2070 k = temp_stack.top - (regno - FIRST_STACK_REG);
2071 j = (temp_stack.top
2072 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2074 temp = temp_stack.reg[k];
2075 temp_stack.reg[k] = temp_stack.reg[j];
2076 temp_stack.reg[j] = temp;
2080 /* Emit insns before INSN to make sure the reg-stack is in the right
2081 order. */
2083 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2085 /* Make the needed input register substitutions. Do death notes and
2086 clobbers too, because these are for inputs, not outputs. */
2088 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2089 if (STACK_REG_P (recog_data.operand[i]))
2091 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2093 gcc_assert (regnum >= 0);
2095 replace_reg (recog_data.operand_loc[i], regnum);
2098 for (i = 0; i < n_notes; i++)
2099 if (note_kind[i] == REG_DEAD)
2101 int regnum = get_hard_regnum (regstack, note_reg[i]);
2103 gcc_assert (regnum >= 0);
2105 replace_reg (note_loc[i], regnum);
2108 for (i = 0; i < n_clobbers; i++)
2110 /* It's OK for a CLOBBER to reference a reg that is not live.
2111 Don't try to replace it in that case. */
2112 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2114 if (regnum >= 0)
2116 /* Sigh - clobbers always have QImode. But replace_reg knows
2117 that these regs can't be MODE_INT and will assert. Just put
2118 the right reg there without calling replace_reg. */
2120 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2124 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2126 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2127 if (STACK_REG_P (recog_data.operand[i]))
2129 /* An input reg is implicitly popped if it is tied to an
2130 output, or if there is a CLOBBER for it. */
2131 int j;
2133 for (j = 0; j < n_clobbers; j++)
2134 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2135 break;
2137 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2139 /* recog_data.operand[i] might not be at the top of stack.
2140 But that's OK, because all we need to do is pop the
2141 right number of regs off of the top of the reg-stack.
2142 record_asm_stack_regs guaranteed that all implicitly
2143 popped regs were grouped at the top of the reg-stack. */
2145 CLEAR_HARD_REG_BIT (regstack->reg_set,
2146 regstack->reg[regstack->top]);
2147 regstack->top--;
2151 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2152 Note that there isn't any need to substitute register numbers.
2153 ??? Explain why this is true. */
2155 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2157 /* See if there is an output for this hard reg. */
2158 int j;
2160 for (j = 0; j < n_outputs; j++)
2161 if (STACK_REG_P (recog_data.operand[j])
2162 && REGNO (recog_data.operand[j]) == (unsigned) i)
2164 regstack->reg[++regstack->top] = i;
2165 SET_HARD_REG_BIT (regstack->reg_set, i);
2166 break;
2170 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2171 input that the asm didn't implicitly pop. If the asm didn't
2172 implicitly pop an input reg, that reg will still be live.
2174 Note that we can't use find_regno_note here: the register numbers
2175 in the death notes have already been substituted. */
2177 for (i = 0; i < n_outputs; i++)
2178 if (STACK_REG_P (recog_data.operand[i]))
2180 int j;
2182 for (j = 0; j < n_notes; j++)
2183 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2184 && note_kind[j] == REG_UNUSED)
2186 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2187 EMIT_AFTER);
2188 break;
2192 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2193 if (STACK_REG_P (recog_data.operand[i]))
2195 int j;
2197 for (j = 0; j < n_notes; j++)
2198 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2199 && note_kind[j] == REG_DEAD
2200 && TEST_HARD_REG_BIT (regstack->reg_set,
2201 REGNO (recog_data.operand[i])))
2203 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2204 EMIT_AFTER);
2205 break;
2210 /* Substitute stack hard reg numbers for stack virtual registers in
2211 INSN. Non-stack register numbers are not changed. REGSTACK is the
2212 current stack content. Insns may be emitted as needed to arrange the
2213 stack for the 387 based on the contents of the insn. Return whether
2214 a control flow insn was deleted in the process. */
2216 static bool
2217 subst_stack_regs (rtx insn, stack regstack)
2219 rtx *note_link, note;
2220 bool control_flow_insn_deleted = false;
2221 int i;
2223 if (CALL_P (insn))
2225 int top = regstack->top;
2227 /* If there are any floating point parameters to be passed in
2228 registers for this call, make sure they are in the right
2229 order. */
2231 if (top >= 0)
2233 straighten_stack (insn, regstack);
2235 /* Now mark the arguments as dead after the call. */
2237 while (regstack->top >= 0)
2239 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2240 regstack->top--;
2245 /* Do the actual substitution if any stack regs are mentioned.
2246 Since we only record whether entire insn mentions stack regs, and
2247 subst_stack_regs_pat only works for patterns that contain stack regs,
2248 we must check each pattern in a parallel here. A call_value_pop could
2249 fail otherwise. */
2251 if (stack_regs_mentioned (insn))
2253 int n_operands = asm_noperands (PATTERN (insn));
2254 if (n_operands >= 0)
2256 /* This insn is an `asm' with operands. Decode the operands,
2257 decide how many are inputs, and do register substitution.
2258 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2260 subst_asm_stack_regs (insn, regstack);
2261 return control_flow_insn_deleted;
2264 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2265 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2267 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2269 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2270 XVECEXP (PATTERN (insn), 0, i)
2271 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2272 control_flow_insn_deleted
2273 |= subst_stack_regs_pat (insn, regstack,
2274 XVECEXP (PATTERN (insn), 0, i));
2277 else
2278 control_flow_insn_deleted
2279 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2282 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2283 REG_UNUSED will already have been dealt with, so just return. */
2285 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2286 return control_flow_insn_deleted;
2288 /* If this a noreturn call, we can't insert pop insns after it.
2289 Instead, reset the stack state to empty. */
2290 if (CALL_P (insn)
2291 && find_reg_note (insn, REG_NORETURN, NULL))
2293 regstack->top = -1;
2294 CLEAR_HARD_REG_SET (regstack->reg_set);
2295 return control_flow_insn_deleted;
2298 /* If there is a REG_UNUSED note on a stack register on this insn,
2299 the indicated reg must be popped. The REG_UNUSED note is removed,
2300 since the form of the newly emitted pop insn references the reg,
2301 making it no longer `unset'. */
2303 note_link = &REG_NOTES (insn);
2304 for (note = *note_link; note; note = XEXP (note, 1))
2305 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2307 *note_link = XEXP (note, 1);
2308 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2310 else
2311 note_link = &XEXP (note, 1);
2313 return control_flow_insn_deleted;
2316 /* Change the organization of the stack so that it fits a new basic
2317 block. Some registers might have to be popped, but there can never be
2318 a register live in the new block that is not now live.
2320 Insert any needed insns before or after INSN, as indicated by
2321 WHERE. OLD is the original stack layout, and NEW is the desired
2322 form. OLD is updated to reflect the code emitted, i.e., it will be
2323 the same as NEW upon return.
2325 This function will not preserve block_end[]. But that information
2326 is no longer needed once this has executed. */
2328 static void
2329 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2331 int reg;
2332 int update_end = 0;
2334 /* Stack adjustments for the first insn in a block update the
2335 current_block's stack_in instead of inserting insns directly.
2336 compensate_edges will add the necessary code later. */
2337 if (current_block
2338 && starting_stack_p
2339 && where == EMIT_BEFORE)
2341 BLOCK_INFO (current_block)->stack_in = *new;
2342 starting_stack_p = false;
2343 *old = *new;
2344 return;
2347 /* We will be inserting new insns "backwards". If we are to insert
2348 after INSN, find the next insn, and insert before it. */
2350 if (where == EMIT_AFTER)
2352 if (current_block && BB_END (current_block) == insn)
2353 update_end = 1;
2354 insn = NEXT_INSN (insn);
2357 /* Pop any registers that are not needed in the new block. */
2359 /* If the destination block's stack already has a specified layout
2360 and contains two or more registers, use a more intelligent algorithm
2361 to pop registers that minimizes the number number of fxchs below. */
2362 if (new->top > 0)
2364 bool slots[REG_STACK_SIZE];
2365 int pops[REG_STACK_SIZE];
2366 int next, dest, topsrc;
2368 /* First pass to determine the free slots. */
2369 for (reg = 0; reg <= new->top; reg++)
2370 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]);
2372 /* Second pass to allocate preferred slots. */
2373 topsrc = -1;
2374 for (reg = old->top; reg > new->top; reg--)
2375 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2377 dest = -1;
2378 for (next = 0; next <= new->top; next++)
2379 if (!slots[next] && new->reg[next] == old->reg[reg])
2381 /* If this is a preference for the new top of stack, record
2382 the fact by remembering it's old->reg in topsrc. */
2383 if (next == new->top)
2384 topsrc = reg;
2385 slots[next] = true;
2386 dest = next;
2387 break;
2389 pops[reg] = dest;
2391 else
2392 pops[reg] = reg;
2394 /* Intentionally, avoid placing the top of stack in it's correct
2395 location, if we still need to permute the stack below and we
2396 can usefully place it somewhere else. This is the case if any
2397 slot is still unallocated, in which case we should place the
2398 top of stack there. */
2399 if (topsrc != -1)
2400 for (reg = 0; reg < new->top; reg++)
2401 if (!slots[reg])
2403 pops[topsrc] = reg;
2404 slots[new->top] = false;
2405 slots[reg] = true;
2406 break;
2409 /* Third pass allocates remaining slots and emits pop insns. */
2410 next = new->top;
2411 for (reg = old->top; reg > new->top; reg--)
2413 dest = pops[reg];
2414 if (dest == -1)
2416 /* Find next free slot. */
2417 while (slots[next])
2418 next--;
2419 dest = next--;
2421 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2422 EMIT_BEFORE);
2425 else
2427 /* The following loop attempts to maximize the number of times we
2428 pop the top of the stack, as this permits the use of the faster
2429 ffreep instruction on platforms that support it. */
2430 int live, next;
2432 live = 0;
2433 for (reg = 0; reg <= old->top; reg++)
2434 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2435 live++;
2437 next = live;
2438 while (old->top >= live)
2439 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top]))
2441 while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next]))
2442 next--;
2443 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2444 EMIT_BEFORE);
2446 else
2447 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2448 EMIT_BEFORE);
2451 if (new->top == -2)
2453 /* If the new block has never been processed, then it can inherit
2454 the old stack order. */
2456 new->top = old->top;
2457 memcpy (new->reg, old->reg, sizeof (new->reg));
2459 else
2461 /* This block has been entered before, and we must match the
2462 previously selected stack order. */
2464 /* By now, the only difference should be the order of the stack,
2465 not their depth or liveliness. */
2467 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2468 gcc_unreachable ();
2469 win:
2470 gcc_assert (old->top == new->top);
2472 /* If the stack is not empty (new->top != -1), loop here emitting
2473 swaps until the stack is correct.
2475 The worst case number of swaps emitted is N + 2, where N is the
2476 depth of the stack. In some cases, the reg at the top of
2477 stack may be correct, but swapped anyway in order to fix
2478 other regs. But since we never swap any other reg away from
2479 its correct slot, this algorithm will converge. */
2481 if (new->top != -1)
2484 /* Swap the reg at top of stack into the position it is
2485 supposed to be in, until the correct top of stack appears. */
2487 while (old->reg[old->top] != new->reg[new->top])
2489 for (reg = new->top; reg >= 0; reg--)
2490 if (new->reg[reg] == old->reg[old->top])
2491 break;
2493 gcc_assert (reg != -1);
2495 emit_swap_insn (insn, old,
2496 FP_MODE_REG (old->reg[reg], DFmode));
2499 /* See if any regs remain incorrect. If so, bring an
2500 incorrect reg to the top of stack, and let the while loop
2501 above fix it. */
2503 for (reg = new->top; reg >= 0; reg--)
2504 if (new->reg[reg] != old->reg[reg])
2506 emit_swap_insn (insn, old,
2507 FP_MODE_REG (old->reg[reg], DFmode));
2508 break;
2510 } while (reg >= 0);
2512 /* At this point there must be no differences. */
2514 for (reg = old->top; reg >= 0; reg--)
2515 gcc_assert (old->reg[reg] == new->reg[reg]);
2518 if (update_end)
2519 BB_END (current_block) = PREV_INSN (insn);
2522 /* Print stack configuration. */
2524 static void
2525 print_stack (FILE *file, stack s)
2527 if (! file)
2528 return;
2530 if (s->top == -2)
2531 fprintf (file, "uninitialized\n");
2532 else if (s->top == -1)
2533 fprintf (file, "empty\n");
2534 else
2536 int i;
2537 fputs ("[ ", file);
2538 for (i = 0; i <= s->top; ++i)
2539 fprintf (file, "%d ", s->reg[i]);
2540 fputs ("]\n", file);
2544 /* This function was doing life analysis. We now let the regular live
2545 code do it's job, so we only need to check some extra invariants
2546 that reg-stack expects. Primary among these being that all registers
2547 are initialized before use.
2549 The function returns true when code was emitted to CFG edges and
2550 commit_edge_insertions needs to be called. */
2552 static int
2553 convert_regs_entry (void)
2555 int inserted = 0;
2556 edge e;
2557 edge_iterator ei;
2559 /* Load something into each stack register live at function entry.
2560 Such live registers can be caused by uninitialized variables or
2561 functions not returning values on all paths. In order to keep
2562 the push/pop code happy, and to not scrog the register stack, we
2563 must put something in these registers. Use a QNaN.
2565 Note that we are inserting converted code here. This code is
2566 never seen by the convert_regs pass. */
2568 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2570 basic_block block = e->dest;
2571 block_info bi = BLOCK_INFO (block);
2572 int reg, top = -1;
2574 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2575 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2577 rtx init;
2579 bi->stack_in.reg[++top] = reg;
2581 init = gen_rtx_SET (VOIDmode,
2582 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2583 not_a_num);
2584 insert_insn_on_edge (init, e);
2585 inserted = 1;
2588 bi->stack_in.top = top;
2591 return inserted;
2594 /* Construct the desired stack for function exit. This will either
2595 be `empty', or the function return value at top-of-stack. */
2597 static void
2598 convert_regs_exit (void)
2600 int value_reg_low, value_reg_high;
2601 stack output_stack;
2602 rtx retvalue;
2604 retvalue = stack_result (current_function_decl);
2605 value_reg_low = value_reg_high = -1;
2606 if (retvalue)
2608 value_reg_low = REGNO (retvalue);
2609 value_reg_high = value_reg_low
2610 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2613 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2614 if (value_reg_low == -1)
2615 output_stack->top = -1;
2616 else
2618 int reg;
2620 output_stack->top = value_reg_high - value_reg_low;
2621 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2623 output_stack->reg[value_reg_high - reg] = reg;
2624 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2629 /* Copy the stack info from the end of edge E's source block to the
2630 start of E's destination block. */
2632 static void
2633 propagate_stack (edge e)
2635 stack src_stack = &BLOCK_INFO (e->src)->stack_out;
2636 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2637 int reg;
2639 /* Preserve the order of the original stack, but check whether
2640 any pops are needed. */
2641 dest_stack->top = -1;
2642 for (reg = 0; reg <= src_stack->top; ++reg)
2643 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2644 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2648 /* Adjust the stack of edge E's source block on exit to match the stack
2649 of it's target block upon input. The stack layouts of both blocks
2650 should have been defined by now. */
2652 static bool
2653 compensate_edge (edge e)
2655 basic_block source = e->src, target = e->dest;
2656 stack target_stack = &BLOCK_INFO (target)->stack_in;
2657 stack source_stack = &BLOCK_INFO (source)->stack_out;
2658 struct stack_def regstack;
2659 int reg;
2661 if (dump_file)
2662 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2664 gcc_assert (target_stack->top != -2);
2666 /* Check whether stacks are identical. */
2667 if (target_stack->top == source_stack->top)
2669 for (reg = target_stack->top; reg >= 0; --reg)
2670 if (target_stack->reg[reg] != source_stack->reg[reg])
2671 break;
2673 if (reg == -1)
2675 if (dump_file)
2676 fprintf (dump_file, "no changes needed\n");
2677 return false;
2681 if (dump_file)
2683 fprintf (dump_file, "correcting stack to ");
2684 print_stack (dump_file, target_stack);
2687 /* Abnormal calls may appear to have values live in st(0), but the
2688 abnormal return path will not have actually loaded the values. */
2689 if (e->flags & EDGE_ABNORMAL_CALL)
2691 /* Assert that the lifetimes are as we expect -- one value
2692 live at st(0) on the end of the source block, and no
2693 values live at the beginning of the destination block.
2694 For complex return values, we may have st(1) live as well. */
2695 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2696 gcc_assert (target_stack->top == -1);
2697 return false;
2700 /* Handle non-call EH edges specially. The normal return path have
2701 values in registers. These will be popped en masse by the unwind
2702 library. */
2703 if (e->flags & EDGE_EH)
2705 gcc_assert (target_stack->top == -1);
2706 return false;
2709 /* We don't support abnormal edges. Global takes care to
2710 avoid any live register across them, so we should never
2711 have to insert instructions on such edges. */
2712 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2714 /* Make a copy of source_stack as change_stack is destructive. */
2715 regstack = *source_stack;
2717 /* It is better to output directly to the end of the block
2718 instead of to the edge, because emit_swap can do minimal
2719 insn scheduling. We can do this when there is only one
2720 edge out, and it is not abnormal. */
2721 if (EDGE_COUNT (source->succs) == 1)
2723 current_block = source;
2724 change_stack (BB_END (source), &regstack, target_stack,
2725 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2727 else
2729 rtx seq, after;
2731 current_block = NULL;
2732 start_sequence ();
2734 /* ??? change_stack needs some point to emit insns after. */
2735 after = emit_note (NOTE_INSN_DELETED);
2737 change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2739 seq = get_insns ();
2740 end_sequence ();
2742 insert_insn_on_edge (seq, e);
2743 return true;
2745 return false;
2748 /* Traverse all non-entry edges in the CFG, and emit the necessary
2749 edge compensation code to change the stack from stack_out of the
2750 source block to the stack_in of the destination block. */
2752 static bool
2753 compensate_edges (void)
2755 bool inserted = false;
2756 basic_block bb;
2758 starting_stack_p = false;
2760 FOR_EACH_BB (bb)
2761 if (bb != ENTRY_BLOCK_PTR)
2763 edge e;
2764 edge_iterator ei;
2766 FOR_EACH_EDGE (e, ei, bb->succs)
2767 inserted |= compensate_edge (e);
2769 return inserted;
2772 /* Select the better of two edges E1 and E2 to use to determine the
2773 stack layout for their shared destination basic block. This is
2774 typically the more frequently executed. The edge E1 may be NULL
2775 (in which case E2 is returned), but E2 is always non-NULL. */
2777 static edge
2778 better_edge (edge e1, edge e2)
2780 if (!e1)
2781 return e2;
2783 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2784 return e1;
2785 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2786 return e2;
2788 if (e1->count > e2->count)
2789 return e1;
2790 if (e1->count < e2->count)
2791 return e2;
2793 /* Prefer critical edges to minimize inserting compensation code on
2794 critical edges. */
2796 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2797 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2799 /* Avoid non-deterministic behavior. */
2800 return (e1->src->index < e2->src->index) ? e1 : e2;
2803 /* Convert stack register references in one block. */
2805 static void
2806 convert_regs_1 (basic_block block)
2808 struct stack_def regstack;
2809 block_info bi = BLOCK_INFO (block);
2810 int reg;
2811 rtx insn, next;
2812 bool control_flow_insn_deleted = false;
2814 any_malformed_asm = false;
2816 /* Choose an initial stack layout, if one hasn't already been chosen. */
2817 if (bi->stack_in.top == -2)
2819 edge e, beste = NULL;
2820 edge_iterator ei;
2822 /* Select the best incoming edge (typically the most frequent) to
2823 use as a template for this basic block. */
2824 FOR_EACH_EDGE (e, ei, block->preds)
2825 if (BLOCK_INFO (e->src)->done)
2826 beste = better_edge (beste, e);
2828 if (beste)
2829 propagate_stack (beste);
2830 else
2832 /* No predecessors. Create an arbitrary input stack. */
2833 bi->stack_in.top = -1;
2834 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2835 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2836 bi->stack_in.reg[++bi->stack_in.top] = reg;
2840 if (dump_file)
2842 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2843 print_stack (dump_file, &bi->stack_in);
2846 /* Process all insns in this block. Keep track of NEXT so that we
2847 don't process insns emitted while substituting in INSN. */
2848 current_block = block;
2849 next = BB_HEAD (block);
2850 regstack = bi->stack_in;
2851 starting_stack_p = true;
2855 insn = next;
2856 next = NEXT_INSN (insn);
2858 /* Ensure we have not missed a block boundary. */
2859 gcc_assert (next);
2860 if (insn == BB_END (block))
2861 next = NULL;
2863 /* Don't bother processing unless there is a stack reg
2864 mentioned or if it's a CALL_INSN. */
2865 if (stack_regs_mentioned (insn)
2866 || CALL_P (insn))
2868 if (dump_file)
2870 fprintf (dump_file, " insn %d input stack: ",
2871 INSN_UID (insn));
2872 print_stack (dump_file, &regstack);
2874 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2875 starting_stack_p = false;
2878 while (next);
2880 if (dump_file)
2882 fprintf (dump_file, "Expected live registers [");
2883 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2884 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2885 fprintf (dump_file, " %d", reg);
2886 fprintf (dump_file, " ]\nOutput stack: ");
2887 print_stack (dump_file, &regstack);
2890 insn = BB_END (block);
2891 if (JUMP_P (insn))
2892 insn = PREV_INSN (insn);
2894 /* If the function is declared to return a value, but it returns one
2895 in only some cases, some registers might come live here. Emit
2896 necessary moves for them. */
2898 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2900 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2901 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2903 rtx set;
2905 if (dump_file)
2906 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
2908 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
2909 insn = emit_insn_after (set, insn);
2910 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2914 /* Amongst the insns possibly deleted during the substitution process above,
2915 might have been the only trapping insn in the block. We purge the now
2916 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2917 called at the end of convert_regs. The order in which we process the
2918 blocks ensures that we never delete an already processed edge.
2920 Note that, at this point, the CFG may have been damaged by the emission
2921 of instructions after an abnormal call, which moves the basic block end
2922 (and is the reason why we call fixup_abnormal_edges later). So we must
2923 be sure that the trapping insn has been deleted before trying to purge
2924 dead edges, otherwise we risk purging valid edges.
2926 ??? We are normally supposed not to delete trapping insns, so we pretend
2927 that the insns deleted above don't actually trap. It would have been
2928 better to detect this earlier and avoid creating the EH edge in the first
2929 place, still, but we don't have enough information at that time. */
2931 if (control_flow_insn_deleted)
2932 purge_dead_edges (block);
2934 /* Something failed if the stack lives don't match. If we had malformed
2935 asms, we zapped the instruction itself, but that didn't produce the
2936 same pattern of register kills as before. */
2937 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2938 gcc_assert (any_malformed_asm);
2939 win:
2940 bi->stack_out = regstack;
2941 bi->done = true;
2944 /* Convert registers in all blocks reachable from BLOCK. */
2946 static void
2947 convert_regs_2 (basic_block block)
2949 basic_block *stack, *sp;
2951 /* We process the blocks in a top-down manner, in a way such that one block
2952 is only processed after all its predecessors. The number of predecessors
2953 of every block has already been computed. */
2955 stack = XNEWVEC (basic_block, n_basic_blocks);
2956 sp = stack;
2958 *sp++ = block;
2962 edge e;
2963 edge_iterator ei;
2965 block = *--sp;
2967 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2968 some dead EH outgoing edge after the deletion of the trapping
2969 insn inside the block. Since the number of predecessors of
2970 BLOCK's successors was computed based on the initial edge set,
2971 we check the necessity to process some of these successors
2972 before such an edge deletion may happen. However, there is
2973 a pitfall: if BLOCK is the only predecessor of a successor and
2974 the edge between them happens to be deleted, the successor
2975 becomes unreachable and should not be processed. The problem
2976 is that there is no way to preventively detect this case so we
2977 stack the successor in all cases and hand over the task of
2978 fixing up the discrepancy to convert_regs_1. */
2980 FOR_EACH_EDGE (e, ei, block->succs)
2981 if (! (e->flags & EDGE_DFS_BACK))
2983 BLOCK_INFO (e->dest)->predecessors--;
2984 if (!BLOCK_INFO (e->dest)->predecessors)
2985 *sp++ = e->dest;
2988 convert_regs_1 (block);
2990 while (sp != stack);
2992 free (stack);
2995 /* Traverse all basic blocks in a function, converting the register
2996 references in each insn from the "flat" register file that gcc uses,
2997 to the stack-like registers the 387 uses. */
2999 static void
3000 convert_regs (void)
3002 int inserted;
3003 basic_block b;
3004 edge e;
3005 edge_iterator ei;
3007 /* Initialize uninitialized registers on function entry. */
3008 inserted = convert_regs_entry ();
3010 /* Construct the desired stack for function exit. */
3011 convert_regs_exit ();
3012 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3014 /* ??? Future: process inner loops first, and give them arbitrary
3015 initial stacks which emit_swap_insn can modify. This ought to
3016 prevent double fxch that often appears at the head of a loop. */
3018 /* Process all blocks reachable from all entry points. */
3019 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3020 convert_regs_2 (e->dest);
3022 /* ??? Process all unreachable blocks. Though there's no excuse
3023 for keeping these even when not optimizing. */
3024 FOR_EACH_BB (b)
3026 block_info bi = BLOCK_INFO (b);
3028 if (! bi->done)
3029 convert_regs_2 (b);
3032 inserted |= compensate_edges ();
3034 clear_aux_for_blocks ();
3036 fixup_abnormal_edges ();
3037 if (inserted)
3038 commit_edge_insertions ();
3040 if (dump_file)
3041 fputc ('\n', dump_file);
3044 /* Convert register usage from "flat" register file usage to a "stack
3045 register file. FILE is the dump file, if used.
3047 Construct a CFG and run life analysis. Then convert each insn one
3048 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3049 code duplication created when the converter inserts pop insns on
3050 the edges. */
3052 static bool
3053 reg_to_stack (void)
3055 basic_block bb;
3056 int i;
3057 int max_uid;
3059 /* Clean up previous run. */
3060 if (stack_regs_mentioned_data != NULL)
3061 VEC_free (char, heap, stack_regs_mentioned_data);
3063 /* See if there is something to do. Flow analysis is quite
3064 expensive so we might save some compilation time. */
3065 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3066 if (regs_ever_live[i])
3067 break;
3068 if (i > LAST_STACK_REG)
3069 return false;
3071 /* Ok, floating point instructions exist. If not optimizing,
3072 build the CFG and run life analysis.
3073 Also need to rebuild life when superblock scheduling is done
3074 as it don't update liveness yet. */
3075 if (!optimize
3076 || ((flag_sched2_use_superblocks || flag_sched2_use_traces)
3077 && flag_schedule_insns_after_reload))
3079 count_or_remove_death_notes (NULL, 1);
3080 life_analysis (PROP_DEATH_NOTES);
3082 mark_dfs_back_edges ();
3084 /* Set up block info for each basic block. */
3085 alloc_aux_for_blocks (sizeof (struct block_info_def));
3086 FOR_EACH_BB (bb)
3088 block_info bi = BLOCK_INFO (bb);
3089 edge_iterator ei;
3090 edge e;
3091 int reg;
3093 FOR_EACH_EDGE (e, ei, bb->preds)
3094 if (!(e->flags & EDGE_DFS_BACK)
3095 && e->src != ENTRY_BLOCK_PTR)
3096 bi->predecessors++;
3098 /* Set current register status at last instruction `uninitialized'. */
3099 bi->stack_in.top = -2;
3101 /* Copy live_at_end and live_at_start into temporaries. */
3102 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3104 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_end, reg))
3105 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3106 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, reg))
3107 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3111 /* Create the replacement registers up front. */
3112 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3114 enum machine_mode mode;
3115 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3116 mode != VOIDmode;
3117 mode = GET_MODE_WIDER_MODE (mode))
3118 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3119 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3120 mode != VOIDmode;
3121 mode = GET_MODE_WIDER_MODE (mode))
3122 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3125 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3127 /* A QNaN for initializing uninitialized variables.
3129 ??? We can't load from constant memory in PIC mode, because
3130 we're inserting these instructions before the prologue and
3131 the PIC register hasn't been set up. In that case, fall back
3132 on zero, which we can get from `ldz'. */
3134 if (flag_pic)
3135 not_a_num = CONST0_RTX (SFmode);
3136 else
3138 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
3139 not_a_num = force_const_mem (SFmode, not_a_num);
3142 /* Allocate a cache for stack_regs_mentioned. */
3143 max_uid = get_max_uid ();
3144 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1);
3145 memset (VEC_address (char, stack_regs_mentioned_data),
3146 0, sizeof (char) * max_uid + 1);
3148 convert_regs ();
3150 free_aux_for_blocks ();
3151 return true;
3153 #endif /* STACK_REGS */
3155 static bool
3156 gate_handle_stack_regs (void)
3158 #ifdef STACK_REGS
3159 return 1;
3160 #else
3161 return 0;
3162 #endif
3165 /* Convert register usage from flat register file usage to a stack
3166 register file. */
3167 static unsigned int
3168 rest_of_handle_stack_regs (void)
3170 #ifdef STACK_REGS
3171 if (reg_to_stack () && optimize)
3173 regstack_completed = 1;
3174 if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK
3175 | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0))
3176 && (flag_reorder_blocks || flag_reorder_blocks_and_partition))
3178 reorder_basic_blocks (0);
3179 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK);
3182 else
3183 regstack_completed = 1;
3184 #endif
3185 return 0;
3188 struct tree_opt_pass pass_stack_regs =
3190 "stack", /* name */
3191 gate_handle_stack_regs, /* gate */
3192 rest_of_handle_stack_regs, /* execute */
3193 NULL, /* sub */
3194 NULL, /* next */
3195 0, /* static_pass_number */
3196 TV_REG_STACK, /* tv_id */
3197 0, /* properties_required */
3198 0, /* properties_provided */
3199 0, /* properties_destroyed */
3200 0, /* todo_flags_start */
3201 TODO_dump_func |
3202 TODO_ggc_collect, /* todo_flags_finish */
3203 'k' /* letter */