1 /* Decompose multiword subregs.
2 Copyright (C) 2007 Free Software Foundation, Inc.
3 Contributed by Richard Henderson <rth@redhat.com>
4 Ian Lance Taylor <iant@google.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
25 #include "coretypes.h"
32 #include "insn-config.h"
34 #include "basic-block.h"
39 #include "tree-pass.h"
41 #ifdef STACK_GROWS_DOWNWARD
42 # undef STACK_GROWS_DOWNWARD
43 # define STACK_GROWS_DOWNWARD 1
45 # define STACK_GROWS_DOWNWARD 0
49 DEF_VEC_ALLOC_P (bitmap
,heap
);
51 /* Decompose multi-word pseudo-registers into individual
52 pseudo-registers when possible. This is possible when all the uses
53 of a multi-word register are via SUBREG, or are copies of the
54 register to another location. Breaking apart the register permits
55 more CSE and permits better register allocation. */
57 /* Bit N in this bitmap is set if regno N is used in a context in
58 which we can decompose it. */
59 static bitmap decomposable_context
;
61 /* Bit N in this bitmap is set if regno N is used in a context in
62 which it can not be decomposed. */
63 static bitmap non_decomposable_context
;
65 /* Bit N in the bitmap in element M of this array is set if there is a
66 copy from reg M to reg N. */
67 static VEC(bitmap
,heap
) *reg_copy_graph
;
69 /* If INSN is a single set between two objects, return the single set.
70 Such an insn can always be decomposed. INSN should have been
71 passed to recog and extract_insn before this is called. */
74 simple_move (rtx insn
)
78 enum machine_mode mode
;
80 if (recog_data
.n_operands
!= 2)
83 set
= single_set (insn
);
88 if (x
!= recog_data
.operand
[0] && x
!= recog_data
.operand
[1])
90 if (GET_CODE (x
) == SUBREG
)
95 && (MEM_VOLATILE_P (x
)
96 || mode_dependent_address_p (XEXP (x
, 0))))
100 if (x
!= recog_data
.operand
[0] && x
!= recog_data
.operand
[1])
102 if (GET_CODE (x
) == SUBREG
)
104 if (!OBJECT_P (x
) && GET_CODE (x
) != ASM_OPERANDS
)
107 && (MEM_VOLATILE_P (x
)
108 || mode_dependent_address_p (XEXP (x
, 0))))
111 /* We try to decompose in integer modes, to avoid generating
112 inefficient code copying between integer and floating point
113 registers. That means that we can't decompose if this is a
114 non-integer mode for which there is no integer mode of the same
116 mode
= GET_MODE (SET_SRC (set
));
117 if (!SCALAR_INT_MODE_P (mode
)
118 && (mode_for_size (GET_MODE_SIZE (mode
) * BITS_PER_UNIT
, MODE_INT
, 0)
125 /* If SET is a copy from one multi-word pseudo-register to another,
126 record that in reg_copy_graph. Return whether it is such a
130 find_pseudo_copy (rtx set
)
132 rtx dest
= SET_DEST (set
);
133 rtx src
= SET_SRC (set
);
137 if (!REG_P (dest
) || !REG_P (src
))
142 if (HARD_REGISTER_NUM_P (rd
) || HARD_REGISTER_NUM_P (rs
))
145 if (GET_MODE_SIZE (GET_MODE (dest
)) <= UNITS_PER_WORD
)
148 b
= VEC_index (bitmap
, reg_copy_graph
, rs
);
151 b
= BITMAP_ALLOC (NULL
);
152 VEC_replace (bitmap
, reg_copy_graph
, rs
, b
);
155 bitmap_set_bit (b
, rd
);
160 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case
161 where they are copied to another register, add the register to
162 which they are copied to DECOMPOSABLE_CONTEXT. Use
163 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track
164 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */
167 propagate_pseudo_copies (void)
169 bitmap queue
, propagate
;
171 queue
= BITMAP_ALLOC (NULL
);
172 propagate
= BITMAP_ALLOC (NULL
);
174 bitmap_copy (queue
, decomposable_context
);
177 bitmap_iterator iter
;
180 bitmap_clear (propagate
);
182 EXECUTE_IF_SET_IN_BITMAP (queue
, 0, i
, iter
)
184 bitmap b
= VEC_index (bitmap
, reg_copy_graph
, i
);
186 bitmap_ior_and_compl_into (propagate
, b
, non_decomposable_context
);
189 bitmap_and_compl (queue
, propagate
, decomposable_context
);
190 bitmap_ior_into (decomposable_context
, propagate
);
192 while (!bitmap_empty_p (queue
));
195 BITMAP_FREE (propagate
);
198 /* A pointer to one of these values is passed to
199 find_decomposable_subregs via for_each_rtx. */
201 enum classify_move_insn
203 /* Not a simple move from one location to another. */
205 /* A simple move from one pseudo-register to another with no
207 SIMPLE_PSEUDO_REG_MOVE
,
208 /* A simple move involving a non-pseudo-register, or from one
209 pseudo-register to another with a REG_RETVAL note. */
213 /* This is called via for_each_rtx. If we find a SUBREG which we
214 could use to decompose a pseudo-register, set a bit in
215 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is
216 not a simple pseudo-register copy, DATA will point at the type of
217 move, and we set a bit in DECOMPOSABLE_CONTEXT or
218 NON_DECOMPOSABLE_CONTEXT as appropriate. */
221 find_decomposable_subregs (rtx
*px
, void *data
)
223 enum classify_move_insn
*pcmi
= (enum classify_move_insn
*) data
;
229 if (GET_CODE (x
) == SUBREG
)
231 rtx inner
= SUBREG_REG (x
);
232 unsigned int regno
, outer_size
, inner_size
, outer_words
, inner_words
;
237 regno
= REGNO (inner
);
238 if (HARD_REGISTER_NUM_P (regno
))
241 outer_size
= GET_MODE_SIZE (GET_MODE (x
));
242 inner_size
= GET_MODE_SIZE (GET_MODE (inner
));
243 outer_words
= (outer_size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
244 inner_words
= (inner_size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
246 /* We only try to decompose single word subregs of multi-word
247 registers. When we find one, we return -1 to avoid iterating
248 over the inner register.
250 ??? This doesn't allow, e.g., DImode subregs of TImode values
251 on 32-bit targets. We would need to record the way the
252 pseudo-register was used, and only decompose if all the uses
253 were the same number and size of pieces. Hopefully this
254 doesn't happen much. */
256 if (outer_words
== 1 && inner_words
> 1)
258 bitmap_set_bit (decomposable_context
, regno
);
262 else if (GET_CODE (x
) == REG
)
266 /* We will see an outer SUBREG before we see the inner REG, so
267 when we see a plain REG here it means a direct reference to
270 If this is not a simple copy from one location to another,
271 then we can not decompose this register. If this is a simple
272 copy from one pseudo-register to another, with no REG_RETVAL
273 note, and the mode is right, then we mark the register as
274 decomposable. Otherwise we don't say anything about this
275 register--it could be decomposed, but whether that would be
276 profitable depends upon how it is used elsewhere.
278 We only set bits in the bitmap for multi-word
279 pseudo-registers, since those are the only ones we care about
280 and it keeps the size of the bitmaps down. */
283 if (!HARD_REGISTER_NUM_P (regno
)
284 && GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
288 case NOT_SIMPLE_MOVE
:
289 bitmap_set_bit (non_decomposable_context
, regno
);
291 case SIMPLE_PSEUDO_REG_MOVE
:
292 if (MODES_TIEABLE_P (GET_MODE (x
), word_mode
))
293 bitmap_set_bit (decomposable_context
, regno
);
306 /* Decompose REGNO into word-sized components. We smash the REG node
307 in place. This ensures that (1) something goes wrong quickly if we
308 fail to make some replacement, and (2) the debug information inside
309 the symbol table is automatically kept up to date. */
312 decompose_register (unsigned int regno
)
315 unsigned int words
, i
;
318 reg
= regno_reg_rtx
[regno
];
320 regno_reg_rtx
[regno
] = NULL_RTX
;
321 clear_reg_info_regno (regno
);
323 words
= GET_MODE_SIZE (GET_MODE (reg
));
324 words
= (words
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
326 v
= rtvec_alloc (words
);
327 for (i
= 0; i
< words
; ++i
)
328 RTVEC_ELT (v
, i
) = gen_reg_rtx_offset (reg
, word_mode
, i
* UNITS_PER_WORD
);
330 PUT_CODE (reg
, CONCATN
);
335 fprintf (dump_file
, "; Splitting reg %u ->", regno
);
336 for (i
= 0; i
< words
; ++i
)
337 fprintf (dump_file
, " %u", REGNO (XVECEXP (reg
, 0, i
)));
338 fputc ('\n', dump_file
);
342 /* Get a SUBREG of a CONCATN. */
345 simplify_subreg_concatn (enum machine_mode outermode
, rtx op
,
348 unsigned int inner_size
;
349 enum machine_mode innermode
;
351 unsigned int final_offset
;
353 gcc_assert (GET_CODE (op
) == CONCATN
);
354 gcc_assert (byte
% GET_MODE_SIZE (outermode
) == 0);
356 innermode
= GET_MODE (op
);
357 gcc_assert (byte
< GET_MODE_SIZE (innermode
));
358 gcc_assert (GET_MODE_SIZE (outermode
) <= GET_MODE_SIZE (innermode
));
360 inner_size
= GET_MODE_SIZE (innermode
) / XVECLEN (op
, 0);
361 part
= XVECEXP (op
, 0, byte
/ inner_size
);
362 final_offset
= byte
% inner_size
;
363 if (final_offset
+ GET_MODE_SIZE (outermode
) > inner_size
)
366 return simplify_gen_subreg (outermode
, part
, GET_MODE (part
), final_offset
);
369 /* Wrapper around simplify_gen_subreg which handles CONCATN. */
372 simplify_gen_subreg_concatn (enum machine_mode outermode
, rtx op
,
373 enum machine_mode innermode
, unsigned int byte
)
377 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN.
378 If OP is a SUBREG of a CONCATN, then it must be a simple mode
379 change with the same size and offset 0, or it must extract a
380 part. We shouldn't see anything else here. */
381 if (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == CONCATN
)
385 if ((GET_MODE_SIZE (GET_MODE (op
))
386 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))))
387 && SUBREG_BYTE (op
) == 0)
388 return simplify_gen_subreg_concatn (outermode
, SUBREG_REG (op
),
389 GET_MODE (SUBREG_REG (op
)), byte
);
391 op2
= simplify_subreg_concatn (GET_MODE (op
), SUBREG_REG (op
),
395 /* We don't handle paradoxical subregs here. */
396 gcc_assert (GET_MODE_SIZE (outermode
)
397 <= GET_MODE_SIZE (GET_MODE (op
)));
398 gcc_assert (GET_MODE_SIZE (GET_MODE (op
))
399 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
))));
400 op2
= simplify_subreg_concatn (outermode
, SUBREG_REG (op
),
401 byte
+ SUBREG_BYTE (op
));
402 gcc_assert (op2
!= NULL_RTX
);
407 gcc_assert (op
!= NULL_RTX
);
408 gcc_assert (innermode
== GET_MODE (op
));
411 if (GET_CODE (op
) == CONCATN
)
412 return simplify_subreg_concatn (outermode
, op
, byte
);
414 ret
= simplify_gen_subreg (outermode
, op
, innermode
, byte
);
416 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then
417 resolve_simple_move will ask for the high part of the paradoxical
418 subreg, which does not have a value. Just return a zero. */
420 && GET_CODE (op
) == SUBREG
421 && SUBREG_BYTE (op
) == 0
422 && (GET_MODE_SIZE (innermode
)
423 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op
)))))
424 return CONST0_RTX (outermode
);
426 gcc_assert (ret
!= NULL_RTX
);
430 /* Return whether we should resolve X into the registers into which it
434 resolve_reg_p (rtx x
)
436 return GET_CODE (x
) == CONCATN
;
439 /* Return whether X is a SUBREG of a register which we need to
443 resolve_subreg_p (rtx x
)
445 if (GET_CODE (x
) != SUBREG
)
447 return resolve_reg_p (SUBREG_REG (x
));
450 /* This is called via for_each_rtx. Look for SUBREGs which need to be
454 resolve_subreg_use (rtx
*px
, void *data
)
456 rtx insn
= (rtx
) data
;
462 if (resolve_subreg_p (x
))
464 x
= simplify_subreg_concatn (GET_MODE (x
), SUBREG_REG (x
),
467 /* It is possible for a note to contain a reference which we can
468 decompose. In this case, return 1 to the caller to indicate
469 that the note must be removed. */
476 validate_change (insn
, px
, x
, 1);
480 if (resolve_reg_p (x
))
482 /* Return 1 to the caller to indicate that we found a direct
483 reference to a register which is being decomposed. This can
484 happen inside notes. */
492 /* If there is a REG_LIBCALL note on OLD_START, move it to NEW_START,
493 and link the corresponding REG_RETVAL note to NEW_START. */
496 move_libcall_note (rtx old_start
, rtx new_start
)
498 rtx note0
, note1
, end
;
500 note0
= find_reg_note (old_start
, REG_LIBCALL
, NULL
);
501 if (note0
== NULL_RTX
)
504 remove_note (old_start
, note0
);
505 end
= XEXP (note0
, 0);
506 note1
= find_reg_note (end
, REG_RETVAL
, NULL
);
508 XEXP (note0
, 1) = REG_NOTES (new_start
);
509 REG_NOTES (new_start
) = note0
;
510 XEXP (note1
, 0) = new_start
;
513 /* Remove any REG_RETVAL note, the corresponding REG_LIBCALL note, and
514 any markers for a no-conflict block. We have decomposed the
515 registers so the non-conflict is now obvious. */
518 remove_retval_note (rtx insn1
)
520 rtx note0
, insn0
, note1
, insn
;
522 note1
= find_reg_note (insn1
, REG_RETVAL
, NULL
);
523 if (note1
== NULL_RTX
)
526 insn0
= XEXP (note1
, 0);
527 note0
= find_reg_note (insn0
, REG_LIBCALL
, NULL
);
529 remove_note (insn0
, note0
);
530 remove_note (insn1
, note1
);
532 for (insn
= insn0
; insn
!= insn1
; insn
= NEXT_INSN (insn
))
538 note
= find_reg_note (insn
, REG_NO_CONFLICT
, NULL
);
539 if (note
== NULL_RTX
)
541 remove_note (insn
, note
);
546 /* Resolve any decomposed registers which appear in register notes on
550 resolve_reg_notes (rtx insn
)
554 note
= find_reg_equal_equiv_note (insn
);
557 if (for_each_rtx (&XEXP (note
, 0), resolve_subreg_use
, NULL
))
559 remove_note (insn
, note
);
560 remove_retval_note (insn
);
564 pnote
= ®_NOTES (insn
);
565 while (*pnote
!= NULL_RTX
)
570 switch (REG_NOTE_KIND (note
))
572 case REG_NO_CONFLICT
:
573 if (resolve_reg_p (XEXP (note
, 0)))
582 *pnote
= XEXP (note
, 1);
584 pnote
= &XEXP (note
, 1);
588 /* Return whether X can not be decomposed into subwords. */
591 cannot_decompose_p (rtx x
)
595 unsigned int regno
= REGNO (x
);
597 if (HARD_REGISTER_NUM_P (regno
))
598 return !validate_subreg (word_mode
, GET_MODE (x
), x
, UNITS_PER_WORD
);
600 return bitmap_bit_p (non_decomposable_context
, regno
);
606 /* Decompose the registers used in a simple move SET within INSN. If
607 we don't change anything, return INSN, otherwise return the start
608 of the sequence of moves. */
611 resolve_simple_move (rtx set
, rtx insn
)
613 rtx src
, dest
, real_dest
, insns
;
614 enum machine_mode orig_mode
, dest_mode
;
619 dest
= SET_DEST (set
);
620 orig_mode
= GET_MODE (dest
);
622 words
= (GET_MODE_SIZE (orig_mode
) + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
628 /* We have to handle copying from a SUBREG of a decomposed reg where
629 the SUBREG is larger than word size. Rather than assume that we
630 can take a word_mode SUBREG of the destination, we copy to a new
631 register and then copy that to the destination. */
633 real_dest
= NULL_RTX
;
635 if (GET_CODE (src
) == SUBREG
636 && resolve_reg_p (SUBREG_REG (src
))
637 && (SUBREG_BYTE (src
) != 0
638 || (GET_MODE_SIZE (orig_mode
)
639 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
))))))
642 dest
= gen_reg_rtx (orig_mode
);
643 if (REG_P (real_dest
))
644 REG_ATTRS (dest
) = REG_ATTRS (real_dest
);
647 /* Similarly if we are copying to a SUBREG of a decomposed reg where
648 the SUBREG is larger than word size. */
650 if (GET_CODE (dest
) == SUBREG
651 && resolve_reg_p (SUBREG_REG (dest
))
652 && (SUBREG_BYTE (dest
) != 0
653 || (GET_MODE_SIZE (orig_mode
)
654 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))))
656 rtx reg
, minsn
, smove
;
658 reg
= gen_reg_rtx (orig_mode
);
659 minsn
= emit_move_insn (reg
, src
);
660 smove
= single_set (minsn
);
661 gcc_assert (smove
!= NULL_RTX
);
662 resolve_simple_move (smove
, minsn
);
666 /* If we didn't have any big SUBREGS of decomposed registers, and
667 neither side of the move is a register we are decomposing, then
668 we don't have to do anything here. */
670 if (src
== SET_SRC (set
)
671 && dest
== SET_DEST (set
)
672 && !resolve_reg_p (src
)
673 && !resolve_subreg_p (src
)
674 && !resolve_reg_p (dest
)
675 && !resolve_subreg_p (dest
))
681 /* If SRC is a register which we can't decompose, or has side
682 effects, we need to move via a temporary register. */
684 if (cannot_decompose_p (src
)
685 || side_effects_p (src
)
686 || GET_CODE (src
) == ASM_OPERANDS
)
690 reg
= gen_reg_rtx (orig_mode
);
691 emit_move_insn (reg
, src
);
695 /* If DEST is a register which we can't decompose, or has side
696 effects, we need to first move to a temporary register. We
697 handle the common case of pushing an operand directly. We also
698 go through a temporary register if it holds a floating point
699 value. This gives us better code on systems which can't move
700 data easily between integer and floating point registers. */
702 dest_mode
= orig_mode
;
703 pushing
= push_operand (dest
, dest_mode
);
704 if (cannot_decompose_p (dest
)
705 || (side_effects_p (dest
) && !pushing
)
706 || (!SCALAR_INT_MODE_P (dest_mode
)
707 && !resolve_reg_p (dest
)
708 && !resolve_subreg_p (dest
)))
710 if (real_dest
== NULL_RTX
)
712 if (!SCALAR_INT_MODE_P (dest_mode
))
714 dest_mode
= mode_for_size (GET_MODE_SIZE (dest_mode
) * BITS_PER_UNIT
,
716 gcc_assert (dest_mode
!= BLKmode
);
718 dest
= gen_reg_rtx (dest_mode
);
719 if (REG_P (real_dest
))
720 REG_ATTRS (dest
) = REG_ATTRS (real_dest
);
725 unsigned int i
, j
, jinc
;
727 gcc_assert (GET_MODE_SIZE (orig_mode
) % UNITS_PER_WORD
== 0);
728 gcc_assert (GET_CODE (XEXP (dest
, 0)) != PRE_MODIFY
);
729 gcc_assert (GET_CODE (XEXP (dest
, 0)) != POST_MODIFY
);
731 if (WORDS_BIG_ENDIAN
== STACK_GROWS_DOWNWARD
)
742 for (i
= 0; i
< words
; ++i
, j
+= jinc
)
746 temp
= copy_rtx (XEXP (dest
, 0));
747 temp
= adjust_automodify_address_nv (dest
, word_mode
, temp
,
749 emit_move_insn (temp
,
750 simplify_gen_subreg_concatn (word_mode
, src
,
752 j
* UNITS_PER_WORD
));
759 if (REG_P (dest
) && !HARD_REGISTER_NUM_P (REGNO (dest
)))
760 emit_insn (gen_rtx_CLOBBER (VOIDmode
, dest
));
762 for (i
= 0; i
< words
; ++i
)
763 emit_move_insn (simplify_gen_subreg_concatn (word_mode
, dest
,
766 simplify_gen_subreg_concatn (word_mode
, src
,
768 i
* UNITS_PER_WORD
));
771 if (real_dest
!= NULL_RTX
)
773 rtx mdest
, minsn
, smove
;
775 if (dest_mode
== orig_mode
)
778 mdest
= simplify_gen_subreg (orig_mode
, dest
, GET_MODE (dest
), 0);
779 minsn
= emit_move_insn (real_dest
, mdest
);
781 smove
= single_set (minsn
);
782 gcc_assert (smove
!= NULL_RTX
);
784 resolve_simple_move (smove
, minsn
);
787 insns
= get_insns ();
790 emit_insn_before (insns
, insn
);
792 move_libcall_note (insn
, insns
);
793 remove_retval_note (insn
);
799 /* Change a CLOBBER of a decomposed register into a CLOBBER of the
800 component registers. Return whether we changed something. */
803 resolve_clobber (rtx pat
, rtx insn
)
806 enum machine_mode orig_mode
;
807 unsigned int words
, i
;
810 if (!resolve_reg_p (reg
) && !resolve_subreg_p (reg
))
813 orig_mode
= GET_MODE (reg
);
814 words
= GET_MODE_SIZE (orig_mode
);
815 words
= (words
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
817 XEXP (pat
, 0) = simplify_gen_subreg_concatn (word_mode
, reg
, orig_mode
, 0);
818 for (i
= words
- 1; i
> 0; --i
)
822 x
= simplify_gen_subreg_concatn (word_mode
, reg
, orig_mode
,
824 x
= gen_rtx_CLOBBER (VOIDmode
, x
);
825 emit_insn_after (x
, insn
);
831 /* A USE of a decomposed register is no longer meaningful. Return
832 whether we changed something. */
835 resolve_use (rtx pat
, rtx insn
)
837 if (resolve_reg_p (XEXP (pat
, 0)) || resolve_subreg_p (XEXP (pat
, 0)))
845 /* Look for registers which are always accessed via word-sized SUBREGs
846 or via copies. Decompose these registers into several word-sized
850 decompose_multiword_subregs (bool update_life
)
855 max
= max_reg_num ();
857 /* First see if there are any multi-word pseudo-registers. If there
858 aren't, there is nothing we can do. This should speed up this
859 pass in the normal case, since it should be faster than scanning
864 for (i
= FIRST_PSEUDO_REGISTER
; i
< max
; ++i
)
866 if (regno_reg_rtx
[i
] != NULL
867 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx
[i
])) > UNITS_PER_WORD
)
874 /* FIXME: When the dataflow branch is merged, we can change this
875 code to look for each multi-word pseudo-register and to find each
876 insn which sets or uses that register. That should be faster
877 than scanning all the insns. */
879 decomposable_context
= BITMAP_ALLOC (NULL
);
880 non_decomposable_context
= BITMAP_ALLOC (NULL
);
882 reg_copy_graph
= VEC_alloc (bitmap
, heap
, max
);
883 VEC_safe_grow (bitmap
, heap
, reg_copy_graph
, max
);
884 memset (VEC_address (bitmap
, reg_copy_graph
), 0, sizeof (bitmap
) * max
);
890 FOR_BB_INSNS (bb
, insn
)
893 enum classify_move_insn cmi
;
897 || GET_CODE (PATTERN (insn
)) == CLOBBER
898 || GET_CODE (PATTERN (insn
)) == USE
)
901 recog_memoized (insn
);
904 set
= simple_move (insn
);
907 cmi
= NOT_SIMPLE_MOVE
;
912 retval
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
) != NULL_RTX
;
914 if (find_pseudo_copy (set
) && !retval
)
915 cmi
= SIMPLE_PSEUDO_REG_MOVE
;
917 && REG_P (SET_SRC (set
))
918 && HARD_REGISTER_P (SET_SRC (set
)))
922 /* We don't want to decompose an assignment which
923 copies the value returned by a libcall to a
924 pseudo-register. Doing that will lose the RETVAL
925 note with no real gain. */
926 cmi
= NOT_SIMPLE_MOVE
;
928 /* If we have a RETVAL note, there should be an
929 EQUAL note. We don't want to decompose any
930 registers which that EQUAL note refers to
931 directly. If we do, we will no longer know the
932 value of the libcall. */
933 note
= find_reg_equal_equiv_note (insn
);
934 if (note
!= NULL_RTX
)
935 for_each_rtx (&XEXP (note
, 0), find_decomposable_subregs
,
942 n
= recog_data
.n_operands
;
943 for (i
= 0; i
< n
; ++i
)
945 for_each_rtx (&recog_data
.operand
[i
],
946 find_decomposable_subregs
,
949 /* We handle ASM_OPERANDS as a special case to support
950 things like x86 rdtsc which returns a DImode value.
951 We can decompose the output, which will certainly be
952 operand 0, but not the inputs. */
954 if (cmi
== SIMPLE_MOVE
955 && GET_CODE (SET_SRC (set
)) == ASM_OPERANDS
)
958 cmi
= NOT_SIMPLE_MOVE
;
964 bitmap_and_compl_into (decomposable_context
, non_decomposable_context
);
965 if (!bitmap_empty_p (decomposable_context
))
967 int hold_no_new_pseudos
= no_new_pseudos
;
968 int max_regno
= max_reg_num ();
970 bitmap_iterator iter
;
973 propagate_pseudo_copies ();
976 blocks
= sbitmap_alloc (last_basic_block
);
977 sbitmap_zero (blocks
);
979 EXECUTE_IF_SET_IN_BITMAP (decomposable_context
, 0, regno
, iter
)
980 decompose_register (regno
);
986 FOR_BB_INSNS (bb
, insn
)
994 next
= NEXT_INSN (insn
);
997 pat
= PATTERN (insn
);
998 if (GET_CODE (pat
) == CLOBBER
)
1000 if (resolve_clobber (pat
, insn
))
1003 else if (GET_CODE (pat
) == USE
)
1005 if (resolve_use (pat
, insn
))
1013 recog_memoized (insn
);
1014 extract_insn (insn
);
1016 set
= simple_move (insn
);
1019 rtx orig_insn
= insn
;
1021 insn
= resolve_simple_move (set
, insn
);
1022 if (insn
!= orig_insn
)
1026 recog_memoized (insn
);
1027 extract_insn (insn
);
1031 for (i
= recog_data
.n_operands
- 1; i
>= 0; --i
)
1032 for_each_rtx (recog_data
.operand_loc
[i
],
1036 resolve_reg_notes (insn
);
1038 if (num_validated_changes () > 0)
1040 for (i
= recog_data
.n_dups
- 1; i
>= 0; --i
)
1042 rtx
*pl
= recog_data
.dup_loc
[i
];
1043 int dup_num
= recog_data
.dup_num
[i
];
1044 rtx
*px
= recog_data
.operand_loc
[dup_num
];
1046 validate_change (insn
, pl
, *px
, 1);
1049 i
= apply_change_group ();
1058 SET_BIT (blocks
, bb
->index
);
1059 reg_scan_update (insn
, next
, max_regno
);
1064 no_new_pseudos
= hold_no_new_pseudos
;
1067 update_life_info (blocks
, UPDATE_LIFE_GLOBAL_RM_NOTES
,
1070 sbitmap_free (blocks
);
1077 for (i
= 0; VEC_iterate (bitmap
, reg_copy_graph
, i
, b
); ++i
)
1082 VEC_free (bitmap
, heap
, reg_copy_graph
);
1084 BITMAP_FREE (decomposable_context
);
1085 BITMAP_FREE (non_decomposable_context
);
1088 /* Gate function for lower subreg pass. */
1091 gate_handle_lower_subreg (void)
1093 return flag_split_wide_types
!= 0;
1096 /* Implement first lower subreg pass. */
1099 rest_of_handle_lower_subreg (void)
1101 decompose_multiword_subregs (false);
1105 /* Implement second lower subreg pass. */
1108 rest_of_handle_lower_subreg2 (void)
1110 decompose_multiword_subregs (true);
1114 struct tree_opt_pass pass_lower_subreg
=
1116 "subreg", /* name */
1117 gate_handle_lower_subreg
, /* gate */
1118 rest_of_handle_lower_subreg
, /* execute */
1121 0, /* static_pass_number */
1122 TV_LOWER_SUBREG
, /* tv_id */
1123 0, /* properties_required */
1124 0, /* properties_provided */
1125 0, /* properties_destroyed */
1126 0, /* todo_flags_start */
1128 TODO_ggc_collect
, /* todo_flags_finish */
1132 struct tree_opt_pass pass_lower_subreg2
=
1134 "subreg2", /* name */
1135 gate_handle_lower_subreg
, /* gate */
1136 rest_of_handle_lower_subreg2
, /* execute */
1139 0, /* static_pass_number */
1140 TV_LOWER_SUBREG
, /* tv_id */
1141 0, /* properties_required */
1142 0, /* properties_provided */
1143 0, /* properties_destroyed */
1144 0, /* todo_flags_start */
1146 TODO_ggc_collect
, /* todo_flags_finish */