* gcc.dg/vect/slp-perm-1.c (main): Make sure loops aren't vectorized.
[official-gcc.git] / gcc / reginfo.c
blob0fc86d3627fa9eded248eae8ac7429112e2ebafd
1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
30 #include "config.h"
31 #include "system.h"
32 #include "coretypes.h"
33 #include "tm.h"
34 #include "hard-reg-set.h"
35 #include "rtl.h"
36 #include "expr.h"
37 #include "tm_p.h"
38 #include "flags.h"
39 #include "basic-block.h"
40 #include "regs.h"
41 #include "addresses.h"
42 #include "function.h"
43 #include "insn-config.h"
44 #include "recog.h"
45 #include "reload.h"
46 #include "toplev.h"
47 #include "diagnostic-core.h"
48 #include "output.h"
49 #include "timevar.h"
50 #include "hashtab.h"
51 #include "target.h"
52 #include "tree-pass.h"
53 #include "df.h"
54 #include "ira.h"
56 /* Maximum register number used in this function, plus one. */
58 int max_regno;
61 struct target_hard_regs default_target_hard_regs;
62 struct target_regs default_target_regs;
63 #if SWITCHABLE_TARGET
64 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
65 struct target_regs *this_target_regs = &default_target_regs;
66 #endif
68 /* Data for initializing fixed_regs. */
69 static const char initial_fixed_regs[] = FIXED_REGISTERS;
71 /* Data for initializing call_used_regs. */
72 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
74 #ifdef CALL_REALLY_USED_REGISTERS
75 /* Data for initializing call_really_used_regs. */
76 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
77 #endif
79 #ifdef CALL_REALLY_USED_REGISTERS
80 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
81 #else
82 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
83 #endif
85 /* Indexed by hard register number, contains 1 for registers
86 that are being used for global register decls.
87 These must be exempt from ordinary flow analysis
88 and are also considered fixed. */
89 char global_regs[FIRST_PSEUDO_REGISTER];
91 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
92 in dataflow more conveniently. */
93 regset regs_invalidated_by_call_regset;
95 /* The bitmap_obstack is used to hold some static variables that
96 should not be reset after each function is compiled. */
97 static bitmap_obstack persistent_obstack;
99 /* Used to initialize reg_alloc_order. */
100 #ifdef REG_ALLOC_ORDER
101 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
102 #endif
104 /* The same information, but as an array of unsigned ints. We copy from
105 these unsigned ints to the table above. We do this so the tm.h files
106 do not have to be aware of the wordsize for machines with <= 64 regs.
107 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
108 #define N_REG_INTS \
109 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
111 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
112 = REG_CLASS_CONTENTS;
114 /* Array containing all of the register names. */
115 static const char *const initial_reg_names[] = REGISTER_NAMES;
117 /* Array containing all of the register class names. */
118 const char * reg_class_names[] = REG_CLASS_NAMES;
120 #define last_mode_for_init_move_cost \
121 (this_target_regs->x_last_mode_for_init_move_cost)
123 /* No more global register variables may be declared; true once
124 reginfo has been initialized. */
125 static int no_global_reg_vars = 0;
127 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
128 correspond to the hard registers, if any, set in that map. This
129 could be done far more efficiently by having all sorts of special-cases
130 with moving single words, but probably isn't worth the trouble. */
131 void
132 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
134 unsigned i;
135 bitmap_iterator bi;
137 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
139 if (i >= FIRST_PSEUDO_REGISTER)
140 return;
141 SET_HARD_REG_BIT (*to, i);
145 /* Function called only once per target_globals to initialize the
146 target_hard_regs structure. Once this is done, various switches
147 may override. */
148 void
149 init_reg_sets (void)
151 int i, j;
153 /* First copy the register information from the initial int form into
154 the regsets. */
156 for (i = 0; i < N_REG_CLASSES; i++)
158 CLEAR_HARD_REG_SET (reg_class_contents[i]);
160 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
161 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
162 if (int_reg_class_contents[i][j / 32]
163 & ((unsigned) 1 << (j % 32)))
164 SET_HARD_REG_BIT (reg_class_contents[i], j);
167 /* Sanity check: make sure the target macros FIXED_REGISTERS and
168 CALL_USED_REGISTERS had the right number of initializers. */
169 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
170 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
171 #ifdef CALL_REALLY_USED_REGISTERS
172 gcc_assert (sizeof call_really_used_regs
173 == sizeof initial_call_really_used_regs);
174 #endif
175 #ifdef REG_ALLOC_ORDER
176 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
177 #endif
178 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
180 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
181 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
182 #ifdef CALL_REALLY_USED_REGISTERS
183 memcpy (call_really_used_regs, initial_call_really_used_regs,
184 sizeof call_really_used_regs);
185 #endif
186 #ifdef REG_ALLOC_ORDER
187 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
188 #endif
189 memcpy (reg_names, initial_reg_names, sizeof reg_names);
192 /* Initialize may_move_cost and friends for mode M. */
193 void
194 init_move_cost (enum machine_mode m)
196 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
197 bool all_match = true;
198 unsigned int i, j;
200 gcc_assert (have_regs_of_mode[m]);
201 for (i = 0; i < N_REG_CLASSES; i++)
202 if (contains_reg_of_mode[i][m])
203 for (j = 0; j < N_REG_CLASSES; j++)
205 int cost;
206 if (!contains_reg_of_mode[j][m])
207 cost = 65535;
208 else
210 cost = register_move_cost (m, (enum reg_class) i,
211 (enum reg_class) j);
212 gcc_assert (cost < 65535);
214 all_match &= (last_move_cost[i][j] == cost);
215 last_move_cost[i][j] = cost;
217 if (all_match && last_mode_for_init_move_cost != -1)
219 move_cost[m] = move_cost[last_mode_for_init_move_cost];
220 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
221 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
222 return;
224 last_mode_for_init_move_cost = m;
225 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
226 * N_REG_CLASSES);
227 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
228 * N_REG_CLASSES);
229 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
230 * N_REG_CLASSES);
231 for (i = 0; i < N_REG_CLASSES; i++)
232 if (contains_reg_of_mode[i][m])
233 for (j = 0; j < N_REG_CLASSES; j++)
235 int cost;
236 enum reg_class *p1, *p2;
238 if (last_move_cost[i][j] == 65535)
240 move_cost[m][i][j] = 65535;
241 may_move_in_cost[m][i][j] = 65535;
242 may_move_out_cost[m][i][j] = 65535;
244 else
246 cost = last_move_cost[i][j];
248 for (p2 = &reg_class_subclasses[j][0];
249 *p2 != LIM_REG_CLASSES; p2++)
250 if (*p2 != i && contains_reg_of_mode[*p2][m])
251 cost = MAX (cost, move_cost[m][i][*p2]);
253 for (p1 = &reg_class_subclasses[i][0];
254 *p1 != LIM_REG_CLASSES; p1++)
255 if (*p1 != j && contains_reg_of_mode[*p1][m])
256 cost = MAX (cost, move_cost[m][*p1][j]);
258 gcc_assert (cost <= 65535);
259 move_cost[m][i][j] = cost;
261 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
262 may_move_in_cost[m][i][j] = 0;
263 else
264 may_move_in_cost[m][i][j] = cost;
266 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
267 may_move_out_cost[m][i][j] = 0;
268 else
269 may_move_out_cost[m][i][j] = cost;
272 else
273 for (j = 0; j < N_REG_CLASSES; j++)
275 move_cost[m][i][j] = 65535;
276 may_move_in_cost[m][i][j] = 65535;
277 may_move_out_cost[m][i][j] = 65535;
281 /* We need to save copies of some of the register information which
282 can be munged by command-line switches so we can restore it during
283 subsequent back-end reinitialization. */
284 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
285 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
286 #ifdef CALL_REALLY_USED_REGISTERS
287 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
288 #endif
289 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
291 /* Save the register information. */
292 void
293 save_register_info (void)
295 /* Sanity check: make sure the target macros FIXED_REGISTERS and
296 CALL_USED_REGISTERS had the right number of initializers. */
297 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
298 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
299 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
300 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
302 /* Likewise for call_really_used_regs. */
303 #ifdef CALL_REALLY_USED_REGISTERS
304 gcc_assert (sizeof call_really_used_regs
305 == sizeof saved_call_really_used_regs);
306 memcpy (saved_call_really_used_regs, call_really_used_regs,
307 sizeof call_really_used_regs);
308 #endif
310 /* And similarly for reg_names. */
311 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
312 memcpy (saved_reg_names, reg_names, sizeof reg_names);
315 /* Restore the register information. */
316 static void
317 restore_register_info (void)
319 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
320 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
322 #ifdef CALL_REALLY_USED_REGISTERS
323 memcpy (call_really_used_regs, saved_call_really_used_regs,
324 sizeof call_really_used_regs);
325 #endif
327 memcpy (reg_names, saved_reg_names, sizeof reg_names);
330 /* After switches have been processed, which perhaps alter
331 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
332 static void
333 init_reg_sets_1 (void)
335 unsigned int i, j;
336 unsigned int /* enum machine_mode */ m;
338 restore_register_info ();
340 #ifdef REG_ALLOC_ORDER
341 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
342 inv_reg_alloc_order[reg_alloc_order[i]] = i;
343 #endif
345 /* This macro allows the fixed or call-used registers
346 and the register classes to depend on target flags. */
348 #ifdef CONDITIONAL_REGISTER_USAGE
349 CONDITIONAL_REGISTER_USAGE;
350 #endif
352 /* Compute number of hard regs in each class. */
354 memset (reg_class_size, 0, sizeof reg_class_size);
355 for (i = 0; i < N_REG_CLASSES; i++)
357 bool any_nonfixed = false;
358 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
359 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
361 reg_class_size[i]++;
362 if (!fixed_regs[j])
363 any_nonfixed = true;
365 class_only_fixed_regs[i] = !any_nonfixed;
368 /* Initialize the table of subunions.
369 reg_class_subunion[I][J] gets the largest-numbered reg-class
370 that is contained in the union of classes I and J. */
372 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
373 for (i = 0; i < N_REG_CLASSES; i++)
375 for (j = 0; j < N_REG_CLASSES; j++)
377 HARD_REG_SET c;
378 int k;
380 COPY_HARD_REG_SET (c, reg_class_contents[i]);
381 IOR_HARD_REG_SET (c, reg_class_contents[j]);
382 for (k = 0; k < N_REG_CLASSES; k++)
383 if (hard_reg_set_subset_p (reg_class_contents[k], c)
384 && !hard_reg_set_subset_p (reg_class_contents[k],
385 reg_class_contents
386 [(int) reg_class_subunion[i][j]]))
387 reg_class_subunion[i][j] = (enum reg_class) k;
391 /* Initialize the table of superunions.
392 reg_class_superunion[I][J] gets the smallest-numbered reg-class
393 containing the union of classes I and J. */
395 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
396 for (i = 0; i < N_REG_CLASSES; i++)
398 for (j = 0; j < N_REG_CLASSES; j++)
400 HARD_REG_SET c;
401 int k;
403 COPY_HARD_REG_SET (c, reg_class_contents[i]);
404 IOR_HARD_REG_SET (c, reg_class_contents[j]);
405 for (k = 0; k < N_REG_CLASSES; k++)
406 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
407 break;
409 reg_class_superunion[i][j] = (enum reg_class) k;
413 /* Initialize the tables of subclasses and superclasses of each reg class.
414 First clear the whole table, then add the elements as they are found. */
416 for (i = 0; i < N_REG_CLASSES; i++)
418 for (j = 0; j < N_REG_CLASSES; j++)
419 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
422 for (i = 0; i < N_REG_CLASSES; i++)
424 if (i == (int) NO_REGS)
425 continue;
427 for (j = i + 1; j < N_REG_CLASSES; j++)
428 if (hard_reg_set_subset_p (reg_class_contents[i],
429 reg_class_contents[j]))
431 /* Reg class I is a subclass of J.
432 Add J to the table of superclasses of I. */
433 enum reg_class *p;
435 /* Add I to the table of superclasses of J. */
436 p = &reg_class_subclasses[j][0];
437 while (*p != LIM_REG_CLASSES) p++;
438 *p = (enum reg_class) i;
442 /* Initialize "constant" tables. */
444 CLEAR_HARD_REG_SET (fixed_reg_set);
445 CLEAR_HARD_REG_SET (call_used_reg_set);
446 CLEAR_HARD_REG_SET (call_fixed_reg_set);
447 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
448 if (!regs_invalidated_by_call_regset)
450 bitmap_obstack_initialize (&persistent_obstack);
451 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
453 else
454 CLEAR_REG_SET (regs_invalidated_by_call_regset);
456 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
458 /* call_used_regs must include fixed_regs. */
459 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
460 #ifdef CALL_REALLY_USED_REGISTERS
461 /* call_used_regs must include call_really_used_regs. */
462 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
463 #endif
465 if (fixed_regs[i])
466 SET_HARD_REG_BIT (fixed_reg_set, i);
468 if (call_used_regs[i])
469 SET_HARD_REG_BIT (call_used_reg_set, i);
471 /* There are a couple of fixed registers that we know are safe to
472 exclude from being clobbered by calls:
474 The frame pointer is always preserved across calls. The arg
475 pointer is if it is fixed. The stack pointer usually is,
476 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
477 CLOBBER will be present. If we are generating PIC code, the
478 PIC offset table register is preserved across calls, though the
479 target can override that. */
481 if (i == STACK_POINTER_REGNUM)
483 else if (global_regs[i])
485 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
486 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
488 else if (i == FRAME_POINTER_REGNUM)
490 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
491 else if (i == HARD_FRAME_POINTER_REGNUM)
493 #endif
494 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
495 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
497 #endif
498 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
499 else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
501 #endif
502 else if (CALL_REALLY_USED_REGNO_P (i))
504 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
505 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
509 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
511 /* Preserve global registers if called more than once. */
512 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
514 if (global_regs[i])
516 fixed_regs[i] = call_used_regs[i] = 1;
517 SET_HARD_REG_BIT (fixed_reg_set, i);
518 SET_HARD_REG_BIT (call_used_reg_set, i);
519 SET_HARD_REG_BIT (call_fixed_reg_set, i);
523 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
524 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
525 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
527 HARD_REG_SET ok_regs;
528 CLEAR_HARD_REG_SET (ok_regs);
529 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
530 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
531 SET_HARD_REG_BIT (ok_regs, j);
533 for (i = 0; i < N_REG_CLASSES; i++)
534 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
535 (enum machine_mode) m)
536 <= reg_class_size[i])
537 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
539 contains_reg_of_mode [i][m] = 1;
540 have_regs_of_mode [m] = 1;
544 /* Reset move_cost and friends, making sure we only free shared
545 table entries once. */
546 for (i = 0; i < MAX_MACHINE_MODE; i++)
547 if (move_cost[i])
549 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
551 if (i == j)
553 free (move_cost[i]);
554 free (may_move_in_cost[i]);
555 free (may_move_out_cost[i]);
558 memset (move_cost, 0, sizeof move_cost);
559 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
560 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
561 last_mode_for_init_move_cost = -1;
564 /* Compute the table of register modes.
565 These values are used to record death information for individual registers
566 (as opposed to a multi-register mode).
567 This function might be invoked more than once, if the target has support
568 for changing register usage conventions on a per-function basis.
570 void
571 init_reg_modes_target (void)
573 int i, j;
575 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
576 for (j = 0; j < MAX_MACHINE_MODE; j++)
577 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
579 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
581 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
583 /* If we couldn't find a valid mode, just use the previous mode.
584 ??? One situation in which we need to do this is on the mips where
585 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
586 to use DF mode for the even registers and VOIDmode for the odd
587 (for the cpu models where the odd ones are inaccessible). */
588 if (reg_raw_mode[i] == VOIDmode)
589 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
593 /* Finish initializing the register sets and initialize the register modes.
594 This function might be invoked more than once, if the target has support
595 for changing register usage conventions on a per-function basis.
597 void
598 init_regs (void)
600 /* This finishes what was started by init_reg_sets, but couldn't be done
601 until after register usage was specified. */
602 init_reg_sets_1 ();
605 /* The same as previous function plus initializing IRA. */
606 void
607 reinit_regs (void)
609 init_regs ();
610 /* caller_save needs to be re-initialized. */
611 caller_save_initialized_p = false;
612 ira_init ();
615 /* Initialize some fake stack-frame MEM references for use in
616 memory_move_secondary_cost. */
617 void
618 init_fake_stack_mems (void)
620 int i;
622 for (i = 0; i < MAX_MACHINE_MODE; i++)
623 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
627 /* Compute cost of moving data from a register of class FROM to one of
628 TO, using MODE. */
631 register_move_cost (enum machine_mode mode, enum reg_class from,
632 enum reg_class to)
634 return targetm.register_move_cost (mode, from, to);
637 /* Compute cost of moving registers to/from memory. */
639 memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in)
641 return targetm.memory_move_cost (mode, rclass, in);
644 /* Compute extra cost of moving registers to/from memory due to reloads.
645 Only needed if secondary reloads are required for memory moves. */
647 memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass,
648 bool in)
650 enum reg_class altclass;
651 int partial_cost = 0;
652 /* We need a memory reference to feed to SECONDARY... macros. */
653 /* mem may be unused even if the SECONDARY_ macros are defined. */
654 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
656 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
658 if (altclass == NO_REGS)
659 return 0;
661 if (in)
662 partial_cost = register_move_cost (mode, altclass, rclass);
663 else
664 partial_cost = register_move_cost (mode, rclass, altclass);
666 if (rclass == altclass)
667 /* This isn't simply a copy-to-temporary situation. Can't guess
668 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
669 calling here in that case.
671 I'm tempted to put in an assert here, but returning this will
672 probably only give poor estimates, which is what we would've
673 had before this code anyways. */
674 return partial_cost;
676 /* Check if the secondary reload register will also need a
677 secondary reload. */
678 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
681 /* Return a machine mode that is legitimate for hard reg REGNO and large
682 enough to save nregs. If we can't find one, return VOIDmode.
683 If CALL_SAVED is true, only consider modes that are call saved. */
684 enum machine_mode
685 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
686 unsigned int nregs, bool call_saved)
688 unsigned int /* enum machine_mode */ m;
689 enum machine_mode found_mode = VOIDmode, mode;
691 /* We first look for the largest integer mode that can be validly
692 held in REGNO. If none, we look for the largest floating-point mode.
693 If we still didn't find a valid mode, try CCmode. */
695 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
696 mode != VOIDmode;
697 mode = GET_MODE_WIDER_MODE (mode))
698 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
699 && HARD_REGNO_MODE_OK (regno, mode)
700 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
701 found_mode = mode;
703 if (found_mode != VOIDmode)
704 return found_mode;
706 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
707 mode != VOIDmode;
708 mode = GET_MODE_WIDER_MODE (mode))
709 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
710 && HARD_REGNO_MODE_OK (regno, mode)
711 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
712 found_mode = mode;
714 if (found_mode != VOIDmode)
715 return found_mode;
717 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
718 mode != VOIDmode;
719 mode = GET_MODE_WIDER_MODE (mode))
720 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
721 && HARD_REGNO_MODE_OK (regno, mode)
722 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
723 found_mode = mode;
725 if (found_mode != VOIDmode)
726 return found_mode;
728 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
729 mode != VOIDmode;
730 mode = GET_MODE_WIDER_MODE (mode))
731 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
732 && HARD_REGNO_MODE_OK (regno, mode)
733 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
734 found_mode = mode;
736 if (found_mode != VOIDmode)
737 return found_mode;
739 /* Iterate over all of the CCmodes. */
740 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
742 mode = (enum machine_mode) m;
743 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
744 && HARD_REGNO_MODE_OK (regno, mode)
745 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
746 return mode;
749 /* We can't find a mode valid for this register. */
750 return VOIDmode;
753 /* Specify the usage characteristics of the register named NAME.
754 It should be a fixed register if FIXED and a
755 call-used register if CALL_USED. */
756 void
757 fix_register (const char *name, int fixed, int call_used)
759 int i;
761 /* Decode the name and update the primary form of
762 the register info. */
764 if ((i = decode_reg_name (name)) >= 0)
766 if ((i == STACK_POINTER_REGNUM
767 #ifdef HARD_FRAME_POINTER_REGNUM
768 || i == HARD_FRAME_POINTER_REGNUM
769 #else
770 || i == FRAME_POINTER_REGNUM
771 #endif
773 && (fixed == 0 || call_used == 0))
775 static const char * const what_option[2][2] = {
776 { "call-saved", "call-used" },
777 { "no-such-option", "fixed" }};
779 error ("can't use '%s' as a %s register", name,
780 what_option[fixed][call_used]);
782 else
784 fixed_regs[i] = fixed;
785 call_used_regs[i] = call_used;
786 #ifdef CALL_REALLY_USED_REGISTERS
787 if (fixed == 0)
788 call_really_used_regs[i] = call_used;
789 #endif
792 else
794 warning (0, "unknown register name: %s", name);
798 /* Mark register number I as global. */
799 void
800 globalize_reg (int i)
802 if (fixed_regs[i] == 0 && no_global_reg_vars)
803 error ("global register variable follows a function definition");
805 if (global_regs[i])
807 warning (0, "register used for two global register variables");
808 return;
811 if (call_used_regs[i] && ! fixed_regs[i])
812 warning (0, "call-clobbered register used for global register variable");
814 global_regs[i] = 1;
816 /* If we're globalizing the frame pointer, we need to set the
817 appropriate regs_invalidated_by_call bit, even if it's already
818 set in fixed_regs. */
819 if (i != STACK_POINTER_REGNUM)
821 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
822 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
825 /* If already fixed, nothing else to do. */
826 if (fixed_regs[i])
827 return;
829 fixed_regs[i] = call_used_regs[i] = 1;
830 #ifdef CALL_REALLY_USED_REGISTERS
831 call_really_used_regs[i] = 1;
832 #endif
834 SET_HARD_REG_BIT (fixed_reg_set, i);
835 SET_HARD_REG_BIT (call_used_reg_set, i);
836 SET_HARD_REG_BIT (call_fixed_reg_set, i);
838 reinit_regs ();
842 /* Structure used to record preferences of given pseudo. */
843 struct reg_pref
845 /* (enum reg_class) prefclass is the preferred class. May be
846 NO_REGS if no class is better than memory. */
847 char prefclass;
849 /* altclass is a register class that we should use for allocating
850 pseudo if no register in the preferred class is available.
851 If no register in this class is available, memory is preferred.
853 It might appear to be more general to have a bitmask of classes here,
854 but since it is recommended that there be a class corresponding to the
855 union of most major pair of classes, that generality is not required. */
856 char altclass;
858 /* coverclass is a register class that IRA uses for allocating
859 the pseudo. */
860 char coverclass;
863 /* Record preferences of each pseudo. This is available after RA is
864 run. */
865 static struct reg_pref *reg_pref;
867 /* Current size of reg_info. */
868 static int reg_info_size;
870 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
871 This function is sometimes called before the info has been computed.
872 When that happens, just return GENERAL_REGS, which is innocuous. */
873 enum reg_class
874 reg_preferred_class (int regno)
876 if (reg_pref == 0)
877 return GENERAL_REGS;
879 return (enum reg_class) reg_pref[regno].prefclass;
882 enum reg_class
883 reg_alternate_class (int regno)
885 if (reg_pref == 0)
886 return ALL_REGS;
888 return (enum reg_class) reg_pref[regno].altclass;
891 /* Return the reg_class which is used by IRA for its allocation. */
892 enum reg_class
893 reg_cover_class (int regno)
895 if (reg_pref == 0)
896 return NO_REGS;
898 return (enum reg_class) reg_pref[regno].coverclass;
903 /* Allocate space for reg info. */
904 static void
905 allocate_reg_info (void)
907 reg_info_size = max_reg_num ();
908 gcc_assert (! reg_pref && ! reg_renumber);
909 reg_renumber = XNEWVEC (short, reg_info_size);
910 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
911 memset (reg_renumber, -1, reg_info_size * sizeof (short));
915 /* Resize reg info. The new elements will be uninitialized. Return
916 TRUE if new elements (for new pseudos) were added. */
917 bool
918 resize_reg_info (void)
920 int old;
922 if (reg_pref == NULL)
924 allocate_reg_info ();
925 return true;
927 if (reg_info_size == max_reg_num ())
928 return false;
929 old = reg_info_size;
930 reg_info_size = max_reg_num ();
931 gcc_assert (reg_pref && reg_renumber);
932 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
933 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
934 memset (reg_pref + old, -1,
935 (reg_info_size - old) * sizeof (struct reg_pref));
936 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
937 return true;
941 /* Free up the space allocated by allocate_reg_info. */
942 void
943 free_reg_info (void)
945 if (reg_pref)
947 free (reg_pref);
948 reg_pref = NULL;
951 if (reg_renumber)
953 free (reg_renumber);
954 reg_renumber = NULL;
958 /* Initialize some global data for this pass. */
959 static unsigned int
960 reginfo_init (void)
962 if (df)
963 df_compute_regs_ever_live (true);
965 /* This prevents dump_flow_info from losing if called
966 before reginfo is run. */
967 reg_pref = NULL;
968 /* No more global register variables may be declared. */
969 no_global_reg_vars = 1;
970 return 1;
973 struct rtl_opt_pass pass_reginfo_init =
976 RTL_PASS,
977 "reginfo", /* name */
978 NULL, /* gate */
979 reginfo_init, /* execute */
980 NULL, /* sub */
981 NULL, /* next */
982 0, /* static_pass_number */
983 TV_NONE, /* tv_id */
984 0, /* properties_required */
985 0, /* properties_provided */
986 0, /* properties_destroyed */
987 0, /* todo_flags_start */
988 0 /* todo_flags_finish */
994 /* Set up preferred, alternate, and cover classes for REGNO as
995 PREFCLASS, ALTCLASS, and COVERCLASS. */
996 void
997 setup_reg_classes (int regno,
998 enum reg_class prefclass, enum reg_class altclass,
999 enum reg_class coverclass)
1001 if (reg_pref == NULL)
1002 return;
1003 gcc_assert (reg_info_size == max_reg_num ());
1004 reg_pref[regno].prefclass = prefclass;
1005 reg_pref[regno].altclass = altclass;
1006 reg_pref[regno].coverclass = coverclass;
1010 /* This is the `regscan' pass of the compiler, run just before cse and
1011 again just before loop. It finds the first and last use of each
1012 pseudo-register. */
1014 static void reg_scan_mark_refs (rtx, rtx);
1016 void
1017 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1019 rtx insn;
1021 timevar_push (TV_REG_SCAN);
1023 for (insn = f; insn; insn = NEXT_INSN (insn))
1024 if (INSN_P (insn))
1026 reg_scan_mark_refs (PATTERN (insn), insn);
1027 if (REG_NOTES (insn))
1028 reg_scan_mark_refs (REG_NOTES (insn), insn);
1031 timevar_pop (TV_REG_SCAN);
1035 /* X is the expression to scan. INSN is the insn it appears in.
1036 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1037 We should only record information for REGs with numbers
1038 greater than or equal to MIN_REGNO. */
1039 static void
1040 reg_scan_mark_refs (rtx x, rtx insn)
1042 enum rtx_code code;
1043 rtx dest;
1044 rtx note;
1046 if (!x)
1047 return;
1048 code = GET_CODE (x);
1049 switch (code)
1051 case CONST:
1052 case CONST_INT:
1053 case CONST_DOUBLE:
1054 case CONST_FIXED:
1055 case CONST_VECTOR:
1056 case CC0:
1057 case PC:
1058 case SYMBOL_REF:
1059 case LABEL_REF:
1060 case ADDR_VEC:
1061 case ADDR_DIFF_VEC:
1062 case REG:
1063 return;
1065 case EXPR_LIST:
1066 if (XEXP (x, 0))
1067 reg_scan_mark_refs (XEXP (x, 0), insn);
1068 if (XEXP (x, 1))
1069 reg_scan_mark_refs (XEXP (x, 1), insn);
1070 break;
1072 case INSN_LIST:
1073 if (XEXP (x, 1))
1074 reg_scan_mark_refs (XEXP (x, 1), insn);
1075 break;
1077 case CLOBBER:
1078 if (MEM_P (XEXP (x, 0)))
1079 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1080 break;
1082 case SET:
1083 /* Count a set of the destination if it is a register. */
1084 for (dest = SET_DEST (x);
1085 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1086 || GET_CODE (dest) == ZERO_EXTEND;
1087 dest = XEXP (dest, 0))
1090 /* If this is setting a pseudo from another pseudo or the sum of a
1091 pseudo and a constant integer and the other pseudo is known to be
1092 a pointer, set the destination to be a pointer as well.
1094 Likewise if it is setting the destination from an address or from a
1095 value equivalent to an address or to the sum of an address and
1096 something else.
1098 But don't do any of this if the pseudo corresponds to a user
1099 variable since it should have already been set as a pointer based
1100 on the type. */
1102 if (REG_P (SET_DEST (x))
1103 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1104 /* If the destination pseudo is set more than once, then other
1105 sets might not be to a pointer value (consider access to a
1106 union in two threads of control in the presence of global
1107 optimizations). So only set REG_POINTER on the destination
1108 pseudo if this is the only set of that pseudo. */
1109 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1110 && ! REG_USERVAR_P (SET_DEST (x))
1111 && ! REG_POINTER (SET_DEST (x))
1112 && ((REG_P (SET_SRC (x))
1113 && REG_POINTER (SET_SRC (x)))
1114 || ((GET_CODE (SET_SRC (x)) == PLUS
1115 || GET_CODE (SET_SRC (x)) == LO_SUM)
1116 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1117 && REG_P (XEXP (SET_SRC (x), 0))
1118 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1119 || GET_CODE (SET_SRC (x)) == CONST
1120 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1121 || GET_CODE (SET_SRC (x)) == LABEL_REF
1122 || (GET_CODE (SET_SRC (x)) == HIGH
1123 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1124 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1125 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1126 || ((GET_CODE (SET_SRC (x)) == PLUS
1127 || GET_CODE (SET_SRC (x)) == LO_SUM)
1128 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1129 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1130 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1131 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1132 && (GET_CODE (XEXP (note, 0)) == CONST
1133 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1134 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1135 REG_POINTER (SET_DEST (x)) = 1;
1137 /* If this is setting a register from a register or from a simple
1138 conversion of a register, propagate REG_EXPR. */
1139 if (REG_P (dest) && !REG_ATTRS (dest))
1141 rtx src = SET_SRC (x);
1143 while (GET_CODE (src) == SIGN_EXTEND
1144 || GET_CODE (src) == ZERO_EXTEND
1145 || GET_CODE (src) == TRUNCATE
1146 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1147 src = XEXP (src, 0);
1149 set_reg_attrs_from_value (dest, src);
1152 /* ... fall through ... */
1154 default:
1156 const char *fmt = GET_RTX_FORMAT (code);
1157 int i;
1158 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1160 if (fmt[i] == 'e')
1161 reg_scan_mark_refs (XEXP (x, i), insn);
1162 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1164 int j;
1165 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1166 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1174 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1175 is also in C2. */
1177 reg_class_subset_p (enum reg_class c1, enum reg_class c2)
1179 return (c1 == c2
1180 || c2 == ALL_REGS
1181 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1182 reg_class_contents[(int) c2]));
1185 /* Return nonzero if there is a register that is in both C1 and C2. */
1187 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1189 return (c1 == c2
1190 || c1 == ALL_REGS
1191 || c2 == ALL_REGS
1192 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1193 reg_class_contents[(int) c2]));
1198 /* Passes for keeping and updating info about modes of registers
1199 inside subregisters. */
1201 #ifdef CANNOT_CHANGE_MODE_CLASS
1203 struct subregs_of_mode_node
1205 unsigned int block;
1206 unsigned char modes[MAX_MACHINE_MODE];
1209 static htab_t subregs_of_mode;
1211 static hashval_t
1212 som_hash (const void *x)
1214 const struct subregs_of_mode_node *const a =
1215 (const struct subregs_of_mode_node *) x;
1216 return a->block;
1219 static int
1220 som_eq (const void *x, const void *y)
1222 const struct subregs_of_mode_node *const a =
1223 (const struct subregs_of_mode_node *) x;
1224 const struct subregs_of_mode_node *const b =
1225 (const struct subregs_of_mode_node *) y;
1226 return a->block == b->block;
1229 static void
1230 record_subregs_of_mode (rtx subreg)
1232 struct subregs_of_mode_node dummy, *node;
1233 enum machine_mode mode;
1234 unsigned int regno;
1235 void **slot;
1237 if (!REG_P (SUBREG_REG (subreg)))
1238 return;
1240 regno = REGNO (SUBREG_REG (subreg));
1241 mode = GET_MODE (subreg);
1243 if (regno < FIRST_PSEUDO_REGISTER)
1244 return;
1246 dummy.block = regno & -8;
1247 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1248 dummy.block, INSERT);
1249 node = (struct subregs_of_mode_node *) *slot;
1250 if (node == NULL)
1252 node = XCNEW (struct subregs_of_mode_node);
1253 node->block = regno & -8;
1254 *slot = node;
1257 node->modes[mode] |= 1 << (regno & 7);
1260 /* Call record_subregs_of_mode for all the subregs in X. */
1261 static void
1262 find_subregs_of_mode (rtx x)
1264 enum rtx_code code = GET_CODE (x);
1265 const char * const fmt = GET_RTX_FORMAT (code);
1266 int i;
1268 if (code == SUBREG)
1269 record_subregs_of_mode (x);
1271 /* Time for some deep diving. */
1272 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1274 if (fmt[i] == 'e')
1275 find_subregs_of_mode (XEXP (x, i));
1276 else if (fmt[i] == 'E')
1278 int j;
1279 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1280 find_subregs_of_mode (XVECEXP (x, i, j));
1285 void
1286 init_subregs_of_mode (void)
1288 basic_block bb;
1289 rtx insn;
1291 if (subregs_of_mode)
1292 htab_empty (subregs_of_mode);
1293 else
1294 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1296 FOR_EACH_BB (bb)
1297 FOR_BB_INSNS (bb, insn)
1298 if (INSN_P (insn))
1299 find_subregs_of_mode (PATTERN (insn));
1302 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1303 mode. */
1304 bool
1305 invalid_mode_change_p (unsigned int regno,
1306 enum reg_class rclass ATTRIBUTE_UNUSED,
1307 enum machine_mode from)
1309 struct subregs_of_mode_node dummy, *node;
1310 unsigned int to;
1311 unsigned char mask;
1313 gcc_assert (subregs_of_mode);
1314 dummy.block = regno & -8;
1315 node = (struct subregs_of_mode_node *)
1316 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1317 if (node == NULL)
1318 return false;
1320 mask = 1 << (regno & 7);
1321 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1322 if (node->modes[to] & mask)
1323 if (CANNOT_CHANGE_MODE_CLASS (from, (enum machine_mode) to, rclass))
1324 return true;
1326 return false;
1329 void
1330 finish_subregs_of_mode (void)
1332 htab_delete (subregs_of_mode);
1333 subregs_of_mode = 0;
1335 #else
1336 void
1337 init_subregs_of_mode (void)
1340 void
1341 finish_subregs_of_mode (void)
1345 #endif /* CANNOT_CHANGE_MODE_CLASS */