gcc/reg-stack.c

   1 /* Register to Stack convert for GNU compiler.
   2    Copyright (C) 1992-2013 Free Software Foundation, Inc.
   3
   4    This file is part of GCC.
   5
   6    GCC is free software; you can redistribute it and/or modify it
   7    under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3, or (at your option)
   9    any later version.
  10
  11    GCC is distributed in the hope that it will be useful, but WITHOUT
  12    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  13    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  14    License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with GCC; see the file COPYING3.  If not see
  18    <http://www.gnu.org/licenses/>.  */
  19
  20 /* This pass converts stack-like registers from the "flat register
  21    file" model that gcc uses, to a stack convention that the 387 uses.
  22
  23    * The form of the input:
  24
  25    On input, the function consists of insn that have had their
  26    registers fully allocated to a set of "virtual" registers.  Note that
  27    the word "virtual" is used differently here than elsewhere in gcc: for
  28    each virtual stack reg, there is a hard reg, but the mapping between
  29    them is not known until this pass is run.  On output, hard register
  30    numbers have been substituted, and various pop and exchange insns have
  31    been emitted.  The hard register numbers and the virtual register
  32    numbers completely overlap - before this pass, all stack register
  33    numbers are virtual, and afterward they are all hard.
  34
  35    The virtual registers can be manipulated normally by gcc, and their
  36    semantics are the same as for normal registers.  After the hard
  37    register numbers are substituted, the semantics of an insn containing
  38    stack-like regs are not the same as for an insn with normal regs: for
  39    instance, it is not safe to delete an insn that appears to be a no-op
  40    move.  In general, no insn containing hard regs should be changed
  41    after this pass is done.
  42
  43    * The form of the output:
  44
  45    After this pass, hard register numbers represent the distance from
  46    the current top of stack to the desired register.  A reference to
  47    FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
  48    represents the register just below that, and so forth.  Also, REG_DEAD
  49    notes indicate whether or not a stack register should be popped.
  50
  51    A "swap" insn looks like a parallel of two patterns, where each
  52    pattern is a SET: one sets A to B, the other B to A.
  53
  54    A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
  55    and whose SET_DEST is REG or MEM.  Any other SET_DEST, such as PLUS,
  56    will replace the existing stack top, not push a new value.
  57
  58    A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
  59    SET_SRC is REG or MEM.
  60
  61    The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
  62    appears ambiguous.  As a special case, the presence of a REG_DEAD note
  63    for FIRST_STACK_REG differentiates between a load insn and a pop.
  64
  65    If a REG_DEAD is present, the insn represents a "pop" that discards
  66    the top of the register stack.  If there is no REG_DEAD note, then the
  67    insn represents a "dup" or a push of the current top of stack onto the
  68    stack.
  69
  70    * Methodology:
  71
  72    Existing REG_DEAD and REG_UNUSED notes for stack registers are
  73    deleted and recreated from scratch.  REG_DEAD is never created for a
  74    SET_DEST, only REG_UNUSED.
  75
  76    * asm_operands:
  77
  78    There are several rules on the usage of stack-like regs in
  79    asm_operands insns.  These rules apply only to the operands that are
  80    stack-like regs:
  81
  82    1. Given a set of input regs that die in an asm_operands, it is
  83       necessary to know which are implicitly popped by the asm, and
  84       which must be explicitly popped by gcc.
  85
  86         An input reg that is implicitly popped by the asm must be
  87         explicitly clobbered, unless it is constrained to match an
  88         output operand.
  89
  90    2. For any input reg that is implicitly popped by an asm, it is
  91       necessary to know how to adjust the stack to compensate for the pop.
  92       If any non-popped input is closer to the top of the reg-stack than
  93       the implicitly popped reg, it would not be possible to know what the
  94       stack looked like - it's not clear how the rest of the stack "slides
  95       up".
  96
  97         All implicitly popped input regs must be closer to the top of
  98         the reg-stack than any input that is not implicitly popped.
  99
 100    3. It is possible that if an input dies in an insn, reload might
 101       use the input reg for an output reload.  Consider this example:
 102
 103                 asm ("foo" : "=t" (a) : "f" (b));
 104
 105       This asm says that input B is not popped by the asm, and that
 106       the asm pushes a result onto the reg-stack, i.e., the stack is one
 107       deeper after the asm than it was before.  But, it is possible that
 108       reload will think that it can use the same reg for both the input and
 109       the output, if input B dies in this insn.
 110
 111         If any input operand uses the "f" constraint, all output reg
 112         constraints must use the "&" earlyclobber.
 113
 114       The asm above would be written as
 115
 116                 asm ("foo" : "=&t" (a) : "f" (b));
 117
 118    4. Some operands need to be in particular places on the stack.  All
 119       output operands fall in this category - there is no other way to
 120       know which regs the outputs appear in unless the user indicates
 121       this in the constraints.
 122
 123         Output operands must specifically indicate which reg an output
 124         appears in after an asm.  "=f" is not allowed: the operand
 125         constraints must select a class with a single reg.
 126
 127    5. Output operands may not be "inserted" between existing stack regs.
 128       Since no 387 opcode uses a read/write operand, all output operands
 129       are dead before the asm_operands, and are pushed by the asm_operands.
 130       It makes no sense to push anywhere but the top of the reg-stack.
 131
 132         Output operands must start at the top of the reg-stack: output
 133         operands may not "skip" a reg.
 134
 135    6. Some asm statements may need extra stack space for internal
 136       calculations.  This can be guaranteed by clobbering stack registers
 137       unrelated to the inputs and outputs.
 138
 139    Here are a couple of reasonable asms to want to write.  This asm
 140    takes one input, which is internally popped, and produces two outputs.
 141
 142         asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
 143
 144    This asm takes two inputs, which are popped by the fyl2xp1 opcode,
 145    and replaces them with one output.  The user must code the "st(1)"
 146    clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
 147
 148         asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
 149
 150 */
 151 \f
 152 #include "config.h"
 153 #include "system.h"
 154 #include "coretypes.h"
 155 #include "tm.h"
 156 #include "tree.h"
 157 #include "rtl-error.h"
 158 #include "tm_p.h"
 159 #include "function.h"
 160 #include "insn-config.h"
 161 #include "regs.h"
 162 #include "hard-reg-set.h"
 163 #include "flags.h"
 164 #include "recog.h"
 165 #include "basic-block.h"
 166 #include "reload.h"
 167 #include "ggc.h"
 168 #include "tree-pass.h"
 169 #include "target.h"
 170 #include "df.h"
 171 #include "emit-rtl.h"  /* FIXME: Can go away once crtl is moved to rtl.h.  */
 172
 173 #ifdef STACK_REGS
 174
 175 /* We use this array to cache info about insns, because otherwise we
 176    spend too much time in stack_regs_mentioned_p.
 177
 178    Indexed by insn UIDs.  A value of zero is uninitialized, one indicates
 179    the insn uses stack registers, two indicates the insn does not use
 180    stack registers.  */
 181 static vec<char> stack_regs_mentioned_data;
 182
 183 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
 184
 185 int regstack_completed = 0;
 186
 187 /* This is the basic stack record.  TOP is an index into REG[] such
 188    that REG[TOP] is the top of stack.  If TOP is -1 the stack is empty.
 189
 190    If TOP is -2, REG[] is not yet initialized.  Stack initialization
 191    consists of placing each live reg in array `reg' and setting `top'
 192    appropriately.
 193
 194    REG_SET indicates which registers are live.  */
 195
 196 typedef struct stack_def
 197 {
 198   int top;                      /* index to top stack element */
 199   HARD_REG_SET reg_set;         /* set of live registers */
 200   unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
 201 } *stack_ptr;
 202
 203 /* This is used to carry information about basic blocks.  It is
 204    attached to the AUX field of the standard CFG block.  */
 205
 206 typedef struct block_info_def
 207 {
 208   struct stack_def stack_in;    /* Input stack configuration.  */
 209   struct stack_def stack_out;   /* Output stack configuration.  */
 210   HARD_REG_SET out_reg_set;     /* Stack regs live on output.  */
 211   int done;                     /* True if block already converted.  */
 212   int predecessors;             /* Number of predecessors that need
 213                                    to be visited.  */
 214 } *block_info;
 215
 216 #define BLOCK_INFO(B)   ((block_info) (B)->aux)
 217
 218 /* Passed to change_stack to indicate where to emit insns.  */
 219 enum emit_where
 220 {
 221   EMIT_AFTER,
 222   EMIT_BEFORE
 223 };
 224
 225 /* The block we're currently working on.  */
 226 static basic_block current_block;
 227
 228 /* In the current_block, whether we're processing the first register
 229    stack or call instruction, i.e. the regstack is currently the
 230    same as BLOCK_INFO(current_block)->stack_in.  */
 231 static bool starting_stack_p;
 232
 233 /* This is the register file for all register after conversion.  */
 234 static rtx
 235   FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
 236
 237 #define FP_MODE_REG(regno,mode) \
 238   (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
 239
 240 /* Used to initialize uninitialized registers.  */
 241 static rtx not_a_num;
 242
 243 /* Forward declarations */
 244
 245 static int stack_regs_mentioned_p (const_rtx pat);
 246 static void pop_stack (stack_ptr, int);
 247 static rtx *get_true_reg (rtx *);
 248
 249 static int check_asm_stack_operands (rtx);
 250 static void get_asm_operands_in_out (rtx, int *, int *);
 251 static rtx stack_result (tree);
 252 static void replace_reg (rtx *, int);
 253 static void remove_regno_note (rtx, enum reg_note, unsigned int);
 254 static int get_hard_regnum (stack_ptr, rtx);
 255 static rtx emit_pop_insn (rtx, stack_ptr, rtx, enum emit_where);
 256 static void swap_to_top(rtx, stack_ptr, rtx, rtx);
 257 static bool move_for_stack_reg (rtx, stack_ptr, rtx);
 258 static bool move_nan_for_stack_reg (rtx, stack_ptr, rtx);
 259 static int swap_rtx_condition_1 (rtx);
 260 static int swap_rtx_condition (rtx);
 261 static void compare_for_stack_reg (rtx, stack_ptr, rtx);
 262 static bool subst_stack_regs_pat (rtx, stack_ptr, rtx);
 263 static void subst_asm_stack_regs (rtx, stack_ptr);
 264 static bool subst_stack_regs (rtx, stack_ptr);
 265 static void change_stack (rtx, stack_ptr, stack_ptr, enum emit_where);
 266 static void print_stack (FILE *, stack_ptr);
 267 static rtx next_flags_user (rtx);
 268 \f
 269 /* Return nonzero if any stack register is mentioned somewhere within PAT.  */
 270
 271 static int
 272 stack_regs_mentioned_p (const_rtx pat)
 273 {
 274   const char *fmt;
 275   int i;
 276
 277   if (STACK_REG_P (pat))
 278     return 1;
 279
 280   fmt = GET_RTX_FORMAT (GET_CODE (pat));
 281   for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
 282     {
 283       if (fmt[i] == 'E')
 284         {
 285           int j;
 286
 287           for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
 288             if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
 289               return 1;
 290         }
 291       else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
 292         return 1;
 293     }
 294
 295   return 0;
 296 }
 297
 298 /* Return nonzero if INSN mentions stacked registers, else return zero.  */
 299
 300 int
 301 stack_regs_mentioned (const_rtx insn)
 302 {
 303   unsigned int uid, max;
 304   int test;
 305
 306   if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
 307     return 0;
 308
 309   uid = INSN_UID (insn);
 310   max = stack_regs_mentioned_data.length ();
 311   if (uid >= max)
 312     {
 313       /* Allocate some extra size to avoid too many reallocs, but
 314          do not grow too quickly.  */
 315       max = uid + uid / 20 + 1;
 316       stack_regs_mentioned_data.safe_grow_cleared (max);
 317     }
 318
 319   test = stack_regs_mentioned_data[uid];
 320   if (test == 0)
 321     {
 322       /* This insn has yet to be examined.  Do so now.  */
 323       test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
 324       stack_regs_mentioned_data[uid] = test;
 325     }
 326
 327   return test == 1;
 328 }
 329 \f
 330 static rtx ix86_flags_rtx;
 331
 332 static rtx
 333 next_flags_user (rtx insn)
 334 {
 335   /* Search forward looking for the first use of this value.
 336      Stop at block boundaries.  */
 337
 338   while (insn != BB_END (current_block))
 339     {
 340       insn = NEXT_INSN (insn);
 341
 342       if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
 343         return insn;
 344
 345       if (CALL_P (insn))
 346         return NULL_RTX;
 347     }
 348   return NULL_RTX;
 349 }
 350 \f
 351 /* Reorganize the stack into ascending numbers, before this insn.  */
 352
 353 static void
 354 straighten_stack (rtx insn, stack_ptr regstack)
 355 {
 356   struct stack_def temp_stack;
 357   int top;
 358
 359   /* If there is only a single register on the stack, then the stack is
 360      already in increasing order and no reorganization is needed.
 361
 362      Similarly if the stack is empty.  */
 363   if (regstack->top <= 0)
 364     return;
 365
 366   COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
 367
 368   for (top = temp_stack.top = regstack->top; top >= 0; top--)
 369     temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
 370
 371   change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
 372 }
 373
 374 /* Pop a register from the stack.  */
 375
 376 static void
 377 pop_stack (stack_ptr regstack, int regno)
 378 {
 379   int top = regstack->top;
 380
 381   CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
 382   regstack->top--;
 383   /* If regno was not at the top of stack then adjust stack.  */
 384   if (regstack->reg [top] != regno)
 385     {
 386       int i;
 387       for (i = regstack->top; i >= 0; i--)
 388         if (regstack->reg [i] == regno)
 389           {
 390             int j;
 391             for (j = i; j < top; j++)
 392               regstack->reg [j] = regstack->reg [j + 1];
 393             break;
 394           }
 395     }
 396 }
 397 \f
 398 /* Return a pointer to the REG expression within PAT.  If PAT is not a
 399    REG, possible enclosed by a conversion rtx, return the inner part of
 400    PAT that stopped the search.  */
 401
 402 static rtx *
 403 get_true_reg (rtx *pat)
 404 {
 405   for (;;)
 406     switch (GET_CODE (*pat))
 407       {
 408       case SUBREG:
 409         /* Eliminate FP subregister accesses in favor of the
 410            actual FP register in use.  */
 411         {
 412           rtx subreg;
 413           if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
 414             {
 415               int regno_off = subreg_regno_offset (REGNO (subreg),
 416                                                    GET_MODE (subreg),
 417                                                    SUBREG_BYTE (*pat),
 418                                                    GET_MODE (*pat));
 419               *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
 420                                   GET_MODE (subreg));
 421               return pat;
 422             }
 423         }
 424       case FLOAT:
 425       case FIX:
 426       case FLOAT_EXTEND:
 427         pat = & XEXP (*pat, 0);
 428         break;
 429
 430       case UNSPEC:
 431         if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
 432             || XINT (*pat, 1) == UNSPEC_LDA)
 433           pat = & XVECEXP (*pat, 0, 0);
 434         return pat;
 435
 436       case FLOAT_TRUNCATE:
 437         if (!flag_unsafe_math_optimizations)
 438           return pat;
 439         pat = & XEXP (*pat, 0);
 440         break;
 441
 442       default:
 443         return pat;
 444       }
 445 }
 446 \f
 447 /* Set if we find any malformed asms in a block.  */
 448 static bool any_malformed_asm;
 449
 450 /* There are many rules that an asm statement for stack-like regs must
 451    follow.  Those rules are explained at the top of this file: the rule
 452    numbers below refer to that explanation.  */
 453
 454 static int
 455 check_asm_stack_operands (rtx insn)
 456 {
 457   int i;
 458   int n_clobbers;
 459   int malformed_asm = 0;
 460   rtx body = PATTERN (insn);
 461
 462   char reg_used_as_output[FIRST_PSEUDO_REGISTER];
 463   char implicitly_dies[FIRST_PSEUDO_REGISTER];
 464   int alt;
 465
 466   rtx *clobber_reg = 0;
 467   int n_inputs, n_outputs;
 468
 469   /* Find out what the constraints require.  If no constraint
 470      alternative matches, this asm is malformed.  */
 471   extract_insn (insn);
 472   constrain_operands (1);
 473   alt = which_alternative;
 474
 475   preprocess_constraints ();
 476
 477   get_asm_operands_in_out (body, &n_outputs, &n_inputs);
 478
 479   if (alt < 0)
 480     {
 481       malformed_asm = 1;
 482       /* Avoid further trouble with this insn.  */
 483       PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
 484       return 0;
 485     }
 486
 487   /* Strip SUBREGs here to make the following code simpler.  */
 488   for (i = 0; i < recog_data.n_operands; i++)
 489     if (GET_CODE (recog_data.operand[i]) == SUBREG
 490         && REG_P (SUBREG_REG (recog_data.operand[i])))
 491       recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
 492
 493   /* Set up CLOBBER_REG.  */
 494
 495   n_clobbers = 0;
 496
 497   if (GET_CODE (body) == PARALLEL)
 498     {
 499       clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
 500
 501       for (i = 0; i < XVECLEN (body, 0); i++)
 502         if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
 503           {
 504             rtx clobber = XVECEXP (body, 0, i);
 505             rtx reg = XEXP (clobber, 0);
 506
 507             if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
 508               reg = SUBREG_REG (reg);
 509
 510             if (STACK_REG_P (reg))
 511               {
 512                 clobber_reg[n_clobbers] = reg;
 513                 n_clobbers++;
 514               }
 515           }
 516     }
 517
 518   /* Enforce rule #4: Output operands must specifically indicate which
 519      reg an output appears in after an asm.  "=f" is not allowed: the
 520      operand constraints must select a class with a single reg.
 521
 522      Also enforce rule #5: Output operands must start at the top of
 523      the reg-stack: output operands may not "skip" a reg.  */
 524
 525   memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
 526   for (i = 0; i < n_outputs; i++)
 527     if (STACK_REG_P (recog_data.operand[i]))
 528       {
 529         if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
 530           {
 531             error_for_asm (insn, "output constraint %d must specify a single register", i);
 532             malformed_asm = 1;
 533           }
 534         else
 535           {
 536             int j;
 537
 538             for (j = 0; j < n_clobbers; j++)
 539               if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
 540                 {
 541                   error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
 542                                  i, reg_names [REGNO (clobber_reg[j])]);
 543                   malformed_asm = 1;
 544                   break;
 545                 }
 546             if (j == n_clobbers)
 547               reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
 548           }
 549       }
 550
 551
 552   /* Search for first non-popped reg.  */
 553   for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
 554     if (! reg_used_as_output[i])
 555       break;
 556
 557   /* If there are any other popped regs, that's an error.  */
 558   for (; i < LAST_STACK_REG + 1; i++)
 559     if (reg_used_as_output[i])
 560       break;
 561
 562   if (i != LAST_STACK_REG + 1)
 563     {
 564       error_for_asm (insn, "output regs must be grouped at top of stack");
 565       malformed_asm = 1;
 566     }
 567
 568   /* Enforce rule #2: All implicitly popped input regs must be closer
 569      to the top of the reg-stack than any input that is not implicitly
 570      popped.  */
 571
 572   memset (implicitly_dies, 0, sizeof (implicitly_dies));
 573   for (i = n_outputs; i < n_outputs + n_inputs; i++)
 574     if (STACK_REG_P (recog_data.operand[i]))
 575       {
 576         /* An input reg is implicitly popped if it is tied to an
 577            output, or if there is a CLOBBER for it.  */
 578         int j;
 579
 580         for (j = 0; j < n_clobbers; j++)
 581           if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
 582             break;
 583
 584         if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
 585           implicitly_dies[REGNO (recog_data.operand[i])] = 1;
 586       }
 587
 588   /* Search for first non-popped reg.  */
 589   for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
 590     if (! implicitly_dies[i])
 591       break;
 592
 593   /* If there are any other popped regs, that's an error.  */
 594   for (; i < LAST_STACK_REG + 1; i++)
 595     if (implicitly_dies[i])
 596       break;
 597
 598   if (i != LAST_STACK_REG + 1)
 599     {
 600       error_for_asm (insn,
 601                      "implicitly popped regs must be grouped at top of stack");
 602       malformed_asm = 1;
 603     }
 604
 605   /* Enforce rule #3: If any input operand uses the "f" constraint, all
 606      output constraints must use the "&" earlyclobber.
 607
 608      ??? Detect this more deterministically by having constrain_asm_operands
 609      record any earlyclobber.  */
 610
 611   for (i = n_outputs; i < n_outputs + n_inputs; i++)
 612     if (recog_op_alt[i][alt].matches == -1)
 613       {
 614         int j;
 615
 616         for (j = 0; j < n_outputs; j++)
 617           if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
 618             {
 619               error_for_asm (insn,
 620                              "output operand %d must use %<&%> constraint", j);
 621               malformed_asm = 1;
 622             }
 623       }
 624
 625   if (malformed_asm)
 626     {
 627       /* Avoid further trouble with this insn.  */
 628       PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
 629       any_malformed_asm = true;
 630       return 0;
 631     }
 632
 633   return 1;
 634 }
 635 \f
 636 /* Calculate the number of inputs and outputs in BODY, an
 637    asm_operands.  N_OPERANDS is the total number of operands, and
 638    N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
 639    placed.  */
 640
 641 static void
 642 get_asm_operands_in_out (rtx body, int *pout, int *pin)
 643 {
 644   rtx asmop = extract_asm_operands (body);
 645
 646   *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
 647   *pout = (recog_data.n_operands
 648            - ASM_OPERANDS_INPUT_LENGTH (asmop)
 649            - ASM_OPERANDS_LABEL_LENGTH (asmop));
 650 }
 651
 652 /* If current function returns its result in an fp stack register,
 653    return the REG.  Otherwise, return 0.  */
 654
 655 static rtx
 656 stack_result (tree decl)
 657 {
 658   rtx result;
 659
 660   /* If the value is supposed to be returned in memory, then clearly
 661      it is not returned in a stack register.  */
 662   if (aggregate_value_p (DECL_RESULT (decl), decl))
 663     return 0;
 664
 665   result = DECL_RTL_IF_SET (DECL_RESULT (decl));
 666   if (result != 0)
 667     result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
 668                                            decl, true);
 669
 670   return result != 0 && STACK_REG_P (result) ? result : 0;
 671 }
 672 \f
 673
 674 /*
 675  * This section deals with stack register substitution, and forms the second
 676  * pass over the RTL.
 677  */
 678
 679 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
 680    the desired hard REGNO.  */
 681
 682 static void
 683 replace_reg (rtx *reg, int regno)
 684 {
 685   gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
 686   gcc_assert (STACK_REG_P (*reg));
 687
 688   gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
 689               || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
 690
 691   *reg = FP_MODE_REG (regno, GET_MODE (*reg));
 692 }
 693
 694 /* Remove a note of type NOTE, which must be found, for register
 695    number REGNO from INSN.  Remove only one such note.  */
 696
 697 static void
 698 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
 699 {
 700   rtx *note_link, this_rtx;
 701
 702   note_link = &REG_NOTES (insn);
 703   for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
 704     if (REG_NOTE_KIND (this_rtx) == note
 705         && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
 706       {
 707         *note_link = XEXP (this_rtx, 1);
 708         return;
 709       }
 710     else
 711       note_link = &XEXP (this_rtx, 1);
 712
 713   gcc_unreachable ();
 714 }
 715
 716 /* Find the hard register number of virtual register REG in REGSTACK.
 717    The hard register number is relative to the top of the stack.  -1 is
 718    returned if the register is not found.  */
 719
 720 static int
 721 get_hard_regnum (stack_ptr regstack, rtx reg)
 722 {
 723   int i;
 724
 725   gcc_assert (STACK_REG_P (reg));
 726
 727   for (i = regstack->top; i >= 0; i--)
 728     if (regstack->reg[i] == REGNO (reg))
 729       break;
 730
 731   return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
 732 }
 733 \f
 734 /* Emit an insn to pop virtual register REG before or after INSN.
 735    REGSTACK is the stack state after INSN and is updated to reflect this
 736    pop.  WHEN is either emit_insn_before or emit_insn_after.  A pop insn
 737    is represented as a SET whose destination is the register to be popped
 738    and source is the top of stack.  A death note for the top of stack
 739    cases the movdf pattern to pop.  */
 740
 741 static rtx
 742 emit_pop_insn (rtx insn, stack_ptr regstack, rtx reg, enum emit_where where)
 743 {
 744   rtx pop_insn, pop_rtx;
 745   int hard_regno;
 746
 747   /* For complex types take care to pop both halves.  These may survive in
 748      CLOBBER and USE expressions.  */
 749   if (COMPLEX_MODE_P (GET_MODE (reg)))
 750     {
 751       rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
 752       rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
 753
 754       pop_insn = NULL_RTX;
 755       if (get_hard_regnum (regstack, reg1) >= 0)
 756         pop_insn = emit_pop_insn (insn, regstack, reg1, where);
 757       if (get_hard_regnum (regstack, reg2) >= 0)
 758         pop_insn = emit_pop_insn (insn, regstack, reg2, where);
 759       gcc_assert (pop_insn);
 760       return pop_insn;
 761     }
 762
 763   hard_regno = get_hard_regnum (regstack, reg);
 764
 765   gcc_assert (hard_regno >= FIRST_STACK_REG);
 766
 767   pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
 768                          FP_MODE_REG (FIRST_STACK_REG, DFmode));
 769
 770   if (where == EMIT_AFTER)
 771     pop_insn = emit_insn_after (pop_rtx, insn);
 772   else
 773     pop_insn = emit_insn_before (pop_rtx, insn);
 774
 775   add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
 776
 777   regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
 778     = regstack->reg[regstack->top];
 779   regstack->top -= 1;
 780   CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
 781
 782   return pop_insn;
 783 }
 784 \f
 785 /* Emit an insn before or after INSN to swap virtual register REG with
 786    the top of stack.  REGSTACK is the stack state before the swap, and
 787    is updated to reflect the swap.  A swap insn is represented as a
 788    PARALLEL of two patterns: each pattern moves one reg to the other.
 789
 790    If REG is already at the top of the stack, no insn is emitted.  */
 791
 792 static void
 793 emit_swap_insn (rtx insn, stack_ptr regstack, rtx reg)
 794 {
 795   int hard_regno;
 796   rtx swap_rtx;
 797   int tmp, other_reg;           /* swap regno temps */
 798   rtx i1;                       /* the stack-reg insn prior to INSN */
 799   rtx i1set = NULL_RTX;         /* the SET rtx within I1 */
 800
 801   hard_regno = get_hard_regnum (regstack, reg);
 802
 803   if (hard_regno == FIRST_STACK_REG)
 804     return;
 805   if (hard_regno == -1)
 806     {
 807       /* Something failed if the register wasn't on the stack.  If we had
 808          malformed asms, we zapped the instruction itself, but that didn't
 809          produce the same pattern of register sets as before.  To prevent
 810          further failure, adjust REGSTACK to include REG at TOP.  */
 811       gcc_assert (any_malformed_asm);
 812       regstack->reg[++regstack->top] = REGNO (reg);
 813       return;
 814     }
 815   gcc_assert (hard_regno >= FIRST_STACK_REG);
 816
 817   other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
 818
 819   tmp = regstack->reg[other_reg];
 820   regstack->reg[other_reg] = regstack->reg[regstack->top];
 821   regstack->reg[regstack->top] = tmp;
 822
 823   /* Find the previous insn involving stack regs, but don't pass a
 824      block boundary.  */
 825   i1 = NULL;
 826   if (current_block && insn != BB_HEAD (current_block))
 827     {
 828       rtx tmp = PREV_INSN (insn);
 829       rtx limit = PREV_INSN (BB_HEAD (current_block));
 830       while (tmp != limit)
 831         {
 832           if (LABEL_P (tmp)
 833               || CALL_P (tmp)
 834               || NOTE_INSN_BASIC_BLOCK_P (tmp)
 835               || (NONJUMP_INSN_P (tmp)
 836                   && stack_regs_mentioned (tmp)))
 837             {
 838               i1 = tmp;
 839               break;
 840             }
 841           tmp = PREV_INSN (tmp);
 842         }
 843     }
 844
 845   if (i1 != NULL_RTX
 846       && (i1set = single_set (i1)) != NULL_RTX)
 847     {
 848       rtx i1src = *get_true_reg (&SET_SRC (i1set));
 849       rtx i1dest = *get_true_reg (&SET_DEST (i1set));
 850
 851       /* If the previous register stack push was from the reg we are to
 852          swap with, omit the swap.  */
 853
 854       if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
 855           && REG_P (i1src)
 856           && REGNO (i1src) == (unsigned) hard_regno - 1
 857           && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
 858         return;
 859
 860       /* If the previous insn wrote to the reg we are to swap with,
 861          omit the swap.  */
 862
 863       if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
 864           && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
 865           && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
 866         return;
 867     }
 868
 869   /* Avoid emitting the swap if this is the first register stack insn
 870      of the current_block.  Instead update the current_block's stack_in
 871      and let compensate edges take care of this for us.  */
 872   if (current_block && starting_stack_p)
 873     {
 874       BLOCK_INFO (current_block)->stack_in = *regstack;
 875       starting_stack_p = false;
 876       return;
 877     }
 878
 879   swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
 880                          FP_MODE_REG (FIRST_STACK_REG, XFmode));
 881
 882   if (i1)
 883     emit_insn_after (swap_rtx, i1);
 884   else if (current_block)
 885     emit_insn_before (swap_rtx, BB_HEAD (current_block));
 886   else
 887     emit_insn_before (swap_rtx, insn);
 888 }
 889 \f
 890 /* Emit an insns before INSN to swap virtual register SRC1 with
 891    the top of stack and virtual register SRC2 with second stack
 892    slot. REGSTACK is the stack state before the swaps, and
 893    is updated to reflect the swaps.  A swap insn is represented as a
 894    PARALLEL of two patterns: each pattern moves one reg to the other.
 895
 896    If SRC1 and/or SRC2 are already at the right place, no swap insn
 897    is emitted.  */
 898
 899 static void
 900 swap_to_top (rtx insn, stack_ptr regstack, rtx src1, rtx src2)
 901 {
 902   struct stack_def temp_stack;
 903   int regno, j, k, temp;
 904
 905   temp_stack = *regstack;
 906
 907   /* Place operand 1 at the top of stack.  */
 908   regno = get_hard_regnum (&temp_stack, src1);
 909   gcc_assert (regno >= 0);
 910   if (regno != FIRST_STACK_REG)
 911     {
 912       k = temp_stack.top - (regno - FIRST_STACK_REG);
 913       j = temp_stack.top;
 914
 915       temp = temp_stack.reg[k];
 916       temp_stack.reg[k] = temp_stack.reg[j];
 917       temp_stack.reg[j] = temp;
 918     }
 919
 920   /* Place operand 2 next on the stack.  */
 921   regno = get_hard_regnum (&temp_stack, src2);
 922   gcc_assert (regno >= 0);
 923   if (regno != FIRST_STACK_REG + 1)
 924     {
 925       k = temp_stack.top - (regno - FIRST_STACK_REG);
 926       j = temp_stack.top - 1;
 927
 928       temp = temp_stack.reg[k];
 929       temp_stack.reg[k] = temp_stack.reg[j];
 930       temp_stack.reg[j] = temp;
 931     }
 932
 933   change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
 934 }
 935 \f
 936 /* Handle a move to or from a stack register in PAT, which is in INSN.
 937    REGSTACK is the current stack.  Return whether a control flow insn
 938    was deleted in the process.  */
 939
 940 static bool
 941 move_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat)
 942 {
 943   rtx *psrc =  get_true_reg (&SET_SRC (pat));
 944   rtx *pdest = get_true_reg (&SET_DEST (pat));
 945   rtx src, dest;
 946   rtx note;
 947   bool control_flow_insn_deleted = false;
 948
 949   src = *psrc; dest = *pdest;
 950
 951   if (STACK_REG_P (src) && STACK_REG_P (dest))
 952     {
 953       /* Write from one stack reg to another.  If SRC dies here, then
 954          just change the register mapping and delete the insn.  */
 955
 956       note = find_regno_note (insn, REG_DEAD, REGNO (src));
 957       if (note)
 958         {
 959           int i;
 960
 961           /* If this is a no-op move, there must not be a REG_DEAD note.  */
 962           gcc_assert (REGNO (src) != REGNO (dest));
 963
 964           for (i = regstack->top; i >= 0; i--)
 965             if (regstack->reg[i] == REGNO (src))
 966               break;
 967
 968           /* The destination must be dead, or life analysis is borked.  */
 969           gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
 970
 971           /* If the source is not live, this is yet another case of
 972              uninitialized variables.  Load up a NaN instead.  */
 973           if (i < 0)
 974             return move_nan_for_stack_reg (insn, regstack, dest);
 975
 976           /* It is possible that the dest is unused after this insn.
 977              If so, just pop the src.  */
 978
 979           if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
 980             emit_pop_insn (insn, regstack, src, EMIT_AFTER);
 981           else
 982             {
 983               regstack->reg[i] = REGNO (dest);
 984               SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
 985               CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
 986             }
 987
 988           control_flow_insn_deleted |= control_flow_insn_p (insn);
 989           delete_insn (insn);
 990           return control_flow_insn_deleted;
 991         }
 992
 993       /* The source reg does not die.  */
 994
 995       /* If this appears to be a no-op move, delete it, or else it
 996          will confuse the machine description output patterns. But if
 997          it is REG_UNUSED, we must pop the reg now, as per-insn processing
 998          for REG_UNUSED will not work for deleted insns.  */
 999
1000       if (REGNO (src) == REGNO (dest))
1001         {
1002           if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1003             emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1004
1005           control_flow_insn_deleted |= control_flow_insn_p (insn);
1006           delete_insn (insn);
1007           return control_flow_insn_deleted;
1008         }
1009
1010       /* The destination ought to be dead.  */
1011       gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1012
1013       replace_reg (psrc, get_hard_regnum (regstack, src));
1014
1015       regstack->reg[++regstack->top] = REGNO (dest);
1016       SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1017       replace_reg (pdest, FIRST_STACK_REG);
1018     }
1019   else if (STACK_REG_P (src))
1020     {
1021       /* Save from a stack reg to MEM, or possibly integer reg.  Since
1022          only top of stack may be saved, emit an exchange first if
1023          needs be.  */
1024
1025       emit_swap_insn (insn, regstack, src);
1026
1027       note = find_regno_note (insn, REG_DEAD, REGNO (src));
1028       if (note)
1029         {
1030           replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1031           regstack->top--;
1032           CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1033         }
1034       else if ((GET_MODE (src) == XFmode)
1035                && regstack->top < REG_STACK_SIZE - 1)
1036         {
1037           /* A 387 cannot write an XFmode value to a MEM without
1038              clobbering the source reg.  The output code can handle
1039              this by reading back the value from the MEM.
1040              But it is more efficient to use a temp register if one is
1041              available.  Push the source value here if the register
1042              stack is not full, and then write the value to memory via
1043              a pop.  */
1044           rtx push_rtx;
1045           rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1046
1047           push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1048           emit_insn_before (push_rtx, insn);
1049           add_reg_note (insn, REG_DEAD, top_stack_reg);
1050         }
1051
1052       replace_reg (psrc, FIRST_STACK_REG);
1053     }
1054   else
1055     {
1056       rtx pat = PATTERN (insn);
1057
1058       gcc_assert (STACK_REG_P (dest));
1059
1060       /* Load from MEM, or possibly integer REG or constant, into the
1061          stack regs.  The actual target is always the top of the
1062          stack. The stack mapping is changed to reflect that DEST is
1063          now at top of stack.  */
1064
1065       /* The destination ought to be dead.  However, there is a
1066          special case with i387 UNSPEC_TAN, where destination is live
1067          (an argument to fptan) but inherent load of 1.0 is modelled
1068          as a load from a constant.  */
1069       if (GET_CODE (pat) == PARALLEL
1070           && XVECLEN (pat, 0) == 2
1071           && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1072           && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1073           && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1074         emit_swap_insn (insn, regstack, dest);
1075       else
1076         gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1077
1078       gcc_assert (regstack->top < REG_STACK_SIZE);
1079
1080       regstack->reg[++regstack->top] = REGNO (dest);
1081       SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1082       replace_reg (pdest, FIRST_STACK_REG);
1083     }
1084
1085   return control_flow_insn_deleted;
1086 }
1087
1088 /* A helper function which replaces INSN with a pattern that loads up
1089    a NaN into DEST, then invokes move_for_stack_reg.  */
1090
1091 static bool
1092 move_nan_for_stack_reg (rtx insn, stack_ptr regstack, rtx dest)
1093 {
1094   rtx pat;
1095
1096   dest = FP_MODE_REG (REGNO (dest), SFmode);
1097   pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1098   PATTERN (insn) = pat;
1099   INSN_CODE (insn) = -1;
1100
1101   return move_for_stack_reg (insn, regstack, pat);
1102 }
1103 \f
1104 /* Swap the condition on a branch, if there is one.  Return true if we
1105    found a condition to swap.  False if the condition was not used as
1106    such.  */
1107
1108 static int
1109 swap_rtx_condition_1 (rtx pat)
1110 {
1111   const char *fmt;
1112   int i, r = 0;
1113
1114   if (COMPARISON_P (pat))
1115     {
1116       PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1117       r = 1;
1118     }
1119   else
1120     {
1121       fmt = GET_RTX_FORMAT (GET_CODE (pat));
1122       for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1123         {
1124           if (fmt[i] == 'E')
1125             {
1126               int j;
1127
1128               for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1129                 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1130             }
1131           else if (fmt[i] == 'e')
1132             r |= swap_rtx_condition_1 (XEXP (pat, i));
1133         }
1134     }
1135
1136   return r;
1137 }
1138
1139 static int
1140 swap_rtx_condition (rtx insn)
1141 {
1142   rtx pat = PATTERN (insn);
1143
1144   /* We're looking for a single set to cc0 or an HImode temporary.  */
1145
1146   if (GET_CODE (pat) == SET
1147       && REG_P (SET_DEST (pat))
1148       && REGNO (SET_DEST (pat)) == FLAGS_REG)
1149     {
1150       insn = next_flags_user (insn);
1151       if (insn == NULL_RTX)
1152         return 0;
1153       pat = PATTERN (insn);
1154     }
1155
1156   /* See if this is, or ends in, a fnstsw.  If so, we're not doing anything
1157      with the cc value right now.  We may be able to search for one
1158      though.  */
1159
1160   if (GET_CODE (pat) == SET
1161       && GET_CODE (SET_SRC (pat)) == UNSPEC
1162       && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1163     {
1164       rtx dest = SET_DEST (pat);
1165
1166       /* Search forward looking for the first use of this value.
1167          Stop at block boundaries.  */
1168       while (insn != BB_END (current_block))
1169         {
1170           insn = NEXT_INSN (insn);
1171           if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1172             break;
1173           if (CALL_P (insn))
1174             return 0;
1175         }
1176
1177       /* We haven't found it.  */
1178       if (insn == BB_END (current_block))
1179         return 0;
1180
1181       /* So we've found the insn using this value.  If it is anything
1182          other than sahf or the value does not die (meaning we'd have
1183          to search further), then we must give up.  */
1184       pat = PATTERN (insn);
1185       if (GET_CODE (pat) != SET
1186           || GET_CODE (SET_SRC (pat)) != UNSPEC
1187           || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1188           || ! dead_or_set_p (insn, dest))
1189         return 0;
1190
1191       /* Now we are prepared to handle this as a normal cc0 setter.  */
1192       insn = next_flags_user (insn);
1193       if (insn == NULL_RTX)
1194         return 0;
1195       pat = PATTERN (insn);
1196     }
1197
1198   if (swap_rtx_condition_1 (pat))
1199     {
1200       int fail = 0;
1201       INSN_CODE (insn) = -1;
1202       if (recog_memoized (insn) == -1)
1203         fail = 1;
1204       /* In case the flags don't die here, recurse to try fix
1205          following user too.  */
1206       else if (! dead_or_set_p (insn, ix86_flags_rtx))
1207         {
1208           insn = next_flags_user (insn);
1209           if (!insn || !swap_rtx_condition (insn))
1210             fail = 1;
1211         }
1212       if (fail)
1213         {
1214           swap_rtx_condition_1 (pat);
1215           return 0;
1216         }
1217       return 1;
1218     }
1219   return 0;
1220 }
1221
1222 /* Handle a comparison.  Special care needs to be taken to avoid
1223    causing comparisons that a 387 cannot do correctly, such as EQ.
1224
1225    Also, a pop insn may need to be emitted.  The 387 does have an
1226    `fcompp' insn that can pop two regs, but it is sometimes too expensive
1227    to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1228    set up.  */
1229
1230 static void
1231 compare_for_stack_reg (rtx insn, stack_ptr regstack, rtx pat_src)
1232 {
1233   rtx *src1, *src2;
1234   rtx src1_note, src2_note;
1235
1236   src1 = get_true_reg (&XEXP (pat_src, 0));
1237   src2 = get_true_reg (&XEXP (pat_src, 1));
1238
1239   /* ??? If fxch turns out to be cheaper than fstp, give priority to
1240      registers that die in this insn - move those to stack top first.  */
1241   if ((! STACK_REG_P (*src1)
1242        || (STACK_REG_P (*src2)
1243            && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1244       && swap_rtx_condition (insn))
1245     {
1246       rtx temp;
1247       temp = XEXP (pat_src, 0);
1248       XEXP (pat_src, 0) = XEXP (pat_src, 1);
1249       XEXP (pat_src, 1) = temp;
1250
1251       src1 = get_true_reg (&XEXP (pat_src, 0));
1252       src2 = get_true_reg (&XEXP (pat_src, 1));
1253
1254       INSN_CODE (insn) = -1;
1255     }
1256
1257   /* We will fix any death note later.  */
1258
1259   src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1260
1261   if (STACK_REG_P (*src2))
1262     src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1263   else
1264     src2_note = NULL_RTX;
1265
1266   emit_swap_insn (insn, regstack, *src1);
1267
1268   replace_reg (src1, FIRST_STACK_REG);
1269
1270   if (STACK_REG_P (*src2))
1271     replace_reg (src2, get_hard_regnum (regstack, *src2));
1272
1273   if (src1_note)
1274     {
1275       pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1276       replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1277     }
1278
1279   /* If the second operand dies, handle that.  But if the operands are
1280      the same stack register, don't bother, because only one death is
1281      needed, and it was just handled.  */
1282
1283   if (src2_note
1284       && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1285             && REGNO (*src1) == REGNO (*src2)))
1286     {
1287       /* As a special case, two regs may die in this insn if src2 is
1288          next to top of stack and the top of stack also dies.  Since
1289          we have already popped src1, "next to top of stack" is really
1290          at top (FIRST_STACK_REG) now.  */
1291
1292       if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1293           && src1_note)
1294         {
1295           pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1296           replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1297         }
1298       else
1299         {
1300           /* The 386 can only represent death of the first operand in
1301              the case handled above.  In all other cases, emit a separate
1302              pop and remove the death note from here.  */
1303           remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1304           emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1305                          EMIT_AFTER);
1306         }
1307     }
1308 }
1309 \f
1310 /* Substitute new registers in LOC, which is part of a debug insn.
1311    REGSTACK is the current register layout.  */
1312
1313 static int
1314 subst_stack_regs_in_debug_insn (rtx *loc, void *data)
1315 {
1316   stack_ptr regstack = (stack_ptr)data;
1317   int hard_regno;
1318
1319   if (!STACK_REG_P (*loc))
1320     return 0;
1321
1322   hard_regno = get_hard_regnum (regstack, *loc);
1323
1324   /* If we can't find an active register, reset this debug insn.  */
1325   if (hard_regno == -1)
1326     return 1;
1327
1328   gcc_assert (hard_regno >= FIRST_STACK_REG);
1329
1330   replace_reg (loc, hard_regno);
1331
1332   return -1;
1333 }
1334
1335 /* Substitute hardware stack regs in debug insn INSN, using stack
1336    layout REGSTACK.  If we can't find a hardware stack reg for any of
1337    the REGs in it, reset the debug insn.  */
1338
1339 static void
1340 subst_all_stack_regs_in_debug_insn (rtx insn, struct stack_def *regstack)
1341 {
1342   int ret = for_each_rtx (&INSN_VAR_LOCATION_LOC (insn),
1343                           subst_stack_regs_in_debug_insn,
1344                           regstack);
1345
1346   if (ret == 1)
1347     INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1348   else
1349     gcc_checking_assert (ret == 0);
1350 }
1351
1352 /* Substitute new registers in PAT, which is part of INSN.  REGSTACK
1353    is the current register layout.  Return whether a control flow insn
1354    was deleted in the process.  */
1355
1356 static bool
1357 subst_stack_regs_pat (rtx insn, stack_ptr regstack, rtx pat)
1358 {
1359   rtx *dest, *src;
1360   bool control_flow_insn_deleted = false;
1361
1362   switch (GET_CODE (pat))
1363     {
1364     case USE:
1365       /* Deaths in USE insns can happen in non optimizing compilation.
1366          Handle them by popping the dying register.  */
1367       src = get_true_reg (&XEXP (pat, 0));
1368       if (STACK_REG_P (*src)
1369           && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1370         {
1371           /* USEs are ignored for liveness information so USEs of dead
1372              register might happen.  */
1373           if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1374             emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1375           return control_flow_insn_deleted;
1376         }
1377       /* Uninitialized USE might happen for functions returning uninitialized
1378          value.  We will properly initialize the USE on the edge to EXIT_BLOCK,
1379          so it is safe to ignore the use here. This is consistent with behavior
1380          of dataflow analyzer that ignores USE too.  (This also imply that
1381          forcibly initializing the register to NaN here would lead to ICE later,
1382          since the REG_DEAD notes are not issued.)  */
1383       break;
1384
1385     case VAR_LOCATION:
1386       gcc_unreachable ();
1387
1388     case CLOBBER:
1389       {
1390         rtx note;
1391
1392         dest = get_true_reg (&XEXP (pat, 0));
1393         if (STACK_REG_P (*dest))
1394           {
1395             note = find_reg_note (insn, REG_DEAD, *dest);
1396
1397             if (pat != PATTERN (insn))
1398               {
1399                 /* The fix_truncdi_1 pattern wants to be able to
1400                    allocate its own scratch register.  It does this by
1401                    clobbering an fp reg so that it is assured of an
1402                    empty reg-stack register.  If the register is live,
1403                    kill it now.  Remove the DEAD/UNUSED note so we
1404                    don't try to kill it later too.
1405
1406                    In reality the UNUSED note can be absent in some
1407                    complicated cases when the register is reused for
1408                    partially set variable.  */
1409
1410                 if (note)
1411                   emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1412                 else
1413                   note = find_reg_note (insn, REG_UNUSED, *dest);
1414                 if (note)
1415                   remove_note (insn, note);
1416                 replace_reg (dest, FIRST_STACK_REG + 1);
1417               }
1418             else
1419               {
1420                 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1421                    indicates an uninitialized value.  Because reload removed
1422                    all other clobbers, this must be due to a function
1423                    returning without a value.  Load up a NaN.  */
1424
1425                 if (!note)
1426                   {
1427                     rtx t = *dest;
1428                     if (COMPLEX_MODE_P (GET_MODE (t)))
1429                       {
1430                         rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1431                         if (get_hard_regnum (regstack, u) == -1)
1432                           {
1433                             rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1434                             rtx insn2 = emit_insn_before (pat2, insn);
1435                             control_flow_insn_deleted
1436                               |= move_nan_for_stack_reg (insn2, regstack, u);
1437                           }
1438                       }
1439                     if (get_hard_regnum (regstack, t) == -1)
1440                       control_flow_insn_deleted
1441                         |= move_nan_for_stack_reg (insn, regstack, t);
1442                   }
1443               }
1444           }
1445         break;
1446       }
1447
1448     case SET:
1449       {
1450         rtx *src1 = (rtx *) 0, *src2;
1451         rtx src1_note, src2_note;
1452         rtx pat_src;
1453
1454         dest = get_true_reg (&SET_DEST (pat));
1455         src  = get_true_reg (&SET_SRC (pat));
1456         pat_src = SET_SRC (pat);
1457
1458         /* See if this is a `movM' pattern, and handle elsewhere if so.  */
1459         if (STACK_REG_P (*src)
1460             || (STACK_REG_P (*dest)
1461                 && (REG_P (*src) || MEM_P (*src)
1462                     || CONST_DOUBLE_P (*src))))
1463           {
1464             control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1465             break;
1466           }
1467
1468         switch (GET_CODE (pat_src))
1469           {
1470           case COMPARE:
1471             compare_for_stack_reg (insn, regstack, pat_src);
1472             break;
1473
1474           case CALL:
1475             {
1476               int count;
1477               for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1478                    --count >= 0;)
1479                 {
1480                   regstack->reg[++regstack->top] = REGNO (*dest) + count;
1481                   SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1482                 }
1483             }
1484             replace_reg (dest, FIRST_STACK_REG);
1485             break;
1486
1487           case REG:
1488             /* This is a `tstM2' case.  */
1489             gcc_assert (*dest == cc0_rtx);
1490             src1 = src;
1491
1492             /* Fall through.  */
1493
1494           case FLOAT_TRUNCATE:
1495           case SQRT:
1496           case ABS:
1497           case NEG:
1498             /* These insns only operate on the top of the stack. DEST might
1499                be cc0_rtx if we're processing a tstM pattern. Also, it's
1500                possible that the tstM case results in a REG_DEAD note on the
1501                source.  */
1502
1503             if (src1 == 0)
1504               src1 = get_true_reg (&XEXP (pat_src, 0));
1505
1506             emit_swap_insn (insn, regstack, *src1);
1507
1508             src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1509
1510             if (STACK_REG_P (*dest))
1511               replace_reg (dest, FIRST_STACK_REG);
1512
1513             if (src1_note)
1514               {
1515                 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1516                 regstack->top--;
1517                 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1518               }
1519
1520             replace_reg (src1, FIRST_STACK_REG);
1521             break;
1522
1523           case MINUS:
1524           case DIV:
1525             /* On i386, reversed forms of subM3 and divM3 exist for
1526                MODE_FLOAT, so the same code that works for addM3 and mulM3
1527                can be used.  */
1528           case MULT:
1529           case PLUS:
1530             /* These insns can accept the top of stack as a destination
1531                from a stack reg or mem, or can use the top of stack as a
1532                source and some other stack register (possibly top of stack)
1533                as a destination.  */
1534
1535             src1 = get_true_reg (&XEXP (pat_src, 0));
1536             src2 = get_true_reg (&XEXP (pat_src, 1));
1537
1538             /* We will fix any death note later.  */
1539
1540             if (STACK_REG_P (*src1))
1541               src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1542             else
1543               src1_note = NULL_RTX;
1544             if (STACK_REG_P (*src2))
1545               src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1546             else
1547               src2_note = NULL_RTX;
1548
1549             /* If either operand is not a stack register, then the dest
1550                must be top of stack.  */
1551
1552             if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1553               emit_swap_insn (insn, regstack, *dest);
1554             else
1555               {
1556                 /* Both operands are REG.  If neither operand is already
1557                    at the top of stack, choose to make the one that is the
1558                    dest the new top of stack.  */
1559
1560                 int src1_hard_regnum, src2_hard_regnum;
1561
1562                 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1563                 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1564
1565                 /* If the source is not live, this is yet another case of
1566                    uninitialized variables.  Load up a NaN instead.  */
1567                 if (src1_hard_regnum == -1)
1568                   {
1569                     rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1570                     rtx insn2 = emit_insn_before (pat2, insn);
1571                     control_flow_insn_deleted
1572                       |= move_nan_for_stack_reg (insn2, regstack, *src1);
1573                   }
1574                 if (src2_hard_regnum == -1)
1575                   {
1576                     rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1577                     rtx insn2 = emit_insn_before (pat2, insn);
1578                     control_flow_insn_deleted
1579                       |= move_nan_for_stack_reg (insn2, regstack, *src2);
1580                   }
1581
1582                 if (src1_hard_regnum != FIRST_STACK_REG
1583                     && src2_hard_regnum != FIRST_STACK_REG)
1584                   emit_swap_insn (insn, regstack, *dest);
1585               }
1586
1587             if (STACK_REG_P (*src1))
1588               replace_reg (src1, get_hard_regnum (regstack, *src1));
1589             if (STACK_REG_P (*src2))
1590               replace_reg (src2, get_hard_regnum (regstack, *src2));
1591
1592             if (src1_note)
1593               {
1594                 rtx src1_reg = XEXP (src1_note, 0);
1595
1596                 /* If the register that dies is at the top of stack, then
1597                    the destination is somewhere else - merely substitute it.
1598                    But if the reg that dies is not at top of stack, then
1599                    move the top of stack to the dead reg, as though we had
1600                    done the insn and then a store-with-pop.  */
1601
1602                 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1603                   {
1604                     SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1605                     replace_reg (dest, get_hard_regnum (regstack, *dest));
1606                   }
1607                 else
1608                   {
1609                     int regno = get_hard_regnum (regstack, src1_reg);
1610
1611                     SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1612                     replace_reg (dest, regno);
1613
1614                     regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1615                       = regstack->reg[regstack->top];
1616                   }
1617
1618                 CLEAR_HARD_REG_BIT (regstack->reg_set,
1619                                     REGNO (XEXP (src1_note, 0)));
1620                 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1621                 regstack->top--;
1622               }
1623             else if (src2_note)
1624               {
1625                 rtx src2_reg = XEXP (src2_note, 0);
1626                 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1627                   {
1628                     SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1629                     replace_reg (dest, get_hard_regnum (regstack, *dest));
1630                   }
1631                 else
1632                   {
1633                     int regno = get_hard_regnum (regstack, src2_reg);
1634
1635                     SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1636                     replace_reg (dest, regno);
1637
1638                     regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1639                       = regstack->reg[regstack->top];
1640                   }
1641
1642                 CLEAR_HARD_REG_BIT (regstack->reg_set,
1643                                     REGNO (XEXP (src2_note, 0)));
1644                 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1645                 regstack->top--;
1646               }
1647             else
1648               {
1649                 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1650                 replace_reg (dest, get_hard_regnum (regstack, *dest));
1651               }
1652
1653             /* Keep operand 1 matching with destination.  */
1654             if (COMMUTATIVE_ARITH_P (pat_src)
1655                 && REG_P (*src1) && REG_P (*src2)
1656                 && REGNO (*src1) != REGNO (*dest))
1657              {
1658                 int tmp = REGNO (*src1);
1659                 replace_reg (src1, REGNO (*src2));
1660                 replace_reg (src2, tmp);
1661              }
1662             break;
1663
1664           case UNSPEC:
1665             switch (XINT (pat_src, 1))
1666               {
1667               case UNSPEC_STA:
1668               case UNSPEC_FIST:
1669
1670               case UNSPEC_FIST_FLOOR:
1671               case UNSPEC_FIST_CEIL:
1672
1673                 /* These insns only operate on the top of the stack.  */
1674
1675                 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1676                 emit_swap_insn (insn, regstack, *src1);
1677
1678                 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1679
1680                 if (STACK_REG_P (*dest))
1681                   replace_reg (dest, FIRST_STACK_REG);
1682
1683                 if (src1_note)
1684                   {
1685                     replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1686                     regstack->top--;
1687                     CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1688                   }
1689
1690                 replace_reg (src1, FIRST_STACK_REG);
1691                 break;
1692
1693               case UNSPEC_FXAM:
1694
1695                 /* This insn only operate on the top of the stack.  */
1696
1697                 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1698                 emit_swap_insn (insn, regstack, *src1);
1699
1700                 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1701
1702                 replace_reg (src1, FIRST_STACK_REG);
1703
1704                 if (src1_note)
1705                   {
1706                     remove_regno_note (insn, REG_DEAD,
1707                                        REGNO (XEXP (src1_note, 0)));
1708                     emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1709                                    EMIT_AFTER);
1710                   }
1711
1712                 break;
1713
1714               case UNSPEC_SIN:
1715               case UNSPEC_COS:
1716               case UNSPEC_FRNDINT:
1717               case UNSPEC_F2XM1:
1718
1719               case UNSPEC_FRNDINT_FLOOR:
1720               case UNSPEC_FRNDINT_CEIL:
1721               case UNSPEC_FRNDINT_TRUNC:
1722               case UNSPEC_FRNDINT_MASK_PM:
1723
1724                 /* Above insns operate on the top of the stack.  */
1725
1726               case UNSPEC_SINCOS_COS:
1727               case UNSPEC_XTRACT_FRACT:
1728
1729                 /* Above insns operate on the top two stack slots,
1730                    first part of one input, double output insn.  */
1731
1732                 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1733
1734                 emit_swap_insn (insn, regstack, *src1);
1735
1736                 /* Input should never die, it is replaced with output.  */
1737                 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1738                 gcc_assert (!src1_note);
1739
1740                 if (STACK_REG_P (*dest))
1741                   replace_reg (dest, FIRST_STACK_REG);
1742
1743                 replace_reg (src1, FIRST_STACK_REG);
1744                 break;
1745
1746               case UNSPEC_SINCOS_SIN:
1747               case UNSPEC_XTRACT_EXP:
1748
1749                 /* These insns operate on the top two stack slots,
1750                    second part of one input, double output insn.  */
1751
1752                 regstack->top++;
1753                 /* FALLTHRU */
1754
1755               case UNSPEC_TAN:
1756
1757                 /* For UNSPEC_TAN, regstack->top is already increased
1758                    by inherent load of constant 1.0.  */
1759
1760                 /* Output value is generated in the second stack slot.
1761                    Move current value from second slot to the top.  */
1762                 regstack->reg[regstack->top]
1763                   = regstack->reg[regstack->top - 1];
1764
1765                 gcc_assert (STACK_REG_P (*dest));
1766
1767                 regstack->reg[regstack->top - 1] = REGNO (*dest);
1768                 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1769                 replace_reg (dest, FIRST_STACK_REG + 1);
1770
1771                 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1772
1773                 replace_reg (src1, FIRST_STACK_REG);
1774                 break;
1775
1776               case UNSPEC_FPATAN:
1777               case UNSPEC_FYL2X:
1778               case UNSPEC_FYL2XP1:
1779                 /* These insns operate on the top two stack slots.  */
1780
1781                 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1782                 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1783
1784                 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1785                 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1786
1787                 swap_to_top (insn, regstack, *src1, *src2);
1788
1789                 replace_reg (src1, FIRST_STACK_REG);
1790                 replace_reg (src2, FIRST_STACK_REG + 1);
1791
1792                 if (src1_note)
1793                   replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1794                 if (src2_note)
1795                   replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1796
1797                 /* Pop both input operands from the stack.  */
1798                 CLEAR_HARD_REG_BIT (regstack->reg_set,
1799                                     regstack->reg[regstack->top]);
1800                 CLEAR_HARD_REG_BIT (regstack->reg_set,
1801                                     regstack->reg[regstack->top - 1]);
1802                 regstack->top -= 2;
1803
1804                 /* Push the result back onto the stack.  */
1805                 regstack->reg[++regstack->top] = REGNO (*dest);
1806                 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1807                 replace_reg (dest, FIRST_STACK_REG);
1808                 break;
1809
1810               case UNSPEC_FSCALE_FRACT:
1811               case UNSPEC_FPREM_F:
1812               case UNSPEC_FPREM1_F:
1813                 /* These insns operate on the top two stack slots,
1814                    first part of double input, double output insn.  */
1815
1816                 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1817                 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1818
1819                 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1820                 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1821
1822                 /* Inputs should never die, they are
1823                    replaced with outputs.  */
1824                 gcc_assert (!src1_note);
1825                 gcc_assert (!src2_note);
1826
1827                 swap_to_top (insn, regstack, *src1, *src2);
1828
1829                 /* Push the result back onto stack. Empty stack slot
1830                    will be filled in second part of insn.  */
1831                 if (STACK_REG_P (*dest))
1832                   {
1833                     regstack->reg[regstack->top] = REGNO (*dest);
1834                     SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1835                     replace_reg (dest, FIRST_STACK_REG);
1836                   }
1837
1838                 replace_reg (src1, FIRST_STACK_REG);
1839                 replace_reg (src2, FIRST_STACK_REG + 1);
1840                 break;
1841
1842               case UNSPEC_FSCALE_EXP:
1843               case UNSPEC_FPREM_U:
1844               case UNSPEC_FPREM1_U:
1845                 /* These insns operate on the top two stack slots,
1846                    second part of double input, double output insn.  */
1847
1848                 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1849                 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1850
1851                 /* Push the result back onto stack. Fill empty slot from
1852                    first part of insn and fix top of stack pointer.  */
1853                 if (STACK_REG_P (*dest))
1854                   {
1855                     regstack->reg[regstack->top - 1] = REGNO (*dest);
1856                     SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1857                     replace_reg (dest, FIRST_STACK_REG + 1);
1858                   }
1859
1860                 replace_reg (src1, FIRST_STACK_REG);
1861                 replace_reg (src2, FIRST_STACK_REG + 1);
1862                 break;
1863
1864               case UNSPEC_C2_FLAG:
1865                 /* This insn operates on the top two stack slots,
1866                    third part of C2 setting double input insn.  */
1867
1868                 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1869                 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1870
1871                 replace_reg (src1, FIRST_STACK_REG);
1872                 replace_reg (src2, FIRST_STACK_REG + 1);
1873                 break;
1874
1875               case UNSPEC_SAHF:
1876                 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1877                    The combination matches the PPRO fcomi instruction.  */
1878
1879                 pat_src = XVECEXP (pat_src, 0, 0);
1880                 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1881                 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1882                 /* Fall through.  */
1883
1884               case UNSPEC_FNSTSW:
1885                 /* Combined fcomp+fnstsw generated for doing well with
1886                    CSE.  When optimizing this would have been broken
1887                    up before now.  */
1888
1889                 pat_src = XVECEXP (pat_src, 0, 0);
1890                 gcc_assert (GET_CODE (pat_src) == COMPARE);
1891
1892                 compare_for_stack_reg (insn, regstack, pat_src);
1893                 break;
1894
1895               default:
1896                 gcc_unreachable ();
1897               }
1898             break;
1899
1900           case IF_THEN_ELSE:
1901             /* This insn requires the top of stack to be the destination.  */
1902
1903             src1 = get_true_reg (&XEXP (pat_src, 1));
1904             src2 = get_true_reg (&XEXP (pat_src, 2));
1905
1906             src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1907             src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1908
1909             /* If the comparison operator is an FP comparison operator,
1910                it is handled correctly by compare_for_stack_reg () who
1911                will move the destination to the top of stack. But if the
1912                comparison operator is not an FP comparison operator, we
1913                have to handle it here.  */
1914             if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1915                 && REGNO (*dest) != regstack->reg[regstack->top])
1916               {
1917                 /* In case one of operands is the top of stack and the operands
1918                    dies, it is safe to make it the destination operand by
1919                    reversing the direction of cmove and avoid fxch.  */
1920                 if ((REGNO (*src1) == regstack->reg[regstack->top]
1921                      && src1_note)
1922                     || (REGNO (*src2) == regstack->reg[regstack->top]
1923                         && src2_note))
1924                   {
1925                     int idx1 = (get_hard_regnum (regstack, *src1)
1926                                 - FIRST_STACK_REG);
1927                     int idx2 = (get_hard_regnum (regstack, *src2)
1928                                 - FIRST_STACK_REG);
1929
1930                     /* Make reg-stack believe that the operands are already
1931                        swapped on the stack */
1932                     regstack->reg[regstack->top - idx1] = REGNO (*src2);
1933                     regstack->reg[regstack->top - idx2] = REGNO (*src1);
1934
1935                     /* Reverse condition to compensate the operand swap.
1936                        i386 do have comparison always reversible.  */
1937                     PUT_CODE (XEXP (pat_src, 0),
1938                               reversed_comparison_code (XEXP (pat_src, 0), insn));
1939                   }
1940                 else
1941                   emit_swap_insn (insn, regstack, *dest);
1942               }
1943
1944             {
1945               rtx src_note [3];
1946               int i;
1947
1948               src_note[0] = 0;
1949               src_note[1] = src1_note;
1950               src_note[2] = src2_note;
1951
1952               if (STACK_REG_P (*src1))
1953                 replace_reg (src1, get_hard_regnum (regstack, *src1));
1954               if (STACK_REG_P (*src2))
1955                 replace_reg (src2, get_hard_regnum (regstack, *src2));
1956
1957               for (i = 1; i <= 2; i++)
1958                 if (src_note [i])
1959                   {
1960                     int regno = REGNO (XEXP (src_note[i], 0));
1961
1962                     /* If the register that dies is not at the top of
1963                        stack, then move the top of stack to the dead reg.
1964                        Top of stack should never die, as it is the
1965                        destination.  */
1966                     gcc_assert (regno != regstack->reg[regstack->top]);
1967                     remove_regno_note (insn, REG_DEAD, regno);
1968                     emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1969                                     EMIT_AFTER);
1970                   }
1971             }
1972
1973             /* Make dest the top of stack.  Add dest to regstack if
1974                not present.  */
1975             if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1976               regstack->reg[++regstack->top] = REGNO (*dest);
1977             SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1978             replace_reg (dest, FIRST_STACK_REG);
1979             break;
1980
1981           default:
1982             gcc_unreachable ();
1983           }
1984         break;
1985       }
1986
1987     default:
1988       break;
1989     }
1990
1991   return control_flow_insn_deleted;
1992 }
1993 \f
1994 /* Substitute hard regnums for any stack regs in INSN, which has
1995    N_INPUTS inputs and N_OUTPUTS outputs.  REGSTACK is the stack info
1996    before the insn, and is updated with changes made here.
1997
1998    There are several requirements and assumptions about the use of
1999    stack-like regs in asm statements.  These rules are enforced by
2000    record_asm_stack_regs; see comments there for details.  Any
2001    asm_operands left in the RTL at this point may be assume to meet the
2002    requirements, since record_asm_stack_regs removes any problem asm.  */
2003
2004 static void
2005 subst_asm_stack_regs (rtx insn, stack_ptr regstack)
2006 {
2007   rtx body = PATTERN (insn);
2008   int alt;
2009
2010   rtx *note_reg;                /* Array of note contents */
2011   rtx **note_loc;               /* Address of REG field of each note */
2012   enum reg_note *note_kind;     /* The type of each note */
2013
2014   rtx *clobber_reg = 0;
2015   rtx **clobber_loc = 0;
2016
2017   struct stack_def temp_stack;
2018   int n_notes;
2019   int n_clobbers;
2020   rtx note;
2021   int i;
2022   int n_inputs, n_outputs;
2023
2024   if (! check_asm_stack_operands (insn))
2025     return;
2026
2027   /* Find out what the constraints required.  If no constraint
2028      alternative matches, that is a compiler bug: we should have caught
2029      such an insn in check_asm_stack_operands.  */
2030   extract_insn (insn);
2031   constrain_operands (1);
2032   alt = which_alternative;
2033
2034   preprocess_constraints ();
2035
2036   get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2037
2038   gcc_assert (alt >= 0);
2039
2040   /* Strip SUBREGs here to make the following code simpler.  */
2041   for (i = 0; i < recog_data.n_operands; i++)
2042     if (GET_CODE (recog_data.operand[i]) == SUBREG
2043         && REG_P (SUBREG_REG (recog_data.operand[i])))
2044       {
2045         recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2046         recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2047       }
2048
2049   /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND.  */
2050
2051   for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2052     i++;
2053
2054   note_reg = XALLOCAVEC (rtx, i);
2055   note_loc = XALLOCAVEC (rtx *, i);
2056   note_kind = XALLOCAVEC (enum reg_note, i);
2057
2058   n_notes = 0;
2059   for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2060     {
2061       if (GET_CODE (note) != EXPR_LIST)
2062         continue;
2063       rtx reg = XEXP (note, 0);
2064       rtx *loc = & XEXP (note, 0);
2065
2066       if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2067         {
2068           loc = & SUBREG_REG (reg);
2069           reg = SUBREG_REG (reg);
2070         }
2071
2072       if (STACK_REG_P (reg)
2073           && (REG_NOTE_KIND (note) == REG_DEAD
2074               || REG_NOTE_KIND (note) == REG_UNUSED))
2075         {
2076           note_reg[n_notes] = reg;
2077           note_loc[n_notes] = loc;
2078           note_kind[n_notes] = REG_NOTE_KIND (note);
2079           n_notes++;
2080         }
2081     }
2082
2083   /* Set up CLOBBER_REG and CLOBBER_LOC.  */
2084
2085   n_clobbers = 0;
2086
2087   if (GET_CODE (body) == PARALLEL)
2088     {
2089       clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2090       clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2091
2092       for (i = 0; i < XVECLEN (body, 0); i++)
2093         if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2094           {
2095             rtx clobber = XVECEXP (body, 0, i);
2096             rtx reg = XEXP (clobber, 0);
2097             rtx *loc = & XEXP (clobber, 0);
2098
2099             if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2100               {
2101                 loc = & SUBREG_REG (reg);
2102                 reg = SUBREG_REG (reg);
2103               }
2104
2105             if (STACK_REG_P (reg))
2106               {
2107                 clobber_reg[n_clobbers] = reg;
2108                 clobber_loc[n_clobbers] = loc;
2109                 n_clobbers++;
2110               }
2111           }
2112     }
2113
2114   temp_stack = *regstack;
2115
2116   /* Put the input regs into the desired place in TEMP_STACK.  */
2117
2118   for (i = n_outputs; i < n_outputs + n_inputs; i++)
2119     if (STACK_REG_P (recog_data.operand[i])
2120         && reg_class_subset_p (recog_op_alt[i][alt].cl,
2121                                FLOAT_REGS)
2122         && recog_op_alt[i][alt].cl != FLOAT_REGS)
2123       {
2124         /* If an operand needs to be in a particular reg in
2125            FLOAT_REGS, the constraint was either 't' or 'u'.  Since
2126            these constraints are for single register classes, and
2127            reload guaranteed that operand[i] is already in that class,
2128            we can just use REGNO (recog_data.operand[i]) to know which
2129            actual reg this operand needs to be in.  */
2130
2131         int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2132
2133         gcc_assert (regno >= 0);
2134
2135         if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2136           {
2137             /* recog_data.operand[i] is not in the right place.  Find
2138                it and swap it with whatever is already in I's place.
2139                K is where recog_data.operand[i] is now.  J is where it
2140                should be.  */
2141             int j, k, temp;
2142
2143             k = temp_stack.top - (regno - FIRST_STACK_REG);
2144             j = (temp_stack.top
2145                  - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2146
2147             temp = temp_stack.reg[k];
2148             temp_stack.reg[k] = temp_stack.reg[j];
2149             temp_stack.reg[j] = temp;
2150           }
2151       }
2152
2153   /* Emit insns before INSN to make sure the reg-stack is in the right
2154      order.  */
2155
2156   change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2157
2158   /* Make the needed input register substitutions.  Do death notes and
2159      clobbers too, because these are for inputs, not outputs.  */
2160
2161   for (i = n_outputs; i < n_outputs + n_inputs; i++)
2162     if (STACK_REG_P (recog_data.operand[i]))
2163       {
2164         int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2165
2166         gcc_assert (regnum >= 0);
2167
2168         replace_reg (recog_data.operand_loc[i], regnum);
2169       }
2170
2171   for (i = 0; i < n_notes; i++)
2172     if (note_kind[i] == REG_DEAD)
2173       {
2174         int regnum = get_hard_regnum (regstack, note_reg[i]);
2175
2176         gcc_assert (regnum >= 0);
2177
2178         replace_reg (note_loc[i], regnum);
2179       }
2180
2181   for (i = 0; i < n_clobbers; i++)
2182     {
2183       /* It's OK for a CLOBBER to reference a reg that is not live.
2184          Don't try to replace it in that case.  */
2185       int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2186
2187       if (regnum >= 0)
2188         {
2189           /* Sigh - clobbers always have QImode.  But replace_reg knows
2190              that these regs can't be MODE_INT and will assert.  Just put
2191              the right reg there without calling replace_reg.  */
2192
2193           *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2194         }
2195     }
2196
2197   /* Now remove from REGSTACK any inputs that the asm implicitly popped.  */
2198
2199   for (i = n_outputs; i < n_outputs + n_inputs; i++)
2200     if (STACK_REG_P (recog_data.operand[i]))
2201       {
2202         /* An input reg is implicitly popped if it is tied to an
2203            output, or if there is a CLOBBER for it.  */
2204         int j;
2205
2206         for (j = 0; j < n_clobbers; j++)
2207           if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2208             break;
2209
2210         if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2211           {
2212             /* recog_data.operand[i] might not be at the top of stack.
2213                But that's OK, because all we need to do is pop the
2214                right number of regs off of the top of the reg-stack.
2215                record_asm_stack_regs guaranteed that all implicitly
2216                popped regs were grouped at the top of the reg-stack.  */
2217
2218             CLEAR_HARD_REG_BIT (regstack->reg_set,
2219                                 regstack->reg[regstack->top]);
2220             regstack->top--;
2221           }
2222       }
2223
2224   /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2225      Note that there isn't any need to substitute register numbers.
2226      ???  Explain why this is true.  */
2227
2228   for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2229     {
2230       /* See if there is an output for this hard reg.  */
2231       int j;
2232
2233       for (j = 0; j < n_outputs; j++)
2234         if (STACK_REG_P (recog_data.operand[j])
2235             && REGNO (recog_data.operand[j]) == (unsigned) i)
2236           {
2237             regstack->reg[++regstack->top] = i;
2238             SET_HARD_REG_BIT (regstack->reg_set, i);
2239             break;
2240           }
2241     }
2242
2243   /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2244      input that the asm didn't implicitly pop.  If the asm didn't
2245      implicitly pop an input reg, that reg will still be live.
2246
2247      Note that we can't use find_regno_note here: the register numbers
2248      in the death notes have already been substituted.  */
2249
2250   for (i = 0; i < n_outputs; i++)
2251     if (STACK_REG_P (recog_data.operand[i]))
2252       {
2253         int j;
2254
2255         for (j = 0; j < n_notes; j++)
2256           if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2257               && note_kind[j] == REG_UNUSED)
2258             {
2259               insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2260                                     EMIT_AFTER);
2261               break;
2262             }
2263       }
2264
2265   for (i = n_outputs; i < n_outputs + n_inputs; i++)
2266     if (STACK_REG_P (recog_data.operand[i]))
2267       {
2268         int j;
2269
2270         for (j = 0; j < n_notes; j++)
2271           if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2272               && note_kind[j] == REG_DEAD
2273               && TEST_HARD_REG_BIT (regstack->reg_set,
2274                                     REGNO (recog_data.operand[i])))
2275             {
2276               insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2277                                     EMIT_AFTER);
2278               break;
2279             }
2280       }
2281 }
2282 \f
2283 /* Substitute stack hard reg numbers for stack virtual registers in
2284    INSN.  Non-stack register numbers are not changed.  REGSTACK is the
2285    current stack content.  Insns may be emitted as needed to arrange the
2286    stack for the 387 based on the contents of the insn.  Return whether
2287    a control flow insn was deleted in the process.  */
2288
2289 static bool
2290 subst_stack_regs (rtx insn, stack_ptr regstack)
2291 {
2292   rtx *note_link, note;
2293   bool control_flow_insn_deleted = false;
2294   int i;
2295
2296   if (CALL_P (insn))
2297     {
2298       int top = regstack->top;
2299
2300       /* If there are any floating point parameters to be passed in
2301          registers for this call, make sure they are in the right
2302          order.  */
2303
2304       if (top >= 0)
2305         {
2306           straighten_stack (insn, regstack);
2307
2308           /* Now mark the arguments as dead after the call.  */
2309
2310           while (regstack->top >= 0)
2311             {
2312               CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2313               regstack->top--;
2314             }
2315         }
2316     }
2317
2318   /* Do the actual substitution if any stack regs are mentioned.
2319      Since we only record whether entire insn mentions stack regs, and
2320      subst_stack_regs_pat only works for patterns that contain stack regs,
2321      we must check each pattern in a parallel here.  A call_value_pop could
2322      fail otherwise.  */
2323
2324   if (stack_regs_mentioned (insn))
2325     {
2326       int n_operands = asm_noperands (PATTERN (insn));
2327       if (n_operands >= 0)
2328         {
2329           /* This insn is an `asm' with operands.  Decode the operands,
2330              decide how many are inputs, and do register substitution.
2331              Any REG_UNUSED notes will be handled by subst_asm_stack_regs.  */
2332
2333           subst_asm_stack_regs (insn, regstack);
2334           return control_flow_insn_deleted;
2335         }
2336
2337       if (GET_CODE (PATTERN (insn)) == PARALLEL)
2338         for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2339           {
2340             if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2341               {
2342                 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2343                    XVECEXP (PATTERN (insn), 0, i)
2344                      = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2345                 control_flow_insn_deleted
2346                   |= subst_stack_regs_pat (insn, regstack,
2347                                            XVECEXP (PATTERN (insn), 0, i));
2348               }
2349           }
2350       else
2351         control_flow_insn_deleted
2352           |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2353     }
2354
2355   /* subst_stack_regs_pat may have deleted a no-op insn.  If so, any
2356      REG_UNUSED will already have been dealt with, so just return.  */
2357
2358   if (NOTE_P (insn) || INSN_DELETED_P (insn))
2359     return control_flow_insn_deleted;
2360
2361   /* If this a noreturn call, we can't insert pop insns after it.
2362      Instead, reset the stack state to empty.  */
2363   if (CALL_P (insn)
2364       && find_reg_note (insn, REG_NORETURN, NULL))
2365     {
2366       regstack->top = -1;
2367       CLEAR_HARD_REG_SET (regstack->reg_set);
2368       return control_flow_insn_deleted;
2369     }
2370
2371   /* If there is a REG_UNUSED note on a stack register on this insn,
2372      the indicated reg must be popped.  The REG_UNUSED note is removed,
2373      since the form of the newly emitted pop insn references the reg,
2374      making it no longer `unset'.  */
2375
2376   note_link = &REG_NOTES (insn);
2377   for (note = *note_link; note; note = XEXP (note, 1))
2378     if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2379       {
2380         *note_link = XEXP (note, 1);
2381         insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2382       }
2383     else
2384       note_link = &XEXP (note, 1);
2385
2386   return control_flow_insn_deleted;
2387 }
2388 \f
2389 /* Change the organization of the stack so that it fits a new basic
2390    block.  Some registers might have to be popped, but there can never be
2391    a register live in the new block that is not now live.
2392
2393    Insert any needed insns before or after INSN, as indicated by
2394    WHERE.  OLD is the original stack layout, and NEW is the desired
2395    form.  OLD is updated to reflect the code emitted, i.e., it will be
2396    the same as NEW upon return.
2397
2398    This function will not preserve block_end[].  But that information
2399    is no longer needed once this has executed.  */
2400
2401 static void
2402 change_stack (rtx insn, stack_ptr old, stack_ptr new_stack, enum emit_where where)
2403 {
2404   int reg;
2405   int update_end = 0;
2406   int i;
2407
2408   /* Stack adjustments for the first insn in a block update the
2409      current_block's stack_in instead of inserting insns directly.
2410      compensate_edges will add the necessary code later.  */
2411   if (current_block
2412       && starting_stack_p
2413       && where == EMIT_BEFORE)
2414     {
2415       BLOCK_INFO (current_block)->stack_in = *new_stack;
2416       starting_stack_p = false;
2417       *old = *new_stack;
2418       return;
2419     }
2420
2421   /* We will be inserting new insns "backwards".  If we are to insert
2422      after INSN, find the next insn, and insert before it.  */
2423
2424   if (where == EMIT_AFTER)
2425     {
2426       if (current_block && BB_END (current_block) == insn)
2427         update_end = 1;
2428       insn = NEXT_INSN (insn);
2429     }
2430
2431   /* Initialize partially dead variables.  */
2432   for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2433     if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2434         && !TEST_HARD_REG_BIT (old->reg_set, i))
2435       {
2436         old->reg[++old->top] = i;
2437         SET_HARD_REG_BIT (old->reg_set, i);
2438         emit_insn_before (gen_rtx_SET (VOIDmode,
2439                                        FP_MODE_REG (i, SFmode), not_a_num), insn);
2440       }
2441
2442   /* Pop any registers that are not needed in the new block.  */
2443
2444   /* If the destination block's stack already has a specified layout
2445      and contains two or more registers, use a more intelligent algorithm
2446      to pop registers that minimizes the number number of fxchs below.  */
2447   if (new_stack->top > 0)
2448     {
2449       bool slots[REG_STACK_SIZE];
2450       int pops[REG_STACK_SIZE];
2451       int next, dest, topsrc;
2452
2453       /* First pass to determine the free slots.  */
2454       for (reg = 0; reg <= new_stack->top; reg++)
2455         slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2456
2457       /* Second pass to allocate preferred slots.  */
2458       topsrc = -1;
2459       for (reg = old->top; reg > new_stack->top; reg--)
2460         if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2461           {
2462             dest = -1;
2463             for (next = 0; next <= new_stack->top; next++)
2464               if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2465                 {
2466                   /* If this is a preference for the new top of stack, record
2467                      the fact by remembering it's old->reg in topsrc.  */
2468                   if (next == new_stack->top)
2469                     topsrc = reg;
2470                   slots[next] = true;
2471                   dest = next;
2472                   break;
2473                 }
2474             pops[reg] = dest;
2475           }
2476         else
2477           pops[reg] = reg;
2478
2479       /* Intentionally, avoid placing the top of stack in it's correct
2480          location, if we still need to permute the stack below and we
2481          can usefully place it somewhere else.  This is the case if any
2482          slot is still unallocated, in which case we should place the
2483          top of stack there.  */
2484       if (topsrc != -1)
2485         for (reg = 0; reg < new_stack->top; reg++)
2486           if (!slots[reg])
2487             {
2488               pops[topsrc] = reg;
2489               slots[new_stack->top] = false;
2490               slots[reg] = true;
2491               break;
2492             }
2493
2494       /* Third pass allocates remaining slots and emits pop insns.  */
2495       next = new_stack->top;
2496       for (reg = old->top; reg > new_stack->top; reg--)
2497         {
2498           dest = pops[reg];
2499           if (dest == -1)
2500             {
2501               /* Find next free slot.  */
2502               while (slots[next])
2503                 next--;
2504               dest = next--;
2505             }
2506           emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2507                          EMIT_BEFORE);
2508         }
2509     }
2510   else
2511     {
2512       /* The following loop attempts to maximize the number of times we
2513          pop the top of the stack, as this permits the use of the faster
2514          ffreep instruction on platforms that support it.  */
2515       int live, next;
2516
2517       live = 0;
2518       for (reg = 0; reg <= old->top; reg++)
2519         if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2520           live++;
2521
2522       next = live;
2523       while (old->top >= live)
2524         if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2525           {
2526             while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2527               next--;
2528             emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2529                            EMIT_BEFORE);
2530           }
2531         else
2532           emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2533                          EMIT_BEFORE);
2534     }
2535
2536   if (new_stack->top == -2)
2537     {
2538       /* If the new block has never been processed, then it can inherit
2539          the old stack order.  */
2540
2541       new_stack->top = old->top;
2542       memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2543     }
2544   else
2545     {
2546       /* This block has been entered before, and we must match the
2547          previously selected stack order.  */
2548
2549       /* By now, the only difference should be the order of the stack,
2550          not their depth or liveliness.  */
2551
2552       gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2553       gcc_assert (old->top == new_stack->top);
2554
2555       /* If the stack is not empty (new_stack->top != -1), loop here emitting
2556          swaps until the stack is correct.
2557
2558          The worst case number of swaps emitted is N + 2, where N is the
2559          depth of the stack.  In some cases, the reg at the top of
2560          stack may be correct, but swapped anyway in order to fix
2561          other regs.  But since we never swap any other reg away from
2562          its correct slot, this algorithm will converge.  */
2563
2564       if (new_stack->top != -1)
2565         do
2566           {
2567             /* Swap the reg at top of stack into the position it is
2568                supposed to be in, until the correct top of stack appears.  */
2569
2570             while (old->reg[old->top] != new_stack->reg[new_stack->top])
2571               {
2572                 for (reg = new_stack->top; reg >= 0; reg--)
2573                   if (new_stack->reg[reg] == old->reg[old->top])
2574                     break;
2575
2576                 gcc_assert (reg != -1);
2577
2578                 emit_swap_insn (insn, old,
2579                                 FP_MODE_REG (old->reg[reg], DFmode));
2580               }
2581
2582             /* See if any regs remain incorrect.  If so, bring an
2583              incorrect reg to the top of stack, and let the while loop
2584              above fix it.  */
2585
2586             for (reg = new_stack->top; reg >= 0; reg--)
2587               if (new_stack->reg[reg] != old->reg[reg])
2588                 {
2589                   emit_swap_insn (insn, old,
2590                                   FP_MODE_REG (old->reg[reg], DFmode));
2591                   break;
2592                 }
2593           } while (reg >= 0);
2594
2595       /* At this point there must be no differences.  */
2596
2597       for (reg = old->top; reg >= 0; reg--)
2598         gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2599     }
2600
2601   if (update_end)
2602     BB_END (current_block) = PREV_INSN (insn);
2603 }
2604 \f
2605 /* Print stack configuration.  */
2606
2607 static void
2608 print_stack (FILE *file, stack_ptr s)
2609 {
2610   if (! file)
2611     return;
2612
2613   if (s->top == -2)
2614     fprintf (file, "uninitialized\n");
2615   else if (s->top == -1)
2616     fprintf (file, "empty\n");
2617   else
2618     {
2619       int i;
2620       fputs ("[ ", file);
2621       for (i = 0; i <= s->top; ++i)
2622         fprintf (file, "%d ", s->reg[i]);
2623       fputs ("]\n", file);
2624     }
2625 }
2626 \f
2627 /* This function was doing life analysis.  We now let the regular live
2628    code do it's job, so we only need to check some extra invariants
2629    that reg-stack expects.  Primary among these being that all registers
2630    are initialized before use.
2631
2632    The function returns true when code was emitted to CFG edges and
2633    commit_edge_insertions needs to be called.  */
2634
2635 static int
2636 convert_regs_entry (void)
2637 {
2638   int inserted = 0;
2639   edge e;
2640   edge_iterator ei;
2641
2642   /* Load something into each stack register live at function entry.
2643      Such live registers can be caused by uninitialized variables or
2644      functions not returning values on all paths.  In order to keep
2645      the push/pop code happy, and to not scrog the register stack, we
2646      must put something in these registers.  Use a QNaN.
2647
2648      Note that we are inserting converted code here.  This code is
2649      never seen by the convert_regs pass.  */
2650
2651   FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2652     {
2653       basic_block block = e->dest;
2654       block_info bi = BLOCK_INFO (block);
2655       int reg, top = -1;
2656
2657       for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2658         if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2659           {
2660             rtx init;
2661
2662             bi->stack_in.reg[++top] = reg;
2663
2664             init = gen_rtx_SET (VOIDmode,
2665                                 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2666                                 not_a_num);
2667             insert_insn_on_edge (init, e);
2668             inserted = 1;
2669           }
2670
2671       bi->stack_in.top = top;
2672     }
2673
2674   return inserted;
2675 }
2676
2677 /* Construct the desired stack for function exit.  This will either
2678    be `empty', or the function return value at top-of-stack.  */
2679
2680 static void
2681 convert_regs_exit (void)
2682 {
2683   int value_reg_low, value_reg_high;
2684   stack_ptr output_stack;
2685   rtx retvalue;
2686
2687   retvalue = stack_result (current_function_decl);
2688   value_reg_low = value_reg_high = -1;
2689   if (retvalue)
2690     {
2691       value_reg_low = REGNO (retvalue);
2692       value_reg_high = END_HARD_REGNO (retvalue) - 1;
2693     }
2694
2695   output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2696   if (value_reg_low == -1)
2697     output_stack->top = -1;
2698   else
2699     {
2700       int reg;
2701
2702       output_stack->top = value_reg_high - value_reg_low;
2703       for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2704         {
2705           output_stack->reg[value_reg_high - reg] = reg;
2706           SET_HARD_REG_BIT (output_stack->reg_set, reg);
2707         }
2708     }
2709 }
2710
2711 /* Copy the stack info from the end of edge E's source block to the
2712    start of E's destination block.  */
2713
2714 static void
2715 propagate_stack (edge e)
2716 {
2717   stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2718   stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2719   int reg;
2720
2721   /* Preserve the order of the original stack, but check whether
2722      any pops are needed.  */
2723   dest_stack->top = -1;
2724   for (reg = 0; reg <= src_stack->top; ++reg)
2725     if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2726       dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2727
2728   /* Push in any partially dead values.  */
2729   for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2730     if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2731         && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2732       dest_stack->reg[++dest_stack->top] = reg;
2733 }
2734
2735
2736 /* Adjust the stack of edge E's source block on exit to match the stack
2737    of it's target block upon input.  The stack layouts of both blocks
2738    should have been defined by now.  */
2739
2740 static bool
2741 compensate_edge (edge e)
2742 {
2743   basic_block source = e->src, target = e->dest;
2744   stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2745   stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2746   struct stack_def regstack;
2747   int reg;
2748
2749   if (dump_file)
2750     fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2751
2752   gcc_assert (target_stack->top != -2);
2753
2754   /* Check whether stacks are identical.  */
2755   if (target_stack->top == source_stack->top)
2756     {
2757       for (reg = target_stack->top; reg >= 0; --reg)
2758         if (target_stack->reg[reg] != source_stack->reg[reg])
2759           break;
2760
2761       if (reg == -1)
2762         {
2763           if (dump_file)
2764             fprintf (dump_file, "no changes needed\n");
2765           return false;
2766         }
2767     }
2768
2769   if (dump_file)
2770     {
2771       fprintf (dump_file, "correcting stack to ");
2772       print_stack (dump_file, target_stack);
2773     }
2774
2775   /* Abnormal calls may appear to have values live in st(0), but the
2776      abnormal return path will not have actually loaded the values.  */
2777   if (e->flags & EDGE_ABNORMAL_CALL)
2778     {
2779       /* Assert that the lifetimes are as we expect -- one value
2780          live at st(0) on the end of the source block, and no
2781          values live at the beginning of the destination block.
2782          For complex return values, we may have st(1) live as well.  */
2783       gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2784       gcc_assert (target_stack->top == -1);
2785       return false;
2786     }
2787
2788   /* Handle non-call EH edges specially.  The normal return path have
2789      values in registers.  These will be popped en masse by the unwind
2790      library.  */
2791   if (e->flags & EDGE_EH)
2792     {
2793       gcc_assert (target_stack->top == -1);
2794       return false;
2795     }
2796
2797   /* We don't support abnormal edges.  Global takes care to
2798      avoid any live register across them, so we should never
2799      have to insert instructions on such edges.  */
2800   gcc_assert (! (e->flags & EDGE_ABNORMAL));
2801
2802   /* Make a copy of source_stack as change_stack is destructive.  */
2803   regstack = *source_stack;
2804
2805   /* It is better to output directly to the end of the block
2806      instead of to the edge, because emit_swap can do minimal
2807      insn scheduling.  We can do this when there is only one
2808      edge out, and it is not abnormal.  */
2809   if (EDGE_COUNT (source->succs) == 1)
2810     {
2811       current_block = source;
2812       change_stack (BB_END (source), &regstack, target_stack,
2813                     (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2814     }
2815   else
2816     {
2817       rtx seq, after;
2818
2819       current_block = NULL;
2820       start_sequence ();
2821
2822       /* ??? change_stack needs some point to emit insns after.  */
2823       after = emit_note (NOTE_INSN_DELETED);
2824
2825       change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2826
2827       seq = get_insns ();
2828       end_sequence ();
2829
2830       insert_insn_on_edge (seq, e);
2831       return true;
2832     }
2833   return false;
2834 }
2835
2836 /* Traverse all non-entry edges in the CFG, and emit the necessary
2837    edge compensation code to change the stack from stack_out of the
2838    source block to the stack_in of the destination block.  */
2839
2840 static bool
2841 compensate_edges (void)
2842 {
2843   bool inserted = false;
2844   basic_block bb;
2845
2846   starting_stack_p = false;
2847
2848   FOR_EACH_BB (bb)
2849     if (bb != ENTRY_BLOCK_PTR)
2850       {
2851         edge e;
2852         edge_iterator ei;
2853
2854         FOR_EACH_EDGE (e, ei, bb->succs)
2855           inserted |= compensate_edge (e);
2856       }
2857   return inserted;
2858 }
2859
2860 /* Select the better of two edges E1 and E2 to use to determine the
2861    stack layout for their shared destination basic block.  This is
2862    typically the more frequently executed.  The edge E1 may be NULL
2863    (in which case E2 is returned), but E2 is always non-NULL.  */
2864
2865 static edge
2866 better_edge (edge e1, edge e2)
2867 {
2868   if (!e1)
2869     return e2;
2870
2871   if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2872     return e1;
2873   if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2874     return e2;
2875
2876   if (e1->count > e2->count)
2877     return e1;
2878   if (e1->count < e2->count)
2879     return e2;
2880
2881   /* Prefer critical edges to minimize inserting compensation code on
2882      critical edges.  */
2883
2884   if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2885     return EDGE_CRITICAL_P (e1) ? e1 : e2;
2886
2887   /* Avoid non-deterministic behavior.  */
2888   return (e1->src->index < e2->src->index) ? e1 : e2;
2889 }
2890
2891 /* Convert stack register references in one block.  Return true if the CFG
2892    has been modified in the process.  */
2893
2894 static bool
2895 convert_regs_1 (basic_block block)
2896 {
2897   struct stack_def regstack;
2898   block_info bi = BLOCK_INFO (block);
2899   int reg;
2900   rtx insn, next;
2901   bool control_flow_insn_deleted = false;
2902   bool cfg_altered = false;
2903   int debug_insns_with_starting_stack = 0;
2904
2905   any_malformed_asm = false;
2906
2907   /* Choose an initial stack layout, if one hasn't already been chosen.  */
2908   if (bi->stack_in.top == -2)
2909     {
2910       edge e, beste = NULL;
2911       edge_iterator ei;
2912
2913       /* Select the best incoming edge (typically the most frequent) to
2914          use as a template for this basic block.  */
2915       FOR_EACH_EDGE (e, ei, block->preds)
2916         if (BLOCK_INFO (e->src)->done)
2917           beste = better_edge (beste, e);
2918
2919       if (beste)
2920         propagate_stack (beste);
2921       else
2922         {
2923           /* No predecessors.  Create an arbitrary input stack.  */
2924           bi->stack_in.top = -1;
2925           for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2926             if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2927               bi->stack_in.reg[++bi->stack_in.top] = reg;
2928         }
2929     }
2930
2931   if (dump_file)
2932     {
2933       fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2934       print_stack (dump_file, &bi->stack_in);
2935     }
2936
2937   /* Process all insns in this block.  Keep track of NEXT so that we
2938      don't process insns emitted while substituting in INSN.  */
2939   current_block = block;
2940   next = BB_HEAD (block);
2941   regstack = bi->stack_in;
2942   starting_stack_p = true;
2943
2944   do
2945     {
2946       insn = next;
2947       next = NEXT_INSN (insn);
2948
2949       /* Ensure we have not missed a block boundary.  */
2950       gcc_assert (next);
2951       if (insn == BB_END (block))
2952         next = NULL;
2953
2954       /* Don't bother processing unless there is a stack reg
2955          mentioned or if it's a CALL_INSN.  */
2956       if (DEBUG_INSN_P (insn))
2957         {
2958           if (starting_stack_p)
2959             debug_insns_with_starting_stack++;
2960           else
2961             {
2962               subst_all_stack_regs_in_debug_insn (insn, &regstack);
2963
2964               /* Nothing must ever die at a debug insn.  If something
2965                  is referenced in it that becomes dead, it should have
2966                  died before and the reference in the debug insn
2967                  should have been removed so as to avoid changing code
2968                  generation.  */
2969               gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
2970             }
2971         }
2972       else if (stack_regs_mentioned (insn)
2973                || CALL_P (insn))
2974         {
2975           if (dump_file)
2976             {
2977               fprintf (dump_file, "  insn %d input stack: ",
2978                        INSN_UID (insn));
2979               print_stack (dump_file, &regstack);
2980             }
2981           control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2982           starting_stack_p = false;
2983         }
2984     }
2985   while (next);
2986
2987   if (debug_insns_with_starting_stack)
2988     {
2989       /* Since it's the first non-debug instruction that determines
2990          the stack requirements of the current basic block, we refrain
2991          from updating debug insns before it in the loop above, and
2992          fix them up here.  */
2993       for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
2994            insn = NEXT_INSN (insn))
2995         {
2996           if (!DEBUG_INSN_P (insn))
2997             continue;
2998
2999           debug_insns_with_starting_stack--;
3000           subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
3001         }
3002     }
3003
3004   if (dump_file)
3005     {
3006       fprintf (dump_file, "Expected live registers [");
3007       for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3008         if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
3009           fprintf (dump_file, " %d", reg);
3010       fprintf (dump_file, " ]\nOutput stack: ");
3011       print_stack (dump_file, &regstack);
3012     }
3013
3014   insn = BB_END (block);
3015   if (JUMP_P (insn))
3016     insn = PREV_INSN (insn);
3017
3018   /* If the function is declared to return a value, but it returns one
3019      in only some cases, some registers might come live here.  Emit
3020      necessary moves for them.  */
3021
3022   for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3023     {
3024       if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3025           && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3026         {
3027           rtx set;
3028
3029           if (dump_file)
3030             fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3031
3032           set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
3033           insn = emit_insn_after (set, insn);
3034           control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
3035         }
3036     }
3037
3038   /* Amongst the insns possibly deleted during the substitution process above,
3039      might have been the only trapping insn in the block.  We purge the now
3040      possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3041      called at the end of convert_regs.  The order in which we process the
3042      blocks ensures that we never delete an already processed edge.
3043
3044      Note that, at this point, the CFG may have been damaged by the emission
3045      of instructions after an abnormal call, which moves the basic block end
3046      (and is the reason why we call fixup_abnormal_edges later).  So we must
3047      be sure that the trapping insn has been deleted before trying to purge
3048      dead edges, otherwise we risk purging valid edges.
3049
3050      ??? We are normally supposed not to delete trapping insns, so we pretend
3051      that the insns deleted above don't actually trap.  It would have been
3052      better to detect this earlier and avoid creating the EH edge in the first
3053      place, still, but we don't have enough information at that time.  */
3054
3055   if (control_flow_insn_deleted)
3056     cfg_altered |= purge_dead_edges (block);
3057
3058   /* Something failed if the stack lives don't match.  If we had malformed
3059      asms, we zapped the instruction itself, but that didn't produce the
3060      same pattern of register kills as before.  */
3061
3062   gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3063               || any_malformed_asm);
3064   bi->stack_out = regstack;
3065   bi->done = true;
3066
3067   return cfg_altered;
3068 }
3069
3070 /* Convert registers in all blocks reachable from BLOCK.  Return true if the
3071    CFG has been modified in the process.  */
3072
3073 static bool
3074 convert_regs_2 (basic_block block)
3075 {
3076   basic_block *stack, *sp;
3077   bool cfg_altered = false;
3078
3079   /* We process the blocks in a top-down manner, in a way such that one block
3080      is only processed after all its predecessors.  The number of predecessors
3081      of every block has already been computed.  */
3082
3083   stack = XNEWVEC (basic_block, n_basic_blocks);
3084   sp = stack;
3085
3086   *sp++ = block;
3087
3088   do
3089     {
3090       edge e;
3091       edge_iterator ei;
3092
3093       block = *--sp;
3094
3095       /* Processing BLOCK is achieved by convert_regs_1, which may purge
3096          some dead EH outgoing edge after the deletion of the trapping
3097          insn inside the block.  Since the number of predecessors of
3098          BLOCK's successors was computed based on the initial edge set,
3099          we check the necessity to process some of these successors
3100          before such an edge deletion may happen.  However, there is
3101          a pitfall: if BLOCK is the only predecessor of a successor and
3102          the edge between them happens to be deleted, the successor
3103          becomes unreachable and should not be processed.  The problem
3104          is that there is no way to preventively detect this case so we
3105          stack the successor in all cases and hand over the task of
3106          fixing up the discrepancy to convert_regs_1.  */
3107
3108       FOR_EACH_EDGE (e, ei, block->succs)
3109         if (! (e->flags & EDGE_DFS_BACK))
3110           {
3111             BLOCK_INFO (e->dest)->predecessors--;
3112             if (!BLOCK_INFO (e->dest)->predecessors)
3113               *sp++ = e->dest;
3114           }
3115
3116       cfg_altered |= convert_regs_1 (block);
3117     }
3118   while (sp != stack);
3119
3120   free (stack);
3121
3122   return cfg_altered;
3123 }
3124
3125 /* Traverse all basic blocks in a function, converting the register
3126    references in each insn from the "flat" register file that gcc uses,
3127    to the stack-like registers the 387 uses.  */
3128
3129 static void
3130 convert_regs (void)
3131 {
3132   bool cfg_altered = false;
3133   int inserted;
3134   basic_block b;
3135   edge e;
3136   edge_iterator ei;
3137
3138   /* Initialize uninitialized registers on function entry.  */
3139   inserted = convert_regs_entry ();
3140
3141   /* Construct the desired stack for function exit.  */
3142   convert_regs_exit ();
3143   BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3144
3145   /* ??? Future: process inner loops first, and give them arbitrary
3146      initial stacks which emit_swap_insn can modify.  This ought to
3147      prevent double fxch that often appears at the head of a loop.  */
3148
3149   /* Process all blocks reachable from all entry points.  */
3150   FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3151     cfg_altered |= convert_regs_2 (e->dest);
3152
3153   /* ??? Process all unreachable blocks.  Though there's no excuse
3154      for keeping these even when not optimizing.  */
3155   FOR_EACH_BB (b)
3156     {
3157       block_info bi = BLOCK_INFO (b);
3158
3159       if (! bi->done)
3160         cfg_altered |= convert_regs_2 (b);
3161     }
3162
3163   /* We must fix up abnormal edges before inserting compensation code
3164      because both mechanisms insert insns on edges.  */
3165   inserted |= fixup_abnormal_edges ();
3166
3167   inserted |= compensate_edges ();
3168
3169   clear_aux_for_blocks ();
3170
3171   if (inserted)
3172     commit_edge_insertions ();
3173
3174   if (cfg_altered)
3175     cleanup_cfg (0);
3176
3177   if (dump_file)
3178     fputc ('\n', dump_file);
3179 }
3180 \f
3181 /* Convert register usage from "flat" register file usage to a "stack
3182    register file.  FILE is the dump file, if used.
3183
3184    Construct a CFG and run life analysis.  Then convert each insn one
3185    by one.  Run a last cleanup_cfg pass, if optimizing, to eliminate
3186    code duplication created when the converter inserts pop insns on
3187    the edges.  */
3188
3189 static bool
3190 reg_to_stack (void)
3191 {
3192   basic_block bb;
3193   int i;
3194   int max_uid;
3195
3196   /* Clean up previous run.  */
3197   stack_regs_mentioned_data.release ();
3198
3199   /* See if there is something to do.  Flow analysis is quite
3200      expensive so we might save some compilation time.  */
3201   for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3202     if (df_regs_ever_live_p (i))
3203       break;
3204   if (i > LAST_STACK_REG)
3205     return false;
3206
3207   df_note_add_problem ();
3208   df_analyze ();
3209
3210   mark_dfs_back_edges ();
3211
3212   /* Set up block info for each basic block.  */
3213   alloc_aux_for_blocks (sizeof (struct block_info_def));
3214   FOR_EACH_BB (bb)
3215     {
3216       block_info bi = BLOCK_INFO (bb);
3217       edge_iterator ei;
3218       edge e;
3219       int reg;
3220
3221       FOR_EACH_EDGE (e, ei, bb->preds)
3222         if (!(e->flags & EDGE_DFS_BACK)
3223             && e->src != ENTRY_BLOCK_PTR)
3224           bi->predecessors++;
3225
3226       /* Set current register status at last instruction `uninitialized'.  */
3227       bi->stack_in.top = -2;
3228
3229       /* Copy live_at_end and live_at_start into temporaries.  */
3230       for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3231         {
3232           if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3233             SET_HARD_REG_BIT (bi->out_reg_set, reg);
3234           if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3235             SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3236         }
3237     }
3238
3239   /* Create the replacement registers up front.  */
3240   for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3241     {
3242       enum machine_mode mode;
3243       for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3244            mode != VOIDmode;
3245            mode = GET_MODE_WIDER_MODE (mode))
3246         FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3247       for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3248            mode != VOIDmode;
3249            mode = GET_MODE_WIDER_MODE (mode))
3250         FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3251     }
3252
3253   ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3254
3255   /* A QNaN for initializing uninitialized variables.
3256
3257      ??? We can't load from constant memory in PIC mode, because
3258      we're inserting these instructions before the prologue and
3259      the PIC register hasn't been set up.  In that case, fall back
3260      on zero, which we can get from `fldz'.  */
3261
3262   if ((flag_pic && !TARGET_64BIT)
3263       || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3264     not_a_num = CONST0_RTX (SFmode);
3265   else
3266     {
3267       REAL_VALUE_TYPE r;
3268
3269       real_nan (&r, "", 1, SFmode);
3270       not_a_num = CONST_DOUBLE_FROM_REAL_VALUE (r, SFmode);
3271       not_a_num = force_const_mem (SFmode, not_a_num);
3272     }
3273
3274   /* Allocate a cache for stack_regs_mentioned.  */
3275   max_uid = get_max_uid ();
3276   stack_regs_mentioned_data.create (max_uid + 1);
3277   memset (stack_regs_mentioned_data.address (),
3278           0, sizeof (char) * (max_uid + 1));
3279
3280   convert_regs ();
3281
3282   free_aux_for_blocks ();
3283   return true;
3284 }
3285 #endif /* STACK_REGS */
3286 \f
3287 static bool
3288 gate_handle_stack_regs (void)
3289 {
3290 #ifdef STACK_REGS
3291   return 1;
3292 #else
3293   return 0;
3294 #endif
3295 }
3296
3297 namespace {
3298
3299 const pass_data pass_data_stack_regs =
3300 {
3301   RTL_PASS, /* type */
3302   "*stack_regs", /* name */
3303   OPTGROUP_NONE, /* optinfo_flags */
3304   true, /* has_gate */
3305   false, /* has_execute */
3306   TV_REG_STACK, /* tv_id */
3307   0, /* properties_required */
3308   0, /* properties_provided */
3309   0, /* properties_destroyed */
3310   0, /* todo_flags_start */
3311   0, /* todo_flags_finish */
3312 };
3313
3314 class pass_stack_regs : public rtl_opt_pass
3315 {
3316 public:
3317   pass_stack_regs(gcc::context *ctxt)
3318     : rtl_opt_pass(pass_data_stack_regs, ctxt)
3319   {}
3320
3321   /* opt_pass methods: */
3322   bool gate () { return gate_handle_stack_regs (); }
3323
3324 }; // class pass_stack_regs
3325
3326 } // anon namespace
3327
3328 rtl_opt_pass *
3329 make_pass_stack_regs (gcc::context *ctxt)
3330 {
3331   return new pass_stack_regs (ctxt);
3332 }
3333
3334 /* Convert register usage from flat register file usage to a stack
3335    register file.  */
3336 static unsigned int
3337 rest_of_handle_stack_regs (void)
3338 {
3339 #ifdef STACK_REGS
3340   reg_to_stack ();
3341   regstack_completed = 1;
3342 #endif
3343   return 0;
3344 }
3345
3346 namespace {
3347
3348 const pass_data pass_data_stack_regs_run =
3349 {
3350   RTL_PASS, /* type */
3351   "stack", /* name */
3352   OPTGROUP_NONE, /* optinfo_flags */
3353   false, /* has_gate */
3354   true, /* has_execute */
3355   TV_REG_STACK, /* tv_id */
3356   0, /* properties_required */
3357   0, /* properties_provided */
3358   0, /* properties_destroyed */
3359   0, /* todo_flags_start */
3360   ( TODO_df_finish | TODO_verify_rtl_sharing ), /* todo_flags_finish */
3361 };
3362
3363 class pass_stack_regs_run : public rtl_opt_pass
3364 {
3365 public:
3366   pass_stack_regs_run(gcc::context *ctxt)
3367     : rtl_opt_pass(pass_data_stack_regs_run, ctxt)
3368   {}
3369
3370   /* opt_pass methods: */
3371   unsigned int execute () { return rest_of_handle_stack_regs (); }
3372
3373 }; // class pass_stack_regs_run
3374
3375 } // anon namespace
3376
3377 rtl_opt_pass *
3378 make_pass_stack_regs_run (gcc::context *ctxt)
3379 {
3380   return new pass_stack_regs_run (ctxt);
3381 }