vectorizer cost model enhancement
[official-gcc.git] / gcc / lra-eliminations.c
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1 /* Code for RTL register eliminations.
2 Copyright (C) 2010-2013 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 /* Eliminable registers (like a soft argument or frame pointer) are
22 widely used in RTL. These eliminable registers should be replaced
23 by real hard registers (like the stack pointer or hard frame
24 pointer) plus some offset. The offsets usually change whenever the
25 stack is expanded. We know the final offsets only at the very end
26 of LRA.
28 Within LRA, we usually keep the RTL in such a state that the
29 eliminable registers can be replaced by just the corresponding hard
30 register (without any offset). To achieve this we should add the
31 initial elimination offset at the beginning of LRA and update the
32 offsets whenever the stack is expanded. We need to do this before
33 every constraint pass because the choice of offset often affects
34 whether a particular address or memory constraint is satisfied.
36 We keep RTL code at most time in such state that the virtual
37 registers can be changed by just the corresponding hard registers
38 (with zero offsets) and we have the right RTL code. To achieve this
39 we should add initial offset at the beginning of LRA work and update
40 offsets after each stack expanding. But actually we update virtual
41 registers to the same virtual registers + corresponding offsets
42 before every constraint pass because it affects constraint
43 satisfaction (e.g. an address displacement became too big for some
44 target).
46 The final change of eliminable registers to the corresponding hard
47 registers are done at the very end of LRA when there were no change
48 in offsets anymore:
50 fp + 42 => sp + 42
54 #include "config.h"
55 #include "system.h"
56 #include "coretypes.h"
57 #include "tm.h"
58 #include "hard-reg-set.h"
59 #include "rtl.h"
60 #include "tm_p.h"
61 #include "regs.h"
62 #include "insn-config.h"
63 #include "insn-codes.h"
64 #include "recog.h"
65 #include "output.h"
66 #include "addresses.h"
67 #include "target.h"
68 #include "function.h"
69 #include "expr.h"
70 #include "basic-block.h"
71 #include "except.h"
72 #include "optabs.h"
73 #include "df.h"
74 #include "ira.h"
75 #include "rtl-error.h"
76 #include "lra-int.h"
78 /* This structure is used to record information about hard register
79 eliminations. */
80 struct elim_table
82 /* Hard register number to be eliminated. */
83 int from;
84 /* Hard register number used as replacement. */
85 int to;
86 /* Difference between values of the two hard registers above on
87 previous iteration. */
88 HOST_WIDE_INT previous_offset;
89 /* Difference between the values on the current iteration. */
90 HOST_WIDE_INT offset;
91 /* Nonzero if this elimination can be done. */
92 bool can_eliminate;
93 /* CAN_ELIMINATE since the last check. */
94 bool prev_can_eliminate;
95 /* REG rtx for the register to be eliminated. We cannot simply
96 compare the number since we might then spuriously replace a hard
97 register corresponding to a pseudo assigned to the reg to be
98 eliminated. */
99 rtx from_rtx;
100 /* REG rtx for the replacement. */
101 rtx to_rtx;
104 /* The elimination table. Each array entry describes one possible way
105 of eliminating a register in favor of another. If there is more
106 than one way of eliminating a particular register, the most
107 preferred should be specified first. */
108 static struct elim_table *reg_eliminate = 0;
110 /* This is an intermediate structure to initialize the table. It has
111 exactly the members provided by ELIMINABLE_REGS. */
112 static const struct elim_table_1
114 const int from;
115 const int to;
116 } reg_eliminate_1[] =
118 /* If a set of eliminable hard registers was specified, define the
119 table from it. Otherwise, default to the normal case of the frame
120 pointer being replaced by the stack pointer. */
122 #ifdef ELIMINABLE_REGS
123 ELIMINABLE_REGS;
124 #else
125 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}};
126 #endif
128 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
130 /* Print info about elimination table to file F. */
131 static void
132 print_elim_table (FILE *f)
134 struct elim_table *ep;
136 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
137 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC
138 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
139 ep->can_eliminate ? "Can" : "Can't",
140 ep->from, ep->to, ep->offset, ep->previous_offset);
143 /* Print info about elimination table to stderr. */
144 void
145 lra_debug_elim_table (void)
147 print_elim_table (stderr);
150 /* Setup possibility of elimination in elimination table element EP to
151 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
152 pointer to stack pointer is not possible anymore. */
153 static void
154 setup_can_eliminate (struct elim_table *ep, bool value)
156 ep->can_eliminate = ep->prev_can_eliminate = value;
157 if (! value
158 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
159 frame_pointer_needed = 1;
162 /* Map: eliminable "from" register -> its current elimination,
163 or NULL if none. The elimination table may contain more than
164 one elimination for the same hard register, but this map specifies
165 the one that we are currently using. */
166 static struct elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
168 /* When an eliminable hard register becomes not eliminable, we use the
169 following special structure to restore original offsets for the
170 register. */
171 static struct elim_table self_elim_table;
173 /* Offsets should be used to restore original offsets for eliminable
174 hard register which just became not eliminable. Zero,
175 otherwise. */
176 static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER];
178 /* Map: hard regno -> RTL presentation. RTL presentations of all
179 potentially eliminable hard registers are stored in the map. */
180 static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
182 /* Set up ELIMINATION_MAP of the currently used eliminations. */
183 static void
184 setup_elimination_map (void)
186 int i;
187 struct elim_table *ep;
189 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
190 elimination_map[i] = NULL;
191 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
192 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
193 elimination_map[ep->from] = ep;
198 /* Compute the sum of X and Y, making canonicalizations assumed in an
199 address, namely: sum constant integers, surround the sum of two
200 constants with a CONST, put the constant as the second operand, and
201 group the constant on the outermost sum.
203 This routine assumes both inputs are already in canonical form. */
204 static rtx
205 form_sum (rtx x, rtx y)
207 rtx tem;
208 enum machine_mode mode = GET_MODE (x);
210 if (mode == VOIDmode)
211 mode = GET_MODE (y);
213 if (mode == VOIDmode)
214 mode = Pmode;
216 if (CONST_INT_P (x))
217 return plus_constant (mode, y, INTVAL (x));
218 else if (CONST_INT_P (y))
219 return plus_constant (mode, x, INTVAL (y));
220 else if (CONSTANT_P (x))
221 tem = x, x = y, y = tem;
223 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
224 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
226 /* Note that if the operands of Y are specified in the opposite
227 order in the recursive calls below, infinite recursion will
228 occur. */
229 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
230 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
232 /* If both constant, encapsulate sum. Otherwise, just form sum. A
233 constant will have been placed second. */
234 if (CONSTANT_P (x) && CONSTANT_P (y))
236 if (GET_CODE (x) == CONST)
237 x = XEXP (x, 0);
238 if (GET_CODE (y) == CONST)
239 y = XEXP (y, 0);
241 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
244 return gen_rtx_PLUS (mode, x, y);
247 /* Return the current substitution hard register of the elimination of
248 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
250 lra_get_elimination_hard_regno (int hard_regno)
252 struct elim_table *ep;
254 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
255 return hard_regno;
256 if ((ep = elimination_map[hard_regno]) == NULL)
257 return hard_regno;
258 return ep->to;
261 /* Return elimination which will be used for hard reg REG, NULL
262 otherwise. */
263 static struct elim_table *
264 get_elimination (rtx reg)
266 int hard_regno;
267 struct elim_table *ep;
268 HOST_WIDE_INT offset;
270 lra_assert (REG_P (reg));
271 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
272 return NULL;
273 if ((ep = elimination_map[hard_regno]) != NULL)
274 return ep->from_rtx != reg ? NULL : ep;
275 if ((offset = self_elim_offsets[hard_regno]) == 0)
276 return NULL;
277 /* This is an iteration to restore offsets just after HARD_REGNO
278 stopped to be eliminable. */
279 self_elim_table.from = self_elim_table.to = hard_regno;
280 self_elim_table.from_rtx
281 = self_elim_table.to_rtx
282 = eliminable_reg_rtx[hard_regno];
283 lra_assert (self_elim_table.from_rtx != NULL);
284 self_elim_table.offset = offset;
285 return &self_elim_table;
288 /* Scan X and replace any eliminable registers (such as fp) with a
289 replacement (such as sp) if SUBST_P, plus an offset. The offset is
290 a change in the offset between the eliminable register and its
291 substitution if UPDATE_P, or the full offset if FULL_P, or
292 otherwise zero.
294 MEM_MODE is the mode of an enclosing MEM. We need this to know how
295 much to adjust a register for, e.g., PRE_DEC. Also, if we are
296 inside a MEM, we are allowed to replace a sum of a hard register
297 and the constant zero with the hard register, which we cannot do
298 outside a MEM. In addition, we need to record the fact that a
299 hard register is referenced outside a MEM.
301 Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST).
302 That's used when we eliminate in expressions stored in notes. */
304 lra_eliminate_regs_1 (rtx x, enum machine_mode mem_mode,
305 bool subst_p, bool update_p, bool full_p)
307 enum rtx_code code = GET_CODE (x);
308 struct elim_table *ep;
309 rtx new_rtx;
310 int i, j;
311 const char *fmt;
312 int copied = 0;
314 if (! current_function_decl)
315 return x;
317 switch (code)
319 CASE_CONST_ANY:
320 case CONST:
321 case SYMBOL_REF:
322 case CODE_LABEL:
323 case PC:
324 case CC0:
325 case ASM_INPUT:
326 case ADDR_VEC:
327 case ADDR_DIFF_VEC:
328 case RETURN:
329 return x;
331 case REG:
332 /* First handle the case where we encounter a bare hard register
333 that is eliminable. Replace it with a PLUS. */
334 if ((ep = get_elimination (x)) != NULL)
336 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
338 if (update_p)
339 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
340 else if (full_p)
341 return plus_constant (Pmode, to, ep->offset);
342 else
343 return to;
345 return x;
347 case PLUS:
348 /* If this is the sum of an eliminable register and a constant, rework
349 the sum. */
350 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
352 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
354 HOST_WIDE_INT offset;
355 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
357 if (! update_p && ! full_p)
358 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
360 offset = (update_p
361 ? ep->offset - ep->previous_offset : ep->offset);
362 if (CONST_INT_P (XEXP (x, 1))
363 && INTVAL (XEXP (x, 1)) == -offset)
364 return to;
365 else
366 return gen_rtx_PLUS (Pmode, to,
367 plus_constant (Pmode,
368 XEXP (x, 1), offset));
371 /* If the hard register is not eliminable, we are done since
372 the other operand is a constant. */
373 return x;
376 /* If this is part of an address, we want to bring any constant
377 to the outermost PLUS. We will do this by doing hard
378 register replacement in our operands and seeing if a constant
379 shows up in one of them.
381 Note that there is no risk of modifying the structure of the
382 insn, since we only get called for its operands, thus we are
383 either modifying the address inside a MEM, or something like
384 an address operand of a load-address insn. */
387 rtx new0 = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
388 subst_p, update_p, full_p);
389 rtx new1 = lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
390 subst_p, update_p, full_p);
392 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
393 return form_sum (new0, new1);
395 return x;
397 case MULT:
398 /* If this is the product of an eliminable hard register and a
399 constant, apply the distribute law and move the constant out
400 so that we have (plus (mult ..) ..). This is needed in order
401 to keep load-address insns valid. This case is pathological.
402 We ignore the possibility of overflow here. */
403 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
404 && (ep = get_elimination (XEXP (x, 0))) != NULL)
406 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
408 if (update_p)
409 return
410 plus_constant (Pmode,
411 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
412 (ep->offset - ep->previous_offset)
413 * INTVAL (XEXP (x, 1)));
414 else if (full_p)
415 return
416 plus_constant (Pmode,
417 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
418 ep->offset * INTVAL (XEXP (x, 1)));
419 else
420 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
423 /* ... fall through ... */
425 case CALL:
426 case COMPARE:
427 /* See comments before PLUS about handling MINUS. */
428 case MINUS:
429 case DIV: case UDIV:
430 case MOD: case UMOD:
431 case AND: case IOR: case XOR:
432 case ROTATERT: case ROTATE:
433 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
434 case NE: case EQ:
435 case GE: case GT: case GEU: case GTU:
436 case LE: case LT: case LEU: case LTU:
438 rtx new0 = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
439 subst_p, update_p, full_p);
440 rtx new1 = XEXP (x, 1)
441 ? lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
442 subst_p, update_p, full_p) : 0;
444 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
445 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
447 return x;
449 case EXPR_LIST:
450 /* If we have something in XEXP (x, 0), the usual case,
451 eliminate it. */
452 if (XEXP (x, 0))
454 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
455 subst_p, update_p, full_p);
456 if (new_rtx != XEXP (x, 0))
458 /* If this is a REG_DEAD note, it is not valid anymore.
459 Using the eliminated version could result in creating a
460 REG_DEAD note for the stack or frame pointer. */
461 if (REG_NOTE_KIND (x) == REG_DEAD)
462 return (XEXP (x, 1)
463 ? lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
464 subst_p, update_p, full_p)
465 : NULL_RTX);
467 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
471 /* ... fall through ... */
473 case INSN_LIST:
474 case INT_LIST:
475 /* Now do eliminations in the rest of the chain. If this was
476 an EXPR_LIST, this might result in allocating more memory than is
477 strictly needed, but it simplifies the code. */
478 if (XEXP (x, 1))
480 new_rtx = lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
481 subst_p, update_p, full_p);
482 if (new_rtx != XEXP (x, 1))
483 return
484 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
485 XEXP (x, 0), new_rtx);
487 return x;
489 case PRE_INC:
490 case POST_INC:
491 case PRE_DEC:
492 case POST_DEC:
493 /* We do not support elimination of a register that is modified.
494 elimination_effects has already make sure that this does not
495 happen. */
496 return x;
498 case PRE_MODIFY:
499 case POST_MODIFY:
500 /* We do not support elimination of a hard register that is
501 modified. LRA has already make sure that this does not
502 happen. The only remaining case we need to consider here is
503 that the increment value may be an eliminable register. */
504 if (GET_CODE (XEXP (x, 1)) == PLUS
505 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
507 rtx new_rtx = lra_eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
508 subst_p, update_p, full_p);
510 if (new_rtx != XEXP (XEXP (x, 1), 1))
511 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
512 gen_rtx_PLUS (GET_MODE (x),
513 XEXP (x, 0), new_rtx));
515 return x;
517 case STRICT_LOW_PART:
518 case NEG: case NOT:
519 case SIGN_EXTEND: case ZERO_EXTEND:
520 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
521 case FLOAT: case FIX:
522 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
523 case ABS:
524 case SQRT:
525 case FFS:
526 case CLZ:
527 case CTZ:
528 case POPCOUNT:
529 case PARITY:
530 case BSWAP:
531 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
532 subst_p, update_p, full_p);
533 if (new_rtx != XEXP (x, 0))
534 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
535 return x;
537 case SUBREG:
538 new_rtx = lra_eliminate_regs_1 (SUBREG_REG (x), mem_mode,
539 subst_p, update_p, full_p);
541 if (new_rtx != SUBREG_REG (x))
543 int x_size = GET_MODE_SIZE (GET_MODE (x));
544 int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
546 if (MEM_P (new_rtx) && x_size <= new_size)
548 SUBREG_REG (x) = new_rtx;
549 alter_subreg (&x, false);
550 return x;
552 else
553 return simplify_gen_subreg (GET_MODE (x), new_rtx,
554 GET_MODE (new_rtx), SUBREG_BYTE (x));
557 return x;
559 case MEM:
560 /* Our only special processing is to pass the mode of the MEM to our
561 recursive call and copy the flags. While we are here, handle this
562 case more efficiently. */
563 return
564 replace_equiv_address_nv
566 lra_eliminate_regs_1 (XEXP (x, 0), GET_MODE (x),
567 subst_p, update_p, full_p));
569 case USE:
570 /* Handle insn_list USE that a call to a pure function may generate. */
571 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), VOIDmode,
572 subst_p, update_p, full_p);
573 if (new_rtx != XEXP (x, 0))
574 return gen_rtx_USE (GET_MODE (x), new_rtx);
575 return x;
577 case CLOBBER:
578 case SET:
579 gcc_unreachable ();
581 default:
582 break;
585 /* Process each of our operands recursively. If any have changed, make a
586 copy of the rtx. */
587 fmt = GET_RTX_FORMAT (code);
588 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
590 if (*fmt == 'e')
592 new_rtx = lra_eliminate_regs_1 (XEXP (x, i), mem_mode,
593 subst_p, update_p, full_p);
594 if (new_rtx != XEXP (x, i) && ! copied)
596 x = shallow_copy_rtx (x);
597 copied = 1;
599 XEXP (x, i) = new_rtx;
601 else if (*fmt == 'E')
603 int copied_vec = 0;
604 for (j = 0; j < XVECLEN (x, i); j++)
606 new_rtx = lra_eliminate_regs_1 (XVECEXP (x, i, j), mem_mode,
607 subst_p, update_p, full_p);
608 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
610 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
611 XVEC (x, i)->elem);
612 if (! copied)
614 x = shallow_copy_rtx (x);
615 copied = 1;
617 XVEC (x, i) = new_v;
618 copied_vec = 1;
620 XVECEXP (x, i, j) = new_rtx;
625 return x;
628 /* This function is used externally in subsequent passes of GCC. It
629 always does a full elimination of X. */
631 lra_eliminate_regs (rtx x, enum machine_mode mem_mode,
632 rtx insn ATTRIBUTE_UNUSED)
634 return lra_eliminate_regs_1 (x, mem_mode, true, false, true);
637 /* Scan rtx X for references to elimination source or target registers
638 in contexts that would prevent the elimination from happening.
639 Update the table of eliminables to reflect the changed state.
640 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
641 within a MEM. */
642 static void
643 mark_not_eliminable (rtx x)
645 enum rtx_code code = GET_CODE (x);
646 struct elim_table *ep;
647 int i, j;
648 const char *fmt;
650 switch (code)
652 case PRE_INC:
653 case POST_INC:
654 case PRE_DEC:
655 case POST_DEC:
656 case POST_MODIFY:
657 case PRE_MODIFY:
658 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
659 /* If we modify the source of an elimination rule, disable
660 it. Do the same if it is the source and not the hard frame
661 register. */
662 for (ep = reg_eliminate;
663 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
664 ep++)
665 if (ep->from_rtx == XEXP (x, 0)
666 || (ep->to_rtx == XEXP (x, 0)
667 && ep->to_rtx != hard_frame_pointer_rtx))
668 setup_can_eliminate (ep, false);
669 return;
671 case USE:
672 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
673 /* If using a hard register that is the source of an eliminate
674 we still think can be performed, note it cannot be
675 performed since we don't know how this hard register is
676 used. */
677 for (ep = reg_eliminate;
678 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
679 ep++)
680 if (ep->from_rtx == XEXP (x, 0)
681 && ep->to_rtx != hard_frame_pointer_rtx)
682 setup_can_eliminate (ep, false);
683 return;
685 case CLOBBER:
686 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
687 /* If clobbering a hard register that is the replacement
688 register for an elimination we still think can be
689 performed, note that it cannot be performed. Otherwise, we
690 need not be concerned about it. */
691 for (ep = reg_eliminate;
692 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
693 ep++)
694 if (ep->to_rtx == XEXP (x, 0)
695 && ep->to_rtx != hard_frame_pointer_rtx)
696 setup_can_eliminate (ep, false);
697 return;
699 case SET:
700 /* Check for setting a hard register that we know about. */
701 if (REG_P (SET_DEST (x)) && REGNO (SET_DEST (x)) < FIRST_PSEUDO_REGISTER)
703 /* See if this is setting the replacement hard register for
704 an elimination.
706 If DEST is the hard frame pointer, we do nothing because
707 we assume that all assignments to the frame pointer are
708 for non-local gotos and are being done at a time when
709 they are valid and do not disturb anything else. Some
710 machines want to eliminate a fake argument pointer (or
711 even a fake frame pointer) with either the real frame
712 pointer or the stack pointer. Assignments to the hard
713 frame pointer must not prevent this elimination. */
715 for (ep = reg_eliminate;
716 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
717 ep++)
718 if (ep->to_rtx == SET_DEST (x)
719 && SET_DEST (x) != hard_frame_pointer_rtx
720 && (! (SUPPORTS_STACK_ALIGNMENT && stack_realign_fp
721 && REGNO (ep->to_rtx) == STACK_POINTER_REGNUM)
722 || GET_CODE (SET_SRC (x)) != PLUS
723 || XEXP (SET_SRC (x), 0) != SET_DEST (x)
724 || ! CONST_INT_P (XEXP (SET_SRC (x), 1))))
725 setup_can_eliminate (ep, false);
728 mark_not_eliminable (SET_DEST (x));
729 mark_not_eliminable (SET_SRC (x));
730 return;
732 default:
733 break;
736 fmt = GET_RTX_FORMAT (code);
737 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
739 if (*fmt == 'e')
740 mark_not_eliminable (XEXP (x, i));
741 else if (*fmt == 'E')
742 for (j = 0; j < XVECLEN (x, i); j++)
743 mark_not_eliminable (XVECEXP (x, i, j));
749 #ifdef HARD_FRAME_POINTER_REGNUM
751 /* Find offset equivalence note for reg WHAT in INSN and return the
752 found elmination offset. If the note is not found, return NULL.
753 Remove the found note. */
754 static rtx
755 remove_reg_equal_offset_note (rtx insn, rtx what)
757 rtx link, *link_loc;
759 for (link_loc = &REG_NOTES (insn);
760 (link = *link_loc) != NULL_RTX;
761 link_loc = &XEXP (link, 1))
762 if (REG_NOTE_KIND (link) == REG_EQUAL
763 && GET_CODE (XEXP (link, 0)) == PLUS
764 && XEXP (XEXP (link, 0), 0) == what
765 && CONST_INT_P (XEXP (XEXP (link, 0), 1)))
767 *link_loc = XEXP (link, 1);
768 return XEXP (XEXP (link, 0), 1);
770 return NULL_RTX;
773 #endif
775 /* Scan INSN and eliminate all eliminable hard registers in it.
777 If REPLACE_P is true, do the replacement destructively. Also
778 delete the insn as dead it if it is setting an eliminable register.
780 If REPLACE_P is false, just update the offsets while keeping the
781 base register the same. Attach the note about used elimination for
782 insns setting frame pointer to update elimination easy (without
783 parsing already generated elimination insns to find offset
784 previously used) in future. */
786 static void
787 eliminate_regs_in_insn (rtx insn, bool replace_p)
789 int icode = recog_memoized (insn);
790 rtx old_set = single_set (insn);
791 bool validate_p;
792 int i;
793 rtx substed_operand[MAX_RECOG_OPERANDS];
794 rtx orig_operand[MAX_RECOG_OPERANDS];
795 struct elim_table *ep;
796 rtx plus_src, plus_cst_src;
797 lra_insn_recog_data_t id;
798 struct lra_static_insn_data *static_id;
800 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
802 lra_assert (GET_CODE (PATTERN (insn)) == USE
803 || GET_CODE (PATTERN (insn)) == CLOBBER
804 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
805 return;
808 /* Check for setting an eliminable register. */
809 if (old_set != 0 && REG_P (SET_DEST (old_set))
810 && (ep = get_elimination (SET_DEST (old_set))) != NULL)
812 bool delete_p = replace_p;
814 #ifdef HARD_FRAME_POINTER_REGNUM
815 /* If this is setting the frame pointer register to the hardware
816 frame pointer register and this is an elimination that will
817 be done (tested above), this insn is really adjusting the
818 frame pointer downward to compensate for the adjustment done
819 before a nonlocal goto. */
820 if (ep->from == FRAME_POINTER_REGNUM
821 && ep->to == HARD_FRAME_POINTER_REGNUM)
823 rtx src = SET_SRC (old_set);
824 rtx off = remove_reg_equal_offset_note (insn, ep->to_rtx);
826 if (replace_p)
828 SET_DEST (old_set) = ep->to_rtx;
829 lra_update_insn_recog_data (insn);
830 return;
832 else if (off != NULL_RTX
833 || src == ep->to_rtx
834 || (GET_CODE (src) == PLUS
835 && XEXP (src, 1) == ep->to_rtx
836 && CONST_INT_P (XEXP (src, 1))))
838 HOST_WIDE_INT offset = (off != NULL_RTX
839 ? INTVAL (off)
840 : src == ep->to_rtx
841 ? 0 : INTVAL (XEXP (src, 1)));
843 offset -= (ep->offset - ep->previous_offset);
844 src = plus_constant (Pmode, ep->to_rtx, offset);
846 /* First see if this insn remains valid when we make
847 the change. If not, keep the INSN_CODE the same
848 and let the constraint pass fit it up. */
849 validate_change (insn, &SET_SRC (old_set), src, 1);
850 validate_change (insn, &SET_DEST (old_set),
851 ep->from_rtx, 1);
852 if (! apply_change_group ())
854 SET_SRC (old_set) = src;
855 SET_DEST (old_set) = ep->from_rtx;
857 lra_update_insn_recog_data (insn);
858 /* Add offset note for future updates. */
859 add_reg_note (insn, REG_EQUAL, src);
860 return;
864 /* We can't delete this insn, but needn't process it
865 since it won't be used unless something changes. */
866 delete_p = false;
868 #endif
870 /* This insn isn't serving a useful purpose. We delete it
871 when REPLACE is set. */
872 if (delete_p)
873 lra_delete_dead_insn (insn);
874 return;
877 /* We allow one special case which happens to work on all machines we
878 currently support: a single set with the source or a REG_EQUAL
879 note being a PLUS of an eliminable register and a constant. */
880 plus_src = plus_cst_src = 0;
881 if (old_set && REG_P (SET_DEST (old_set)))
883 if (GET_CODE (SET_SRC (old_set)) == PLUS)
884 plus_src = SET_SRC (old_set);
885 /* First see if the source is of the form (plus (...) CST). */
886 if (plus_src
887 && CONST_INT_P (XEXP (plus_src, 1)))
888 plus_cst_src = plus_src;
889 /* Check that the first operand of the PLUS is a hard reg or
890 the lowpart subreg of one. */
891 if (plus_cst_src)
893 rtx reg = XEXP (plus_cst_src, 0);
895 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
896 reg = SUBREG_REG (reg);
898 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
899 plus_cst_src = 0;
902 if (plus_cst_src)
904 rtx reg = XEXP (plus_cst_src, 0);
905 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
907 if (GET_CODE (reg) == SUBREG)
908 reg = SUBREG_REG (reg);
910 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
912 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
914 if (! replace_p)
916 offset += (ep->offset - ep->previous_offset);
917 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
920 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
921 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
922 /* If we have a nonzero offset, and the source is already a
923 simple REG, the following transformation would increase
924 the cost of the insn by replacing a simple REG with (plus
925 (reg sp) CST). So try only when we already had a PLUS
926 before. */
927 if (offset == 0 || plus_src)
929 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
931 old_set = single_set (insn);
933 /* First see if this insn remains valid when we make the
934 change. If not, try to replace the whole pattern
935 with a simple set (this may help if the original insn
936 was a PARALLEL that was only recognized as single_set
937 due to REG_UNUSED notes). If this isn't valid
938 either, keep the INSN_CODE the same and let the
939 constraint pass fix it up. */
940 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
942 rtx new_pat = gen_rtx_SET (VOIDmode,
943 SET_DEST (old_set), new_src);
945 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
946 SET_SRC (old_set) = new_src;
948 lra_update_insn_recog_data (insn);
949 /* This can't have an effect on elimination offsets, so skip
950 right to the end. */
951 return;
956 /* Eliminate all eliminable registers occurring in operands that
957 can be handled by the constraint pass. */
958 id = lra_get_insn_recog_data (insn);
959 static_id = id->insn_static_data;
960 validate_p = false;
961 for (i = 0; i < static_id->n_operands; i++)
963 orig_operand[i] = *id->operand_loc[i];
964 substed_operand[i] = *id->operand_loc[i];
966 /* For an asm statement, every operand is eliminable. */
967 if (icode < 0 || insn_data[icode].operand[i].eliminable)
969 /* Check for setting a hard register that we know about. */
970 if (static_id->operand[i].type != OP_IN
971 && REG_P (orig_operand[i]))
973 /* If we are assigning to a hard register that can be
974 eliminated, it must be as part of a PARALLEL, since
975 the code above handles single SETs. This reg can not
976 be longer eliminated -- it is forced by
977 mark_not_eliminable. */
978 for (ep = reg_eliminate;
979 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
980 ep++)
981 lra_assert (ep->from_rtx != orig_operand[i]
982 || ! ep->can_eliminate);
985 /* Companion to the above plus substitution, we can allow
986 invariants as the source of a plain move. */
987 substed_operand[i]
988 = lra_eliminate_regs_1 (*id->operand_loc[i], VOIDmode,
989 replace_p, ! replace_p, false);
990 if (substed_operand[i] != orig_operand[i])
991 validate_p = true;
995 if (! validate_p)
996 return;
998 /* Substitute the operands; the new values are in the substed_operand
999 array. */
1000 for (i = 0; i < static_id->n_operands; i++)
1001 *id->operand_loc[i] = substed_operand[i];
1002 for (i = 0; i < static_id->n_dups; i++)
1003 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
1005 /* If we had a move insn but now we don't, re-recognize it.
1006 This will cause spurious re-recognition if the old move had a
1007 PARALLEL since the new one still will, but we can't call
1008 single_set without having put new body into the insn and the
1009 re-recognition won't hurt in this rare case. */
1010 id = lra_update_insn_recog_data (insn);
1011 static_id = id->insn_static_data;
1014 /* Spill pseudos which are assigned to hard registers in SET. Add
1015 affected insns for processing in the subsequent constraint
1016 pass. */
1017 static void
1018 spill_pseudos (HARD_REG_SET set)
1020 int i;
1021 bitmap_head to_process;
1022 rtx insn;
1024 if (hard_reg_set_empty_p (set))
1025 return;
1026 if (lra_dump_file != NULL)
1028 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
1029 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1030 if (TEST_HARD_REG_BIT (set, i))
1031 fprintf (lra_dump_file, " %d", i);
1032 fprintf (lra_dump_file, "\n");
1034 bitmap_initialize (&to_process, &reg_obstack);
1035 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1036 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1037 && overlaps_hard_reg_set_p (set,
1038 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1040 if (lra_dump_file != NULL)
1041 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
1042 i, reg_renumber[i]);
1043 reg_renumber[i] = -1;
1044 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1046 IOR_HARD_REG_SET (lra_no_alloc_regs, set);
1047 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1048 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1050 lra_push_insn (insn);
1051 lra_set_used_insn_alternative (insn, -1);
1053 bitmap_clear (&to_process);
1056 /* Update all offsets and possibility for elimination on eliminable
1057 registers. Spill pseudos assigned to registers which became
1058 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1059 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
1060 registers whose offsets should be changed. Return true if any
1061 elimination offset changed. */
1062 static bool
1063 update_reg_eliminate (bitmap insns_with_changed_offsets)
1065 bool prev, result;
1066 struct elim_table *ep, *ep1;
1067 HARD_REG_SET temp_hard_reg_set;
1069 /* Clear self elimination offsets. */
1070 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1071 self_elim_offsets[ep->from] = 0;
1072 CLEAR_HARD_REG_SET (temp_hard_reg_set);
1073 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1075 /* If it is a currently used elimination: update the previous
1076 offset. */
1077 if (elimination_map[ep->from] == ep)
1078 ep->previous_offset = ep->offset;
1080 prev = ep->prev_can_eliminate;
1081 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
1082 if (ep->can_eliminate && ! prev)
1084 /* It is possible that not eliminable register becomes
1085 eliminable because we took other reasons into account to
1086 set up eliminable regs in the initial set up. Just
1087 ignore new eliminable registers. */
1088 setup_can_eliminate (ep, false);
1089 continue;
1091 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1093 /* We cannot use this elimination anymore -- find another
1094 one. */
1095 if (lra_dump_file != NULL)
1096 fprintf (lra_dump_file,
1097 " Elimination %d to %d is not possible anymore\n",
1098 ep->from, ep->to);
1099 /* Mark that is not eliminable anymore. */
1100 elimination_map[ep->from] = NULL;
1101 for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1102 if (ep1->can_eliminate && ep1->from == ep->from)
1103 break;
1104 if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
1106 if (lra_dump_file != NULL)
1107 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
1108 ep1->from, ep1->to);
1109 /* Prevent the hard register into which we eliminate now
1110 from the usage for pseudos. */
1111 SET_HARD_REG_BIT (temp_hard_reg_set, ep1->to);
1112 lra_assert (ep1->previous_offset == 0);
1113 ep1->previous_offset = ep->offset;
1115 else
1117 /* There is no elimination anymore just use the hard
1118 register `from' itself. Setup self elimination
1119 offset to restore the original offset values. */
1120 if (lra_dump_file != NULL)
1121 fprintf (lra_dump_file, " %d is not eliminable at all\n",
1122 ep->from);
1123 self_elim_offsets[ep->from] = -ep->offset;
1124 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
1125 if (ep->offset != 0)
1126 bitmap_ior_into (insns_with_changed_offsets,
1127 &lra_reg_info[ep->from].insn_bitmap);
1131 #ifdef ELIMINABLE_REGS
1132 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
1133 #else
1134 INITIAL_FRAME_POINTER_OFFSET (ep->offset);
1135 #endif
1137 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
1138 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
1139 spill_pseudos (temp_hard_reg_set);
1140 setup_elimination_map ();
1141 result = false;
1142 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1143 if (elimination_map[ep->from] == ep && ep->previous_offset != ep->offset)
1145 bitmap_ior_into (insns_with_changed_offsets,
1146 &lra_reg_info[ep->from].insn_bitmap);
1148 /* Update offset when the eliminate offset have been
1149 changed. */
1150 lra_update_reg_val_offset (lra_reg_info[ep->from].val,
1151 ep->offset - ep->previous_offset);
1152 result = true;
1154 return result;
1157 /* Initialize the table of hard registers to eliminate.
1158 Pre-condition: global flag frame_pointer_needed has been set before
1159 calling this function. */
1160 static void
1161 init_elim_table (void)
1163 bool value_p;
1164 struct elim_table *ep;
1165 #ifdef ELIMINABLE_REGS
1166 const struct elim_table_1 *ep1;
1167 #endif
1169 if (!reg_eliminate)
1170 reg_eliminate = XCNEWVEC (struct elim_table, NUM_ELIMINABLE_REGS);
1172 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
1173 /* Initiate member values which will be never changed. */
1174 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1175 self_elim_table.previous_offset = 0;
1176 #ifdef ELIMINABLE_REGS
1177 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1178 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1180 ep->offset = ep->previous_offset = 0;
1181 ep->from = ep1->from;
1182 ep->to = ep1->to;
1183 value_p = (targetm.can_eliminate (ep->from, ep->to)
1184 && ! (ep->to == STACK_POINTER_REGNUM
1185 && frame_pointer_needed
1186 && (! SUPPORTS_STACK_ALIGNMENT
1187 || ! stack_realign_fp)));
1188 setup_can_eliminate (ep, value_p);
1190 #else
1191 reg_eliminate[0].offset = reg_eliminate[0].previous_offset = 0;
1192 reg_eliminate[0].from = reg_eliminate_1[0].from;
1193 reg_eliminate[0].to = reg_eliminate_1[0].to;
1194 setup_can_eliminate (&reg_eliminate[0], ! frame_pointer_needed);
1195 #endif
1197 /* Count the number of eliminable registers and build the FROM and TO
1198 REG rtx's. Note that code in gen_rtx_REG will cause, e.g.,
1199 gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to equal stack_pointer_rtx.
1200 We depend on this. */
1201 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1203 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1204 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1205 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1209 /* Entry function for initialization of elimination once per
1210 function. */
1211 void
1212 lra_init_elimination (void)
1214 basic_block bb;
1215 rtx insn;
1217 init_elim_table ();
1218 FOR_EACH_BB (bb)
1219 FOR_BB_INSNS (bb, insn)
1220 if (NONDEBUG_INSN_P (insn))
1221 mark_not_eliminable (PATTERN (insn));
1222 setup_elimination_map ();
1225 /* Eliminate hard reg given by its location LOC. */
1226 void
1227 lra_eliminate_reg_if_possible (rtx *loc)
1229 int regno;
1230 struct elim_table *ep;
1232 lra_assert (REG_P (*loc));
1233 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1234 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
1235 return;
1236 if ((ep = get_elimination (*loc)) != NULL)
1237 *loc = ep->to_rtx;
1240 /* Do (final if FINAL_P) elimination in INSN. Add the insn for
1241 subsequent processing in the constraint pass, update the insn info. */
1242 static void
1243 process_insn_for_elimination (rtx insn, bool final_p)
1245 eliminate_regs_in_insn (insn, final_p);
1246 if (! final_p)
1248 /* Check that insn changed its code. This is a case when a move
1249 insn becomes an add insn and we do not want to process the
1250 insn as a move anymore. */
1251 int icode = recog (PATTERN (insn), insn, 0);
1253 if (icode >= 0 && icode != INSN_CODE (insn))
1255 INSN_CODE (insn) = icode;
1256 lra_update_insn_recog_data (insn);
1258 lra_update_insn_regno_info (insn);
1259 lra_push_insn (insn);
1260 lra_set_used_insn_alternative (insn, -1);
1264 /* Entry function to do final elimination if FINAL_P or to update
1265 elimination register offsets. */
1266 void
1267 lra_eliminate (bool final_p)
1269 int i;
1270 unsigned int uid;
1271 rtx mem_loc, invariant;
1272 bitmap_head insns_with_changed_offsets;
1273 bitmap_iterator bi;
1274 struct elim_table *ep;
1275 int regs_num = max_reg_num ();
1277 timevar_push (TV_LRA_ELIMINATE);
1279 bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
1280 if (final_p)
1282 #ifdef ENABLE_CHECKING
1283 update_reg_eliminate (&insns_with_changed_offsets);
1284 if (! bitmap_empty_p (&insns_with_changed_offsets))
1285 gcc_unreachable ();
1286 #endif
1287 /* We change eliminable hard registers in insns so we should do
1288 this for all insns containing any eliminable hard
1289 register. */
1290 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1291 if (elimination_map[ep->from] != NULL)
1292 bitmap_ior_into (&insns_with_changed_offsets,
1293 &lra_reg_info[ep->from].insn_bitmap);
1295 else if (! update_reg_eliminate (&insns_with_changed_offsets))
1296 goto lra_eliminate_done;
1297 if (lra_dump_file != NULL)
1299 fprintf (lra_dump_file, "New elimination table:\n");
1300 print_elim_table (lra_dump_file);
1302 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
1303 if (lra_reg_info[i].nrefs != 0)
1305 mem_loc = ira_reg_equiv[i].memory;
1306 if (mem_loc != NULL_RTX)
1307 mem_loc = lra_eliminate_regs_1 (mem_loc, VOIDmode,
1308 final_p, ! final_p, false);
1309 ira_reg_equiv[i].memory = mem_loc;
1310 invariant = ira_reg_equiv[i].invariant;
1311 if (invariant != NULL_RTX)
1312 invariant = lra_eliminate_regs_1 (invariant, VOIDmode,
1313 final_p, ! final_p, false);
1314 ira_reg_equiv[i].invariant = invariant;
1315 if (lra_dump_file != NULL
1316 && (mem_loc != NULL_RTX || invariant != NULL))
1317 fprintf (lra_dump_file,
1318 "Updating elimination of equiv for reg %d\n", i);
1320 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
1321 process_insn_for_elimination (lra_insn_recog_data[uid]->insn, final_p);
1322 bitmap_clear (&insns_with_changed_offsets);
1324 lra_eliminate_done:
1325 timevar_pop (TV_LRA_ELIMINATE);