1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-attr.h"
40 #include "basic-block.h"
46 #include "target-def.h"
48 #ifndef TARGET_NO_PROTOTYPE
49 #define TARGET_NO_PROTOTYPE 0
52 extern int profile_block_flag
;
54 #define min(A,B) ((A) < (B) ? (A) : (B))
55 #define max(A,B) ((A) > (B) ? (A) : (B))
59 enum processor_type rs6000_cpu
;
60 struct rs6000_cpu_select rs6000_select
[3] =
62 /* switch name, tune arch */
63 { (const char *)0, "--with-cpu=", 1, 1 },
64 { (const char *)0, "-mcpu=", 1, 1 },
65 { (const char *)0, "-mtune=", 1, 0 },
68 /* Set to non-zero once AIX common-mode calls have been defined. */
69 static int common_mode_defined
;
71 /* Save information from a "cmpxx" operation until the branch or scc is
73 rtx rs6000_compare_op0
, rs6000_compare_op1
;
74 int rs6000_compare_fp_p
;
76 /* Label number of label created for -mrelocatable, to call to so we can
77 get the address of the GOT section */
78 int rs6000_pic_labelno
;
81 /* Which abi to adhere to */
82 const char *rs6000_abi_name
= RS6000_ABI_NAME
;
84 /* Semantics of the small data area */
85 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
87 /* Which small data model to use */
88 const char *rs6000_sdata_name
= (char *)0;
90 /* Counter for labels which are to be placed in .fixup. */
94 /* ABI enumeration available for subtarget to use. */
95 enum rs6000_abi rs6000_current_abi
;
98 const char *rs6000_debug_name
;
99 int rs6000_debug_stack
; /* debug stack applications */
100 int rs6000_debug_arg
; /* debug argument handling */
102 /* Flag to say the TOC is initialized */
104 char toc_label_name
[10];
106 /* Alias set for saves and restores from the rs6000 stack. */
107 static int rs6000_sr_alias_set
;
109 static void rs6000_add_gc_roots
PARAMS ((void));
110 static int num_insns_constant_wide
PARAMS ((HOST_WIDE_INT
));
111 static rtx expand_block_move_mem
PARAMS ((enum machine_mode
, rtx
, rtx
));
112 static void validate_condition_mode
113 PARAMS ((enum rtx_code
, enum machine_mode
));
114 static rtx rs6000_generate_compare
PARAMS ((enum rtx_code
));
115 static void rs6000_maybe_dead
PARAMS ((rtx
));
116 static void rs6000_emit_stack_tie
PARAMS ((void));
117 static void rs6000_frame_related
PARAMS ((rtx
, rtx
, HOST_WIDE_INT
, rtx
, rtx
));
118 static void rs6000_emit_allocate_stack
PARAMS ((HOST_WIDE_INT
, int));
119 static unsigned rs6000_hash_constant
PARAMS ((rtx
));
120 static unsigned toc_hash_function
PARAMS ((const void *));
121 static int toc_hash_eq
PARAMS ((const void *, const void *));
122 static int toc_hash_mark_entry
PARAMS ((void **, void *));
123 static void toc_hash_mark_table
PARAMS ((void *));
124 static int constant_pool_expr_1
PARAMS ((rtx
, int *, int *));
125 static void rs6000_free_machine_status
PARAMS ((struct function
*));
126 static void rs6000_init_machine_status
PARAMS ((struct function
*));
127 static int rs6000_ra_ever_killed
PARAMS ((void));
128 static int rs6000_valid_type_attribute_p
PARAMS ((tree
, tree
, tree
, tree
));
129 static void rs6000_output_function_prologue
PARAMS ((FILE *, HOST_WIDE_INT
));
130 static void rs6000_output_function_epilogue
PARAMS ((FILE *, HOST_WIDE_INT
));
132 /* Default register names. */
133 char rs6000_reg_names
[][8] =
135 "0", "1", "2", "3", "4", "5", "6", "7",
136 "8", "9", "10", "11", "12", "13", "14", "15",
137 "16", "17", "18", "19", "20", "21", "22", "23",
138 "24", "25", "26", "27", "28", "29", "30", "31",
139 "0", "1", "2", "3", "4", "5", "6", "7",
140 "8", "9", "10", "11", "12", "13", "14", "15",
141 "16", "17", "18", "19", "20", "21", "22", "23",
142 "24", "25", "26", "27", "28", "29", "30", "31",
143 "mq", "lr", "ctr","ap",
144 "0", "1", "2", "3", "4", "5", "6", "7",
148 #ifdef TARGET_REGNAMES
149 static char alt_reg_names
[][8] =
151 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
152 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
153 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
154 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
155 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
156 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
157 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
158 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
159 "mq", "lr", "ctr", "ap",
160 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
165 #ifndef MASK_STRICT_ALIGN
166 #define MASK_STRICT_ALIGN 0
169 /* Initialize the GCC target structure. */
170 #undef TARGET_VALID_TYPE_ATTRIBUTE
171 #define TARGET_VALID_TYPE_ATTRIBUTE rs6000_valid_type_attribute_p
173 #undef TARGET_ASM_FUNCTION_PROLOGUE
174 #define TARGET_ASM_FUNCTION_PROLOGUE rs6000_output_function_prologue
175 #undef TARGET_ASM_FUNCTION_EPILOGUE
176 #define TARGET_ASM_FUNCTION_EPILOGUE rs6000_output_function_epilogue
178 struct gcc_target target
= TARGET_INITIALIZER
;
180 /* Override command line options. Mostly we process the processor
181 type and sometimes adjust other TARGET_ options. */
184 rs6000_override_options (default_cpu
)
185 const char *default_cpu
;
188 struct rs6000_cpu_select
*ptr
;
190 /* Simplify the entries below by making a mask for any POWER
191 variant and any PowerPC variant. */
193 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
194 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
195 | MASK_PPC_GFXOPT | MASK_POWERPC64)
196 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
200 const char *name
; /* Canonical processor name. */
201 enum processor_type processor
; /* Processor type enum value. */
202 int target_enable
; /* Target flags to enable. */
203 int target_disable
; /* Target flags to disable. */
204 } processor_target_table
[]
205 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
206 POWER_MASKS
| POWERPC_MASKS
},
207 {"power", PROCESSOR_POWER
,
208 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
209 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
210 {"power2", PROCESSOR_POWER
,
211 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
212 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
213 {"power3", PROCESSOR_PPC630
,
214 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
215 POWER_MASKS
| MASK_PPC_GPOPT
},
216 {"powerpc", PROCESSOR_POWERPC
,
217 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
218 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
219 {"powerpc64", PROCESSOR_POWERPC64
,
220 MASK_POWERPC
| MASK_POWERPC64
| MASK_NEW_MNEMONICS
,
221 POWER_MASKS
| POWERPC_OPT_MASKS
},
222 {"rios", PROCESSOR_RIOS1
,
223 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
224 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
225 {"rios1", PROCESSOR_RIOS1
,
226 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
227 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
228 {"rsc", PROCESSOR_PPC601
,
229 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
230 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
231 {"rsc1", PROCESSOR_PPC601
,
232 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
233 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
234 {"rios2", PROCESSOR_RIOS2
,
235 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
236 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
237 {"rs64a", PROCESSOR_RS64A
,
238 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
239 POWER_MASKS
| POWERPC_OPT_MASKS
},
240 {"401", PROCESSOR_PPC403
,
241 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
242 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
243 {"403", PROCESSOR_PPC403
,
244 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
245 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
246 {"505", PROCESSOR_MPCCORE
,
247 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
248 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
249 {"601", PROCESSOR_PPC601
,
250 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
251 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
252 {"602", PROCESSOR_PPC603
,
253 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
254 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
255 {"603", PROCESSOR_PPC603
,
256 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
257 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
258 {"603e", PROCESSOR_PPC603
,
259 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
260 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
261 {"ec603e", PROCESSOR_PPC603
,
262 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
263 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
264 {"604", PROCESSOR_PPC604
,
265 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
266 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
267 {"604e", PROCESSOR_PPC604e
,
268 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
269 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
270 {"620", PROCESSOR_PPC620
,
271 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
272 POWER_MASKS
| MASK_PPC_GPOPT
},
273 {"630", PROCESSOR_PPC630
,
274 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
275 POWER_MASKS
| MASK_PPC_GPOPT
},
276 {"740", PROCESSOR_PPC750
,
277 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
278 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
279 {"750", PROCESSOR_PPC750
,
280 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
281 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
282 {"801", PROCESSOR_MPCCORE
,
283 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
284 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
285 {"821", PROCESSOR_MPCCORE
,
286 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
287 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
288 {"823", PROCESSOR_MPCCORE
,
289 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
290 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
291 {"860", PROCESSOR_MPCCORE
,
292 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
293 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
295 size_t ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
297 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
298 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
300 profile_block_flag
= 0;
302 /* Identify the processor type */
303 rs6000_select
[0].string
= default_cpu
;
304 rs6000_cpu
= TARGET_POWERPC64
? PROCESSOR_DEFAULT64
: PROCESSOR_DEFAULT
;
306 for (i
= 0; i
< ARRAY_SIZE (rs6000_select
); i
++)
308 ptr
= &rs6000_select
[i
];
309 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
311 for (j
= 0; j
< ptt_size
; j
++)
312 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
315 rs6000_cpu
= processor_target_table
[j
].processor
;
319 target_flags
|= processor_target_table
[j
].target_enable
;
320 target_flags
&= ~processor_target_table
[j
].target_disable
;
326 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
330 /* If we are optimizing big endian systems for space, use the
331 store multiple instructions. */
332 if (BYTES_BIG_ENDIAN
&& optimize_size
)
333 target_flags
|= MASK_MULTIPLE
;
335 /* If -mmultiple or -mno-multiple was explicitly used, don't
336 override with the processor default */
337 if (TARGET_MULTIPLE_SET
)
338 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
340 /* If -mstring or -mno-string was explicitly used, don't
341 override with the processor default */
342 if (TARGET_STRING_SET
)
343 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
345 /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu
346 is a 750, because the hardware doesn't support the instructions used in
347 little endian mode, and causes an alignment trap. The 750 does not cause
348 an alignment trap (except when the target is unaligned). */
350 if (! BYTES_BIG_ENDIAN
&& rs6000_cpu
!= PROCESSOR_PPC750
)
354 target_flags
&= ~MASK_MULTIPLE
;
355 if (TARGET_MULTIPLE_SET
)
356 warning ("-mmultiple is not supported on little endian systems");
361 target_flags
&= ~MASK_STRING
;
362 if (TARGET_STRING_SET
)
363 warning ("-mstring is not supported on little endian systems");
367 if (flag_pic
&& (DEFAULT_ABI
== ABI_AIX
))
369 warning ("-f%s ignored for AIX (all code is position independent)",
370 (flag_pic
> 1) ? "PIC" : "pic");
374 if (flag_function_sections
&& (write_symbols
!= NO_DEBUG
)
375 && (DEFAULT_ABI
== ABI_AIX
))
377 warning ("-ffunction-sections disabled on AIX when debugging");
378 flag_function_sections
= 0;
381 if (flag_data_sections
&& (DEFAULT_ABI
== ABI_AIX
))
383 warning ("-fdata-sections not supported on AIX");
384 flag_data_sections
= 0;
387 /* Set debug flags */
388 if (rs6000_debug_name
)
390 if (! strcmp (rs6000_debug_name
, "all"))
391 rs6000_debug_stack
= rs6000_debug_arg
= 1;
392 else if (! strcmp (rs6000_debug_name
, "stack"))
393 rs6000_debug_stack
= 1;
394 else if (! strcmp (rs6000_debug_name
, "arg"))
395 rs6000_debug_arg
= 1;
397 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
400 #ifdef TARGET_REGNAMES
401 /* If the user desires alternate register names, copy in the alternate names
404 memcpy (rs6000_reg_names
, alt_reg_names
, sizeof (rs6000_reg_names
));
407 #ifdef SUBTARGET_OVERRIDE_OPTIONS
408 SUBTARGET_OVERRIDE_OPTIONS
;
411 /* Register global variables with the garbage collector. */
412 rs6000_add_gc_roots ();
414 /* Allocate an alias set for register saves & restores from stack. */
415 rs6000_sr_alias_set
= new_alias_set ();
418 ASM_GENERATE_INTERNAL_LABEL (toc_label_name
, "LCTOC", 1);
420 /* Arrange to save and restore machine status around nested functions. */
421 init_machine_status
= rs6000_init_machine_status
;
422 free_machine_status
= rs6000_free_machine_status
;
426 optimization_options (level
, size
)
427 int level ATTRIBUTE_UNUSED
;
428 int size ATTRIBUTE_UNUSED
;
432 /* Do anything needed at the start of the asm file. */
435 rs6000_file_start (file
, default_cpu
)
437 const char *default_cpu
;
441 const char *start
= buffer
;
442 struct rs6000_cpu_select
*ptr
;
444 if (flag_verbose_asm
)
446 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
447 rs6000_select
[0].string
= default_cpu
;
449 for (i
= 0; i
< ARRAY_SIZE (rs6000_select
); i
++)
451 ptr
= &rs6000_select
[i
];
452 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
454 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
460 switch (rs6000_sdata
)
462 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
463 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
464 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
465 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
468 if (rs6000_sdata
&& g_switch_value
)
470 fprintf (file
, "%s -G %d", start
, g_switch_value
);
481 /* Create a CONST_DOUBLE from a string. */
484 rs6000_float_const (string
, mode
)
486 enum machine_mode mode
;
488 REAL_VALUE_TYPE value
;
489 value
= REAL_VALUE_ATOF (string
, mode
);
490 return immed_real_const_1 (value
, mode
);
493 /* Return non-zero if this function is known to have a null epilogue. */
498 if (reload_completed
)
500 rs6000_stack_t
*info
= rs6000_stack_info ();
502 if (info
->first_gp_reg_save
== 32
503 && info
->first_fp_reg_save
== 64
513 /* Returns 1 always. */
516 any_operand (op
, mode
)
517 register rtx op ATTRIBUTE_UNUSED
;
518 enum machine_mode mode ATTRIBUTE_UNUSED
;
523 /* Returns 1 if op is the count register */
525 count_register_operand(op
, mode
)
527 enum machine_mode mode ATTRIBUTE_UNUSED
;
529 if (GET_CODE (op
) != REG
)
532 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
535 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
542 xer_operand(op
, mode
)
544 enum machine_mode mode ATTRIBUTE_UNUSED
;
546 if (GET_CODE (op
) != REG
)
549 if (XER_REGNO_P (REGNO (op
)))
555 /* Return 1 if OP is a constant that can fit in a D field. */
558 short_cint_operand (op
, mode
)
560 enum machine_mode mode ATTRIBUTE_UNUSED
;
562 return (GET_CODE (op
) == CONST_INT
563 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'I'));
566 /* Similar for a unsigned D field. */
569 u_short_cint_operand (op
, mode
)
571 enum machine_mode mode ATTRIBUTE_UNUSED
;
573 return (GET_CODE (op
) == CONST_INT
574 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K'));
577 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
580 non_short_cint_operand (op
, mode
)
582 enum machine_mode mode ATTRIBUTE_UNUSED
;
584 return (GET_CODE (op
) == CONST_INT
585 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
588 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
592 gpc_reg_operand (op
, mode
)
594 enum machine_mode mode
;
596 return (register_operand (op
, mode
)
597 && (GET_CODE (op
) != REG
598 || (REGNO (op
) >= ARG_POINTER_REGNUM
599 && !XER_REGNO_P (REGNO (op
)))
600 || REGNO (op
) < MQ_REGNO
));
603 /* Returns 1 if OP is either a pseudo-register or a register denoting a
607 cc_reg_operand (op
, mode
)
609 enum machine_mode mode
;
611 return (register_operand (op
, mode
)
612 && (GET_CODE (op
) != REG
613 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
614 || CR_REGNO_P (REGNO (op
))));
617 /* Returns 1 if OP is either a pseudo-register or a register denoting a
618 CR field that isn't CR0. */
621 cc_reg_not_cr0_operand (op
, mode
)
623 enum machine_mode mode
;
625 return (register_operand (op
, mode
)
626 && (GET_CODE (op
) != REG
627 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
628 || CR_REGNO_NOT_CR0_P (REGNO (op
))));
631 /* Returns 1 if OP is either a constant integer valid for a D-field or a
632 non-special register. If a register, it must be in the proper mode unless
636 reg_or_short_operand (op
, mode
)
638 enum machine_mode mode
;
640 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
643 /* Similar, except check if the negation of the constant would be valid for
647 reg_or_neg_short_operand (op
, mode
)
649 enum machine_mode mode
;
651 if (GET_CODE (op
) == CONST_INT
)
652 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
654 return gpc_reg_operand (op
, mode
);
657 /* Return 1 if the operand is either a register or an integer whose high-order
661 reg_or_u_short_operand (op
, mode
)
663 enum machine_mode mode
;
665 return u_short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
668 /* Return 1 is the operand is either a non-special register or ANY
672 reg_or_cint_operand (op
, mode
)
674 enum machine_mode mode
;
676 return (GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
));
679 /* Return 1 is the operand is either a non-special register or ANY
680 32-bit signed constant integer. */
683 reg_or_arith_cint_operand (op
, mode
)
685 enum machine_mode mode
;
687 return (gpc_reg_operand (op
, mode
)
688 || (GET_CODE (op
) == CONST_INT
689 #if HOST_BITS_PER_WIDE_INT != 32
690 && ((unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x80000000)
691 < (unsigned HOST_WIDE_INT
) 0x100000000ll
)
696 /* Return 1 is the operand is either a non-special register or ANY
697 32-bit unsigned constant integer. */
700 reg_or_logical_cint_operand (op
, mode
)
702 enum machine_mode mode
;
704 if (GET_CODE (op
) == CONST_INT
)
706 if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
708 if (GET_MODE_BITSIZE (mode
) <= 32)
715 return ((INTVAL (op
) & GET_MODE_MASK (mode
)
716 & (~ (unsigned HOST_WIDE_INT
) 0xffffffff)) == 0);
718 else if (GET_CODE (op
) == CONST_DOUBLE
)
720 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
724 return CONST_DOUBLE_HIGH (op
) == 0;
727 return gpc_reg_operand (op
, mode
);
730 /* Return 1 if the operand is an operand that can be loaded via the GOT */
733 got_operand (op
, mode
)
735 enum machine_mode mode ATTRIBUTE_UNUSED
;
737 return (GET_CODE (op
) == SYMBOL_REF
738 || GET_CODE (op
) == CONST
739 || GET_CODE (op
) == LABEL_REF
);
742 /* Return 1 if the operand is a simple references that can be loaded via
743 the GOT (labels involving addition aren't allowed). */
746 got_no_const_operand (op
, mode
)
748 enum machine_mode mode ATTRIBUTE_UNUSED
;
750 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
753 /* Return the number of instructions it takes to form a constant in an
757 num_insns_constant_wide (value
)
760 /* signed constant loadable with {cal|addi} */
761 if (CONST_OK_FOR_LETTER_P (value
, 'I'))
764 /* constant loadable with {cau|addis} */
765 else if (CONST_OK_FOR_LETTER_P (value
, 'L'))
768 #if HOST_BITS_PER_WIDE_INT == 64
769 else if (TARGET_POWERPC64
)
771 HOST_WIDE_INT low
= value
& 0xffffffff;
772 HOST_WIDE_INT high
= value
>> 32;
774 low
= (low
^ 0x80000000) - 0x80000000; /* sign extend */
776 if (high
== 0 && (low
& 0x80000000) == 0)
779 else if (high
== -1 && (low
& 0x80000000) != 0)
783 return num_insns_constant_wide (high
) + 1;
786 return (num_insns_constant_wide (high
)
787 + num_insns_constant_wide (low
) + 1);
796 num_insns_constant (op
, mode
)
798 enum machine_mode mode
;
800 if (GET_CODE (op
) == CONST_INT
)
802 #if HOST_BITS_PER_WIDE_INT == 64
803 if (mask64_operand (op
, mode
))
807 return num_insns_constant_wide (INTVAL (op
));
810 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
815 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
816 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
817 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
820 else if (GET_CODE (op
) == CONST_DOUBLE
)
826 int endian
= (WORDS_BIG_ENDIAN
== 0);
828 if (mode
== VOIDmode
|| mode
== DImode
)
830 high
= CONST_DOUBLE_HIGH (op
);
831 low
= CONST_DOUBLE_LOW (op
);
835 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
836 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
842 return (num_insns_constant_wide (low
)
843 + num_insns_constant_wide (high
));
847 if (high
== 0 && (low
& 0x80000000) == 0)
848 return num_insns_constant_wide (low
);
850 else if (high
== -1 && (low
& 0x80000000) != 0)
851 return num_insns_constant_wide (low
);
853 else if (mask64_operand (op
, mode
))
857 return num_insns_constant_wide (high
) + 1;
860 return (num_insns_constant_wide (high
)
861 + num_insns_constant_wide (low
) + 1);
869 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
870 with one instruction per word. We only do this if we can safely read
871 CONST_DOUBLE_{LOW,HIGH}. */
874 easy_fp_constant (op
, mode
)
876 register enum machine_mode mode
;
878 if (GET_CODE (op
) != CONST_DOUBLE
879 || GET_MODE (op
) != mode
880 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
883 /* Consider all constants with -msoft-float to be easy */
884 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
887 /* If we are using V.4 style PIC, consider all constants to be hard */
888 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
891 #ifdef TARGET_RELOCATABLE
892 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
893 if (TARGET_RELOCATABLE
)
902 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
903 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
905 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
906 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
909 else if (mode
== SFmode
)
914 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
915 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
917 return num_insns_constant_wide (l
) == 1;
920 else if (mode
== DImode
)
921 return ((TARGET_POWERPC64
922 && GET_CODE (op
) == CONST_DOUBLE
&& CONST_DOUBLE_LOW (op
) == 0)
923 || (num_insns_constant (op
, DImode
) <= 2));
925 else if (mode
== SImode
)
931 /* Return 1 if the operand is 0.0. */
933 zero_fp_constant (op
, mode
)
935 register enum machine_mode mode
;
937 return GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
);
940 /* Return 1 if the operand is in volatile memory. Note that during the
941 RTL generation phase, memory_operand does not return TRUE for
942 volatile memory references. So this function allows us to
943 recognize volatile references where its safe. */
946 volatile_mem_operand (op
, mode
)
948 enum machine_mode mode
;
950 if (GET_CODE (op
) != MEM
)
953 if (!MEM_VOLATILE_P (op
))
956 if (mode
!= GET_MODE (op
))
959 if (reload_completed
)
960 return memory_operand (op
, mode
);
962 if (reload_in_progress
)
963 return strict_memory_address_p (mode
, XEXP (op
, 0));
965 return memory_address_p (mode
, XEXP (op
, 0));
968 /* Return 1 if the operand is an offsettable memory operand. */
971 offsettable_mem_operand (op
, mode
)
973 enum machine_mode mode
;
975 return ((GET_CODE (op
) == MEM
)
976 && offsettable_address_p (reload_completed
|| reload_in_progress
,
977 mode
, XEXP (op
, 0)));
980 /* Return 1 if the operand is either an easy FP constant (see above) or
984 mem_or_easy_const_operand (op
, mode
)
986 enum machine_mode mode
;
988 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
991 /* Return 1 if the operand is either a non-special register or an item
992 that can be used as the operand of a `mode' add insn. */
995 add_operand (op
, mode
)
997 enum machine_mode mode
;
999 return (reg_or_short_operand (op
, mode
)
1000 || (GET_CODE (op
) == CONST_INT
1001 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L')));
1004 /* Return 1 if OP is a constant but not a valid add_operand. */
1007 non_add_cint_operand (op
, mode
)
1009 enum machine_mode mode ATTRIBUTE_UNUSED
;
1011 return (GET_CODE (op
) == CONST_INT
1012 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
1013 && ! CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L'));
1016 /* Return 1 if the operand is a non-special register or a constant that
1017 can be used as the operand of an OR or XOR insn on the RS/6000. */
1020 logical_operand (op
, mode
)
1022 enum machine_mode mode
;
1024 /* an unsigned representation of 'op'. */
1025 unsigned HOST_WIDE_INT opl
, oph
;
1027 if (gpc_reg_operand (op
, mode
))
1030 if (GET_CODE (op
) == CONST_INT
)
1032 else if (GET_CODE (op
) == CONST_DOUBLE
)
1034 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1037 opl
= CONST_DOUBLE_LOW (op
);
1038 oph
= CONST_DOUBLE_HIGH (op
);
1040 if (oph
!= ((unsigned HOST_WIDE_INT
)0
1041 - ((opl
& ((unsigned HOST_WIDE_INT
)1
1042 << (HOST_BITS_PER_WIDE_INT
- 1))) != 0)))
1048 /* This must really be SImode, not MODE. */
1049 if (opl
!= (unsigned HOST_WIDE_INT
) trunc_int_for_mode (opl
, SImode
))
1052 return ((opl
& 0xffff) == 0
1053 || (opl
& ~ (unsigned HOST_WIDE_INT
) 0xffff) == 0);
1056 /* Return 1 if C is a constant that is not a logical operand (as
1057 above), but could be split into one. */
1060 non_logical_cint_operand (op
, mode
)
1062 enum machine_mode mode
;
1064 return ((GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
)
1065 && ! logical_operand (op
, mode
)
1066 && reg_or_logical_cint_operand (op
, mode
));
1069 /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
1070 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
1071 Reject all ones and all zeros, since these should have been optimized
1072 away and confuse the making of MB and ME. */
1075 mask_operand (op
, mode
)
1077 enum machine_mode mode ATTRIBUTE_UNUSED
;
1082 int transitions
= 0;
1084 if (GET_CODE (op
) != CONST_INT
)
1089 if (c
== 0 || c
== ~0)
1092 last_bit_value
= c
& 1;
1094 for (i
= 1; i
< 32; i
++)
1095 if (((c
>>= 1) & 1) != last_bit_value
)
1096 last_bit_value
^= 1, transitions
++;
1098 return transitions
<= 2;
1101 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1102 It is if there are no more than one 1->0 or 0->1 transitions.
1103 Reject all ones and all zeros, since these should have been optimized
1104 away and confuse the making of MB and ME. */
1107 mask64_operand (op
, mode
)
1109 enum machine_mode mode
;
1111 if (GET_CODE (op
) == CONST_INT
)
1113 HOST_WIDE_INT c
= INTVAL (op
);
1116 int transitions
= 0;
1118 if (c
== 0 || c
== ~0)
1121 last_bit_value
= c
& 1;
1123 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1124 if (((c
>>= 1) & 1) != last_bit_value
)
1125 last_bit_value
^= 1, transitions
++;
1127 return transitions
<= 1;
1129 else if (GET_CODE (op
) == CONST_DOUBLE
1130 && (mode
== VOIDmode
|| mode
== DImode
))
1132 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1133 #if HOST_BITS_PER_WIDE_INT == 32
1134 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1138 int transitions
= 0;
1141 #if HOST_BITS_PER_WIDE_INT == 32
1146 #if HOST_BITS_PER_WIDE_INT == 32
1152 last_bit_value
= low
& 1;
1154 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1155 if (((low
>>= 1) & 1) != last_bit_value
)
1156 last_bit_value
^= 1, transitions
++;
1158 #if HOST_BITS_PER_WIDE_INT == 32
1159 if ((high
& 1) != last_bit_value
)
1160 last_bit_value
^= 1, transitions
++;
1162 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1163 if (((high
>>= 1) & 1) != last_bit_value
)
1164 last_bit_value
^= 1, transitions
++;
1167 return transitions
<= 1;
1173 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1174 It is if there are no more than two 1->0 or 0->1 transitions.
1175 Reject all ones and all zeros, since these should have been optimized
1176 away and confuse the making of MB and ME. */
1179 rldic_operand (op
, mode
)
1181 enum machine_mode mode
;
1183 if (GET_CODE (op
) == CONST_INT
)
1185 HOST_WIDE_INT c
= INTVAL (op
);
1188 int transitions
= 0;
1190 if (c
== 0 || c
== ~0)
1193 last_bit_value
= c
& 1;
1195 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1196 if (((c
>>= 1) & 1) != last_bit_value
)
1197 last_bit_value
^= 1, transitions
++;
1199 return transitions
<= 2;
1201 else if (GET_CODE (op
) == CONST_DOUBLE
1202 && (mode
== VOIDmode
|| mode
== DImode
))
1204 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1205 #if HOST_BITS_PER_WIDE_INT == 32
1206 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1210 int transitions
= 0;
1213 #if HOST_BITS_PER_WIDE_INT == 32
1218 #if HOST_BITS_PER_WIDE_INT == 32
1224 last_bit_value
= low
& 1;
1226 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1227 if (((low
>>= 1) & 1) != last_bit_value
)
1228 last_bit_value
^= 1, transitions
++;
1230 #if HOST_BITS_PER_WIDE_INT == 32
1231 if ((high
& 1) != last_bit_value
)
1232 last_bit_value
^= 1, transitions
++;
1234 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1235 if (((high
>>= 1) & 1) != last_bit_value
)
1236 last_bit_value
^= 1, transitions
++;
1239 return transitions
<= 2;
1245 /* Return 1 if the operand is either a non-special register or a constant
1246 that can be used as the operand of a PowerPC64 logical AND insn. */
1249 and64_operand (op
, mode
)
1251 enum machine_mode mode
;
1253 if (fixed_regs
[CR0_REGNO
]) /* CR0 not available, don't do andi./andis. */
1254 return (gpc_reg_operand (op
, mode
) || mask64_operand (op
, mode
));
1256 return (logical_operand (op
, mode
) || mask64_operand (op
, mode
));
1259 /* Return 1 if the operand is either a non-special register or a
1260 constant that can be used as the operand of an RS/6000 logical AND insn. */
1263 and_operand (op
, mode
)
1265 enum machine_mode mode
;
1267 if (fixed_regs
[CR0_REGNO
]) /* CR0 not available, don't do andi./andis. */
1268 return (gpc_reg_operand (op
, mode
) || mask_operand (op
, mode
));
1270 return (logical_operand (op
, mode
) || mask_operand (op
, mode
));
1273 /* Return 1 if the operand is a general register or memory operand. */
1276 reg_or_mem_operand (op
, mode
)
1278 register enum machine_mode mode
;
1280 return (gpc_reg_operand (op
, mode
)
1281 || memory_operand (op
, mode
)
1282 || volatile_mem_operand (op
, mode
));
1285 /* Return 1 if the operand is a general register or memory operand without
1286 pre_inc or pre_dec which produces invalid form of PowerPC lwa
1290 lwa_operand (op
, mode
)
1292 register enum machine_mode mode
;
1296 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
1297 inner
= SUBREG_REG (inner
);
1299 return gpc_reg_operand (inner
, mode
)
1300 || (memory_operand (inner
, mode
)
1301 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
1302 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
1305 /* Return 1 if the operand, used inside a MEM, is a valid first argument
1306 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
1310 call_operand (op
, mode
)
1312 enum machine_mode mode
;
1314 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1317 return (GET_CODE (op
) == SYMBOL_REF
1318 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
1322 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
1323 this file and the function is not weakly defined. */
1326 current_file_function_operand (op
, mode
)
1328 enum machine_mode mode ATTRIBUTE_UNUSED
;
1330 return (GET_CODE (op
) == SYMBOL_REF
1331 && (SYMBOL_REF_FLAG (op
)
1332 || (op
== XEXP (DECL_RTL (current_function_decl
), 0)
1333 && ! DECL_WEAK (current_function_decl
))));
1337 /* Return 1 if this operand is a valid input for a move insn. */
1340 input_operand (op
, mode
)
1342 enum machine_mode mode
;
1344 /* Memory is always valid. */
1345 if (memory_operand (op
, mode
))
1348 /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
1349 if (GET_CODE (op
) == CONSTANT_P_RTX
)
1352 /* For floating-point, easy constants are valid. */
1353 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1355 && easy_fp_constant (op
, mode
))
1358 /* Allow any integer constant. */
1359 if (GET_MODE_CLASS (mode
) == MODE_INT
1360 && (GET_CODE (op
) == CONST_INT
1361 || GET_CODE (op
) == CONST_DOUBLE
))
1364 /* For floating-point or multi-word mode, the only remaining valid type
1366 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1367 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1368 return register_operand (op
, mode
);
1370 /* The only cases left are integral modes one word or smaller (we
1371 do not get called for MODE_CC values). These can be in any
1373 if (register_operand (op
, mode
))
1376 /* A SYMBOL_REF referring to the TOC is valid. */
1377 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1380 /* A constant pool expression (relative to the TOC) is valid */
1381 if (TOC_RELATIVE_EXPR_P (op
))
1384 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1386 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1387 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1388 && small_data_operand (op
, Pmode
))
1394 /* Return 1 for an operand in small memory on V.4/eabi */
1397 small_data_operand (op
, mode
)
1398 rtx op ATTRIBUTE_UNUSED
;
1399 enum machine_mode mode ATTRIBUTE_UNUSED
;
1404 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1407 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1410 if (GET_CODE (op
) == SYMBOL_REF
)
1413 else if (GET_CODE (op
) != CONST
1414 || GET_CODE (XEXP (op
, 0)) != PLUS
1415 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1416 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1421 rtx sum
= XEXP (op
, 0);
1422 HOST_WIDE_INT summand
;
1424 /* We have to be careful here, because it is the referenced address
1425 that must be 32k from _SDA_BASE_, not just the symbol. */
1426 summand
= INTVAL (XEXP (sum
, 1));
1427 if (summand
< 0 || summand
> g_switch_value
)
1430 sym_ref
= XEXP (sum
, 0);
1433 if (*XSTR (sym_ref
, 0) != '@')
1444 constant_pool_expr_1 (op
, have_sym
, have_toc
)
1449 switch (GET_CODE(op
))
1452 if (CONSTANT_POOL_ADDRESS_P (op
))
1454 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (op
), Pmode
))
1462 else if (! strcmp (XSTR (op
, 0), toc_label_name
))
1471 return constant_pool_expr_1 (XEXP (op
, 0), have_sym
, have_toc
) &&
1472 constant_pool_expr_1 (XEXP (op
, 1), have_sym
, have_toc
);
1474 return constant_pool_expr_1 (XEXP (op
, 0), have_sym
, have_toc
);
1483 constant_pool_expr_p (op
)
1488 return constant_pool_expr_1 (op
, &have_sym
, &have_toc
) && have_sym
;
1492 toc_relative_expr_p (op
)
1497 return constant_pool_expr_1 (op
, &have_sym
, &have_toc
) && have_toc
;
1500 /* Try machine-dependent ways of modifying an illegitimate address
1501 to be legitimate. If we find one, return the new, valid address.
1502 This is used from only one place: `memory_address' in explow.c.
1504 OLDX is the address as it was before break_out_memory_refs was called.
1505 In some cases it is useful to look at this to decide what needs to be done.
1507 MODE is passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS.
1509 It is always safe for this macro to do nothing. It exists to recognize
1510 opportunities to optimize the output.
1512 On RS/6000, first check for the sum of a register with a constant
1513 integer that is out of range. If so, generate code to add the
1514 constant with the low-order 16 bits masked to the register and force
1515 this result into another register (this can be done with `cau').
1516 Then generate an address of REG+(CONST&0xffff), allowing for the
1517 possibility of bit 16 being a one.
1519 Then check for the sum of a register and something not constant, try to
1520 load the other things into a register and return the sum. */
1522 rs6000_legitimize_address (x
, oldx
, mode
)
1524 rtx oldx ATTRIBUTE_UNUSED
;
1525 enum machine_mode mode
;
1527 if (GET_CODE (x
) == PLUS
1528 && GET_CODE (XEXP (x
, 0)) == REG
1529 && GET_CODE (XEXP (x
, 1)) == CONST_INT
1530 && (unsigned HOST_WIDE_INT
) (INTVAL (XEXP (x
, 1)) + 0x8000) >= 0x10000)
1532 HOST_WIDE_INT high_int
, low_int
;
1534 high_int
= INTVAL (XEXP (x
, 1)) & (~ (HOST_WIDE_INT
) 0xffff);
1535 low_int
= INTVAL (XEXP (x
, 1)) & 0xffff;
1536 if (low_int
& 0x8000)
1537 high_int
+= 0x10000, low_int
|= ((HOST_WIDE_INT
) -1) << 16;
1538 sum
= force_operand (gen_rtx_PLUS (Pmode
, XEXP (x
, 0),
1539 GEN_INT (high_int
)), 0);
1540 return gen_rtx_PLUS (Pmode
, sum
, GEN_INT (low_int
));
1542 else if (GET_CODE (x
) == PLUS
1543 && GET_CODE (XEXP (x
, 0)) == REG
1544 && GET_CODE (XEXP (x
, 1)) != CONST_INT
1545 && (TARGET_HARD_FLOAT
|| TARGET_POWERPC64
|| mode
!= DFmode
)
1546 && (TARGET_POWERPC64
|| mode
!= DImode
)
1549 return gen_rtx_PLUS (Pmode
, XEXP (x
, 0),
1550 force_reg (Pmode
, force_operand (XEXP (x
, 1), 0)));
1552 else if (TARGET_ELF
&& TARGET_32BIT
&& TARGET_NO_TOC
&& ! flag_pic
1553 && GET_CODE (x
) != CONST_INT
1554 && GET_CODE (x
) != CONST_DOUBLE
1556 && (TARGET_HARD_FLOAT
|| mode
!= DFmode
)
1560 rtx reg
= gen_reg_rtx (Pmode
);
1561 emit_insn (gen_elf_high (reg
, (x
)));
1562 return gen_rtx_LO_SUM (Pmode
, reg
, (x
));
1564 else if (TARGET_MACHO
&& TARGET_32BIT
&& TARGET_NO_TOC
1566 && GET_CODE (x
) != CONST_INT
1567 && GET_CODE (x
) != CONST_DOUBLE
1569 && (TARGET_HARD_FLOAT
|| mode
!= DFmode
)
1573 rtx reg
= gen_reg_rtx (Pmode
);
1574 emit_insn (gen_macho_high (reg
, (x
)));
1575 return gen_rtx_LO_SUM (Pmode
, reg
, (x
));
1578 && CONSTANT_POOL_EXPR_P (x
)
1579 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (x
), Pmode
))
1581 return create_TOC_reference (x
);
1587 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1588 that is a valid memory address for an instruction.
1589 The MODE argument is the machine mode for the MEM expression
1590 that wants to use this address.
1592 On the RS/6000, there are four valid address: a SYMBOL_REF that
1593 refers to a constant pool entry of an address (or the sum of it
1594 plus a constant), a short (16-bit signed) constant plus a register,
1595 the sum of two registers, or a register indirect, possibly with an
1596 auto-increment. For DFmode and DImode with an constant plus register,
1597 we must ensure that both words are addressable or PowerPC64 with offset
1600 For modes spanning multiple registers (DFmode in 32-bit GPRs,
1601 32-bit DImode, TImode), indexed addressing cannot be used because
1602 adjacent memory cells are accessed by adding word-sized offsets
1603 during assembly output. */
1605 rs6000_legitimate_address (mode
, x
, reg_ok_strict
)
1606 enum machine_mode mode
;
1610 if (LEGITIMATE_INDIRECT_ADDRESS_P (x
, reg_ok_strict
))
1612 if ((GET_CODE (x
) == PRE_INC
|| GET_CODE (x
) == PRE_DEC
)
1614 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (x
, 0), reg_ok_strict
))
1616 if (LEGITIMATE_SMALL_DATA_P (mode
, x
))
1618 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (x
))
1620 /* If not REG_OK_STRICT (before reload) let pass any stack offset. */
1622 && GET_CODE (x
) == PLUS
1623 && GET_CODE (XEXP (x
, 0)) == REG
1624 && XEXP (x
, 0) == virtual_stack_vars_rtx
1625 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1627 if (LEGITIMATE_OFFSET_ADDRESS_P (mode
, x
, reg_ok_strict
))
1630 && (TARGET_HARD_FLOAT
|| TARGET_POWERPC64
|| mode
!= DFmode
)
1631 && (TARGET_POWERPC64
|| mode
!= DImode
)
1632 && LEGITIMATE_INDEXED_ADDRESS_P (x
, reg_ok_strict
))
1634 if (LEGITIMATE_LO_SUM_ADDRESS_P (mode
, x
, reg_ok_strict
))
1639 /* Emit a move from SOURCE to DEST in mode MODE. */
1641 rs6000_emit_move (dest
, source
, mode
)
1644 enum machine_mode mode
;
1648 operands
[1] = source
;
1650 /* Sanity checks. Check that we get CONST_DOUBLE only when we should. */
1651 if (GET_CODE (operands
[1]) == CONST_DOUBLE
1652 && ! FLOAT_MODE_P (mode
)
1653 && GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1655 /* FIXME. This should never happen. */
1656 /* Since it seems that it does, do the safe thing and convert
1659 GEN_INT (trunc_int_for_mode (CONST_DOUBLE_LOW (operands
[1]), mode
));
1661 if (GET_CODE (operands
[1]) == CONST_DOUBLE
1662 && ! FLOAT_MODE_P (mode
)
1663 && ((CONST_DOUBLE_HIGH (operands
[1]) == 0
1664 && CONST_DOUBLE_LOW (operands
[1]) >= 0)
1665 || (CONST_DOUBLE_HIGH (operands
[1]) == -1
1666 && CONST_DOUBLE_LOW (operands
[1]) < 0)))
1669 if (! no_new_pseudos
&& GET_CODE (operands
[0]) != REG
)
1670 operands
[1] = force_reg (mode
, operands
[1]);
1672 if (mode
== SFmode
&& ! TARGET_POWERPC
&& TARGET_HARD_FLOAT
1673 && GET_CODE (operands
[0]) == MEM
)
1677 if (reload_in_progress
|| reload_completed
)
1678 regnum
= true_regnum (operands
[1]);
1679 else if (GET_CODE (operands
[1]) == REG
)
1680 regnum
= REGNO (operands
[1]);
1684 /* If operands[1] is a register, on POWER it may have
1685 double-precision data in it, so truncate it to single
1687 if (FP_REGNO_P (regnum
) || regnum
>= FIRST_PSEUDO_REGISTER
)
1690 newreg
= (no_new_pseudos
? operands
[1] : gen_reg_rtx (mode
));
1691 emit_insn (gen_aux_truncdfsf2 (newreg
, operands
[1]));
1692 operands
[1] = newreg
;
1696 /* Handle the case where reload calls us with an invalid address;
1697 and the case of CONSTANT_P_RTX. */
1698 if (! general_operand (operands
[1], mode
)
1699 || ! nonimmediate_operand (operands
[0], mode
)
1700 || GET_CODE (operands
[1]) == CONSTANT_P_RTX
)
1702 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1706 /* FIXME: In the long term, this switch statement should go away
1707 and be replaced by a sequence of tests based on things like
1713 if (CONSTANT_P (operands
[1])
1714 && GET_CODE (operands
[1]) != CONST_INT
)
1715 operands
[1] = force_const_mem (mode
, operands
[1]);
1720 if (CONSTANT_P (operands
[1])
1721 && ! easy_fp_constant (operands
[1], mode
))
1722 operands
[1] = force_const_mem (mode
, operands
[1]);
1727 /* Use default pattern for address of ELF small data */
1730 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1731 && (GET_CODE (operands
[1]) == SYMBOL_REF
1732 || GET_CODE (operands
[1]) == CONST
)
1733 && small_data_operand (operands
[1], mode
))
1735 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1739 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1740 && mode
== Pmode
&& mode
== SImode
1741 && flag_pic
== 1 && got_operand (operands
[1], mode
))
1743 emit_insn (gen_movsi_got (operands
[0], operands
[1]));
1747 if ((TARGET_ELF
|| DEFAULT_ABI
== ABI_DARWIN
)
1748 && TARGET_NO_TOC
&& ! flag_pic
1750 && CONSTANT_P (operands
[1])
1751 && GET_CODE (operands
[1]) != HIGH
1752 && GET_CODE (operands
[1]) != CONST_INT
)
1754 rtx target
= (no_new_pseudos
? operands
[0] : gen_reg_rtx (mode
));
1756 /* If this is a function address on -mcall-aixdesc,
1757 convert it to the address of the descriptor. */
1758 if (DEFAULT_ABI
== ABI_AIX
1759 && GET_CODE (operands
[1]) == SYMBOL_REF
1760 && XSTR (operands
[1], 0)[0] == '.')
1762 const char *name
= XSTR (operands
[1], 0);
1764 while (*name
== '.')
1766 new_ref
= gen_rtx_SYMBOL_REF (Pmode
, name
);
1767 CONSTANT_POOL_ADDRESS_P (new_ref
)
1768 = CONSTANT_POOL_ADDRESS_P (operands
[1]);
1769 SYMBOL_REF_FLAG (new_ref
) = SYMBOL_REF_FLAG (operands
[1]);
1770 SYMBOL_REF_USED (new_ref
) = SYMBOL_REF_USED (operands
[1]);
1771 operands
[1] = new_ref
;
1774 if (DEFAULT_ABI
== ABI_DARWIN
)
1776 emit_insn (gen_macho_high (target
, operands
[1]));
1777 emit_insn (gen_macho_low (operands
[0], target
, operands
[1]));
1781 emit_insn (gen_elf_high (target
, operands
[1]));
1782 emit_insn (gen_elf_low (operands
[0], target
, operands
[1]));
1786 /* If this is a SYMBOL_REF that refers to a constant pool entry,
1787 and we have put it in the TOC, we just need to make a TOC-relative
1790 && GET_CODE (operands
[1]) == SYMBOL_REF
1791 && CONSTANT_POOL_EXPR_P (operands
[1])
1792 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands
[1]),
1793 get_pool_mode (operands
[1])))
1795 operands
[1] = create_TOC_reference (operands
[1]);
1797 else if (mode
== Pmode
1798 && CONSTANT_P (operands
[1])
1799 && ((GET_CODE (operands
[1]) != CONST_INT
1800 && ! easy_fp_constant (operands
[1], mode
))
1801 || (GET_CODE (operands
[1]) == CONST_INT
1802 && num_insns_constant (operands
[1], mode
) > 2)
1803 || (GET_CODE (operands
[0]) == REG
1804 && FP_REGNO_P (REGNO (operands
[0]))))
1805 && GET_CODE (operands
[1]) != HIGH
1806 && ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands
[1])
1807 && ! TOC_RELATIVE_EXPR_P (operands
[1]))
1809 /* Emit a USE operation so that the constant isn't deleted if
1810 expensive optimizations are turned on because nobody
1811 references it. This should only be done for operands that
1812 contain SYMBOL_REFs with CONSTANT_POOL_ADDRESS_P set.
1813 This should not be done for operands that contain LABEL_REFs.
1814 For now, we just handle the obvious case. */
1815 if (GET_CODE (operands
[1]) != LABEL_REF
)
1816 emit_insn (gen_rtx_USE (VOIDmode
, operands
[1]));
1818 /* Darwin uses a special PIC legitimizer. */
1819 if (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
)
1822 rtx temp_reg
= ((reload_in_progress
|| reload_completed
)
1823 ? operands
[0] : NULL
);
1826 rs6000_machopic_legitimize_pic_address (operands
[1], mode
,
1829 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1833 /* If we are to limit the number of things we put in the TOC and
1834 this is a symbol plus a constant we can add in one insn,
1835 just put the symbol in the TOC and add the constant. Don't do
1836 this if reload is in progress. */
1837 if (GET_CODE (operands
[1]) == CONST
1838 && TARGET_NO_SUM_IN_TOC
&& ! reload_in_progress
1839 && GET_CODE (XEXP (operands
[1], 0)) == PLUS
1840 && add_operand (XEXP (XEXP (operands
[1], 0), 1), mode
)
1841 && (GET_CODE (XEXP (XEXP (operands
[1], 0), 0)) == LABEL_REF
1842 || GET_CODE (XEXP (XEXP (operands
[1], 0), 0)) == SYMBOL_REF
)
1843 && ! side_effects_p (operands
[0]))
1845 rtx sym
= force_const_mem (mode
, XEXP (XEXP (operands
[1], 0), 0));
1846 rtx other
= XEXP (XEXP (operands
[1], 0), 1);
1848 sym
= force_reg (mode
, sym
);
1850 emit_insn (gen_addsi3 (operands
[0], sym
, other
));
1852 emit_insn (gen_adddi3 (operands
[0], sym
, other
));
1856 operands
[1] = force_const_mem (mode
, operands
[1]);
1859 && CONSTANT_POOL_EXPR_P (XEXP (operands
[1], 0))
1860 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (
1861 get_pool_constant (XEXP (operands
[1], 0)),
1862 get_pool_mode (XEXP (operands
[1], 0))))
1864 operands
[1] = gen_rtx_MEM (mode
,
1865 create_TOC_reference (XEXP (operands
[1], 0)));
1866 MEM_ALIAS_SET (operands
[1]) = get_TOC_alias_set ();
1867 RTX_UNCHANGING_P (operands
[1]) = 1;
1873 if (GET_CODE (operands
[0]) == MEM
1874 && GET_CODE (XEXP (operands
[0], 0)) != REG
1875 && ! reload_in_progress
)
1877 = replace_equiv_address (operands
[0],
1878 copy_addr_to_reg (XEXP (operands
[0], 0)));
1880 if (GET_CODE (operands
[1]) == MEM
1881 && GET_CODE (XEXP (operands
[1], 0)) != REG
1882 && ! reload_in_progress
)
1884 = replace_equiv_address (operands
[1],
1885 copy_addr_to_reg (XEXP (operands
[1], 0)));
1892 /* Above, we may have called force_const_mem which may have returned
1893 an invalid address. If we can, fix this up; otherwise, reload will
1894 have to deal with it. */
1895 if (GET_CODE (operands
[1]) == MEM
1896 && ! memory_address_p (mode
, XEXP (operands
[1], 0))
1897 && ! reload_in_progress
)
1898 operands
[1] = adjust_address (operands
[1], mode
, 0);
1900 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1904 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1905 for a call to a function whose data type is FNTYPE.
1906 For a library call, FNTYPE is 0.
1908 For incoming args we set the number of arguments in the prototype large
1909 so we never return a PARALLEL. */
1912 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1913 CUMULATIVE_ARGS
*cum
;
1915 rtx libname ATTRIBUTE_UNUSED
;
1918 static CUMULATIVE_ARGS zero_cumulative
;
1920 *cum
= zero_cumulative
;
1922 cum
->fregno
= FP_ARG_MIN_REG
;
1923 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1924 cum
->call_cookie
= CALL_NORMAL
;
1925 cum
->sysv_gregno
= GP_ARG_MIN_REG
;
1928 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1930 else if (cum
->prototype
)
1931 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1932 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1933 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1936 cum
->nargs_prototype
= 0;
1938 cum
->orig_nargs
= cum
->nargs_prototype
;
1940 /* Check for longcall's */
1941 if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1942 cum
->call_cookie
= CALL_LONG
;
1944 if (TARGET_DEBUG_ARG
)
1946 fprintf (stderr
, "\ninit_cumulative_args:");
1949 tree ret_type
= TREE_TYPE (fntype
);
1950 fprintf (stderr
, " ret code = %s,",
1951 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1954 if (cum
->call_cookie
& CALL_LONG
)
1955 fprintf (stderr
, " longcall,");
1957 fprintf (stderr
, " proto = %d, nargs = %d\n",
1958 cum
->prototype
, cum
->nargs_prototype
);
1962 /* If defined, a C expression which determines whether, and in which
1963 direction, to pad out an argument with extra space. The value
1964 should be of type `enum direction': either `upward' to pad above
1965 the argument, `downward' to pad below, or `none' to inhibit
1968 For the AIX ABI structs are always stored left shifted in their
1972 function_arg_padding (mode
, type
)
1973 enum machine_mode mode
;
1976 if (type
!= 0 && AGGREGATE_TYPE_P (type
))
1979 /* This is the default definition. */
1980 return (! BYTES_BIG_ENDIAN
1983 ? (type
&& TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
1984 && int_size_in_bytes (type
) < (PARM_BOUNDARY
/ BITS_PER_UNIT
))
1985 : GET_MODE_BITSIZE (mode
) < PARM_BOUNDARY
)
1986 ? downward
: upward
));
1989 /* If defined, a C expression that gives the alignment boundary, in bits,
1990 of an argument with the specified mode and type. If it is not defined,
1991 PARM_BOUNDARY is used for all arguments.
1993 V.4 wants long longs to be double word aligned. */
1996 function_arg_boundary (mode
, type
)
1997 enum machine_mode mode
;
1998 tree type ATTRIBUTE_UNUSED
;
2000 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2001 && (mode
== DImode
|| mode
== DFmode
))
2004 return PARM_BOUNDARY
;
2007 /* Update the data in CUM to advance over an argument
2008 of mode MODE and data type TYPE.
2009 (TYPE is null for libcalls where that information may not be available.) */
2012 function_arg_advance (cum
, mode
, type
, named
)
2013 CUMULATIVE_ARGS
*cum
;
2014 enum machine_mode mode
;
2018 cum
->nargs_prototype
--;
2020 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2022 if (TARGET_HARD_FLOAT
2023 && (mode
== SFmode
|| mode
== DFmode
))
2025 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
2030 cum
->words
+= cum
->words
& 1;
2031 cum
->words
+= RS6000_ARG_SIZE (mode
, type
);
2037 int gregno
= cum
->sysv_gregno
;
2039 /* Aggregates and IEEE quad get passed by reference. */
2040 if ((type
&& AGGREGATE_TYPE_P (type
))
2044 n_words
= RS6000_ARG_SIZE (mode
, type
);
2046 /* Long long is put in odd registers. */
2047 if (n_words
== 2 && (gregno
& 1) == 0)
2050 /* Long long is not split between registers and stack. */
2051 if (gregno
+ n_words
- 1 > GP_ARG_MAX_REG
)
2053 /* Long long is aligned on the stack. */
2055 cum
->words
+= cum
->words
& 1;
2056 cum
->words
+= n_words
;
2059 /* Note: continuing to accumulate gregno past when we've started
2060 spilling to the stack indicates the fact that we've started
2061 spilling to the stack to expand_builtin_saveregs. */
2062 cum
->sysv_gregno
= gregno
+ n_words
;
2065 if (TARGET_DEBUG_ARG
)
2067 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
2068 cum
->words
, cum
->fregno
);
2069 fprintf (stderr
, "gregno = %2d, nargs = %4d, proto = %d, ",
2070 cum
->sysv_gregno
, cum
->nargs_prototype
, cum
->prototype
);
2071 fprintf (stderr
, "mode = %4s, named = %d\n",
2072 GET_MODE_NAME (mode
), named
);
2077 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
2078 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
2079 cum
->words
+= align
+ RS6000_ARG_SIZE (mode
, type
);
2081 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
2084 if (TARGET_DEBUG_ARG
)
2086 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
2087 cum
->words
, cum
->fregno
);
2088 fprintf (stderr
, "nargs = %4d, proto = %d, mode = %4s, ",
2089 cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
));
2090 fprintf (stderr
, "named = %d, align = %d\n", named
, align
);
2095 /* Determine where to put an argument to a function.
2096 Value is zero to push the argument on the stack,
2097 or a hard register in which to store the argument.
2099 MODE is the argument's machine mode.
2100 TYPE is the data type of the argument (as a tree).
2101 This is null for libcalls where that information may
2103 CUM is a variable of type CUMULATIVE_ARGS which gives info about
2104 the preceding args and about the function being called.
2105 NAMED is nonzero if this argument is a named parameter
2106 (otherwise it is an extra parameter matching an ellipsis).
2108 On RS/6000 the first eight words of non-FP are normally in registers
2109 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
2110 Under V.4, the first 8 FP args are in registers.
2112 If this is floating-point and no prototype is specified, we use
2113 both an FP and integer register (or possibly FP reg and stack). Library
2114 functions (when TYPE is zero) always have the proper types for args,
2115 so we can pass the FP value just in one register. emit_library_function
2116 doesn't support PARALLEL anyway. */
2119 function_arg (cum
, mode
, type
, named
)
2120 CUMULATIVE_ARGS
*cum
;
2121 enum machine_mode mode
;
2123 int named ATTRIBUTE_UNUSED
;
2125 enum rs6000_abi abi
= DEFAULT_ABI
;
2127 /* Return a marker to indicate whether CR1 needs to set or clear the bit
2128 that V.4 uses to say fp args were passed in registers. Assume that we
2129 don't need the marker for software floating point, or compiler generated
2131 if (mode
== VOIDmode
)
2133 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
2134 && TARGET_HARD_FLOAT
2135 && cum
->nargs_prototype
< 0
2136 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
2138 return GEN_INT (cum
->call_cookie
2139 | ((cum
->fregno
== FP_ARG_MIN_REG
)
2140 ? CALL_V4_SET_FP_ARGS
2141 : CALL_V4_CLEAR_FP_ARGS
));
2144 return GEN_INT (cum
->call_cookie
);
2147 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
2149 if (TARGET_HARD_FLOAT
2150 && (mode
== SFmode
|| mode
== DFmode
))
2152 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
2153 return gen_rtx_REG (mode
, cum
->fregno
);
2160 int gregno
= cum
->sysv_gregno
;
2162 /* Aggregates and IEEE quad get passed by reference. */
2163 if ((type
&& AGGREGATE_TYPE_P (type
))
2167 n_words
= RS6000_ARG_SIZE (mode
, type
);
2169 /* Long long is put in odd registers. */
2170 if (n_words
== 2 && (gregno
& 1) == 0)
2173 /* Long long is not split between registers and stack. */
2174 if (gregno
+ n_words
- 1 <= GP_ARG_MAX_REG
)
2175 return gen_rtx_REG (mode
, gregno
);
2182 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
2183 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
2184 int align_words
= cum
->words
+ align
;
2186 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
2189 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
2192 || ((cum
->nargs_prototype
> 0)
2193 /* IBM AIX extended its linkage convention definition always
2194 to require FP args after register save area hole on the
2196 && (DEFAULT_ABI
!= ABI_AIX
2198 || (align_words
< GP_ARG_NUM_REG
))))
2199 return gen_rtx_REG (mode
, cum
->fregno
);
2201 return gen_rtx_PARALLEL (mode
,
2203 gen_rtx_EXPR_LIST (VOIDmode
,
2204 ((align_words
>= GP_ARG_NUM_REG
)
2207 + RS6000_ARG_SIZE (mode
, type
)
2209 /* If this is partially on the stack, then
2210 we only include the portion actually
2211 in registers here. */
2212 ? gen_rtx_REG (SImode
,
2213 GP_ARG_MIN_REG
+ align_words
)
2214 : gen_rtx_REG (mode
,
2215 GP_ARG_MIN_REG
+ align_words
))),
2217 gen_rtx_EXPR_LIST (VOIDmode
,
2218 gen_rtx_REG (mode
, cum
->fregno
),
2221 else if (align_words
< GP_ARG_NUM_REG
)
2222 return gen_rtx_REG (mode
, GP_ARG_MIN_REG
+ align_words
);
2228 /* For an arg passed partly in registers and partly in memory,
2229 this is the number of registers used.
2230 For args passed entirely in registers or entirely in memory, zero. */
2233 function_arg_partial_nregs (cum
, mode
, type
, named
)
2234 CUMULATIVE_ARGS
*cum
;
2235 enum machine_mode mode
;
2237 int named ATTRIBUTE_UNUSED
;
2239 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2242 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
2244 if (cum
->nargs_prototype
>= 0)
2248 if (cum
->words
< GP_ARG_NUM_REG
2249 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
)))
2251 int ret
= GP_ARG_NUM_REG
- cum
->words
;
2252 if (ret
&& TARGET_DEBUG_ARG
)
2253 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
2261 /* A C expression that indicates when an argument must be passed by
2262 reference. If nonzero for an argument, a copy of that argument is
2263 made in memory and a pointer to the argument is passed instead of
2264 the argument itself. The pointer is passed in whatever way is
2265 appropriate for passing a pointer to that type.
2267 Under V.4, structures and unions are passed by reference. */
2270 function_arg_pass_by_reference (cum
, mode
, type
, named
)
2271 CUMULATIVE_ARGS
*cum ATTRIBUTE_UNUSED
;
2272 enum machine_mode mode ATTRIBUTE_UNUSED
;
2274 int named ATTRIBUTE_UNUSED
;
2276 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2277 && ((type
&& AGGREGATE_TYPE_P (type
))
2280 if (TARGET_DEBUG_ARG
)
2281 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
2289 /* Perform any needed actions needed for a function that is receiving a
2290 variable number of arguments.
2294 MODE and TYPE are the mode and type of the current parameter.
2296 PRETEND_SIZE is a variable that should be set to the amount of stack
2297 that must be pushed by the prolog to pretend that our caller pushed
2300 Normally, this macro will push all remaining incoming registers on the
2301 stack and set PRETEND_SIZE to the length of the registers pushed. */
2304 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
2305 CUMULATIVE_ARGS
*cum
;
2306 enum machine_mode mode
;
2312 CUMULATIVE_ARGS next_cum
;
2313 int reg_size
= TARGET_32BIT
? 4 : 8;
2314 rtx save_area
= NULL_RTX
, mem
;
2315 int first_reg_offset
, set
;
2319 fntype
= TREE_TYPE (current_function_decl
);
2320 stdarg_p
= (TYPE_ARG_TYPES (fntype
) != 0
2321 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
2322 != void_type_node
));
2324 /* For varargs, we do not want to skip the dummy va_dcl argument.
2325 For stdargs, we do want to skip the last named argument. */
2328 function_arg_advance (&next_cum
, mode
, type
, 1);
2330 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2332 /* Indicate to allocate space on the stack for varargs save area. */
2333 /* ??? Does this really have to be located at a magic spot on the
2334 stack, or can we allocate this with assign_stack_local instead. */
2335 cfun
->machine
->sysv_varargs_p
= 1;
2337 save_area
= plus_constant (virtual_stack_vars_rtx
,
2338 - RS6000_VARARGS_SIZE
);
2340 first_reg_offset
= next_cum
.sysv_gregno
- GP_ARG_MIN_REG
;
2344 first_reg_offset
= next_cum
.words
;
2345 save_area
= virtual_incoming_args_rtx
;
2346 cfun
->machine
->sysv_varargs_p
= 0;
2348 if (MUST_PASS_IN_STACK (mode
, type
))
2349 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
);
2352 set
= get_varargs_alias_set ();
2353 if (! no_rtl
&& first_reg_offset
< GP_ARG_NUM_REG
)
2355 mem
= gen_rtx_MEM (BLKmode
,
2356 plus_constant (save_area
,
2357 first_reg_offset
* reg_size
)),
2358 MEM_ALIAS_SET (mem
) = set
;
2361 (GP_ARG_MIN_REG
+ first_reg_offset
, mem
,
2362 GP_ARG_NUM_REG
- first_reg_offset
,
2363 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
2365 /* ??? Does ABI_V4 need this at all? */
2366 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
2369 /* Save FP registers if needed. */
2370 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2371 && TARGET_HARD_FLOAT
&& ! no_rtl
2372 && next_cum
.fregno
<= FP_ARG_V4_MAX_REG
)
2374 int fregno
= next_cum
.fregno
;
2375 rtx cr1
= gen_rtx_REG (CCmode
, CR1_REGNO
);
2376 rtx lab
= gen_label_rtx ();
2377 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
2379 emit_jump_insn (gen_rtx_SET (VOIDmode
,
2381 gen_rtx_IF_THEN_ELSE (VOIDmode
,
2382 gen_rtx_NE (VOIDmode
, cr1
,
2384 gen_rtx_LABEL_REF (VOIDmode
, lab
),
2387 while (fregno
<= FP_ARG_V4_MAX_REG
)
2389 mem
= gen_rtx_MEM (DFmode
, plus_constant (save_area
, off
));
2390 MEM_ALIAS_SET (mem
) = set
;
2391 emit_move_insn (mem
, gen_rtx_REG (DFmode
, fregno
));
2400 /* Create the va_list data type. */
2403 rs6000_build_va_list ()
2405 tree f_gpr
, f_fpr
, f_ovf
, f_sav
, record
, type_decl
;
2407 /* For AIX, prefer 'char *' because that's what the system
2408 header files like. */
2409 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2410 return build_pointer_type (char_type_node
);
2412 record
= make_lang_type (RECORD_TYPE
);
2413 type_decl
= build_decl (TYPE_DECL
, get_identifier ("__va_list_tag"), record
);
2415 f_gpr
= build_decl (FIELD_DECL
, get_identifier ("gpr"),
2416 unsigned_char_type_node
);
2417 f_fpr
= build_decl (FIELD_DECL
, get_identifier ("fpr"),
2418 unsigned_char_type_node
);
2419 f_ovf
= build_decl (FIELD_DECL
, get_identifier ("overflow_arg_area"),
2421 f_sav
= build_decl (FIELD_DECL
, get_identifier ("reg_save_area"),
2424 DECL_FIELD_CONTEXT (f_gpr
) = record
;
2425 DECL_FIELD_CONTEXT (f_fpr
) = record
;
2426 DECL_FIELD_CONTEXT (f_ovf
) = record
;
2427 DECL_FIELD_CONTEXT (f_sav
) = record
;
2429 TREE_CHAIN (record
) = type_decl
;
2430 TYPE_NAME (record
) = type_decl
;
2431 TYPE_FIELDS (record
) = f_gpr
;
2432 TREE_CHAIN (f_gpr
) = f_fpr
;
2433 TREE_CHAIN (f_fpr
) = f_ovf
;
2434 TREE_CHAIN (f_ovf
) = f_sav
;
2436 layout_type (record
);
2438 /* The correct type is an array type of one element. */
2439 return build_array_type (record
, build_index_type (size_zero_node
));
2442 /* Implement va_start. */
2445 rs6000_va_start (stdarg_p
, valist
, nextarg
)
2450 HOST_WIDE_INT words
, n_gpr
, n_fpr
;
2451 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
2452 tree gpr
, fpr
, ovf
, sav
, t
;
2454 /* Only SVR4 needs something special. */
2455 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2457 std_expand_builtin_va_start (stdarg_p
, valist
, nextarg
);
2461 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2462 f_fpr
= TREE_CHAIN (f_gpr
);
2463 f_ovf
= TREE_CHAIN (f_fpr
);
2464 f_sav
= TREE_CHAIN (f_ovf
);
2466 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2467 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
2468 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
2469 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
2470 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
2472 /* Count number of gp and fp argument registers used. */
2473 words
= current_function_args_info
.words
;
2474 n_gpr
= current_function_args_info
.sysv_gregno
- GP_ARG_MIN_REG
;
2475 n_fpr
= current_function_args_info
.fregno
- FP_ARG_MIN_REG
;
2477 if (TARGET_DEBUG_ARG
)
2479 fputs ("va_start: words = ", stderr
);
2480 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, words
);
2481 fputs (", n_gpr = ", stderr
);
2482 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, n_gpr
);
2483 fputs (", n_fpr = ", stderr
);
2484 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, n_fpr
);
2485 putc ('\n', stderr
);
2488 t
= build (MODIFY_EXPR
, TREE_TYPE (gpr
), gpr
, build_int_2 (n_gpr
, 0));
2489 TREE_SIDE_EFFECTS (t
) = 1;
2490 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2492 t
= build (MODIFY_EXPR
, TREE_TYPE (fpr
), fpr
, build_int_2 (n_fpr
, 0));
2493 TREE_SIDE_EFFECTS (t
) = 1;
2494 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2496 /* Find the overflow area. */
2497 t
= make_tree (TREE_TYPE (ovf
), virtual_incoming_args_rtx
);
2499 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), t
,
2500 build_int_2 (words
* UNITS_PER_WORD
, 0));
2501 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2502 TREE_SIDE_EFFECTS (t
) = 1;
2503 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2505 /* Find the register save area. */
2506 t
= make_tree (TREE_TYPE (sav
), virtual_stack_vars_rtx
);
2507 t
= build (PLUS_EXPR
, TREE_TYPE (sav
), t
,
2508 build_int_2 (-RS6000_VARARGS_SIZE
, -1));
2509 t
= build (MODIFY_EXPR
, TREE_TYPE (sav
), sav
, t
);
2510 TREE_SIDE_EFFECTS (t
) = 1;
2511 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2514 /* Implement va_arg. */
2517 rs6000_va_arg (valist
, type
)
2520 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
2521 tree gpr
, fpr
, ovf
, sav
, reg
, t
, u
;
2522 int indirect_p
, size
, rsize
, n_reg
, sav_ofs
, sav_scale
;
2523 rtx lab_false
, lab_over
, addr_rtx
, r
;
2525 /* For AIX, the rule is that structures are passed left-aligned in
2526 their stack slot. However, GCC does not presently do this:
2527 structures which are the same size as integer types are passed
2528 right-aligned, as if they were in fact integers. This only
2529 matters for structures of size 1 or 2, or 4 when TARGET_64BIT. */
2530 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2532 HOST_WIDE_INT align
, rounded_size
;
2533 enum machine_mode mode
;
2536 /* Compute the rounded size of the type. */
2537 align
= PARM_BOUNDARY
/ BITS_PER_UNIT
;
2538 rounded_size
= (((int_size_in_bytes (type
) + align
- 1) / align
)
2543 mode
= TYPE_MODE (type
);
2544 if (mode
!= BLKmode
)
2547 adj
= TREE_INT_CST_LOW (TYPE_SIZE (type
)) / BITS_PER_UNIT
;
2548 if (rounded_size
> align
)
2551 addr_tree
= build (PLUS_EXPR
, TREE_TYPE (addr_tree
), addr_tree
,
2552 build_int_2 (rounded_size
- adj
, 0));
2555 addr_rtx
= expand_expr (addr_tree
, NULL_RTX
, Pmode
, EXPAND_NORMAL
);
2556 addr_rtx
= copy_to_reg (addr_rtx
);
2558 /* Compute new value for AP. */
2559 t
= build (MODIFY_EXPR
, TREE_TYPE (valist
), valist
,
2560 build (PLUS_EXPR
, TREE_TYPE (valist
), valist
,
2561 build_int_2 (rounded_size
, 0)));
2562 TREE_SIDE_EFFECTS (t
) = 1;
2563 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2568 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2569 f_fpr
= TREE_CHAIN (f_gpr
);
2570 f_ovf
= TREE_CHAIN (f_fpr
);
2571 f_sav
= TREE_CHAIN (f_ovf
);
2573 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2574 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
2575 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
2576 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
2577 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
2579 size
= int_size_in_bytes (type
);
2580 rsize
= (size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2582 if (AGGREGATE_TYPE_P (type
) || TYPE_MODE (type
) == TFmode
)
2584 /* Aggregates and long doubles are passed by reference. */
2590 size
= rsize
= UNITS_PER_WORD
;
2592 else if (FLOAT_TYPE_P (type
) && ! TARGET_SOFT_FLOAT
)
2594 /* FP args go in FP registers, if present. */
2603 /* Otherwise into GP registers. */
2612 * Pull the value out of the saved registers ...
2615 lab_false
= gen_label_rtx ();
2616 lab_over
= gen_label_rtx ();
2617 addr_rtx
= gen_reg_rtx (Pmode
);
2619 emit_cmp_and_jump_insns (expand_expr (reg
, NULL_RTX
, QImode
, EXPAND_NORMAL
),
2620 GEN_INT (8 - n_reg
+ 1),
2621 GE
, const1_rtx
, QImode
, 1, 1, lab_false
);
2623 /* Long long is aligned in the registers. */
2626 u
= build (BIT_AND_EXPR
, TREE_TYPE (reg
), reg
,
2627 build_int_2 (n_reg
- 1, 0));
2628 u
= build (PLUS_EXPR
, TREE_TYPE (reg
), reg
, u
);
2629 u
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, u
);
2630 TREE_SIDE_EFFECTS (u
) = 1;
2631 expand_expr (u
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2635 t
= build (PLUS_EXPR
, ptr_type_node
, sav
, build_int_2 (sav_ofs
, 0));
2639 u
= build (POSTINCREMENT_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (n_reg
, 0));
2640 TREE_SIDE_EFFECTS (u
) = 1;
2642 u
= build1 (CONVERT_EXPR
, integer_type_node
, u
);
2643 TREE_SIDE_EFFECTS (u
) = 1;
2645 u
= build (MULT_EXPR
, integer_type_node
, u
, build_int_2 (sav_scale
, 0));
2646 TREE_SIDE_EFFECTS (u
) = 1;
2648 t
= build (PLUS_EXPR
, ptr_type_node
, t
, u
);
2649 TREE_SIDE_EFFECTS (t
) = 1;
2651 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2653 emit_move_insn (addr_rtx
, r
);
2655 emit_jump_insn (gen_jump (lab_over
));
2657 emit_label (lab_false
);
2660 * ... otherwise out of the overflow area.
2663 /* Make sure we don't find reg 7 for the next int arg. */
2666 t
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (8, 0));
2667 TREE_SIDE_EFFECTS (t
) = 1;
2668 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2671 /* Care for on-stack alignment if needed. */
2676 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), ovf
, build_int_2 (7, 0));
2677 t
= build (BIT_AND_EXPR
, TREE_TYPE (t
), t
, build_int_2 (-8, -1));
2681 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2683 emit_move_insn (addr_rtx
, r
);
2685 t
= build (PLUS_EXPR
, TREE_TYPE (t
), t
, build_int_2 (size
, 0));
2686 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2687 TREE_SIDE_EFFECTS (t
) = 1;
2688 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2690 emit_label (lab_over
);
2694 r
= gen_rtx_MEM (Pmode
, addr_rtx
);
2695 MEM_ALIAS_SET (r
) = get_varargs_alias_set ();
2696 emit_move_insn (addr_rtx
, r
);
2702 /* Generate a memory reference for expand_block_move, copying volatile,
2703 and other bits from an original memory reference. */
2706 expand_block_move_mem (mode
, addr
, orig_mem
)
2707 enum machine_mode mode
;
2711 rtx mem
= gen_rtx_MEM (mode
, addr
);
2713 MEM_COPY_ATTRIBUTES (mem
, orig_mem
);
2714 #ifdef MEM_UNALIGNED_P
2715 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
2720 /* Expand a block move operation, and return 1 if successful. Return 0
2721 if we should let the compiler generate normal code.
2723 operands[0] is the destination
2724 operands[1] is the source
2725 operands[2] is the length
2726 operands[3] is the alignment */
2728 #define MAX_MOVE_REG 4
2731 expand_block_move (operands
)
2734 rtx orig_dest
= operands
[0];
2735 rtx orig_src
= operands
[1];
2736 rtx bytes_rtx
= operands
[2];
2737 rtx align_rtx
= operands
[3];
2738 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
2749 rtx stores
[MAX_MOVE_REG
];
2752 /* If this is not a fixed size move, just call memcpy */
2756 /* If this is not a fixed size alignment, abort */
2757 if (GET_CODE (align_rtx
) != CONST_INT
)
2759 align
= INTVAL (align_rtx
);
2761 /* Anything to move? */
2762 bytes
= INTVAL (bytes_rtx
);
2766 /* Don't support real large moves. If string instructions are not used,
2767 then don't generate more than 8 loads. */
2773 else if (! STRICT_ALIGNMENT
)
2775 if (TARGET_POWERPC64
&& align
>= 4)
2784 else if (bytes
> 8*align
)
2787 /* Move the address into scratch registers. */
2788 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
2789 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
2791 if (TARGET_STRING
) /* string instructions are available */
2793 for ( ; bytes
> 0; bytes
-= move_bytes
)
2795 if (bytes
> 24 /* move up to 32 bytes at a time */
2803 && ! fixed_regs
[12])
2805 move_bytes
= (bytes
> 32) ? 32 : bytes
;
2806 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
,
2809 expand_block_move_mem (BLKmode
,
2812 GEN_INT ((move_bytes
== 32)
2816 else if (bytes
> 16 /* move up to 24 bytes at a time */
2822 && ! fixed_regs
[10])
2824 move_bytes
= (bytes
> 24) ? 24 : bytes
;
2825 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
,
2828 expand_block_move_mem (BLKmode
,
2831 GEN_INT (move_bytes
),
2834 else if (bytes
> 8 /* move up to 16 bytes at a time */
2840 move_bytes
= (bytes
> 16) ? 16 : bytes
;
2841 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
,
2844 expand_block_move_mem (BLKmode
,
2847 GEN_INT (move_bytes
),
2850 else if (bytes
>= 8 && TARGET_POWERPC64
2851 /* 64-bit loads and stores require word-aligned displacements. */
2852 && (align
>= 8 || (! STRICT_ALIGNMENT
&& align
>= 4)))
2855 tmp_reg
= gen_reg_rtx (DImode
);
2856 emit_move_insn (tmp_reg
,
2857 expand_block_move_mem (DImode
,
2858 src_reg
, orig_src
));
2859 emit_move_insn (expand_block_move_mem (DImode
,
2860 dest_reg
, orig_dest
),
2864 { /* move up to 8 bytes at a time */
2865 move_bytes
= (bytes
> 8) ? 8 : bytes
;
2866 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
,
2869 expand_block_move_mem (BLKmode
,
2872 GEN_INT (move_bytes
),
2875 else if (bytes
>= 4 && (align
>= 4 || ! STRICT_ALIGNMENT
))
2876 { /* move 4 bytes */
2878 tmp_reg
= gen_reg_rtx (SImode
);
2879 emit_move_insn (tmp_reg
,
2880 expand_block_move_mem (SImode
,
2881 src_reg
, orig_src
));
2882 emit_move_insn (expand_block_move_mem (SImode
,
2883 dest_reg
, orig_dest
),
2886 else if (bytes
== 2 && (align
>= 2 || ! STRICT_ALIGNMENT
))
2887 { /* move 2 bytes */
2889 tmp_reg
= gen_reg_rtx (HImode
);
2890 emit_move_insn (tmp_reg
,
2891 expand_block_move_mem (HImode
,
2892 src_reg
, orig_src
));
2893 emit_move_insn (expand_block_move_mem (HImode
,
2894 dest_reg
, orig_dest
),
2897 else if (bytes
== 1) /* move 1 byte */
2900 tmp_reg
= gen_reg_rtx (QImode
);
2901 emit_move_insn (tmp_reg
,
2902 expand_block_move_mem (QImode
,
2903 src_reg
, orig_src
));
2904 emit_move_insn (expand_block_move_mem (QImode
,
2905 dest_reg
, orig_dest
),
2909 { /* move up to 4 bytes at a time */
2910 move_bytes
= (bytes
> 4) ? 4 : bytes
;
2911 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
,
2914 expand_block_move_mem (BLKmode
,
2917 GEN_INT (move_bytes
),
2921 if (bytes
> move_bytes
)
2923 if (! TARGET_POWERPC64
)
2925 emit_insn (gen_addsi3 (src_reg
, src_reg
,
2926 GEN_INT (move_bytes
)));
2927 emit_insn (gen_addsi3 (dest_reg
, dest_reg
,
2928 GEN_INT (move_bytes
)));
2932 emit_insn (gen_adddi3 (src_reg
, src_reg
,
2933 GEN_INT (move_bytes
)));
2934 emit_insn (gen_adddi3 (dest_reg
, dest_reg
,
2935 GEN_INT (move_bytes
)));
2941 else /* string instructions not available */
2943 num_reg
= offset
= 0;
2944 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
2946 /* Calculate the correct offset for src/dest */
2950 dest_addr
= dest_reg
;
2954 src_addr
= plus_constant (src_reg
, offset
);
2955 dest_addr
= plus_constant (dest_reg
, offset
);
2958 /* Generate the appropriate load and store, saving the stores
2960 if (bytes
>= 8 && TARGET_POWERPC64
2961 /* 64-bit loads and stores require word-aligned displacements. */
2962 && (align
>= 8 || (! STRICT_ALIGNMENT
&& align
>= 4)))
2965 tmp_reg
= gen_reg_rtx (DImode
);
2966 emit_insn (gen_movdi (tmp_reg
,
2967 expand_block_move_mem (DImode
,
2970 stores
[num_reg
++] = gen_movdi (expand_block_move_mem (DImode
,
2975 else if (bytes
>= 4 && (align
>= 4 || ! STRICT_ALIGNMENT
))
2978 tmp_reg
= gen_reg_rtx (SImode
);
2979 emit_insn (gen_movsi (tmp_reg
,
2980 expand_block_move_mem (SImode
,
2983 stores
[num_reg
++] = gen_movsi (expand_block_move_mem (SImode
,
2988 else if (bytes
>= 2 && (align
>= 2 || ! STRICT_ALIGNMENT
))
2991 tmp_reg
= gen_reg_rtx (HImode
);
2992 emit_insn (gen_movhi (tmp_reg
,
2993 expand_block_move_mem (HImode
,
2996 stores
[num_reg
++] = gen_movhi (expand_block_move_mem (HImode
,
3004 tmp_reg
= gen_reg_rtx (QImode
);
3005 emit_insn (gen_movqi (tmp_reg
,
3006 expand_block_move_mem (QImode
,
3009 stores
[num_reg
++] = gen_movqi (expand_block_move_mem (QImode
,
3015 if (num_reg
>= MAX_MOVE_REG
)
3017 for (i
= 0; i
< num_reg
; i
++)
3018 emit_insn (stores
[i
]);
3023 for (i
= 0; i
< num_reg
; i
++)
3024 emit_insn (stores
[i
]);
3031 /* Return 1 if OP is a load multiple operation. It is known to be a
3032 PARALLEL and the first section will be tested. */
3035 load_multiple_operation (op
, mode
)
3037 enum machine_mode mode ATTRIBUTE_UNUSED
;
3039 int count
= XVECLEN (op
, 0);
3040 unsigned int dest_regno
;
3044 /* Perform a quick check so we don't blow up below. */
3046 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3047 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
3048 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
3051 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
3052 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
3054 for (i
= 1; i
< count
; i
++)
3056 rtx elt
= XVECEXP (op
, 0, i
);
3058 if (GET_CODE (elt
) != SET
3059 || GET_CODE (SET_DEST (elt
)) != REG
3060 || GET_MODE (SET_DEST (elt
)) != SImode
3061 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
3062 || GET_CODE (SET_SRC (elt
)) != MEM
3063 || GET_MODE (SET_SRC (elt
)) != SImode
3064 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
3065 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
3066 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
3067 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
3074 /* Similar, but tests for store multiple. Here, the second vector element
3075 is a CLOBBER. It will be tested later. */
3078 store_multiple_operation (op
, mode
)
3080 enum machine_mode mode ATTRIBUTE_UNUSED
;
3082 int count
= XVECLEN (op
, 0) - 1;
3083 unsigned int src_regno
;
3087 /* Perform a quick check so we don't blow up below. */
3089 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3090 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
3091 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
3094 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
3095 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
3097 for (i
= 1; i
< count
; i
++)
3099 rtx elt
= XVECEXP (op
, 0, i
+ 1);
3101 if (GET_CODE (elt
) != SET
3102 || GET_CODE (SET_SRC (elt
)) != REG
3103 || GET_MODE (SET_SRC (elt
)) != SImode
3104 || REGNO (SET_SRC (elt
)) != src_regno
+ i
3105 || GET_CODE (SET_DEST (elt
)) != MEM
3106 || GET_MODE (SET_DEST (elt
)) != SImode
3107 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
3108 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
3109 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
3110 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
3117 /* Return 1 for an PARALLEL suitable for mtcrf. */
3120 mtcrf_operation (op
, mode
)
3122 enum machine_mode mode ATTRIBUTE_UNUSED
;
3124 int count
= XVECLEN (op
, 0);
3128 /* Perform a quick check so we don't blow up below. */
3130 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3131 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != UNSPEC
3132 || XVECLEN (SET_SRC (XVECEXP (op
, 0, 0)), 0) != 2)
3134 src_reg
= XVECEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0, 0);
3136 if (GET_CODE (src_reg
) != REG
3137 || GET_MODE (src_reg
) != SImode
3138 || ! INT_REGNO_P (REGNO (src_reg
)))
3141 for (i
= 0; i
< count
; i
++)
3143 rtx exp
= XVECEXP (op
, 0, i
);
3147 if (GET_CODE (exp
) != SET
3148 || GET_CODE (SET_DEST (exp
)) != REG
3149 || GET_MODE (SET_DEST (exp
)) != CCmode
3150 || ! CR_REGNO_P (REGNO (SET_DEST (exp
))))
3152 unspec
= SET_SRC (exp
);
3153 maskval
= 1 << (MAX_CR_REGNO
- REGNO (SET_DEST (exp
)));
3155 if (GET_CODE (unspec
) != UNSPEC
3156 || XINT (unspec
, 1) != 20
3157 || XVECLEN (unspec
, 0) != 2
3158 || XVECEXP (unspec
, 0, 0) != src_reg
3159 || GET_CODE (XVECEXP (unspec
, 0, 1)) != CONST_INT
3160 || INTVAL (XVECEXP (unspec
, 0, 1)) != maskval
)
3166 /* Return 1 for an PARALLEL suitable for lmw. */
3169 lmw_operation (op
, mode
)
3171 enum machine_mode mode ATTRIBUTE_UNUSED
;
3173 int count
= XVECLEN (op
, 0);
3174 unsigned int dest_regno
;
3176 unsigned int base_regno
;
3177 HOST_WIDE_INT offset
;
3180 /* Perform a quick check so we don't blow up below. */
3182 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3183 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
3184 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
3187 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
3188 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
3191 || count
!= 32 - (int) dest_regno
)
3194 if (LEGITIMATE_INDIRECT_ADDRESS_P (src_addr
, 0))
3197 base_regno
= REGNO (src_addr
);
3198 if (base_regno
== 0)
3201 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, src_addr
, 0))
3203 offset
= INTVAL (XEXP (src_addr
, 1));
3204 base_regno
= REGNO (XEXP (src_addr
, 0));
3209 for (i
= 0; i
< count
; i
++)
3211 rtx elt
= XVECEXP (op
, 0, i
);
3214 HOST_WIDE_INT newoffset
;
3216 if (GET_CODE (elt
) != SET
3217 || GET_CODE (SET_DEST (elt
)) != REG
3218 || GET_MODE (SET_DEST (elt
)) != SImode
3219 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
3220 || GET_CODE (SET_SRC (elt
)) != MEM
3221 || GET_MODE (SET_SRC (elt
)) != SImode
)
3223 newaddr
= XEXP (SET_SRC (elt
), 0);
3224 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr
, 0))
3229 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, newaddr
, 0))
3231 addr_reg
= XEXP (newaddr
, 0);
3232 newoffset
= INTVAL (XEXP (newaddr
, 1));
3236 if (REGNO (addr_reg
) != base_regno
3237 || newoffset
!= offset
+ 4 * i
)
3244 /* Return 1 for an PARALLEL suitable for stmw. */
3247 stmw_operation (op
, mode
)
3249 enum machine_mode mode ATTRIBUTE_UNUSED
;
3251 int count
= XVECLEN (op
, 0);
3252 unsigned int src_regno
;
3254 unsigned int base_regno
;
3255 HOST_WIDE_INT offset
;
3258 /* Perform a quick check so we don't blow up below. */
3260 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3261 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
3262 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
3265 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
3266 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
3269 || count
!= 32 - (int) src_regno
)
3272 if (LEGITIMATE_INDIRECT_ADDRESS_P (dest_addr
, 0))
3275 base_regno
= REGNO (dest_addr
);
3276 if (base_regno
== 0)
3279 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, dest_addr
, 0))
3281 offset
= INTVAL (XEXP (dest_addr
, 1));
3282 base_regno
= REGNO (XEXP (dest_addr
, 0));
3287 for (i
= 0; i
< count
; i
++)
3289 rtx elt
= XVECEXP (op
, 0, i
);
3292 HOST_WIDE_INT newoffset
;
3294 if (GET_CODE (elt
) != SET
3295 || GET_CODE (SET_SRC (elt
)) != REG
3296 || GET_MODE (SET_SRC (elt
)) != SImode
3297 || REGNO (SET_SRC (elt
)) != src_regno
+ i
3298 || GET_CODE (SET_DEST (elt
)) != MEM
3299 || GET_MODE (SET_DEST (elt
)) != SImode
)
3301 newaddr
= XEXP (SET_DEST (elt
), 0);
3302 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr
, 0))
3307 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, newaddr
, 0))
3309 addr_reg
= XEXP (newaddr
, 0);
3310 newoffset
= INTVAL (XEXP (newaddr
, 1));
3314 if (REGNO (addr_reg
) != base_regno
3315 || newoffset
!= offset
+ 4 * i
)
3323 /* A validation routine: say whether CODE, a condition code,
3324 and MODE match. The other alternatives either don't make
3325 sense or should never be generated. */
3327 validate_condition_mode (code
, mode
)
3329 enum machine_mode mode
;
3331 if (GET_RTX_CLASS (code
) != '<'
3332 || GET_MODE_CLASS (mode
) != MODE_CC
)
3335 /* These don't make sense. */
3336 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
3337 && mode
== CCUNSmode
)
3340 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
3341 && mode
!= CCUNSmode
)
3344 if (mode
!= CCFPmode
3345 && (code
== ORDERED
|| code
== UNORDERED
3346 || code
== UNEQ
|| code
== LTGT
3347 || code
== UNGT
|| code
== UNLT
3348 || code
== UNGE
|| code
== UNLE
))
3351 /* These should never be generated except for
3352 flag_unsafe_math_optimizations. */
3353 if (mode
== CCFPmode
3354 && ! flag_unsafe_math_optimizations
3355 && (code
== LE
|| code
== GE
3356 || code
== UNEQ
|| code
== LTGT
3357 || code
== UNGT
|| code
== UNLT
))
3360 /* These are invalid; the information is not there. */
3361 if (mode
== CCEQmode
3362 && code
!= EQ
&& code
!= NE
)
3366 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
3367 We only check the opcode against the mode of the CC value here. */
3370 branch_comparison_operator (op
, mode
)
3372 enum machine_mode mode ATTRIBUTE_UNUSED
;
3374 enum rtx_code code
= GET_CODE (op
);
3375 enum machine_mode cc_mode
;
3377 if (GET_RTX_CLASS (code
) != '<')
3380 cc_mode
= GET_MODE (XEXP (op
, 0));
3381 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
3384 validate_condition_mode (code
, cc_mode
);
3389 /* Return 1 if OP is a comparison operation that is valid for a branch
3390 insn and which is true if the corresponding bit in the CC register
3394 branch_positive_comparison_operator (op
, mode
)
3396 enum machine_mode mode
;
3400 if (! branch_comparison_operator (op
, mode
))
3403 code
= GET_CODE (op
);
3404 return (code
== EQ
|| code
== LT
|| code
== GT
3405 || code
== LTU
|| code
== GTU
3406 || code
== UNORDERED
);
3410 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
3411 We check the opcode against the mode of the CC value and disallow EQ or
3412 NE comparisons for integers. */
3415 scc_comparison_operator (op
, mode
)
3417 enum machine_mode mode
;
3419 enum rtx_code code
= GET_CODE (op
);
3420 enum machine_mode cc_mode
;
3422 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
3425 if (GET_RTX_CLASS (code
) != '<')
3428 cc_mode
= GET_MODE (XEXP (op
, 0));
3429 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
3432 validate_condition_mode (code
, cc_mode
);
3434 if (code
== NE
&& cc_mode
!= CCFPmode
)
3441 trap_comparison_operator (op
, mode
)
3443 enum machine_mode mode
;
3445 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
3447 return GET_RTX_CLASS (GET_CODE (op
)) == '<';
3451 boolean_operator (op
, mode
)
3453 enum machine_mode mode ATTRIBUTE_UNUSED
;
3455 enum rtx_code code
= GET_CODE (op
);
3456 return (code
== AND
|| code
== IOR
|| code
== XOR
);
3460 boolean_or_operator (op
, mode
)
3462 enum machine_mode mode ATTRIBUTE_UNUSED
;
3464 enum rtx_code code
= GET_CODE (op
);
3465 return (code
== IOR
|| code
== XOR
);
3469 min_max_operator (op
, mode
)
3471 enum machine_mode mode ATTRIBUTE_UNUSED
;
3473 enum rtx_code code
= GET_CODE (op
);
3474 return (code
== SMIN
|| code
== SMAX
|| code
== UMIN
|| code
== UMAX
);
3477 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3478 mask required to convert the result of a rotate insn into a shift
3479 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
3482 includes_lshift_p (shiftop
, andop
)
3483 register rtx shiftop
;
3486 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3488 shift_mask
<<= INTVAL (shiftop
);
3490 return (INTVAL (andop
) & ~shift_mask
) == 0;
3493 /* Similar, but for right shift. */
3496 includes_rshift_p (shiftop
, andop
)
3497 register rtx shiftop
;
3500 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3502 shift_mask
>>= INTVAL (shiftop
);
3504 return (INTVAL (andop
) & ~shift_mask
) == 0;
3507 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3508 mask required to convert the result of a rotate insn into a shift
3509 left insn of SHIFTOP bits. */
3512 includes_lshift64_p (shiftop
, andop
)
3513 register rtx shiftop
;
3516 #if HOST_BITS_PER_WIDE_INT == 64
3517 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3519 shift_mask
<<= INTVAL (shiftop
);
3521 return (INTVAL (andop
) & ~shift_mask
) == 0;
3523 unsigned HOST_WIDE_INT shift_mask_low
= ~(unsigned HOST_WIDE_INT
) 0;
3524 unsigned HOST_WIDE_INT shift_mask_high
= ~(unsigned HOST_WIDE_INT
) 0;
3526 shift_mask_low
<<= INTVAL (shiftop
);
3528 if (INTVAL (shiftop
) > 32)
3529 shift_mask_high
<<= (INTVAL (shiftop
) - 32);
3531 if (GET_CODE (andop
) == CONST_INT
)
3532 return (INTVAL (andop
) & ~shift_mask_low
) == 0;
3534 return ((CONST_DOUBLE_HIGH (andop
) & ~shift_mask_high
) == 0
3535 && (CONST_DOUBLE_LOW (andop
) & ~shift_mask_low
) == 0);
3539 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
3540 for lfq and stfq insns.
3542 Note reg1 and reg2 *must* be hard registers. To be sure we will
3543 abort if we are passed pseudo registers. */
3546 registers_ok_for_quad_peep (reg1
, reg2
)
3549 /* We might have been passed a SUBREG. */
3550 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
3553 return (REGNO (reg1
) == REGNO (reg2
) - 1);
3556 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
3557 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
3560 addrs_ok_for_quad_peep (addr1
, addr2
)
3567 /* Extract an offset (if used) from the first addr. */
3568 if (GET_CODE (addr1
) == PLUS
)
3570 /* If not a REG, return zero. */
3571 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
3575 reg1
= REGNO (XEXP (addr1
, 0));
3576 /* The offset must be constant! */
3577 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
3579 offset1
= INTVAL (XEXP (addr1
, 1));
3582 else if (GET_CODE (addr1
) != REG
)
3586 reg1
= REGNO (addr1
);
3587 /* This was a simple (mem (reg)) expression. Offset is 0. */
3591 /* Make sure the second address is a (mem (plus (reg) (const_int))). */
3592 if (GET_CODE (addr2
) != PLUS
)
3595 if (GET_CODE (XEXP (addr2
, 0)) != REG
3596 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
3599 if (reg1
!= REGNO (XEXP (addr2
, 0)))
3602 /* The offset for the second addr must be 8 more than the first addr. */
3603 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
3606 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
3611 /* Return the register class of a scratch register needed to copy IN into
3612 or out of a register in CLASS in MODE. If it can be done directly,
3613 NO_REGS is returned. */
3616 secondary_reload_class (class, mode
, in
)
3617 enum reg_class
class;
3618 enum machine_mode mode ATTRIBUTE_UNUSED
;
3623 if (TARGET_ELF
|| (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
))
3625 /* We cannot copy a symbolic operand directly into anything
3626 other than BASE_REGS for TARGET_ELF. So indicate that a
3627 register from BASE_REGS is needed as an intermediate
3630 On Darwin, pic addresses require a load from memory, which
3631 needs a base register. */
3632 if (class != BASE_REGS
3633 && (GET_CODE (in
) == SYMBOL_REF
3634 || GET_CODE (in
) == HIGH
3635 || GET_CODE (in
) == LABEL_REF
3636 || GET_CODE (in
) == CONST
))
3640 if (GET_CODE (in
) == REG
)
3643 if (regno
>= FIRST_PSEUDO_REGISTER
)
3645 regno
= true_regnum (in
);
3646 if (regno
>= FIRST_PSEUDO_REGISTER
)
3650 else if (GET_CODE (in
) == SUBREG
)
3652 regno
= true_regnum (in
);
3653 if (regno
>= FIRST_PSEUDO_REGISTER
)
3659 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
3661 if (class == GENERAL_REGS
|| class == BASE_REGS
3662 || (regno
>= 0 && INT_REGNO_P (regno
)))
3665 /* Constants, memory, and FP registers can go into FP registers. */
3666 if ((regno
== -1 || FP_REGNO_P (regno
))
3667 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
3670 /* We can copy among the CR registers. */
3671 if ((class == CR_REGS
|| class == CR0_REGS
)
3672 && regno
>= 0 && CR_REGNO_P (regno
))
3675 /* Otherwise, we need GENERAL_REGS. */
3676 return GENERAL_REGS
;
3679 /* Given a comparison operation, return the bit number in CCR to test. We
3680 know this is a valid comparison.
3682 SCC_P is 1 if this is for an scc. That means that %D will have been
3683 used instead of %C, so the bits will be in different places.
3685 Return -1 if OP isn't a valid comparison for some reason. */
3692 enum rtx_code code
= GET_CODE (op
);
3693 enum machine_mode cc_mode
;
3698 if (GET_RTX_CLASS (code
) != '<')
3703 if (GET_CODE (reg
) != REG
3704 || ! CR_REGNO_P (REGNO (reg
)))
3707 cc_mode
= GET_MODE (reg
);
3708 cc_regnum
= REGNO (reg
);
3709 base_bit
= 4 * (cc_regnum
- CR0_REGNO
);
3711 validate_condition_mode (code
, cc_mode
);
3716 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
3718 return base_bit
+ 2;
3719 case GT
: case GTU
: case UNLE
:
3720 return base_bit
+ 1;
3721 case LT
: case LTU
: case UNGE
:
3723 case ORDERED
: case UNORDERED
:
3724 return base_bit
+ 3;
3727 /* If scc, we will have done a cror to put the bit in the
3728 unordered position. So test that bit. For integer, this is ! LT
3729 unless this is an scc insn. */
3730 return scc_p
? base_bit
+ 3 : base_bit
;
3733 return scc_p
? base_bit
+ 3 : base_bit
+ 1;
3740 /* Return the GOT register. */
3743 rs6000_got_register (value
)
3744 rtx value ATTRIBUTE_UNUSED
;
3746 /* The second flow pass currently (June 1999) can't update regs_ever_live
3747 without disturbing other parts of the compiler, so update it here to
3748 make the prolog/epilogue code happy. */
3749 if (no_new_pseudos
&& ! regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
])
3750 regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
] = 1;
3752 current_function_uses_pic_offset_table
= 1;
3754 return pic_offset_table_rtx
;
3757 /* Functions to init, mark and free struct machine_function.
3758 These will be called, via pointer variables,
3759 from push_function_context and pop_function_context. */
3762 rs6000_init_machine_status (p
)
3765 p
->machine
= (machine_function
*) xcalloc (1, sizeof (machine_function
));
3769 rs6000_free_machine_status (p
)
3772 if (p
->machine
== NULL
)
3780 /* Print an operand. Recognize special options, documented below. */
3783 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
3784 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
3786 #define SMALL_DATA_RELOC "sda21"
3787 #define SMALL_DATA_REG 0
3791 print_operand (file
, x
, code
)
3799 /* These macros test for integers and extract the low-order bits. */
3801 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
3802 && GET_MODE (X) == VOIDmode)
3804 #define INT_LOWPART(X) \
3805 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
3810 /* Write out an instruction after the call which may be replaced
3811 with glue code by the loader. This depends on the AIX version. */
3812 asm_fprintf (file
, RS6000_CALL_GLUE
);
3816 /* Write out either a '.' or '$' for the current location, depending
3817 on whether this is Solaris or not. */
3818 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
3821 /* %a is output_address. */
3824 /* If X is a constant integer whose low-order 5 bits are zero,
3825 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
3826 in the AIX assembler where "sri" with a zero shift count
3827 write a trash instruction. */
3828 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
3835 /* If constant, low-order 16 bits of constant, unsigned.
3836 Otherwise, write normally. */
3838 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 0xffff);
3840 print_operand (file
, x
, 0);
3844 /* If the low-order bit is zero, write 'r'; otherwise, write 'l'
3845 for 64-bit mask direction. */
3846 putc (((INT_LOWPART(x
) & 1) == 0 ? 'r' : 'l'), file
);
3849 /* %c is output_addr_const if a CONSTANT_ADDRESS_P, otherwise
3853 /* There used to be a comment for 'C' reading "This is an
3854 optional cror needed for certain floating-point
3855 comparisons. Otherwise write nothing." */
3857 /* Similar, except that this is for an scc, so we must be able to
3858 encode the test in a single bit that is one. We do the above
3859 for any LE, GE, GEU, or LEU and invert the bit for NE. */
3860 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
3861 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
3863 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - CR0_REGNO
);
3865 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
3867 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
3870 else if (GET_CODE (x
) == NE
)
3872 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - CR0_REGNO
);
3874 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
3875 base_bit
+ 2, base_bit
+ 2);
3880 /* X is a CR register. Print the number of the EQ bit of the CR */
3881 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3882 output_operand_lossage ("invalid %%E value");
3884 fprintf (file
, "%d", 4 * (REGNO (x
) - CR0_REGNO
) + 2);
3888 /* X is a CR register. Print the shift count needed to move it
3889 to the high-order four bits. */
3890 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3891 output_operand_lossage ("invalid %%f value");
3893 fprintf (file
, "%d", 4 * (REGNO (x
) - CR0_REGNO
));
3897 /* Similar, but print the count for the rotate in the opposite
3899 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3900 output_operand_lossage ("invalid %%F value");
3902 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - CR0_REGNO
));
3906 /* X is a constant integer. If it is negative, print "m",
3907 otherwise print "z". This is to make a aze or ame insn. */
3908 if (GET_CODE (x
) != CONST_INT
)
3909 output_operand_lossage ("invalid %%G value");
3910 else if (INTVAL (x
) >= 0)
3917 /* If constant, output low-order five bits. Otherwise,
3920 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 31);
3922 print_operand (file
, x
, 0);
3926 /* If constant, output low-order six bits. Otherwise,
3929 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 63);
3931 print_operand (file
, x
, 0);
3935 /* Print `i' if this is a constant, else nothing. */
3941 /* Write the bit number in CCR for jump. */
3944 output_operand_lossage ("invalid %%j code");
3946 fprintf (file
, "%d", i
);
3950 /* Similar, but add one for shift count in rlinm for scc and pass
3951 scc flag to `ccr_bit'. */
3954 output_operand_lossage ("invalid %%J code");
3956 /* If we want bit 31, write a shift count of zero, not 32. */
3957 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
3961 /* X must be a constant. Write the 1's complement of the
3964 output_operand_lossage ("invalid %%k value");
3966 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, ~ INT_LOWPART (x
));
3970 /* X must be a symbolic constant on ELF. Write an
3971 expression suitable for an 'addi' that adds in the low 16
3973 if (GET_CODE (x
) != CONST
)
3975 print_operand_address (file
, x
);
3980 if (GET_CODE (XEXP (x
, 0)) != PLUS
3981 || (GET_CODE (XEXP (XEXP (x
, 0), 0)) != SYMBOL_REF
3982 && GET_CODE (XEXP (XEXP (x
, 0), 0)) != LABEL_REF
)
3983 || GET_CODE (XEXP (XEXP (x
, 0), 1)) != CONST_INT
)
3984 output_operand_lossage ("invalid %%K value");
3985 print_operand_address (file
, XEXP (XEXP (x
, 0), 0));
3987 print_operand (file
, XEXP (XEXP (x
, 0), 1), 0);
3991 /* %l is output_asm_label. */
3994 /* Write second word of DImode or DFmode reference. Works on register
3995 or non-indexed memory only. */
3996 if (GET_CODE (x
) == REG
)
3997 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
3998 else if (GET_CODE (x
) == MEM
)
4000 /* Handle possible auto-increment. Since it is pre-increment and
4001 we have already done it, we can just use an offset of word. */
4002 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4003 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4004 output_address (plus_constant (XEXP (XEXP (x
, 0), 0),
4007 output_address (plus_constant (XEXP (x
, 0), UNITS_PER_WORD
));
4009 if (small_data_operand (x
, GET_MODE (x
)))
4010 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4011 reg_names
[SMALL_DATA_REG
]);
4016 /* MB value for a mask operand. */
4017 if (! mask_operand (x
, VOIDmode
))
4018 output_operand_lossage ("invalid %%m value");
4020 val
= INT_LOWPART (x
);
4022 /* If the high bit is set and the low bit is not, the value is zero.
4023 If the high bit is zero, the value is the first 1 bit we find from
4025 if ((val
& 0x80000000) && ((val
& 1) == 0))
4030 else if ((val
& 0x80000000) == 0)
4032 for (i
= 1; i
< 32; i
++)
4033 if ((val
<<= 1) & 0x80000000)
4035 fprintf (file
, "%d", i
);
4039 /* Otherwise, look for the first 0 bit from the right. The result is its
4040 number plus 1. We know the low-order bit is one. */
4041 for (i
= 0; i
< 32; i
++)
4042 if (((val
>>= 1) & 1) == 0)
4045 /* If we ended in ...01, i would be 0. The correct value is 31, so
4047 fprintf (file
, "%d", 31 - i
);
4051 /* ME value for a mask operand. */
4052 if (! mask_operand (x
, VOIDmode
))
4053 output_operand_lossage ("invalid %%M value");
4055 val
= INT_LOWPART (x
);
4057 /* If the low bit is set and the high bit is not, the value is 31.
4058 If the low bit is zero, the value is the first 1 bit we find from
4060 if ((val
& 1) && ((val
& 0x80000000) == 0))
4065 else if ((val
& 1) == 0)
4067 for (i
= 0; i
< 32; i
++)
4068 if ((val
>>= 1) & 1)
4071 /* If we had ....10, i would be 0. The result should be
4072 30, so we need 30 - i. */
4073 fprintf (file
, "%d", 30 - i
);
4077 /* Otherwise, look for the first 0 bit from the left. The result is its
4078 number minus 1. We know the high-order bit is one. */
4079 for (i
= 0; i
< 32; i
++)
4080 if (((val
<<= 1) & 0x80000000) == 0)
4083 fprintf (file
, "%d", i
);
4086 /* %n outputs the negative of its operand. */
4089 /* Write the number of elements in the vector times 4. */
4090 if (GET_CODE (x
) != PARALLEL
)
4091 output_operand_lossage ("invalid %%N value");
4093 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
4097 /* Similar, but subtract 1 first. */
4098 if (GET_CODE (x
) != PARALLEL
)
4099 output_operand_lossage ("invalid %%O value");
4101 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
4105 /* X is a CONST_INT that is a power of two. Output the logarithm. */
4107 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
4108 output_operand_lossage ("invalid %%p value");
4110 fprintf (file
, "%d", i
);
4114 /* The operand must be an indirect memory reference. The result
4115 is the register number. */
4116 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
4117 || REGNO (XEXP (x
, 0)) >= 32)
4118 output_operand_lossage ("invalid %%P value");
4120 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
4124 /* This outputs the logical code corresponding to a boolean
4125 expression. The expression may have one or both operands
4126 negated (if one, only the first one). For condition register
4127 logical operations, it will also treat the negated
4128 CR codes as NOTs, but not handle NOTs of them. */
4130 const char *const *t
= 0;
4132 enum rtx_code code
= GET_CODE (x
);
4133 static const char * const tbl
[3][3] = {
4134 { "and", "andc", "nor" },
4135 { "or", "orc", "nand" },
4136 { "xor", "eqv", "xor" } };
4140 else if (code
== IOR
)
4142 else if (code
== XOR
)
4145 output_operand_lossage ("invalid %%q value");
4147 if (GET_CODE (XEXP (x
, 0)) != NOT
)
4151 if (GET_CODE (XEXP (x
, 1)) == NOT
)
4162 /* X is a CR register. Print the mask for `mtcrf'. */
4163 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
4164 output_operand_lossage ("invalid %%R value");
4166 fprintf (file
, "%d", 128 >> (REGNO (x
) - CR0_REGNO
));
4170 /* Low 5 bits of 32 - value */
4172 output_operand_lossage ("invalid %%s value");
4174 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (32 - INT_LOWPART (x
)) & 31);
4178 /* PowerPC64 mask position. All 0's and all 1's are excluded.
4179 CONST_INT 32-bit mask is considered sign-extended so any
4180 transition must occur within the CONST_INT, not on the boundary. */
4181 if (! mask64_operand (x
, VOIDmode
))
4182 output_operand_lossage ("invalid %%S value");
4184 val
= INT_LOWPART (x
);
4186 if (val
& 1) /* Clear Left */
4188 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4189 if (!((val
>>= 1) & 1))
4192 #if HOST_BITS_PER_WIDE_INT == 32
4193 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4195 val
= CONST_DOUBLE_HIGH (x
);
4200 for (i
= 32; i
< 64; i
++)
4201 if (!((val
>>= 1) & 1))
4205 /* i = index of last set bit from right
4206 mask begins at 63 - i from left */
4208 output_operand_lossage ("%%S computed all 1's mask");
4210 fprintf (file
, "%d", 63 - i
);
4213 else /* Clear Right */
4215 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4216 if ((val
>>= 1) & 1)
4219 #if HOST_BITS_PER_WIDE_INT == 32
4220 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4222 val
= CONST_DOUBLE_HIGH (x
);
4224 if (val
== (HOST_WIDE_INT
) -1)
4227 for (i
= 32; i
< 64; i
++)
4228 if ((val
>>= 1) & 1)
4232 /* i = index of last clear bit from right
4233 mask ends at 62 - i from left */
4235 output_operand_lossage ("%%S computed all 0's mask");
4237 fprintf (file
, "%d", 62 - i
);
4242 /* Print the symbolic name of a branch target register. */
4243 if (GET_CODE (x
) != REG
|| (REGNO (x
) != LINK_REGISTER_REGNUM
4244 && REGNO (x
) != COUNT_REGISTER_REGNUM
))
4245 output_operand_lossage ("invalid %%T value");
4246 else if (REGNO (x
) == LINK_REGISTER_REGNUM
)
4247 fputs (TARGET_NEW_MNEMONICS
? "lr" : "r", file
);
4249 fputs ("ctr", file
);
4253 /* High-order 16 bits of constant for use in unsigned operand. */
4255 output_operand_lossage ("invalid %%u value");
4257 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
4258 (INT_LOWPART (x
) >> 16) & 0xffff);
4262 /* High-order 16 bits of constant for use in signed operand. */
4264 output_operand_lossage ("invalid %%v value");
4267 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
4269 /* Solaris assembler doesn't like lis 0,0x8000 */
4270 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
4271 fprintf (file
, "%d", value
| (~0 << 16));
4273 fprintf (file
, "0x%x", value
);
4278 /* Print `u' if this has an auto-increment or auto-decrement. */
4279 if (GET_CODE (x
) == MEM
4280 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
4281 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
4286 /* Print the trap code for this operand. */
4287 switch (GET_CODE (x
))
4290 fputs ("eq", file
); /* 4 */
4293 fputs ("ne", file
); /* 24 */
4296 fputs ("lt", file
); /* 16 */
4299 fputs ("le", file
); /* 20 */
4302 fputs ("gt", file
); /* 8 */
4305 fputs ("ge", file
); /* 12 */
4308 fputs ("llt", file
); /* 2 */
4311 fputs ("lle", file
); /* 6 */
4314 fputs ("lgt", file
); /* 1 */
4317 fputs ("lge", file
); /* 5 */
4325 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
4328 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
,
4329 ((INT_LOWPART (x
) & 0xffff) ^ 0x8000) - 0x8000);
4331 print_operand (file
, x
, 0);
4335 /* MB value for a PowerPC64 rldic operand. */
4336 if (! rldic_operand (x
, VOIDmode
))
4337 output_operand_lossage ("invalid %%W value");
4339 val
= (GET_CODE (x
) == CONST_INT
4340 ? INTVAL (x
) : CONST_DOUBLE_HIGH (x
));
4345 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4346 if ((val
<<= 1) < 0)
4349 #if HOST_BITS_PER_WIDE_INT == 32
4350 if (GET_CODE (x
) == CONST_INT
&& i
>= 0)
4351 i
+= 32; /* zero-extend high-part was all 0's */
4352 else if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4354 val
= CONST_DOUBLE_LOW (x
);
4361 for ( ; i
< 64; i
++)
4362 if ((val
<<= 1) < 0)
4367 fprintf (file
, "%d", i
+ 1);
4371 if (GET_CODE (x
) == MEM
4372 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0), 0))
4377 /* Like 'L', for third word of TImode */
4378 if (GET_CODE (x
) == REG
)
4379 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
4380 else if (GET_CODE (x
) == MEM
)
4382 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4383 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4384 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
4386 output_address (plus_constant (XEXP (x
, 0), 8));
4387 if (small_data_operand (x
, GET_MODE (x
)))
4388 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4389 reg_names
[SMALL_DATA_REG
]);
4394 /* X is a SYMBOL_REF. Write out the name preceded by a
4395 period and without any trailing data in brackets. Used for function
4396 names. If we are configured for System V (or the embedded ABI) on
4397 the PowerPC, do not emit the period, since those systems do not use
4398 TOCs and the like. */
4399 if (GET_CODE (x
) != SYMBOL_REF
)
4402 if (XSTR (x
, 0)[0] != '.')
4404 switch (DEFAULT_ABI
)
4414 case ABI_AIX_NODESC
:
4421 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
4423 assemble_name (file
, XSTR (x
, 0));
4428 /* Like 'L', for last word of TImode. */
4429 if (GET_CODE (x
) == REG
)
4430 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
4431 else if (GET_CODE (x
) == MEM
)
4433 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4434 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4435 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
4437 output_address (plus_constant (XEXP (x
, 0), 12));
4438 if (small_data_operand (x
, GET_MODE (x
)))
4439 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4440 reg_names
[SMALL_DATA_REG
]);
4445 if (GET_CODE (x
) == REG
)
4446 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
4447 else if (GET_CODE (x
) == MEM
)
4449 /* We need to handle PRE_INC and PRE_DEC here, since we need to
4450 know the width from the mode. */
4451 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
4452 fprintf (file
, "%d(%s)", GET_MODE_SIZE (GET_MODE (x
)),
4453 reg_names
[REGNO (XEXP (XEXP (x
, 0), 0))]);
4454 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4455 fprintf (file
, "%d(%s)", - GET_MODE_SIZE (GET_MODE (x
)),
4456 reg_names
[REGNO (XEXP (XEXP (x
, 0), 0))]);
4458 output_address (XEXP (x
, 0));
4461 output_addr_const (file
, x
);
4465 output_operand_lossage ("invalid %%xn code");
4469 /* Print the address of an operand. */
4472 print_operand_address (file
, x
)
4476 if (GET_CODE (x
) == REG
)
4477 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
4478 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
4479 || GET_CODE (x
) == LABEL_REF
)
4481 output_addr_const (file
, x
);
4482 if (small_data_operand (x
, GET_MODE (x
)))
4483 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4484 reg_names
[SMALL_DATA_REG
]);
4485 else if (TARGET_TOC
)
4488 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
4490 if (REGNO (XEXP (x
, 0)) == 0)
4491 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
4492 reg_names
[ REGNO (XEXP (x
, 0)) ]);
4494 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
4495 reg_names
[ REGNO (XEXP (x
, 1)) ]);
4497 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4499 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (XEXP (x
, 1)));
4500 fprintf (file
, "(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
4503 else if (GET_CODE (x
) == LO_SUM
&& GET_CODE (XEXP (x
, 0)) == REG
4504 && CONSTANT_P (XEXP (x
, 1)))
4506 output_addr_const (file
, XEXP (x
, 1));
4507 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
4510 else if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (x
))
4514 rtx contains_minus
= XEXP (x
, 1);
4517 /* Find the (minus (sym) (toc)) buried in X, and temporarily
4518 turn it into (sym) for output_addr_const. */
4519 while (GET_CODE (XEXP (contains_minus
, 0)) != MINUS
)
4520 contains_minus
= XEXP (contains_minus
, 0);
4522 minus
= XEXP (contains_minus
, 0);
4523 XEXP (contains_minus
, 0) = XEXP (minus
, 0);
4524 output_addr_const (file
, XEXP (x
, 1));
4525 XEXP (contains_minus
, 0) = minus
;
4528 output_addr_const (file
, XEXP (x
, 1));
4530 fprintf (file
, "(%s)", reg_names
[REGNO (XEXP (x
, 0))]);
4537 rs6000_reverse_condition (mode
, code
)
4538 enum machine_mode mode
;
4541 /* Reversal of FP compares takes care -- an ordered compare
4542 becomes an unordered compare and vice versa. */
4543 if (mode
== CCFPmode
)
4544 return reverse_condition_maybe_unordered (code
);
4546 return reverse_condition (code
);
4550 /* Generate a compare for CODE. Return a brand-new rtx that
4551 represents the result of the compare. */
4553 rs6000_generate_compare (code
)
4556 enum machine_mode comp_mode
;
4559 if (rs6000_compare_fp_p
)
4560 comp_mode
= CCFPmode
;
4561 else if (code
== GTU
|| code
== LTU
4562 || code
== GEU
|| code
== LEU
)
4563 comp_mode
= CCUNSmode
;
4567 /* First, the compare. */
4568 compare_result
= gen_reg_rtx (comp_mode
);
4569 emit_insn (gen_rtx_SET (VOIDmode
, compare_result
,
4570 gen_rtx_COMPARE (comp_mode
,
4572 rs6000_compare_op1
)));
4574 /* Some kinds of FP comparisons need an OR operation;
4575 except for flag_unsafe_math_optimizations we don't bother. */
4576 if (rs6000_compare_fp_p
4577 && ! flag_unsafe_math_optimizations
4578 && (code
== LE
|| code
== GE
4579 || code
== UNEQ
|| code
== LTGT
4580 || code
== UNGT
|| code
== UNLT
))
4582 enum rtx_code or1
, or2
;
4583 rtx or1_rtx
, or2_rtx
, compare2_rtx
;
4584 rtx or_result
= gen_reg_rtx (CCEQmode
);
4588 case LE
: or1
= LT
; or2
= EQ
; break;
4589 case GE
: or1
= GT
; or2
= EQ
; break;
4590 case UNEQ
: or1
= UNORDERED
; or2
= EQ
; break;
4591 case LTGT
: or1
= LT
; or2
= GT
; break;
4592 case UNGT
: or1
= UNORDERED
; or2
= GT
; break;
4593 case UNLT
: or1
= UNORDERED
; or2
= LT
; break;
4596 validate_condition_mode (or1
, comp_mode
);
4597 validate_condition_mode (or2
, comp_mode
);
4598 or1_rtx
= gen_rtx (or1
, SImode
, compare_result
, const0_rtx
);
4599 or2_rtx
= gen_rtx (or2
, SImode
, compare_result
, const0_rtx
);
4600 compare2_rtx
= gen_rtx_COMPARE (CCEQmode
,
4601 gen_rtx_IOR (SImode
, or1_rtx
, or2_rtx
),
4603 emit_insn (gen_rtx_SET (VOIDmode
, or_result
, compare2_rtx
));
4605 compare_result
= or_result
;
4609 validate_condition_mode (code
, GET_MODE (compare_result
));
4611 return gen_rtx (code
, VOIDmode
, compare_result
, const0_rtx
);
4615 /* Emit the RTL for an sCOND pattern. */
4618 rs6000_emit_sCOND (code
, result
)
4623 enum machine_mode op_mode
;
4625 condition_rtx
= rs6000_generate_compare (code
);
4627 op_mode
= GET_MODE (rs6000_compare_op0
);
4628 if (op_mode
== VOIDmode
)
4629 op_mode
= GET_MODE (rs6000_compare_op1
);
4631 if (TARGET_POWERPC64
&& (op_mode
== DImode
|| rs6000_compare_fp_p
))
4633 PUT_MODE (condition_rtx
, DImode
);
4634 convert_move (result
, condition_rtx
, 0);
4638 PUT_MODE (condition_rtx
, SImode
);
4639 emit_insn (gen_rtx_SET (VOIDmode
, result
, condition_rtx
));
4644 /* Emit a branch of kind CODE to location LOC. */
4647 rs6000_emit_cbranch (code
, loc
)
4651 rtx condition_rtx
, loc_ref
;
4653 condition_rtx
= rs6000_generate_compare (code
);
4654 loc_ref
= gen_rtx_LABEL_REF (VOIDmode
, loc
);
4655 emit_jump_insn (gen_rtx_SET (VOIDmode
, pc_rtx
,
4656 gen_rtx_IF_THEN_ELSE (VOIDmode
, condition_rtx
,
4661 /* Return the string to output a conditional branch to LABEL, which is
4662 the operand number of the label, or -1 if the branch is really a
4665 OP is the conditional expression. XEXP (OP, 0) is assumed to be a
4666 condition code register and its mode specifies what kind of
4669 REVERSED is non-zero if we should reverse the sense of the comparison.
4671 INSN is the insn. */
4674 output_cbranch (op
, label
, reversed
, insn
)
4680 static char string
[64];
4681 enum rtx_code code
= GET_CODE (op
);
4682 rtx cc_reg
= XEXP (op
, 0);
4683 enum machine_mode mode
= GET_MODE (cc_reg
);
4684 int cc_regno
= REGNO (cc_reg
) - CR0_REGNO
;
4685 int need_longbranch
= label
!= NULL
&& get_attr_length (insn
) == 8;
4686 int really_reversed
= reversed
^ need_longbranch
;
4692 validate_condition_mode (code
, mode
);
4694 /* Work out which way this really branches. We could use
4695 reverse_condition_maybe_unordered here always but this
4696 makes the resulting assembler clearer. */
4697 if (really_reversed
)
4698 code
= rs6000_reverse_condition (mode
, code
);
4702 /* Not all of these are actually distinct opcodes, but
4703 we distinguish them for clarity of the resulting assembler. */
4705 ccode
= "ne"; break;
4707 ccode
= "eq"; break;
4709 ccode
= "ge"; break;
4710 case GT
: case GTU
: case UNGT
:
4711 ccode
= "gt"; break;
4713 ccode
= "le"; break;
4714 case LT
: case LTU
: case UNLT
:
4715 ccode
= "lt"; break;
4716 case UNORDERED
: ccode
= "un"; break;
4717 case ORDERED
: ccode
= "nu"; break;
4718 case UNGE
: ccode
= "nl"; break;
4719 case UNLE
: ccode
= "ng"; break;
4724 /* Maybe we have a guess as to how likely the branch is.
4725 The old mnemonics don't have a way to specify this information. */
4726 note
= find_reg_note (insn
, REG_BR_PROB
, NULL_RTX
);
4727 if (note
!= NULL_RTX
)
4729 /* PROB is the difference from 50%. */
4730 int prob
= INTVAL (XEXP (note
, 0)) - REG_BR_PROB_BASE
/ 2;
4732 /* For branches that are very close to 50%, assume not-taken. */
4733 if (abs (prob
) > REG_BR_PROB_BASE
/ 20
4734 && ((prob
> 0) ^ need_longbranch
))
4743 s
+= sprintf (s
, "{b%sr|b%slr%s} ", ccode
, ccode
, pred
);
4745 s
+= sprintf (s
, "{b%s|b%s%s} ", ccode
, ccode
, pred
);
4747 /* We need to escape any '%' characters in the reg_names string.
4748 Assume they'd only be the first character... */
4749 if (reg_names
[cc_regno
+ CR0_REGNO
][0] == '%')
4751 s
+= sprintf (s
, "%s", reg_names
[cc_regno
+ CR0_REGNO
]);
4755 /* If the branch distance was too far, we may have to use an
4756 unconditional branch to go the distance. */
4757 if (need_longbranch
)
4758 s
+= sprintf (s
, ",%c$+8\n\tb %s", '%', label
);
4760 s
+= sprintf (s
, ",%s", label
);
4766 /* Emit a conditional move: move TRUE_COND to DEST if OP of the
4767 operands of the last comparison is nonzero/true, FALSE_COND if it
4768 is zero/false. Return 0 if the hardware has no such operation. */
4770 rs6000_emit_cmove (dest
, op
, true_cond
, false_cond
)
4776 enum rtx_code code
= GET_CODE (op
);
4777 rtx op0
= rs6000_compare_op0
;
4778 rtx op1
= rs6000_compare_op1
;
4780 enum machine_mode mode
= GET_MODE (op0
);
4783 /* First, work out if the hardware can do this at all, or
4784 if it's too slow... */
4785 /* If the comparison is an integer one, since we only have fsel
4786 it'll be cheaper to use a branch. */
4787 if (! rs6000_compare_fp_p
)
4790 /* Eliminate half of the comparisons by switching operands, this
4791 makes the remaining code simpler. */
4792 if (code
== UNLT
|| code
== UNGT
|| code
== UNORDERED
|| code
== NE
4793 || code
== LTGT
|| code
== LT
)
4795 code
= reverse_condition_maybe_unordered (code
);
4797 true_cond
= false_cond
;
4801 /* UNEQ and LTGT take four instructions for a comparison with zero,
4802 it'll probably be faster to use a branch here too. */
4806 if (GET_CODE (op1
) == CONST_DOUBLE
)
4807 REAL_VALUE_FROM_CONST_DOUBLE (c1
, op1
);
4809 /* We're going to try to implement comparions by performing
4810 a subtract, then comparing against zero. Unfortunately,
4811 Inf - Inf is NaN which is not zero, and so if we don't
4812 know that the the operand is finite and the comparison
4813 would treat EQ different to UNORDERED, we can't do it. */
4814 if (! flag_unsafe_math_optimizations
4815 && code
!= GT
&& code
!= UNGE
4816 && (GET_CODE (op1
) != CONST_DOUBLE
|| target_isinf (c1
))
4817 /* Constructs of the form (a OP b ? a : b) are safe. */
4818 && ((! rtx_equal_p (op0
, false_cond
) && ! rtx_equal_p (op1
, false_cond
))
4819 || (! rtx_equal_p (op0
, true_cond
)
4820 && ! rtx_equal_p (op1
, true_cond
))))
4822 /* At this point we know we can use fsel. */
4824 /* Reduce the comparison to a comparison against zero. */
4825 temp
= gen_reg_rtx (mode
);
4826 emit_insn (gen_rtx_SET (VOIDmode
, temp
,
4827 gen_rtx_MINUS (mode
, op0
, op1
)));
4829 op1
= CONST0_RTX (mode
);
4831 /* If we don't care about NaNs we can reduce some of the comparisons
4832 down to faster ones. */
4833 if (flag_unsafe_math_optimizations
)
4839 true_cond
= false_cond
;
4852 /* Now, reduce everything down to a GE. */
4859 temp
= gen_reg_rtx (mode
);
4860 emit_insn (gen_rtx_SET (VOIDmode
, temp
, gen_rtx_NEG (mode
, op0
)));
4865 temp
= gen_reg_rtx (mode
);
4866 emit_insn (gen_rtx_SET (VOIDmode
, temp
, gen_rtx_ABS (mode
, op0
)));
4871 temp
= gen_reg_rtx (mode
);
4872 emit_insn (gen_rtx_SET (VOIDmode
, temp
,
4874 gen_rtx_ABS (mode
, op0
))));
4879 temp
= gen_reg_rtx (mode
);
4880 emit_insn (gen_rtx_SET (VOIDmode
, temp
,
4881 gen_rtx_IF_THEN_ELSE (mode
,
4882 gen_rtx_GE (VOIDmode
,
4884 true_cond
, false_cond
)));
4886 true_cond
= false_cond
;
4888 temp
= gen_reg_rtx (mode
);
4889 emit_insn (gen_rtx_SET (VOIDmode
, temp
, gen_rtx_NEG (mode
, op0
)));
4894 temp
= gen_reg_rtx (mode
);
4895 emit_insn (gen_rtx_SET (VOIDmode
, temp
,
4896 gen_rtx_IF_THEN_ELSE (mode
,
4897 gen_rtx_GE (VOIDmode
,
4899 true_cond
, false_cond
)));
4901 false_cond
= true_cond
;
4903 temp
= gen_reg_rtx (mode
);
4904 emit_insn (gen_rtx_SET (VOIDmode
, temp
, gen_rtx_NEG (mode
, op0
)));
4912 emit_insn (gen_rtx_SET (VOIDmode
, dest
,
4913 gen_rtx_IF_THEN_ELSE (mode
,
4914 gen_rtx_GE (VOIDmode
,
4916 true_cond
, false_cond
)));
4921 rs6000_emit_minmax (dest
, code
, op0
, op1
)
4927 enum machine_mode mode
= GET_MODE (op0
);
4929 if (code
== SMAX
|| code
== UMAX
)
4930 target
= emit_conditional_move (dest
, GE
, op0
, op1
, mode
,
4933 target
= emit_conditional_move (dest
, GE
, op0
, op1
, mode
,
4935 if (target
== NULL_RTX
)
4938 emit_move_insn (dest
, target
);
4941 /* This page contains routines that are used to determine what the function
4942 prologue and epilogue code will do and write them out. */
4944 /* Return the first fixed-point register that is required to be saved. 32 if
4948 first_reg_to_save ()
4952 /* Find lowest numbered live register. */
4953 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
4954 if (regs_ever_live
[first_reg
]
4955 && (! call_used_regs
[first_reg
]
4956 || (first_reg
== PIC_OFFSET_TABLE_REGNUM
4957 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4959 || (DEFAULT_ABI
== ABI_DARWIN
4965 /* AIX must save/restore every register that contains a parameter
4966 before/after the .__mcount call plus an additional register
4967 for the static chain, if needed; use registers from 30 down to 22
4969 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_DARWIN
)
4971 int last_parm_reg
, profile_first_reg
;
4973 /* Figure out last used parameter register. The proper thing
4974 to do is to walk incoming args of the function. A function
4975 might have live parameter registers even if it has no
4977 for (last_parm_reg
= 10;
4978 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
4982 /* Calculate first reg for saving parameter registers
4984 Skip reg 31 which may contain the frame pointer. */
4985 profile_first_reg
= (33 - last_parm_reg
4986 - (current_function_needs_context
? 1 : 0));
4988 /* Need to skip another reg to account for R31 being PICBASE
4989 (when flag_pic is set) or R30 being used as the frame
4990 pointer (when flag_pic is not set). */
4991 --profile_first_reg
;
4993 /* Do not save frame pointer if no parameters needs to be saved. */
4994 if (profile_first_reg
== 31)
4995 profile_first_reg
= 32;
4997 if (first_reg
> profile_first_reg
)
4998 first_reg
= profile_first_reg
;
5001 /* SVR4 may need one register to preserve the static chain. */
5002 else if (current_function_needs_context
)
5004 /* Skip reg 31 which may contain the frame pointer. */
5011 if (flag_pic
&& current_function_uses_pic_offset_table
&&
5012 (first_reg
> PIC_OFFSET_TABLE_REGNUM
))
5013 return PIC_OFFSET_TABLE_REGNUM
;
5019 /* Similar, for FP regs. */
5022 first_fp_reg_to_save ()
5026 /* Find lowest numbered live register. */
5027 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
5028 if (regs_ever_live
[first_reg
])
5034 /* Calculate the stack information for the current function. This is
5035 complicated by having two separate calling sequences, the AIX calling
5036 sequence and the V.4 calling sequence.
5038 AIX (and Darwin/Mac OS) stack frames look like:
5040 SP----> +---------------------------------------+
5041 | back chain to caller | 0 0
5042 +---------------------------------------+
5043 | saved CR | 4 8 (8-11)
5044 +---------------------------------------+
5046 +---------------------------------------+
5047 | reserved for compilers | 12 24
5048 +---------------------------------------+
5049 | reserved for binders | 16 32
5050 +---------------------------------------+
5051 | saved TOC pointer | 20 40
5052 +---------------------------------------+
5053 | Parameter save area (P) | 24 48
5054 +---------------------------------------+
5055 | Alloca space (A) | 24+P etc.
5056 +---------------------------------------+
5057 | Local variable space (L) | 24+P+A
5058 +---------------------------------------+
5059 | Float/int conversion temporary (X) | 24+P+A+L
5060 +---------------------------------------+
5061 | Save area for GP registers (G) | 24+P+A+X+L
5062 +---------------------------------------+
5063 | Save area for FP registers (F) | 24+P+A+X+L+G
5064 +---------------------------------------+
5065 old SP->| back chain to caller's caller |
5066 +---------------------------------------+
5068 The required alignment for AIX configurations is two words (i.e., 8
5072 V.4 stack frames look like:
5074 SP----> +---------------------------------------+
5075 | back chain to caller | 0
5076 +---------------------------------------+
5077 | caller's saved LR | 4
5078 +---------------------------------------+
5079 | Parameter save area (P) | 8
5080 +---------------------------------------+
5081 | Alloca space (A) | 8+P
5082 +---------------------------------------+
5083 | Varargs save area (V) | 8+P+A
5084 +---------------------------------------+
5085 | Local variable space (L) | 8+P+A+V
5086 +---------------------------------------+
5087 | Float/int conversion temporary (X) | 8+P+A+V+L
5088 +---------------------------------------+
5089 | saved CR (C) | 8+P+A+V+L+X
5090 +---------------------------------------+
5091 | Save area for GP registers (G) | 8+P+A+V+L+X+C
5092 +---------------------------------------+
5093 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
5094 +---------------------------------------+
5095 old SP->| back chain to caller's caller |
5096 +---------------------------------------+
5098 The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is
5099 given. (But note below and in sysv4.h that we require only 8 and
5100 may round up the size of our stack frame anyways. The historical
5101 reason is early versions of powerpc-linux which didn't properly
5102 align the stack at program startup. A happy side-effect is that
5103 -mno-eabi libraries can be used with -meabi programs.)
5106 The EABI configuration defaults to the V.4 layout, unless
5107 -mcall-aix is used, in which case the AIX layout is used. However,
5108 the stack alignment requirements may differ. If -mno-eabi is not
5109 given, the required stack alignment is 8 bytes; if -mno-eabi is
5110 given, the required alignment is 16 bytes. (But see V.4 comment
5113 #ifndef ABI_STACK_BOUNDARY
5114 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
5118 rs6000_stack_info ()
5120 static rs6000_stack_t info
, zero_info
;
5121 rs6000_stack_t
*info_ptr
= &info
;
5122 int reg_size
= TARGET_POWERPC64
? 8 : 4;
5123 enum rs6000_abi abi
;
5127 /* Zero all fields portably */
5130 /* Select which calling sequence */
5131 info_ptr
->abi
= abi
= DEFAULT_ABI
;
5133 /* Calculate which registers need to be saved & save area size */
5134 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
5135 /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM,
5136 even if it currently looks like we won't. */
5138 && (abi
== ABI_V4
|| abi
== ABI_SOLARIS
))
5141 && info_ptr
->first_gp_reg_save
> PIC_OFFSET_TABLE_REGNUM
)
5142 info_ptr
->gp_size
= reg_size
* (32 - PIC_OFFSET_TABLE_REGNUM
);
5144 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
5146 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
5147 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
5149 /* Does this function call anything? */
5150 info_ptr
->calls_p
= (! current_function_is_leaf
5151 || cfun
->machine
->ra_needs_full_frame
);
5153 /* Determine if we need to save the link register */
5154 if (rs6000_ra_ever_killed ()
5155 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
5156 #ifdef TARGET_RELOCATABLE
5157 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
5159 || (info_ptr
->first_fp_reg_save
!= 64
5160 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
5161 || (abi
== ABI_V4
&& current_function_calls_alloca
)
5162 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
5163 || (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
&& current_function_uses_pic_offset_table
)
5164 || info_ptr
->calls_p
)
5166 info_ptr
->lr_save_p
= 1;
5167 regs_ever_live
[LINK_REGISTER_REGNUM
] = 1;
5170 /* Determine if we need to save the condition code registers. */
5171 if (regs_ever_live
[CR2_REGNO
]
5172 || regs_ever_live
[CR3_REGNO
]
5173 || regs_ever_live
[CR4_REGNO
])
5175 info_ptr
->cr_save_p
= 1;
5176 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
5177 info_ptr
->cr_size
= reg_size
;
5180 /* If the current function calls __builtin_eh_return, then we need
5181 to allocate stack space for registers that will hold data for
5182 the exception handler. */
5183 if (current_function_calls_eh_return
)
5186 for (i
= 0; EH_RETURN_DATA_REGNO (i
) != INVALID_REGNUM
; ++i
)
5188 ehrd_size
= i
* UNITS_PER_WORD
;
5193 /* Determine various sizes */
5194 info_ptr
->reg_size
= reg_size
;
5195 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
5196 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
5197 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
5198 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
5199 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
5204 + info_ptr
->toc_size
, 8);
5205 if (DEFAULT_ABI
== ABI_DARWIN
)
5206 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->save_size
, 16);
5208 /* Calculate the offsets */
5216 case ABI_AIX_NODESC
:
5218 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
5219 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
5220 info_ptr
->ehrd_offset
= info_ptr
->gp_save_offset
- ehrd_size
;
5221 info_ptr
->cr_save_offset
= reg_size
; /* first word when 64-bit. */
5222 info_ptr
->lr_save_offset
= 2*reg_size
;
5227 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
5228 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
5229 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
5230 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
5231 info_ptr
->ehrd_offset
= info_ptr
->toc_save_offset
- ehrd_size
;
5232 info_ptr
->lr_save_offset
= reg_size
;
5236 total_raw_size
= (info_ptr
->vars_size
5237 + info_ptr
->parm_size
5238 + info_ptr
->save_size
5239 + info_ptr
->varargs_size
5240 + info_ptr
->fixed_size
);
5242 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
5244 /* Determine if we need to allocate any stack frame:
5246 For AIX we need to push the stack if a frame pointer is needed (because
5247 the stack might be dynamically adjusted), if we are debugging, if we
5248 make calls, or if the sum of fp_save, gp_save, and local variables
5249 are more than the space needed to save all non-volatile registers:
5250 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved).
5252 For V.4 we don't have the stack cushion that AIX uses, but assume that
5253 the debugger can handle stackless frames. */
5255 if (info_ptr
->calls_p
)
5256 info_ptr
->push_p
= 1;
5258 else if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
5259 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
5260 || info_ptr
->calls_p
);
5263 info_ptr
->push_p
= (frame_pointer_needed
5264 || (abi
!= ABI_DARWIN
&& write_symbols
!= NO_DEBUG
)
5265 || ((total_raw_size
- info_ptr
->fixed_size
)
5266 > (TARGET_32BIT
? 220 : 288)));
5268 /* Zero offsets if we're not saving those registers */
5269 if (info_ptr
->fp_size
== 0)
5270 info_ptr
->fp_save_offset
= 0;
5272 if (info_ptr
->gp_size
== 0)
5273 info_ptr
->gp_save_offset
= 0;
5275 if (! info_ptr
->lr_save_p
)
5276 info_ptr
->lr_save_offset
= 0;
5278 if (! info_ptr
->cr_save_p
)
5279 info_ptr
->cr_save_offset
= 0;
5281 if (! info_ptr
->toc_save_p
)
5282 info_ptr
->toc_save_offset
= 0;
5288 debug_stack_info (info
)
5289 rs6000_stack_t
*info
;
5291 const char *abi_string
;
5294 info
= rs6000_stack_info ();
5296 fprintf (stderr
, "\nStack information for function %s:\n",
5297 ((current_function_decl
&& DECL_NAME (current_function_decl
))
5298 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
5303 default: abi_string
= "Unknown"; break;
5304 case ABI_NONE
: abi_string
= "NONE"; break;
5305 case ABI_AIX
: abi_string
= "AIX"; break;
5306 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
5307 case ABI_DARWIN
: abi_string
= "Darwin"; break;
5308 case ABI_V4
: abi_string
= "V.4"; break;
5309 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
5312 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
5314 if (info
->first_gp_reg_save
!= 32)
5315 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
5317 if (info
->first_fp_reg_save
!= 64)
5318 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
5320 if (info
->lr_save_p
)
5321 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
5323 if (info
->cr_save_p
)
5324 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
5326 if (info
->toc_save_p
)
5327 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
5330 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
5333 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
5335 if (info
->gp_save_offset
)
5336 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
5338 if (info
->fp_save_offset
)
5339 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
5341 if (info
->lr_save_offset
)
5342 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
5344 if (info
->cr_save_offset
)
5345 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
5347 if (info
->toc_save_offset
)
5348 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
5350 if (info
->varargs_save_offset
)
5351 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
5353 if (info
->total_size
)
5354 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
5356 if (info
->varargs_size
)
5357 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
5359 if (info
->vars_size
)
5360 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
5362 if (info
->parm_size
)
5363 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
5365 if (info
->fixed_size
)
5366 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
5369 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
5372 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
5375 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
5378 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
5381 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
5383 if (info
->save_size
)
5384 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
5386 if (info
->reg_size
!= 4)
5387 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
5389 fprintf (stderr
, "\n");
5393 rs6000_return_addr (count
, frame
)
5397 /* Currently we don't optimize very well between prolog and body code and
5398 for PIC code the code can be actually quite bad, so don't try to be
5402 || DEFAULT_ABI
== ABI_AIX
5403 || DEFAULT_ABI
== ABI_AIX_NODESC
)
5405 cfun
->machine
->ra_needs_full_frame
= 1;
5408 memory_address (Pmode
,
5409 plus_constant (copy_to_reg (gen_rtx_MEM (Pmode
,
5410 memory_address (Pmode
, frame
))),
5411 RETURN_ADDRESS_OFFSET
)));
5414 return get_hard_reg_initial_val (Pmode
, LINK_REGISTER_REGNUM
);
5418 rs6000_ra_ever_killed ()
5422 #ifdef ASM_OUTPUT_MI_THUNK
5423 if (current_function_is_thunk
)
5426 if (!has_hard_reg_initial_val (Pmode
, LINK_REGISTER_REGNUM
)
5427 || cfun
->machine
->ra_needs_full_frame
)
5428 return regs_ever_live
[LINK_REGISTER_REGNUM
];
5430 push_topmost_sequence ();
5432 pop_topmost_sequence ();
5434 return reg_set_between_p (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
5438 /* Add a REG_MAYBE_DEAD note to the insn. */
5440 rs6000_maybe_dead (insn
)
5443 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD
,
5448 /* Emit instructions needed to load the TOC register.
5449 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
5450 a constant pool; or for SVR4 -fpic. */
5453 rs6000_emit_load_toc_table (fromprolog
)
5457 dest
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5461 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5464 rtx temp
= (fromprolog
5465 ? gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)
5466 : gen_reg_rtx (Pmode
));
5468 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_si (temp
)));
5470 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_di (temp
)));
5471 rs6000_maybe_dead (emit_move_insn (dest
, temp
));
5473 else if (flag_pic
== 2)
5476 rtx tempLR
= (fromprolog
5477 ? gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)
5478 : gen_reg_rtx (Pmode
));
5479 rtx temp0
= (fromprolog
5480 ? gen_rtx_REG (Pmode
, 0)
5481 : gen_reg_rtx (Pmode
));
5484 /* possibly create the toc section */
5485 if (! toc_initialized
)
5488 function_section (current_function_decl
);
5495 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
5496 symF
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5498 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
5499 symL
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5501 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (tempLR
,
5503 rs6000_maybe_dead (emit_move_insn (dest
, tempLR
));
5504 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0
, dest
,
5511 static int reload_toc_labelno
= 0;
5513 tocsym
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (toc_label_name
));
5515 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCG", reload_toc_labelno
++);
5516 symF
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5518 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1b (tempLR
,
5521 rs6000_maybe_dead (emit_move_insn (dest
, tempLR
));
5522 rs6000_maybe_dead (emit_move_insn (temp0
,
5523 gen_rtx_MEM (Pmode
, dest
)));
5525 rs6000_maybe_dead (emit_insn (gen_addsi3 (dest
, temp0
, dest
)));
5527 else if (flag_pic
== 0 && TARGET_MINIMAL_TOC
)
5529 /* This is for AIX code running in non-PIC ELF. */
5532 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
5533 realsym
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5535 rs6000_maybe_dead (emit_insn (gen_elf_high (dest
, realsym
)));
5536 rs6000_maybe_dead (emit_insn (gen_elf_low (dest
, dest
, realsym
)));
5544 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_si (dest
)));
5546 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_di (dest
)));
5551 get_TOC_alias_set ()
5553 static int set
= -1;
5555 set
= new_alias_set ();
5559 /* This retuns nonzero if the current function uses the TOC. This is
5560 determined by the presence of (unspec ... 7), which is generated by
5561 the various load_toc_* patterns. */
5567 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
5570 rtx pat
= PATTERN (insn
);
5573 if (GET_CODE (pat
) == PARALLEL
)
5574 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
5575 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == UNSPEC
5576 && XINT (XVECEXP (PATTERN (insn
), 0, i
), 1) == 7)
5583 create_TOC_reference(symbol
)
5586 return gen_rtx_PLUS (Pmode
,
5587 gen_rtx_REG (Pmode
, TOC_REGISTER
),
5588 gen_rtx_CONST (Pmode
,
5589 gen_rtx_MINUS (Pmode
, symbol
,
5590 gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (toc_label_name
)))));
5594 /* __throw will restore its own return address to be the same as the
5595 return address of the function that the throw is being made to.
5596 This is unfortunate, because we want to check the original
5597 return address to see if we need to restore the TOC.
5598 So we have to squirrel it away here.
5599 This is used only in compiling __throw and __rethrow.
5601 Most of this code should be removed by CSE. */
5602 static rtx insn_after_throw
;
5604 /* This does the saving... */
5606 rs6000_aix_emit_builtin_unwind_init ()
5609 rtx stack_top
= gen_reg_rtx (Pmode
);
5610 rtx opcode_addr
= gen_reg_rtx (Pmode
);
5612 insn_after_throw
= gen_reg_rtx (SImode
);
5614 mem
= gen_rtx_MEM (Pmode
, hard_frame_pointer_rtx
);
5615 emit_move_insn (stack_top
, mem
);
5617 mem
= gen_rtx_MEM (Pmode
,
5618 gen_rtx_PLUS (Pmode
, stack_top
,
5619 GEN_INT (2 * GET_MODE_SIZE (Pmode
))));
5620 emit_move_insn (opcode_addr
, mem
);
5621 emit_move_insn (insn_after_throw
, gen_rtx_MEM (SImode
, opcode_addr
));
5624 /* Emit insns to _restore_ the TOC register, at runtime (specifically in _eh.o).
5627 The idea is that on AIX, function calls look like this:
5628 bl somefunction-trampoline
5632 somefunction-trampoline:
5634 ... load function address in the count register ...
5636 or like this, if the linker determines that this is not a cross-module call
5637 and so the TOC need not be restored:
5640 or like this, if the compiler could determine that this is not a
5643 now, the tricky bit here is that register 2 is saved and restored
5644 by the _linker_, so we can't readily generate debugging information
5645 for it. So we need to go back up the call chain looking at the
5646 insns at return addresses to see which calls saved the TOC register
5647 and so see where it gets restored from.
5649 Oh, and all this gets done in RTL inside the eh_epilogue pattern,
5650 just before the actual epilogue.
5652 On the bright side, this incurs no space or time overhead unless an
5653 exception is thrown, except for the extra code in libgcc.a.
5655 The parameter STACKSIZE is a register containing (at runtime)
5656 the amount to be popped off the stack in addition to the stack frame
5657 of this routine (which will be __throw or __rethrow, and so is
5658 guaranteed to have a stack frame). */
5660 rs6000_emit_eh_toc_restore (stacksize
)
5664 rtx bottom_of_stack
= gen_reg_rtx (Pmode
);
5665 rtx tocompare
= gen_reg_rtx (SImode
);
5666 rtx opcode
= gen_reg_rtx (SImode
);
5667 rtx opcode_addr
= gen_reg_rtx (Pmode
);
5669 rtx loop_start
= gen_label_rtx ();
5670 rtx no_toc_restore_needed
= gen_label_rtx ();
5671 rtx loop_exit
= gen_label_rtx ();
5673 mem
= gen_rtx_MEM (Pmode
, hard_frame_pointer_rtx
);
5674 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5675 emit_move_insn (bottom_of_stack
, mem
);
5677 top_of_stack
= expand_binop (Pmode
, add_optab
,
5678 bottom_of_stack
, stacksize
,
5679 NULL_RTX
, 1, OPTAB_WIDEN
);
5681 emit_move_insn (tocompare
,
5682 GEN_INT (trunc_int_for_mode (TARGET_32BIT
5684 : 0xE8410028, SImode
)));
5686 if (insn_after_throw
== NULL_RTX
)
5688 emit_move_insn (opcode
, insn_after_throw
);
5690 emit_note (NULL
, NOTE_INSN_LOOP_BEG
);
5691 emit_label (loop_start
);
5693 do_compare_rtx_and_jump (opcode
, tocompare
, NE
, 1,
5694 SImode
, NULL_RTX
, 0, NULL_RTX
,
5695 no_toc_restore_needed
);
5697 mem
= gen_rtx_MEM (Pmode
,
5698 gen_rtx_PLUS (Pmode
, bottom_of_stack
,
5699 GEN_INT (5 * GET_MODE_SIZE (Pmode
))));
5700 emit_move_insn (gen_rtx_REG (Pmode
, 2), mem
);
5702 emit_label (no_toc_restore_needed
);
5703 do_compare_rtx_and_jump (top_of_stack
, bottom_of_stack
, EQ
, 1,
5704 Pmode
, NULL_RTX
, 0, NULL_RTX
,
5707 mem
= gen_rtx_MEM (Pmode
, bottom_of_stack
);
5708 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5709 emit_move_insn (bottom_of_stack
, mem
);
5711 mem
= gen_rtx_MEM (Pmode
,
5712 gen_rtx_PLUS (Pmode
, bottom_of_stack
,
5713 GEN_INT (2 * GET_MODE_SIZE (Pmode
))));
5714 emit_move_insn (opcode_addr
, mem
);
5715 emit_move_insn (opcode
, gen_rtx_MEM (SImode
, opcode_addr
));
5717 emit_note (NULL
, NOTE_INSN_LOOP_CONT
);
5718 emit_jump (loop_start
);
5719 emit_note (NULL
, NOTE_INSN_LOOP_END
);
5720 emit_label (loop_exit
);
5722 #endif /* TARGET_AIX */
5724 /* This ties together stack memory
5725 (MEM with an alias set of rs6000_sr_alias_set)
5726 and the change to the stack pointer. */
5728 rs6000_emit_stack_tie ()
5731 mem
= gen_rtx_MEM (BLKmode
, gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
));
5732 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5733 emit_insn (gen_stack_tie (mem
));
5736 /* Emit the correct code for allocating stack space, as insns.
5737 If COPY_R12, make sure a copy of the old frame is left in r12.
5738 The generated code may use hard register 0 as a temporary. */
5741 rs6000_emit_allocate_stack (size
, copy_r12
)
5746 rtx stack_reg
= gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
);
5747 rtx tmp_reg
= gen_rtx_REG (Pmode
, 0);
5748 rtx todec
= GEN_INT (-size
);
5750 if (current_function_limit_stack
)
5752 if (REG_P (stack_limit_rtx
)
5753 && REGNO (stack_limit_rtx
) > 1
5754 && REGNO (stack_limit_rtx
) <= 31)
5756 emit_insn (Pmode
== SImode
5757 ? gen_addsi3 (tmp_reg
,
5760 : gen_adddi3 (tmp_reg
,
5764 emit_insn (gen_cond_trap (LTU
, stack_reg
, tmp_reg
,
5767 else if (GET_CODE (stack_limit_rtx
) == SYMBOL_REF
5769 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
5771 rtx toload
= gen_rtx_CONST (VOIDmode
,
5772 gen_rtx_PLUS (Pmode
,
5776 emit_insn (gen_elf_high (tmp_reg
, toload
));
5777 emit_insn (gen_elf_low (tmp_reg
, tmp_reg
, toload
));
5778 emit_insn (gen_cond_trap (LTU
, stack_reg
, tmp_reg
,
5782 warning ("stack limit expression is not supported");
5785 if (copy_r12
|| ! TARGET_UPDATE
)
5786 emit_move_insn (gen_rtx_REG (Pmode
, 12), stack_reg
);
5792 /* Need a note here so that try_split doesn't get confused. */
5793 if (get_last_insn() == NULL_RTX
)
5794 emit_note (0, NOTE_INSN_DELETED
);
5795 insn
= emit_move_insn (tmp_reg
, todec
);
5796 try_split (PATTERN (insn
), insn
, 0);
5800 if (Pmode
== SImode
)
5801 insn
= emit_insn (gen_movsi_update (stack_reg
, stack_reg
,
5804 insn
= emit_insn (gen_movdi_update (stack_reg
, stack_reg
,
5809 if (Pmode
== SImode
)
5810 insn
= emit_insn (gen_addsi3 (stack_reg
, stack_reg
, todec
));
5812 insn
= emit_insn (gen_adddi3 (stack_reg
, stack_reg
, todec
));
5813 emit_move_insn (gen_rtx_MEM (Pmode
, stack_reg
),
5814 gen_rtx_REG (Pmode
, 12));
5817 RTX_FRAME_RELATED_P (insn
) = 1;
5819 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
5820 gen_rtx_SET (VOIDmode
, stack_reg
,
5821 gen_rtx_PLUS (Pmode
, stack_reg
,
5826 /* Add to 'insn' a note which is PATTERN (INSN) but with REG replaced with
5827 (plus:P (reg 1) VAL), and with REG2 replaced with RREG if REG2 is not
5829 It would be nice if dwarf2out_frame_debug_expr could deduce these
5830 equivalences by itself so it wasn't necessary to hold its hand so much. */
5833 rs6000_frame_related (insn
, reg
, val
, reg2
, rreg
)
5842 real
= copy_rtx (PATTERN (insn
));
5844 real
= replace_rtx (real
, reg
,
5845 gen_rtx_PLUS (Pmode
, gen_rtx_REG (Pmode
,
5846 STACK_POINTER_REGNUM
),
5849 /* We expect that 'real' is either a SET or a PARALLEL containing
5850 SETs (and possibly other stuff). In a PARALLEL, all the SETs
5851 are important so they all have to be marked RTX_FRAME_RELATED_P. */
5853 if (GET_CODE (real
) == SET
)
5857 temp
= simplify_rtx (SET_SRC (set
));
5859 SET_SRC (set
) = temp
;
5860 temp
= simplify_rtx (SET_DEST (set
));
5862 SET_DEST (set
) = temp
;
5863 if (GET_CODE (SET_DEST (set
)) == MEM
)
5865 temp
= simplify_rtx (XEXP (SET_DEST (set
), 0));
5867 XEXP (SET_DEST (set
), 0) = temp
;
5870 else if (GET_CODE (real
) == PARALLEL
)
5873 for (i
= 0; i
< XVECLEN (real
, 0); i
++)
5874 if (GET_CODE (XVECEXP (real
, 0, i
)) == SET
)
5876 rtx set
= XVECEXP (real
, 0, i
);
5878 temp
= simplify_rtx (SET_SRC (set
));
5880 SET_SRC (set
) = temp
;
5881 temp
= simplify_rtx (SET_DEST (set
));
5883 SET_DEST (set
) = temp
;
5884 if (GET_CODE (SET_DEST (set
)) == MEM
)
5886 temp
= simplify_rtx (XEXP (SET_DEST (set
), 0));
5888 XEXP (SET_DEST (set
), 0) = temp
;
5890 RTX_FRAME_RELATED_P (set
) = 1;
5896 if (reg2
!= NULL_RTX
)
5897 real
= replace_rtx (real
, reg2
, rreg
);
5899 RTX_FRAME_RELATED_P (insn
) = 1;
5900 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
5905 /* Emit function prologue as insns. */
5908 rs6000_emit_prologue ()
5910 rs6000_stack_t
*info
= rs6000_stack_info ();
5911 enum machine_mode reg_mode
= TARGET_POWERPC64
? DImode
: SImode
;
5912 int reg_size
= TARGET_POWERPC64
? 8 : 4;
5913 rtx sp_reg_rtx
= gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
);
5914 rtx frame_ptr_rtx
= gen_rtx_REG (Pmode
, 12);
5915 rtx frame_reg_rtx
= sp_reg_rtx
;
5916 rtx cr_save_rtx
= NULL
;
5918 int saving_FPRs_inline
;
5919 int using_store_multiple
;
5920 HOST_WIDE_INT sp_offset
= 0;
5922 using_store_multiple
= (TARGET_MULTIPLE
&& ! TARGET_POWERPC64
5923 && info
->first_gp_reg_save
< 31);
5924 saving_FPRs_inline
= (info
->first_fp_reg_save
== 64
5925 || FP_SAVE_INLINE (info
->first_fp_reg_save
));
5927 /* For V.4, update stack before we do any saving and set back pointer. */
5928 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
5930 if (info
->total_size
< 32767)
5931 sp_offset
= info
->total_size
;
5933 frame_reg_rtx
= frame_ptr_rtx
;
5934 rs6000_emit_allocate_stack (info
->total_size
,
5935 (frame_reg_rtx
!= sp_reg_rtx
5938 || info
->first_fp_reg_save
< 64
5939 || info
->first_gp_reg_save
< 32
5941 if (frame_reg_rtx
!= sp_reg_rtx
)
5942 rs6000_emit_stack_tie ();
5945 /* If we use the link register, get it into r0. */
5946 if (info
->lr_save_p
)
5947 emit_move_insn (gen_rtx_REG (Pmode
, 0),
5948 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5950 /* If we need to save CR, put it into r12. */
5951 if (info
->cr_save_p
&& frame_reg_rtx
!= frame_ptr_rtx
)
5953 cr_save_rtx
= gen_rtx_REG (SImode
, 12);
5954 emit_insn (gen_movesi_from_cr (cr_save_rtx
));
5957 /* Do any required saving of fpr's. If only one or two to save, do it
5958 ourself. Otherwise, call function. */
5959 if (saving_FPRs_inline
)
5962 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
5963 if ((regs_ever_live
[info
->first_fp_reg_save
+i
]
5964 && ! call_used_regs
[info
->first_fp_reg_save
+i
]))
5967 reg
= gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
);
5968 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5969 GEN_INT (info
->fp_save_offset
5972 mem
= gen_rtx_MEM (DFmode
, addr
);
5973 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5975 insn
= emit_move_insn (mem
, reg
);
5976 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5977 NULL_RTX
, NULL_RTX
);
5980 else if (info
->first_fp_reg_save
!= 64)
5984 const char *alloc_rname
;
5986 p
= rtvec_alloc (2 + 64 - info
->first_fp_reg_save
);
5988 RTVEC_ELT (p
, 0) = gen_rtx_CLOBBER (VOIDmode
,
5990 LINK_REGISTER_REGNUM
));
5991 sprintf (rname
, "%s%d%s", SAVE_FP_PREFIX
,
5992 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
5993 alloc_rname
= ggc_strdup (rname
);
5994 RTVEC_ELT (p
, 1) = gen_rtx_USE (VOIDmode
,
5995 gen_rtx_SYMBOL_REF (Pmode
,
5997 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
6000 reg
= gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
);
6001 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6002 GEN_INT (info
->fp_save_offset
6003 + sp_offset
+ 8*i
));
6004 mem
= gen_rtx_MEM (DFmode
, addr
);
6005 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6007 RTVEC_ELT (p
, i
+ 2) = gen_rtx_SET (VOIDmode
, mem
, reg
);
6009 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6010 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6011 NULL_RTX
, NULL_RTX
);
6014 /* Save GPRs. This is done as a PARALLEL if we are using
6015 the store-multiple instructions. */
6016 if (using_store_multiple
)
6020 p
= rtvec_alloc (32 - info
->first_gp_reg_save
);
6021 dwarfp
= rtvec_alloc (32 - info
->first_gp_reg_save
);
6022 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6025 reg
= gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
);
6026 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6027 GEN_INT (info
->gp_save_offset
6030 mem
= gen_rtx_MEM (reg_mode
, addr
);
6031 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6033 RTVEC_ELT (p
, i
) = gen_rtx_SET (VOIDmode
, mem
, reg
);
6035 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6036 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6037 NULL_RTX
, NULL_RTX
);
6042 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6043 if ((regs_ever_live
[info
->first_gp_reg_save
+i
]
6044 && ! call_used_regs
[info
->first_gp_reg_save
+i
])
6045 || (i
+info
->first_gp_reg_save
== PIC_OFFSET_TABLE_REGNUM
6046 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6048 || (DEFAULT_ABI
== ABI_DARWIN
6052 reg
= gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
);
6053 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6054 GEN_INT (info
->gp_save_offset
6057 mem
= gen_rtx_MEM (reg_mode
, addr
);
6058 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6060 insn
= emit_move_insn (mem
, reg
);
6061 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6062 NULL_RTX
, NULL_RTX
);
6066 /* ??? There's no need to emit actual instructions here, but it's the
6067 easiest way to get the frame unwind information emitted. */
6068 if (current_function_calls_eh_return
)
6070 unsigned int i
, regno
;
6076 regno
= EH_RETURN_DATA_REGNO (i
);
6077 if (regno
== INVALID_REGNUM
)
6080 reg
= gen_rtx_REG (reg_mode
, regno
);
6081 addr
= plus_constant (frame_reg_rtx
,
6082 info
->ehrd_offset
+ sp_offset
6083 + reg_size
* (int) i
);
6084 mem
= gen_rtx_MEM (reg_mode
, addr
);
6085 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6087 insn
= emit_move_insn (mem
, reg
);
6088 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6089 NULL_RTX
, NULL_RTX
);
6093 /* Save lr if we used it. */
6094 if (info
->lr_save_p
)
6096 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6097 GEN_INT (info
->lr_save_offset
+ sp_offset
));
6098 rtx reg
= gen_rtx_REG (Pmode
, 0);
6099 rtx mem
= gen_rtx_MEM (Pmode
, addr
);
6100 /* This should not be of rs6000_sr_alias_set, because of
6101 __builtin_return_address. */
6103 insn
= emit_move_insn (mem
, reg
);
6104 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6105 reg
, gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
6108 /* Save CR if we use any that must be preserved. */
6109 if (info
->cr_save_p
)
6111 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6112 GEN_INT (info
->cr_save_offset
+ sp_offset
));
6113 rtx mem
= gen_rtx_MEM (SImode
, addr
);
6114 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6116 /* If r12 was used to hold the original sp, copy cr into r0 now
6118 if (REGNO (frame_reg_rtx
) == 12)
6120 cr_save_rtx
= gen_rtx_REG (SImode
, 0);
6121 emit_insn (gen_movesi_from_cr (cr_save_rtx
));
6123 insn
= emit_move_insn (mem
, cr_save_rtx
);
6125 /* Now, there's no way that dwarf2out_frame_debug_expr is going
6126 to understand '(unspec:SI [(reg:CC 68) ...] 19)'. But that's
6127 OK. All we have to do is specify that _one_ condition code
6128 register is saved in this stack slot. The thrower's epilogue
6129 will then restore all the call-saved registers. */
6130 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
6131 cr_save_rtx
, gen_rtx_REG (SImode
, CR0_REGNO
));
6134 /* Update stack and set back pointer unless this is V.4,
6135 for which it was done previously. */
6136 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
6137 rs6000_emit_allocate_stack (info
->total_size
, FALSE
);
6139 /* Set frame pointer, if needed. */
6140 if (frame_pointer_needed
)
6142 insn
= emit_move_insn (gen_rtx_REG (reg_mode
, FRAME_POINTER_REGNUM
),
6144 RTX_FRAME_RELATED_P (insn
) = 1;
6147 /* If we are using PIC_OFFSET_TABLE_REGNUM, we need to set it up. */
6148 if ((TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
6149 || ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6150 && flag_pic
== 1 && regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
]))
6152 /* If emit_load_toc_table will use the link register, we need to save
6153 it. We use R11 for this purpose because emit_load_toc_table
6154 can use register 0. This allows us to use a plain 'blr' to return
6155 from the procedure more often. */
6156 int save_LR_around_toc_setup
= (TARGET_ELF
&& flag_pic
!= 0
6157 && ! info
->lr_save_p
6158 && EXIT_BLOCK_PTR
->pred
!= NULL
);
6159 if (save_LR_around_toc_setup
)
6160 emit_move_insn (gen_rtx_REG (Pmode
, 11),
6161 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
6163 rs6000_emit_load_toc_table (TRUE
);
6165 if (save_LR_around_toc_setup
)
6166 emit_move_insn (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
6167 gen_rtx_REG (Pmode
, 11));
6170 if (DEFAULT_ABI
== ABI_DARWIN
6171 && flag_pic
&& current_function_uses_pic_offset_table
)
6173 rtx dest
= gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
);
6175 rs6000_maybe_dead (emit_insn (gen_load_macho_picbase (dest
)));
6178 emit_move_insn (gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
),
6179 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)));
6184 /* Write function prologue. */
6186 rs6000_output_function_prologue (file
, size
)
6188 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
6190 rs6000_stack_t
*info
= rs6000_stack_info ();
6192 if (TARGET_DEBUG_STACK
)
6193 debug_stack_info (info
);
6195 /* Write .extern for any function we will call to save and restore fp
6197 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
6198 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
6199 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
6200 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
6202 /* Write .extern for AIX common mode routines, if needed. */
6203 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
6205 fputs ("\t.extern __mulh\n", file
);
6206 fputs ("\t.extern __mull\n", file
);
6207 fputs ("\t.extern __divss\n", file
);
6208 fputs ("\t.extern __divus\n", file
);
6209 fputs ("\t.extern __quoss\n", file
);
6210 fputs ("\t.extern __quous\n", file
);
6211 common_mode_defined
= 1;
6214 if (! HAVE_prologue
)
6218 /* A NOTE_INSN_DELETED is supposed to be at the start
6219 and end of the "toplevel" insn chain. */
6220 emit_note (0, NOTE_INSN_DELETED
);
6221 rs6000_emit_prologue ();
6222 emit_note (0, NOTE_INSN_DELETED
);
6224 if (TARGET_DEBUG_STACK
)
6225 debug_rtx_list (get_insns(), 100);
6226 final (get_insns(), file
, FALSE
, FALSE
);
6230 rs6000_pic_labelno
++;
6233 /* Emit function epilogue as insns.
6235 At present, dwarf2out_frame_debug_expr doesn't understand
6236 register restores, so we don't bother setting RTX_FRAME_RELATED_P
6237 anywhere in the epilogue. Most of the insns below would in any case
6238 need special notes to explain where r11 is in relation to the stack. */
6241 rs6000_emit_epilogue (sibcall
)
6244 rs6000_stack_t
*info
;
6245 int restoring_FPRs_inline
;
6246 int using_load_multiple
;
6247 int using_mfcr_multiple
;
6248 int use_backchain_to_restore_sp
;
6250 rtx sp_reg_rtx
= gen_rtx_REG (Pmode
, 1);
6251 rtx frame_reg_rtx
= sp_reg_rtx
;
6252 enum machine_mode reg_mode
= TARGET_POWERPC64
? DImode
: SImode
;
6253 int reg_size
= TARGET_POWERPC64
? 8 : 4;
6256 info
= rs6000_stack_info ();
6257 using_load_multiple
= (TARGET_MULTIPLE
&& ! TARGET_POWERPC64
6258 && info
->first_gp_reg_save
< 31);
6259 restoring_FPRs_inline
= (sibcall
6260 || current_function_calls_eh_return
6261 || info
->first_fp_reg_save
== 64
6262 || FP_SAVE_INLINE (info
->first_fp_reg_save
));
6263 use_backchain_to_restore_sp
= (frame_pointer_needed
6264 || current_function_calls_alloca
6265 || info
->total_size
> 32767);
6266 using_mfcr_multiple
= (rs6000_cpu
== PROCESSOR_PPC601
6267 || rs6000_cpu
== PROCESSOR_PPC603
6268 || rs6000_cpu
== PROCESSOR_PPC750
6271 /* If we have a frame pointer, a call to alloca, or a large stack
6272 frame, restore the old stack pointer using the backchain. Otherwise,
6273 we know what size to update it with. */
6274 if (use_backchain_to_restore_sp
)
6276 /* Under V.4, don't reset the stack pointer until after we're done
6277 loading the saved registers. */
6278 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6279 frame_reg_rtx
= gen_rtx_REG (Pmode
, 11);
6281 emit_move_insn (frame_reg_rtx
,
6282 gen_rtx_MEM (Pmode
, sp_reg_rtx
));
6285 else if (info
->push_p
)
6287 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6288 sp_offset
= info
->total_size
;
6291 emit_insn (TARGET_32BIT
6292 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
,
6293 GEN_INT (info
->total_size
))
6294 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
,
6295 GEN_INT (info
->total_size
)));
6299 /* Get the old lr if we saved it. */
6300 if (info
->lr_save_p
)
6302 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6303 GEN_INT (info
->lr_save_offset
+ sp_offset
));
6304 rtx mem
= gen_rtx_MEM (Pmode
, addr
);
6305 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6307 emit_move_insn (gen_rtx_REG (Pmode
, 0), mem
);
6310 /* Get the old cr if we saved it. */
6311 if (info
->cr_save_p
)
6313 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6314 GEN_INT (info
->cr_save_offset
+ sp_offset
));
6315 rtx mem
= gen_rtx_MEM (SImode
, addr
);
6316 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6318 emit_move_insn (gen_rtx_REG (SImode
, 12), mem
);
6321 /* Set LR here to try to overlap restores below. */
6322 if (info
->lr_save_p
)
6323 emit_move_insn (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
6324 gen_rtx_REG (Pmode
, 0));
6326 /* Load exception handler data registers, if needed. */
6327 if (current_function_calls_eh_return
)
6329 unsigned int i
, regno
;
6335 regno
= EH_RETURN_DATA_REGNO (i
);
6336 if (regno
== INVALID_REGNUM
)
6339 addr
= plus_constant (frame_reg_rtx
,
6340 info
->ehrd_offset
+ sp_offset
6341 + reg_size
* (int) i
);
6342 mem
= gen_rtx_MEM (reg_mode
, addr
);
6343 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6345 emit_move_insn (gen_rtx_REG (reg_mode
, regno
), mem
);
6349 /* Restore GPRs. This is done as a PARALLEL if we are using
6350 the load-multiple instructions. */
6351 if (using_load_multiple
)
6354 p
= rtvec_alloc (32 - info
->first_gp_reg_save
);
6355 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6357 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6358 GEN_INT (info
->gp_save_offset
6361 rtx mem
= gen_rtx_MEM (reg_mode
, addr
);
6362 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6365 gen_rtx_SET (VOIDmode
,
6366 gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
),
6369 emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6372 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6373 if ((regs_ever_live
[info
->first_gp_reg_save
+i
]
6374 && ! call_used_regs
[info
->first_gp_reg_save
+i
])
6375 || (i
+info
->first_gp_reg_save
== PIC_OFFSET_TABLE_REGNUM
6376 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6378 || (DEFAULT_ABI
== ABI_DARWIN
6381 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6382 GEN_INT (info
->gp_save_offset
6385 rtx mem
= gen_rtx_MEM (reg_mode
, addr
);
6386 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6388 emit_move_insn (gen_rtx_REG (reg_mode
,
6389 info
->first_gp_reg_save
+ i
),
6393 /* Restore fpr's if we need to do it without calling a function. */
6394 if (restoring_FPRs_inline
)
6395 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
6396 if ((regs_ever_live
[info
->first_fp_reg_save
+i
]
6397 && ! call_used_regs
[info
->first_fp_reg_save
+i
]))
6400 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6401 GEN_INT (info
->fp_save_offset
6404 mem
= gen_rtx_MEM (DFmode
, addr
);
6405 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6407 emit_move_insn (gen_rtx_REG (DFmode
,
6408 info
->first_fp_reg_save
+ i
),
6412 /* If we saved cr, restore it here. Just those that were used. */
6413 if (info
->cr_save_p
)
6415 rtx r12_rtx
= gen_rtx_REG (SImode
, 12);
6418 if (using_mfcr_multiple
)
6420 for (i
= 0; i
< 8; i
++)
6421 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6427 if (using_mfcr_multiple
&& count
> 1)
6432 p
= rtvec_alloc (count
);
6435 for (i
= 0; i
< 8; i
++)
6436 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6438 rtvec r
= rtvec_alloc (2);
6439 RTVEC_ELT (r
, 0) = r12_rtx
;
6440 RTVEC_ELT (r
, 1) = GEN_INT (1 << (7-i
));
6441 RTVEC_ELT (p
, ndx
) =
6442 gen_rtx_SET (VOIDmode
, gen_rtx_REG (CCmode
, CR0_REGNO
+i
),
6443 gen_rtx_UNSPEC (CCmode
, r
, 20));
6446 emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6451 for (i
= 0; i
< 8; i
++)
6452 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6454 emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode
,
6460 /* If this is V.4, unwind the stack pointer after all of the loads
6461 have been done. We need to emit a block here so that sched
6462 doesn't decide to move the sp change before the register restores
6463 (which may not have any obvious dependency on the stack). This
6464 doesn't hurt performance, because there is no scheduling that can
6465 be done after this point. */
6466 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6468 if (frame_reg_rtx
!= sp_reg_rtx
)
6469 rs6000_emit_stack_tie ();
6471 if (use_backchain_to_restore_sp
)
6473 emit_move_insn (sp_reg_rtx
, frame_reg_rtx
);
6475 else if (sp_offset
!= 0)
6477 emit_insn (Pmode
== SImode
6478 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
,
6479 GEN_INT (sp_offset
))
6480 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
,
6481 GEN_INT (sp_offset
)));
6485 if (current_function_calls_eh_return
)
6487 rtx sa
= EH_RETURN_STACKADJ_RTX
;
6488 emit_insn (Pmode
== SImode
6489 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
, sa
)
6490 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
, sa
));
6496 if (! restoring_FPRs_inline
)
6497 p
= rtvec_alloc (3 + 64 - info
->first_fp_reg_save
);
6499 p
= rtvec_alloc (2);
6501 RTVEC_ELT (p
, 0) = gen_rtx_RETURN (VOIDmode
);
6502 RTVEC_ELT (p
, 1) = gen_rtx_USE (VOIDmode
,
6504 LINK_REGISTER_REGNUM
));
6506 /* If we have to restore more than two FP registers, branch to the
6507 restore function. It will return to our caller. */
6508 if (! restoring_FPRs_inline
)
6512 const char *alloc_rname
;
6514 sprintf (rname
, "%s%d%s", RESTORE_FP_PREFIX
,
6515 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
6516 alloc_rname
= ggc_strdup (rname
);
6517 RTVEC_ELT (p
, 2) = gen_rtx_USE (VOIDmode
,
6518 gen_rtx_SYMBOL_REF (Pmode
,
6521 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
6524 addr
= gen_rtx_PLUS (Pmode
, sp_reg_rtx
,
6525 GEN_INT (info
->fp_save_offset
+ 8*i
));
6526 mem
= gen_rtx_MEM (DFmode
, addr
);
6527 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6529 RTVEC_ELT (p
, i
+3) =
6530 gen_rtx_SET (VOIDmode
,
6531 gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
),
6536 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6540 /* Write function epilogue. */
6543 rs6000_output_function_epilogue (file
, size
)
6545 HOST_WIDE_INT size ATTRIBUTE_UNUSED
;
6547 rs6000_stack_t
*info
= rs6000_stack_info ();
6549 if (! HAVE_epilogue
)
6551 rtx insn
= get_last_insn ();
6552 /* If the last insn was a BARRIER, we don't have to write anything except
6554 if (GET_CODE (insn
) == NOTE
)
6555 insn
= prev_nonnote_insn (insn
);
6556 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
6558 /* This is slightly ugly, but at least we don't have two
6559 copies of the epilogue-emitting code. */
6562 /* A NOTE_INSN_DELETED is supposed to be at the start
6563 and end of the "toplevel" insn chain. */
6564 emit_note (0, NOTE_INSN_DELETED
);
6565 rs6000_emit_epilogue (FALSE
);
6566 emit_note (0, NOTE_INSN_DELETED
);
6568 if (TARGET_DEBUG_STACK
)
6569 debug_rtx_list (get_insns(), 100);
6570 final (get_insns(), file
, FALSE
, FALSE
);
6575 /* Output a traceback table here. See /usr/include/sys/debug.h for info
6578 We don't output a traceback table if -finhibit-size-directive was
6579 used. The documentation for -finhibit-size-directive reads
6580 ``don't output a @code{.size} assembler directive, or anything
6581 else that would cause trouble if the function is split in the
6582 middle, and the two halves are placed at locations far apart in
6583 memory.'' The traceback table has this property, since it
6584 includes the offset from the start of the function to the
6585 traceback table itself.
6587 System V.4 Powerpc's (and the embedded ABI derived from it) use a
6588 different traceback table. */
6589 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
6591 const char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
6592 int fixed_parms
, float_parms
, parm_info
;
6595 while (*fname
== '.') /* V.4 encodes . in the name */
6598 /* Need label immediately before tbtab, so we can compute its offset
6599 from the function start. */
6602 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
6603 ASM_OUTPUT_LABEL (file
, fname
);
6605 /* The .tbtab pseudo-op can only be used for the first eight
6606 expressions, since it can't handle the possibly variable
6607 length fields that follow. However, if you omit the optional
6608 fields, the assembler outputs zeros for all optional fields
6609 anyways, giving each variable length field is minimum length
6610 (as defined in sys/debug.h). Thus we can not use the .tbtab
6611 pseudo-op at all. */
6613 /* An all-zero word flags the start of the tbtab, for debuggers
6614 that have to find it by searching forward from the entry
6615 point or from the current pc. */
6616 fputs ("\t.long 0\n", file
);
6618 /* Tbtab format type. Use format type 0. */
6619 fputs ("\t.byte 0,", file
);
6621 /* Language type. Unfortunately, there doesn't seem to be any
6622 official way to get this info, so we use language_string. C
6623 is 0. C++ is 9. No number defined for Obj-C, so use the
6624 value for C for now. There is no official value for Java,
6625 although IBM appears to be using 13. There is no official value
6626 for Chill, so we've choosen 44 pseudo-randomly. */
6627 if (! strcmp (language_string
, "GNU C")
6628 || ! strcmp (language_string
, "GNU Objective-C"))
6630 else if (! strcmp (language_string
, "GNU F77"))
6632 else if (! strcmp (language_string
, "GNU Ada"))
6634 else if (! strcmp (language_string
, "GNU Pascal"))
6636 else if (! strcmp (language_string
, "GNU C++"))
6638 else if (! strcmp (language_string
, "GNU Java"))
6640 else if (! strcmp (language_string
, "GNU CHILL"))
6644 fprintf (file
, "%d,", i
);
6646 /* 8 single bit fields: global linkage (not set for C extern linkage,
6647 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
6648 from start of procedure stored in tbtab, internal function, function
6649 has controlled storage, function has no toc, function uses fp,
6650 function logs/aborts fp operations. */
6651 /* Assume that fp operations are used if any fp reg must be saved. */
6652 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
6654 /* 6 bitfields: function is interrupt handler, name present in
6655 proc table, function calls alloca, on condition directives
6656 (controls stack walks, 3 bits), saves condition reg, saves
6658 /* The `function calls alloca' bit seems to be set whenever reg 31 is
6659 set up as a frame pointer, even when there is no alloca call. */
6660 fprintf (file
, "%d,",
6661 ((1 << 6) | (frame_pointer_needed
<< 5)
6662 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
6664 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
6666 fprintf (file
, "%d,",
6667 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
6669 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
6670 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
6673 /* Compute the parameter info from the function decl argument
6676 int next_parm_info_bit
;
6678 next_parm_info_bit
= 31;
6683 for (decl
= DECL_ARGUMENTS (current_function_decl
);
6684 decl
; decl
= TREE_CHAIN (decl
))
6686 rtx parameter
= DECL_INCOMING_RTL (decl
);
6687 enum machine_mode mode
= GET_MODE (parameter
);
6689 if (GET_CODE (parameter
) == REG
)
6691 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6699 else if (mode
== DFmode
)
6704 /* If only one bit will fit, don't or in this entry. */
6705 if (next_parm_info_bit
> 0)
6706 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
6707 next_parm_info_bit
-= 2;
6711 fixed_parms
+= ((GET_MODE_SIZE (mode
)
6712 + (UNITS_PER_WORD
- 1))
6714 next_parm_info_bit
-= 1;
6720 /* Number of fixed point parameters. */
6721 /* This is actually the number of words of fixed point parameters; thus
6722 an 8 byte struct counts as 2; and thus the maximum value is 8. */
6723 fprintf (file
, "%d,", fixed_parms
);
6725 /* 2 bitfields: number of floating point parameters (7 bits), parameters
6727 /* This is actually the number of fp registers that hold parameters;
6728 and thus the maximum value is 13. */
6729 /* Set parameters on stack bit if parameters are not in their original
6730 registers, regardless of whether they are on the stack? Xlc
6731 seems to set the bit when not optimizing. */
6732 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
6734 /* Optional fields follow. Some are variable length. */
6736 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
6738 /* There is an entry for each parameter in a register, in the order that
6739 they occur in the parameter list. Any intervening arguments on the
6740 stack are ignored. If the list overflows a long (max possible length
6741 34 bits) then completely leave off all elements that don't fit. */
6742 /* Only emit this long if there was at least one parameter. */
6743 if (fixed_parms
|| float_parms
)
6744 fprintf (file
, "\t.long %d\n", parm_info
);
6746 /* Offset from start of code to tb table. */
6747 fputs ("\t.long ", file
);
6748 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
6750 RS6000_OUTPUT_BASENAME (file
, fname
);
6752 assemble_name (file
, fname
);
6756 RS6000_OUTPUT_BASENAME (file
, fname
);
6758 assemble_name (file
, fname
);
6762 /* Interrupt handler mask. */
6763 /* Omit this long, since we never set the interrupt handler bit
6766 /* Number of CTL (controlled storage) anchors. */
6767 /* Omit this long, since the has_ctl bit is never set above. */
6769 /* Displacement into stack of each CTL anchor. */
6770 /* Omit this list of longs, because there are no CTL anchors. */
6772 /* Length of function name. */
6773 fprintf (file
, "\t.short %d\n", (int) strlen (fname
));
6775 /* Function name. */
6776 assemble_string (fname
, strlen (fname
));
6778 /* Register for alloca automatic storage; this is always reg 31.
6779 Only emit this if the alloca bit was set above. */
6780 if (frame_pointer_needed
)
6781 fputs ("\t.byte 31\n", file
);
6785 /* A C compound statement that outputs the assembler code for a thunk function,
6786 used to implement C++ virtual function calls with multiple inheritance. The
6787 thunk acts as a wrapper around a virtual function, adjusting the implicit
6788 object parameter before handing control off to the real function.
6790 First, emit code to add the integer DELTA to the location that contains the
6791 incoming first argument. Assume that this argument contains a pointer, and
6792 is the one used to pass the `this' pointer in C++. This is the incoming
6793 argument *before* the function prologue, e.g. `%o0' on a sparc. The
6794 addition must preserve the values of all other incoming arguments.
6796 After the addition, emit code to jump to FUNCTION, which is a
6797 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch
6798 the return address. Hence returning from FUNCTION will return to whoever
6799 called the current `thunk'.
6801 The effect must be as if FUNCTION had been called directly with the adjusted
6802 first argument. This macro is responsible for emitting all of the code for
6803 a thunk function; output_function_prologue() and output_function_epilogue()
6806 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been
6807 extracted from it.) It might possibly be useful on some targets, but
6810 If you do not define this macro, the target-independent code in the C++
6811 frontend will generate a less efficient heavyweight thunk that calls
6812 FUNCTION instead of jumping to it. The generic approach does not support
6816 output_mi_thunk (file
, thunk_fndecl
, delta
, function
)
6818 tree thunk_fndecl ATTRIBUTE_UNUSED
;
6822 const char *this_reg
= reg_names
[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function
))) ? 4 : 3 ];
6825 const char *r0
= reg_names
[0];
6826 const char *toc
= reg_names
[2];
6827 const char *schain
= reg_names
[11];
6828 const char *r12
= reg_names
[12];
6830 static int labelno
= 0;
6832 /* Small constants that can be done by one add instruction */
6833 if (delta
>= -32768 && delta
<= 32767)
6835 if (! TARGET_NEW_MNEMONICS
)
6836 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta
, this_reg
);
6838 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta
);
6841 /* Large constants that can be done by one addis instruction */
6842 else if ((delta
& 0xffff) == 0 && num_insns_constant_wide (delta
) == 1)
6843 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
6846 /* 32-bit constants that can be done by an add and addis instruction. */
6847 else if (TARGET_32BIT
|| num_insns_constant_wide (delta
) == 1)
6849 /* Break into two pieces, propagating the sign bit from the low word to
6851 int delta_high
= delta
>> 16;
6852 int delta_low
= delta
& 0xffff;
6853 if ((delta_low
& 0x8000) != 0)
6856 delta_low
= (delta_low
^ 0x8000) - 0x8000; /* sign extend */
6859 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
6862 if (! TARGET_NEW_MNEMONICS
)
6863 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta_low
, this_reg
);
6865 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta_low
);
6868 /* 64-bit constants, fixme */
6872 /* Get the prefix in front of the names. */
6873 switch (DEFAULT_ABI
)
6883 case ABI_AIX_NODESC
:
6889 /* If the function is compiled in this module, jump to it directly.
6890 Otherwise, load up its address and jump to it. */
6892 fname
= XSTR (XEXP (DECL_RTL (function
), 0), 0);
6894 if (current_file_function_operand (XEXP (DECL_RTL (function
), 0), VOIDmode
)
6895 && ! lookup_attribute ("longcall",
6896 TYPE_ATTRIBUTES (TREE_TYPE (function
))))
6898 fprintf (file
, "\tb %s", prefix
);
6899 assemble_name (file
, fname
);
6900 if (DEFAULT_ABI
== ABI_V4
&& flag_pic
) fputs ("@local", file
);
6906 switch (DEFAULT_ABI
)
6912 /* Set up a TOC entry for the function. */
6913 ASM_GENERATE_INTERNAL_LABEL (buf
, "Lthunk", labelno
);
6915 ASM_OUTPUT_INTERNAL_LABEL (file
, "Lthunk", labelno
);
6918 /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since
6919 there will be only one TOC entry for this function. */
6920 fputs ("\t.tc\t", file
);
6921 assemble_name (file
, buf
);
6922 fputs ("[TC],", file
);
6923 assemble_name (file
, buf
);
6926 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz} %s," : "\tld %s", r12
);
6927 assemble_name (file
, buf
);
6928 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
6930 (TARGET_32BIT
) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n",
6934 (TARGET_32BIT
) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n",
6937 asm_fprintf (file
, "\tmtctr %s\n", r0
);
6939 (TARGET_32BIT
) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n",
6942 asm_fprintf (file
, "\tbctr\n");
6945 case ABI_AIX_NODESC
:
6948 fprintf (file
, "\tb %s", prefix
);
6949 assemble_name (file
, fname
);
6950 if (flag_pic
) fputs ("@plt", file
);
6956 fprintf (file
, "\tb %s", prefix
);
6957 if (flag_pic
&& !machopic_name_defined_p (fname
))
6958 assemble_name (file
, machopic_stub_name (fname
));
6960 assemble_name (file
, fname
);
6969 /* A quick summary of the various types of 'constant-pool tables'
6972 Target Flags Name One table per
6973 AIX (none) AIX TOC object file
6974 AIX -mfull-toc AIX TOC object file
6975 AIX -mminimal-toc AIX minimal TOC translation unit
6976 SVR4/EABI (none) SVR4 SDATA object file
6977 SVR4/EABI -fpic SVR4 pic object file
6978 SVR4/EABI -fPIC SVR4 PIC translation unit
6979 SVR4/EABI -mrelocatable EABI TOC function
6980 SVR4/EABI -maix AIX TOC object file
6981 SVR4/EABI -maix -mminimal-toc
6982 AIX minimal TOC translation unit
6984 Name Reg. Set by entries contains:
6985 made by addrs? fp? sum?
6987 AIX TOC 2 crt0 as Y option option
6988 AIX minimal TOC 30 prolog gcc Y Y option
6989 SVR4 SDATA 13 crt0 gcc N Y N
6990 SVR4 pic 30 prolog ld Y not yet N
6991 SVR4 PIC 30 prolog gcc Y option option
6992 EABI TOC 30 prolog gcc Y option option
6996 /* Hash table stuff for keeping track of TOC entries. */
6998 struct toc_hash_struct
7000 /* `key' will satisfy CONSTANT_P; in fact, it will satisfy
7001 ASM_OUTPUT_SPECIAL_POOL_ENTRY_P. */
7003 enum machine_mode key_mode
;
7007 static htab_t toc_hash_table
;
7009 /* Hash functions for the hash table. */
7012 rs6000_hash_constant (k
)
7015 unsigned result
= (GET_CODE (k
) << 3) ^ GET_MODE (k
);
7016 const char *format
= GET_RTX_FORMAT (GET_CODE (k
));
7017 int flen
= strlen (format
);
7020 if (GET_CODE (k
) == LABEL_REF
)
7021 return result
* 1231 + X0INT (XEXP (k
, 0), 3);
7023 if (GET_CODE (k
) == CONST_DOUBLE
)
7025 else if (GET_CODE (k
) == CODE_LABEL
)
7030 for (; fidx
< flen
; fidx
++)
7031 switch (format
[fidx
])
7036 const char *str
= XSTR (k
, fidx
);
7038 result
= result
* 613 + len
;
7039 for (i
= 0; i
< len
; i
++)
7040 result
= result
* 613 + (unsigned) str
[i
];
7045 result
= result
* 1231 + rs6000_hash_constant (XEXP (k
, fidx
));
7049 result
= result
* 613 + (unsigned) XINT (k
, fidx
);
7052 if (sizeof (unsigned) >= sizeof (HOST_WIDE_INT
))
7053 result
= result
* 613 + (unsigned) XWINT (k
, fidx
);
7057 for (i
= 0; i
< sizeof(HOST_WIDE_INT
)/sizeof(unsigned); i
++)
7058 result
= result
* 613 + (unsigned) (XWINT (k
, fidx
)
7069 toc_hash_function (hash_entry
)
7070 const void * hash_entry
;
7072 const struct toc_hash_struct
*thc
=
7073 (const struct toc_hash_struct
*) hash_entry
;
7074 return rs6000_hash_constant (thc
->key
) ^ thc
->key_mode
;
7077 /* Compare H1 and H2 for equivalence. */
7080 toc_hash_eq (h1
, h2
)
7084 rtx r1
= ((const struct toc_hash_struct
*) h1
)->key
;
7085 rtx r2
= ((const struct toc_hash_struct
*) h2
)->key
;
7087 if (((const struct toc_hash_struct
*) h1
)->key_mode
7088 != ((const struct toc_hash_struct
*) h2
)->key_mode
)
7091 /* Gotcha: One of these const_doubles will be in memory.
7092 The other may be on the constant-pool chain.
7093 So rtx_equal_p will think they are different... */
7096 if (GET_CODE (r1
) != GET_CODE (r2
)
7097 || GET_MODE (r1
) != GET_MODE (r2
))
7099 if (GET_CODE (r1
) == CONST_DOUBLE
)
7101 int format_len
= strlen (GET_RTX_FORMAT (CONST_DOUBLE
));
7103 for (i
= 2; i
< format_len
; i
++)
7104 if (XWINT (r1
, i
) != XWINT (r2
, i
))
7109 else if (GET_CODE (r1
) == LABEL_REF
)
7110 return (CODE_LABEL_NUMBER (XEXP (r1
, 0))
7111 == CODE_LABEL_NUMBER (XEXP (r2
, 0)));
7113 return rtx_equal_p (r1
, r2
);
7116 /* Mark the hash table-entry HASH_ENTRY. */
7119 toc_hash_mark_entry (hash_slot
, unused
)
7121 void * unused ATTRIBUTE_UNUSED
;
7123 const struct toc_hash_struct
* hash_entry
=
7124 *(const struct toc_hash_struct
**) hash_slot
;
7125 rtx r
= hash_entry
->key
;
7126 ggc_set_mark (hash_entry
);
7127 /* For CODE_LABELS, we don't want to drag in the whole insn chain... */
7128 if (GET_CODE (r
) == LABEL_REF
)
7131 ggc_set_mark (XEXP (r
, 0));
7138 /* Mark all the elements of the TOC hash-table *HT. */
7141 toc_hash_mark_table (vht
)
7146 htab_traverse (*ht
, toc_hash_mark_entry
, (void *)0);
7149 /* These are the names given by the C++ front-end to vtables, and
7150 vtable-like objects. Ideally, this logic should not be here;
7151 instead, there should be some programmatic way of inquiring as
7152 to whether or not an object is a vtable. */
7154 #define VTABLE_NAME_P(NAME) \
7155 (strncmp ("_vt.", name, strlen("_vt.")) == 0 \
7156 || strncmp ("_ZTV", name, strlen ("_ZTV")) == 0 \
7157 || strncmp ("_ZTT", name, strlen ("_ZTT")) == 0 \
7158 || strncmp ("_ZTC", name, strlen ("_ZTC")) == 0)
7161 rs6000_output_symbol_ref (file
, x
)
7165 /* Currently C++ toc references to vtables can be emitted before it
7166 is decided whether the vtable is public or private. If this is
7167 the case, then the linker will eventually complain that there is
7168 a reference to an unknown section. Thus, for vtables only,
7169 we emit the TOC reference to reference the symbol and not the
7171 const char *name
= XSTR (x
, 0);
7173 if (VTABLE_NAME_P (name
))
7175 RS6000_OUTPUT_BASENAME (file
, name
);
7178 assemble_name (file
, name
);
7181 /* Output a TOC entry. We derive the entry name from what is
7185 output_toc (file
, x
, labelno
, mode
)
7189 enum machine_mode mode
;
7192 const char *name
= buf
;
7193 const char *real_name
;
7200 /* When the linker won't eliminate them, don't output duplicate
7201 TOC entries (this happens on AIX if there is any kind of TOC,
7202 and on SVR4 under -fPIC or -mrelocatable). */
7205 struct toc_hash_struct
*h
;
7208 h
= ggc_alloc (sizeof (*h
));
7211 h
->labelno
= labelno
;
7213 found
= htab_find_slot (toc_hash_table
, h
, 1);
7216 else /* This is indeed a duplicate.
7217 Set this label equal to that label. */
7219 fputs ("\t.set ", file
);
7220 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
7221 fprintf (file
, "%d,", labelno
);
7222 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
7223 fprintf (file
, "%d\n", ((*(const struct toc_hash_struct
**)
7229 /* If we're going to put a double constant in the TOC, make sure it's
7230 aligned properly when strict alignment is on. */
7231 if (GET_CODE (x
) == CONST_DOUBLE
7233 && GET_MODE_BITSIZE (mode
) >= 64
7234 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
7235 ASM_OUTPUT_ALIGN (file
, 3);
7238 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
7240 /* Handle FP constants specially. Note that if we have a minimal
7241 TOC, things we put here aren't actually in the TOC, so we can allow
7243 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
)
7248 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
7249 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
7253 if (TARGET_MINIMAL_TOC
)
7254 fprintf (file
, "\t.llong 0x%lx%08lx\n", k
[0], k
[1]);
7256 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n",
7257 k
[0], k
[1], k
[0] & 0xffffffff, k
[1] & 0xffffffff);
7262 if (TARGET_MINIMAL_TOC
)
7263 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n", k
[0], k
[1]);
7265 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n",
7266 k
[0], k
[1], k
[0], k
[1]);
7270 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
)
7275 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
7276 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
7280 if (TARGET_MINIMAL_TOC
)
7281 fprintf (file
, "\t.llong 0x%lx00000000\n", l
);
7283 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx00000000\n", l
, l
);
7288 if (TARGET_MINIMAL_TOC
)
7289 fprintf (file
, "\t.long 0x%lx\n", l
);
7291 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx\n", l
, l
);
7295 else if (GET_MODE (x
) == VOIDmode
7296 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
7298 unsigned HOST_WIDE_INT low
;
7301 if (GET_CODE (x
) == CONST_DOUBLE
)
7303 low
= CONST_DOUBLE_LOW (x
);
7304 high
= CONST_DOUBLE_HIGH (x
);
7307 #if HOST_BITS_PER_WIDE_INT == 32
7310 high
= (low
& 0x80000000) ? ~0 : 0;
7314 low
= INTVAL (x
) & 0xffffffff;
7315 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
7319 /* TOC entries are always Pmode-sized, but since this
7320 is a bigendian machine then if we're putting smaller
7321 integer constants in the TOC we have to pad them.
7322 (This is still a win over putting the constants in
7323 a separate constant pool, because then we'd have
7324 to have both a TOC entry _and_ the actual constant.)
7326 For a 32-bit target, CONST_INT values are loaded and shifted
7327 entirely within `low' and can be stored in one TOC entry. */
7329 if (TARGET_64BIT
&& POINTER_SIZE
< GET_MODE_BITSIZE (mode
))
7330 abort ();/* It would be easy to make this work, but it doesn't now. */
7332 if (POINTER_SIZE
> GET_MODE_BITSIZE (mode
))
7333 lshift_double (low
, high
, POINTER_SIZE
- GET_MODE_BITSIZE (mode
),
7334 POINTER_SIZE
, &low
, &high
, 0);
7338 if (TARGET_MINIMAL_TOC
)
7339 fprintf (file
, "\t.llong 0x%lx%08lx\n", (long)high
, (long)low
);
7341 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n",
7342 (long)high
, (long)low
, (long)high
, (long)low
);
7347 if (POINTER_SIZE
< GET_MODE_BITSIZE (mode
))
7349 if (TARGET_MINIMAL_TOC
)
7350 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n",
7351 (long)high
, (long)low
);
7353 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n",
7354 (long)high
, (long)low
, (long)high
, (long)low
);
7358 if (TARGET_MINIMAL_TOC
)
7359 fprintf (file
, "\t.long 0x%lx\n",
7362 fprintf (file
, "\t.tc IS_%lx[TC],0x%lx\n",
7363 (long)low
, (long)low
);
7369 if (GET_CODE (x
) == CONST
)
7371 base
= XEXP (XEXP (x
, 0), 0);
7372 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
7375 if (GET_CODE (base
) == SYMBOL_REF
)
7376 name
= XSTR (base
, 0);
7377 else if (GET_CODE (base
) == LABEL_REF
)
7378 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
7379 else if (GET_CODE (base
) == CODE_LABEL
)
7380 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
7384 STRIP_NAME_ENCODING (real_name
, name
);
7385 if (TARGET_MINIMAL_TOC
)
7386 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
7389 fprintf (file
, "\t.tc %s", real_name
);
7392 fprintf (file
, ".N%d", - offset
);
7394 fprintf (file
, ".P%d", offset
);
7396 fputs ("[TC],", file
);
7399 /* Currently C++ toc references to vtables can be emitted before it
7400 is decided whether the vtable is public or private. If this is
7401 the case, then the linker will eventually complain that there is
7402 a TOC reference to an unknown section. Thus, for vtables only,
7403 we emit the TOC reference to reference the symbol and not the
7405 if (VTABLE_NAME_P (name
))
7407 RS6000_OUTPUT_BASENAME (file
, name
);
7409 fprintf (file
, "%d", offset
);
7410 else if (offset
> 0)
7411 fprintf (file
, "+%d", offset
);
7414 output_addr_const (file
, x
);
7418 /* Output an assembler pseudo-op to write an ASCII string of N characters
7419 starting at P to FILE.
7421 On the RS/6000, we have to do this using the .byte operation and
7422 write out special characters outside the quoted string.
7423 Also, the assembler is broken; very long strings are truncated,
7424 so we must artificially break them up early. */
7427 output_ascii (file
, p
, n
)
7433 int i
, count_string
;
7434 const char *for_string
= "\t.byte \"";
7435 const char *for_decimal
= "\t.byte ";
7436 const char *to_close
= NULL
;
7439 for (i
= 0; i
< n
; i
++)
7442 if (c
>= ' ' && c
< 0177)
7445 fputs (for_string
, file
);
7448 /* Write two quotes to get one. */
7456 for_decimal
= "\"\n\t.byte ";
7460 if (count_string
>= 512)
7462 fputs (to_close
, file
);
7464 for_string
= "\t.byte \"";
7465 for_decimal
= "\t.byte ";
7473 fputs (for_decimal
, file
);
7474 fprintf (file
, "%d", c
);
7476 for_string
= "\n\t.byte \"";
7483 /* Now close the string if we have written one. Then end the line. */
7485 fputs (to_close
, file
);
7488 /* Generate a unique section name for FILENAME for a section type
7489 represented by SECTION_DESC. Output goes into BUF.
7491 SECTION_DESC can be any string, as long as it is different for each
7492 possible section type.
7494 We name the section in the same manner as xlc. The name begins with an
7495 underscore followed by the filename (after stripping any leading directory
7496 names) with the last period replaced by the string SECTION_DESC. If
7497 FILENAME does not contain a period, SECTION_DESC is appended to the end of
7501 rs6000_gen_section_name (buf
, filename
, section_desc
)
7503 const char *filename
;
7504 const char *section_desc
;
7506 const char *q
, *after_last_slash
, *last_period
= 0;
7510 after_last_slash
= filename
;
7511 for (q
= filename
; *q
; q
++)
7514 after_last_slash
= q
+ 1;
7519 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
7520 *buf
= (char *) permalloc (len
);
7525 for (q
= after_last_slash
; *q
; q
++)
7527 if (q
== last_period
)
7529 strcpy (p
, section_desc
);
7530 p
+= strlen (section_desc
);
7533 else if (ISALNUM (*q
))
7537 if (last_period
== 0)
7538 strcpy (p
, section_desc
);
7544 /* Emit profile function. */
7546 output_profile_hook (labelno
)
7549 if (DEFAULT_ABI
== ABI_AIX
)
7557 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
7558 STRIP_NAME_ENCODING (label_name
, ggc_strdup (buf
));
7559 fun
= gen_rtx_SYMBOL_REF (Pmode
, label_name
);
7561 emit_library_call (init_one_libfunc (RS6000_MCOUNT
), 0, VOIDmode
, 1,
7564 else if (DEFAULT_ABI
== ABI_DARWIN
)
7566 const char *mcount_name
= RS6000_MCOUNT
;
7567 int caller_addr_regno
= LINK_REGISTER_REGNUM
;
7569 /* Be conservative and always set this, at least for now. */
7570 current_function_uses_pic_offset_table
= 1;
7573 /* For PIC code, set up a stub and collect the caller's address
7574 from r0, which is where the prologue puts it. */
7577 mcount_name
= machopic_stub_name (mcount_name
);
7578 if (current_function_uses_pic_offset_table
)
7579 caller_addr_regno
= 0;
7582 emit_library_call (gen_rtx_SYMBOL_REF (Pmode
, mcount_name
),
7584 gen_rtx_REG (Pmode
, caller_addr_regno
), Pmode
);
7588 /* Write function profiler code. */
7591 output_function_profiler (file
, labelno
)
7597 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
7598 switch (DEFAULT_ABI
)
7605 case ABI_AIX_NODESC
:
7606 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
7609 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
7610 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7611 reg_names
[0], reg_names
[1]);
7612 asm_fprintf (file
, "\tmflr %s\n", reg_names
[12]);
7613 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[0]);
7614 assemble_name (file
, buf
);
7615 asm_fprintf (file
, "@got(%s)\n", reg_names
[12]);
7617 else if (flag_pic
> 1)
7619 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7620 reg_names
[0], reg_names
[1]);
7621 /* Now, we need to get the address of the label. */
7622 fputs ("\tbl 1f\n\t.long ", file
);
7623 assemble_name (file
, buf
);
7624 fputs ("-.\n1:", file
);
7625 asm_fprintf (file
, "\tmflr %s\n", reg_names
[11]);
7626 asm_fprintf (file
, "\t{l|lwz} %s,0(%s)\n",
7627 reg_names
[0], reg_names
[11]);
7628 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
7629 reg_names
[0], reg_names
[0], reg_names
[11]);
7633 asm_fprintf (file
, "\t{liu|lis} %s,", reg_names
[12]);
7634 assemble_name (file
, buf
);
7635 fputs ("@ha\n", file
);
7636 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7637 reg_names
[0], reg_names
[1]);
7638 asm_fprintf (file
, "\t{cal|la} %s,", reg_names
[0]);
7639 assemble_name (file
, buf
);
7640 asm_fprintf (file
, "@l(%s)\n", reg_names
[12]);
7643 if (current_function_needs_context
)
7644 asm_fprintf (file
, "\tmr %s,%s\n",
7645 reg_names
[30], reg_names
[STATIC_CHAIN_REGNUM
]);
7646 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
7647 if (current_function_needs_context
)
7648 asm_fprintf (file
, "\tmr %s,%s\n",
7649 reg_names
[STATIC_CHAIN_REGNUM
], reg_names
[30]);
7654 /* Don't do anything, done in output_profile_hook (). */
7660 /* Adjust the cost of a scheduling dependency. Return the new cost of
7661 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
7664 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
7667 rtx dep_insn ATTRIBUTE_UNUSED
;
7670 if (! recog_memoized (insn
))
7673 if (REG_NOTE_KIND (link
) != 0)
7676 if (REG_NOTE_KIND (link
) == 0)
7678 /* Data dependency; DEP_INSN writes a register that INSN reads some
7681 /* Tell the first scheduling pass about the latency between a mtctr
7682 and bctr (and mtlr and br/blr). The first scheduling pass will not
7683 know about this latency since the mtctr instruction, which has the
7684 latency associated to it, will be generated by reload. */
7685 if (get_attr_type (insn
) == TYPE_JMPREG
)
7686 return TARGET_POWER
? 5 : 4;
7688 /* Fall out to return default cost. */
7694 /* A C statement (sans semicolon) to update the integer scheduling priority
7695 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
7696 increase the priority to execute INSN later. Do not define this macro if
7697 you do not need to adjust the scheduling priorities of insns. */
7700 rs6000_adjust_priority (insn
, priority
)
7701 rtx insn ATTRIBUTE_UNUSED
;
7704 /* On machines (like the 750) which have asymetric integer units, where one
7705 integer unit can do multiply and divides and the other can't, reduce the
7706 priority of multiply/divide so it is scheduled before other integer
7710 if (! INSN_P (insn
))
7713 if (GET_CODE (PATTERN (insn
)) == USE
)
7716 switch (rs6000_cpu_attr
) {
7718 switch (get_attr_type (insn
))
7725 fprintf (stderr
, "priority was %#x (%d) before adjustment\n",
7726 priority
, priority
);
7727 if (priority
>= 0 && priority
< 0x01000000)
7737 /* Return how many instructions the machine can issue per cycle */
7738 int get_issue_rate()
7740 switch (rs6000_cpu_attr
) {
7741 case CPU_RIOS1
: /* ? */
7743 case CPU_PPC601
: /* ? */
7760 /* Length in units of the trampoline for entering a nested function. */
7763 rs6000_trampoline_size ()
7767 switch (DEFAULT_ABI
)
7773 ret
= (TARGET_32BIT
) ? 12 : 24;
7778 case ABI_AIX_NODESC
:
7779 ret
= (TARGET_32BIT
) ? 40 : 48;
7786 /* Emit RTL insns to initialize the variable parts of a trampoline.
7787 FNADDR is an RTX for the address of the function's pure code.
7788 CXT is an RTX for the static chain value for the function. */
7791 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
7796 enum machine_mode pmode
= Pmode
;
7797 int regsize
= (TARGET_32BIT
) ? 4 : 8;
7798 rtx ctx_reg
= force_reg (pmode
, cxt
);
7800 switch (DEFAULT_ABI
)
7805 /* Macros to shorten the code expansions below. */
7806 #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr))
7807 #define MEM_PLUS(addr,offset) \
7808 gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset)))
7810 /* Under AIX, just build the 3 word function descriptor */
7813 rtx fn_reg
= gen_reg_rtx (pmode
);
7814 rtx toc_reg
= gen_reg_rtx (pmode
);
7815 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
7816 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
7817 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
7818 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
7819 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
7823 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
7826 case ABI_AIX_NODESC
:
7827 emit_library_call (gen_rtx_SYMBOL_REF (SImode
, "__trampoline_setup"),
7830 GEN_INT (rs6000_trampoline_size ()), SImode
,
7840 /* If defined, a C expression whose value is nonzero if IDENTIFIER
7841 with arguments ARGS is a valid machine specific attribute for TYPE.
7842 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
7845 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
7847 tree attributes ATTRIBUTE_UNUSED
;
7851 if (TREE_CODE (type
) != FUNCTION_TYPE
7852 && TREE_CODE (type
) != FIELD_DECL
7853 && TREE_CODE (type
) != TYPE_DECL
)
7856 /* Longcall attribute says that the function is not within 2**26 bytes
7857 of the current function, and to do an indirect call. */
7858 if (is_attribute_p ("longcall", identifier
))
7859 return (args
== NULL_TREE
);
7864 /* Return a reference suitable for calling a function with the
7865 longcall attribute. */
7867 rs6000_longcall_ref (call_ref
)
7870 const char *call_name
;
7873 if (GET_CODE (call_ref
) != SYMBOL_REF
)
7876 /* System V adds '.' to the internal name, so skip them. */
7877 call_name
= XSTR (call_ref
, 0);
7878 if (*call_name
== '.')
7880 while (*call_name
== '.')
7883 node
= get_identifier (call_name
);
7884 call_ref
= gen_rtx_SYMBOL_REF (VOIDmode
, IDENTIFIER_POINTER (node
));
7887 return force_reg (Pmode
, call_ref
);
7891 /* A C statement or statements to switch to the appropriate section
7892 for output of RTX in mode MODE. You can assume that RTX is some
7893 kind of constant in RTL. The argument MODE is redundant except in
7894 the case of a `const_int' rtx. Select the section by calling
7895 `text_section' or one of the alternatives for other sections.
7897 Do not define this macro if you put all constants in the read-only
7903 rs6000_select_rtx_section (mode
, x
)
7904 enum machine_mode mode
;
7907 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
, mode
))
7913 /* A C statement or statements to switch to the appropriate
7914 section for output of DECL. DECL is either a `VAR_DECL' node
7915 or a constant of some sort. RELOC indicates whether forming
7916 the initial value of DECL requires link-time relocations. */
7919 rs6000_select_section (decl
, reloc
)
7923 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7926 static void (* const sec_funcs
[4]) PARAMS ((void)) = {
7933 needs_sdata
= (size
> 0
7934 && size
<= g_switch_value
7935 && rs6000_sdata
!= SDATA_NONE
7936 && (rs6000_sdata
!= SDATA_DATA
|| TREE_PUBLIC (decl
)));
7938 if (TREE_CODE (decl
) == STRING_CST
)
7939 readonly
= ! flag_writable_strings
;
7940 else if (TREE_CODE (decl
) == VAR_DECL
)
7941 readonly
= (! (flag_pic
&& reloc
)
7942 && TREE_READONLY (decl
)
7943 && ! TREE_SIDE_EFFECTS (decl
)
7944 && DECL_INITIAL (decl
)
7945 && DECL_INITIAL (decl
) != error_mark_node
7946 && TREE_CONSTANT (DECL_INITIAL (decl
)));
7949 if (needs_sdata
&& rs6000_sdata
!= SDATA_EABI
)
7952 (*sec_funcs
[(readonly
? 0 : 2) + (needs_sdata
? 1 : 0)])();
7955 /* A C statement to build up a unique section name, expressed as a
7956 STRING_CST node, and assign it to DECL_SECTION_NAME (decl).
7957 RELOC indicates whether the initial value of EXP requires
7958 link-time relocations. If you do not define this macro, GCC will use
7959 the symbol name prefixed by `.' as the section name. Note - this
7960 macro can now be called for unitialised data items as well as
7961 initialised data and functions. */
7964 rs6000_unique_section (decl
, reloc
)
7968 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7977 static const char *const prefixes
[7][2] =
7979 { ".text.", ".gnu.linkonce.t." },
7980 { ".rodata.", ".gnu.linkonce.r." },
7981 { ".sdata2.", ".gnu.linkonce.s2." },
7982 { ".data.", ".gnu.linkonce.d." },
7983 { ".sdata.", ".gnu.linkonce.s." },
7984 { ".bss.", ".gnu.linkonce.b." },
7985 { ".sbss.", ".gnu.linkonce.sb." }
7988 needs_sdata
= (TREE_CODE (decl
) != FUNCTION_DECL
7990 && size
<= g_switch_value
7991 && rs6000_sdata
!= SDATA_NONE
7992 && (rs6000_sdata
!= SDATA_DATA
|| TREE_PUBLIC (decl
)));
7994 if (TREE_CODE (decl
) == STRING_CST
)
7995 readonly
= ! flag_writable_strings
;
7996 else if (TREE_CODE (decl
) == VAR_DECL
)
7997 readonly
= (! (flag_pic
&& reloc
)
7998 && TREE_READONLY (decl
)
7999 && ! TREE_SIDE_EFFECTS (decl
)
8000 && DECL_INITIAL (decl
)
8001 && DECL_INITIAL (decl
) != error_mark_node
8002 && TREE_CONSTANT (DECL_INITIAL (decl
)));
8005 if (needs_sdata
&& rs6000_sdata
!= SDATA_EABI
)
8008 sec
= ((TREE_CODE (decl
) == FUNCTION_DECL
? 0 : 1)
8009 + (readonly
? 0 : 2)
8010 + (needs_sdata
? 1 : 0)
8011 + (DECL_INITIAL (decl
) == 0
8012 || DECL_INITIAL (decl
) == error_mark_node
) ? 4 : 0);
8014 STRIP_NAME_ENCODING (name
, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl
)));
8015 prefix
= prefixes
[sec
][DECL_ONE_ONLY (decl
)];
8016 len
= strlen (name
) + strlen (prefix
);
8017 string
= alloca (len
+ 1);
8019 sprintf (string
, "%s%s", prefix
, name
);
8021 DECL_SECTION_NAME (decl
) = build_string (len
, string
);
8025 /* If we are referencing a function that is static or is known to be
8026 in this file, make the SYMBOL_REF special. We can use this to indicate
8027 that we can branch to this function without emitting a no-op after the
8028 call. For real AIX calling sequences, we also replace the
8029 function name with the real name (1 or 2 leading .'s), rather than
8030 the function descriptor name. This saves a lot of overriding code
8031 to read the prefixes. */
8034 rs6000_encode_section_info (decl
)
8037 if (TREE_CODE (decl
) == FUNCTION_DECL
)
8039 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
8040 if ((TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
8041 && ! DECL_WEAK (decl
))
8042 SYMBOL_REF_FLAG (sym_ref
) = 1;
8044 if (DEFAULT_ABI
== ABI_AIX
)
8046 size_t len1
= (DEFAULT_ABI
== ABI_AIX
) ? 1 : 2;
8047 size_t len2
= strlen (XSTR (sym_ref
, 0));
8048 char *str
= alloca (len1
+ len2
+ 1);
8051 memcpy (str
+ len1
, XSTR (sym_ref
, 0), len2
+ 1);
8053 XSTR (sym_ref
, 0) = ggc_alloc_string (str
, len1
+ len2
);
8056 else if (rs6000_sdata
!= SDATA_NONE
8057 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
8058 && TREE_CODE (decl
) == VAR_DECL
)
8060 int size
= int_size_in_bytes (TREE_TYPE (decl
));
8061 tree section_name
= DECL_SECTION_NAME (decl
);
8062 const char *name
= (char *)0;
8067 if (TREE_CODE (section_name
) == STRING_CST
)
8069 name
= TREE_STRING_POINTER (section_name
);
8070 len
= TREE_STRING_LENGTH (section_name
);
8076 if ((size
> 0 && size
<= g_switch_value
)
8078 && ((len
== sizeof (".sdata") - 1
8079 && strcmp (name
, ".sdata") == 0)
8080 || (len
== sizeof (".sdata2") - 1
8081 && strcmp (name
, ".sdata2") == 0)
8082 || (len
== sizeof (".sbss") - 1
8083 && strcmp (name
, ".sbss") == 0)
8084 || (len
== sizeof (".sbss2") - 1
8085 && strcmp (name
, ".sbss2") == 0)
8086 || (len
== sizeof (".PPC.EMB.sdata0") - 1
8087 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
8088 || (len
== sizeof (".PPC.EMB.sbss0") - 1
8089 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
8091 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
8092 size_t len
= strlen (XSTR (sym_ref
, 0));
8093 char *str
= alloca (len
+ 2);
8096 memcpy (str
+ 1, XSTR (sym_ref
, 0), len
+ 1);
8097 XSTR (sym_ref
, 0) = ggc_alloc_string (str
, len
+ 1);
8102 #endif /* USING_SVR4_H */
8105 /* Return a REG that occurs in ADDR with coefficient 1.
8106 ADDR can be effectively incremented by incrementing REG.
8108 r0 is special and we must not select it as an address
8109 register by this routine since our caller will try to
8110 increment the returned register via an "la" instruction. */
8113 find_addr_reg (addr
)
8116 while (GET_CODE (addr
) == PLUS
)
8118 if (GET_CODE (XEXP (addr
, 0)) == REG
8119 && REGNO (XEXP (addr
, 0)) != 0)
8120 addr
= XEXP (addr
, 0);
8121 else if (GET_CODE (XEXP (addr
, 1)) == REG
8122 && REGNO (XEXP (addr
, 1)) != 0)
8123 addr
= XEXP (addr
, 1);
8124 else if (CONSTANT_P (XEXP (addr
, 0)))
8125 addr
= XEXP (addr
, 1);
8126 else if (CONSTANT_P (XEXP (addr
, 1)))
8127 addr
= XEXP (addr
, 0);
8131 if (GET_CODE (addr
) == REG
&& REGNO (addr
) != 0)
8137 rs6000_fatal_bad_address (op
)
8140 fatal_insn ("bad address", op
);
8143 /* Called to register all of our global variables with the garbage
8147 rs6000_add_gc_roots ()
8149 ggc_add_rtx_root (&rs6000_compare_op0
, 1);
8150 ggc_add_rtx_root (&rs6000_compare_op1
, 1);
8152 toc_hash_table
= htab_create (1021, toc_hash_function
, toc_hash_eq
, NULL
);
8153 ggc_add_root (&toc_hash_table
, 1, sizeof (toc_hash_table
),
8154 toc_hash_mark_table
);
8157 machopic_add_gc_roots ();
8164 /* Returns 1 if OP is either a symbol reference or a sum of a symbol
8165 reference and a constant. */
8168 symbolic_operand (op
)
8171 switch (GET_CODE (op
))
8178 return (GET_CODE (op
) == SYMBOL_REF
||
8179 (GET_CODE (XEXP (op
, 0)) == SYMBOL_REF
8180 || GET_CODE (XEXP (op
, 0)) == LABEL_REF
)
8181 && GET_CODE (XEXP (op
, 1)) == CONST_INT
);
8188 #ifdef RS6000_LONG_BRANCH
8190 static tree stub_list
= 0;
8192 /* ADD_COMPILER_STUB adds the compiler generated stub for handling
8193 procedure calls to the linked list. */
8196 add_compiler_stub (label_name
, function_name
, line_number
)
8201 tree stub
= build_tree_list (function_name
, label_name
);
8202 TREE_TYPE (stub
) = build_int_2 (line_number
, 0);
8203 TREE_CHAIN (stub
) = stub_list
;
8207 #define STUB_LABEL_NAME(STUB) TREE_VALUE (STUB)
8208 #define STUB_FUNCTION_NAME(STUB) TREE_PURPOSE (STUB)
8209 #define STUB_LINE_NUMBER(STUB) TREE_INT_CST_LOW (TREE_TYPE (STUB))
8211 /* OUTPUT_COMPILER_STUB outputs the compiler generated stub for handling
8212 procedure calls from the linked list and initializes the linked list. */
8214 void output_compiler_stub ()
8217 char label_buf
[256];
8219 tree tmp_stub
, stub
;
8222 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8224 fprintf (asm_out_file
,
8225 "%s:\n", IDENTIFIER_POINTER(STUB_LABEL_NAME(stub
)));
8227 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
8228 if (write_symbols
== DBX_DEBUG
|| write_symbols
== XCOFF_DEBUG
)
8229 fprintf (asm_out_file
, "\t.stabd 68,0,%d\n", STUB_LINE_NUMBER(stub
));
8230 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
8232 if (IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
))[0] == '*')
8234 IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
))+1);
8238 strcpy (label_buf
+1,
8239 IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
)));
8242 strcpy (tmp_buf
, "lis r12,hi16(");
8243 strcat (tmp_buf
, label_buf
);
8244 strcat (tmp_buf
, ")\n\tori r12,r12,lo16(");
8245 strcat (tmp_buf
, label_buf
);
8246 strcat (tmp_buf
, ")\n\tmtctr r12\n\tbctr");
8247 output_asm_insn (tmp_buf
, 0);
8249 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
8250 if (write_symbols
== DBX_DEBUG
|| write_symbols
== XCOFF_DEBUG
)
8251 fprintf(asm_out_file
, "\t.stabd 68,0,%d\n", STUB_LINE_NUMBER (stub
));
8252 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
8258 /* NO_PREVIOUS_DEF checks in the link list whether the function name is
8259 already there or not. */
8261 int no_previous_def (function_name
)
8265 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8266 if (function_name
== STUB_FUNCTION_NAME (stub
))
8271 /* GET_PREV_LABEL gets the label name from the previous definition of
8274 tree
get_prev_label (function_name
)
8278 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8279 if (function_name
== STUB_FUNCTION_NAME (stub
))
8280 return STUB_LABEL_NAME (stub
);
8284 /* INSN is either a function call or a millicode call. It may have an
8285 unconditional jump in its delay slot.
8287 CALL_DEST is the routine we are calling. */
8290 output_call (insn
, call_dest
, operand_number
)
8295 static char buf
[256];
8296 if (GET_CODE (call_dest
) == SYMBOL_REF
&& TARGET_LONG_BRANCH
&& !flag_pic
)
8299 tree funname
= get_identifier (XSTR (call_dest
, 0));
8301 if (no_previous_def (funname
))
8304 rtx label_rtx
= gen_label_rtx ();
8305 char *label_buf
, temp_buf
[256];
8306 ASM_GENERATE_INTERNAL_LABEL (temp_buf
, "L",
8307 CODE_LABEL_NUMBER (label_rtx
));
8308 label_buf
= temp_buf
[0] == '*' ? temp_buf
+ 1 : temp_buf
;
8309 labelname
= get_identifier (label_buf
);
8310 for (; insn
&& GET_CODE (insn
) != NOTE
; insn
= PREV_INSN (insn
));
8312 line_number
= NOTE_LINE_NUMBER (insn
);
8313 add_compiler_stub (labelname
, funname
, line_number
);
8316 labelname
= get_prev_label (funname
);
8318 sprintf (buf
, "jbsr %%z%d,%.246s",
8319 operand_number
, IDENTIFIER_POINTER (labelname
));
8324 sprintf (buf
, "bl %%z%d", operand_number
);
8329 #endif /* RS6000_LONG_BRANCH */
8331 #define GEN_LOCAL_LABEL_FOR_SYMBOL(BUF,SYMBOL,LENGTH,N) \
8333 const char *symbol_ = (SYMBOL); \
8334 char *buffer_ = (BUF); \
8335 if (symbol_[0] == '"') \
8337 sprintf(buffer_, "\"L%d$%s", (N), symbol_+1); \
8339 else if (name_needs_quotes(symbol_)) \
8341 sprintf(buffer_, "\"L%d$%s\"", (N), symbol_); \
8345 sprintf(buffer_, "L%d$%s", (N), symbol_); \
8350 /* Generate PIC and indirect symbol stubs. */
8353 machopic_output_stub (file
, symb
, stub
)
8355 const char *symb
, *stub
;
8357 unsigned int length
;
8358 char *binder_name
, *symbol_name
, *lazy_ptr_name
;
8359 char *local_label_0
, *local_label_1
, *local_label_2
;
8360 static int label
= 0;
8362 /* Lose our funky encoding stuff so it doesn't contaminate the stub. */
8363 STRIP_NAME_ENCODING (symb
, symb
);
8367 length
= strlen (stub
);
8368 binder_name
= alloca (length
+ 32);
8369 GEN_BINDER_NAME_FOR_STUB (binder_name
, stub
, length
);
8371 length
= strlen (symb
);
8372 symbol_name
= alloca (length
+ 32);
8373 GEN_SYMBOL_NAME_FOR_SYMBOL (symbol_name
, symb
, length
);
8375 lazy_ptr_name
= alloca (length
+ 32);
8376 GEN_LAZY_PTR_NAME_FOR_SYMBOL (lazy_ptr_name
, symb
, length
);
8378 local_label_0
= alloca (length
+ 32);
8379 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_0
, symb
, length
, 0);
8381 local_label_1
= alloca (length
+ 32);
8382 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_1
, symb
, length
, 1);
8384 local_label_2
= alloca (length
+ 32);
8385 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_2
, symb
, length
, 2);
8388 machopic_picsymbol_stub_section ();
8390 machopic_symbol_stub_section ();
8392 fprintf (file
, "%s:\n", stub
);
8393 fprintf (file
, "\t.indirect_symbol %s\n", symbol_name
);
8397 fprintf (file
, "\tmflr r0\n");
8398 fprintf (file
, "\tbcl 20,31,%s\n", local_label_0
);
8399 fprintf (file
, "%s:\n\tmflr r11\n", local_label_0
);
8400 fprintf (file
, "\taddis r11,r11,ha16(%s-%s)\n",
8401 lazy_ptr_name
, local_label_0
);
8402 fprintf (file
, "\tmtlr r0\n");
8403 fprintf (file
, "\tlwz r12,lo16(%s-%s)(r11)\n",
8404 lazy_ptr_name
, local_label_0
);
8405 fprintf (file
, "\tmtctr r12\n");
8406 fprintf (file
, "\taddi r11,r11,lo16(%s-%s)\n",
8407 lazy_ptr_name
, local_label_0
);
8408 fprintf (file
, "\tbctr\n");
8411 fprintf (file
, "non-pure not supported\n");
8413 machopic_lazy_symbol_ptr_section ();
8414 fprintf (file
, "%s:\n", lazy_ptr_name
);
8415 fprintf (file
, "\t.indirect_symbol %s\n", symbol_name
);
8416 fprintf (file
, "\t.long dyld_stub_binding_helper\n");
8419 /* Legitimize PIC addresses. If the address is already
8420 position-independent, we return ORIG. Newly generated
8421 position-independent addresses go into a reg. This is REG if non
8422 zero, otherwise we allocate register(s) as necessary. */
8424 #define SMALL_INT(X) ((unsigned) (INTVAL(X) + 0x4000) < 0x8000)
8427 rs6000_machopic_legitimize_pic_address (orig
, mode
, reg
)
8429 enum machine_mode mode
;
8434 if (reg
== NULL
&& ! reload_in_progress
&& ! reload_completed
)
8435 reg
= gen_reg_rtx (Pmode
);
8437 if (GET_CODE (orig
) == CONST
)
8439 if (GET_CODE (XEXP (orig
, 0)) == PLUS
8440 && XEXP (XEXP (orig
, 0), 0) == pic_offset_table_rtx
)
8443 if (GET_CODE (XEXP (orig
, 0)) == PLUS
)
8445 base
= rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig
, 0), 0),
8447 offset
= rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig
, 0), 1),
8453 if (GET_CODE (offset
) == CONST_INT
)
8455 if (SMALL_INT (offset
))
8456 return plus_constant (base
, INTVAL (offset
));
8457 else if (! reload_in_progress
&& ! reload_completed
)
8458 offset
= force_reg (Pmode
, offset
);
8462 return gen_rtx (PLUS
, Pmode
, base
, offset
);
8465 /* Fall back on generic machopic code. */
8466 return machopic_legitimize_pic_address (orig
, mode
, reg
);
8469 /* This is just a placeholder to make linking work without having to
8470 add this to the generic Darwin EXTRA_SECTIONS. If -mcall-aix is
8471 ever needed for Darwin (not too likely!) this would have to get a
8479 #endif /* TARGET_MACHO */