Merge from mainline (gomp-merge-2005-02-26).
[official-gcc.git] / gcc / reg-stack.c
blobd561416fa2c741320b481f1be19c463a456f37d1
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
72 * Methodology:
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
78 * asm_operands:
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "toplev.h"
167 #include "recog.h"
168 #include "output.h"
169 #include "basic-block.h"
170 #include "varray.h"
171 #include "reload.h"
172 #include "ggc.h"
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
179 stack registers. */
180 static GTY(()) varray_type stack_regs_mentioned_data;
182 #ifdef STACK_REGS
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
191 appropriately.
193 REG_SET indicates which registers are live. */
195 typedef struct stack_def
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
200 } *stack;
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
205 typedef struct block_info_def
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
212 to be visited. */
213 } *block_info;
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
217 /* Passed to change_stack to indicate where to emit insns. */
218 enum emit_where
220 EMIT_AFTER,
221 EMIT_BEFORE
224 /* The block we're currently working on. */
225 static basic_block current_block;
227 /* This is the register file for all register after conversion. */
228 static rtx
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
234 /* Used to initialize uninitialized registers. */
235 static rtx not_a_num;
237 /* Forward declarations */
239 static int stack_regs_mentioned_p (rtx pat);
240 static void straighten_stack (rtx, stack);
241 static void pop_stack (stack, int);
242 static rtx *get_true_reg (rtx *);
244 static int check_asm_stack_operands (rtx);
245 static int get_asm_operand_n_inputs (rtx);
246 static rtx stack_result (tree);
247 static void replace_reg (rtx *, int);
248 static void remove_regno_note (rtx, enum reg_note, unsigned int);
249 static int get_hard_regnum (stack, rtx);
250 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
251 static void emit_swap_insn (rtx, stack, rtx);
252 static void swap_to_top(rtx, stack, rtx, rtx);
253 static bool move_for_stack_reg (rtx, stack, rtx);
254 static bool move_nan_for_stack_reg (rtx, stack, rtx);
255 static int swap_rtx_condition_1 (rtx);
256 static int swap_rtx_condition (rtx);
257 static void compare_for_stack_reg (rtx, stack, rtx);
258 static bool subst_stack_regs_pat (rtx, stack, rtx);
259 static void subst_asm_stack_regs (rtx, stack);
260 static bool subst_stack_regs (rtx, stack);
261 static void change_stack (rtx, stack, stack, enum emit_where);
262 static int convert_regs_entry (void);
263 static void convert_regs_exit (void);
264 static int convert_regs_1 (FILE *, basic_block);
265 static int convert_regs_2 (FILE *, basic_block);
266 static int convert_regs (FILE *);
267 static void print_stack (FILE *, stack);
268 static rtx next_flags_user (rtx);
269 static bool compensate_edge (edge, FILE *);
271 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
273 static int
274 stack_regs_mentioned_p (rtx pat)
276 const char *fmt;
277 int i;
279 if (STACK_REG_P (pat))
280 return 1;
282 fmt = GET_RTX_FORMAT (GET_CODE (pat));
283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
285 if (fmt[i] == 'E')
287 int j;
289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
291 return 1;
293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
294 return 1;
297 return 0;
300 /* Return nonzero if INSN mentions stacked registers, else return zero. */
303 stack_regs_mentioned (rtx insn)
305 unsigned int uid, max;
306 int test;
308 if (! INSN_P (insn) || !stack_regs_mentioned_data)
309 return 0;
311 uid = INSN_UID (insn);
312 max = VARRAY_SIZE (stack_regs_mentioned_data);
313 if (uid >= max)
315 /* Allocate some extra size to avoid too many reallocs, but
316 do not grow too quickly. */
317 max = uid + uid / 20;
318 VARRAY_GROW (stack_regs_mentioned_data, max);
321 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
322 if (test == 0)
324 /* This insn has yet to be examined. Do so now. */
325 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
326 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
329 return test == 1;
332 static rtx ix86_flags_rtx;
334 static rtx
335 next_flags_user (rtx insn)
337 /* Search forward looking for the first use of this value.
338 Stop at block boundaries. */
340 while (insn != BB_END (current_block))
342 insn = NEXT_INSN (insn);
344 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
345 return insn;
347 if (CALL_P (insn))
348 return NULL_RTX;
350 return NULL_RTX;
353 /* Reorganize the stack into ascending numbers,
354 after this insn. */
356 static void
357 straighten_stack (rtx insn, stack regstack)
359 struct stack_def temp_stack;
360 int top;
362 /* If there is only a single register on the stack, then the stack is
363 already in increasing order and no reorganization is needed.
365 Similarly if the stack is empty. */
366 if (regstack->top <= 0)
367 return;
369 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
371 for (top = temp_stack.top = regstack->top; top >= 0; top--)
372 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
374 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
377 /* Pop a register from the stack. */
379 static void
380 pop_stack (stack regstack, int regno)
382 int top = regstack->top;
384 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
385 regstack->top--;
386 /* If regno was not at the top of stack then adjust stack. */
387 if (regstack->reg [top] != regno)
389 int i;
390 for (i = regstack->top; i >= 0; i--)
391 if (regstack->reg [i] == regno)
393 int j;
394 for (j = i; j < top; j++)
395 regstack->reg [j] = regstack->reg [j + 1];
396 break;
401 /* Convert register usage from "flat" register file usage to a "stack
402 register file. FILE is the dump file, if used.
404 Construct a CFG and run life analysis. Then convert each insn one
405 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
406 code duplication created when the converter inserts pop insns on
407 the edges. */
409 bool
410 reg_to_stack (FILE *file)
412 basic_block bb;
413 int i;
414 int max_uid;
416 /* Clean up previous run. */
417 stack_regs_mentioned_data = 0;
419 /* See if there is something to do. Flow analysis is quite
420 expensive so we might save some compilation time. */
421 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
422 if (regs_ever_live[i])
423 break;
424 if (i > LAST_STACK_REG)
425 return false;
427 /* Ok, floating point instructions exist. If not optimizing,
428 build the CFG and run life analysis.
429 Also need to rebuild life when superblock scheduling is done
430 as it don't update liveness yet. */
431 if (!optimize
432 || (flag_sched2_use_superblocks
433 && flag_schedule_insns_after_reload))
435 count_or_remove_death_notes (NULL, 1);
436 life_analysis (file, PROP_DEATH_NOTES);
438 mark_dfs_back_edges ();
440 /* Set up block info for each basic block. */
441 alloc_aux_for_blocks (sizeof (struct block_info_def));
442 FOR_EACH_BB_REVERSE (bb)
444 edge e;
445 edge_iterator ei;
447 FOR_EACH_EDGE (e, ei, bb->preds)
448 if (!(e->flags & EDGE_DFS_BACK)
449 && e->src != ENTRY_BLOCK_PTR)
450 BLOCK_INFO (bb)->predecessors++;
453 /* Create the replacement registers up front. */
454 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
456 enum machine_mode mode;
457 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
458 mode != VOIDmode;
459 mode = GET_MODE_WIDER_MODE (mode))
460 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
461 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
462 mode != VOIDmode;
463 mode = GET_MODE_WIDER_MODE (mode))
464 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
467 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
469 /* A QNaN for initializing uninitialized variables.
471 ??? We can't load from constant memory in PIC mode, because
472 we're inserting these instructions before the prologue and
473 the PIC register hasn't been set up. In that case, fall back
474 on zero, which we can get from `ldz'. */
476 if (flag_pic)
477 not_a_num = CONST0_RTX (SFmode);
478 else
480 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
481 not_a_num = force_const_mem (SFmode, not_a_num);
484 /* Allocate a cache for stack_regs_mentioned. */
485 max_uid = get_max_uid ();
486 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
487 "stack_regs_mentioned cache");
489 convert_regs (file);
491 free_aux_for_blocks ();
492 return true;
496 /* Return a pointer to the REG expression within PAT. If PAT is not a
497 REG, possible enclosed by a conversion rtx, return the inner part of
498 PAT that stopped the search. */
500 static rtx *
501 get_true_reg (rtx *pat)
503 for (;;)
504 switch (GET_CODE (*pat))
506 case SUBREG:
507 /* Eliminate FP subregister accesses in favor of the
508 actual FP register in use. */
510 rtx subreg;
511 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
513 int regno_off = subreg_regno_offset (REGNO (subreg),
514 GET_MODE (subreg),
515 SUBREG_BYTE (*pat),
516 GET_MODE (*pat));
517 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
518 GET_MODE (subreg));
519 default:
520 return pat;
523 case FLOAT:
524 case FIX:
525 case FLOAT_EXTEND:
526 pat = & XEXP (*pat, 0);
527 break;
529 case FLOAT_TRUNCATE:
530 if (!flag_unsafe_math_optimizations)
531 return pat;
532 pat = & XEXP (*pat, 0);
533 break;
537 /* Set if we find any malformed asms in a block. */
538 static bool any_malformed_asm;
540 /* There are many rules that an asm statement for stack-like regs must
541 follow. Those rules are explained at the top of this file: the rule
542 numbers below refer to that explanation. */
544 static int
545 check_asm_stack_operands (rtx insn)
547 int i;
548 int n_clobbers;
549 int malformed_asm = 0;
550 rtx body = PATTERN (insn);
552 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
553 char implicitly_dies[FIRST_PSEUDO_REGISTER];
554 int alt;
556 rtx *clobber_reg = 0;
557 int n_inputs, n_outputs;
559 /* Find out what the constraints require. If no constraint
560 alternative matches, this asm is malformed. */
561 extract_insn (insn);
562 constrain_operands (1);
563 alt = which_alternative;
565 preprocess_constraints ();
567 n_inputs = get_asm_operand_n_inputs (body);
568 n_outputs = recog_data.n_operands - n_inputs;
570 if (alt < 0)
572 malformed_asm = 1;
573 /* Avoid further trouble with this insn. */
574 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
575 return 0;
578 /* Strip SUBREGs here to make the following code simpler. */
579 for (i = 0; i < recog_data.n_operands; i++)
580 if (GET_CODE (recog_data.operand[i]) == SUBREG
581 && REG_P (SUBREG_REG (recog_data.operand[i])))
582 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
584 /* Set up CLOBBER_REG. */
586 n_clobbers = 0;
588 if (GET_CODE (body) == PARALLEL)
590 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
592 for (i = 0; i < XVECLEN (body, 0); i++)
593 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
595 rtx clobber = XVECEXP (body, 0, i);
596 rtx reg = XEXP (clobber, 0);
598 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
599 reg = SUBREG_REG (reg);
601 if (STACK_REG_P (reg))
603 clobber_reg[n_clobbers] = reg;
604 n_clobbers++;
609 /* Enforce rule #4: Output operands must specifically indicate which
610 reg an output appears in after an asm. "=f" is not allowed: the
611 operand constraints must select a class with a single reg.
613 Also enforce rule #5: Output operands must start at the top of
614 the reg-stack: output operands may not "skip" a reg. */
616 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
617 for (i = 0; i < n_outputs; i++)
618 if (STACK_REG_P (recog_data.operand[i]))
620 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
622 error_for_asm (insn, "output constraint %d must specify a single register", i);
623 malformed_asm = 1;
625 else
627 int j;
629 for (j = 0; j < n_clobbers; j++)
630 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
632 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
633 i, reg_names [REGNO (clobber_reg[j])]);
634 malformed_asm = 1;
635 break;
637 if (j == n_clobbers)
638 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
643 /* Search for first non-popped reg. */
644 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
645 if (! reg_used_as_output[i])
646 break;
648 /* If there are any other popped regs, that's an error. */
649 for (; i < LAST_STACK_REG + 1; i++)
650 if (reg_used_as_output[i])
651 break;
653 if (i != LAST_STACK_REG + 1)
655 error_for_asm (insn, "output regs must be grouped at top of stack");
656 malformed_asm = 1;
659 /* Enforce rule #2: All implicitly popped input regs must be closer
660 to the top of the reg-stack than any input that is not implicitly
661 popped. */
663 memset (implicitly_dies, 0, sizeof (implicitly_dies));
664 for (i = n_outputs; i < n_outputs + n_inputs; i++)
665 if (STACK_REG_P (recog_data.operand[i]))
667 /* An input reg is implicitly popped if it is tied to an
668 output, or if there is a CLOBBER for it. */
669 int j;
671 for (j = 0; j < n_clobbers; j++)
672 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
673 break;
675 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
676 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
679 /* Search for first non-popped reg. */
680 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
681 if (! implicitly_dies[i])
682 break;
684 /* If there are any other popped regs, that's an error. */
685 for (; i < LAST_STACK_REG + 1; i++)
686 if (implicitly_dies[i])
687 break;
689 if (i != LAST_STACK_REG + 1)
691 error_for_asm (insn,
692 "implicitly popped regs must be grouped at top of stack");
693 malformed_asm = 1;
696 /* Enforce rule #3: If any input operand uses the "f" constraint, all
697 output constraints must use the "&" earlyclobber.
699 ??? Detect this more deterministically by having constrain_asm_operands
700 record any earlyclobber. */
702 for (i = n_outputs; i < n_outputs + n_inputs; i++)
703 if (recog_op_alt[i][alt].matches == -1)
705 int j;
707 for (j = 0; j < n_outputs; j++)
708 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
710 error_for_asm (insn,
711 "output operand %d must use %<&%> constraint", j);
712 malformed_asm = 1;
716 if (malformed_asm)
718 /* Avoid further trouble with this insn. */
719 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
720 any_malformed_asm = true;
721 return 0;
724 return 1;
727 /* Calculate the number of inputs and outputs in BODY, an
728 asm_operands. N_OPERANDS is the total number of operands, and
729 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
730 placed. */
732 static int
733 get_asm_operand_n_inputs (rtx body)
735 switch (GET_CODE (body))
737 case SET:
738 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
739 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
741 case ASM_OPERANDS:
742 return ASM_OPERANDS_INPUT_LENGTH (body);
744 case PARALLEL:
745 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
747 default:
748 gcc_unreachable ();
752 /* If current function returns its result in an fp stack register,
753 return the REG. Otherwise, return 0. */
755 static rtx
756 stack_result (tree decl)
758 rtx result;
760 /* If the value is supposed to be returned in memory, then clearly
761 it is not returned in a stack register. */
762 if (aggregate_value_p (DECL_RESULT (decl), decl))
763 return 0;
765 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
766 if (result != 0)
768 #ifdef FUNCTION_OUTGOING_VALUE
769 result
770 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
771 #else
772 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
773 #endif
776 return result != 0 && STACK_REG_P (result) ? result : 0;
781 * This section deals with stack register substitution, and forms the second
782 * pass over the RTL.
785 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
786 the desired hard REGNO. */
788 static void
789 replace_reg (rtx *reg, int regno)
791 gcc_assert (regno >= FIRST_STACK_REG);
792 gcc_assert (regno <= LAST_STACK_REG);
793 gcc_assert (STACK_REG_P (*reg));
795 gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT
796 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
798 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
801 /* Remove a note of type NOTE, which must be found, for register
802 number REGNO from INSN. Remove only one such note. */
804 static void
805 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
807 rtx *note_link, this;
809 note_link = &REG_NOTES (insn);
810 for (this = *note_link; this; this = XEXP (this, 1))
811 if (REG_NOTE_KIND (this) == note
812 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
814 *note_link = XEXP (this, 1);
815 return;
817 else
818 note_link = &XEXP (this, 1);
820 gcc_unreachable ();
823 /* Find the hard register number of virtual register REG in REGSTACK.
824 The hard register number is relative to the top of the stack. -1 is
825 returned if the register is not found. */
827 static int
828 get_hard_regnum (stack regstack, rtx reg)
830 int i;
832 gcc_assert (STACK_REG_P (reg));
834 for (i = regstack->top; i >= 0; i--)
835 if (regstack->reg[i] == REGNO (reg))
836 break;
838 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
841 /* Emit an insn to pop virtual register REG before or after INSN.
842 REGSTACK is the stack state after INSN and is updated to reflect this
843 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
844 is represented as a SET whose destination is the register to be popped
845 and source is the top of stack. A death note for the top of stack
846 cases the movdf pattern to pop. */
848 static rtx
849 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
851 rtx pop_insn, pop_rtx;
852 int hard_regno;
854 /* For complex types take care to pop both halves. These may survive in
855 CLOBBER and USE expressions. */
856 if (COMPLEX_MODE_P (GET_MODE (reg)))
858 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
859 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
861 pop_insn = NULL_RTX;
862 if (get_hard_regnum (regstack, reg1) >= 0)
863 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
864 if (get_hard_regnum (regstack, reg2) >= 0)
865 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
866 gcc_assert (pop_insn);
867 return pop_insn;
870 hard_regno = get_hard_regnum (regstack, reg);
872 gcc_assert (hard_regno >= FIRST_STACK_REG);
874 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
875 FP_MODE_REG (FIRST_STACK_REG, DFmode));
877 if (where == EMIT_AFTER)
878 pop_insn = emit_insn_after (pop_rtx, insn);
879 else
880 pop_insn = emit_insn_before (pop_rtx, insn);
882 REG_NOTES (pop_insn)
883 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
884 REG_NOTES (pop_insn));
886 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
887 = regstack->reg[regstack->top];
888 regstack->top -= 1;
889 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
891 return pop_insn;
894 /* Emit an insn before or after INSN to swap virtual register REG with
895 the top of stack. REGSTACK is the stack state before the swap, and
896 is updated to reflect the swap. A swap insn is represented as a
897 PARALLEL of two patterns: each pattern moves one reg to the other.
899 If REG is already at the top of the stack, no insn is emitted. */
901 static void
902 emit_swap_insn (rtx insn, stack regstack, rtx reg)
904 int hard_regno;
905 rtx swap_rtx;
906 int tmp, other_reg; /* swap regno temps */
907 rtx i1; /* the stack-reg insn prior to INSN */
908 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
910 hard_regno = get_hard_regnum (regstack, reg);
912 gcc_assert (hard_regno >= FIRST_STACK_REG);
913 if (hard_regno == FIRST_STACK_REG)
914 return;
916 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
918 tmp = regstack->reg[other_reg];
919 regstack->reg[other_reg] = regstack->reg[regstack->top];
920 regstack->reg[regstack->top] = tmp;
922 /* Find the previous insn involving stack regs, but don't pass a
923 block boundary. */
924 i1 = NULL;
925 if (current_block && insn != BB_HEAD (current_block))
927 rtx tmp = PREV_INSN (insn);
928 rtx limit = PREV_INSN (BB_HEAD (current_block));
929 while (tmp != limit)
931 if (LABEL_P (tmp)
932 || CALL_P (tmp)
933 || NOTE_INSN_BASIC_BLOCK_P (tmp)
934 || (NOTE_P (tmp)
935 && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_UNLIKELY_EXECUTED_CODE)
936 || (NONJUMP_INSN_P (tmp)
937 && stack_regs_mentioned (tmp)))
939 i1 = tmp;
940 break;
942 tmp = PREV_INSN (tmp);
946 if (i1 != NULL_RTX
947 && (i1set = single_set (i1)) != NULL_RTX)
949 rtx i1src = *get_true_reg (&SET_SRC (i1set));
950 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
952 /* If the previous register stack push was from the reg we are to
953 swap with, omit the swap. */
955 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
956 && REG_P (i1src)
957 && REGNO (i1src) == (unsigned) hard_regno - 1
958 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
959 return;
961 /* If the previous insn wrote to the reg we are to swap with,
962 omit the swap. */
964 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
965 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
966 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
967 return;
970 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
971 FP_MODE_REG (FIRST_STACK_REG, XFmode));
973 if (i1)
974 emit_insn_after (swap_rtx, i1);
975 else if (current_block)
976 emit_insn_before (swap_rtx, BB_HEAD (current_block));
977 else
978 emit_insn_before (swap_rtx, insn);
981 /* Emit an insns before INSN to swap virtual register SRC1 with
982 the top of stack and virtual register SRC2 with second stack
983 slot. REGSTACK is the stack state before the swaps, and
984 is updated to reflect the swaps. A swap insn is represented as a
985 PARALLEL of two patterns: each pattern moves one reg to the other.
987 If SRC1 and/or SRC2 are already at the right place, no swap insn
988 is emitted. */
990 static void
991 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
993 struct stack_def temp_stack;
994 int regno, j, k, temp;
996 temp_stack = *regstack;
998 /* Place operand 1 at the top of stack. */
999 regno = get_hard_regnum (&temp_stack, src1);
1000 gcc_assert (regno >= 0);
1001 if (regno != FIRST_STACK_REG)
1003 k = temp_stack.top - (regno - FIRST_STACK_REG);
1004 j = temp_stack.top;
1006 temp = temp_stack.reg[k];
1007 temp_stack.reg[k] = temp_stack.reg[j];
1008 temp_stack.reg[j] = temp;
1011 /* Place operand 2 next on the stack. */
1012 regno = get_hard_regnum (&temp_stack, src2);
1013 gcc_assert (regno >= 0);
1014 if (regno != FIRST_STACK_REG + 1)
1016 k = temp_stack.top - (regno - FIRST_STACK_REG);
1017 j = temp_stack.top - 1;
1019 temp = temp_stack.reg[k];
1020 temp_stack.reg[k] = temp_stack.reg[j];
1021 temp_stack.reg[j] = temp;
1024 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1027 /* Handle a move to or from a stack register in PAT, which is in INSN.
1028 REGSTACK is the current stack. Return whether a control flow insn
1029 was deleted in the process. */
1031 static bool
1032 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
1034 rtx *psrc = get_true_reg (&SET_SRC (pat));
1035 rtx *pdest = get_true_reg (&SET_DEST (pat));
1036 rtx src, dest;
1037 rtx note;
1038 bool control_flow_insn_deleted = false;
1040 src = *psrc; dest = *pdest;
1042 if (STACK_REG_P (src) && STACK_REG_P (dest))
1044 /* Write from one stack reg to another. If SRC dies here, then
1045 just change the register mapping and delete the insn. */
1047 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1048 if (note)
1050 int i;
1052 /* If this is a no-op move, there must not be a REG_DEAD note. */
1053 gcc_assert (REGNO (src) != REGNO (dest));
1055 for (i = regstack->top; i >= 0; i--)
1056 if (regstack->reg[i] == REGNO (src))
1057 break;
1059 /* The destination must be dead, or life analysis is borked. */
1060 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1062 /* If the source is not live, this is yet another case of
1063 uninitialized variables. Load up a NaN instead. */
1064 if (i < 0)
1065 return move_nan_for_stack_reg (insn, regstack, dest);
1067 /* It is possible that the dest is unused after this insn.
1068 If so, just pop the src. */
1070 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1071 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1072 else
1074 regstack->reg[i] = REGNO (dest);
1075 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1076 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1079 control_flow_insn_deleted |= control_flow_insn_p (insn);
1080 delete_insn (insn);
1081 return control_flow_insn_deleted;
1084 /* The source reg does not die. */
1086 /* If this appears to be a no-op move, delete it, or else it
1087 will confuse the machine description output patterns. But if
1088 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1089 for REG_UNUSED will not work for deleted insns. */
1091 if (REGNO (src) == REGNO (dest))
1093 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1094 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1096 control_flow_insn_deleted |= control_flow_insn_p (insn);
1097 delete_insn (insn);
1098 return control_flow_insn_deleted;
1101 /* The destination ought to be dead. */
1102 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1104 replace_reg (psrc, get_hard_regnum (regstack, src));
1106 regstack->reg[++regstack->top] = REGNO (dest);
1107 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1108 replace_reg (pdest, FIRST_STACK_REG);
1110 else if (STACK_REG_P (src))
1112 /* Save from a stack reg to MEM, or possibly integer reg. Since
1113 only top of stack may be saved, emit an exchange first if
1114 needs be. */
1116 emit_swap_insn (insn, regstack, src);
1118 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1119 if (note)
1121 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1122 regstack->top--;
1123 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1125 else if ((GET_MODE (src) == XFmode)
1126 && regstack->top < REG_STACK_SIZE - 1)
1128 /* A 387 cannot write an XFmode value to a MEM without
1129 clobbering the source reg. The output code can handle
1130 this by reading back the value from the MEM.
1131 But it is more efficient to use a temp register if one is
1132 available. Push the source value here if the register
1133 stack is not full, and then write the value to memory via
1134 a pop. */
1135 rtx push_rtx, push_insn;
1136 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1138 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1139 push_insn = emit_insn_before (push_rtx, insn);
1140 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1141 REG_NOTES (insn));
1144 replace_reg (psrc, FIRST_STACK_REG);
1146 else
1148 gcc_assert (STACK_REG_P (dest));
1150 /* Load from MEM, or possibly integer REG or constant, into the
1151 stack regs. The actual target is always the top of the
1152 stack. The stack mapping is changed to reflect that DEST is
1153 now at top of stack. */
1155 /* The destination ought to be dead. */
1156 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1158 gcc_assert (regstack->top < REG_STACK_SIZE);
1160 regstack->reg[++regstack->top] = REGNO (dest);
1161 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1162 replace_reg (pdest, FIRST_STACK_REG);
1165 return control_flow_insn_deleted;
1168 /* A helper function which replaces INSN with a pattern that loads up
1169 a NaN into DEST, then invokes move_for_stack_reg. */
1171 static bool
1172 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest)
1174 rtx pat;
1176 dest = FP_MODE_REG (REGNO (dest), SFmode);
1177 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1178 PATTERN (insn) = pat;
1179 INSN_CODE (insn) = -1;
1181 return move_for_stack_reg (insn, regstack, pat);
1184 /* Swap the condition on a branch, if there is one. Return true if we
1185 found a condition to swap. False if the condition was not used as
1186 such. */
1188 static int
1189 swap_rtx_condition_1 (rtx pat)
1191 const char *fmt;
1192 int i, r = 0;
1194 if (COMPARISON_P (pat))
1196 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1197 r = 1;
1199 else
1201 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1202 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1204 if (fmt[i] == 'E')
1206 int j;
1208 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1209 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1211 else if (fmt[i] == 'e')
1212 r |= swap_rtx_condition_1 (XEXP (pat, i));
1216 return r;
1219 static int
1220 swap_rtx_condition (rtx insn)
1222 rtx pat = PATTERN (insn);
1224 /* We're looking for a single set to cc0 or an HImode temporary. */
1226 if (GET_CODE (pat) == SET
1227 && REG_P (SET_DEST (pat))
1228 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1230 insn = next_flags_user (insn);
1231 if (insn == NULL_RTX)
1232 return 0;
1233 pat = PATTERN (insn);
1236 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1237 not doing anything with the cc value right now. We may be able to
1238 search for one though. */
1240 if (GET_CODE (pat) == SET
1241 && GET_CODE (SET_SRC (pat)) == UNSPEC
1242 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1244 rtx dest = SET_DEST (pat);
1246 /* Search forward looking for the first use of this value.
1247 Stop at block boundaries. */
1248 while (insn != BB_END (current_block))
1250 insn = NEXT_INSN (insn);
1251 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1252 break;
1253 if (CALL_P (insn))
1254 return 0;
1257 /* So we've found the insn using this value. If it is anything
1258 other than sahf, aka unspec 10, or the value does not die
1259 (meaning we'd have to search further), then we must give up. */
1260 pat = PATTERN (insn);
1261 if (GET_CODE (pat) != SET
1262 || GET_CODE (SET_SRC (pat)) != UNSPEC
1263 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1264 || ! dead_or_set_p (insn, dest))
1265 return 0;
1267 /* Now we are prepared to handle this as a normal cc0 setter. */
1268 insn = next_flags_user (insn);
1269 if (insn == NULL_RTX)
1270 return 0;
1271 pat = PATTERN (insn);
1274 if (swap_rtx_condition_1 (pat))
1276 int fail = 0;
1277 INSN_CODE (insn) = -1;
1278 if (recog_memoized (insn) == -1)
1279 fail = 1;
1280 /* In case the flags don't die here, recurse to try fix
1281 following user too. */
1282 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1284 insn = next_flags_user (insn);
1285 if (!insn || !swap_rtx_condition (insn))
1286 fail = 1;
1288 if (fail)
1290 swap_rtx_condition_1 (pat);
1291 return 0;
1293 return 1;
1295 return 0;
1298 /* Handle a comparison. Special care needs to be taken to avoid
1299 causing comparisons that a 387 cannot do correctly, such as EQ.
1301 Also, a pop insn may need to be emitted. The 387 does have an
1302 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1303 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1304 set up. */
1306 static void
1307 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1309 rtx *src1, *src2;
1310 rtx src1_note, src2_note;
1311 rtx flags_user;
1313 src1 = get_true_reg (&XEXP (pat_src, 0));
1314 src2 = get_true_reg (&XEXP (pat_src, 1));
1315 flags_user = next_flags_user (insn);
1317 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1318 registers that die in this insn - move those to stack top first. */
1319 if ((! STACK_REG_P (*src1)
1320 || (STACK_REG_P (*src2)
1321 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1322 && swap_rtx_condition (insn))
1324 rtx temp;
1325 temp = XEXP (pat_src, 0);
1326 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1327 XEXP (pat_src, 1) = temp;
1329 src1 = get_true_reg (&XEXP (pat_src, 0));
1330 src2 = get_true_reg (&XEXP (pat_src, 1));
1332 INSN_CODE (insn) = -1;
1335 /* We will fix any death note later. */
1337 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1339 if (STACK_REG_P (*src2))
1340 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1341 else
1342 src2_note = NULL_RTX;
1344 emit_swap_insn (insn, regstack, *src1);
1346 replace_reg (src1, FIRST_STACK_REG);
1348 if (STACK_REG_P (*src2))
1349 replace_reg (src2, get_hard_regnum (regstack, *src2));
1351 if (src1_note)
1353 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1354 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1357 /* If the second operand dies, handle that. But if the operands are
1358 the same stack register, don't bother, because only one death is
1359 needed, and it was just handled. */
1361 if (src2_note
1362 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1363 && REGNO (*src1) == REGNO (*src2)))
1365 /* As a special case, two regs may die in this insn if src2 is
1366 next to top of stack and the top of stack also dies. Since
1367 we have already popped src1, "next to top of stack" is really
1368 at top (FIRST_STACK_REG) now. */
1370 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1371 && src1_note)
1373 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1374 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1376 else
1378 /* The 386 can only represent death of the first operand in
1379 the case handled above. In all other cases, emit a separate
1380 pop and remove the death note from here. */
1382 /* link_cc0_insns (insn); */
1384 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1386 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1387 EMIT_AFTER);
1392 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1393 is the current register layout. Return whether a control flow insn
1394 was deleted in the process. */
1396 static bool
1397 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1399 rtx *dest, *src;
1400 bool control_flow_insn_deleted = false;
1402 switch (GET_CODE (pat))
1404 case USE:
1405 /* Deaths in USE insns can happen in non optimizing compilation.
1406 Handle them by popping the dying register. */
1407 src = get_true_reg (&XEXP (pat, 0));
1408 if (STACK_REG_P (*src)
1409 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1411 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1412 return control_flow_insn_deleted;
1414 /* ??? Uninitialized USE should not happen. */
1415 else
1416 gcc_assert (get_hard_regnum (regstack, *src) != -1);
1417 break;
1419 case CLOBBER:
1421 rtx note;
1423 dest = get_true_reg (&XEXP (pat, 0));
1424 if (STACK_REG_P (*dest))
1426 note = find_reg_note (insn, REG_DEAD, *dest);
1428 if (pat != PATTERN (insn))
1430 /* The fix_truncdi_1 pattern wants to be able to allocate
1431 it's own scratch register. It does this by clobbering
1432 an fp reg so that it is assured of an empty reg-stack
1433 register. If the register is live, kill it now.
1434 Remove the DEAD/UNUSED note so we don't try to kill it
1435 later too. */
1437 if (note)
1438 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1439 else
1441 note = find_reg_note (insn, REG_UNUSED, *dest);
1442 gcc_assert (note);
1444 remove_note (insn, note);
1445 replace_reg (dest, FIRST_STACK_REG + 1);
1447 else
1449 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1450 indicates an uninitialized value. Because reload removed
1451 all other clobbers, this must be due to a function
1452 returning without a value. Load up a NaN. */
1454 if (!note)
1456 rtx t = *dest;
1457 if (get_hard_regnum (regstack, t) == -1)
1458 control_flow_insn_deleted
1459 |= move_nan_for_stack_reg (insn, regstack, t);
1460 if (COMPLEX_MODE_P (GET_MODE (t)))
1462 t = FP_MODE_REG (REGNO (t) + 1, DFmode);
1463 if (get_hard_regnum (regstack, t) == -1)
1464 control_flow_insn_deleted
1465 |= move_nan_for_stack_reg (insn, regstack, t);
1470 break;
1473 case SET:
1475 rtx *src1 = (rtx *) 0, *src2;
1476 rtx src1_note, src2_note;
1477 rtx pat_src;
1479 dest = get_true_reg (&SET_DEST (pat));
1480 src = get_true_reg (&SET_SRC (pat));
1481 pat_src = SET_SRC (pat);
1483 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1484 if (STACK_REG_P (*src)
1485 || (STACK_REG_P (*dest)
1486 && (REG_P (*src) || MEM_P (*src)
1487 || GET_CODE (*src) == CONST_DOUBLE)))
1489 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1490 break;
1493 switch (GET_CODE (pat_src))
1495 case COMPARE:
1496 compare_for_stack_reg (insn, regstack, pat_src);
1497 break;
1499 case CALL:
1501 int count;
1502 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1503 --count >= 0;)
1505 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1506 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1509 replace_reg (dest, FIRST_STACK_REG);
1510 break;
1512 case REG:
1513 /* This is a `tstM2' case. */
1514 gcc_assert (*dest == cc0_rtx);
1515 src1 = src;
1517 /* Fall through. */
1519 case FLOAT_TRUNCATE:
1520 case SQRT:
1521 case ABS:
1522 case NEG:
1523 /* These insns only operate on the top of the stack. DEST might
1524 be cc0_rtx if we're processing a tstM pattern. Also, it's
1525 possible that the tstM case results in a REG_DEAD note on the
1526 source. */
1528 if (src1 == 0)
1529 src1 = get_true_reg (&XEXP (pat_src, 0));
1531 emit_swap_insn (insn, regstack, *src1);
1533 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1535 if (STACK_REG_P (*dest))
1536 replace_reg (dest, FIRST_STACK_REG);
1538 if (src1_note)
1540 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1541 regstack->top--;
1542 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1545 replace_reg (src1, FIRST_STACK_REG);
1546 break;
1548 case MINUS:
1549 case DIV:
1550 /* On i386, reversed forms of subM3 and divM3 exist for
1551 MODE_FLOAT, so the same code that works for addM3 and mulM3
1552 can be used. */
1553 case MULT:
1554 case PLUS:
1555 /* These insns can accept the top of stack as a destination
1556 from a stack reg or mem, or can use the top of stack as a
1557 source and some other stack register (possibly top of stack)
1558 as a destination. */
1560 src1 = get_true_reg (&XEXP (pat_src, 0));
1561 src2 = get_true_reg (&XEXP (pat_src, 1));
1563 /* We will fix any death note later. */
1565 if (STACK_REG_P (*src1))
1566 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1567 else
1568 src1_note = NULL_RTX;
1569 if (STACK_REG_P (*src2))
1570 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1571 else
1572 src2_note = NULL_RTX;
1574 /* If either operand is not a stack register, then the dest
1575 must be top of stack. */
1577 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1578 emit_swap_insn (insn, regstack, *dest);
1579 else
1581 /* Both operands are REG. If neither operand is already
1582 at the top of stack, choose to make the one that is the dest
1583 the new top of stack. */
1585 int src1_hard_regnum, src2_hard_regnum;
1587 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1588 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1589 gcc_assert (src1_hard_regnum != -1);
1590 gcc_assert (src2_hard_regnum != -1);
1592 if (src1_hard_regnum != FIRST_STACK_REG
1593 && src2_hard_regnum != FIRST_STACK_REG)
1594 emit_swap_insn (insn, regstack, *dest);
1597 if (STACK_REG_P (*src1))
1598 replace_reg (src1, get_hard_regnum (regstack, *src1));
1599 if (STACK_REG_P (*src2))
1600 replace_reg (src2, get_hard_regnum (regstack, *src2));
1602 if (src1_note)
1604 rtx src1_reg = XEXP (src1_note, 0);
1606 /* If the register that dies is at the top of stack, then
1607 the destination is somewhere else - merely substitute it.
1608 But if the reg that dies is not at top of stack, then
1609 move the top of stack to the dead reg, as though we had
1610 done the insn and then a store-with-pop. */
1612 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1614 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1615 replace_reg (dest, get_hard_regnum (regstack, *dest));
1617 else
1619 int regno = get_hard_regnum (regstack, src1_reg);
1621 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1622 replace_reg (dest, regno);
1624 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1625 = regstack->reg[regstack->top];
1628 CLEAR_HARD_REG_BIT (regstack->reg_set,
1629 REGNO (XEXP (src1_note, 0)));
1630 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1631 regstack->top--;
1633 else if (src2_note)
1635 rtx src2_reg = XEXP (src2_note, 0);
1636 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1638 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1639 replace_reg (dest, get_hard_regnum (regstack, *dest));
1641 else
1643 int regno = get_hard_regnum (regstack, src2_reg);
1645 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1646 replace_reg (dest, regno);
1648 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1649 = regstack->reg[regstack->top];
1652 CLEAR_HARD_REG_BIT (regstack->reg_set,
1653 REGNO (XEXP (src2_note, 0)));
1654 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1655 regstack->top--;
1657 else
1659 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1660 replace_reg (dest, get_hard_regnum (regstack, *dest));
1663 /* Keep operand 1 matching with destination. */
1664 if (COMMUTATIVE_ARITH_P (pat_src)
1665 && REG_P (*src1) && REG_P (*src2)
1666 && REGNO (*src1) != REGNO (*dest))
1668 int tmp = REGNO (*src1);
1669 replace_reg (src1, REGNO (*src2));
1670 replace_reg (src2, tmp);
1672 break;
1674 case UNSPEC:
1675 switch (XINT (pat_src, 1))
1677 case UNSPEC_SIN:
1678 case UNSPEC_COS:
1679 case UNSPEC_FRNDINT:
1680 case UNSPEC_F2XM1:
1682 case UNSPEC_FRNDINT_FLOOR:
1683 case UNSPEC_FRNDINT_CEIL:
1684 case UNSPEC_FRNDINT_TRUNC:
1685 case UNSPEC_FRNDINT_MASK_PM:
1687 /* These insns only operate on the top of the stack. */
1689 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1691 emit_swap_insn (insn, regstack, *src1);
1693 /* Input should never die, it is
1694 replaced with output. */
1695 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1696 gcc_assert (!src1_note);
1698 if (STACK_REG_P (*dest))
1699 replace_reg (dest, FIRST_STACK_REG);
1701 replace_reg (src1, FIRST_STACK_REG);
1702 break;
1704 case UNSPEC_FPATAN:
1705 case UNSPEC_FYL2X:
1706 case UNSPEC_FYL2XP1:
1707 /* These insns operate on the top two stack slots. */
1709 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1710 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1712 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1713 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1715 swap_to_top (insn, regstack, *src1, *src2);
1717 replace_reg (src1, FIRST_STACK_REG);
1718 replace_reg (src2, FIRST_STACK_REG + 1);
1720 if (src1_note)
1721 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1722 if (src2_note)
1723 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1725 /* Pop both input operands from the stack. */
1726 CLEAR_HARD_REG_BIT (regstack->reg_set,
1727 regstack->reg[regstack->top]);
1728 CLEAR_HARD_REG_BIT (regstack->reg_set,
1729 regstack->reg[regstack->top - 1]);
1730 regstack->top -= 2;
1732 /* Push the result back onto the stack. */
1733 regstack->reg[++regstack->top] = REGNO (*dest);
1734 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1735 replace_reg (dest, FIRST_STACK_REG);
1736 break;
1738 case UNSPEC_FSCALE_FRACT:
1739 case UNSPEC_FPREM_F:
1740 case UNSPEC_FPREM1_F:
1741 /* These insns operate on the top two stack slots.
1742 first part of double input, double output insn. */
1744 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1745 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1747 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1748 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1750 /* Inputs should never die, they are
1751 replaced with outputs. */
1752 gcc_assert (!src1_note);
1753 gcc_assert (!src2_note);
1755 swap_to_top (insn, regstack, *src1, *src2);
1757 /* Push the result back onto stack. Empty stack slot
1758 will be filled in second part of insn. */
1759 if (STACK_REG_P (*dest)) {
1760 regstack->reg[regstack->top] = REGNO (*dest);
1761 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1762 replace_reg (dest, FIRST_STACK_REG);
1765 replace_reg (src1, FIRST_STACK_REG);
1766 replace_reg (src2, FIRST_STACK_REG + 1);
1767 break;
1769 case UNSPEC_FSCALE_EXP:
1770 case UNSPEC_FPREM_U:
1771 case UNSPEC_FPREM1_U:
1772 /* These insns operate on the top two stack slots./
1773 second part of double input, double output insn. */
1775 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1776 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1778 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1779 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1781 /* Inputs should never die, they are
1782 replaced with outputs. */
1783 gcc_assert (!src1_note);
1784 gcc_assert (!src2_note);
1786 swap_to_top (insn, regstack, *src1, *src2);
1788 /* Push the result back onto stack. Fill empty slot from
1789 first part of insn and fix top of stack pointer. */
1790 if (STACK_REG_P (*dest)) {
1791 regstack->reg[regstack->top - 1] = REGNO (*dest);
1792 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1793 replace_reg (dest, FIRST_STACK_REG + 1);
1796 replace_reg (src1, FIRST_STACK_REG);
1797 replace_reg (src2, FIRST_STACK_REG + 1);
1798 break;
1800 case UNSPEC_SINCOS_COS:
1801 case UNSPEC_TAN_ONE:
1802 case UNSPEC_XTRACT_FRACT:
1803 /* These insns operate on the top two stack slots,
1804 first part of one input, double output insn. */
1806 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1808 emit_swap_insn (insn, regstack, *src1);
1810 /* Input should never die, it is
1811 replaced with output. */
1812 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1813 gcc_assert (!src1_note);
1815 /* Push the result back onto stack. Empty stack slot
1816 will be filled in second part of insn. */
1817 if (STACK_REG_P (*dest)) {
1818 regstack->reg[regstack->top + 1] = REGNO (*dest);
1819 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1820 replace_reg (dest, FIRST_STACK_REG);
1823 replace_reg (src1, FIRST_STACK_REG);
1824 break;
1826 case UNSPEC_SINCOS_SIN:
1827 case UNSPEC_TAN_TAN:
1828 case UNSPEC_XTRACT_EXP:
1829 /* These insns operate on the top two stack slots,
1830 second part of one input, double output insn. */
1832 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1834 emit_swap_insn (insn, regstack, *src1);
1836 /* Input should never die, it is
1837 replaced with output. */
1838 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1839 gcc_assert (!src1_note);
1841 /* Push the result back onto stack. Fill empty slot from
1842 first part of insn and fix top of stack pointer. */
1843 if (STACK_REG_P (*dest)) {
1844 regstack->reg[regstack->top] = REGNO (*dest);
1845 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1846 replace_reg (dest, FIRST_STACK_REG + 1);
1848 regstack->top++;
1851 replace_reg (src1, FIRST_STACK_REG);
1852 break;
1854 case UNSPEC_SAHF:
1855 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1856 The combination matches the PPRO fcomi instruction. */
1858 pat_src = XVECEXP (pat_src, 0, 0);
1859 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1860 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1861 /* Fall through. */
1863 case UNSPEC_FNSTSW:
1864 /* Combined fcomp+fnstsw generated for doing well with
1865 CSE. When optimizing this would have been broken
1866 up before now. */
1868 pat_src = XVECEXP (pat_src, 0, 0);
1869 gcc_assert (GET_CODE (pat_src) == COMPARE);
1871 compare_for_stack_reg (insn, regstack, pat_src);
1872 break;
1874 default:
1875 gcc_unreachable ();
1877 break;
1879 case IF_THEN_ELSE:
1880 /* This insn requires the top of stack to be the destination. */
1882 src1 = get_true_reg (&XEXP (pat_src, 1));
1883 src2 = get_true_reg (&XEXP (pat_src, 2));
1885 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1886 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1888 /* If the comparison operator is an FP comparison operator,
1889 it is handled correctly by compare_for_stack_reg () who
1890 will move the destination to the top of stack. But if the
1891 comparison operator is not an FP comparison operator, we
1892 have to handle it here. */
1893 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1894 && REGNO (*dest) != regstack->reg[regstack->top])
1896 /* In case one of operands is the top of stack and the operands
1897 dies, it is safe to make it the destination operand by
1898 reversing the direction of cmove and avoid fxch. */
1899 if ((REGNO (*src1) == regstack->reg[regstack->top]
1900 && src1_note)
1901 || (REGNO (*src2) == regstack->reg[regstack->top]
1902 && src2_note))
1904 int idx1 = (get_hard_regnum (regstack, *src1)
1905 - FIRST_STACK_REG);
1906 int idx2 = (get_hard_regnum (regstack, *src2)
1907 - FIRST_STACK_REG);
1909 /* Make reg-stack believe that the operands are already
1910 swapped on the stack */
1911 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1912 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1914 /* Reverse condition to compensate the operand swap.
1915 i386 do have comparison always reversible. */
1916 PUT_CODE (XEXP (pat_src, 0),
1917 reversed_comparison_code (XEXP (pat_src, 0), insn));
1919 else
1920 emit_swap_insn (insn, regstack, *dest);
1924 rtx src_note [3];
1925 int i;
1927 src_note[0] = 0;
1928 src_note[1] = src1_note;
1929 src_note[2] = src2_note;
1931 if (STACK_REG_P (*src1))
1932 replace_reg (src1, get_hard_regnum (regstack, *src1));
1933 if (STACK_REG_P (*src2))
1934 replace_reg (src2, get_hard_regnum (regstack, *src2));
1936 for (i = 1; i <= 2; i++)
1937 if (src_note [i])
1939 int regno = REGNO (XEXP (src_note[i], 0));
1941 /* If the register that dies is not at the top of
1942 stack, then move the top of stack to the dead reg.
1943 Top of stack should never die, as it is the
1944 destination. */
1945 gcc_assert (regno != regstack->reg[regstack->top]);
1946 remove_regno_note (insn, REG_DEAD, regno);
1947 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1948 EMIT_AFTER);
1952 /* Make dest the top of stack. Add dest to regstack if
1953 not present. */
1954 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1955 regstack->reg[++regstack->top] = REGNO (*dest);
1956 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1957 replace_reg (dest, FIRST_STACK_REG);
1958 break;
1960 default:
1961 gcc_unreachable ();
1963 break;
1966 default:
1967 break;
1970 return control_flow_insn_deleted;
1973 /* Substitute hard regnums for any stack regs in INSN, which has
1974 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1975 before the insn, and is updated with changes made here.
1977 There are several requirements and assumptions about the use of
1978 stack-like regs in asm statements. These rules are enforced by
1979 record_asm_stack_regs; see comments there for details. Any
1980 asm_operands left in the RTL at this point may be assume to meet the
1981 requirements, since record_asm_stack_regs removes any problem asm. */
1983 static void
1984 subst_asm_stack_regs (rtx insn, stack regstack)
1986 rtx body = PATTERN (insn);
1987 int alt;
1989 rtx *note_reg; /* Array of note contents */
1990 rtx **note_loc; /* Address of REG field of each note */
1991 enum reg_note *note_kind; /* The type of each note */
1993 rtx *clobber_reg = 0;
1994 rtx **clobber_loc = 0;
1996 struct stack_def temp_stack;
1997 int n_notes;
1998 int n_clobbers;
1999 rtx note;
2000 int i;
2001 int n_inputs, n_outputs;
2003 if (! check_asm_stack_operands (insn))
2004 return;
2006 /* Find out what the constraints required. If no constraint
2007 alternative matches, that is a compiler bug: we should have caught
2008 such an insn in check_asm_stack_operands. */
2009 extract_insn (insn);
2010 constrain_operands (1);
2011 alt = which_alternative;
2013 preprocess_constraints ();
2015 n_inputs = get_asm_operand_n_inputs (body);
2016 n_outputs = recog_data.n_operands - n_inputs;
2018 gcc_assert (alt >= 0);
2020 /* Strip SUBREGs here to make the following code simpler. */
2021 for (i = 0; i < recog_data.n_operands; i++)
2022 if (GET_CODE (recog_data.operand[i]) == SUBREG
2023 && REG_P (SUBREG_REG (recog_data.operand[i])))
2025 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2026 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2029 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2031 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2032 i++;
2034 note_reg = alloca (i * sizeof (rtx));
2035 note_loc = alloca (i * sizeof (rtx *));
2036 note_kind = alloca (i * sizeof (enum reg_note));
2038 n_notes = 0;
2039 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2041 rtx reg = XEXP (note, 0);
2042 rtx *loc = & XEXP (note, 0);
2044 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2046 loc = & SUBREG_REG (reg);
2047 reg = SUBREG_REG (reg);
2050 if (STACK_REG_P (reg)
2051 && (REG_NOTE_KIND (note) == REG_DEAD
2052 || REG_NOTE_KIND (note) == REG_UNUSED))
2054 note_reg[n_notes] = reg;
2055 note_loc[n_notes] = loc;
2056 note_kind[n_notes] = REG_NOTE_KIND (note);
2057 n_notes++;
2061 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2063 n_clobbers = 0;
2065 if (GET_CODE (body) == PARALLEL)
2067 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2068 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2070 for (i = 0; i < XVECLEN (body, 0); i++)
2071 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2073 rtx clobber = XVECEXP (body, 0, i);
2074 rtx reg = XEXP (clobber, 0);
2075 rtx *loc = & XEXP (clobber, 0);
2077 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2079 loc = & SUBREG_REG (reg);
2080 reg = SUBREG_REG (reg);
2083 if (STACK_REG_P (reg))
2085 clobber_reg[n_clobbers] = reg;
2086 clobber_loc[n_clobbers] = loc;
2087 n_clobbers++;
2092 temp_stack = *regstack;
2094 /* Put the input regs into the desired place in TEMP_STACK. */
2096 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2097 if (STACK_REG_P (recog_data.operand[i])
2098 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2099 FLOAT_REGS)
2100 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2102 /* If an operand needs to be in a particular reg in
2103 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2104 these constraints are for single register classes, and
2105 reload guaranteed that operand[i] is already in that class,
2106 we can just use REGNO (recog_data.operand[i]) to know which
2107 actual reg this operand needs to be in. */
2109 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2111 gcc_assert (regno >= 0);
2113 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2115 /* recog_data.operand[i] is not in the right place. Find
2116 it and swap it with whatever is already in I's place.
2117 K is where recog_data.operand[i] is now. J is where it
2118 should be. */
2119 int j, k, temp;
2121 k = temp_stack.top - (regno - FIRST_STACK_REG);
2122 j = (temp_stack.top
2123 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2125 temp = temp_stack.reg[k];
2126 temp_stack.reg[k] = temp_stack.reg[j];
2127 temp_stack.reg[j] = temp;
2131 /* Emit insns before INSN to make sure the reg-stack is in the right
2132 order. */
2134 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2136 /* Make the needed input register substitutions. Do death notes and
2137 clobbers too, because these are for inputs, not outputs. */
2139 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2140 if (STACK_REG_P (recog_data.operand[i]))
2142 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2144 gcc_assert (regnum >= 0);
2146 replace_reg (recog_data.operand_loc[i], regnum);
2149 for (i = 0; i < n_notes; i++)
2150 if (note_kind[i] == REG_DEAD)
2152 int regnum = get_hard_regnum (regstack, note_reg[i]);
2154 gcc_assert (regnum >= 0);
2156 replace_reg (note_loc[i], regnum);
2159 for (i = 0; i < n_clobbers; i++)
2161 /* It's OK for a CLOBBER to reference a reg that is not live.
2162 Don't try to replace it in that case. */
2163 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2165 if (regnum >= 0)
2167 /* Sigh - clobbers always have QImode. But replace_reg knows
2168 that these regs can't be MODE_INT and will assert. Just put
2169 the right reg there without calling replace_reg. */
2171 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2175 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2177 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2178 if (STACK_REG_P (recog_data.operand[i]))
2180 /* An input reg is implicitly popped if it is tied to an
2181 output, or if there is a CLOBBER for it. */
2182 int j;
2184 for (j = 0; j < n_clobbers; j++)
2185 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2186 break;
2188 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2190 /* recog_data.operand[i] might not be at the top of stack.
2191 But that's OK, because all we need to do is pop the
2192 right number of regs off of the top of the reg-stack.
2193 record_asm_stack_regs guaranteed that all implicitly
2194 popped regs were grouped at the top of the reg-stack. */
2196 CLEAR_HARD_REG_BIT (regstack->reg_set,
2197 regstack->reg[regstack->top]);
2198 regstack->top--;
2202 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2203 Note that there isn't any need to substitute register numbers.
2204 ??? Explain why this is true. */
2206 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2208 /* See if there is an output for this hard reg. */
2209 int j;
2211 for (j = 0; j < n_outputs; j++)
2212 if (STACK_REG_P (recog_data.operand[j])
2213 && REGNO (recog_data.operand[j]) == (unsigned) i)
2215 regstack->reg[++regstack->top] = i;
2216 SET_HARD_REG_BIT (regstack->reg_set, i);
2217 break;
2221 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2222 input that the asm didn't implicitly pop. If the asm didn't
2223 implicitly pop an input reg, that reg will still be live.
2225 Note that we can't use find_regno_note here: the register numbers
2226 in the death notes have already been substituted. */
2228 for (i = 0; i < n_outputs; i++)
2229 if (STACK_REG_P (recog_data.operand[i]))
2231 int j;
2233 for (j = 0; j < n_notes; j++)
2234 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2235 && note_kind[j] == REG_UNUSED)
2237 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2238 EMIT_AFTER);
2239 break;
2243 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2244 if (STACK_REG_P (recog_data.operand[i]))
2246 int j;
2248 for (j = 0; j < n_notes; j++)
2249 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2250 && note_kind[j] == REG_DEAD
2251 && TEST_HARD_REG_BIT (regstack->reg_set,
2252 REGNO (recog_data.operand[i])))
2254 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2255 EMIT_AFTER);
2256 break;
2261 /* Substitute stack hard reg numbers for stack virtual registers in
2262 INSN. Non-stack register numbers are not changed. REGSTACK is the
2263 current stack content. Insns may be emitted as needed to arrange the
2264 stack for the 387 based on the contents of the insn. Return whether
2265 a control flow insn was deleted in the process. */
2267 static bool
2268 subst_stack_regs (rtx insn, stack regstack)
2270 rtx *note_link, note;
2271 bool control_flow_insn_deleted = false;
2272 int i;
2274 if (CALL_P (insn))
2276 int top = regstack->top;
2278 /* If there are any floating point parameters to be passed in
2279 registers for this call, make sure they are in the right
2280 order. */
2282 if (top >= 0)
2284 straighten_stack (PREV_INSN (insn), regstack);
2286 /* Now mark the arguments as dead after the call. */
2288 while (regstack->top >= 0)
2290 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2291 regstack->top--;
2296 /* Do the actual substitution if any stack regs are mentioned.
2297 Since we only record whether entire insn mentions stack regs, and
2298 subst_stack_regs_pat only works for patterns that contain stack regs,
2299 we must check each pattern in a parallel here. A call_value_pop could
2300 fail otherwise. */
2302 if (stack_regs_mentioned (insn))
2304 int n_operands = asm_noperands (PATTERN (insn));
2305 if (n_operands >= 0)
2307 /* This insn is an `asm' with operands. Decode the operands,
2308 decide how many are inputs, and do register substitution.
2309 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2311 subst_asm_stack_regs (insn, regstack);
2312 return control_flow_insn_deleted;
2315 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2316 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2318 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2320 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2321 XVECEXP (PATTERN (insn), 0, i)
2322 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2323 control_flow_insn_deleted
2324 |= subst_stack_regs_pat (insn, regstack,
2325 XVECEXP (PATTERN (insn), 0, i));
2328 else
2329 control_flow_insn_deleted
2330 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2333 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2334 REG_UNUSED will already have been dealt with, so just return. */
2336 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2337 return control_flow_insn_deleted;
2339 /* If there is a REG_UNUSED note on a stack register on this insn,
2340 the indicated reg must be popped. The REG_UNUSED note is removed,
2341 since the form of the newly emitted pop insn references the reg,
2342 making it no longer `unset'. */
2344 note_link = &REG_NOTES (insn);
2345 for (note = *note_link; note; note = XEXP (note, 1))
2346 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2348 *note_link = XEXP (note, 1);
2349 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2351 else
2352 note_link = &XEXP (note, 1);
2354 return control_flow_insn_deleted;
2357 /* Change the organization of the stack so that it fits a new basic
2358 block. Some registers might have to be popped, but there can never be
2359 a register live in the new block that is not now live.
2361 Insert any needed insns before or after INSN, as indicated by
2362 WHERE. OLD is the original stack layout, and NEW is the desired
2363 form. OLD is updated to reflect the code emitted, i.e., it will be
2364 the same as NEW upon return.
2366 This function will not preserve block_end[]. But that information
2367 is no longer needed once this has executed. */
2369 static void
2370 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2372 int reg;
2373 int update_end = 0;
2375 /* We will be inserting new insns "backwards". If we are to insert
2376 after INSN, find the next insn, and insert before it. */
2378 if (where == EMIT_AFTER)
2380 if (current_block && BB_END (current_block) == insn)
2381 update_end = 1;
2382 insn = NEXT_INSN (insn);
2385 /* Pop any registers that are not needed in the new block. */
2387 /* If the destination block's stack already has a specified layout
2388 and contains two or more registers, use a more intelligent algorithm
2389 to pop registers that minimizes the number number of fxchs below. */
2390 if (new->top > 0)
2392 bool slots[REG_STACK_SIZE];
2393 int pops[REG_STACK_SIZE];
2394 int next, dest, topsrc;
2396 /* First pass to determine the free slots. */
2397 for (reg = 0; reg <= new->top; reg++)
2398 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]);
2400 /* Second pass to allocate preferred slots. */
2401 topsrc = -1;
2402 for (reg = old->top; reg > new->top; reg--)
2403 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2405 dest = -1;
2406 for (next = 0; next <= new->top; next++)
2407 if (!slots[next] && new->reg[next] == old->reg[reg])
2409 /* If this is a preference for the new top of stack, record
2410 the fact by remembering it's old->reg in topsrc. */
2411 if (next == new->top)
2412 topsrc = reg;
2413 slots[next] = true;
2414 dest = next;
2415 break;
2417 pops[reg] = dest;
2419 else
2420 pops[reg] = reg;
2422 /* Intentionally, avoid placing the top of stack in it's correct
2423 location, if we still need to permute the stack below and we
2424 can usefully place it somewhere else. This is the case if any
2425 slot is still unallocated, in which case we should place the
2426 top of stack there. */
2427 if (topsrc != -1)
2428 for (reg = 0; reg < new->top; reg++)
2429 if (!slots[reg])
2431 pops[topsrc] = reg;
2432 slots[new->top] = false;
2433 slots[reg] = true;
2434 break;
2437 /* Third pass allocates remaining slots and emits pop insns. */
2438 next = new->top;
2439 for (reg = old->top; reg > new->top; reg--)
2441 dest = pops[reg];
2442 if (dest == -1)
2444 /* Find next free slot. */
2445 while (slots[next])
2446 next--;
2447 dest = next--;
2449 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2450 EMIT_BEFORE);
2453 else
2455 /* The following loop attempts to maximize the number of times we
2456 pop the top of the stack, as this permits the use of the faster
2457 ffreep instruction on platforms that support it. */
2458 int live, next;
2460 live = 0;
2461 for (reg = 0; reg <= old->top; reg++)
2462 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2463 live++;
2465 next = live;
2466 while (old->top >= live)
2467 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top]))
2469 while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next]))
2470 next--;
2471 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2472 EMIT_BEFORE);
2474 else
2475 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2476 EMIT_BEFORE);
2479 if (new->top == -2)
2481 /* If the new block has never been processed, then it can inherit
2482 the old stack order. */
2484 new->top = old->top;
2485 memcpy (new->reg, old->reg, sizeof (new->reg));
2487 else
2489 /* This block has been entered before, and we must match the
2490 previously selected stack order. */
2492 /* By now, the only difference should be the order of the stack,
2493 not their depth or liveliness. */
2495 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2496 gcc_unreachable ();
2497 win:
2498 gcc_assert (old->top == new->top);
2500 /* If the stack is not empty (new->top != -1), loop here emitting
2501 swaps until the stack is correct.
2503 The worst case number of swaps emitted is N + 2, where N is the
2504 depth of the stack. In some cases, the reg at the top of
2505 stack may be correct, but swapped anyway in order to fix
2506 other regs. But since we never swap any other reg away from
2507 its correct slot, this algorithm will converge. */
2509 if (new->top != -1)
2512 /* Swap the reg at top of stack into the position it is
2513 supposed to be in, until the correct top of stack appears. */
2515 while (old->reg[old->top] != new->reg[new->top])
2517 for (reg = new->top; reg >= 0; reg--)
2518 if (new->reg[reg] == old->reg[old->top])
2519 break;
2521 gcc_assert (reg != -1);
2523 emit_swap_insn (insn, old,
2524 FP_MODE_REG (old->reg[reg], DFmode));
2527 /* See if any regs remain incorrect. If so, bring an
2528 incorrect reg to the top of stack, and let the while loop
2529 above fix it. */
2531 for (reg = new->top; reg >= 0; reg--)
2532 if (new->reg[reg] != old->reg[reg])
2534 emit_swap_insn (insn, old,
2535 FP_MODE_REG (old->reg[reg], DFmode));
2536 break;
2538 } while (reg >= 0);
2540 /* At this point there must be no differences. */
2542 for (reg = old->top; reg >= 0; reg--)
2543 gcc_assert (old->reg[reg] == new->reg[reg]);
2546 if (update_end)
2547 BB_END (current_block) = PREV_INSN (insn);
2550 /* Print stack configuration. */
2552 static void
2553 print_stack (FILE *file, stack s)
2555 if (! file)
2556 return;
2558 if (s->top == -2)
2559 fprintf (file, "uninitialized\n");
2560 else if (s->top == -1)
2561 fprintf (file, "empty\n");
2562 else
2564 int i;
2565 fputs ("[ ", file);
2566 for (i = 0; i <= s->top; ++i)
2567 fprintf (file, "%d ", s->reg[i]);
2568 fputs ("]\n", file);
2572 /* This function was doing life analysis. We now let the regular live
2573 code do it's job, so we only need to check some extra invariants
2574 that reg-stack expects. Primary among these being that all registers
2575 are initialized before use.
2577 The function returns true when code was emitted to CFG edges and
2578 commit_edge_insertions needs to be called. */
2580 static int
2581 convert_regs_entry (void)
2583 int inserted = 0;
2584 edge e;
2585 edge_iterator ei;
2586 basic_block block;
2588 FOR_EACH_BB_REVERSE (block)
2590 block_info bi = BLOCK_INFO (block);
2591 int reg;
2593 /* Set current register status at last instruction `uninitialized'. */
2594 bi->stack_in.top = -2;
2596 /* Copy live_at_end and live_at_start into temporaries. */
2597 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2599 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2600 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2601 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2602 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2606 /* Load something into each stack register live at function entry.
2607 Such live registers can be caused by uninitialized variables or
2608 functions not returning values on all paths. In order to keep
2609 the push/pop code happy, and to not scrog the register stack, we
2610 must put something in these registers. Use a QNaN.
2612 Note that we are inserting converted code here. This code is
2613 never seen by the convert_regs pass. */
2615 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2617 basic_block block = e->dest;
2618 block_info bi = BLOCK_INFO (block);
2619 int reg, top = -1;
2621 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2622 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2624 rtx init;
2626 bi->stack_in.reg[++top] = reg;
2628 init = gen_rtx_SET (VOIDmode,
2629 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2630 not_a_num);
2631 insert_insn_on_edge (init, e);
2632 inserted = 1;
2635 bi->stack_in.top = top;
2638 return inserted;
2641 /* Construct the desired stack for function exit. This will either
2642 be `empty', or the function return value at top-of-stack. */
2644 static void
2645 convert_regs_exit (void)
2647 int value_reg_low, value_reg_high;
2648 stack output_stack;
2649 rtx retvalue;
2651 retvalue = stack_result (current_function_decl);
2652 value_reg_low = value_reg_high = -1;
2653 if (retvalue)
2655 value_reg_low = REGNO (retvalue);
2656 value_reg_high = value_reg_low
2657 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2660 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2661 if (value_reg_low == -1)
2662 output_stack->top = -1;
2663 else
2665 int reg;
2667 output_stack->top = value_reg_high - value_reg_low;
2668 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2670 output_stack->reg[value_reg_high - reg] = reg;
2671 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2676 /* Adjust the stack of this block on exit to match the stack of the
2677 target block, or copy stack info into the stack of the successor
2678 of the successor hasn't been processed yet. */
2679 static bool
2680 compensate_edge (edge e, FILE *file)
2682 basic_block block = e->src, target = e->dest;
2683 block_info bi = BLOCK_INFO (block);
2684 struct stack_def regstack, tmpstack;
2685 stack target_stack = &BLOCK_INFO (target)->stack_in;
2686 int reg;
2688 current_block = block;
2689 regstack = bi->stack_out;
2690 if (file)
2691 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2693 if (target_stack->top == -2)
2695 /* The target block hasn't had a stack order selected.
2696 We need merely ensure that no pops are needed. */
2697 for (reg = regstack.top; reg >= 0; --reg)
2698 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2699 break;
2701 if (reg == -1)
2703 if (file)
2704 fprintf (file, "new block; copying stack position\n");
2706 /* change_stack kills values in regstack. */
2707 tmpstack = regstack;
2709 change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER);
2710 return false;
2713 if (file)
2714 fprintf (file, "new block; pops needed\n");
2716 else
2718 if (target_stack->top == regstack.top)
2720 for (reg = target_stack->top; reg >= 0; --reg)
2721 if (target_stack->reg[reg] != regstack.reg[reg])
2722 break;
2724 if (reg == -1)
2726 if (file)
2727 fprintf (file, "no changes needed\n");
2728 return false;
2732 if (file)
2734 fprintf (file, "correcting stack to ");
2735 print_stack (file, target_stack);
2739 /* Care for non-call EH edges specially. The normal return path have
2740 values in registers. These will be popped en masse by the unwind
2741 library. */
2742 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2743 target_stack->top = -1;
2745 /* Other calls may appear to have values live in st(0), but the
2746 abnormal return path will not have actually loaded the values. */
2747 else if (e->flags & EDGE_ABNORMAL_CALL)
2749 /* Assert that the lifetimes are as we expect -- one value
2750 live at st(0) on the end of the source block, and no
2751 values live at the beginning of the destination block. */
2752 HARD_REG_SET tmp;
2754 CLEAR_HARD_REG_SET (tmp);
2755 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2756 gcc_unreachable ();
2757 eh1:
2759 /* We are sure that there is st(0) live, otherwise we won't compensate.
2760 For complex return values, we may have st(1) live as well. */
2761 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2762 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2763 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2764 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2765 gcc_unreachable ();
2766 eh2:
2768 target_stack->top = -1;
2771 /* It is better to output directly to the end of the block
2772 instead of to the edge, because emit_swap can do minimal
2773 insn scheduling. We can do this when there is only one
2774 edge out, and it is not abnormal. */
2775 else if (EDGE_COUNT (block->succs) == 1 && !(e->flags & EDGE_ABNORMAL))
2777 /* change_stack kills values in regstack. */
2778 tmpstack = regstack;
2780 change_stack (BB_END (block), &tmpstack, target_stack,
2781 (JUMP_P (BB_END (block))
2782 ? EMIT_BEFORE : EMIT_AFTER));
2784 else
2786 rtx seq, after;
2788 /* We don't support abnormal edges. Global takes care to
2789 avoid any live register across them, so we should never
2790 have to insert instructions on such edges. */
2791 gcc_assert (!(e->flags & EDGE_ABNORMAL));
2793 current_block = NULL;
2794 start_sequence ();
2796 /* ??? change_stack needs some point to emit insns after. */
2797 after = emit_note (NOTE_INSN_DELETED);
2799 tmpstack = regstack;
2800 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2802 seq = get_insns ();
2803 end_sequence ();
2805 insert_insn_on_edge (seq, e);
2806 return true;
2808 return false;
2811 /* Convert stack register references in one block. */
2813 static int
2814 convert_regs_1 (FILE *file, basic_block block)
2816 struct stack_def regstack;
2817 block_info bi = BLOCK_INFO (block);
2818 int deleted, inserted, reg;
2819 rtx insn, next;
2820 edge e, beste = NULL;
2821 bool control_flow_insn_deleted = false;
2822 edge_iterator ei;
2824 inserted = 0;
2825 deleted = 0;
2826 any_malformed_asm = false;
2828 /* Find the edge we will copy stack from. It should be the most frequent
2829 one as it will get cheapest after compensation code is generated,
2830 if multiple such exists, take one with largest count, prefer critical
2831 one (as splitting critical edges is more expensive), or one with lowest
2832 index, to avoid random changes with different orders of the edges. */
2833 FOR_EACH_EDGE (e, ei, block->preds)
2835 if (e->flags & EDGE_DFS_BACK)
2837 else if (! beste)
2838 beste = e;
2839 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2840 beste = e;
2841 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2843 else if (beste->count < e->count)
2844 beste = e;
2845 else if (beste->count > e->count)
2847 else if ((EDGE_CRITICAL_P (e) != 0)
2848 != (EDGE_CRITICAL_P (beste) != 0))
2850 if (EDGE_CRITICAL_P (e))
2851 beste = e;
2853 else if (e->src->index < beste->src->index)
2854 beste = e;
2857 /* Initialize stack at block entry. */
2858 if (bi->stack_in.top == -2)
2860 if (beste)
2861 inserted |= compensate_edge (beste, file);
2862 else
2864 /* No predecessors. Create an arbitrary input stack. */
2865 int reg;
2867 bi->stack_in.top = -1;
2868 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2869 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2870 bi->stack_in.reg[++bi->stack_in.top] = reg;
2873 else
2874 /* Entry blocks do have stack already initialized. */
2875 beste = NULL;
2877 current_block = block;
2879 if (file)
2881 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2882 print_stack (file, &bi->stack_in);
2885 /* Process all insns in this block. Keep track of NEXT so that we
2886 don't process insns emitted while substituting in INSN. */
2887 next = BB_HEAD (block);
2888 regstack = bi->stack_in;
2891 insn = next;
2892 next = NEXT_INSN (insn);
2894 /* Ensure we have not missed a block boundary. */
2895 gcc_assert (next);
2896 if (insn == BB_END (block))
2897 next = NULL;
2899 /* Don't bother processing unless there is a stack reg
2900 mentioned or if it's a CALL_INSN. */
2901 if (stack_regs_mentioned (insn)
2902 || CALL_P (insn))
2904 if (file)
2906 fprintf (file, " insn %d input stack: ",
2907 INSN_UID (insn));
2908 print_stack (file, &regstack);
2910 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2913 while (next);
2915 if (file)
2917 fprintf (file, "Expected live registers [");
2918 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2919 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2920 fprintf (file, " %d", reg);
2921 fprintf (file, " ]\nOutput stack: ");
2922 print_stack (file, &regstack);
2925 insn = BB_END (block);
2926 if (JUMP_P (insn))
2927 insn = PREV_INSN (insn);
2929 /* If the function is declared to return a value, but it returns one
2930 in only some cases, some registers might come live here. Emit
2931 necessary moves for them. */
2933 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2935 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2936 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2938 rtx set;
2940 if (file)
2941 fprintf (file, "Emitting insn initializing reg %d\n", reg);
2943 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
2944 insn = emit_insn_after (set, insn);
2945 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2949 /* Amongst the insns possibly deleted during the substitution process above,
2950 might have been the only trapping insn in the block. We purge the now
2951 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2952 called at the end of convert_regs. The order in which we process the
2953 blocks ensures that we never delete an already processed edge.
2955 Note that, at this point, the CFG may have been damaged by the emission
2956 of instructions after an abnormal call, which moves the basic block end
2957 (and is the reason why we call fixup_abnormal_edges later). So we must
2958 be sure that the trapping insn has been deleted before trying to purge
2959 dead edges, otherwise we risk purging valid edges.
2961 ??? We are normally supposed not to delete trapping insns, so we pretend
2962 that the insns deleted above don't actually trap. It would have been
2963 better to detect this earlier and avoid creating the EH edge in the first
2964 place, still, but we don't have enough information at that time. */
2966 if (control_flow_insn_deleted)
2967 purge_dead_edges (block);
2969 /* Something failed if the stack lives don't match. If we had malformed
2970 asms, we zapped the instruction itself, but that didn't produce the
2971 same pattern of register kills as before. */
2972 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2973 gcc_assert (any_malformed_asm);
2974 win:
2975 bi->stack_out = regstack;
2977 /* Compensate the back edges, as those wasn't visited yet. */
2978 FOR_EACH_EDGE (e, ei, block->succs)
2980 if (e->flags & EDGE_DFS_BACK
2981 || (e->dest == EXIT_BLOCK_PTR))
2983 gcc_assert (BLOCK_INFO (e->dest)->done
2984 || e->dest == block);
2985 inserted |= compensate_edge (e, file);
2988 FOR_EACH_EDGE (e, ei, block->preds)
2990 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2991 && e->src != ENTRY_BLOCK_PTR)
2993 gcc_assert (BLOCK_INFO (e->src)->done);
2994 inserted |= compensate_edge (e, file);
2998 return inserted;
3001 /* Convert registers in all blocks reachable from BLOCK. */
3003 static int
3004 convert_regs_2 (FILE *file, basic_block block)
3006 basic_block *stack, *sp;
3007 int inserted;
3009 /* We process the blocks in a top-down manner, in a way such that one block
3010 is only processed after all its predecessors. The number of predecessors
3011 of every block has already been computed. */
3013 stack = xmalloc (sizeof (*stack) * n_basic_blocks);
3014 sp = stack;
3016 *sp++ = block;
3018 inserted = 0;
3021 edge e;
3022 edge_iterator ei;
3024 block = *--sp;
3026 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3027 some dead EH outgoing edge after the deletion of the trapping
3028 insn inside the block. Since the number of predecessors of
3029 BLOCK's successors was computed based on the initial edge set,
3030 we check the necessity to process some of these successors
3031 before such an edge deletion may happen. However, there is
3032 a pitfall: if BLOCK is the only predecessor of a successor and
3033 the edge between them happens to be deleted, the successor
3034 becomes unreachable and should not be processed. The problem
3035 is that there is no way to preventively detect this case so we
3036 stack the successor in all cases and hand over the task of
3037 fixing up the discrepancy to convert_regs_1. */
3039 FOR_EACH_EDGE (e, ei, block->succs)
3040 if (! (e->flags & EDGE_DFS_BACK))
3042 BLOCK_INFO (e->dest)->predecessors--;
3043 if (!BLOCK_INFO (e->dest)->predecessors)
3044 *sp++ = e->dest;
3047 inserted |= convert_regs_1 (file, block);
3048 BLOCK_INFO (block)->done = 1;
3050 while (sp != stack);
3052 free (stack);
3054 return inserted;
3057 /* Traverse all basic blocks in a function, converting the register
3058 references in each insn from the "flat" register file that gcc uses,
3059 to the stack-like registers the 387 uses. */
3061 static int
3062 convert_regs (FILE *file)
3064 int inserted;
3065 basic_block b;
3066 edge e;
3067 edge_iterator ei;
3069 /* Initialize uninitialized registers on function entry. */
3070 inserted = convert_regs_entry ();
3072 /* Construct the desired stack for function exit. */
3073 convert_regs_exit ();
3074 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3076 /* ??? Future: process inner loops first, and give them arbitrary
3077 initial stacks which emit_swap_insn can modify. This ought to
3078 prevent double fxch that often appears at the head of a loop. */
3080 /* Process all blocks reachable from all entry points. */
3081 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3082 inserted |= convert_regs_2 (file, e->dest);
3084 /* ??? Process all unreachable blocks. Though there's no excuse
3085 for keeping these even when not optimizing. */
3086 FOR_EACH_BB (b)
3088 block_info bi = BLOCK_INFO (b);
3090 if (! bi->done)
3091 inserted |= convert_regs_2 (file, b);
3093 clear_aux_for_blocks ();
3095 fixup_abnormal_edges ();
3096 if (inserted)
3097 commit_edge_insertions ();
3099 if (file)
3100 fputc ('\n', file);
3102 return inserted;
3104 #endif /* STACK_REGS */
3106 #include "gt-reg-stack.h"