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1 /* Copyright (C) 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
3 This file is part of GCC.
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2, or (at your option)
8 any later version.
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with GCC; see the file COPYING. If not, write to
17 the Free Software Foundation, 59 Temple Place - Suite 330,
18 Boston, MA 02111-1307, USA. */
20 /* As a special exception, if you include this header file into source
21 files compiled by GCC, this header file does not by itself cause
22 the resulting executable to be covered by the GNU General Public
23 License. This exception does not however invalidate any other
24 reasons why the executable file might be covered by the GNU General
25 Public License. */
27 /* Implemented from the specification included in the Intel C++ Compiler
28 User Guide and Reference, version 8.0. */
30 #ifndef _XMMINTRIN_H_INCLUDED
31 #define _XMMINTRIN_H_INCLUDED
33 #ifndef __SSE__
35 #else
37 /* We need type definitions from the MMX header file. */
38 #include <mmintrin.h>
40 /* Get _mm_malloc () and _mm_free (). */
41 #include <mm_malloc.h>
43 /* The data type intended for user use. */
46 /* Internal data types for implementing the intrinsics. */
49 /* Create a selector for use with the SHUFPS instruction. */
50 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \
51 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
53 /* Constants for use with _mm_prefetch. */
54 enum _mm_hint
55 {
60 };
62 /* Bits in the MXCSR. */
63 #define _MM_EXCEPT_MASK 0x003f
64 #define _MM_EXCEPT_INVALID 0x0001
65 #define _MM_EXCEPT_DENORM 0x0002
66 #define _MM_EXCEPT_DIV_ZERO 0x0004
67 #define _MM_EXCEPT_OVERFLOW 0x0008
68 #define _MM_EXCEPT_UNDERFLOW 0x0010
69 #define _MM_EXCEPT_INEXACT 0x0020
71 #define _MM_MASK_MASK 0x1f80
72 #define _MM_MASK_INVALID 0x0080
73 #define _MM_MASK_DENORM 0x0100
74 #define _MM_MASK_DIV_ZERO 0x0200
75 #define _MM_MASK_OVERFLOW 0x0400
76 #define _MM_MASK_UNDERFLOW 0x0800
77 #define _MM_MASK_INEXACT 0x1000
79 #define _MM_ROUND_MASK 0x6000
80 #define _MM_ROUND_NEAREST 0x0000
81 #define _MM_ROUND_DOWN 0x2000
82 #define _MM_ROUND_UP 0x4000
83 #define _MM_ROUND_TOWARD_ZERO 0x6000
85 #define _MM_FLUSH_ZERO_MASK 0x8000
86 #define _MM_FLUSH_ZERO_ON 0x8000
87 #define _MM_FLUSH_ZERO_OFF 0x0000
89 /* Create a vector of zeros. */
90 static __inline __m128
92 {
94 }
96 /* Perform the respective operation on the lower SPFP (single-precision
97 floating-point) values of A and B; the upper three SPFP values are
98 passed through from A. */
100 static __inline __m128
102 {
104 }
106 static __inline __m128
108 {
110 }
112 static __inline __m128
114 {
116 }
118 static __inline __m128
120 {
122 }
124 static __inline __m128
126 {
128 }
130 static __inline __m128
132 {
134 }
136 static __inline __m128
138 {
140 }
142 static __inline __m128
144 {
146 }
148 static __inline __m128
150 {
152 }
154 /* Perform the respective operation on the four SPFP values in A and B. */
156 static __inline __m128
158 {
160 }
162 static __inline __m128
164 {
166 }
168 static __inline __m128
170 {
172 }
174 static __inline __m128
176 {
178 }
180 static __inline __m128
182 {
184 }
186 static __inline __m128
188 {
190 }
192 static __inline __m128
194 {
196 }
198 static __inline __m128
200 {
202 }
204 static __inline __m128
206 {
208 }
210 /* Perform logical bit-wise operations on 128-bit values. */
212 static __inline __m128
214 {
216 }
218 static __inline __m128
220 {
222 }
224 static __inline __m128
226 {
228 }
230 static __inline __m128
232 {
234 }
236 /* Perform a comparison on the lower SPFP values of A and B. If the
237 comparison is true, place a mask of all ones in the result, otherwise a
238 mask of zeros. The upper three SPFP values are passed through from A. */
240 static __inline __m128
242 {
244 }
246 static __inline __m128
248 {
250 }
252 static __inline __m128
254 {
256 }
258 static __inline __m128
260 {
265 __A));
266 }
268 static __inline __m128
270 {
275 __A));
276 }
278 static __inline __m128
280 {
282 }
284 static __inline __m128
286 {
288 }
290 static __inline __m128
292 {
294 }
296 static __inline __m128
298 {
303 __A));
304 }
306 static __inline __m128
308 {
313 __A));
314 }
316 static __inline __m128
318 {
320 }
322 static __inline __m128
324 {
326 }
328 /* Perform a comparison on the four SPFP values of A and B. For each
329 element, if the comparison is true, place a mask of all ones in the
330 result, otherwise a mask of zeros. */
332 static __inline __m128
334 {
336 }
338 static __inline __m128
340 {
342 }
344 static __inline __m128
346 {
348 }
350 static __inline __m128
352 {
354 }
356 static __inline __m128
358 {
360 }
362 static __inline __m128
364 {
366 }
368 static __inline __m128
370 {
372 }
374 static __inline __m128
376 {
378 }
380 static __inline __m128
382 {
384 }
386 static __inline __m128
388 {
390 }
392 static __inline __m128
394 {
396 }
398 static __inline __m128
400 {
402 }
404 /* Compare the lower SPFP values of A and B and return 1 if true
405 and 0 if false. */
409 {
411 }
415 {
417 }
421 {
423 }
427 {
429 }
433 {
435 }
439 {
441 }
445 {
447 }
451 {
453 }
457 {
459 }
463 {
465 }
469 {
471 }
475 {
477 }
479 /* Convert the lower SPFP value to a 32-bit integer according to the current
480 rounding mode. */
483 {
485 }
489 {
491 }
493 #ifdef __x86_64__
494 /* Convert the lower SPFP value to a 32-bit integer according to the current
495 rounding mode. */
498 {
500 }
501 #endif
503 /* Convert the two lower SPFP values to 32-bit integers according to the
504 current rounding mode. Return the integers in packed form. */
505 static __inline __m64
507 {
509 }
511 static __inline __m64
513 {
515 }
517 /* Truncate the lower SPFP value to a 32-bit integer. */
520 {
522 }
526 {
528 }
530 #ifdef __x86_64__
531 /* Truncate the lower SPFP value to a 32-bit integer. */
534 {
536 }
537 #endif
539 /* Truncate the two lower SPFP values to 32-bit integers. Return the
540 integers in packed form. */
541 static __inline __m64
543 {
545 }
547 static __inline __m64
549 {
551 }
553 /* Convert B to a SPFP value and insert it as element zero in A. */
554 static __inline __m128
556 {
558 }
560 static __inline __m128
562 {
564 }
566 #ifdef __x86_64__
567 /* Convert B to a SPFP value and insert it as element zero in A. */
568 static __inline __m128
570 {
572 }
573 #endif
575 /* Convert the two 32-bit values in B to SPFP form and insert them
576 as the two lower elements in A. */
577 static __inline __m128
579 {
581 }
583 static __inline __m128
585 {
587 }
589 /* Convert the four signed 16-bit values in A to SPFP form. */
590 static __inline __m128
592 {
593 __v4hi __sign;
595 __v4sf __r;
597 /* This comparison against zero gives us a mask that can be used to
598 fill in the missing sign bits in the unpack operations below, so
599 that we get signed values after unpacking. */
602 /* Convert the four words to doublewords. */
606 /* Convert the doublewords to floating point two at a time. */
613 }
615 /* Convert the four unsigned 16-bit values in A to SPFP form. */
616 static __inline __m128
618 {
620 __v4sf __r;
622 /* Convert the four words to doublewords. */
626 /* Convert the doublewords to floating point two at a time. */
633 }
635 /* Convert the low four signed 8-bit values in A to SPFP form. */
636 static __inline __m128
638 {
639 __v8qi __sign;
641 /* This comparison against zero gives us a mask that can be used to
642 fill in the missing sign bits in the unpack operations below, so
643 that we get signed values after unpacking. */
646 /* Convert the four low bytes to words. */
650 }
652 /* Convert the low four unsigned 8-bit values in A to SPFP form. */
653 static __inline __m128
655 {
658 }
660 /* Convert the four signed 32-bit values in A and B to SPFP form. */
661 static __inline __m128
663 {
668 }
670 /* Convert the four SPFP values in A to four signed 16-bit integers. */
671 static __inline __m64
673 {
679 }
681 /* Convert the four SPFP values in A to four signed 8-bit integers. */
682 static __inline __m64
684 {
687 }
689 /* Selects four specific SPFP values from A and B based on MASK. */
690 #if 0
691 static __inline __m128
693 {
695 }
696 #else
697 #define _mm_shuffle_ps(A, B, MASK) \
698 ((__m128) __builtin_ia32_shufps ((__v4sf)(A), (__v4sf)(B), (MASK)))
699 #endif
702 /* Selects and interleaves the upper two SPFP values from A and B. */
703 static __inline __m128
705 {
707 }
709 /* Selects and interleaves the lower two SPFP values from A and B. */
710 static __inline __m128
712 {
714 }
716 /* Sets the upper two SPFP values with 64-bits of data loaded from P;
717 the lower two values are passed through from A. */
718 static __inline __m128
720 {
722 }
724 /* Stores the upper two SPFP values of A into P. */
727 {
729 }
731 /* Moves the upper two values of B into the lower two values of A. */
732 static __inline __m128
734 {
736 }
738 /* Moves the lower two values of B into the upper two values of A. */
739 static __inline __m128
741 {
743 }
745 /* Sets the lower two SPFP values with 64-bits of data loaded from P;
746 the upper two values are passed through from A. */
747 static __inline __m128
749 {
751 }
753 /* Stores the lower two SPFP values of A into P. */
756 {
758 }
760 /* Creates a 4-bit mask from the most significant bits of the SPFP values. */
763 {
765 }
767 /* Return the contents of the control register. */
770 {
772 }
774 /* Read exception bits from the control register. */
777 {
779 }
783 {
785 }
789 {
791 }
795 {
797 }
799 /* Set the control register to I. */
802 {
804 }
806 /* Set exception bits in the control register. */
809 {
811 }
815 {
817 }
821 {
823 }
827 {
829 }
831 /* Create a vector with element 0 as F and the rest zero. */
832 static __inline __m128
834 {
836 }
838 /* Create a vector with all four elements equal to F. */
839 static __inline __m128
841 {
843 }
845 static __inline __m128
847 {
849 }
851 /* Create a vector with element 0 as *P and the rest zero. */
852 static __inline __m128
854 {
856 }
858 /* Create a vector with all four elements equal to *P. */
859 static __inline __m128
861 {
863 }
865 static __inline __m128
867 {
869 }
871 /* Load four SPFP values from P. The address must be 16-byte aligned. */
872 static __inline __m128
874 {
876 }
878 /* Load four SPFP values from P. The address need not be 16-byte aligned. */
879 static __inline __m128
881 {
883 }
885 /* Load four SPFP values in reverse order. The address must be aligned. */
886 static __inline __m128
888 {
891 }
893 /* Create the vector [Z Y X W]. */
894 static __inline __m128
896 {
898 }
900 /* Create the vector [W X Y Z]. */
901 static __inline __m128
903 {
905 }
907 /* Stores the lower SPFP value. */
910 {
912 }
914 /* Store four SPFP values. The address must be 16-byte aligned. */
917 {
919 }
921 /* Store four SPFP values. The address need not be 16-byte aligned. */
924 {
926 }
928 /* Store the lower SPFP value across four words. */
931 {
935 }
939 {
941 }
943 /* Store four SPFP values in reverse order. The address must be aligned. */
946 {
950 }
952 /* Sets the low SPFP value of A from the low value of B. */
953 static __inline __m128
955 {
957 }
959 /* Extracts one of the four words of A. The selector N must be immediate. */
960 #if 0
963 {
965 }
969 {
971 }
972 #else
973 #define _mm_extract_pi16(A, N) __builtin_ia32_vec_ext_v4hi ((__v4hi)(A), (N))
974 #define _m_pextrw(A, N) _mm_extract_pi16((A), (N))
975 #endif
977 /* Inserts word D into one of four words of A. The selector N must be
978 immediate. */
979 #if 0
982 {
984 }
988 {
990 }
991 #else
992 #define _mm_insert_pi16(A, D, N) \
993 ((__m64) __builtin_ia32_vec_set_v4hi ((__v4hi)(A), (D), (N)))
994 #define _m_pinsrw(A, D, N) _mm_insert_pi16((A), (D), (N))
995 #endif
997 /* Compute the element-wise maximum of signed 16-bit values. */
998 static __inline __m64
1000 {
1002 }
1004 static __inline __m64
1006 {
1008 }
1010 /* Compute the element-wise maximum of unsigned 8-bit values. */
1011 static __inline __m64
1013 {
1015 }
1017 static __inline __m64
1019 {
1021 }
1023 /* Compute the element-wise minimum of signed 16-bit values. */
1024 static __inline __m64
1026 {
1028 }
1030 static __inline __m64
1032 {
1034 }
1036 /* Compute the element-wise minimum of unsigned 8-bit values. */
1037 static __inline __m64
1039 {
1041 }
1043 static __inline __m64
1045 {
1047 }
1049 /* Create an 8-bit mask of the signs of 8-bit values. */
1052 {
1054 }
1058 {
1060 }
1062 /* Multiply four unsigned 16-bit values in A by four unsigned 16-bit values
1063 in B and produce the high 16 bits of the 32-bit results. */
1064 static __inline __m64
1066 {
1068 }
1070 static __inline __m64
1072 {
1074 }
1076 /* Return a combination of the four 16-bit values in A. The selector
1077 must be an immediate. */
1078 #if 0
1079 static __inline __m64
1081 {
1083 }
1085 static __inline __m64
1087 {
1089 }
1090 #else
1091 #define _mm_shuffle_pi16(A, N) \
1092 ((__m64) __builtin_ia32_pshufw ((__v4hi)(A), (N)))
1093 #define _m_pshufw(A, N) _mm_shuffle_pi16 ((A), (N))
1094 #endif
1096 /* Conditionally store byte elements of A into P. The high bit of each
1097 byte in the selector N determines whether the corresponding byte from
1098 A is stored. */
1101 {
1103 }
1107 {
1109 }
1111 /* Compute the rounded averages of the unsigned 8-bit values in A and B. */
1112 static __inline __m64
1114 {
1116 }
1118 static __inline __m64
1120 {
1122 }
1124 /* Compute the rounded averages of the unsigned 16-bit values in A and B. */
1125 static __inline __m64
1127 {
1129 }
1131 static __inline __m64
1133 {
1135 }
1137 /* Compute the sum of the absolute differences of the unsigned 8-bit
1138 values in A and B. Return the value in the lower 16-bit word; the
1139 upper words are cleared. */
1140 static __inline __m64
1142 {
1144 }
1146 static __inline __m64
1148 {
1150 }
1152 /* Loads one cache line from address P to a location "closer" to the
1153 processor. The selector I specifies the type of prefetch operation. */
1154 #if 0
1157 {
1159 }
1160 #else
1161 #define _mm_prefetch(P, I) \
1162 __builtin_prefetch ((P), 0, (I))
1163 #endif
1165 /* Stores the data in A to the address P without polluting the caches. */
1168 {
1170 }
1172 /* Likewise. The address must be 16-byte aligned. */
1175 {
1177 }
1179 /* Guarantees that every preceding store is globally visible before
1180 any subsequent store. */
1183 {
1185 }
1187 /* The execution of the next instruction is delayed by an implementation
1188 specific amount of time. The instruction does not modify the
1189 architectural state. */
1192 {
1194 }
1196 /* Transpose the 4x4 matrix composed of row[0-3]. */
1197 #define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) \
1198 do { \
1199 __v4sf __r0 = (row0), __r1 = (row1), __r2 = (row2), __r3 = (row3); \
1200 __v4sf __t0 = __builtin_ia32_shufps (__r0, __r1, 0x44); \
1201 __v4sf __t2 = __builtin_ia32_shufps (__r0, __r1, 0xEE); \
1202 __v4sf __t1 = __builtin_ia32_shufps (__r2, __r3, 0x44); \
1203 __v4sf __t3 = __builtin_ia32_shufps (__r2, __r3, 0xEE); \
1204 (row0) = __builtin_ia32_shufps (__t0, __t1, 0x88); \
1205 (row1) = __builtin_ia32_shufps (__t0, __t1, 0xDD); \
1206 (row2) = __builtin_ia32_shufps (__t2, __t3, 0x88); \
1207 (row3) = __builtin_ia32_shufps (__t2, __t3, 0xDD); \
1208 } while (0)
1210 /* For backward source compatibility. */
1211 #include <emmintrin.h>