2008-05-30 Vladimir Makarov <vmakarov@redhat.com>
[official-gcc.git] / gcc / global.c
blobb89babe9c88c3de497a198e9603cb4e96cb651a2
1 /* Allocate registers for pseudo-registers that span basic blocks.
2 Copyright (C) 1987, 1988, 1991, 1994, 1996, 1997, 1998,
3 1999, 2000, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "machmode.h"
28 #include "hard-reg-set.h"
29 #include "rtl.h"
30 #include "tm_p.h"
31 #include "flags.h"
32 #include "regs.h"
33 #include "function.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "reload.h"
37 #include "output.h"
38 #include "toplev.h"
39 #include "tree-pass.h"
40 #include "timevar.h"
41 #include "df.h"
42 #include "vecprim.h"
43 #include "dbgcnt.h"
44 #include "ra.h"
46 /* This pass of the compiler performs global register allocation.
47 It assigns hard register numbers to all the pseudo registers
48 that were not handled in local_alloc. Assignments are recorded
49 in the vector reg_renumber, not by changing the rtl code.
50 (Such changes are made by final). The entry point is
51 the function global_alloc.
53 After allocation is complete, the reload pass is run as a subroutine
54 of this pass, so that when a pseudo reg loses its hard reg due to
55 spilling it is possible to make a second attempt to find a hard
56 reg for it. The reload pass is independent in other respects
57 and it is run even when stupid register allocation is in use.
59 1. Assign allocation-numbers (allocnos) to the pseudo-registers
60 still needing allocations and to the pseudo-registers currently
61 allocated by local-alloc which may be spilled by reload.
62 Set up tables reg_allocno and allocno_reg to map
63 reg numbers to allocnos and vice versa.
64 max_allocno gets the number of allocnos in use.
66 2. Allocate a max_allocno by max_allocno compressed triangular conflict
67 bit matrix (a triangular bit matrix with portions removed for which we
68 can guarantee there are no conflicts, example: two local pseudos that
69 live in different basic blocks) and clear it. This is called "conflict".
70 Note that for triangular bit matrices, there are two possible equations
71 for computing the bit number for two allocnos: LOW and HIGH (LOW < HIGH):
73 1) BITNUM = f(HIGH) + LOW, where
74 f(HIGH) = (HIGH * (HIGH - 1)) / 2
76 2) BITNUM = f(LOW) + HIGH, where
77 f(LOW) = LOW * (max_allocno - LOW) + (LOW * (LOW - 1)) / 2 - LOW - 1
79 We use the second (and less common) equation as this gives us better
80 cache locality for local allocnos that are live within the same basic
81 block. Also note that f(HIGH) and f(LOW) can be precalculated for all
82 values of HIGH and LOW, so all that is necessary to compute the bit
83 number for two allocnos LOW and HIGH is a load followed by an addition.
85 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix for
86 conflicts between allocnos and explicit hard register use (which
87 includes use of pseudo-registers allocated by local_alloc). This
88 is the hard_reg_conflicts inside each allocno.
90 3. For each basic block, walk backward through the block, recording
91 which pseudo-registers and which hardware registers are live.
92 Build the conflict matrix between the pseudo-registers and another of
93 pseudo-registers versus hardware registers.
95 4. For each basic block, walk backward through the block, recording
96 the preferred hardware registers for each pseudo-register.
98 5. Sort a table of the allocnos into order of desirability of the variables.
100 6. Allocate the variables in that order; each if possible into
101 a preferred register, else into another register. */
103 /* A vector of the integers from 0 to max_allocno-1,
104 sorted in the order of first-to-be-allocated first. */
106 static int *allocno_order;
108 /* Set of registers that global-alloc isn't supposed to use. */
110 static HARD_REG_SET no_global_alloc_regs;
112 /* Set of registers used so far. */
114 static HARD_REG_SET regs_used_so_far;
116 /* Number of refs to each hard reg, as used by local alloc.
117 It is zero for a reg that contains global pseudos or is explicitly used. */
119 static int local_reg_n_refs[FIRST_PSEUDO_REGISTER];
121 /* Frequency of uses of given hard reg. */
122 static int local_reg_freq[FIRST_PSEUDO_REGISTER];
124 /* Guess at live length of each hard reg, as used by local alloc.
125 This is actually the sum of the live lengths of the specific regs. */
127 static int local_reg_live_length[FIRST_PSEUDO_REGISTER];
129 /* Set to 1 a bit in a vector TABLE of HARD_REG_SETs, for vector
130 element I, and hard register number J. */
132 #define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (allocno[I].TABLE, J)
134 /* Return true if *LOC contains an asm. */
136 static int
137 insn_contains_asm_1 (rtx *loc, void *data ATTRIBUTE_UNUSED)
139 if ( !*loc)
140 return 0;
141 if (GET_CODE (*loc) == ASM_OPERANDS)
142 return 1;
143 return 0;
147 /* Return true if INSN contains an ASM. */
149 static int
150 insn_contains_asm (rtx insn)
152 return for_each_rtx (&insn, insn_contains_asm_1, NULL);
156 static void
157 compute_regs_asm_clobbered (char *regs_asm_clobbered)
159 basic_block bb;
161 memset (regs_asm_clobbered, 0, sizeof (char) * FIRST_PSEUDO_REGISTER);
163 FOR_EACH_BB (bb)
165 rtx insn;
166 FOR_BB_INSNS_REVERSE (bb, insn)
168 struct df_ref **def_rec;
169 if (insn_contains_asm (insn))
170 for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
172 struct df_ref *def = *def_rec;
173 unsigned int dregno = DF_REF_REGNO (def);
174 if (dregno < FIRST_PSEUDO_REGISTER)
176 unsigned int i;
177 enum machine_mode mode = GET_MODE (DF_REF_REAL_REG (def));
178 unsigned int end = dregno
179 + hard_regno_nregs[dregno][mode] - 1;
180 for (i = dregno; i <= end; ++i)
181 regs_asm_clobbered[i] = 1;
189 /* All registers that can be eliminated. */
191 HARD_REG_SET eliminable_regset;
193 static int regno_compare (const void *, const void *);
194 static int allocno_compare (const void *, const void *);
195 static void expand_preferences (void);
196 static void prune_preferences (void);
197 static void set_preferences (void);
198 static void find_reg (int, HARD_REG_SET, int, int, int);
199 static void dump_conflicts (FILE *);
202 /* Look through the list of eliminable registers. Set ELIM_SET to the
203 set of registers which may be eliminated. Set NO_GLOBAL_SET to the
204 set of registers which may not be used across blocks.
206 This will normally be called with ELIM_SET as the file static
207 variable eliminable_regset, and NO_GLOBAL_SET as the file static
208 variable NO_GLOBAL_ALLOC_REGS. */
210 static void
211 compute_regsets (HARD_REG_SET *elim_set,
212 HARD_REG_SET *no_global_set)
215 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
216 Unlike regs_ever_live, elements of this array corresponding to
217 eliminable regs like the frame pointer are set if an asm sets them. */
218 char *regs_asm_clobbered = alloca (FIRST_PSEUDO_REGISTER * sizeof (char));
220 #ifdef ELIMINABLE_REGS
221 static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS;
222 size_t i;
223 #endif
224 int need_fp
225 = (! flag_omit_frame_pointer
226 || (cfun->calls_alloca && EXIT_IGNORE_STACK)
227 || FRAME_POINTER_REQUIRED);
229 max_regno = max_reg_num ();
230 compact_blocks ();
232 max_allocno = 0;
234 /* A machine may have certain hard registers that
235 are safe to use only within a basic block. */
237 CLEAR_HARD_REG_SET (*no_global_set);
238 CLEAR_HARD_REG_SET (*elim_set);
240 compute_regs_asm_clobbered (regs_asm_clobbered);
241 /* Build the regset of all eliminable registers and show we can't use those
242 that we already know won't be eliminated. */
243 #ifdef ELIMINABLE_REGS
244 for (i = 0; i < ARRAY_SIZE (eliminables); i++)
246 bool cannot_elim
247 = (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
248 || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp));
250 if (!regs_asm_clobbered[eliminables[i].from])
252 SET_HARD_REG_BIT (*elim_set, eliminables[i].from);
254 if (cannot_elim)
255 SET_HARD_REG_BIT (*no_global_set, eliminables[i].from);
257 else if (cannot_elim)
258 error ("%s cannot be used in asm here",
259 reg_names[eliminables[i].from]);
260 else
261 df_set_regs_ever_live (eliminables[i].from, true);
263 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
264 if (!regs_asm_clobbered[HARD_FRAME_POINTER_REGNUM])
266 SET_HARD_REG_BIT (*elim_set, HARD_FRAME_POINTER_REGNUM);
267 if (need_fp)
268 SET_HARD_REG_BIT (*no_global_set, HARD_FRAME_POINTER_REGNUM);
270 else if (need_fp)
271 error ("%s cannot be used in asm here",
272 reg_names[HARD_FRAME_POINTER_REGNUM]);
273 else
274 df_set_regs_ever_live (HARD_FRAME_POINTER_REGNUM, true);
275 #endif
277 #else
278 if (!regs_asm_clobbered[FRAME_POINTER_REGNUM])
280 SET_HARD_REG_BIT (*elim_set, FRAME_POINTER_REGNUM);
281 if (need_fp)
282 SET_HARD_REG_BIT (*no_global_set, FRAME_POINTER_REGNUM);
284 else if (need_fp)
285 error ("%s cannot be used in asm here", reg_names[FRAME_POINTER_REGNUM]);
286 else
287 df_set_regs_ever_live (FRAME_POINTER_REGNUM, true);
288 #endif
291 /* Perform allocation of pseudo-registers not allocated by local_alloc.
293 Return value is nonzero if reload failed
294 and we must not do any more for this function. */
296 static int
297 global_alloc (void)
299 int retval;
300 size_t i;
301 int max_blk;
302 int *num_allocnos_per_blk;
304 compute_regsets (&eliminable_regset, &no_global_alloc_regs);
306 /* Track which registers have already been used. Start with registers
307 explicitly in the rtl, then registers allocated by local register
308 allocation. */
310 CLEAR_HARD_REG_SET (regs_used_so_far);
311 #ifdef LEAF_REGISTERS
312 /* If we are doing the leaf function optimization, and this is a leaf
313 function, it means that the registers that take work to save are those
314 that need a register window. So prefer the ones that can be used in
315 a leaf function. */
317 const char *cheap_regs;
318 const char *const leaf_regs = LEAF_REGISTERS;
320 if (only_leaf_regs_used () && leaf_function_p ())
321 cheap_regs = leaf_regs;
322 else
323 cheap_regs = call_used_regs;
324 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
325 if (df_regs_ever_live_p (i) || cheap_regs[i])
326 SET_HARD_REG_BIT (regs_used_so_far, i);
328 #else
329 /* We consider registers that do not have to be saved over calls as if
330 they were already used since there is no cost in using them. */
331 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
332 if (df_regs_ever_live_p (i) || call_used_regs[i])
333 SET_HARD_REG_BIT (regs_used_so_far, i);
334 #endif
336 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
337 if (reg_renumber[i] >= 0)
338 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
340 /* Establish mappings from register number to allocation number
341 and vice versa. In the process, count the allocnos. */
343 reg_allocno = XNEWVEC (int, max_regno);
345 /* Initially fill the reg_allocno array with regno's... */
346 max_blk = 0;
347 max_allocno = 0;
348 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
349 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
350 that we are supposed to refrain from putting in a hard reg.
351 -2 means do make an allocno but don't allocate it. */
352 if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1
353 /* Don't allocate pseudos that cross calls,
354 if this function receives a nonlocal goto. */
355 && (! cfun->has_nonlocal_label
356 || REG_N_CALLS_CROSSED (i) == 0))
358 int blk = regno_basic_block (i);
359 reg_allocno[max_allocno++] = i;
360 if (blk > max_blk)
361 max_blk = blk;
362 gcc_assert (REG_LIVE_LENGTH (i));
365 allocno = XCNEWVEC (struct allocno, max_allocno);
366 partial_bitnum = XNEWVEC (HOST_WIDE_INT, max_allocno);
367 num_allocnos_per_blk = XCNEWVEC (int, max_blk + 1);
369 /* ...so we can sort them in the order we want them to receive
370 their allocnos. */
371 qsort (reg_allocno, max_allocno, sizeof (int), regno_compare);
373 for (i = 0; i < (size_t) max_allocno; i++)
375 int regno = reg_allocno[i];
376 int blk = regno_basic_block (regno);
377 num_allocnos_per_blk[blk]++;
378 allocno[i].reg = regno;
379 allocno[i].size = PSEUDO_REGNO_SIZE (regno);
380 allocno[i].calls_crossed += REG_N_CALLS_CROSSED (regno);
381 allocno[i].freq_calls_crossed += REG_FREQ_CALLS_CROSSED (regno);
382 allocno[i].throwing_calls_crossed
383 += REG_N_THROWING_CALLS_CROSSED (regno);
384 allocno[i].n_refs += REG_N_REFS (regno);
385 allocno[i].freq += REG_FREQ (regno);
386 if (allocno[i].live_length < REG_LIVE_LENGTH (regno))
387 allocno[i].live_length = REG_LIVE_LENGTH (regno);
390 /* The "global" block must contain all allocnos. */
391 num_allocnos_per_blk[0] = max_allocno;
393 /* Now reinitialize the reg_allocno array in terms of the
394 optimized regno to allocno mapping we created above. */
395 for (i = 0; i < (size_t) max_regno; i++)
396 reg_allocno[i] = -1;
398 max_bitnum = 0;
399 for (i = 0; i < (size_t) max_allocno; i++)
401 int regno = allocno[i].reg;
402 int blk = regno_basic_block (regno);
403 int row_size = --num_allocnos_per_blk[blk];
404 reg_allocno[regno] = (int) i;
405 partial_bitnum[i] = (row_size > 0) ? max_bitnum - ((int) i + 1) : -1;
406 max_bitnum += row_size;
409 #ifdef ENABLE_CHECKING
410 gcc_assert (max_bitnum <=
411 (((HOST_WIDE_INT) max_allocno *
412 ((HOST_WIDE_INT) max_allocno - 1)) / 2));
413 #endif
415 if (dump_file)
417 HOST_WIDE_INT num_bits, num_bytes, actual_bytes;
419 fprintf (dump_file, "## max_blk: %d\n", max_blk);
420 fprintf (dump_file, "## max_regno: %d\n", max_regno);
421 fprintf (dump_file, "## max_allocno: %d\n", max_allocno);
423 num_bits = max_bitnum;
424 num_bytes = CEIL (num_bits, 8);
425 actual_bytes = num_bytes;
426 fprintf (dump_file, "## Compressed triangular bitmatrix size: ");
427 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
428 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes\n", num_bytes);
430 num_bits = ((HOST_WIDE_INT) max_allocno *
431 ((HOST_WIDE_INT) max_allocno - 1)) / 2;
432 num_bytes = CEIL (num_bits, 8);
433 fprintf (dump_file, "## Standard triangular bitmatrix size: ");
434 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
435 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes [%.2f%%]\n",
436 num_bytes, 100.0 * ((double) actual_bytes / (double) num_bytes));
438 num_bits = (HOST_WIDE_INT) max_allocno * (HOST_WIDE_INT) max_allocno;
439 num_bytes = CEIL (num_bits, 8);
440 fprintf (dump_file, "## Square bitmatrix size: ");
441 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bits, ", num_bits);
442 fprintf (dump_file, HOST_WIDE_INT_PRINT_DEC " bytes [%.2f%%]\n",
443 num_bytes, 100.0 * ((double) actual_bytes / (double) num_bytes));
446 /* Calculate amount of usage of each hard reg by pseudos
447 allocated by local-alloc. This is to see if we want to
448 override it. */
449 memset (local_reg_live_length, 0, sizeof local_reg_live_length);
450 memset (local_reg_n_refs, 0, sizeof local_reg_n_refs);
451 memset (local_reg_freq, 0, sizeof local_reg_freq);
452 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
453 if (reg_renumber[i] >= 0)
455 int regno = reg_renumber[i];
456 int endregno = end_hard_regno (PSEUDO_REGNO_MODE (i), regno);
457 int j;
459 for (j = regno; j < endregno; j++)
461 local_reg_n_refs[j] += REG_N_REFS (i);
462 local_reg_freq[j] += REG_FREQ (i);
463 local_reg_live_length[j] += REG_LIVE_LENGTH (i);
467 /* We can't override local-alloc for a reg used not just by local-alloc. */
468 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
469 if (df_regs_ever_live_p (i))
470 local_reg_n_refs[i] = 0, local_reg_freq[i] = 0;
472 if (dump_file)
474 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
476 fprintf (dump_file, "%d REG_N_REFS=%d, REG_FREQ=%d, REG_LIVE_LENGTH=%d\n",
477 (int)i, REG_N_REFS (i), REG_FREQ (i), REG_LIVE_LENGTH (i));
479 fprintf (dump_file, "regs_ever_live =");
480 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
481 if (df_regs_ever_live_p (i))
482 fprintf (dump_file, " %d", (int)i);
483 fprintf (dump_file, "\n");
486 conflicts = NULL;
487 adjacency = NULL;
488 adjacency_pool = NULL;
490 /* If there is work to be done (at least one reg to allocate),
491 perform global conflict analysis and allocate the regs. */
493 if (max_allocno > 0)
495 /* We used to use alloca here, but the size of what it would try to
496 allocate would occasionally cause it to exceed the stack limit and
497 cause unpredictable core dumps. Some examples were > 2Mb in size. */
498 conflicts = XCNEWVEC (HOST_WIDEST_FAST_INT,
499 CEIL(max_bitnum, HOST_BITS_PER_WIDEST_FAST_INT));
501 adjacency = XCNEWVEC (adjacency_t *, max_allocno);
502 adjacency_pool = create_alloc_pool ("global_alloc adjacency list pool",
503 sizeof (adjacency_t), 1024);
505 /* Scan all the insns and compute the conflicts among allocnos
506 and between allocnos and hard regs. */
508 global_conflicts ();
510 /* There is just too much going on in the register allocators to
511 keep things up to date. At the end we have to rescan anyway
512 because things change when the reload_completed flag is set.
513 So we just turn off scanning and we will rescan by hand.
515 However, we needed to do the rescanning before this point to
516 get the new insns scanned inserted by local_alloc scanned for
517 global_conflicts. */
518 df_set_flags (DF_NO_INSN_RESCAN);
520 /* Eliminate conflicts between pseudos and eliminable registers. If
521 the register is not eliminated, the pseudo won't really be able to
522 live in the eliminable register, so the conflict doesn't matter.
523 If we do eliminate the register, the conflict will no longer exist.
524 So in either case, we can ignore the conflict. Likewise for
525 preferences. */
527 set_preferences ();
529 for (i = 0; i < (size_t) max_allocno; i++)
531 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_conflicts,
532 eliminable_regset);
533 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_copy_preferences,
534 eliminable_regset);
535 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_preferences,
536 eliminable_regset);
539 /* Try to expand the preferences by merging them between allocnos. */
541 expand_preferences ();
543 /* Determine the order to allocate the remaining pseudo registers. */
545 allocno_order = XNEWVEC (int, max_allocno);
546 for (i = 0; i < (size_t) max_allocno; i++)
547 allocno_order[i] = i;
549 /* Default the size to 1, since allocno_compare uses it to divide by.
550 Also convert allocno_live_length of zero to -1. A length of zero
551 can occur when all the registers for that allocno have reg_live_length
552 equal to -2. In this case, we want to make an allocno, but not
553 allocate it. So avoid the divide-by-zero and set it to a low
554 priority. */
556 for (i = 0; i < (size_t) max_allocno; i++)
558 if (allocno[i].size == 0)
559 allocno[i].size = 1;
560 if (allocno[i].live_length == 0)
561 allocno[i].live_length = -1;
564 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
566 prune_preferences ();
568 if (dump_file)
569 dump_conflicts (dump_file);
571 /* Try allocating them, one by one, in that order,
572 except for parameters marked with reg_live_length[regno] == -2. */
574 for (i = 0; i < (size_t) max_allocno; i++)
575 if (reg_renumber[allocno[allocno_order[i]].reg] < 0
576 && REG_LIVE_LENGTH (allocno[allocno_order[i]].reg) >= 0)
578 if (!dbg_cnt (global_alloc_at_reg))
579 break;
580 /* If we have more than one register class,
581 first try allocating in the class that is cheapest
582 for this pseudo-reg. If that fails, try any reg. */
583 if (N_REG_CLASSES > 1)
585 find_reg (allocno_order[i], 0, 0, 0, 0);
586 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
588 if (dump_file)
589 fprintf (dump_file, "Assign %d to %d\n",
590 reg_renumber[allocno[allocno_order[i]].reg],
591 allocno[allocno_order[i]].reg);
592 continue;
595 if (reg_alternate_class (allocno[allocno_order[i]].reg) != NO_REGS)
597 find_reg (allocno_order[i], 0, 1, 0, 0);
598 if (dump_file)
599 fprintf (dump_file, "Assign %d to %d\n",
600 reg_renumber[allocno[allocno_order[i]].reg],
601 allocno[allocno_order[i]].reg);
605 free (allocno_order);
606 free (conflicts);
609 /* Do the reloads now while the allocno data still exists, so that we can
610 try to assign new hard regs to any pseudo regs that are spilled. */
612 #if 0 /* We need to eliminate regs even if there is no rtl code,
613 for the sake of debugging information. */
614 if (n_basic_blocks > NUM_FIXED_BLOCKS)
615 #endif
617 build_insn_chain ();
618 retval = reload (get_insns (), 1);
621 /* Clean up. */
622 free (reg_allocno);
623 free (num_allocnos_per_blk);
624 free (partial_bitnum);
625 free (allocno);
626 if (adjacency != NULL)
628 free_alloc_pool (adjacency_pool);
629 free (adjacency);
632 return retval;
635 /* Sort predicate for ordering the regnos. We want the regno to allocno
636 mapping to have the property that all "global" regnos (ie, regnos that
637 are referenced in more than one basic block) have smaller allocno values
638 than "local" regnos (ie, regnos referenced in only one basic block).
639 In addition, for two basic blocks "i" and "j" with i < j, all regnos
640 local to basic block i should have smaller allocno values than regnos
641 local to basic block j.
642 Returns -1 (1) if *v1p should be allocated before (after) *v2p. */
644 static int
645 regno_compare (const void *v1p, const void *v2p)
647 int regno1 = *(const int *)v1p;
648 int regno2 = *(const int *)v2p;
649 int blk1 = REG_BASIC_BLOCK (regno1);
650 int blk2 = REG_BASIC_BLOCK (regno2);
652 /* Prefer lower numbered basic blocks. Note that global and unknown
653 blocks have negative values, giving them high precedence. */
654 if (blk1 - blk2)
655 return blk1 - blk2;
657 /* If both regs are referenced from the same block, sort by regno. */
658 return regno1 - regno2;
661 /* Sort predicate for ordering the allocnos.
662 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
664 static int
665 allocno_compare (const void *v1p, const void *v2p)
667 int v1 = *(const int *)v1p, v2 = *(const int *)v2p;
668 /* Note that the quotient will never be bigger than
669 the value of floor_log2 times the maximum number of
670 times a register can occur in one insn (surely less than 100)
671 weighted by the frequency (maximally REG_FREQ_MAX).
672 Multiplying this by 10000/REG_FREQ_MAX can't overflow. */
673 int pri1
674 = (((double) (floor_log2 (allocno[v1].n_refs) * allocno[v1].freq)
675 / allocno[v1].live_length)
676 * (10000 / REG_FREQ_MAX) * allocno[v1].size);
677 int pri2
678 = (((double) (floor_log2 (allocno[v2].n_refs) * allocno[v2].freq)
679 / allocno[v2].live_length)
680 * (10000 / REG_FREQ_MAX) * allocno[v2].size);
681 if (pri2 - pri1)
682 return pri2 - pri1;
684 /* If regs are equally good, sort by allocno,
685 so that the results of qsort leave nothing to chance. */
686 return v1 - v2;
689 /* Expand the preference information by looking for cases where one allocno
690 dies in an insn that sets an allocno. If those two allocnos don't conflict,
691 merge any preferences between those allocnos. */
693 static void
694 expand_preferences (void)
696 rtx insn;
697 rtx link;
698 rtx set;
700 /* We only try to handle the most common cases here. Most of the cases
701 where this wins are reg-reg copies. */
703 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
704 if (INSN_P (insn)
705 && (set = single_set (insn)) != 0
706 && REG_P (SET_DEST (set))
707 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
708 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
709 if (REG_NOTE_KIND (link) == REG_DEAD
710 && REG_P (XEXP (link, 0))
711 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
712 && ! conflict_p (reg_allocno[REGNO (SET_DEST (set))],
713 reg_allocno[REGNO (XEXP (link, 0))]))
715 int a1 = reg_allocno[REGNO (SET_DEST (set))];
716 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
718 if (XEXP (link, 0) == SET_SRC (set))
720 IOR_HARD_REG_SET (allocno[a1].hard_reg_copy_preferences,
721 allocno[a2].hard_reg_copy_preferences);
722 IOR_HARD_REG_SET (allocno[a2].hard_reg_copy_preferences,
723 allocno[a1].hard_reg_copy_preferences);
726 IOR_HARD_REG_SET (allocno[a1].hard_reg_preferences,
727 allocno[a2].hard_reg_preferences);
728 IOR_HARD_REG_SET (allocno[a2].hard_reg_preferences,
729 allocno[a1].hard_reg_preferences);
730 IOR_HARD_REG_SET (allocno[a1].hard_reg_full_preferences,
731 allocno[a2].hard_reg_full_preferences);
732 IOR_HARD_REG_SET (allocno[a2].hard_reg_full_preferences,
733 allocno[a1].hard_reg_full_preferences);
738 /* Try to set a preference for an allocno to a hard register.
739 We are passed DEST and SRC which are the operands of a SET. It is known
740 that SRC is a register. If SRC or the first operand of SRC is a register,
741 try to set a preference. If one of the two is a hard register and the other
742 is a pseudo-register, mark the preference.
744 Note that we are not as aggressive as local-alloc in trying to tie a
745 pseudo-register to a hard register. */
747 static void
748 set_preference (rtx dest, rtx src)
750 unsigned int src_regno, dest_regno, end_regno;
751 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
752 to compensate for subregs in SRC or DEST. */
753 int offset = 0;
754 unsigned int i;
755 int copy = 1;
757 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
758 src = XEXP (src, 0), copy = 0;
760 /* Get the reg number for both SRC and DEST.
761 If neither is a reg, give up. */
763 if (REG_P (src))
764 src_regno = REGNO (src);
765 else if (GET_CODE (src) == SUBREG && REG_P (SUBREG_REG (src)))
767 src_regno = REGNO (SUBREG_REG (src));
769 if (REGNO (SUBREG_REG (src)) < FIRST_PSEUDO_REGISTER)
770 offset += subreg_regno_offset (REGNO (SUBREG_REG (src)),
771 GET_MODE (SUBREG_REG (src)),
772 SUBREG_BYTE (src),
773 GET_MODE (src));
774 else
775 offset += (SUBREG_BYTE (src)
776 / REGMODE_NATURAL_SIZE (GET_MODE (src)));
778 else
779 return;
781 if (REG_P (dest))
782 dest_regno = REGNO (dest);
783 else if (GET_CODE (dest) == SUBREG && REG_P (SUBREG_REG (dest)))
785 dest_regno = REGNO (SUBREG_REG (dest));
787 if (REGNO (SUBREG_REG (dest)) < FIRST_PSEUDO_REGISTER)
788 offset -= subreg_regno_offset (REGNO (SUBREG_REG (dest)),
789 GET_MODE (SUBREG_REG (dest)),
790 SUBREG_BYTE (dest),
791 GET_MODE (dest));
792 else
793 offset -= (SUBREG_BYTE (dest)
794 / REGMODE_NATURAL_SIZE (GET_MODE (dest)));
796 else
797 return;
799 /* Convert either or both to hard reg numbers. */
801 if (reg_renumber[src_regno] >= 0)
802 src_regno = reg_renumber[src_regno];
804 if (reg_renumber[dest_regno] >= 0)
805 dest_regno = reg_renumber[dest_regno];
807 /* Now if one is a hard reg and the other is a global pseudo
808 then give the other a preference. */
810 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
811 && reg_allocno[src_regno] >= 0)
813 dest_regno -= offset;
814 if (dest_regno < FIRST_PSEUDO_REGISTER)
816 if (copy)
817 SET_REGBIT (hard_reg_copy_preferences,
818 reg_allocno[src_regno], dest_regno);
820 SET_REGBIT (hard_reg_preferences,
821 reg_allocno[src_regno], dest_regno);
822 end_regno = end_hard_regno (GET_MODE (dest), dest_regno);
823 for (i = dest_regno; i < end_regno; i++)
824 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
828 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
829 && reg_allocno[dest_regno] >= 0)
831 src_regno += offset;
832 if (src_regno < FIRST_PSEUDO_REGISTER)
834 if (copy)
835 SET_REGBIT (hard_reg_copy_preferences,
836 reg_allocno[dest_regno], src_regno);
838 SET_REGBIT (hard_reg_preferences,
839 reg_allocno[dest_regno], src_regno);
840 end_regno = end_hard_regno (GET_MODE (src), src_regno);
841 for (i = src_regno; i < end_regno; i++)
842 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
847 /* Helper function for set_preferences. */
848 static void
849 set_preferences_1 (rtx reg, const_rtx setter, void *data ATTRIBUTE_UNUSED)
851 if (GET_CODE (reg) == SUBREG)
852 reg = SUBREG_REG (reg);
854 if (!REG_P (reg))
855 return;
857 gcc_assert (setter);
858 if (GET_CODE (setter) != CLOBBER)
859 set_preference (reg, SET_SRC (setter));
862 /* Scan all of the insns and initialize the preferences. */
864 static void
865 set_preferences (void)
867 basic_block bb;
868 rtx insn;
869 FOR_EACH_BB (bb)
870 FOR_BB_INSNS_REVERSE (bb, insn)
872 if (!INSN_P (insn))
873 continue;
875 note_stores (PATTERN (insn), set_preferences_1, NULL);
881 /* Prune the preferences for global registers to exclude registers that cannot
882 be used.
884 Compute `regs_someone_prefers', which is a bitmask of the hard registers
885 that are preferred by conflicting registers of lower priority. If possible,
886 we will avoid using these registers. */
888 static void
889 prune_preferences (void)
891 int i;
892 int num;
893 int *allocno_to_order = XNEWVEC (int, max_allocno);
895 /* Scan least most important to most important.
896 For each allocno, remove from preferences registers that cannot be used,
897 either because of conflicts or register type. Then compute all registers
898 preferred by each lower-priority register that conflicts. */
900 for (i = max_allocno - 1; i >= 0; i--)
902 HARD_REG_SET temp;
904 num = allocno_order[i];
905 allocno_to_order[num] = i;
906 COPY_HARD_REG_SET (temp, allocno[num].hard_reg_conflicts);
908 if (allocno[num].calls_crossed == 0)
909 IOR_HARD_REG_SET (temp, fixed_reg_set);
910 else
911 IOR_HARD_REG_SET (temp, call_used_reg_set);
913 IOR_COMPL_HARD_REG_SET
914 (temp,
915 reg_class_contents[(int) reg_preferred_class (allocno[num].reg)]);
917 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, temp);
918 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, temp);
919 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_full_preferences, temp);
922 for (i = max_allocno - 1; i >= 0; i--)
924 /* Merge in the preferences of lower-priority registers (they have
925 already been pruned). If we also prefer some of those registers,
926 don't exclude them unless we are of a smaller size (in which case
927 we want to give the lower-priority allocno the first chance for
928 these registers). */
929 HARD_REG_SET temp, temp2;
930 int allocno2;
931 adjacency_iter ai;
933 num = allocno_order[i];
935 CLEAR_HARD_REG_SET (temp);
936 CLEAR_HARD_REG_SET (temp2);
938 FOR_EACH_CONFLICT (num, allocno2, ai)
940 if (allocno_to_order[allocno2] > i)
942 if (allocno[allocno2].size <= allocno[num].size)
943 IOR_HARD_REG_SET (temp,
944 allocno[allocno2].hard_reg_full_preferences);
945 else
946 IOR_HARD_REG_SET (temp2,
947 allocno[allocno2].hard_reg_full_preferences);
951 AND_COMPL_HARD_REG_SET (temp, allocno[num].hard_reg_full_preferences);
952 IOR_HARD_REG_SET (temp, temp2);
953 COPY_HARD_REG_SET (allocno[num].regs_someone_prefers, temp);
955 free (allocno_to_order);
958 /* Assign a hard register to allocno NUM; look for one that is the beginning
959 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
960 The registers marked in PREFREGS are tried first.
962 LOSERS, if nonzero, is a HARD_REG_SET indicating registers that cannot
963 be used for this allocation.
965 If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
966 Otherwise ignore that preferred class and use the alternate class.
968 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
969 will have to be saved and restored at calls.
971 RETRYING is nonzero if this is called from retry_global_alloc.
973 If we find one, record it in reg_renumber.
974 If not, do nothing. */
976 static void
977 find_reg (int num, HARD_REG_SET losers, int alt_regs_p, int accept_call_clobbered, int retrying)
979 int i, best_reg, pass;
980 HARD_REG_SET used, used1, used2;
982 enum reg_class class = (alt_regs_p
983 ? reg_alternate_class (allocno[num].reg)
984 : reg_preferred_class (allocno[num].reg));
985 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno[num].reg);
987 if (accept_call_clobbered)
988 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
989 else if (allocno[num].calls_crossed == 0)
990 COPY_HARD_REG_SET (used1, fixed_reg_set);
991 else
992 COPY_HARD_REG_SET (used1, call_used_reg_set);
994 /* Some registers should not be allocated in global-alloc. */
995 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
996 if (losers)
997 IOR_HARD_REG_SET (used1, losers);
999 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]);
1001 #ifdef EH_RETURN_DATA_REGNO
1002 if (allocno[num].no_eh_reg)
1004 unsigned int j;
1005 for (j = 0; ; ++j)
1007 unsigned int regno = EH_RETURN_DATA_REGNO (j);
1008 if (regno == INVALID_REGNUM)
1009 break;
1010 SET_HARD_REG_BIT (used1, regno);
1013 #endif
1015 COPY_HARD_REG_SET (used2, used1);
1017 IOR_HARD_REG_SET (used1, allocno[num].hard_reg_conflicts);
1019 #ifdef CANNOT_CHANGE_MODE_CLASS
1020 cannot_change_mode_set_regs (&used1, mode, allocno[num].reg);
1021 #endif
1023 /* Try each hard reg to see if it fits. Do this in two passes.
1024 In the first pass, skip registers that are preferred by some other pseudo
1025 to give it a better chance of getting one of those registers. Only if
1026 we can't get a register when excluding those do we take one of them.
1027 However, we never allocate a register for the first time in pass 0. */
1029 COPY_HARD_REG_SET (used, used1);
1030 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
1031 IOR_HARD_REG_SET (used, allocno[num].regs_someone_prefers);
1033 best_reg = -1;
1034 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
1035 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
1036 pass++)
1038 if (pass == 1)
1039 COPY_HARD_REG_SET (used, used1);
1040 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1042 #ifdef REG_ALLOC_ORDER
1043 int regno = reg_alloc_order[i];
1044 #else
1045 int regno = i;
1046 #endif
1047 if (! TEST_HARD_REG_BIT (used, regno)
1048 && HARD_REGNO_MODE_OK (regno, mode)
1049 && (allocno[num].calls_crossed == 0
1050 || accept_call_clobbered
1051 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
1053 int j;
1054 int lim = end_hard_regno (mode, regno);
1055 for (j = regno + 1;
1056 (j < lim
1057 && ! TEST_HARD_REG_BIT (used, j));
1058 j++);
1059 if (j == lim)
1061 best_reg = regno;
1062 break;
1064 #ifndef REG_ALLOC_ORDER
1065 i = j; /* Skip starting points we know will lose */
1066 #endif
1071 /* See if there is a preferred register with the same class as the register
1072 we allocated above. Making this restriction prevents register
1073 preferencing from creating worse register allocation.
1075 Remove from the preferred registers and conflicting registers. Note that
1076 additional conflicts may have been added after `prune_preferences' was
1077 called.
1079 First do this for those register with copy preferences, then all
1080 preferred registers. */
1082 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, used);
1083 if (!hard_reg_set_empty_p (allocno[num].hard_reg_copy_preferences)
1084 && best_reg >= 0)
1086 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1087 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_copy_preferences, i)
1088 && HARD_REGNO_MODE_OK (i, mode)
1089 && (allocno[num].calls_crossed == 0
1090 || accept_call_clobbered
1091 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1092 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1093 || reg_class_subset_p (REGNO_REG_CLASS (i),
1094 REGNO_REG_CLASS (best_reg))
1095 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1096 REGNO_REG_CLASS (i))))
1098 int j;
1099 int lim = end_hard_regno (mode, i);
1100 for (j = i + 1;
1101 (j < lim
1102 && ! TEST_HARD_REG_BIT (used, j)
1103 && (REGNO_REG_CLASS (j)
1104 == REGNO_REG_CLASS (best_reg + (j - i))
1105 || reg_class_subset_p (REGNO_REG_CLASS (j),
1106 REGNO_REG_CLASS (best_reg + (j - i)))
1107 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1108 REGNO_REG_CLASS (j))));
1109 j++);
1110 if (j == lim)
1112 best_reg = i;
1113 goto no_prefs;
1118 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, used);
1119 if (!hard_reg_set_empty_p (allocno[num].hard_reg_preferences)
1120 && best_reg >= 0)
1122 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1123 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_preferences, i)
1124 && HARD_REGNO_MODE_OK (i, mode)
1125 && (allocno[num].calls_crossed == 0
1126 || accept_call_clobbered
1127 || ! HARD_REGNO_CALL_PART_CLOBBERED (i, mode))
1128 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1129 || reg_class_subset_p (REGNO_REG_CLASS (i),
1130 REGNO_REG_CLASS (best_reg))
1131 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1132 REGNO_REG_CLASS (i))))
1134 int j;
1135 int lim = end_hard_regno (mode, i);
1136 for (j = i + 1;
1137 (j < lim
1138 && ! TEST_HARD_REG_BIT (used, j)
1139 && (REGNO_REG_CLASS (j)
1140 == REGNO_REG_CLASS (best_reg + (j - i))
1141 || reg_class_subset_p (REGNO_REG_CLASS (j),
1142 REGNO_REG_CLASS (best_reg + (j - i)))
1143 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1144 REGNO_REG_CLASS (j))));
1145 j++);
1146 if (j == lim)
1148 best_reg = i;
1149 break;
1153 no_prefs:
1155 /* If we haven't succeeded yet, try with caller-saves.
1156 We need not check to see if the current function has nonlocal
1157 labels because we don't put any pseudos that are live over calls in
1158 registers in that case. */
1160 if (flag_caller_saves && best_reg < 0)
1162 /* Did not find a register. If it would be profitable to
1163 allocate a call-clobbered register and save and restore it
1164 around calls, do that. Don't do this if it crosses any calls
1165 that might throw. */
1166 if (! accept_call_clobbered
1167 && allocno[num].calls_crossed != 0
1168 && allocno[num].throwing_calls_crossed == 0
1169 && CALLER_SAVE_PROFITABLE (optimize_size ? allocno[num].n_refs : allocno[num].freq,
1170 optimize_size ? allocno[num].calls_crossed
1171 : allocno[num].freq_calls_crossed))
1173 HARD_REG_SET new_losers;
1174 if (! losers)
1175 CLEAR_HARD_REG_SET (new_losers);
1176 else
1177 COPY_HARD_REG_SET (new_losers, losers);
1179 IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set);
1180 find_reg (num, new_losers, alt_regs_p, 1, retrying);
1181 if (reg_renumber[allocno[num].reg] >= 0)
1183 caller_save_needed = 1;
1184 return;
1189 /* If we haven't succeeded yet,
1190 see if some hard reg that conflicts with us
1191 was utilized poorly by local-alloc.
1192 If so, kick out the regs that were put there by local-alloc
1193 so we can use it instead. */
1194 if (best_reg < 0 && !retrying
1195 /* Let's not bother with multi-reg allocnos. */
1196 && allocno[num].size == 1
1197 && REG_BASIC_BLOCK (allocno[num].reg) == REG_BLOCK_GLOBAL)
1199 /* Count from the end, to find the least-used ones first. */
1200 for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
1202 #ifdef REG_ALLOC_ORDER
1203 int regno = reg_alloc_order[i];
1204 #else
1205 int regno = i;
1206 #endif
1208 if (local_reg_n_refs[regno] != 0
1209 /* Don't use a reg no good for this pseudo. */
1210 && ! TEST_HARD_REG_BIT (used2, regno)
1211 && HARD_REGNO_MODE_OK (regno, mode)
1212 /* The code below assumes that we need only a single
1213 register, but the check of allocno[num].size above
1214 was not enough. Sometimes we need more than one
1215 register for a single-word value. */
1216 && hard_regno_nregs[regno][mode] == 1
1217 && (allocno[num].calls_crossed == 0
1218 || accept_call_clobbered
1219 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
1220 #ifdef CANNOT_CHANGE_MODE_CLASS
1221 && ! invalid_mode_change_p (regno, REGNO_REG_CLASS (regno),
1222 mode)
1223 #endif
1224 #ifdef STACK_REGS
1225 && (!allocno[num].no_stack_reg
1226 || regno < FIRST_STACK_REG || regno > LAST_STACK_REG)
1227 #endif
1230 /* We explicitly evaluate the divide results into temporary
1231 variables so as to avoid excess precision problems that occur
1232 on an i386-unknown-sysv4.2 (unixware) host. */
1234 double tmp1 = ((double) local_reg_freq[regno] * local_reg_n_refs[regno]
1235 / local_reg_live_length[regno]);
1236 double tmp2 = ((double) allocno[num].freq * allocno[num].n_refs
1237 / allocno[num].live_length);
1239 if (tmp1 < tmp2)
1241 /* Hard reg REGNO was used less in total by local regs
1242 than it would be used by this one allocno! */
1243 int k;
1244 if (dump_file)
1246 fprintf (dump_file, "Regno %d better for global %d, ",
1247 regno, allocno[num].reg);
1248 fprintf (dump_file, "fr:%d, ll:%d, nr:%d ",
1249 allocno[num].freq, allocno[num].live_length,
1250 allocno[num].n_refs);
1251 fprintf (dump_file, "(was: fr:%d, ll:%d, nr:%d)\n",
1252 local_reg_freq[regno],
1253 local_reg_live_length[regno],
1254 local_reg_n_refs[regno]);
1257 for (k = 0; k < max_regno; k++)
1258 if (reg_renumber[k] >= 0)
1260 int r = reg_renumber[k];
1261 int endregno
1262 = end_hard_regno (PSEUDO_REGNO_MODE (k), r);
1264 if (regno >= r && regno < endregno)
1266 if (dump_file)
1267 fprintf (dump_file,
1268 "Local Reg %d now on stack\n", k);
1269 reg_renumber[k] = -1;
1273 best_reg = regno;
1274 break;
1280 /* Did we find a register? */
1282 if (best_reg >= 0)
1284 int lim, j;
1285 HARD_REG_SET this_reg;
1286 adjacency_iter ai;
1288 /* Yes. Record it as the hard register of this pseudo-reg. */
1289 reg_renumber[allocno[num].reg] = best_reg;
1291 /* Make a set of the hard regs being allocated. */
1292 CLEAR_HARD_REG_SET (this_reg);
1293 lim = end_hard_regno (mode, best_reg);
1294 for (j = best_reg; j < lim; j++)
1296 SET_HARD_REG_BIT (this_reg, j);
1297 SET_HARD_REG_BIT (regs_used_so_far, j);
1298 /* This is no longer a reg used just by local regs. */
1299 local_reg_n_refs[j] = 0;
1300 local_reg_freq[j] = 0;
1302 /* For each other pseudo-reg conflicting with this one,
1303 mark it as conflicting with the hard regs this one occupies. */
1304 FOR_EACH_CONFLICT (num, j, ai)
1306 IOR_HARD_REG_SET (allocno[j].hard_reg_conflicts, this_reg);
1311 /* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
1312 Perhaps it had previously seemed not worth a hard reg,
1313 or perhaps its old hard reg has been commandeered for reloads.
1314 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
1315 they do not appear to be allocated.
1316 If FORBIDDEN_REGS is zero, no regs are forbidden. */
1318 void
1319 retry_global_alloc (int regno, HARD_REG_SET forbidden_regs)
1321 int alloc_no = reg_allocno[regno];
1322 if (alloc_no >= 0)
1324 /* If we have more than one register class,
1325 first try allocating in the class that is cheapest
1326 for this pseudo-reg. If that fails, try any reg. */
1327 if (N_REG_CLASSES > 1)
1328 find_reg (alloc_no, forbidden_regs, 0, 0, 1);
1329 if (reg_renumber[regno] < 0
1330 && reg_alternate_class (regno) != NO_REGS)
1331 find_reg (alloc_no, forbidden_regs, 1, 0, 1);
1333 /* If we found a register, modify the RTL for the register to
1334 show the hard register, and mark that register live. */
1335 if (reg_renumber[regno] >= 0)
1337 SET_REGNO (regno_reg_rtx[regno], reg_renumber[regno]);
1338 mark_home_live (regno);
1343 /* Indicate that hard register number FROM was eliminated and replaced with
1344 an offset from hard register number TO. The status of hard registers live
1345 at the start of a basic block is updated by replacing a use of FROM with
1346 a use of TO. */
1348 void
1349 mark_elimination (int from, int to)
1351 basic_block bb;
1353 FOR_EACH_BB (bb)
1355 /* We don't use LIVE info in IRA. */
1356 regset r = (flag_ira ? DF_LR_IN (bb) : DF_LIVE_IN (bb));
1357 if (REGNO_REG_SET_P (r, from))
1359 CLEAR_REGNO_REG_SET (r, from);
1360 SET_REGNO_REG_SET (r, to);
1365 /* Print chain C to FILE. */
1367 static void
1368 print_insn_chain (FILE *file, struct insn_chain *c)
1370 fprintf (file, "insn=%d, ", INSN_UID(c->insn));
1371 bitmap_print (file, &c->live_throughout, "live_throughout: ", ", ");
1372 bitmap_print (file, &c->dead_or_set, "dead_or_set: ", "\n");
1373 bitmap_print (file, &c->saved, "saved: ", "\n");
1377 /* Print all reload_insn_chains to FILE. */
1379 static void
1380 print_insn_chains (FILE *file)
1382 struct insn_chain *c;
1383 for (c = reload_insn_chain; c ; c = c->next)
1384 print_insn_chain (file, c);
1388 /* Walk the insns of the current function and build reload_insn_chain,
1389 and record register life information. */
1391 void
1392 build_insn_chain (void)
1394 unsigned int i;
1395 struct insn_chain **p = &reload_insn_chain;
1396 basic_block bb;
1397 struct insn_chain *c = NULL;
1398 struct insn_chain *next = NULL;
1399 bitmap live_relevant_regs = BITMAP_ALLOC (NULL);
1400 bitmap elim_regset = BITMAP_ALLOC (NULL);
1401 /* live_subregs is a vector used to keep accurate information about
1402 which hardregs are live in multiword pseudos. live_subregs and
1403 live_subregs_used are indexed by pseudo number. The live_subreg
1404 entry for a particular pseudo is only used if the corresponding
1405 element is non zero in live_subregs_used. The value in
1406 live_subregs_used is number of bytes that the pseudo can
1407 occupy. */
1408 sbitmap *live_subregs = XCNEWVEC (sbitmap, max_regno);
1409 int *live_subregs_used = XNEWVEC (int, max_regno);
1411 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1412 if (TEST_HARD_REG_BIT (eliminable_regset, i))
1413 bitmap_set_bit (elim_regset, i);
1414 FOR_EACH_BB_REVERSE (bb)
1416 bitmap_iterator bi;
1417 rtx insn;
1419 CLEAR_REG_SET (live_relevant_regs);
1420 memset (live_subregs_used, 0, max_regno * sizeof (int));
1422 EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), 0, i, bi)
1424 if (i >= FIRST_PSEUDO_REGISTER)
1425 break;
1426 bitmap_set_bit (live_relevant_regs, i);
1429 EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), FIRST_PSEUDO_REGISTER, i, bi)
1431 /* Consider spilled pseudos too for IRA because they still
1432 have a chance to get hard-registers in the reload when
1433 IRA is used. */
1434 if (reg_renumber[i] >= 0 || (flag_ira && optimize))
1435 bitmap_set_bit (live_relevant_regs, i);
1438 FOR_BB_INSNS_REVERSE (bb, insn)
1440 if (!NOTE_P (insn) && !BARRIER_P (insn))
1442 unsigned int uid = INSN_UID (insn);
1443 struct df_ref **def_rec;
1444 struct df_ref **use_rec;
1446 c = new_insn_chain ();
1447 c->next = next;
1448 next = c;
1449 *p = c;
1450 p = &c->prev;
1452 c->insn = insn;
1453 c->block = bb->index;
1455 if (INSN_P (insn))
1456 for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
1458 struct df_ref *def = *def_rec;
1459 unsigned int regno = DF_REF_REGNO (def);
1461 /* Ignore may clobbers because these are generated
1462 from calls. However, every other kind of def is
1463 added to dead_or_set. */
1464 if (!DF_REF_FLAGS_IS_SET (def, DF_REF_MAY_CLOBBER))
1466 if (regno < FIRST_PSEUDO_REGISTER)
1468 if (!fixed_regs[regno])
1469 bitmap_set_bit (&c->dead_or_set, regno);
1471 /* Consider spilled pseudos too for IRA
1472 because they still have a chance to get
1473 hard-registers in the reload when IRA is
1474 used. */
1475 else if (reg_renumber[regno] >= 0
1476 || (flag_ira && optimize))
1477 bitmap_set_bit (&c->dead_or_set, regno);
1480 if ((regno < FIRST_PSEUDO_REGISTER
1481 || reg_renumber[regno] >= 0
1482 || (flag_ira && optimize))
1483 && (!DF_REF_FLAGS_IS_SET (def, DF_REF_CONDITIONAL)))
1485 rtx reg = DF_REF_REG (def);
1487 /* We can model subregs, but not if they are
1488 wrapped in ZERO_EXTRACTS. */
1489 if (GET_CODE (reg) == SUBREG
1490 && !DF_REF_FLAGS_IS_SET (def, DF_REF_ZERO_EXTRACT))
1492 unsigned int start = SUBREG_BYTE (reg);
1493 unsigned int last = start
1494 + GET_MODE_SIZE (GET_MODE (reg));
1496 ra_init_live_subregs (bitmap_bit_p (live_relevant_regs,
1497 regno),
1498 live_subregs,
1499 live_subregs_used,
1500 regno, reg);
1502 if (!DF_REF_FLAGS_IS_SET
1503 (def, DF_REF_STRICT_LOW_PART))
1505 /* Expand the range to cover entire words.
1506 Bytes added here are "don't care". */
1507 start = start / UNITS_PER_WORD * UNITS_PER_WORD;
1508 last = ((last + UNITS_PER_WORD - 1)
1509 / UNITS_PER_WORD * UNITS_PER_WORD);
1512 /* Ignore the paradoxical bits. */
1513 if ((int)last > live_subregs_used[regno])
1514 last = live_subregs_used[regno];
1516 while (start < last)
1518 RESET_BIT (live_subregs[regno], start);
1519 start++;
1522 if (sbitmap_empty_p (live_subregs[regno]))
1524 live_subregs_used[regno] = 0;
1525 bitmap_clear_bit (live_relevant_regs, regno);
1527 else
1528 /* Set live_relevant_regs here because
1529 that bit has to be true to get us to
1530 look at the live_subregs fields. */
1531 bitmap_set_bit (live_relevant_regs, regno);
1533 else
1535 /* DF_REF_PARTIAL is generated for
1536 subregs, STRICT_LOW_PART, and
1537 ZERO_EXTRACT. We handle the subreg
1538 case above so here we have to keep from
1539 modeling the def as a killing def. */
1540 if (!DF_REF_FLAGS_IS_SET (def, DF_REF_PARTIAL))
1542 bitmap_clear_bit (live_relevant_regs, regno);
1543 live_subregs_used[regno] = 0;
1549 bitmap_and_compl_into (live_relevant_regs, elim_regset);
1550 bitmap_copy (&c->live_throughout, live_relevant_regs);
1552 if (INSN_P (insn))
1553 for (use_rec = DF_INSN_UID_USES (uid); *use_rec; use_rec++)
1555 struct df_ref *use = *use_rec;
1556 unsigned int regno = DF_REF_REGNO (use);
1557 rtx reg = DF_REF_REG (use);
1559 /* DF_REF_READ_WRITE on a use means that this use
1560 is fabricated from a def that is a partial set
1561 to a multiword reg. Here, we only model the
1562 subreg case that is not wrapped in ZERO_EXTRACT
1563 precisely so we do not need to look at the
1564 fabricated use. */
1565 if (DF_REF_FLAGS_IS_SET (use, DF_REF_READ_WRITE)
1566 && !DF_REF_FLAGS_IS_SET (use, DF_REF_ZERO_EXTRACT)
1567 && DF_REF_FLAGS_IS_SET (use, DF_REF_SUBREG))
1568 continue;
1570 /* Add the last use of each var to dead_or_set. */
1571 if (!bitmap_bit_p (live_relevant_regs, regno))
1573 if (regno < FIRST_PSEUDO_REGISTER)
1575 if (!fixed_regs[regno])
1576 bitmap_set_bit (&c->dead_or_set, regno);
1578 /* Consider spilled pseudos too for IRA
1579 because they still have a chance to get
1580 hard-registers in the reload when IRA is
1581 used. */
1582 else if (reg_renumber[regno] >= 0
1583 || (flag_ira && optimize))
1584 bitmap_set_bit (&c->dead_or_set, regno);
1587 if (regno < FIRST_PSEUDO_REGISTER
1588 /* Consider spilled pseudos too for IRA
1589 because they still have a chance to get
1590 hard-registers in the reload when IRA is
1591 used. */
1592 || reg_renumber[regno] >= 0
1593 || (flag_ira && optimize))
1595 if (GET_CODE (reg) == SUBREG
1596 && !DF_REF_FLAGS_IS_SET (use,
1597 DF_REF_SIGN_EXTRACT | DF_REF_ZERO_EXTRACT))
1599 unsigned int start = SUBREG_BYTE (reg);
1600 unsigned int last = start
1601 + GET_MODE_SIZE (GET_MODE (reg));
1603 ra_init_live_subregs (bitmap_bit_p (live_relevant_regs,
1604 regno),
1605 live_subregs,
1606 live_subregs_used,
1607 regno, reg);
1609 /* Ignore the paradoxical bits. */
1610 if ((int)last > live_subregs_used[regno])
1611 last = live_subregs_used[regno];
1613 while (start < last)
1615 SET_BIT (live_subregs[regno], start);
1616 start++;
1619 else
1620 /* Resetting the live_subregs_used is
1621 effectively saying do not use the subregs
1622 because we are reading the whole
1623 pseudo. */
1624 live_subregs_used[regno] = 0;
1625 bitmap_set_bit (live_relevant_regs, regno);
1631 /* FIXME!! The following code is a disaster. Reload needs to see the
1632 labels and jump tables that are just hanging out in between
1633 the basic blocks. See pr33676. */
1634 insn = BB_HEAD (bb);
1636 /* Skip over the barriers and cruft. */
1637 while (insn && (BARRIER_P (insn) || NOTE_P (insn)
1638 || BLOCK_FOR_INSN (insn) == bb))
1639 insn = PREV_INSN (insn);
1641 /* While we add anything except barriers and notes, the focus is
1642 to get the labels and jump tables into the
1643 reload_insn_chain. */
1644 while (insn)
1646 if (!NOTE_P (insn) && !BARRIER_P (insn))
1648 if (BLOCK_FOR_INSN (insn))
1649 break;
1651 c = new_insn_chain ();
1652 c->next = next;
1653 next = c;
1654 *p = c;
1655 p = &c->prev;
1657 /* The block makes no sense here, but it is what the old
1658 code did. */
1659 c->block = bb->index;
1660 c->insn = insn;
1661 bitmap_copy (&c->live_throughout, live_relevant_regs);
1663 insn = PREV_INSN (insn);
1667 for (i = 0; i < (unsigned int) max_regno; i++)
1668 if (live_subregs[i])
1669 free (live_subregs[i]);
1671 reload_insn_chain = c;
1672 *p = NULL;
1674 free (live_subregs);
1675 free (live_subregs_used);
1676 BITMAP_FREE (live_relevant_regs);
1677 BITMAP_FREE (elim_regset);
1679 if (dump_file)
1680 print_insn_chains (dump_file);
1683 /* Print debugging trace information if -dg switch is given,
1684 showing the information on which the allocation decisions are based. */
1686 static void
1687 dump_conflicts (FILE *file)
1689 int i;
1690 int regno;
1691 int has_preferences;
1692 int nregs;
1693 nregs = 0;
1694 for (i = 0; i < max_allocno; i++)
1696 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1697 continue;
1698 nregs++;
1700 fprintf (file, ";; %d regs to allocate:", nregs);
1701 for (regno = 0; regno < max_regno; regno++)
1702 if ((i = reg_allocno[regno]) >= 0)
1704 int j;
1705 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
1706 continue;
1707 fprintf (file, " %d", allocno[allocno_order[i]].reg);
1708 for (j = 0; j < max_regno; j++)
1709 if (reg_allocno[j] == allocno_order[i]
1710 && j != allocno[allocno_order[i]].reg)
1711 fprintf (file, "+%d", j);
1712 if (allocno[allocno_order[i]].size != 1)
1713 fprintf (file, " (%d)", allocno[allocno_order[i]].size);
1715 fprintf (file, "\n");
1717 for (regno = 0; regno < max_regno; regno++)
1718 if ((i = reg_allocno[regno]) >= 0)
1720 int j;
1721 adjacency_iter ai;
1722 fprintf (file, ";; %d conflicts:", allocno[i].reg);
1723 FOR_EACH_CONFLICT (i, j, ai)
1725 fprintf (file, " %d", allocno[j].reg);
1727 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1728 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_conflicts, j)
1729 && !fixed_regs[j])
1730 fprintf (file, " %d", j);
1731 fprintf (file, "\n");
1733 has_preferences = 0;
1734 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1735 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1736 has_preferences = 1;
1738 if (!has_preferences)
1739 continue;
1740 fprintf (file, ";; %d preferences:", allocno[i].reg);
1741 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1742 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
1743 fprintf (file, " %d", j);
1744 fprintf (file, "\n");
1746 fprintf (file, "\n");
1749 void
1750 dump_global_regs (FILE *file)
1752 int i, j;
1754 fprintf (file, ";; Register dispositions:\n");
1755 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
1756 if (reg_renumber[i] >= 0)
1758 fprintf (file, "%d in %d ", i, reg_renumber[i]);
1759 if (++j % 6 == 0)
1760 fprintf (file, "\n");
1763 fprintf (file, "\n\n;; Hard regs used: ");
1764 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1765 if (df_regs_ever_live_p (i))
1766 fprintf (file, " %d", i);
1767 fprintf (file, "\n\n");
1771 static bool
1772 gate_handle_global_alloc (void)
1774 return ! flag_ira;
1777 /* Run old register allocator. Return TRUE if we must exit
1778 rest_of_compilation upon return. */
1779 static unsigned int
1780 rest_of_handle_global_alloc (void)
1782 bool failure;
1784 /* If optimizing, allocate remaining pseudo-regs. Do the reload
1785 pass fixing up any insns that are invalid. */
1786 if (optimize && dbg_cnt (global_alloc_at_func))
1787 failure = global_alloc ();
1788 else
1790 /* There is just too much going on in the register allocators to
1791 keep things up to date. At the end we have to rescan anyway
1792 because things change when the reload_completed flag is set.
1793 So we just turn off scanning and we will rescan by hand. */
1794 df_set_flags (DF_NO_INSN_RESCAN);
1795 compute_regsets (&eliminable_regset, &no_global_alloc_regs);
1796 build_insn_chain ();
1797 df_set_flags (DF_NO_INSN_RESCAN);
1798 failure = reload (get_insns (), 0);
1801 if (dump_enabled_p (pass_global_alloc.pass.static_pass_number))
1803 timevar_push (TV_DUMP);
1804 dump_global_regs (dump_file);
1805 timevar_pop (TV_DUMP);
1808 /* FIXME: This appears on the surface to be wrong thing to be doing.
1809 So much of the compiler is designed to check reload_completed to
1810 see if it is running after reload that seems doomed to failure.
1811 We should be returning a value that says that we have found
1812 errors so that nothing but the cleanup passes are run
1813 afterwards. */
1814 gcc_assert (reload_completed || failure);
1815 reload_completed = !failure;
1817 /* The world has changed so much that at this point we might as well
1818 just rescan everything. Note that df_rescan_all_insns is not
1819 going to help here because it does not touch the artificial uses
1820 and defs. */
1821 df_finish_pass (true);
1822 if (optimize > 1)
1823 df_live_add_problem ();
1824 df_scan_alloc (NULL);
1825 df_scan_blocks ();
1827 if (optimize)
1828 df_analyze ();
1830 regstat_free_n_sets_and_refs ();
1831 regstat_free_ri ();
1832 return 0;
1835 struct rtl_opt_pass pass_global_alloc =
1838 RTL_PASS,
1839 "greg", /* name */
1840 gate_handle_global_alloc, /* gate */
1841 rest_of_handle_global_alloc, /* execute */
1842 NULL, /* sub */
1843 NULL, /* next */
1844 0, /* static_pass_number */
1845 TV_GLOBAL_ALLOC, /* tv_id */
1846 0, /* properties_required */
1847 0, /* properties_provided */
1848 0, /* properties_destroyed */
1849 0, /* todo_flags_start */
1850 TODO_dump_func | TODO_verify_rtl_sharing
1851 | TODO_ggc_collect /* todo_flags_finish */