2008-05-30 Vladimir Makarov <vmakarov@redhat.com>
[official-gcc.git] / gcc / cse.c
blob82d191ff36611c29bbcbea2b197cff3f26148de9
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "hard-reg-set.h"
30 #include "regs.h"
31 #include "basic-block.h"
32 #include "flags.h"
33 #include "real.h"
34 #include "insn-config.h"
35 #include "recog.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "toplev.h"
39 #include "output.h"
40 #include "ggc.h"
41 #include "timevar.h"
42 #include "except.h"
43 #include "target.h"
44 #include "params.h"
45 #include "rtlhooks-def.h"
46 #include "tree-pass.h"
47 #include "df.h"
48 #include "dbgcnt.h"
50 /* The basic idea of common subexpression elimination is to go
51 through the code, keeping a record of expressions that would
52 have the same value at the current scan point, and replacing
53 expressions encountered with the cheapest equivalent expression.
55 It is too complicated to keep track of the different possibilities
56 when control paths merge in this code; so, at each label, we forget all
57 that is known and start fresh. This can be described as processing each
58 extended basic block separately. We have a separate pass to perform
59 global CSE.
61 Note CSE can turn a conditional or computed jump into a nop or
62 an unconditional jump. When this occurs we arrange to run the jump
63 optimizer after CSE to delete the unreachable code.
65 We use two data structures to record the equivalent expressions:
66 a hash table for most expressions, and a vector of "quantity
67 numbers" to record equivalent (pseudo) registers.
69 The use of the special data structure for registers is desirable
70 because it is faster. It is possible because registers references
71 contain a fairly small number, the register number, taken from
72 a contiguously allocated series, and two register references are
73 identical if they have the same number. General expressions
74 do not have any such thing, so the only way to retrieve the
75 information recorded on an expression other than a register
76 is to keep it in a hash table.
78 Registers and "quantity numbers":
80 At the start of each basic block, all of the (hardware and pseudo)
81 registers used in the function are given distinct quantity
82 numbers to indicate their contents. During scan, when the code
83 copies one register into another, we copy the quantity number.
84 When a register is loaded in any other way, we allocate a new
85 quantity number to describe the value generated by this operation.
86 `REG_QTY (N)' records what quantity register N is currently thought
87 of as containing.
89 All real quantity numbers are greater than or equal to zero.
90 If register N has not been assigned a quantity, `REG_QTY (N)' will
91 equal -N - 1, which is always negative.
93 Quantity numbers below zero do not exist and none of the `qty_table'
94 entries should be referenced with a negative index.
96 We also maintain a bidirectional chain of registers for each
97 quantity number. The `qty_table` members `first_reg' and `last_reg',
98 and `reg_eqv_table' members `next' and `prev' hold these chains.
100 The first register in a chain is the one whose lifespan is least local.
101 Among equals, it is the one that was seen first.
102 We replace any equivalent register with that one.
104 If two registers have the same quantity number, it must be true that
105 REG expressions with qty_table `mode' must be in the hash table for both
106 registers and must be in the same class.
108 The converse is not true. Since hard registers may be referenced in
109 any mode, two REG expressions might be equivalent in the hash table
110 but not have the same quantity number if the quantity number of one
111 of the registers is not the same mode as those expressions.
113 Constants and quantity numbers
115 When a quantity has a known constant value, that value is stored
116 in the appropriate qty_table `const_rtx'. This is in addition to
117 putting the constant in the hash table as is usual for non-regs.
119 Whether a reg or a constant is preferred is determined by the configuration
120 macro CONST_COSTS and will often depend on the constant value. In any
121 event, expressions containing constants can be simplified, by fold_rtx.
123 When a quantity has a known nearly constant value (such as an address
124 of a stack slot), that value is stored in the appropriate qty_table
125 `const_rtx'.
127 Integer constants don't have a machine mode. However, cse
128 determines the intended machine mode from the destination
129 of the instruction that moves the constant. The machine mode
130 is recorded in the hash table along with the actual RTL
131 constant expression so that different modes are kept separate.
133 Other expressions:
135 To record known equivalences among expressions in general
136 we use a hash table called `table'. It has a fixed number of buckets
137 that contain chains of `struct table_elt' elements for expressions.
138 These chains connect the elements whose expressions have the same
139 hash codes.
141 Other chains through the same elements connect the elements which
142 currently have equivalent values.
144 Register references in an expression are canonicalized before hashing
145 the expression. This is done using `reg_qty' and qty_table `first_reg'.
146 The hash code of a register reference is computed using the quantity
147 number, not the register number.
149 When the value of an expression changes, it is necessary to remove from the
150 hash table not just that expression but all expressions whose values
151 could be different as a result.
153 1. If the value changing is in memory, except in special cases
154 ANYTHING referring to memory could be changed. That is because
155 nobody knows where a pointer does not point.
156 The function `invalidate_memory' removes what is necessary.
158 The special cases are when the address is constant or is
159 a constant plus a fixed register such as the frame pointer
160 or a static chain pointer. When such addresses are stored in,
161 we can tell exactly which other such addresses must be invalidated
162 due to overlap. `invalidate' does this.
163 All expressions that refer to non-constant
164 memory addresses are also invalidated. `invalidate_memory' does this.
166 2. If the value changing is a register, all expressions
167 containing references to that register, and only those,
168 must be removed.
170 Because searching the entire hash table for expressions that contain
171 a register is very slow, we try to figure out when it isn't necessary.
172 Precisely, this is necessary only when expressions have been
173 entered in the hash table using this register, and then the value has
174 changed, and then another expression wants to be added to refer to
175 the register's new value. This sequence of circumstances is rare
176 within any one basic block.
178 `REG_TICK' and `REG_IN_TABLE', accessors for members of
179 cse_reg_info, are used to detect this case. REG_TICK (i) is
180 incremented whenever a value is stored in register i.
181 REG_IN_TABLE (i) holds -1 if no references to register i have been
182 entered in the table; otherwise, it contains the value REG_TICK (i)
183 had when the references were entered. If we want to enter a
184 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
185 remove old references. Until we want to enter a new entry, the
186 mere fact that the two vectors don't match makes the entries be
187 ignored if anyone tries to match them.
189 Registers themselves are entered in the hash table as well as in
190 the equivalent-register chains. However, `REG_TICK' and
191 `REG_IN_TABLE' do not apply to expressions which are simple
192 register references. These expressions are removed from the table
193 immediately when they become invalid, and this can be done even if
194 we do not immediately search for all the expressions that refer to
195 the register.
197 A CLOBBER rtx in an instruction invalidates its operand for further
198 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
199 invalidates everything that resides in memory.
201 Related expressions:
203 Constant expressions that differ only by an additive integer
204 are called related. When a constant expression is put in
205 the table, the related expression with no constant term
206 is also entered. These are made to point at each other
207 so that it is possible to find out if there exists any
208 register equivalent to an expression related to a given expression. */
210 /* Length of qty_table vector. We know in advance we will not need
211 a quantity number this big. */
213 static int max_qty;
215 /* Next quantity number to be allocated.
216 This is 1 + the largest number needed so far. */
218 static int next_qty;
220 /* Per-qty information tracking.
222 `first_reg' and `last_reg' track the head and tail of the
223 chain of registers which currently contain this quantity.
225 `mode' contains the machine mode of this quantity.
227 `const_rtx' holds the rtx of the constant value of this
228 quantity, if known. A summations of the frame/arg pointer
229 and a constant can also be entered here. When this holds
230 a known value, `const_insn' is the insn which stored the
231 constant value.
233 `comparison_{code,const,qty}' are used to track when a
234 comparison between a quantity and some constant or register has
235 been passed. In such a case, we know the results of the comparison
236 in case we see it again. These members record a comparison that
237 is known to be true. `comparison_code' holds the rtx code of such
238 a comparison, else it is set to UNKNOWN and the other two
239 comparison members are undefined. `comparison_const' holds
240 the constant being compared against, or zero if the comparison
241 is not against a constant. `comparison_qty' holds the quantity
242 being compared against when the result is known. If the comparison
243 is not with a register, `comparison_qty' is -1. */
245 struct qty_table_elem
247 rtx const_rtx;
248 rtx const_insn;
249 rtx comparison_const;
250 int comparison_qty;
251 unsigned int first_reg, last_reg;
252 /* The sizes of these fields should match the sizes of the
253 code and mode fields of struct rtx_def (see rtl.h). */
254 ENUM_BITFIELD(rtx_code) comparison_code : 16;
255 ENUM_BITFIELD(machine_mode) mode : 8;
258 /* The table of all qtys, indexed by qty number. */
259 static struct qty_table_elem *qty_table;
261 /* Structure used to pass arguments via for_each_rtx to function
262 cse_change_cc_mode. */
263 struct change_cc_mode_args
265 rtx insn;
266 rtx newreg;
269 #ifdef HAVE_cc0
270 /* For machines that have a CC0, we do not record its value in the hash
271 table since its use is guaranteed to be the insn immediately following
272 its definition and any other insn is presumed to invalidate it.
274 Instead, we store below the current and last value assigned to CC0.
275 If it should happen to be a constant, it is stored in preference
276 to the actual assigned value. In case it is a constant, we store
277 the mode in which the constant should be interpreted. */
279 static rtx this_insn_cc0, prev_insn_cc0;
280 static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
281 #endif
283 /* Insn being scanned. */
285 static rtx this_insn;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
289 value.
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
296 struct reg_eqv_elem
298 int next, prev;
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
304 struct cse_reg_info
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp;
309 /* The quantity number of the register's current contents. */
310 int reg_qty;
312 /* The number of times the register has been altered in the current
313 basic block. */
314 int reg_tick;
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
319 invalid. */
320 int reg_in_table;
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info *cse_reg_info_table;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table;
351 /* True if CSE has altered the CFG. */
352 static bool cse_cfg_altered;
354 /* True if CSE has altered conditional jump insns in such a way
355 that jump optimization should be redone. */
356 static bool cse_jumps_altered;
358 /* True if we put a LABEL_REF into the hash table for an INSN
359 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
360 to put in the note. */
361 static bool recorded_label_ref;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
365 subexpression. */
367 static int do_not_record;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory;
374 /* The hash table contains buckets which are chains of `struct table_elt's,
375 each recording one expression's information.
376 That expression is in the `exp' field.
378 The canon_exp field contains a canonical (from the point of view of
379 alias analysis) version of the `exp' field.
381 Those elements with the same hash code are chained in both directions
382 through the `next_same_hash' and `prev_same_hash' fields.
384 Each set of expressions with equivalent values
385 are on a two-way chain through the `next_same_value'
386 and `prev_same_value' fields, and all point with
387 the `first_same_value' field at the first element in
388 that chain. The chain is in order of increasing cost.
389 Each element's cost value is in its `cost' field.
391 The `in_memory' field is nonzero for elements that
392 involve any reference to memory. These elements are removed
393 whenever a write is done to an unidentified location in memory.
394 To be safe, we assume that a memory address is unidentified unless
395 the address is either a symbol constant or a constant plus
396 the frame pointer or argument pointer.
398 The `related_value' field is used to connect related expressions
399 (that differ by adding an integer).
400 The related expressions are chained in a circular fashion.
401 `related_value' is zero for expressions for which this
402 chain is not useful.
404 The `cost' field stores the cost of this element's expression.
405 The `regcost' field stores the value returned by approx_reg_cost for
406 this element's expression.
408 The `is_const' flag is set if the element is a constant (including
409 a fixed address).
411 The `flag' field is used as a temporary during some search routines.
413 The `mode' field is usually the same as GET_MODE (`exp'), but
414 if `exp' is a CONST_INT and has no machine mode then the `mode'
415 field is the mode it was being used as. Each constant is
416 recorded separately for each mode it is used with. */
418 struct table_elt
420 rtx exp;
421 rtx canon_exp;
422 struct table_elt *next_same_hash;
423 struct table_elt *prev_same_hash;
424 struct table_elt *next_same_value;
425 struct table_elt *prev_same_value;
426 struct table_elt *first_same_value;
427 struct table_elt *related_value;
428 int cost;
429 int regcost;
430 /* The size of this field should match the size
431 of the mode field of struct rtx_def (see rtl.h). */
432 ENUM_BITFIELD(machine_mode) mode : 8;
433 char in_memory;
434 char is_const;
435 char flag;
438 /* We don't want a lot of buckets, because we rarely have very many
439 things stored in the hash table, and a lot of buckets slows
440 down a lot of loops that happen frequently. */
441 #define HASH_SHIFT 5
442 #define HASH_SIZE (1 << HASH_SHIFT)
443 #define HASH_MASK (HASH_SIZE - 1)
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
448 #define HASH(X, M) \
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : canon_hash (X, M)) & HASH_MASK)
453 /* Like HASH, but without side-effects. */
454 #define SAFE_HASH(X, M) \
455 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
457 : safe_hash (X, M)) & HASH_MASK)
459 /* Determine whether register number N is considered a fixed register for the
460 purpose of approximating register costs.
461 It is desirable to replace other regs with fixed regs, to reduce need for
462 non-fixed hard regs.
463 A reg wins if it is either the frame pointer or designated as fixed. */
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 (REGNO_PTR_FRAME_P(N) \
475 || (HARD_REGISTER_NUM_P (N) \
476 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
478 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
479 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
481 /* Get the number of times this register has been updated in this
482 basic block. */
484 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
486 /* Get the point at which REG was recorded in the table. */
488 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
490 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
491 SUBREG). */
493 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
495 /* Get the quantity number for REG. */
497 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
499 /* Determine if the quantity number for register X represents a valid index
500 into the qty_table. */
502 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
504 static struct table_elt *table[HASH_SIZE];
506 /* Chain of `struct table_elt's made so far for this function
507 but currently removed from the table. */
509 static struct table_elt *free_element_chain;
511 /* Set to the cost of a constant pool reference if one was found for a
512 symbolic constant. If this was found, it means we should try to
513 convert constants into constant pool entries if they don't fit in
514 the insn. */
516 static int constant_pool_entries_cost;
517 static int constant_pool_entries_regcost;
519 /* This data describes a block that will be processed by
520 cse_extended_basic_block. */
522 struct cse_basic_block_data
524 /* Total number of SETs in block. */
525 int nsets;
526 /* Size of current branch path, if any. */
527 int path_size;
528 /* Current path, indicating which basic_blocks will be processed. */
529 struct branch_path
531 /* The basic block for this path entry. */
532 basic_block bb;
533 } *path;
537 /* Pointers to the live in/live out bitmaps for the boundaries of the
538 current EBB. */
539 static bitmap cse_ebb_live_in, cse_ebb_live_out;
541 /* A simple bitmap to track which basic blocks have been visited
542 already as part of an already processed extended basic block. */
543 static sbitmap cse_visited_basic_blocks;
545 static bool fixed_base_plus_p (rtx x);
546 static int notreg_cost (rtx, enum rtx_code);
547 static int approx_reg_cost_1 (rtx *, void *);
548 static int approx_reg_cost (rtx);
549 static int preferable (int, int, int, int);
550 static void new_basic_block (void);
551 static void make_new_qty (unsigned int, enum machine_mode);
552 static void make_regs_eqv (unsigned int, unsigned int);
553 static void delete_reg_equiv (unsigned int);
554 static int mention_regs (rtx);
555 static int insert_regs (rtx, struct table_elt *, int);
556 static void remove_from_table (struct table_elt *, unsigned);
557 static void remove_pseudo_from_table (rtx, unsigned);
558 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
559 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
560 static rtx lookup_as_function (rtx, enum rtx_code);
561 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
562 enum machine_mode);
563 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
564 static void invalidate (rtx, enum machine_mode);
565 static bool cse_rtx_varies_p (const_rtx, bool);
566 static void remove_invalid_refs (unsigned int);
567 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
568 enum machine_mode);
569 static void rehash_using_reg (rtx);
570 static void invalidate_memory (void);
571 static void invalidate_for_call (rtx);
572 static rtx use_related_value (rtx, struct table_elt *);
574 static inline unsigned canon_hash (rtx, enum machine_mode);
575 static inline unsigned safe_hash (rtx, enum machine_mode);
576 static unsigned hash_rtx_string (const char *);
578 static rtx canon_reg (rtx, rtx);
579 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
580 enum machine_mode *,
581 enum machine_mode *);
582 static rtx fold_rtx (rtx, rtx);
583 static rtx equiv_constant (rtx);
584 static void record_jump_equiv (rtx, bool);
585 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
586 int);
587 static void cse_insn (rtx, rtx);
588 static void cse_prescan_path (struct cse_basic_block_data *);
589 static void invalidate_from_clobbers (rtx);
590 static rtx cse_process_notes (rtx, rtx, bool *);
591 static void cse_extended_basic_block (struct cse_basic_block_data *);
592 static void count_reg_usage (rtx, int *, rtx, int);
593 static int check_for_label_ref (rtx *, void *);
594 extern void dump_class (struct table_elt*);
595 static void get_cse_reg_info_1 (unsigned int regno);
596 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
597 static int check_dependence (rtx *, void *);
599 static void flush_hash_table (void);
600 static bool insn_live_p (rtx, int *);
601 static bool set_live_p (rtx, rtx, int *);
602 static bool dead_libcall_p (rtx, int *);
603 static int cse_change_cc_mode (rtx *, void *);
604 static void cse_change_cc_mode_insn (rtx, rtx);
605 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
606 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
609 #undef RTL_HOOKS_GEN_LOWPART
610 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
612 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
614 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
615 virtual regs here because the simplify_*_operation routines are called
616 by integrate.c, which is called before virtual register instantiation. */
618 static bool
619 fixed_base_plus_p (rtx x)
621 switch (GET_CODE (x))
623 case REG:
624 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
625 return true;
626 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
627 return true;
628 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
629 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
630 return true;
631 return false;
633 case PLUS:
634 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
635 return false;
636 return fixed_base_plus_p (XEXP (x, 0));
638 default:
639 return false;
643 /* Dump the expressions in the equivalence class indicated by CLASSP.
644 This function is used only for debugging. */
645 void
646 dump_class (struct table_elt *classp)
648 struct table_elt *elt;
650 fprintf (stderr, "Equivalence chain for ");
651 print_rtl (stderr, classp->exp);
652 fprintf (stderr, ": \n");
654 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
656 print_rtl (stderr, elt->exp);
657 fprintf (stderr, "\n");
661 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
663 static int
664 approx_reg_cost_1 (rtx *xp, void *data)
666 rtx x = *xp;
667 int *cost_p = data;
669 if (x && REG_P (x))
671 unsigned int regno = REGNO (x);
673 if (! CHEAP_REGNO (regno))
675 if (regno < FIRST_PSEUDO_REGISTER)
677 if (SMALL_REGISTER_CLASSES)
678 return 1;
679 *cost_p += 2;
681 else
682 *cost_p += 1;
686 return 0;
689 /* Return an estimate of the cost of the registers used in an rtx.
690 This is mostly the number of different REG expressions in the rtx;
691 however for some exceptions like fixed registers we use a cost of
692 0. If any other hard register reference occurs, return MAX_COST. */
694 static int
695 approx_reg_cost (rtx x)
697 int cost = 0;
699 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
700 return MAX_COST;
702 return cost;
705 /* Return a negative value if an rtx A, whose costs are given by COST_A
706 and REGCOST_A, is more desirable than an rtx B.
707 Return a positive value if A is less desirable, or 0 if the two are
708 equally good. */
709 static int
710 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
712 /* First, get rid of cases involving expressions that are entirely
713 unwanted. */
714 if (cost_a != cost_b)
716 if (cost_a == MAX_COST)
717 return 1;
718 if (cost_b == MAX_COST)
719 return -1;
722 /* Avoid extending lifetimes of hardregs. */
723 if (regcost_a != regcost_b)
725 if (regcost_a == MAX_COST)
726 return 1;
727 if (regcost_b == MAX_COST)
728 return -1;
731 /* Normal operation costs take precedence. */
732 if (cost_a != cost_b)
733 return cost_a - cost_b;
734 /* Only if these are identical consider effects on register pressure. */
735 if (regcost_a != regcost_b)
736 return regcost_a - regcost_b;
737 return 0;
740 /* Internal function, to compute cost when X is not a register; called
741 from COST macro to keep it simple. */
743 static int
744 notreg_cost (rtx x, enum rtx_code outer)
746 return ((GET_CODE (x) == SUBREG
747 && REG_P (SUBREG_REG (x))
748 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
749 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
750 && (GET_MODE_SIZE (GET_MODE (x))
751 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
752 && subreg_lowpart_p (x)
753 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
754 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
756 : rtx_cost (x, outer) * 2);
760 /* Initialize CSE_REG_INFO_TABLE. */
762 static void
763 init_cse_reg_info (unsigned int nregs)
765 /* Do we need to grow the table? */
766 if (nregs > cse_reg_info_table_size)
768 unsigned int new_size;
770 if (cse_reg_info_table_size < 2048)
772 /* Compute a new size that is a power of 2 and no smaller
773 than the large of NREGS and 64. */
774 new_size = (cse_reg_info_table_size
775 ? cse_reg_info_table_size : 64);
777 while (new_size < nregs)
778 new_size *= 2;
780 else
782 /* If we need a big table, allocate just enough to hold
783 NREGS registers. */
784 new_size = nregs;
787 /* Reallocate the table with NEW_SIZE entries. */
788 if (cse_reg_info_table)
789 free (cse_reg_info_table);
790 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
791 cse_reg_info_table_size = new_size;
792 cse_reg_info_table_first_uninitialized = 0;
795 /* Do we have all of the first NREGS entries initialized? */
796 if (cse_reg_info_table_first_uninitialized < nregs)
798 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
799 unsigned int i;
801 /* Put the old timestamp on newly allocated entries so that they
802 will all be considered out of date. We do not touch those
803 entries beyond the first NREGS entries to be nice to the
804 virtual memory. */
805 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
806 cse_reg_info_table[i].timestamp = old_timestamp;
808 cse_reg_info_table_first_uninitialized = nregs;
812 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
814 static void
815 get_cse_reg_info_1 (unsigned int regno)
817 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
818 entry will be considered to have been initialized. */
819 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
821 /* Initialize the rest of the entry. */
822 cse_reg_info_table[regno].reg_tick = 1;
823 cse_reg_info_table[regno].reg_in_table = -1;
824 cse_reg_info_table[regno].subreg_ticked = -1;
825 cse_reg_info_table[regno].reg_qty = -regno - 1;
828 /* Find a cse_reg_info entry for REGNO. */
830 static inline struct cse_reg_info *
831 get_cse_reg_info (unsigned int regno)
833 struct cse_reg_info *p = &cse_reg_info_table[regno];
835 /* If this entry has not been initialized, go ahead and initialize
836 it. */
837 if (p->timestamp != cse_reg_info_timestamp)
838 get_cse_reg_info_1 (regno);
840 return p;
843 /* Clear the hash table and initialize each register with its own quantity,
844 for a new basic block. */
846 static void
847 new_basic_block (void)
849 int i;
851 next_qty = 0;
853 /* Invalidate cse_reg_info_table. */
854 cse_reg_info_timestamp++;
856 /* Clear out hash table state for this pass. */
857 CLEAR_HARD_REG_SET (hard_regs_in_table);
859 /* The per-quantity values used to be initialized here, but it is
860 much faster to initialize each as it is made in `make_new_qty'. */
862 for (i = 0; i < HASH_SIZE; i++)
864 struct table_elt *first;
866 first = table[i];
867 if (first != NULL)
869 struct table_elt *last = first;
871 table[i] = NULL;
873 while (last->next_same_hash != NULL)
874 last = last->next_same_hash;
876 /* Now relink this hash entire chain into
877 the free element list. */
879 last->next_same_hash = free_element_chain;
880 free_element_chain = first;
884 #ifdef HAVE_cc0
885 prev_insn_cc0 = 0;
886 #endif
889 /* Say that register REG contains a quantity in mode MODE not in any
890 register before and initialize that quantity. */
892 static void
893 make_new_qty (unsigned int reg, enum machine_mode mode)
895 int q;
896 struct qty_table_elem *ent;
897 struct reg_eqv_elem *eqv;
899 gcc_assert (next_qty < max_qty);
901 q = REG_QTY (reg) = next_qty++;
902 ent = &qty_table[q];
903 ent->first_reg = reg;
904 ent->last_reg = reg;
905 ent->mode = mode;
906 ent->const_rtx = ent->const_insn = NULL_RTX;
907 ent->comparison_code = UNKNOWN;
909 eqv = &reg_eqv_table[reg];
910 eqv->next = eqv->prev = -1;
913 /* Make reg NEW equivalent to reg OLD.
914 OLD is not changing; NEW is. */
916 static void
917 make_regs_eqv (unsigned int new, unsigned int old)
919 unsigned int lastr, firstr;
920 int q = REG_QTY (old);
921 struct qty_table_elem *ent;
923 ent = &qty_table[q];
925 /* Nothing should become eqv until it has a "non-invalid" qty number. */
926 gcc_assert (REGNO_QTY_VALID_P (old));
928 REG_QTY (new) = q;
929 firstr = ent->first_reg;
930 lastr = ent->last_reg;
932 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
933 hard regs. Among pseudos, if NEW will live longer than any other reg
934 of the same qty, and that is beyond the current basic block,
935 make it the new canonical replacement for this qty. */
936 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
937 /* Certain fixed registers might be of the class NO_REGS. This means
938 that not only can they not be allocated by the compiler, but
939 they cannot be used in substitutions or canonicalizations
940 either. */
941 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
942 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
943 || (new >= FIRST_PSEUDO_REGISTER
944 && (firstr < FIRST_PSEUDO_REGISTER
945 || (bitmap_bit_p (cse_ebb_live_out, new)
946 && !bitmap_bit_p (cse_ebb_live_out, firstr))
947 || (bitmap_bit_p (cse_ebb_live_in, new)
948 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
950 reg_eqv_table[firstr].prev = new;
951 reg_eqv_table[new].next = firstr;
952 reg_eqv_table[new].prev = -1;
953 ent->first_reg = new;
955 else
957 /* If NEW is a hard reg (known to be non-fixed), insert at end.
958 Otherwise, insert before any non-fixed hard regs that are at the
959 end. Registers of class NO_REGS cannot be used as an
960 equivalent for anything. */
961 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
962 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
963 && new >= FIRST_PSEUDO_REGISTER)
964 lastr = reg_eqv_table[lastr].prev;
965 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
966 if (reg_eqv_table[lastr].next >= 0)
967 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
968 else
969 qty_table[q].last_reg = new;
970 reg_eqv_table[lastr].next = new;
971 reg_eqv_table[new].prev = lastr;
975 /* Remove REG from its equivalence class. */
977 static void
978 delete_reg_equiv (unsigned int reg)
980 struct qty_table_elem *ent;
981 int q = REG_QTY (reg);
982 int p, n;
984 /* If invalid, do nothing. */
985 if (! REGNO_QTY_VALID_P (reg))
986 return;
988 ent = &qty_table[q];
990 p = reg_eqv_table[reg].prev;
991 n = reg_eqv_table[reg].next;
993 if (n != -1)
994 reg_eqv_table[n].prev = p;
995 else
996 ent->last_reg = p;
997 if (p != -1)
998 reg_eqv_table[p].next = n;
999 else
1000 ent->first_reg = n;
1002 REG_QTY (reg) = -reg - 1;
1005 /* Remove any invalid expressions from the hash table
1006 that refer to any of the registers contained in expression X.
1008 Make sure that newly inserted references to those registers
1009 as subexpressions will be considered valid.
1011 mention_regs is not called when a register itself
1012 is being stored in the table.
1014 Return 1 if we have done something that may have changed the hash code
1015 of X. */
1017 static int
1018 mention_regs (rtx x)
1020 enum rtx_code code;
1021 int i, j;
1022 const char *fmt;
1023 int changed = 0;
1025 if (x == 0)
1026 return 0;
1028 code = GET_CODE (x);
1029 if (code == REG)
1031 unsigned int regno = REGNO (x);
1032 unsigned int endregno = END_REGNO (x);
1033 unsigned int i;
1035 for (i = regno; i < endregno; i++)
1037 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1038 remove_invalid_refs (i);
1040 REG_IN_TABLE (i) = REG_TICK (i);
1041 SUBREG_TICKED (i) = -1;
1044 return 0;
1047 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1048 pseudo if they don't use overlapping words. We handle only pseudos
1049 here for simplicity. */
1050 if (code == SUBREG && REG_P (SUBREG_REG (x))
1051 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1053 unsigned int i = REGNO (SUBREG_REG (x));
1055 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1057 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1058 the last store to this register really stored into this
1059 subreg, then remove the memory of this subreg.
1060 Otherwise, remove any memory of the entire register and
1061 all its subregs from the table. */
1062 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1063 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1064 remove_invalid_refs (i);
1065 else
1066 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1069 REG_IN_TABLE (i) = REG_TICK (i);
1070 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1071 return 0;
1074 /* If X is a comparison or a COMPARE and either operand is a register
1075 that does not have a quantity, give it one. This is so that a later
1076 call to record_jump_equiv won't cause X to be assigned a different
1077 hash code and not found in the table after that call.
1079 It is not necessary to do this here, since rehash_using_reg can
1080 fix up the table later, but doing this here eliminates the need to
1081 call that expensive function in the most common case where the only
1082 use of the register is in the comparison. */
1084 if (code == COMPARE || COMPARISON_P (x))
1086 if (REG_P (XEXP (x, 0))
1087 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1088 if (insert_regs (XEXP (x, 0), NULL, 0))
1090 rehash_using_reg (XEXP (x, 0));
1091 changed = 1;
1094 if (REG_P (XEXP (x, 1))
1095 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1096 if (insert_regs (XEXP (x, 1), NULL, 0))
1098 rehash_using_reg (XEXP (x, 1));
1099 changed = 1;
1103 fmt = GET_RTX_FORMAT (code);
1104 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1105 if (fmt[i] == 'e')
1106 changed |= mention_regs (XEXP (x, i));
1107 else if (fmt[i] == 'E')
1108 for (j = 0; j < XVECLEN (x, i); j++)
1109 changed |= mention_regs (XVECEXP (x, i, j));
1111 return changed;
1114 /* Update the register quantities for inserting X into the hash table
1115 with a value equivalent to CLASSP.
1116 (If the class does not contain a REG, it is irrelevant.)
1117 If MODIFIED is nonzero, X is a destination; it is being modified.
1118 Note that delete_reg_equiv should be called on a register
1119 before insert_regs is done on that register with MODIFIED != 0.
1121 Nonzero value means that elements of reg_qty have changed
1122 so X's hash code may be different. */
1124 static int
1125 insert_regs (rtx x, struct table_elt *classp, int modified)
1127 if (REG_P (x))
1129 unsigned int regno = REGNO (x);
1130 int qty_valid;
1132 /* If REGNO is in the equivalence table already but is of the
1133 wrong mode for that equivalence, don't do anything here. */
1135 qty_valid = REGNO_QTY_VALID_P (regno);
1136 if (qty_valid)
1138 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1140 if (ent->mode != GET_MODE (x))
1141 return 0;
1144 if (modified || ! qty_valid)
1146 if (classp)
1147 for (classp = classp->first_same_value;
1148 classp != 0;
1149 classp = classp->next_same_value)
1150 if (REG_P (classp->exp)
1151 && GET_MODE (classp->exp) == GET_MODE (x))
1153 unsigned c_regno = REGNO (classp->exp);
1155 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1157 /* Suppose that 5 is hard reg and 100 and 101 are
1158 pseudos. Consider
1160 (set (reg:si 100) (reg:si 5))
1161 (set (reg:si 5) (reg:si 100))
1162 (set (reg:di 101) (reg:di 5))
1164 We would now set REG_QTY (101) = REG_QTY (5), but the
1165 entry for 5 is in SImode. When we use this later in
1166 copy propagation, we get the register in wrong mode. */
1167 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1168 continue;
1170 make_regs_eqv (regno, c_regno);
1171 return 1;
1174 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1175 than REG_IN_TABLE to find out if there was only a single preceding
1176 invalidation - for the SUBREG - or another one, which would be
1177 for the full register. However, if we find here that REG_TICK
1178 indicates that the register is invalid, it means that it has
1179 been invalidated in a separate operation. The SUBREG might be used
1180 now (then this is a recursive call), or we might use the full REG
1181 now and a SUBREG of it later. So bump up REG_TICK so that
1182 mention_regs will do the right thing. */
1183 if (! modified
1184 && REG_IN_TABLE (regno) >= 0
1185 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1186 REG_TICK (regno)++;
1187 make_new_qty (regno, GET_MODE (x));
1188 return 1;
1191 return 0;
1194 /* If X is a SUBREG, we will likely be inserting the inner register in the
1195 table. If that register doesn't have an assigned quantity number at
1196 this point but does later, the insertion that we will be doing now will
1197 not be accessible because its hash code will have changed. So assign
1198 a quantity number now. */
1200 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1201 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1203 insert_regs (SUBREG_REG (x), NULL, 0);
1204 mention_regs (x);
1205 return 1;
1207 else
1208 return mention_regs (x);
1211 /* Look in or update the hash table. */
1213 /* Remove table element ELT from use in the table.
1214 HASH is its hash code, made using the HASH macro.
1215 It's an argument because often that is known in advance
1216 and we save much time not recomputing it. */
1218 static void
1219 remove_from_table (struct table_elt *elt, unsigned int hash)
1221 if (elt == 0)
1222 return;
1224 /* Mark this element as removed. See cse_insn. */
1225 elt->first_same_value = 0;
1227 /* Remove the table element from its equivalence class. */
1230 struct table_elt *prev = elt->prev_same_value;
1231 struct table_elt *next = elt->next_same_value;
1233 if (next)
1234 next->prev_same_value = prev;
1236 if (prev)
1237 prev->next_same_value = next;
1238 else
1240 struct table_elt *newfirst = next;
1241 while (next)
1243 next->first_same_value = newfirst;
1244 next = next->next_same_value;
1249 /* Remove the table element from its hash bucket. */
1252 struct table_elt *prev = elt->prev_same_hash;
1253 struct table_elt *next = elt->next_same_hash;
1255 if (next)
1256 next->prev_same_hash = prev;
1258 if (prev)
1259 prev->next_same_hash = next;
1260 else if (table[hash] == elt)
1261 table[hash] = next;
1262 else
1264 /* This entry is not in the proper hash bucket. This can happen
1265 when two classes were merged by `merge_equiv_classes'. Search
1266 for the hash bucket that it heads. This happens only very
1267 rarely, so the cost is acceptable. */
1268 for (hash = 0; hash < HASH_SIZE; hash++)
1269 if (table[hash] == elt)
1270 table[hash] = next;
1274 /* Remove the table element from its related-value circular chain. */
1276 if (elt->related_value != 0 && elt->related_value != elt)
1278 struct table_elt *p = elt->related_value;
1280 while (p->related_value != elt)
1281 p = p->related_value;
1282 p->related_value = elt->related_value;
1283 if (p->related_value == p)
1284 p->related_value = 0;
1287 /* Now add it to the free element chain. */
1288 elt->next_same_hash = free_element_chain;
1289 free_element_chain = elt;
1292 /* Same as above, but X is a pseudo-register. */
1294 static void
1295 remove_pseudo_from_table (rtx x, unsigned int hash)
1297 struct table_elt *elt;
1299 /* Because a pseudo-register can be referenced in more than one
1300 mode, we might have to remove more than one table entry. */
1301 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1302 remove_from_table (elt, hash);
1305 /* Look up X in the hash table and return its table element,
1306 or 0 if X is not in the table.
1308 MODE is the machine-mode of X, or if X is an integer constant
1309 with VOIDmode then MODE is the mode with which X will be used.
1311 Here we are satisfied to find an expression whose tree structure
1312 looks like X. */
1314 static struct table_elt *
1315 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1317 struct table_elt *p;
1319 for (p = table[hash]; p; p = p->next_same_hash)
1320 if (mode == p->mode && ((x == p->exp && REG_P (x))
1321 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1322 return p;
1324 return 0;
1327 /* Like `lookup' but don't care whether the table element uses invalid regs.
1328 Also ignore discrepancies in the machine mode of a register. */
1330 static struct table_elt *
1331 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1333 struct table_elt *p;
1335 if (REG_P (x))
1337 unsigned int regno = REGNO (x);
1339 /* Don't check the machine mode when comparing registers;
1340 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1341 for (p = table[hash]; p; p = p->next_same_hash)
1342 if (REG_P (p->exp)
1343 && REGNO (p->exp) == regno)
1344 return p;
1346 else
1348 for (p = table[hash]; p; p = p->next_same_hash)
1349 if (mode == p->mode
1350 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1351 return p;
1354 return 0;
1357 /* Look for an expression equivalent to X and with code CODE.
1358 If one is found, return that expression. */
1360 static rtx
1361 lookup_as_function (rtx x, enum rtx_code code)
1363 struct table_elt *p
1364 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1366 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1367 long as we are narrowing. So if we looked in vain for a mode narrower
1368 than word_mode before, look for word_mode now. */
1369 if (p == 0 && code == CONST_INT
1370 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1372 x = copy_rtx (x);
1373 PUT_MODE (x, word_mode);
1374 p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode);
1377 if (p == 0)
1378 return 0;
1380 for (p = p->first_same_value; p; p = p->next_same_value)
1381 if (GET_CODE (p->exp) == code
1382 /* Make sure this is a valid entry in the table. */
1383 && exp_equiv_p (p->exp, p->exp, 1, false))
1384 return p->exp;
1386 return 0;
1389 /* Insert X in the hash table, assuming HASH is its hash code
1390 and CLASSP is an element of the class it should go in
1391 (or 0 if a new class should be made).
1392 It is inserted at the proper position to keep the class in
1393 the order cheapest first.
1395 MODE is the machine-mode of X, or if X is an integer constant
1396 with VOIDmode then MODE is the mode with which X will be used.
1398 For elements of equal cheapness, the most recent one
1399 goes in front, except that the first element in the list
1400 remains first unless a cheaper element is added. The order of
1401 pseudo-registers does not matter, as canon_reg will be called to
1402 find the cheapest when a register is retrieved from the table.
1404 The in_memory field in the hash table element is set to 0.
1405 The caller must set it nonzero if appropriate.
1407 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1408 and if insert_regs returns a nonzero value
1409 you must then recompute its hash code before calling here.
1411 If necessary, update table showing constant values of quantities. */
1413 #define CHEAPER(X, Y) \
1414 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1416 static struct table_elt *
1417 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1419 struct table_elt *elt;
1421 /* If X is a register and we haven't made a quantity for it,
1422 something is wrong. */
1423 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1425 /* If X is a hard register, show it is being put in the table. */
1426 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1427 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1429 /* Put an element for X into the right hash bucket. */
1431 elt = free_element_chain;
1432 if (elt)
1433 free_element_chain = elt->next_same_hash;
1434 else
1435 elt = XNEW (struct table_elt);
1437 elt->exp = x;
1438 elt->canon_exp = NULL_RTX;
1439 elt->cost = COST (x);
1440 elt->regcost = approx_reg_cost (x);
1441 elt->next_same_value = 0;
1442 elt->prev_same_value = 0;
1443 elt->next_same_hash = table[hash];
1444 elt->prev_same_hash = 0;
1445 elt->related_value = 0;
1446 elt->in_memory = 0;
1447 elt->mode = mode;
1448 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1450 if (table[hash])
1451 table[hash]->prev_same_hash = elt;
1452 table[hash] = elt;
1454 /* Put it into the proper value-class. */
1455 if (classp)
1457 classp = classp->first_same_value;
1458 if (CHEAPER (elt, classp))
1459 /* Insert at the head of the class. */
1461 struct table_elt *p;
1462 elt->next_same_value = classp;
1463 classp->prev_same_value = elt;
1464 elt->first_same_value = elt;
1466 for (p = classp; p; p = p->next_same_value)
1467 p->first_same_value = elt;
1469 else
1471 /* Insert not at head of the class. */
1472 /* Put it after the last element cheaper than X. */
1473 struct table_elt *p, *next;
1475 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1476 p = next);
1478 /* Put it after P and before NEXT. */
1479 elt->next_same_value = next;
1480 if (next)
1481 next->prev_same_value = elt;
1483 elt->prev_same_value = p;
1484 p->next_same_value = elt;
1485 elt->first_same_value = classp;
1488 else
1489 elt->first_same_value = elt;
1491 /* If this is a constant being set equivalent to a register or a register
1492 being set equivalent to a constant, note the constant equivalence.
1494 If this is a constant, it cannot be equivalent to a different constant,
1495 and a constant is the only thing that can be cheaper than a register. So
1496 we know the register is the head of the class (before the constant was
1497 inserted).
1499 If this is a register that is not already known equivalent to a
1500 constant, we must check the entire class.
1502 If this is a register that is already known equivalent to an insn,
1503 update the qtys `const_insn' to show that `this_insn' is the latest
1504 insn making that quantity equivalent to the constant. */
1506 if (elt->is_const && classp && REG_P (classp->exp)
1507 && !REG_P (x))
1509 int exp_q = REG_QTY (REGNO (classp->exp));
1510 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1512 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1513 exp_ent->const_insn = this_insn;
1516 else if (REG_P (x)
1517 && classp
1518 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1519 && ! elt->is_const)
1521 struct table_elt *p;
1523 for (p = classp; p != 0; p = p->next_same_value)
1525 if (p->is_const && !REG_P (p->exp))
1527 int x_q = REG_QTY (REGNO (x));
1528 struct qty_table_elem *x_ent = &qty_table[x_q];
1530 x_ent->const_rtx
1531 = gen_lowpart (GET_MODE (x), p->exp);
1532 x_ent->const_insn = this_insn;
1533 break;
1538 else if (REG_P (x)
1539 && qty_table[REG_QTY (REGNO (x))].const_rtx
1540 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1541 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1543 /* If this is a constant with symbolic value,
1544 and it has a term with an explicit integer value,
1545 link it up with related expressions. */
1546 if (GET_CODE (x) == CONST)
1548 rtx subexp = get_related_value (x);
1549 unsigned subhash;
1550 struct table_elt *subelt, *subelt_prev;
1552 if (subexp != 0)
1554 /* Get the integer-free subexpression in the hash table. */
1555 subhash = SAFE_HASH (subexp, mode);
1556 subelt = lookup (subexp, subhash, mode);
1557 if (subelt == 0)
1558 subelt = insert (subexp, NULL, subhash, mode);
1559 /* Initialize SUBELT's circular chain if it has none. */
1560 if (subelt->related_value == 0)
1561 subelt->related_value = subelt;
1562 /* Find the element in the circular chain that precedes SUBELT. */
1563 subelt_prev = subelt;
1564 while (subelt_prev->related_value != subelt)
1565 subelt_prev = subelt_prev->related_value;
1566 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1567 This way the element that follows SUBELT is the oldest one. */
1568 elt->related_value = subelt_prev->related_value;
1569 subelt_prev->related_value = elt;
1573 return elt;
1576 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1577 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1578 the two classes equivalent.
1580 CLASS1 will be the surviving class; CLASS2 should not be used after this
1581 call.
1583 Any invalid entries in CLASS2 will not be copied. */
1585 static void
1586 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1588 struct table_elt *elt, *next, *new;
1590 /* Ensure we start with the head of the classes. */
1591 class1 = class1->first_same_value;
1592 class2 = class2->first_same_value;
1594 /* If they were already equal, forget it. */
1595 if (class1 == class2)
1596 return;
1598 for (elt = class2; elt; elt = next)
1600 unsigned int hash;
1601 rtx exp = elt->exp;
1602 enum machine_mode mode = elt->mode;
1604 next = elt->next_same_value;
1606 /* Remove old entry, make a new one in CLASS1's class.
1607 Don't do this for invalid entries as we cannot find their
1608 hash code (it also isn't necessary). */
1609 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1611 bool need_rehash = false;
1613 hash_arg_in_memory = 0;
1614 hash = HASH (exp, mode);
1616 if (REG_P (exp))
1618 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1619 delete_reg_equiv (REGNO (exp));
1622 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1623 remove_pseudo_from_table (exp, hash);
1624 else
1625 remove_from_table (elt, hash);
1627 if (insert_regs (exp, class1, 0) || need_rehash)
1629 rehash_using_reg (exp);
1630 hash = HASH (exp, mode);
1632 new = insert (exp, class1, hash, mode);
1633 new->in_memory = hash_arg_in_memory;
1638 /* Flush the entire hash table. */
1640 static void
1641 flush_hash_table (void)
1643 int i;
1644 struct table_elt *p;
1646 for (i = 0; i < HASH_SIZE; i++)
1647 for (p = table[i]; p; p = table[i])
1649 /* Note that invalidate can remove elements
1650 after P in the current hash chain. */
1651 if (REG_P (p->exp))
1652 invalidate (p->exp, VOIDmode);
1653 else
1654 remove_from_table (p, i);
1658 /* Function called for each rtx to check whether true dependence exist. */
1659 struct check_dependence_data
1661 enum machine_mode mode;
1662 rtx exp;
1663 rtx addr;
1666 static int
1667 check_dependence (rtx *x, void *data)
1669 struct check_dependence_data *d = (struct check_dependence_data *) data;
1670 if (*x && MEM_P (*x))
1671 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1672 cse_rtx_varies_p);
1673 else
1674 return 0;
1677 /* Remove from the hash table, or mark as invalid, all expressions whose
1678 values could be altered by storing in X. X is a register, a subreg, or
1679 a memory reference with nonvarying address (because, when a memory
1680 reference with a varying address is stored in, all memory references are
1681 removed by invalidate_memory so specific invalidation is superfluous).
1682 FULL_MODE, if not VOIDmode, indicates that this much should be
1683 invalidated instead of just the amount indicated by the mode of X. This
1684 is only used for bitfield stores into memory.
1686 A nonvarying address may be just a register or just a symbol reference,
1687 or it may be either of those plus a numeric offset. */
1689 static void
1690 invalidate (rtx x, enum machine_mode full_mode)
1692 int i;
1693 struct table_elt *p;
1694 rtx addr;
1696 switch (GET_CODE (x))
1698 case REG:
1700 /* If X is a register, dependencies on its contents are recorded
1701 through the qty number mechanism. Just change the qty number of
1702 the register, mark it as invalid for expressions that refer to it,
1703 and remove it itself. */
1704 unsigned int regno = REGNO (x);
1705 unsigned int hash = HASH (x, GET_MODE (x));
1707 /* Remove REGNO from any quantity list it might be on and indicate
1708 that its value might have changed. If it is a pseudo, remove its
1709 entry from the hash table.
1711 For a hard register, we do the first two actions above for any
1712 additional hard registers corresponding to X. Then, if any of these
1713 registers are in the table, we must remove any REG entries that
1714 overlap these registers. */
1716 delete_reg_equiv (regno);
1717 REG_TICK (regno)++;
1718 SUBREG_TICKED (regno) = -1;
1720 if (regno >= FIRST_PSEUDO_REGISTER)
1721 remove_pseudo_from_table (x, hash);
1722 else
1724 HOST_WIDE_INT in_table
1725 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1726 unsigned int endregno = END_HARD_REGNO (x);
1727 unsigned int tregno, tendregno, rn;
1728 struct table_elt *p, *next;
1730 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1732 for (rn = regno + 1; rn < endregno; rn++)
1734 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1735 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1736 delete_reg_equiv (rn);
1737 REG_TICK (rn)++;
1738 SUBREG_TICKED (rn) = -1;
1741 if (in_table)
1742 for (hash = 0; hash < HASH_SIZE; hash++)
1743 for (p = table[hash]; p; p = next)
1745 next = p->next_same_hash;
1747 if (!REG_P (p->exp)
1748 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1749 continue;
1751 tregno = REGNO (p->exp);
1752 tendregno = END_HARD_REGNO (p->exp);
1753 if (tendregno > regno && tregno < endregno)
1754 remove_from_table (p, hash);
1758 return;
1760 case SUBREG:
1761 invalidate (SUBREG_REG (x), VOIDmode);
1762 return;
1764 case PARALLEL:
1765 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1766 invalidate (XVECEXP (x, 0, i), VOIDmode);
1767 return;
1769 case EXPR_LIST:
1770 /* This is part of a disjoint return value; extract the location in
1771 question ignoring the offset. */
1772 invalidate (XEXP (x, 0), VOIDmode);
1773 return;
1775 case MEM:
1776 addr = canon_rtx (get_addr (XEXP (x, 0)));
1777 /* Calculate the canonical version of X here so that
1778 true_dependence doesn't generate new RTL for X on each call. */
1779 x = canon_rtx (x);
1781 /* Remove all hash table elements that refer to overlapping pieces of
1782 memory. */
1783 if (full_mode == VOIDmode)
1784 full_mode = GET_MODE (x);
1786 for (i = 0; i < HASH_SIZE; i++)
1788 struct table_elt *next;
1790 for (p = table[i]; p; p = next)
1792 next = p->next_same_hash;
1793 if (p->in_memory)
1795 struct check_dependence_data d;
1797 /* Just canonicalize the expression once;
1798 otherwise each time we call invalidate
1799 true_dependence will canonicalize the
1800 expression again. */
1801 if (!p->canon_exp)
1802 p->canon_exp = canon_rtx (p->exp);
1803 d.exp = x;
1804 d.addr = addr;
1805 d.mode = full_mode;
1806 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1807 remove_from_table (p, i);
1811 return;
1813 default:
1814 gcc_unreachable ();
1818 /* Remove all expressions that refer to register REGNO,
1819 since they are already invalid, and we are about to
1820 mark that register valid again and don't want the old
1821 expressions to reappear as valid. */
1823 static void
1824 remove_invalid_refs (unsigned int regno)
1826 unsigned int i;
1827 struct table_elt *p, *next;
1829 for (i = 0; i < HASH_SIZE; i++)
1830 for (p = table[i]; p; p = next)
1832 next = p->next_same_hash;
1833 if (!REG_P (p->exp)
1834 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1835 remove_from_table (p, i);
1839 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1840 and mode MODE. */
1841 static void
1842 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1843 enum machine_mode mode)
1845 unsigned int i;
1846 struct table_elt *p, *next;
1847 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1849 for (i = 0; i < HASH_SIZE; i++)
1850 for (p = table[i]; p; p = next)
1852 rtx exp = p->exp;
1853 next = p->next_same_hash;
1855 if (!REG_P (exp)
1856 && (GET_CODE (exp) != SUBREG
1857 || !REG_P (SUBREG_REG (exp))
1858 || REGNO (SUBREG_REG (exp)) != regno
1859 || (((SUBREG_BYTE (exp)
1860 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1861 && SUBREG_BYTE (exp) <= end))
1862 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1863 remove_from_table (p, i);
1867 /* Recompute the hash codes of any valid entries in the hash table that
1868 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1870 This is called when we make a jump equivalence. */
1872 static void
1873 rehash_using_reg (rtx x)
1875 unsigned int i;
1876 struct table_elt *p, *next;
1877 unsigned hash;
1879 if (GET_CODE (x) == SUBREG)
1880 x = SUBREG_REG (x);
1882 /* If X is not a register or if the register is known not to be in any
1883 valid entries in the table, we have no work to do. */
1885 if (!REG_P (x)
1886 || REG_IN_TABLE (REGNO (x)) < 0
1887 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1888 return;
1890 /* Scan all hash chains looking for valid entries that mention X.
1891 If we find one and it is in the wrong hash chain, move it. */
1893 for (i = 0; i < HASH_SIZE; i++)
1894 for (p = table[i]; p; p = next)
1896 next = p->next_same_hash;
1897 if (reg_mentioned_p (x, p->exp)
1898 && exp_equiv_p (p->exp, p->exp, 1, false)
1899 && i != (hash = SAFE_HASH (p->exp, p->mode)))
1901 if (p->next_same_hash)
1902 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1904 if (p->prev_same_hash)
1905 p->prev_same_hash->next_same_hash = p->next_same_hash;
1906 else
1907 table[i] = p->next_same_hash;
1909 p->next_same_hash = table[hash];
1910 p->prev_same_hash = 0;
1911 if (table[hash])
1912 table[hash]->prev_same_hash = p;
1913 table[hash] = p;
1918 /* Remove from the hash table any expression that is a call-clobbered
1919 register. Also update their TICK values. */
1921 static void
1922 invalidate_for_call (rtx call_insn)
1924 unsigned int regno, endregno;
1925 unsigned int i;
1926 unsigned hash;
1927 struct table_elt *p, *next;
1928 int in_table = 0;
1929 HARD_REG_SET clobbered_regs;
1931 /* Go through all the hard registers. For each that is clobbered in
1932 a CALL_INSN, remove the register from quantity chains and update
1933 reg_tick if defined. Also see if any of these registers is currently
1934 in the table. */
1936 get_call_invalidated_used_regs (call_insn, &clobbered_regs, true);
1937 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1938 if (TEST_HARD_REG_BIT (clobbered_regs, regno))
1940 delete_reg_equiv (regno);
1941 if (REG_TICK (regno) >= 0)
1943 REG_TICK (regno)++;
1944 SUBREG_TICKED (regno) = -1;
1947 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1950 /* In the case where we have no call-clobbered hard registers in the
1951 table, we are done. Otherwise, scan the table and remove any
1952 entry that overlaps a call-clobbered register. */
1954 if (in_table)
1955 for (hash = 0; hash < HASH_SIZE; hash++)
1956 for (p = table[hash]; p; p = next)
1958 next = p->next_same_hash;
1960 if (!REG_P (p->exp)
1961 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1962 continue;
1964 regno = REGNO (p->exp);
1965 endregno = END_HARD_REGNO (p->exp);
1967 for (i = regno; i < endregno; i++)
1968 if (TEST_HARD_REG_BIT (clobbered_regs, i))
1970 remove_from_table (p, hash);
1971 break;
1976 /* Given an expression X of type CONST,
1977 and ELT which is its table entry (or 0 if it
1978 is not in the hash table),
1979 return an alternate expression for X as a register plus integer.
1980 If none can be found, return 0. */
1982 static rtx
1983 use_related_value (rtx x, struct table_elt *elt)
1985 struct table_elt *relt = 0;
1986 struct table_elt *p, *q;
1987 HOST_WIDE_INT offset;
1989 /* First, is there anything related known?
1990 If we have a table element, we can tell from that.
1991 Otherwise, must look it up. */
1993 if (elt != 0 && elt->related_value != 0)
1994 relt = elt;
1995 else if (elt == 0 && GET_CODE (x) == CONST)
1997 rtx subexp = get_related_value (x);
1998 if (subexp != 0)
1999 relt = lookup (subexp,
2000 SAFE_HASH (subexp, GET_MODE (subexp)),
2001 GET_MODE (subexp));
2004 if (relt == 0)
2005 return 0;
2007 /* Search all related table entries for one that has an
2008 equivalent register. */
2010 p = relt;
2011 while (1)
2013 /* This loop is strange in that it is executed in two different cases.
2014 The first is when X is already in the table. Then it is searching
2015 the RELATED_VALUE list of X's class (RELT). The second case is when
2016 X is not in the table. Then RELT points to a class for the related
2017 value.
2019 Ensure that, whatever case we are in, that we ignore classes that have
2020 the same value as X. */
2022 if (rtx_equal_p (x, p->exp))
2023 q = 0;
2024 else
2025 for (q = p->first_same_value; q; q = q->next_same_value)
2026 if (REG_P (q->exp))
2027 break;
2029 if (q)
2030 break;
2032 p = p->related_value;
2034 /* We went all the way around, so there is nothing to be found.
2035 Alternatively, perhaps RELT was in the table for some other reason
2036 and it has no related values recorded. */
2037 if (p == relt || p == 0)
2038 break;
2041 if (q == 0)
2042 return 0;
2044 offset = (get_integer_term (x) - get_integer_term (p->exp));
2045 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2046 return plus_constant (q->exp, offset);
2049 /* Hash a string. Just add its bytes up. */
2050 static inline unsigned
2051 hash_rtx_string (const char *ps)
2053 unsigned hash = 0;
2054 const unsigned char *p = (const unsigned char *) ps;
2056 if (p)
2057 while (*p)
2058 hash += *p++;
2060 return hash;
2063 /* Hash an rtx. We are careful to make sure the value is never negative.
2064 Equivalent registers hash identically.
2065 MODE is used in hashing for CONST_INTs only;
2066 otherwise the mode of X is used.
2068 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2070 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2071 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2073 Note that cse_insn knows that the hash code of a MEM expression
2074 is just (int) MEM plus the hash code of the address. */
2076 unsigned
2077 hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p,
2078 int *hash_arg_in_memory_p, bool have_reg_qty)
2080 int i, j;
2081 unsigned hash = 0;
2082 enum rtx_code code;
2083 const char *fmt;
2085 /* Used to turn recursion into iteration. We can't rely on GCC's
2086 tail-recursion elimination since we need to keep accumulating values
2087 in HASH. */
2088 repeat:
2089 if (x == 0)
2090 return hash;
2092 code = GET_CODE (x);
2093 switch (code)
2095 case REG:
2097 unsigned int regno = REGNO (x);
2099 if (!reload_completed)
2101 /* On some machines, we can't record any non-fixed hard register,
2102 because extending its life will cause reload problems. We
2103 consider ap, fp, sp, gp to be fixed for this purpose.
2105 We also consider CCmode registers to be fixed for this purpose;
2106 failure to do so leads to failure to simplify 0<100 type of
2107 conditionals.
2109 On all machines, we can't record any global registers.
2110 Nor should we record any register that is in a small
2111 class, as defined by CLASS_LIKELY_SPILLED_P. */
2112 bool record;
2114 if (regno >= FIRST_PSEUDO_REGISTER)
2115 record = true;
2116 else if (x == frame_pointer_rtx
2117 || x == hard_frame_pointer_rtx
2118 || x == arg_pointer_rtx
2119 || x == stack_pointer_rtx
2120 || x == pic_offset_table_rtx)
2121 record = true;
2122 else if (global_regs[regno])
2123 record = false;
2124 else if (fixed_regs[regno])
2125 record = true;
2126 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2127 record = true;
2128 else if (SMALL_REGISTER_CLASSES)
2129 record = false;
2130 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2131 record = false;
2132 else
2133 record = true;
2135 if (!record)
2137 *do_not_record_p = 1;
2138 return 0;
2142 hash += ((unsigned int) REG << 7);
2143 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2144 return hash;
2147 /* We handle SUBREG of a REG specially because the underlying
2148 reg changes its hash value with every value change; we don't
2149 want to have to forget unrelated subregs when one subreg changes. */
2150 case SUBREG:
2152 if (REG_P (SUBREG_REG (x)))
2154 hash += (((unsigned int) SUBREG << 7)
2155 + REGNO (SUBREG_REG (x))
2156 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2157 return hash;
2159 break;
2162 case CONST_INT:
2163 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2164 + (unsigned int) INTVAL (x));
2165 return hash;
2167 case CONST_DOUBLE:
2168 /* This is like the general case, except that it only counts
2169 the integers representing the constant. */
2170 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2171 if (GET_MODE (x) != VOIDmode)
2172 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2173 else
2174 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2175 + (unsigned int) CONST_DOUBLE_HIGH (x));
2176 return hash;
2178 case CONST_FIXED:
2179 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2180 hash += fixed_hash (CONST_FIXED_VALUE (x));
2181 return hash;
2183 case CONST_VECTOR:
2185 int units;
2186 rtx elt;
2188 units = CONST_VECTOR_NUNITS (x);
2190 for (i = 0; i < units; ++i)
2192 elt = CONST_VECTOR_ELT (x, i);
2193 hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p,
2194 hash_arg_in_memory_p, have_reg_qty);
2197 return hash;
2200 /* Assume there is only one rtx object for any given label. */
2201 case LABEL_REF:
2202 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2203 differences and differences between each stage's debugging dumps. */
2204 hash += (((unsigned int) LABEL_REF << 7)
2205 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2206 return hash;
2208 case SYMBOL_REF:
2210 /* Don't hash on the symbol's address to avoid bootstrap differences.
2211 Different hash values may cause expressions to be recorded in
2212 different orders and thus different registers to be used in the
2213 final assembler. This also avoids differences in the dump files
2214 between various stages. */
2215 unsigned int h = 0;
2216 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2218 while (*p)
2219 h += (h << 7) + *p++; /* ??? revisit */
2221 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2222 return hash;
2225 case MEM:
2226 /* We don't record if marked volatile or if BLKmode since we don't
2227 know the size of the move. */
2228 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2230 *do_not_record_p = 1;
2231 return 0;
2233 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2234 *hash_arg_in_memory_p = 1;
2236 /* Now that we have already found this special case,
2237 might as well speed it up as much as possible. */
2238 hash += (unsigned) MEM;
2239 x = XEXP (x, 0);
2240 goto repeat;
2242 case USE:
2243 /* A USE that mentions non-volatile memory needs special
2244 handling since the MEM may be BLKmode which normally
2245 prevents an entry from being made. Pure calls are
2246 marked by a USE which mentions BLKmode memory.
2247 See calls.c:emit_call_1. */
2248 if (MEM_P (XEXP (x, 0))
2249 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2251 hash += (unsigned) USE;
2252 x = XEXP (x, 0);
2254 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2255 *hash_arg_in_memory_p = 1;
2257 /* Now that we have already found this special case,
2258 might as well speed it up as much as possible. */
2259 hash += (unsigned) MEM;
2260 x = XEXP (x, 0);
2261 goto repeat;
2263 break;
2265 case PRE_DEC:
2266 case PRE_INC:
2267 case POST_DEC:
2268 case POST_INC:
2269 case PRE_MODIFY:
2270 case POST_MODIFY:
2271 case PC:
2272 case CC0:
2273 case CALL:
2274 case UNSPEC_VOLATILE:
2275 *do_not_record_p = 1;
2276 return 0;
2278 case ASM_OPERANDS:
2279 if (MEM_VOLATILE_P (x))
2281 *do_not_record_p = 1;
2282 return 0;
2284 else
2286 /* We don't want to take the filename and line into account. */
2287 hash += (unsigned) code + (unsigned) GET_MODE (x)
2288 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2289 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2290 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2292 if (ASM_OPERANDS_INPUT_LENGTH (x))
2294 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2296 hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2297 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2298 do_not_record_p, hash_arg_in_memory_p,
2299 have_reg_qty)
2300 + hash_rtx_string
2301 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2304 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2305 x = ASM_OPERANDS_INPUT (x, 0);
2306 mode = GET_MODE (x);
2307 goto repeat;
2310 return hash;
2312 break;
2314 default:
2315 break;
2318 i = GET_RTX_LENGTH (code) - 1;
2319 hash += (unsigned) code + (unsigned) GET_MODE (x);
2320 fmt = GET_RTX_FORMAT (code);
2321 for (; i >= 0; i--)
2323 switch (fmt[i])
2325 case 'e':
2326 /* If we are about to do the last recursive call
2327 needed at this level, change it into iteration.
2328 This function is called enough to be worth it. */
2329 if (i == 0)
2331 x = XEXP (x, i);
2332 goto repeat;
2335 hash += hash_rtx (XEXP (x, i), 0, do_not_record_p,
2336 hash_arg_in_memory_p, have_reg_qty);
2337 break;
2339 case 'E':
2340 for (j = 0; j < XVECLEN (x, i); j++)
2341 hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p,
2342 hash_arg_in_memory_p, have_reg_qty);
2343 break;
2345 case 's':
2346 hash += hash_rtx_string (XSTR (x, i));
2347 break;
2349 case 'i':
2350 hash += (unsigned int) XINT (x, i);
2351 break;
2353 case '0': case 't':
2354 /* Unused. */
2355 break;
2357 default:
2358 gcc_unreachable ();
2362 return hash;
2365 /* Hash an rtx X for cse via hash_rtx.
2366 Stores 1 in do_not_record if any subexpression is volatile.
2367 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2368 does not have the RTX_UNCHANGING_P bit set. */
2370 static inline unsigned
2371 canon_hash (rtx x, enum machine_mode mode)
2373 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2376 /* Like canon_hash but with no side effects, i.e. do_not_record
2377 and hash_arg_in_memory are not changed. */
2379 static inline unsigned
2380 safe_hash (rtx x, enum machine_mode mode)
2382 int dummy_do_not_record;
2383 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2386 /* Return 1 iff X and Y would canonicalize into the same thing,
2387 without actually constructing the canonicalization of either one.
2388 If VALIDATE is nonzero,
2389 we assume X is an expression being processed from the rtl
2390 and Y was found in the hash table. We check register refs
2391 in Y for being marked as valid.
2393 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2396 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2398 int i, j;
2399 enum rtx_code code;
2400 const char *fmt;
2402 /* Note: it is incorrect to assume an expression is equivalent to itself
2403 if VALIDATE is nonzero. */
2404 if (x == y && !validate)
2405 return 1;
2407 if (x == 0 || y == 0)
2408 return x == y;
2410 code = GET_CODE (x);
2411 if (code != GET_CODE (y))
2412 return 0;
2414 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2415 if (GET_MODE (x) != GET_MODE (y))
2416 return 0;
2418 switch (code)
2420 case PC:
2421 case CC0:
2422 case CONST_INT:
2423 case CONST_DOUBLE:
2424 case CONST_FIXED:
2425 return x == y;
2427 case LABEL_REF:
2428 return XEXP (x, 0) == XEXP (y, 0);
2430 case SYMBOL_REF:
2431 return XSTR (x, 0) == XSTR (y, 0);
2433 case REG:
2434 if (for_gcse)
2435 return REGNO (x) == REGNO (y);
2436 else
2438 unsigned int regno = REGNO (y);
2439 unsigned int i;
2440 unsigned int endregno = END_REGNO (y);
2442 /* If the quantities are not the same, the expressions are not
2443 equivalent. If there are and we are not to validate, they
2444 are equivalent. Otherwise, ensure all regs are up-to-date. */
2446 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2447 return 0;
2449 if (! validate)
2450 return 1;
2452 for (i = regno; i < endregno; i++)
2453 if (REG_IN_TABLE (i) != REG_TICK (i))
2454 return 0;
2456 return 1;
2459 case MEM:
2460 if (for_gcse)
2462 /* A volatile mem should not be considered equivalent to any
2463 other. */
2464 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2465 return 0;
2467 /* Can't merge two expressions in different alias sets, since we
2468 can decide that the expression is transparent in a block when
2469 it isn't, due to it being set with the different alias set.
2471 Also, can't merge two expressions with different MEM_ATTRS.
2472 They could e.g. be two different entities allocated into the
2473 same space on the stack (see e.g. PR25130). In that case, the
2474 MEM addresses can be the same, even though the two MEMs are
2475 absolutely not equivalent.
2477 But because really all MEM attributes should be the same for
2478 equivalent MEMs, we just use the invariant that MEMs that have
2479 the same attributes share the same mem_attrs data structure. */
2480 if (MEM_ATTRS (x) != MEM_ATTRS (y))
2481 return 0;
2483 break;
2485 /* For commutative operations, check both orders. */
2486 case PLUS:
2487 case MULT:
2488 case AND:
2489 case IOR:
2490 case XOR:
2491 case NE:
2492 case EQ:
2493 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2494 validate, for_gcse)
2495 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2496 validate, for_gcse))
2497 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2498 validate, for_gcse)
2499 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2500 validate, for_gcse)));
2502 case ASM_OPERANDS:
2503 /* We don't use the generic code below because we want to
2504 disregard filename and line numbers. */
2506 /* A volatile asm isn't equivalent to any other. */
2507 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2508 return 0;
2510 if (GET_MODE (x) != GET_MODE (y)
2511 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2512 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2513 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2514 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2515 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2516 return 0;
2518 if (ASM_OPERANDS_INPUT_LENGTH (x))
2520 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2521 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2522 ASM_OPERANDS_INPUT (y, i),
2523 validate, for_gcse)
2524 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2525 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2526 return 0;
2529 return 1;
2531 default:
2532 break;
2535 /* Compare the elements. If any pair of corresponding elements
2536 fail to match, return 0 for the whole thing. */
2538 fmt = GET_RTX_FORMAT (code);
2539 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2541 switch (fmt[i])
2543 case 'e':
2544 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2545 validate, for_gcse))
2546 return 0;
2547 break;
2549 case 'E':
2550 if (XVECLEN (x, i) != XVECLEN (y, i))
2551 return 0;
2552 for (j = 0; j < XVECLEN (x, i); j++)
2553 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2554 validate, for_gcse))
2555 return 0;
2556 break;
2558 case 's':
2559 if (strcmp (XSTR (x, i), XSTR (y, i)))
2560 return 0;
2561 break;
2563 case 'i':
2564 if (XINT (x, i) != XINT (y, i))
2565 return 0;
2566 break;
2568 case 'w':
2569 if (XWINT (x, i) != XWINT (y, i))
2570 return 0;
2571 break;
2573 case '0':
2574 case 't':
2575 break;
2577 default:
2578 gcc_unreachable ();
2582 return 1;
2585 /* Return 1 if X has a value that can vary even between two
2586 executions of the program. 0 means X can be compared reliably
2587 against certain constants or near-constants. */
2589 static bool
2590 cse_rtx_varies_p (const_rtx x, bool from_alias)
2592 /* We need not check for X and the equivalence class being of the same
2593 mode because if X is equivalent to a constant in some mode, it
2594 doesn't vary in any mode. */
2596 if (REG_P (x)
2597 && REGNO_QTY_VALID_P (REGNO (x)))
2599 int x_q = REG_QTY (REGNO (x));
2600 struct qty_table_elem *x_ent = &qty_table[x_q];
2602 if (GET_MODE (x) == x_ent->mode
2603 && x_ent->const_rtx != NULL_RTX)
2604 return 0;
2607 if (GET_CODE (x) == PLUS
2608 && GET_CODE (XEXP (x, 1)) == CONST_INT
2609 && REG_P (XEXP (x, 0))
2610 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2612 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2613 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2615 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2616 && x0_ent->const_rtx != NULL_RTX)
2617 return 0;
2620 /* This can happen as the result of virtual register instantiation, if
2621 the initial constant is too large to be a valid address. This gives
2622 us a three instruction sequence, load large offset into a register,
2623 load fp minus a constant into a register, then a MEM which is the
2624 sum of the two `constant' registers. */
2625 if (GET_CODE (x) == PLUS
2626 && REG_P (XEXP (x, 0))
2627 && REG_P (XEXP (x, 1))
2628 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2629 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2631 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2632 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2633 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2634 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2636 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2637 && x0_ent->const_rtx != NULL_RTX
2638 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2639 && x1_ent->const_rtx != NULL_RTX)
2640 return 0;
2643 return rtx_varies_p (x, from_alias);
2646 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2647 the result if necessary. INSN is as for canon_reg. */
2649 static void
2650 validate_canon_reg (rtx *xloc, rtx insn)
2652 if (*xloc)
2654 rtx new = canon_reg (*xloc, insn);
2656 /* If replacing pseudo with hard reg or vice versa, ensure the
2657 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2658 gcc_assert (insn && new);
2659 validate_change (insn, xloc, new, 1);
2663 /* Canonicalize an expression:
2664 replace each register reference inside it
2665 with the "oldest" equivalent register.
2667 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2668 after we make our substitution. The calls are made with IN_GROUP nonzero
2669 so apply_change_group must be called upon the outermost return from this
2670 function (unless INSN is zero). The result of apply_change_group can
2671 generally be discarded since the changes we are making are optional. */
2673 static rtx
2674 canon_reg (rtx x, rtx insn)
2676 int i;
2677 enum rtx_code code;
2678 const char *fmt;
2680 if (x == 0)
2681 return x;
2683 code = GET_CODE (x);
2684 switch (code)
2686 case PC:
2687 case CC0:
2688 case CONST:
2689 case CONST_INT:
2690 case CONST_DOUBLE:
2691 case CONST_FIXED:
2692 case CONST_VECTOR:
2693 case SYMBOL_REF:
2694 case LABEL_REF:
2695 case ADDR_VEC:
2696 case ADDR_DIFF_VEC:
2697 return x;
2699 case REG:
2701 int first;
2702 int q;
2703 struct qty_table_elem *ent;
2705 /* Never replace a hard reg, because hard regs can appear
2706 in more than one machine mode, and we must preserve the mode
2707 of each occurrence. Also, some hard regs appear in
2708 MEMs that are shared and mustn't be altered. Don't try to
2709 replace any reg that maps to a reg of class NO_REGS. */
2710 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2711 || ! REGNO_QTY_VALID_P (REGNO (x)))
2712 return x;
2714 q = REG_QTY (REGNO (x));
2715 ent = &qty_table[q];
2716 first = ent->first_reg;
2717 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2718 : REGNO_REG_CLASS (first) == NO_REGS ? x
2719 : gen_rtx_REG (ent->mode, first));
2722 default:
2723 break;
2726 fmt = GET_RTX_FORMAT (code);
2727 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2729 int j;
2731 if (fmt[i] == 'e')
2732 validate_canon_reg (&XEXP (x, i), insn);
2733 else if (fmt[i] == 'E')
2734 for (j = 0; j < XVECLEN (x, i); j++)
2735 validate_canon_reg (&XVECEXP (x, i, j), insn);
2738 return x;
2741 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2742 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2743 what values are being compared.
2745 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2746 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2747 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2748 compared to produce cc0.
2750 The return value is the comparison operator and is either the code of
2751 A or the code corresponding to the inverse of the comparison. */
2753 static enum rtx_code
2754 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2755 enum machine_mode *pmode1, enum machine_mode *pmode2)
2757 rtx arg1, arg2;
2759 arg1 = *parg1, arg2 = *parg2;
2761 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2763 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2765 /* Set nonzero when we find something of interest. */
2766 rtx x = 0;
2767 int reverse_code = 0;
2768 struct table_elt *p = 0;
2770 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2771 On machines with CC0, this is the only case that can occur, since
2772 fold_rtx will return the COMPARE or item being compared with zero
2773 when given CC0. */
2775 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2776 x = arg1;
2778 /* If ARG1 is a comparison operator and CODE is testing for
2779 STORE_FLAG_VALUE, get the inner arguments. */
2781 else if (COMPARISON_P (arg1))
2783 #ifdef FLOAT_STORE_FLAG_VALUE
2784 REAL_VALUE_TYPE fsfv;
2785 #endif
2787 if (code == NE
2788 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2789 && code == LT && STORE_FLAG_VALUE == -1)
2790 #ifdef FLOAT_STORE_FLAG_VALUE
2791 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2792 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2793 REAL_VALUE_NEGATIVE (fsfv)))
2794 #endif
2796 x = arg1;
2797 else if (code == EQ
2798 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2799 && code == GE && STORE_FLAG_VALUE == -1)
2800 #ifdef FLOAT_STORE_FLAG_VALUE
2801 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2802 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2803 REAL_VALUE_NEGATIVE (fsfv)))
2804 #endif
2806 x = arg1, reverse_code = 1;
2809 /* ??? We could also check for
2811 (ne (and (eq (...) (const_int 1))) (const_int 0))
2813 and related forms, but let's wait until we see them occurring. */
2815 if (x == 0)
2816 /* Look up ARG1 in the hash table and see if it has an equivalence
2817 that lets us see what is being compared. */
2818 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2819 if (p)
2821 p = p->first_same_value;
2823 /* If what we compare is already known to be constant, that is as
2824 good as it gets.
2825 We need to break the loop in this case, because otherwise we
2826 can have an infinite loop when looking at a reg that is known
2827 to be a constant which is the same as a comparison of a reg
2828 against zero which appears later in the insn stream, which in
2829 turn is constant and the same as the comparison of the first reg
2830 against zero... */
2831 if (p->is_const)
2832 break;
2835 for (; p; p = p->next_same_value)
2837 enum machine_mode inner_mode = GET_MODE (p->exp);
2838 #ifdef FLOAT_STORE_FLAG_VALUE
2839 REAL_VALUE_TYPE fsfv;
2840 #endif
2842 /* If the entry isn't valid, skip it. */
2843 if (! exp_equiv_p (p->exp, p->exp, 1, false))
2844 continue;
2846 if (GET_CODE (p->exp) == COMPARE
2847 /* Another possibility is that this machine has a compare insn
2848 that includes the comparison code. In that case, ARG1 would
2849 be equivalent to a comparison operation that would set ARG1 to
2850 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2851 ORIG_CODE is the actual comparison being done; if it is an EQ,
2852 we must reverse ORIG_CODE. On machine with a negative value
2853 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2854 || ((code == NE
2855 || (code == LT
2856 && GET_MODE_CLASS (inner_mode) == MODE_INT
2857 && (GET_MODE_BITSIZE (inner_mode)
2858 <= HOST_BITS_PER_WIDE_INT)
2859 && (STORE_FLAG_VALUE
2860 & ((HOST_WIDE_INT) 1
2861 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2862 #ifdef FLOAT_STORE_FLAG_VALUE
2863 || (code == LT
2864 && SCALAR_FLOAT_MODE_P (inner_mode)
2865 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2866 REAL_VALUE_NEGATIVE (fsfv)))
2867 #endif
2869 && COMPARISON_P (p->exp)))
2871 x = p->exp;
2872 break;
2874 else if ((code == EQ
2875 || (code == GE
2876 && GET_MODE_CLASS (inner_mode) == MODE_INT
2877 && (GET_MODE_BITSIZE (inner_mode)
2878 <= HOST_BITS_PER_WIDE_INT)
2879 && (STORE_FLAG_VALUE
2880 & ((HOST_WIDE_INT) 1
2881 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2882 #ifdef FLOAT_STORE_FLAG_VALUE
2883 || (code == GE
2884 && SCALAR_FLOAT_MODE_P (inner_mode)
2885 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2886 REAL_VALUE_NEGATIVE (fsfv)))
2887 #endif
2889 && COMPARISON_P (p->exp))
2891 reverse_code = 1;
2892 x = p->exp;
2893 break;
2896 /* If this non-trapping address, e.g. fp + constant, the
2897 equivalent is a better operand since it may let us predict
2898 the value of the comparison. */
2899 else if (!rtx_addr_can_trap_p (p->exp))
2901 arg1 = p->exp;
2902 continue;
2906 /* If we didn't find a useful equivalence for ARG1, we are done.
2907 Otherwise, set up for the next iteration. */
2908 if (x == 0)
2909 break;
2911 /* If we need to reverse the comparison, make sure that that is
2912 possible -- we can't necessarily infer the value of GE from LT
2913 with floating-point operands. */
2914 if (reverse_code)
2916 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
2917 if (reversed == UNKNOWN)
2918 break;
2919 else
2920 code = reversed;
2922 else if (COMPARISON_P (x))
2923 code = GET_CODE (x);
2924 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2927 /* Return our results. Return the modes from before fold_rtx
2928 because fold_rtx might produce const_int, and then it's too late. */
2929 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2930 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2932 return code;
2935 /* If X is a nontrivial arithmetic operation on an argument for which
2936 a constant value can be determined, return the result of operating
2937 on that value, as a constant. Otherwise, return X, possibly with
2938 one or more operands changed to a forward-propagated constant.
2940 If X is a register whose contents are known, we do NOT return
2941 those contents here; equiv_constant is called to perform that task.
2942 For SUBREGs and MEMs, we do that both here and in equiv_constant.
2944 INSN is the insn that we may be modifying. If it is 0, make a copy
2945 of X before modifying it. */
2947 static rtx
2948 fold_rtx (rtx x, rtx insn)
2950 enum rtx_code code;
2951 enum machine_mode mode;
2952 const char *fmt;
2953 int i;
2954 rtx new = 0;
2955 int changed = 0;
2957 /* Operands of X. */
2958 rtx folded_arg0;
2959 rtx folded_arg1;
2961 /* Constant equivalents of first three operands of X;
2962 0 when no such equivalent is known. */
2963 rtx const_arg0;
2964 rtx const_arg1;
2965 rtx const_arg2;
2967 /* The mode of the first operand of X. We need this for sign and zero
2968 extends. */
2969 enum machine_mode mode_arg0;
2971 if (x == 0)
2972 return x;
2974 /* Try to perform some initial simplifications on X. */
2975 code = GET_CODE (x);
2976 switch (code)
2978 case MEM:
2979 case SUBREG:
2980 if ((new = equiv_constant (x)) != NULL_RTX)
2981 return new;
2982 return x;
2984 case CONST:
2985 case CONST_INT:
2986 case CONST_DOUBLE:
2987 case CONST_FIXED:
2988 case CONST_VECTOR:
2989 case SYMBOL_REF:
2990 case LABEL_REF:
2991 case REG:
2992 case PC:
2993 /* No use simplifying an EXPR_LIST
2994 since they are used only for lists of args
2995 in a function call's REG_EQUAL note. */
2996 case EXPR_LIST:
2997 return x;
2999 #ifdef HAVE_cc0
3000 case CC0:
3001 return prev_insn_cc0;
3002 #endif
3004 case ASM_OPERANDS:
3005 if (insn)
3007 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3008 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3009 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3011 return x;
3013 #ifdef NO_FUNCTION_CSE
3014 case CALL:
3015 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3016 return x;
3017 break;
3018 #endif
3020 /* Anything else goes through the loop below. */
3021 default:
3022 break;
3025 mode = GET_MODE (x);
3026 const_arg0 = 0;
3027 const_arg1 = 0;
3028 const_arg2 = 0;
3029 mode_arg0 = VOIDmode;
3031 /* Try folding our operands.
3032 Then see which ones have constant values known. */
3034 fmt = GET_RTX_FORMAT (code);
3035 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3036 if (fmt[i] == 'e')
3038 rtx folded_arg = XEXP (x, i), const_arg;
3039 enum machine_mode mode_arg = GET_MODE (folded_arg);
3041 switch (GET_CODE (folded_arg))
3043 case MEM:
3044 case REG:
3045 case SUBREG:
3046 const_arg = equiv_constant (folded_arg);
3047 break;
3049 case CONST:
3050 case CONST_INT:
3051 case SYMBOL_REF:
3052 case LABEL_REF:
3053 case CONST_DOUBLE:
3054 case CONST_FIXED:
3055 case CONST_VECTOR:
3056 const_arg = folded_arg;
3057 break;
3059 #ifdef HAVE_cc0
3060 case CC0:
3061 folded_arg = prev_insn_cc0;
3062 mode_arg = prev_insn_cc0_mode;
3063 const_arg = equiv_constant (folded_arg);
3064 break;
3065 #endif
3067 default:
3068 folded_arg = fold_rtx (folded_arg, insn);
3069 const_arg = equiv_constant (folded_arg);
3070 break;
3073 /* For the first three operands, see if the operand
3074 is constant or equivalent to a constant. */
3075 switch (i)
3077 case 0:
3078 folded_arg0 = folded_arg;
3079 const_arg0 = const_arg;
3080 mode_arg0 = mode_arg;
3081 break;
3082 case 1:
3083 folded_arg1 = folded_arg;
3084 const_arg1 = const_arg;
3085 break;
3086 case 2:
3087 const_arg2 = const_arg;
3088 break;
3091 /* Pick the least expensive of the argument and an equivalent constant
3092 argument. */
3093 if (const_arg != 0
3094 && const_arg != folded_arg
3095 && COST_IN (const_arg, code) <= COST_IN (folded_arg, code)
3097 /* It's not safe to substitute the operand of a conversion
3098 operator with a constant, as the conversion's identity
3099 depends upon the mode of its operand. This optimization
3100 is handled by the call to simplify_unary_operation. */
3101 && (GET_RTX_CLASS (code) != RTX_UNARY
3102 || GET_MODE (const_arg) == mode_arg0
3103 || (code != ZERO_EXTEND
3104 && code != SIGN_EXTEND
3105 && code != TRUNCATE
3106 && code != FLOAT_TRUNCATE
3107 && code != FLOAT_EXTEND
3108 && code != FLOAT
3109 && code != FIX
3110 && code != UNSIGNED_FLOAT
3111 && code != UNSIGNED_FIX)))
3112 folded_arg = const_arg;
3114 if (folded_arg == XEXP (x, i))
3115 continue;
3117 if (insn == NULL_RTX && !changed)
3118 x = copy_rtx (x);
3119 changed = 1;
3120 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3123 if (changed)
3125 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3126 consistent with the order in X. */
3127 if (canonicalize_change_group (insn, x))
3129 rtx tem;
3130 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3131 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3134 apply_change_group ();
3137 /* If X is an arithmetic operation, see if we can simplify it. */
3139 switch (GET_RTX_CLASS (code))
3141 case RTX_UNARY:
3143 int is_const = 0;
3145 /* We can't simplify extension ops unless we know the
3146 original mode. */
3147 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3148 && mode_arg0 == VOIDmode)
3149 break;
3151 /* If we had a CONST, strip it off and put it back later if we
3152 fold. */
3153 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3154 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3156 new = simplify_unary_operation (code, mode,
3157 const_arg0 ? const_arg0 : folded_arg0,
3158 mode_arg0);
3159 /* NEG of PLUS could be converted into MINUS, but that causes
3160 expressions of the form
3161 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3162 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3163 FIXME: those ports should be fixed. */
3164 if (new != 0 && is_const
3165 && GET_CODE (new) == PLUS
3166 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3167 || GET_CODE (XEXP (new, 0)) == LABEL_REF)
3168 && GET_CODE (XEXP (new, 1)) == CONST_INT)
3169 new = gen_rtx_CONST (mode, new);
3171 break;
3173 case RTX_COMPARE:
3174 case RTX_COMM_COMPARE:
3175 /* See what items are actually being compared and set FOLDED_ARG[01]
3176 to those values and CODE to the actual comparison code. If any are
3177 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3178 do anything if both operands are already known to be constant. */
3180 /* ??? Vector mode comparisons are not supported yet. */
3181 if (VECTOR_MODE_P (mode))
3182 break;
3184 if (const_arg0 == 0 || const_arg1 == 0)
3186 struct table_elt *p0, *p1;
3187 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3188 enum machine_mode mode_arg1;
3190 #ifdef FLOAT_STORE_FLAG_VALUE
3191 if (SCALAR_FLOAT_MODE_P (mode))
3193 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3194 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3195 false_rtx = CONST0_RTX (mode);
3197 #endif
3199 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3200 &mode_arg0, &mode_arg1);
3202 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3203 what kinds of things are being compared, so we can't do
3204 anything with this comparison. */
3206 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3207 break;
3209 const_arg0 = equiv_constant (folded_arg0);
3210 const_arg1 = equiv_constant (folded_arg1);
3212 /* If we do not now have two constants being compared, see
3213 if we can nevertheless deduce some things about the
3214 comparison. */
3215 if (const_arg0 == 0 || const_arg1 == 0)
3217 if (const_arg1 != NULL)
3219 rtx cheapest_simplification;
3220 int cheapest_cost;
3221 rtx simp_result;
3222 struct table_elt *p;
3224 /* See if we can find an equivalent of folded_arg0
3225 that gets us a cheaper expression, possibly a
3226 constant through simplifications. */
3227 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3228 mode_arg0);
3230 if (p != NULL)
3232 cheapest_simplification = x;
3233 cheapest_cost = COST (x);
3235 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3237 int cost;
3239 /* If the entry isn't valid, skip it. */
3240 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3241 continue;
3243 /* Try to simplify using this equivalence. */
3244 simp_result
3245 = simplify_relational_operation (code, mode,
3246 mode_arg0,
3247 p->exp,
3248 const_arg1);
3250 if (simp_result == NULL)
3251 continue;
3253 cost = COST (simp_result);
3254 if (cost < cheapest_cost)
3256 cheapest_cost = cost;
3257 cheapest_simplification = simp_result;
3261 /* If we have a cheaper expression now, use that
3262 and try folding it further, from the top. */
3263 if (cheapest_simplification != x)
3264 return fold_rtx (copy_rtx (cheapest_simplification),
3265 insn);
3269 /* See if the two operands are the same. */
3271 if ((REG_P (folded_arg0)
3272 && REG_P (folded_arg1)
3273 && (REG_QTY (REGNO (folded_arg0))
3274 == REG_QTY (REGNO (folded_arg1))))
3275 || ((p0 = lookup (folded_arg0,
3276 SAFE_HASH (folded_arg0, mode_arg0),
3277 mode_arg0))
3278 && (p1 = lookup (folded_arg1,
3279 SAFE_HASH (folded_arg1, mode_arg0),
3280 mode_arg0))
3281 && p0->first_same_value == p1->first_same_value))
3282 folded_arg1 = folded_arg0;
3284 /* If FOLDED_ARG0 is a register, see if the comparison we are
3285 doing now is either the same as we did before or the reverse
3286 (we only check the reverse if not floating-point). */
3287 else if (REG_P (folded_arg0))
3289 int qty = REG_QTY (REGNO (folded_arg0));
3291 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3293 struct qty_table_elem *ent = &qty_table[qty];
3295 if ((comparison_dominates_p (ent->comparison_code, code)
3296 || (! FLOAT_MODE_P (mode_arg0)
3297 && comparison_dominates_p (ent->comparison_code,
3298 reverse_condition (code))))
3299 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3300 || (const_arg1
3301 && rtx_equal_p (ent->comparison_const,
3302 const_arg1))
3303 || (REG_P (folded_arg1)
3304 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3305 return (comparison_dominates_p (ent->comparison_code, code)
3306 ? true_rtx : false_rtx);
3312 /* If we are comparing against zero, see if the first operand is
3313 equivalent to an IOR with a constant. If so, we may be able to
3314 determine the result of this comparison. */
3315 if (const_arg1 == const0_rtx && !const_arg0)
3317 rtx y = lookup_as_function (folded_arg0, IOR);
3318 rtx inner_const;
3320 if (y != 0
3321 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3322 && GET_CODE (inner_const) == CONST_INT
3323 && INTVAL (inner_const) != 0)
3324 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3328 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3329 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3330 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3332 break;
3334 case RTX_BIN_ARITH:
3335 case RTX_COMM_ARITH:
3336 switch (code)
3338 case PLUS:
3339 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3340 with that LABEL_REF as its second operand. If so, the result is
3341 the first operand of that MINUS. This handles switches with an
3342 ADDR_DIFF_VEC table. */
3343 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3345 rtx y
3346 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3347 : lookup_as_function (folded_arg0, MINUS);
3349 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3350 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3351 return XEXP (y, 0);
3353 /* Now try for a CONST of a MINUS like the above. */
3354 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3355 : lookup_as_function (folded_arg0, CONST))) != 0
3356 && GET_CODE (XEXP (y, 0)) == MINUS
3357 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3358 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3359 return XEXP (XEXP (y, 0), 0);
3362 /* Likewise if the operands are in the other order. */
3363 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3365 rtx y
3366 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3367 : lookup_as_function (folded_arg1, MINUS);
3369 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3370 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3371 return XEXP (y, 0);
3373 /* Now try for a CONST of a MINUS like the above. */
3374 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3375 : lookup_as_function (folded_arg1, CONST))) != 0
3376 && GET_CODE (XEXP (y, 0)) == MINUS
3377 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3378 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3379 return XEXP (XEXP (y, 0), 0);
3382 /* If second operand is a register equivalent to a negative
3383 CONST_INT, see if we can find a register equivalent to the
3384 positive constant. Make a MINUS if so. Don't do this for
3385 a non-negative constant since we might then alternate between
3386 choosing positive and negative constants. Having the positive
3387 constant previously-used is the more common case. Be sure
3388 the resulting constant is non-negative; if const_arg1 were
3389 the smallest negative number this would overflow: depending
3390 on the mode, this would either just be the same value (and
3391 hence not save anything) or be incorrect. */
3392 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3393 && INTVAL (const_arg1) < 0
3394 /* This used to test
3396 -INTVAL (const_arg1) >= 0
3398 But The Sun V5.0 compilers mis-compiled that test. So
3399 instead we test for the problematic value in a more direct
3400 manner and hope the Sun compilers get it correct. */
3401 && INTVAL (const_arg1) !=
3402 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3403 && REG_P (folded_arg1))
3405 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3406 struct table_elt *p
3407 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3409 if (p)
3410 for (p = p->first_same_value; p; p = p->next_same_value)
3411 if (REG_P (p->exp))
3412 return simplify_gen_binary (MINUS, mode, folded_arg0,
3413 canon_reg (p->exp, NULL_RTX));
3415 goto from_plus;
3417 case MINUS:
3418 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3419 If so, produce (PLUS Z C2-C). */
3420 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3422 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3423 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3424 return fold_rtx (plus_constant (copy_rtx (y),
3425 -INTVAL (const_arg1)),
3426 NULL_RTX);
3429 /* Fall through. */
3431 from_plus:
3432 case SMIN: case SMAX: case UMIN: case UMAX:
3433 case IOR: case AND: case XOR:
3434 case MULT:
3435 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3436 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3437 is known to be of similar form, we may be able to replace the
3438 operation with a combined operation. This may eliminate the
3439 intermediate operation if every use is simplified in this way.
3440 Note that the similar optimization done by combine.c only works
3441 if the intermediate operation's result has only one reference. */
3443 if (REG_P (folded_arg0)
3444 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3446 int is_shift
3447 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3448 rtx y, inner_const, new_const;
3449 enum rtx_code associate_code;
3451 if (is_shift
3452 && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode)
3453 || INTVAL (const_arg1) < 0))
3455 if (SHIFT_COUNT_TRUNCATED)
3456 const_arg1 = GEN_INT (INTVAL (const_arg1)
3457 & (GET_MODE_BITSIZE (mode) - 1));
3458 else
3459 break;
3462 y = lookup_as_function (folded_arg0, code);
3463 if (y == 0)
3464 break;
3466 /* If we have compiled a statement like
3467 "if (x == (x & mask1))", and now are looking at
3468 "x & mask2", we will have a case where the first operand
3469 of Y is the same as our first operand. Unless we detect
3470 this case, an infinite loop will result. */
3471 if (XEXP (y, 0) == folded_arg0)
3472 break;
3474 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3475 if (!inner_const || GET_CODE (inner_const) != CONST_INT)
3476 break;
3478 /* Don't associate these operations if they are a PLUS with the
3479 same constant and it is a power of two. These might be doable
3480 with a pre- or post-increment. Similarly for two subtracts of
3481 identical powers of two with post decrement. */
3483 if (code == PLUS && const_arg1 == inner_const
3484 && ((HAVE_PRE_INCREMENT
3485 && exact_log2 (INTVAL (const_arg1)) >= 0)
3486 || (HAVE_POST_INCREMENT
3487 && exact_log2 (INTVAL (const_arg1)) >= 0)
3488 || (HAVE_PRE_DECREMENT
3489 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3490 || (HAVE_POST_DECREMENT
3491 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3492 break;
3494 if (is_shift
3495 && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode)
3496 || INTVAL (inner_const) < 0))
3498 if (SHIFT_COUNT_TRUNCATED)
3499 inner_const = GEN_INT (INTVAL (inner_const)
3500 & (GET_MODE_BITSIZE (mode) - 1));
3501 else
3502 break;
3505 /* Compute the code used to compose the constants. For example,
3506 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3508 associate_code = (is_shift || code == MINUS ? PLUS : code);
3510 new_const = simplify_binary_operation (associate_code, mode,
3511 const_arg1, inner_const);
3513 if (new_const == 0)
3514 break;
3516 /* If we are associating shift operations, don't let this
3517 produce a shift of the size of the object or larger.
3518 This could occur when we follow a sign-extend by a right
3519 shift on a machine that does a sign-extend as a pair
3520 of shifts. */
3522 if (is_shift
3523 && GET_CODE (new_const) == CONST_INT
3524 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3526 /* As an exception, we can turn an ASHIFTRT of this
3527 form into a shift of the number of bits - 1. */
3528 if (code == ASHIFTRT)
3529 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3530 else if (!side_effects_p (XEXP (y, 0)))
3531 return CONST0_RTX (mode);
3532 else
3533 break;
3536 y = copy_rtx (XEXP (y, 0));
3538 /* If Y contains our first operand (the most common way this
3539 can happen is if Y is a MEM), we would do into an infinite
3540 loop if we tried to fold it. So don't in that case. */
3542 if (! reg_mentioned_p (folded_arg0, y))
3543 y = fold_rtx (y, insn);
3545 return simplify_gen_binary (code, mode, y, new_const);
3547 break;
3549 case DIV: case UDIV:
3550 /* ??? The associative optimization performed immediately above is
3551 also possible for DIV and UDIV using associate_code of MULT.
3552 However, we would need extra code to verify that the
3553 multiplication does not overflow, that is, there is no overflow
3554 in the calculation of new_const. */
3555 break;
3557 default:
3558 break;
3561 new = simplify_binary_operation (code, mode,
3562 const_arg0 ? const_arg0 : folded_arg0,
3563 const_arg1 ? const_arg1 : folded_arg1);
3564 break;
3566 case RTX_OBJ:
3567 /* (lo_sum (high X) X) is simply X. */
3568 if (code == LO_SUM && const_arg0 != 0
3569 && GET_CODE (const_arg0) == HIGH
3570 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3571 return const_arg1;
3572 break;
3574 case RTX_TERNARY:
3575 case RTX_BITFIELD_OPS:
3576 new = simplify_ternary_operation (code, mode, mode_arg0,
3577 const_arg0 ? const_arg0 : folded_arg0,
3578 const_arg1 ? const_arg1 : folded_arg1,
3579 const_arg2 ? const_arg2 : XEXP (x, 2));
3580 break;
3582 default:
3583 break;
3586 return new ? new : x;
3589 /* Return a constant value currently equivalent to X.
3590 Return 0 if we don't know one. */
3592 static rtx
3593 equiv_constant (rtx x)
3595 if (REG_P (x)
3596 && REGNO_QTY_VALID_P (REGNO (x)))
3598 int x_q = REG_QTY (REGNO (x));
3599 struct qty_table_elem *x_ent = &qty_table[x_q];
3601 if (x_ent->const_rtx)
3602 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3605 if (x == 0 || CONSTANT_P (x))
3606 return x;
3608 if (GET_CODE (x) == SUBREG)
3610 rtx new;
3612 /* See if we previously assigned a constant value to this SUBREG. */
3613 if ((new = lookup_as_function (x, CONST_INT)) != 0
3614 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0
3615 || (new = lookup_as_function (x, CONST_FIXED)) != 0)
3616 return new;
3618 if (REG_P (SUBREG_REG (x))
3619 && (new = equiv_constant (SUBREG_REG (x))) != 0)
3620 return simplify_subreg (GET_MODE (x), SUBREG_REG (x),
3621 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3623 return 0;
3626 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3627 the hash table in case its value was seen before. */
3629 if (MEM_P (x))
3631 struct table_elt *elt;
3633 x = avoid_constant_pool_reference (x);
3634 if (CONSTANT_P (x))
3635 return x;
3637 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3638 if (elt == 0)
3639 return 0;
3641 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3642 if (elt->is_const && CONSTANT_P (elt->exp))
3643 return elt->exp;
3646 return 0;
3649 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3650 "taken" branch.
3652 In certain cases, this can cause us to add an equivalence. For example,
3653 if we are following the taken case of
3654 if (i == 2)
3655 we can add the fact that `i' and '2' are now equivalent.
3657 In any case, we can record that this comparison was passed. If the same
3658 comparison is seen later, we will know its value. */
3660 static void
3661 record_jump_equiv (rtx insn, bool taken)
3663 int cond_known_true;
3664 rtx op0, op1;
3665 rtx set;
3666 enum machine_mode mode, mode0, mode1;
3667 int reversed_nonequality = 0;
3668 enum rtx_code code;
3670 /* Ensure this is the right kind of insn. */
3671 gcc_assert (any_condjump_p (insn));
3673 set = pc_set (insn);
3675 /* See if this jump condition is known true or false. */
3676 if (taken)
3677 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3678 else
3679 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3681 /* Get the type of comparison being done and the operands being compared.
3682 If we had to reverse a non-equality condition, record that fact so we
3683 know that it isn't valid for floating-point. */
3684 code = GET_CODE (XEXP (SET_SRC (set), 0));
3685 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3686 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3688 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3689 if (! cond_known_true)
3691 code = reversed_comparison_code_parts (code, op0, op1, insn);
3693 /* Don't remember if we can't find the inverse. */
3694 if (code == UNKNOWN)
3695 return;
3698 /* The mode is the mode of the non-constant. */
3699 mode = mode0;
3700 if (mode1 != VOIDmode)
3701 mode = mode1;
3703 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3706 /* Yet another form of subreg creation. In this case, we want something in
3707 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3709 static rtx
3710 record_jump_cond_subreg (enum machine_mode mode, rtx op)
3712 enum machine_mode op_mode = GET_MODE (op);
3713 if (op_mode == mode || op_mode == VOIDmode)
3714 return op;
3715 return lowpart_subreg (mode, op, op_mode);
3718 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3719 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3720 Make any useful entries we can with that information. Called from
3721 above function and called recursively. */
3723 static void
3724 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
3725 rtx op1, int reversed_nonequality)
3727 unsigned op0_hash, op1_hash;
3728 int op0_in_memory, op1_in_memory;
3729 struct table_elt *op0_elt, *op1_elt;
3731 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3732 we know that they are also equal in the smaller mode (this is also
3733 true for all smaller modes whether or not there is a SUBREG, but
3734 is not worth testing for with no SUBREG). */
3736 /* Note that GET_MODE (op0) may not equal MODE. */
3737 if (code == EQ && GET_CODE (op0) == SUBREG
3738 && (GET_MODE_SIZE (GET_MODE (op0))
3739 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3741 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3742 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3743 if (tem)
3744 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3745 reversed_nonequality);
3748 if (code == EQ && GET_CODE (op1) == SUBREG
3749 && (GET_MODE_SIZE (GET_MODE (op1))
3750 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3752 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3753 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3754 if (tem)
3755 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3756 reversed_nonequality);
3759 /* Similarly, if this is an NE comparison, and either is a SUBREG
3760 making a smaller mode, we know the whole thing is also NE. */
3762 /* Note that GET_MODE (op0) may not equal MODE;
3763 if we test MODE instead, we can get an infinite recursion
3764 alternating between two modes each wider than MODE. */
3766 if (code == NE && GET_CODE (op0) == SUBREG
3767 && subreg_lowpart_p (op0)
3768 && (GET_MODE_SIZE (GET_MODE (op0))
3769 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3771 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3772 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3773 if (tem)
3774 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3775 reversed_nonequality);
3778 if (code == NE && GET_CODE (op1) == SUBREG
3779 && subreg_lowpart_p (op1)
3780 && (GET_MODE_SIZE (GET_MODE (op1))
3781 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3783 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3784 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3785 if (tem)
3786 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3787 reversed_nonequality);
3790 /* Hash both operands. */
3792 do_not_record = 0;
3793 hash_arg_in_memory = 0;
3794 op0_hash = HASH (op0, mode);
3795 op0_in_memory = hash_arg_in_memory;
3797 if (do_not_record)
3798 return;
3800 do_not_record = 0;
3801 hash_arg_in_memory = 0;
3802 op1_hash = HASH (op1, mode);
3803 op1_in_memory = hash_arg_in_memory;
3805 if (do_not_record)
3806 return;
3808 /* Look up both operands. */
3809 op0_elt = lookup (op0, op0_hash, mode);
3810 op1_elt = lookup (op1, op1_hash, mode);
3812 /* If both operands are already equivalent or if they are not in the
3813 table but are identical, do nothing. */
3814 if ((op0_elt != 0 && op1_elt != 0
3815 && op0_elt->first_same_value == op1_elt->first_same_value)
3816 || op0 == op1 || rtx_equal_p (op0, op1))
3817 return;
3819 /* If we aren't setting two things equal all we can do is save this
3820 comparison. Similarly if this is floating-point. In the latter
3821 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3822 If we record the equality, we might inadvertently delete code
3823 whose intent was to change -0 to +0. */
3825 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
3827 struct qty_table_elem *ent;
3828 int qty;
3830 /* If we reversed a floating-point comparison, if OP0 is not a
3831 register, or if OP1 is neither a register or constant, we can't
3832 do anything. */
3834 if (!REG_P (op1))
3835 op1 = equiv_constant (op1);
3837 if ((reversed_nonequality && FLOAT_MODE_P (mode))
3838 || !REG_P (op0) || op1 == 0)
3839 return;
3841 /* Put OP0 in the hash table if it isn't already. This gives it a
3842 new quantity number. */
3843 if (op0_elt == 0)
3845 if (insert_regs (op0, NULL, 0))
3847 rehash_using_reg (op0);
3848 op0_hash = HASH (op0, mode);
3850 /* If OP0 is contained in OP1, this changes its hash code
3851 as well. Faster to rehash than to check, except
3852 for the simple case of a constant. */
3853 if (! CONSTANT_P (op1))
3854 op1_hash = HASH (op1,mode);
3857 op0_elt = insert (op0, NULL, op0_hash, mode);
3858 op0_elt->in_memory = op0_in_memory;
3861 qty = REG_QTY (REGNO (op0));
3862 ent = &qty_table[qty];
3864 ent->comparison_code = code;
3865 if (REG_P (op1))
3867 /* Look it up again--in case op0 and op1 are the same. */
3868 op1_elt = lookup (op1, op1_hash, mode);
3870 /* Put OP1 in the hash table so it gets a new quantity number. */
3871 if (op1_elt == 0)
3873 if (insert_regs (op1, NULL, 0))
3875 rehash_using_reg (op1);
3876 op1_hash = HASH (op1, mode);
3879 op1_elt = insert (op1, NULL, op1_hash, mode);
3880 op1_elt->in_memory = op1_in_memory;
3883 ent->comparison_const = NULL_RTX;
3884 ent->comparison_qty = REG_QTY (REGNO (op1));
3886 else
3888 ent->comparison_const = op1;
3889 ent->comparison_qty = -1;
3892 return;
3895 /* If either side is still missing an equivalence, make it now,
3896 then merge the equivalences. */
3898 if (op0_elt == 0)
3900 if (insert_regs (op0, NULL, 0))
3902 rehash_using_reg (op0);
3903 op0_hash = HASH (op0, mode);
3906 op0_elt = insert (op0, NULL, op0_hash, mode);
3907 op0_elt->in_memory = op0_in_memory;
3910 if (op1_elt == 0)
3912 if (insert_regs (op1, NULL, 0))
3914 rehash_using_reg (op1);
3915 op1_hash = HASH (op1, mode);
3918 op1_elt = insert (op1, NULL, op1_hash, mode);
3919 op1_elt->in_memory = op1_in_memory;
3922 merge_equiv_classes (op0_elt, op1_elt);
3925 /* CSE processing for one instruction.
3926 First simplify sources and addresses of all assignments
3927 in the instruction, using previously-computed equivalents values.
3928 Then install the new sources and destinations in the table
3929 of available values.
3931 If LIBCALL_INSN is nonzero, don't record any equivalence made in
3932 the insn. It means that INSN is inside libcall block. In this
3933 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
3935 /* Data on one SET contained in the instruction. */
3937 struct set
3939 /* The SET rtx itself. */
3940 rtx rtl;
3941 /* The SET_SRC of the rtx (the original value, if it is changing). */
3942 rtx src;
3943 /* The hash-table element for the SET_SRC of the SET. */
3944 struct table_elt *src_elt;
3945 /* Hash value for the SET_SRC. */
3946 unsigned src_hash;
3947 /* Hash value for the SET_DEST. */
3948 unsigned dest_hash;
3949 /* The SET_DEST, with SUBREG, etc., stripped. */
3950 rtx inner_dest;
3951 /* Nonzero if the SET_SRC is in memory. */
3952 char src_in_memory;
3953 /* Nonzero if the SET_SRC contains something
3954 whose value cannot be predicted and understood. */
3955 char src_volatile;
3956 /* Original machine mode, in case it becomes a CONST_INT.
3957 The size of this field should match the size of the mode
3958 field of struct rtx_def (see rtl.h). */
3959 ENUM_BITFIELD(machine_mode) mode : 8;
3960 /* A constant equivalent for SET_SRC, if any. */
3961 rtx src_const;
3962 /* Original SET_SRC value used for libcall notes. */
3963 rtx orig_src;
3964 /* Hash value of constant equivalent for SET_SRC. */
3965 unsigned src_const_hash;
3966 /* Table entry for constant equivalent for SET_SRC, if any. */
3967 struct table_elt *src_const_elt;
3968 /* Table entry for the destination address. */
3969 struct table_elt *dest_addr_elt;
3972 static void
3973 cse_insn (rtx insn, rtx libcall_insn)
3975 rtx x = PATTERN (insn);
3976 int i;
3977 rtx tem;
3978 int n_sets = 0;
3980 rtx src_eqv = 0;
3981 struct table_elt *src_eqv_elt = 0;
3982 int src_eqv_volatile = 0;
3983 int src_eqv_in_memory = 0;
3984 unsigned src_eqv_hash = 0;
3986 struct set *sets = (struct set *) 0;
3988 this_insn = insn;
3989 #ifdef HAVE_cc0
3990 /* Records what this insn does to set CC0. */
3991 this_insn_cc0 = 0;
3992 this_insn_cc0_mode = VOIDmode;
3993 #endif
3995 /* Find all the SETs and CLOBBERs in this instruction.
3996 Record all the SETs in the array `set' and count them.
3997 Also determine whether there is a CLOBBER that invalidates
3998 all memory references, or all references at varying addresses. */
4000 if (CALL_P (insn))
4002 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4004 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4005 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4006 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4010 if (GET_CODE (x) == SET)
4012 sets = alloca (sizeof (struct set));
4013 sets[0].rtl = x;
4015 /* Ignore SETs that are unconditional jumps.
4016 They never need cse processing, so this does not hurt.
4017 The reason is not efficiency but rather
4018 so that we can test at the end for instructions
4019 that have been simplified to unconditional jumps
4020 and not be misled by unchanged instructions
4021 that were unconditional jumps to begin with. */
4022 if (SET_DEST (x) == pc_rtx
4023 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4026 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4027 The hard function value register is used only once, to copy to
4028 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4029 Ensure we invalidate the destination register. On the 80386 no
4030 other code would invalidate it since it is a fixed_reg.
4031 We need not check the return of apply_change_group; see canon_reg. */
4033 else if (GET_CODE (SET_SRC (x)) == CALL)
4035 canon_reg (SET_SRC (x), insn);
4036 apply_change_group ();
4037 fold_rtx (SET_SRC (x), insn);
4038 invalidate (SET_DEST (x), VOIDmode);
4040 else
4041 n_sets = 1;
4043 else if (GET_CODE (x) == PARALLEL)
4045 int lim = XVECLEN (x, 0);
4047 sets = alloca (lim * sizeof (struct set));
4049 /* Find all regs explicitly clobbered in this insn,
4050 and ensure they are not replaced with any other regs
4051 elsewhere in this insn.
4052 When a reg that is clobbered is also used for input,
4053 we should presume that that is for a reason,
4054 and we should not substitute some other register
4055 which is not supposed to be clobbered.
4056 Therefore, this loop cannot be merged into the one below
4057 because a CALL may precede a CLOBBER and refer to the
4058 value clobbered. We must not let a canonicalization do
4059 anything in that case. */
4060 for (i = 0; i < lim; i++)
4062 rtx y = XVECEXP (x, 0, i);
4063 if (GET_CODE (y) == CLOBBER)
4065 rtx clobbered = XEXP (y, 0);
4067 if (REG_P (clobbered)
4068 || GET_CODE (clobbered) == SUBREG)
4069 invalidate (clobbered, VOIDmode);
4070 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4071 || GET_CODE (clobbered) == ZERO_EXTRACT)
4072 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4076 for (i = 0; i < lim; i++)
4078 rtx y = XVECEXP (x, 0, i);
4079 if (GET_CODE (y) == SET)
4081 /* As above, we ignore unconditional jumps and call-insns and
4082 ignore the result of apply_change_group. */
4083 if (GET_CODE (SET_SRC (y)) == CALL)
4085 canon_reg (SET_SRC (y), insn);
4086 apply_change_group ();
4087 fold_rtx (SET_SRC (y), insn);
4088 invalidate (SET_DEST (y), VOIDmode);
4090 else if (SET_DEST (y) == pc_rtx
4091 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4093 else
4094 sets[n_sets++].rtl = y;
4096 else if (GET_CODE (y) == CLOBBER)
4098 /* If we clobber memory, canon the address.
4099 This does nothing when a register is clobbered
4100 because we have already invalidated the reg. */
4101 if (MEM_P (XEXP (y, 0)))
4102 canon_reg (XEXP (y, 0), insn);
4104 else if (GET_CODE (y) == USE
4105 && ! (REG_P (XEXP (y, 0))
4106 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4107 canon_reg (y, insn);
4108 else if (GET_CODE (y) == CALL)
4110 /* The result of apply_change_group can be ignored; see
4111 canon_reg. */
4112 canon_reg (y, insn);
4113 apply_change_group ();
4114 fold_rtx (y, insn);
4118 else if (GET_CODE (x) == CLOBBER)
4120 if (MEM_P (XEXP (x, 0)))
4121 canon_reg (XEXP (x, 0), insn);
4124 /* Canonicalize a USE of a pseudo register or memory location. */
4125 else if (GET_CODE (x) == USE
4126 && ! (REG_P (XEXP (x, 0))
4127 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4128 canon_reg (XEXP (x, 0), insn);
4129 else if (GET_CODE (x) == CALL)
4131 /* The result of apply_change_group can be ignored; see canon_reg. */
4132 canon_reg (x, insn);
4133 apply_change_group ();
4134 fold_rtx (x, insn);
4137 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4138 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4139 is handled specially for this case, and if it isn't set, then there will
4140 be no equivalence for the destination. */
4141 if (n_sets == 1 && REG_NOTES (insn) != 0
4142 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4143 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4144 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4146 /* The result of apply_change_group can be ignored; see canon_reg. */
4147 canon_reg (XEXP (tem, 0), insn);
4148 apply_change_group ();
4149 src_eqv = fold_rtx (XEXP (tem, 0), insn);
4150 XEXP (tem, 0) = copy_rtx (src_eqv);
4151 df_notes_rescan (insn);
4154 /* Canonicalize sources and addresses of destinations.
4155 We do this in a separate pass to avoid problems when a MATCH_DUP is
4156 present in the insn pattern. In that case, we want to ensure that
4157 we don't break the duplicate nature of the pattern. So we will replace
4158 both operands at the same time. Otherwise, we would fail to find an
4159 equivalent substitution in the loop calling validate_change below.
4161 We used to suppress canonicalization of DEST if it appears in SRC,
4162 but we don't do this any more. */
4164 for (i = 0; i < n_sets; i++)
4166 rtx dest = SET_DEST (sets[i].rtl);
4167 rtx src = SET_SRC (sets[i].rtl);
4168 rtx new = canon_reg (src, insn);
4170 sets[i].orig_src = src;
4171 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4173 if (GET_CODE (dest) == ZERO_EXTRACT)
4175 validate_change (insn, &XEXP (dest, 1),
4176 canon_reg (XEXP (dest, 1), insn), 1);
4177 validate_change (insn, &XEXP (dest, 2),
4178 canon_reg (XEXP (dest, 2), insn), 1);
4181 while (GET_CODE (dest) == SUBREG
4182 || GET_CODE (dest) == ZERO_EXTRACT
4183 || GET_CODE (dest) == STRICT_LOW_PART)
4184 dest = XEXP (dest, 0);
4186 if (MEM_P (dest))
4187 canon_reg (dest, insn);
4190 /* Now that we have done all the replacements, we can apply the change
4191 group and see if they all work. Note that this will cause some
4192 canonicalizations that would have worked individually not to be applied
4193 because some other canonicalization didn't work, but this should not
4194 occur often.
4196 The result of apply_change_group can be ignored; see canon_reg. */
4198 apply_change_group ();
4200 /* Set sets[i].src_elt to the class each source belongs to.
4201 Detect assignments from or to volatile things
4202 and set set[i] to zero so they will be ignored
4203 in the rest of this function.
4205 Nothing in this loop changes the hash table or the register chains. */
4207 for (i = 0; i < n_sets; i++)
4209 rtx src, dest;
4210 rtx src_folded;
4211 struct table_elt *elt = 0, *p;
4212 enum machine_mode mode;
4213 rtx src_eqv_here;
4214 rtx src_const = 0;
4215 rtx src_related = 0;
4216 struct table_elt *src_const_elt = 0;
4217 int src_cost = MAX_COST;
4218 int src_eqv_cost = MAX_COST;
4219 int src_folded_cost = MAX_COST;
4220 int src_related_cost = MAX_COST;
4221 int src_elt_cost = MAX_COST;
4222 int src_regcost = MAX_COST;
4223 int src_eqv_regcost = MAX_COST;
4224 int src_folded_regcost = MAX_COST;
4225 int src_related_regcost = MAX_COST;
4226 int src_elt_regcost = MAX_COST;
4227 /* Set nonzero if we need to call force_const_mem on with the
4228 contents of src_folded before using it. */
4229 int src_folded_force_flag = 0;
4231 dest = SET_DEST (sets[i].rtl);
4232 src = SET_SRC (sets[i].rtl);
4234 /* If SRC is a constant that has no machine mode,
4235 hash it with the destination's machine mode.
4236 This way we can keep different modes separate. */
4238 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4239 sets[i].mode = mode;
4241 if (src_eqv)
4243 enum machine_mode eqvmode = mode;
4244 if (GET_CODE (dest) == STRICT_LOW_PART)
4245 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4246 do_not_record = 0;
4247 hash_arg_in_memory = 0;
4248 src_eqv_hash = HASH (src_eqv, eqvmode);
4250 /* Find the equivalence class for the equivalent expression. */
4252 if (!do_not_record)
4253 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4255 src_eqv_volatile = do_not_record;
4256 src_eqv_in_memory = hash_arg_in_memory;
4259 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4260 value of the INNER register, not the destination. So it is not
4261 a valid substitution for the source. But save it for later. */
4262 if (GET_CODE (dest) == STRICT_LOW_PART)
4263 src_eqv_here = 0;
4264 else
4265 src_eqv_here = src_eqv;
4267 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4268 simplified result, which may not necessarily be valid. */
4269 src_folded = fold_rtx (src, insn);
4271 #if 0
4272 /* ??? This caused bad code to be generated for the m68k port with -O2.
4273 Suppose src is (CONST_INT -1), and that after truncation src_folded
4274 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4275 At the end we will add src and src_const to the same equivalence
4276 class. We now have 3 and -1 on the same equivalence class. This
4277 causes later instructions to be mis-optimized. */
4278 /* If storing a constant in a bitfield, pre-truncate the constant
4279 so we will be able to record it later. */
4280 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4282 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4284 if (GET_CODE (src) == CONST_INT
4285 && GET_CODE (width) == CONST_INT
4286 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4287 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4288 src_folded
4289 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4290 << INTVAL (width)) - 1));
4292 #endif
4294 /* Compute SRC's hash code, and also notice if it
4295 should not be recorded at all. In that case,
4296 prevent any further processing of this assignment. */
4297 do_not_record = 0;
4298 hash_arg_in_memory = 0;
4300 sets[i].src = src;
4301 sets[i].src_hash = HASH (src, mode);
4302 sets[i].src_volatile = do_not_record;
4303 sets[i].src_in_memory = hash_arg_in_memory;
4305 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4306 a pseudo, do not record SRC. Using SRC as a replacement for
4307 anything else will be incorrect in that situation. Note that
4308 this usually occurs only for stack slots, in which case all the
4309 RTL would be referring to SRC, so we don't lose any optimization
4310 opportunities by not having SRC in the hash table. */
4312 if (MEM_P (src)
4313 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4314 && REG_P (dest)
4315 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4316 sets[i].src_volatile = 1;
4318 #if 0
4319 /* It is no longer clear why we used to do this, but it doesn't
4320 appear to still be needed. So let's try without it since this
4321 code hurts cse'ing widened ops. */
4322 /* If source is a paradoxical subreg (such as QI treated as an SI),
4323 treat it as volatile. It may do the work of an SI in one context
4324 where the extra bits are not being used, but cannot replace an SI
4325 in general. */
4326 if (GET_CODE (src) == SUBREG
4327 && (GET_MODE_SIZE (GET_MODE (src))
4328 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4329 sets[i].src_volatile = 1;
4330 #endif
4332 /* Locate all possible equivalent forms for SRC. Try to replace
4333 SRC in the insn with each cheaper equivalent.
4335 We have the following types of equivalents: SRC itself, a folded
4336 version, a value given in a REG_EQUAL note, or a value related
4337 to a constant.
4339 Each of these equivalents may be part of an additional class
4340 of equivalents (if more than one is in the table, they must be in
4341 the same class; we check for this).
4343 If the source is volatile, we don't do any table lookups.
4345 We note any constant equivalent for possible later use in a
4346 REG_NOTE. */
4348 if (!sets[i].src_volatile)
4349 elt = lookup (src, sets[i].src_hash, mode);
4351 sets[i].src_elt = elt;
4353 if (elt && src_eqv_here && src_eqv_elt)
4355 if (elt->first_same_value != src_eqv_elt->first_same_value)
4357 /* The REG_EQUAL is indicating that two formerly distinct
4358 classes are now equivalent. So merge them. */
4359 merge_equiv_classes (elt, src_eqv_elt);
4360 src_eqv_hash = HASH (src_eqv, elt->mode);
4361 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4364 src_eqv_here = 0;
4367 else if (src_eqv_elt)
4368 elt = src_eqv_elt;
4370 /* Try to find a constant somewhere and record it in `src_const'.
4371 Record its table element, if any, in `src_const_elt'. Look in
4372 any known equivalences first. (If the constant is not in the
4373 table, also set `sets[i].src_const_hash'). */
4374 if (elt)
4375 for (p = elt->first_same_value; p; p = p->next_same_value)
4376 if (p->is_const)
4378 src_const = p->exp;
4379 src_const_elt = elt;
4380 break;
4383 if (src_const == 0
4384 && (CONSTANT_P (src_folded)
4385 /* Consider (minus (label_ref L1) (label_ref L2)) as
4386 "constant" here so we will record it. This allows us
4387 to fold switch statements when an ADDR_DIFF_VEC is used. */
4388 || (GET_CODE (src_folded) == MINUS
4389 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4390 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4391 src_const = src_folded, src_const_elt = elt;
4392 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4393 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4395 /* If we don't know if the constant is in the table, get its
4396 hash code and look it up. */
4397 if (src_const && src_const_elt == 0)
4399 sets[i].src_const_hash = HASH (src_const, mode);
4400 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4403 sets[i].src_const = src_const;
4404 sets[i].src_const_elt = src_const_elt;
4406 /* If the constant and our source are both in the table, mark them as
4407 equivalent. Otherwise, if a constant is in the table but the source
4408 isn't, set ELT to it. */
4409 if (src_const_elt && elt
4410 && src_const_elt->first_same_value != elt->first_same_value)
4411 merge_equiv_classes (elt, src_const_elt);
4412 else if (src_const_elt && elt == 0)
4413 elt = src_const_elt;
4415 /* See if there is a register linearly related to a constant
4416 equivalent of SRC. */
4417 if (src_const
4418 && (GET_CODE (src_const) == CONST
4419 || (src_const_elt && src_const_elt->related_value != 0)))
4421 src_related = use_related_value (src_const, src_const_elt);
4422 if (src_related)
4424 struct table_elt *src_related_elt
4425 = lookup (src_related, HASH (src_related, mode), mode);
4426 if (src_related_elt && elt)
4428 if (elt->first_same_value
4429 != src_related_elt->first_same_value)
4430 /* This can occur when we previously saw a CONST
4431 involving a SYMBOL_REF and then see the SYMBOL_REF
4432 twice. Merge the involved classes. */
4433 merge_equiv_classes (elt, src_related_elt);
4435 src_related = 0;
4436 src_related_elt = 0;
4438 else if (src_related_elt && elt == 0)
4439 elt = src_related_elt;
4443 /* See if we have a CONST_INT that is already in a register in a
4444 wider mode. */
4446 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4447 && GET_MODE_CLASS (mode) == MODE_INT
4448 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4450 enum machine_mode wider_mode;
4452 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4453 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4454 && src_related == 0;
4455 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4457 struct table_elt *const_elt
4458 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4460 if (const_elt == 0)
4461 continue;
4463 for (const_elt = const_elt->first_same_value;
4464 const_elt; const_elt = const_elt->next_same_value)
4465 if (REG_P (const_elt->exp))
4467 src_related = gen_lowpart (mode, const_elt->exp);
4468 break;
4473 /* Another possibility is that we have an AND with a constant in
4474 a mode narrower than a word. If so, it might have been generated
4475 as part of an "if" which would narrow the AND. If we already
4476 have done the AND in a wider mode, we can use a SUBREG of that
4477 value. */
4479 if (flag_expensive_optimizations && ! src_related
4480 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
4481 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4483 enum machine_mode tmode;
4484 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4486 for (tmode = GET_MODE_WIDER_MODE (mode);
4487 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4488 tmode = GET_MODE_WIDER_MODE (tmode))
4490 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4491 struct table_elt *larger_elt;
4493 if (inner)
4495 PUT_MODE (new_and, tmode);
4496 XEXP (new_and, 0) = inner;
4497 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4498 if (larger_elt == 0)
4499 continue;
4501 for (larger_elt = larger_elt->first_same_value;
4502 larger_elt; larger_elt = larger_elt->next_same_value)
4503 if (REG_P (larger_elt->exp))
4505 src_related
4506 = gen_lowpart (mode, larger_elt->exp);
4507 break;
4510 if (src_related)
4511 break;
4516 #ifdef LOAD_EXTEND_OP
4517 /* See if a MEM has already been loaded with a widening operation;
4518 if it has, we can use a subreg of that. Many CISC machines
4519 also have such operations, but this is only likely to be
4520 beneficial on these machines. */
4522 if (flag_expensive_optimizations && src_related == 0
4523 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4524 && GET_MODE_CLASS (mode) == MODE_INT
4525 && MEM_P (src) && ! do_not_record
4526 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4528 struct rtx_def memory_extend_buf;
4529 rtx memory_extend_rtx = &memory_extend_buf;
4530 enum machine_mode tmode;
4532 /* Set what we are trying to extend and the operation it might
4533 have been extended with. */
4534 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
4535 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4536 XEXP (memory_extend_rtx, 0) = src;
4538 for (tmode = GET_MODE_WIDER_MODE (mode);
4539 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4540 tmode = GET_MODE_WIDER_MODE (tmode))
4542 struct table_elt *larger_elt;
4544 PUT_MODE (memory_extend_rtx, tmode);
4545 larger_elt = lookup (memory_extend_rtx,
4546 HASH (memory_extend_rtx, tmode), tmode);
4547 if (larger_elt == 0)
4548 continue;
4550 for (larger_elt = larger_elt->first_same_value;
4551 larger_elt; larger_elt = larger_elt->next_same_value)
4552 if (REG_P (larger_elt->exp))
4554 src_related = gen_lowpart (mode, larger_elt->exp);
4555 break;
4558 if (src_related)
4559 break;
4562 #endif /* LOAD_EXTEND_OP */
4564 if (src == src_folded)
4565 src_folded = 0;
4567 /* At this point, ELT, if nonzero, points to a class of expressions
4568 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4569 and SRC_RELATED, if nonzero, each contain additional equivalent
4570 expressions. Prune these latter expressions by deleting expressions
4571 already in the equivalence class.
4573 Check for an equivalent identical to the destination. If found,
4574 this is the preferred equivalent since it will likely lead to
4575 elimination of the insn. Indicate this by placing it in
4576 `src_related'. */
4578 if (elt)
4579 elt = elt->first_same_value;
4580 for (p = elt; p; p = p->next_same_value)
4582 enum rtx_code code = GET_CODE (p->exp);
4584 /* If the expression is not valid, ignore it. Then we do not
4585 have to check for validity below. In most cases, we can use
4586 `rtx_equal_p', since canonicalization has already been done. */
4587 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4588 continue;
4590 /* Also skip paradoxical subregs, unless that's what we're
4591 looking for. */
4592 if (code == SUBREG
4593 && (GET_MODE_SIZE (GET_MODE (p->exp))
4594 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
4595 && ! (src != 0
4596 && GET_CODE (src) == SUBREG
4597 && GET_MODE (src) == GET_MODE (p->exp)
4598 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4599 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4600 continue;
4602 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4603 src = 0;
4604 else if (src_folded && GET_CODE (src_folded) == code
4605 && rtx_equal_p (src_folded, p->exp))
4606 src_folded = 0;
4607 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4608 && rtx_equal_p (src_eqv_here, p->exp))
4609 src_eqv_here = 0;
4610 else if (src_related && GET_CODE (src_related) == code
4611 && rtx_equal_p (src_related, p->exp))
4612 src_related = 0;
4614 /* This is the same as the destination of the insns, we want
4615 to prefer it. Copy it to src_related. The code below will
4616 then give it a negative cost. */
4617 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4618 src_related = dest;
4621 /* Find the cheapest valid equivalent, trying all the available
4622 possibilities. Prefer items not in the hash table to ones
4623 that are when they are equal cost. Note that we can never
4624 worsen an insn as the current contents will also succeed.
4625 If we find an equivalent identical to the destination, use it as best,
4626 since this insn will probably be eliminated in that case. */
4627 if (src)
4629 if (rtx_equal_p (src, dest))
4630 src_cost = src_regcost = -1;
4631 else
4633 src_cost = COST (src);
4634 src_regcost = approx_reg_cost (src);
4638 if (src_eqv_here)
4640 if (rtx_equal_p (src_eqv_here, dest))
4641 src_eqv_cost = src_eqv_regcost = -1;
4642 else
4644 src_eqv_cost = COST (src_eqv_here);
4645 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4649 if (src_folded)
4651 if (rtx_equal_p (src_folded, dest))
4652 src_folded_cost = src_folded_regcost = -1;
4653 else
4655 src_folded_cost = COST (src_folded);
4656 src_folded_regcost = approx_reg_cost (src_folded);
4660 if (src_related)
4662 if (rtx_equal_p (src_related, dest))
4663 src_related_cost = src_related_regcost = -1;
4664 else
4666 src_related_cost = COST (src_related);
4667 src_related_regcost = approx_reg_cost (src_related);
4671 /* If this was an indirect jump insn, a known label will really be
4672 cheaper even though it looks more expensive. */
4673 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
4674 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
4676 /* Terminate loop when replacement made. This must terminate since
4677 the current contents will be tested and will always be valid. */
4678 while (1)
4680 rtx trial;
4682 /* Skip invalid entries. */
4683 while (elt && !REG_P (elt->exp)
4684 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
4685 elt = elt->next_same_value;
4687 /* A paradoxical subreg would be bad here: it'll be the right
4688 size, but later may be adjusted so that the upper bits aren't
4689 what we want. So reject it. */
4690 if (elt != 0
4691 && GET_CODE (elt->exp) == SUBREG
4692 && (GET_MODE_SIZE (GET_MODE (elt->exp))
4693 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
4694 /* It is okay, though, if the rtx we're trying to match
4695 will ignore any of the bits we can't predict. */
4696 && ! (src != 0
4697 && GET_CODE (src) == SUBREG
4698 && GET_MODE (src) == GET_MODE (elt->exp)
4699 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4700 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
4702 elt = elt->next_same_value;
4703 continue;
4706 if (elt)
4708 src_elt_cost = elt->cost;
4709 src_elt_regcost = elt->regcost;
4712 /* Find cheapest and skip it for the next time. For items
4713 of equal cost, use this order:
4714 src_folded, src, src_eqv, src_related and hash table entry. */
4715 if (src_folded
4716 && preferable (src_folded_cost, src_folded_regcost,
4717 src_cost, src_regcost) <= 0
4718 && preferable (src_folded_cost, src_folded_regcost,
4719 src_eqv_cost, src_eqv_regcost) <= 0
4720 && preferable (src_folded_cost, src_folded_regcost,
4721 src_related_cost, src_related_regcost) <= 0
4722 && preferable (src_folded_cost, src_folded_regcost,
4723 src_elt_cost, src_elt_regcost) <= 0)
4725 trial = src_folded, src_folded_cost = MAX_COST;
4726 if (src_folded_force_flag)
4728 rtx forced = force_const_mem (mode, trial);
4729 if (forced)
4730 trial = forced;
4733 else if (src
4734 && preferable (src_cost, src_regcost,
4735 src_eqv_cost, src_eqv_regcost) <= 0
4736 && preferable (src_cost, src_regcost,
4737 src_related_cost, src_related_regcost) <= 0
4738 && preferable (src_cost, src_regcost,
4739 src_elt_cost, src_elt_regcost) <= 0)
4740 trial = src, src_cost = MAX_COST;
4741 else if (src_eqv_here
4742 && preferable (src_eqv_cost, src_eqv_regcost,
4743 src_related_cost, src_related_regcost) <= 0
4744 && preferable (src_eqv_cost, src_eqv_regcost,
4745 src_elt_cost, src_elt_regcost) <= 0)
4746 trial = src_eqv_here, src_eqv_cost = MAX_COST;
4747 else if (src_related
4748 && preferable (src_related_cost, src_related_regcost,
4749 src_elt_cost, src_elt_regcost) <= 0)
4750 trial = src_related, src_related_cost = MAX_COST;
4751 else
4753 trial = elt->exp;
4754 elt = elt->next_same_value;
4755 src_elt_cost = MAX_COST;
4758 /* Avoid creation of overlapping memory moves. */
4759 if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
4761 rtx src, dest;
4763 /* BLKmode moves are not handled by cse anyway. */
4764 if (GET_MODE (trial) == BLKmode)
4765 break;
4767 src = canon_rtx (trial);
4768 dest = canon_rtx (SET_DEST (sets[i].rtl));
4770 if (!MEM_P (src) || !MEM_P (dest)
4771 || !nonoverlapping_memrefs_p (src, dest))
4772 break;
4775 /* We don't normally have an insn matching (set (pc) (pc)), so
4776 check for this separately here. We will delete such an
4777 insn below.
4779 For other cases such as a table jump or conditional jump
4780 where we know the ultimate target, go ahead and replace the
4781 operand. While that may not make a valid insn, we will
4782 reemit the jump below (and also insert any necessary
4783 barriers). */
4784 if (n_sets == 1 && dest == pc_rtx
4785 && (trial == pc_rtx
4786 || (GET_CODE (trial) == LABEL_REF
4787 && ! condjump_p (insn))))
4789 /* Don't substitute non-local labels, this confuses CFG. */
4790 if (GET_CODE (trial) == LABEL_REF
4791 && LABEL_REF_NONLOCAL_P (trial))
4792 continue;
4794 SET_SRC (sets[i].rtl) = trial;
4795 cse_jumps_altered = true;
4796 break;
4799 /* Reject certain invalid forms of CONST that we create. */
4800 else if (CONSTANT_P (trial)
4801 && GET_CODE (trial) == CONST
4802 /* Reject cases that will cause decode_rtx_const to
4803 die. On the alpha when simplifying a switch, we
4804 get (const (truncate (minus (label_ref)
4805 (label_ref)))). */
4806 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
4807 /* Likewise on IA-64, except without the
4808 truncate. */
4809 || (GET_CODE (XEXP (trial, 0)) == MINUS
4810 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
4811 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
4812 /* Do nothing for this case. */
4815 /* Look for a substitution that makes a valid insn. */
4816 else if (validate_unshare_change
4817 (insn, &SET_SRC (sets[i].rtl), trial, 0))
4819 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
4821 /* If we just made a substitution inside a libcall, then we
4822 need to make the same substitution in any notes attached
4823 to the RETVAL insn. */
4824 if (libcall_insn
4825 && (REG_P (sets[i].orig_src)
4826 || GET_CODE (sets[i].orig_src) == SUBREG
4827 || MEM_P (sets[i].orig_src)))
4829 rtx note = find_reg_equal_equiv_note (libcall_insn);
4830 if (note != 0)
4831 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
4832 sets[i].orig_src,
4833 copy_rtx (new));
4834 df_notes_rescan (libcall_insn);
4837 /* The result of apply_change_group can be ignored; see
4838 canon_reg. */
4840 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4841 apply_change_group ();
4843 break;
4846 /* If we previously found constant pool entries for
4847 constants and this is a constant, try making a
4848 pool entry. Put it in src_folded unless we already have done
4849 this since that is where it likely came from. */
4851 else if (constant_pool_entries_cost
4852 && CONSTANT_P (trial)
4853 && (src_folded == 0
4854 || (!MEM_P (src_folded)
4855 && ! src_folded_force_flag))
4856 && GET_MODE_CLASS (mode) != MODE_CC
4857 && mode != VOIDmode)
4859 src_folded_force_flag = 1;
4860 src_folded = trial;
4861 src_folded_cost = constant_pool_entries_cost;
4862 src_folded_regcost = constant_pool_entries_regcost;
4866 src = SET_SRC (sets[i].rtl);
4868 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
4869 However, there is an important exception: If both are registers
4870 that are not the head of their equivalence class, replace SET_SRC
4871 with the head of the class. If we do not do this, we will have
4872 both registers live over a portion of the basic block. This way,
4873 their lifetimes will likely abut instead of overlapping. */
4874 if (REG_P (dest)
4875 && REGNO_QTY_VALID_P (REGNO (dest)))
4877 int dest_q = REG_QTY (REGNO (dest));
4878 struct qty_table_elem *dest_ent = &qty_table[dest_q];
4880 if (dest_ent->mode == GET_MODE (dest)
4881 && dest_ent->first_reg != REGNO (dest)
4882 && REG_P (src) && REGNO (src) == REGNO (dest)
4883 /* Don't do this if the original insn had a hard reg as
4884 SET_SRC or SET_DEST. */
4885 && (!REG_P (sets[i].src)
4886 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
4887 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
4888 /* We can't call canon_reg here because it won't do anything if
4889 SRC is a hard register. */
4891 int src_q = REG_QTY (REGNO (src));
4892 struct qty_table_elem *src_ent = &qty_table[src_q];
4893 int first = src_ent->first_reg;
4894 rtx new_src
4895 = (first >= FIRST_PSEUDO_REGISTER
4896 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
4898 /* We must use validate-change even for this, because this
4899 might be a special no-op instruction, suitable only to
4900 tag notes onto. */
4901 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
4903 src = new_src;
4904 /* If we had a constant that is cheaper than what we are now
4905 setting SRC to, use that constant. We ignored it when we
4906 thought we could make this into a no-op. */
4907 if (src_const && COST (src_const) < COST (src)
4908 && validate_change (insn, &SET_SRC (sets[i].rtl),
4909 src_const, 0))
4910 src = src_const;
4915 /* If we made a change, recompute SRC values. */
4916 if (src != sets[i].src)
4918 do_not_record = 0;
4919 hash_arg_in_memory = 0;
4920 sets[i].src = src;
4921 sets[i].src_hash = HASH (src, mode);
4922 sets[i].src_volatile = do_not_record;
4923 sets[i].src_in_memory = hash_arg_in_memory;
4924 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
4927 /* If this is a single SET, we are setting a register, and we have an
4928 equivalent constant, we want to add a REG_NOTE. We don't want
4929 to write a REG_EQUAL note for a constant pseudo since verifying that
4930 that pseudo hasn't been eliminated is a pain. Such a note also
4931 won't help anything.
4933 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
4934 which can be created for a reference to a compile time computable
4935 entry in a jump table. */
4937 if (n_sets == 1 && src_const && REG_P (dest)
4938 && !REG_P (src_const)
4939 && ! (GET_CODE (src_const) == CONST
4940 && GET_CODE (XEXP (src_const, 0)) == MINUS
4941 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
4942 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
4944 /* We only want a REG_EQUAL note if src_const != src. */
4945 if (! rtx_equal_p (src, src_const))
4947 /* Make sure that the rtx is not shared. */
4948 src_const = copy_rtx (src_const);
4950 /* Record the actual constant value in a REG_EQUAL note,
4951 making a new one if one does not already exist. */
4952 set_unique_reg_note (insn, REG_EQUAL, src_const);
4953 df_notes_rescan (insn);
4957 /* Now deal with the destination. */
4958 do_not_record = 0;
4960 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
4961 while (GET_CODE (dest) == SUBREG
4962 || GET_CODE (dest) == ZERO_EXTRACT
4963 || GET_CODE (dest) == STRICT_LOW_PART)
4964 dest = XEXP (dest, 0);
4966 sets[i].inner_dest = dest;
4968 if (MEM_P (dest))
4970 #ifdef PUSH_ROUNDING
4971 /* Stack pushes invalidate the stack pointer. */
4972 rtx addr = XEXP (dest, 0);
4973 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
4974 && XEXP (addr, 0) == stack_pointer_rtx)
4975 invalidate (stack_pointer_rtx, VOIDmode);
4976 #endif
4977 dest = fold_rtx (dest, insn);
4980 /* Compute the hash code of the destination now,
4981 before the effects of this instruction are recorded,
4982 since the register values used in the address computation
4983 are those before this instruction. */
4984 sets[i].dest_hash = HASH (dest, mode);
4986 /* Don't enter a bit-field in the hash table
4987 because the value in it after the store
4988 may not equal what was stored, due to truncation. */
4990 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4992 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4994 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
4995 && GET_CODE (width) == CONST_INT
4996 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4997 && ! (INTVAL (src_const)
4998 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4999 /* Exception: if the value is constant,
5000 and it won't be truncated, record it. */
5002 else
5004 /* This is chosen so that the destination will be invalidated
5005 but no new value will be recorded.
5006 We must invalidate because sometimes constant
5007 values can be recorded for bitfields. */
5008 sets[i].src_elt = 0;
5009 sets[i].src_volatile = 1;
5010 src_eqv = 0;
5011 src_eqv_elt = 0;
5015 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5016 the insn. */
5017 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5019 /* One less use of the label this insn used to jump to. */
5020 delete_insn_and_edges (insn);
5021 cse_jumps_altered = true;
5022 /* No more processing for this set. */
5023 sets[i].rtl = 0;
5026 /* If this SET is now setting PC to a label, we know it used to
5027 be a conditional or computed branch. */
5028 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5029 && !LABEL_REF_NONLOCAL_P (src))
5031 /* We reemit the jump in as many cases as possible just in
5032 case the form of an unconditional jump is significantly
5033 different than a computed jump or conditional jump.
5035 If this insn has multiple sets, then reemitting the
5036 jump is nontrivial. So instead we just force rerecognition
5037 and hope for the best. */
5038 if (n_sets == 1)
5040 rtx new, note;
5042 new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5043 JUMP_LABEL (new) = XEXP (src, 0);
5044 LABEL_NUSES (XEXP (src, 0))++;
5046 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5047 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5048 if (note)
5050 XEXP (note, 1) = NULL_RTX;
5051 REG_NOTES (new) = note;
5054 delete_insn_and_edges (insn);
5055 insn = new;
5057 else
5058 INSN_CODE (insn) = -1;
5060 /* Do not bother deleting any unreachable code, let jump do it. */
5061 cse_jumps_altered = true;
5062 sets[i].rtl = 0;
5065 /* If destination is volatile, invalidate it and then do no further
5066 processing for this assignment. */
5068 else if (do_not_record)
5070 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5071 invalidate (dest, VOIDmode);
5072 else if (MEM_P (dest))
5073 invalidate (dest, VOIDmode);
5074 else if (GET_CODE (dest) == STRICT_LOW_PART
5075 || GET_CODE (dest) == ZERO_EXTRACT)
5076 invalidate (XEXP (dest, 0), GET_MODE (dest));
5077 sets[i].rtl = 0;
5080 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5081 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5083 #ifdef HAVE_cc0
5084 /* If setting CC0, record what it was set to, or a constant, if it
5085 is equivalent to a constant. If it is being set to a floating-point
5086 value, make a COMPARE with the appropriate constant of 0. If we
5087 don't do this, later code can interpret this as a test against
5088 const0_rtx, which can cause problems if we try to put it into an
5089 insn as a floating-point operand. */
5090 if (dest == cc0_rtx)
5092 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5093 this_insn_cc0_mode = mode;
5094 if (FLOAT_MODE_P (mode))
5095 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5096 CONST0_RTX (mode));
5098 #endif
5101 /* Now enter all non-volatile source expressions in the hash table
5102 if they are not already present.
5103 Record their equivalence classes in src_elt.
5104 This way we can insert the corresponding destinations into
5105 the same classes even if the actual sources are no longer in them
5106 (having been invalidated). */
5108 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5109 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5111 struct table_elt *elt;
5112 struct table_elt *classp = sets[0].src_elt;
5113 rtx dest = SET_DEST (sets[0].rtl);
5114 enum machine_mode eqvmode = GET_MODE (dest);
5116 if (GET_CODE (dest) == STRICT_LOW_PART)
5118 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5119 classp = 0;
5121 if (insert_regs (src_eqv, classp, 0))
5123 rehash_using_reg (src_eqv);
5124 src_eqv_hash = HASH (src_eqv, eqvmode);
5126 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5127 elt->in_memory = src_eqv_in_memory;
5128 src_eqv_elt = elt;
5130 /* Check to see if src_eqv_elt is the same as a set source which
5131 does not yet have an elt, and if so set the elt of the set source
5132 to src_eqv_elt. */
5133 for (i = 0; i < n_sets; i++)
5134 if (sets[i].rtl && sets[i].src_elt == 0
5135 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5136 sets[i].src_elt = src_eqv_elt;
5139 for (i = 0; i < n_sets; i++)
5140 if (sets[i].rtl && ! sets[i].src_volatile
5141 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5143 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5145 /* REG_EQUAL in setting a STRICT_LOW_PART
5146 gives an equivalent for the entire destination register,
5147 not just for the subreg being stored in now.
5148 This is a more interesting equivalence, so we arrange later
5149 to treat the entire reg as the destination. */
5150 sets[i].src_elt = src_eqv_elt;
5151 sets[i].src_hash = src_eqv_hash;
5153 else
5155 /* Insert source and constant equivalent into hash table, if not
5156 already present. */
5157 struct table_elt *classp = src_eqv_elt;
5158 rtx src = sets[i].src;
5159 rtx dest = SET_DEST (sets[i].rtl);
5160 enum machine_mode mode
5161 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5163 /* It's possible that we have a source value known to be
5164 constant but don't have a REG_EQUAL note on the insn.
5165 Lack of a note will mean src_eqv_elt will be NULL. This
5166 can happen where we've generated a SUBREG to access a
5167 CONST_INT that is already in a register in a wider mode.
5168 Ensure that the source expression is put in the proper
5169 constant class. */
5170 if (!classp)
5171 classp = sets[i].src_const_elt;
5173 if (sets[i].src_elt == 0)
5175 /* Don't put a hard register source into the table if this is
5176 the last insn of a libcall. In this case, we only need
5177 to put src_eqv_elt in src_elt. */
5178 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5180 struct table_elt *elt;
5182 /* Note that these insert_regs calls cannot remove
5183 any of the src_elt's, because they would have failed to
5184 match if not still valid. */
5185 if (insert_regs (src, classp, 0))
5187 rehash_using_reg (src);
5188 sets[i].src_hash = HASH (src, mode);
5190 elt = insert (src, classp, sets[i].src_hash, mode);
5191 elt->in_memory = sets[i].src_in_memory;
5192 sets[i].src_elt = classp = elt;
5194 else
5195 sets[i].src_elt = classp;
5197 if (sets[i].src_const && sets[i].src_const_elt == 0
5198 && src != sets[i].src_const
5199 && ! rtx_equal_p (sets[i].src_const, src))
5200 sets[i].src_elt = insert (sets[i].src_const, classp,
5201 sets[i].src_const_hash, mode);
5204 else if (sets[i].src_elt == 0)
5205 /* If we did not insert the source into the hash table (e.g., it was
5206 volatile), note the equivalence class for the REG_EQUAL value, if any,
5207 so that the destination goes into that class. */
5208 sets[i].src_elt = src_eqv_elt;
5210 /* Record destination addresses in the hash table. This allows us to
5211 check if they are invalidated by other sets. */
5212 for (i = 0; i < n_sets; i++)
5214 if (sets[i].rtl)
5216 rtx x = sets[i].inner_dest;
5217 struct table_elt *elt;
5218 enum machine_mode mode;
5219 unsigned hash;
5221 if (MEM_P (x))
5223 x = XEXP (x, 0);
5224 mode = GET_MODE (x);
5225 hash = HASH (x, mode);
5226 elt = lookup (x, hash, mode);
5227 if (!elt)
5229 if (insert_regs (x, NULL, 0))
5231 rtx dest = SET_DEST (sets[i].rtl);
5233 rehash_using_reg (x);
5234 hash = HASH (x, mode);
5235 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5237 elt = insert (x, NULL, hash, mode);
5240 sets[i].dest_addr_elt = elt;
5242 else
5243 sets[i].dest_addr_elt = NULL;
5247 invalidate_from_clobbers (x);
5249 /* Some registers are invalidated by subroutine calls. Memory is
5250 invalidated by non-constant calls. */
5252 if (CALL_P (insn))
5254 if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5255 invalidate_memory ();
5256 invalidate_for_call (insn);
5259 /* Now invalidate everything set by this instruction.
5260 If a SUBREG or other funny destination is being set,
5261 sets[i].rtl is still nonzero, so here we invalidate the reg
5262 a part of which is being set. */
5264 for (i = 0; i < n_sets; i++)
5265 if (sets[i].rtl)
5267 /* We can't use the inner dest, because the mode associated with
5268 a ZERO_EXTRACT is significant. */
5269 rtx dest = SET_DEST (sets[i].rtl);
5271 /* Needed for registers to remove the register from its
5272 previous quantity's chain.
5273 Needed for memory if this is a nonvarying address, unless
5274 we have just done an invalidate_memory that covers even those. */
5275 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5276 invalidate (dest, VOIDmode);
5277 else if (MEM_P (dest))
5278 invalidate (dest, VOIDmode);
5279 else if (GET_CODE (dest) == STRICT_LOW_PART
5280 || GET_CODE (dest) == ZERO_EXTRACT)
5281 invalidate (XEXP (dest, 0), GET_MODE (dest));
5284 /* A volatile ASM invalidates everything. */
5285 if (NONJUMP_INSN_P (insn)
5286 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5287 && MEM_VOLATILE_P (PATTERN (insn)))
5288 flush_hash_table ();
5290 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5291 the regs restored by the longjmp come from a later time
5292 than the setjmp. */
5293 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5295 flush_hash_table ();
5296 goto done;
5299 /* Make sure registers mentioned in destinations
5300 are safe for use in an expression to be inserted.
5301 This removes from the hash table
5302 any invalid entry that refers to one of these registers.
5304 We don't care about the return value from mention_regs because
5305 we are going to hash the SET_DEST values unconditionally. */
5307 for (i = 0; i < n_sets; i++)
5309 if (sets[i].rtl)
5311 rtx x = SET_DEST (sets[i].rtl);
5313 if (!REG_P (x))
5314 mention_regs (x);
5315 else
5317 /* We used to rely on all references to a register becoming
5318 inaccessible when a register changes to a new quantity,
5319 since that changes the hash code. However, that is not
5320 safe, since after HASH_SIZE new quantities we get a
5321 hash 'collision' of a register with its own invalid
5322 entries. And since SUBREGs have been changed not to
5323 change their hash code with the hash code of the register,
5324 it wouldn't work any longer at all. So we have to check
5325 for any invalid references lying around now.
5326 This code is similar to the REG case in mention_regs,
5327 but it knows that reg_tick has been incremented, and
5328 it leaves reg_in_table as -1 . */
5329 unsigned int regno = REGNO (x);
5330 unsigned int endregno = END_REGNO (x);
5331 unsigned int i;
5333 for (i = regno; i < endregno; i++)
5335 if (REG_IN_TABLE (i) >= 0)
5337 remove_invalid_refs (i);
5338 REG_IN_TABLE (i) = -1;
5345 /* We may have just removed some of the src_elt's from the hash table.
5346 So replace each one with the current head of the same class.
5347 Also check if destination addresses have been removed. */
5349 for (i = 0; i < n_sets; i++)
5350 if (sets[i].rtl)
5352 if (sets[i].dest_addr_elt
5353 && sets[i].dest_addr_elt->first_same_value == 0)
5355 /* The elt was removed, which means this destination is not
5356 valid after this instruction. */
5357 sets[i].rtl = NULL_RTX;
5359 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5360 /* If elt was removed, find current head of same class,
5361 or 0 if nothing remains of that class. */
5363 struct table_elt *elt = sets[i].src_elt;
5365 while (elt && elt->prev_same_value)
5366 elt = elt->prev_same_value;
5368 while (elt && elt->first_same_value == 0)
5369 elt = elt->next_same_value;
5370 sets[i].src_elt = elt ? elt->first_same_value : 0;
5374 /* Now insert the destinations into their equivalence classes. */
5376 for (i = 0; i < n_sets; i++)
5377 if (sets[i].rtl)
5379 rtx dest = SET_DEST (sets[i].rtl);
5380 struct table_elt *elt;
5382 /* Don't record value if we are not supposed to risk allocating
5383 floating-point values in registers that might be wider than
5384 memory. */
5385 if ((flag_float_store
5386 && MEM_P (dest)
5387 && FLOAT_MODE_P (GET_MODE (dest)))
5388 /* Don't record BLKmode values, because we don't know the
5389 size of it, and can't be sure that other BLKmode values
5390 have the same or smaller size. */
5391 || GET_MODE (dest) == BLKmode
5392 /* Don't record values of destinations set inside a libcall block
5393 since we might delete the libcall. Things should have been set
5394 up so we won't want to reuse such a value, but we play it safe
5395 here. */
5396 || libcall_insn
5397 /* If we didn't put a REG_EQUAL value or a source into the hash
5398 table, there is no point is recording DEST. */
5399 || sets[i].src_elt == 0
5400 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5401 or SIGN_EXTEND, don't record DEST since it can cause
5402 some tracking to be wrong.
5404 ??? Think about this more later. */
5405 || (GET_CODE (dest) == SUBREG
5406 && (GET_MODE_SIZE (GET_MODE (dest))
5407 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5408 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5409 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5410 continue;
5412 /* STRICT_LOW_PART isn't part of the value BEING set,
5413 and neither is the SUBREG inside it.
5414 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5415 if (GET_CODE (dest) == STRICT_LOW_PART)
5416 dest = SUBREG_REG (XEXP (dest, 0));
5418 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5419 /* Registers must also be inserted into chains for quantities. */
5420 if (insert_regs (dest, sets[i].src_elt, 1))
5422 /* If `insert_regs' changes something, the hash code must be
5423 recalculated. */
5424 rehash_using_reg (dest);
5425 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5428 elt = insert (dest, sets[i].src_elt,
5429 sets[i].dest_hash, GET_MODE (dest));
5431 elt->in_memory = (MEM_P (sets[i].inner_dest)
5432 && !MEM_READONLY_P (sets[i].inner_dest));
5434 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5435 narrower than M2, and both M1 and M2 are the same number of words,
5436 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5437 make that equivalence as well.
5439 However, BAR may have equivalences for which gen_lowpart
5440 will produce a simpler value than gen_lowpart applied to
5441 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5442 BAR's equivalences. If we don't get a simplified form, make
5443 the SUBREG. It will not be used in an equivalence, but will
5444 cause two similar assignments to be detected.
5446 Note the loop below will find SUBREG_REG (DEST) since we have
5447 already entered SRC and DEST of the SET in the table. */
5449 if (GET_CODE (dest) == SUBREG
5450 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5451 / UNITS_PER_WORD)
5452 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5453 && (GET_MODE_SIZE (GET_MODE (dest))
5454 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5455 && sets[i].src_elt != 0)
5457 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5458 struct table_elt *elt, *classp = 0;
5460 for (elt = sets[i].src_elt->first_same_value; elt;
5461 elt = elt->next_same_value)
5463 rtx new_src = 0;
5464 unsigned src_hash;
5465 struct table_elt *src_elt;
5466 int byte = 0;
5468 /* Ignore invalid entries. */
5469 if (!REG_P (elt->exp)
5470 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5471 continue;
5473 /* We may have already been playing subreg games. If the
5474 mode is already correct for the destination, use it. */
5475 if (GET_MODE (elt->exp) == new_mode)
5476 new_src = elt->exp;
5477 else
5479 /* Calculate big endian correction for the SUBREG_BYTE.
5480 We have already checked that M1 (GET_MODE (dest))
5481 is not narrower than M2 (new_mode). */
5482 if (BYTES_BIG_ENDIAN)
5483 byte = (GET_MODE_SIZE (GET_MODE (dest))
5484 - GET_MODE_SIZE (new_mode));
5486 new_src = simplify_gen_subreg (new_mode, elt->exp,
5487 GET_MODE (dest), byte);
5490 /* The call to simplify_gen_subreg fails if the value
5491 is VOIDmode, yet we can't do any simplification, e.g.
5492 for EXPR_LISTs denoting function call results.
5493 It is invalid to construct a SUBREG with a VOIDmode
5494 SUBREG_REG, hence a zero new_src means we can't do
5495 this substitution. */
5496 if (! new_src)
5497 continue;
5499 src_hash = HASH (new_src, new_mode);
5500 src_elt = lookup (new_src, src_hash, new_mode);
5502 /* Put the new source in the hash table is if isn't
5503 already. */
5504 if (src_elt == 0)
5506 if (insert_regs (new_src, classp, 0))
5508 rehash_using_reg (new_src);
5509 src_hash = HASH (new_src, new_mode);
5511 src_elt = insert (new_src, classp, src_hash, new_mode);
5512 src_elt->in_memory = elt->in_memory;
5514 else if (classp && classp != src_elt->first_same_value)
5515 /* Show that two things that we've seen before are
5516 actually the same. */
5517 merge_equiv_classes (src_elt, classp);
5519 classp = src_elt->first_same_value;
5520 /* Ignore invalid entries. */
5521 while (classp
5522 && !REG_P (classp->exp)
5523 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5524 classp = classp->next_same_value;
5529 /* Special handling for (set REG0 REG1) where REG0 is the
5530 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5531 be used in the sequel, so (if easily done) change this insn to
5532 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5533 that computed their value. Then REG1 will become a dead store
5534 and won't cloud the situation for later optimizations.
5536 Do not make this change if REG1 is a hard register, because it will
5537 then be used in the sequel and we may be changing a two-operand insn
5538 into a three-operand insn.
5540 Also do not do this if we are operating on a copy of INSN.
5542 Also don't do this if INSN ends a libcall; this would cause an unrelated
5543 register to be set in the middle of a libcall, and we then get bad code
5544 if the libcall is deleted. */
5546 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
5547 && NEXT_INSN (PREV_INSN (insn)) == insn
5548 && REG_P (SET_SRC (sets[0].rtl))
5549 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5550 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5552 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5553 struct qty_table_elem *src_ent = &qty_table[src_q];
5555 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5556 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5558 /* Scan for the previous nonnote insn, but stop at a basic
5559 block boundary. */
5560 rtx prev = insn;
5561 rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
5564 prev = PREV_INSN (prev);
5566 while (prev != bb_head && NOTE_P (prev));
5568 /* Do not swap the registers around if the previous instruction
5569 attaches a REG_EQUIV note to REG1.
5571 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5572 from the pseudo that originally shadowed an incoming argument
5573 to another register. Some uses of REG_EQUIV might rely on it
5574 being attached to REG1 rather than REG2.
5576 This section previously turned the REG_EQUIV into a REG_EQUAL
5577 note. We cannot do that because REG_EQUIV may provide an
5578 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5579 if (NONJUMP_INSN_P (prev)
5580 && GET_CODE (PATTERN (prev)) == SET
5581 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
5582 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
5584 rtx dest = SET_DEST (sets[0].rtl);
5585 rtx src = SET_SRC (sets[0].rtl);
5586 rtx note;
5588 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
5589 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
5590 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
5591 apply_change_group ();
5593 /* If INSN has a REG_EQUAL note, and this note mentions
5594 REG0, then we must delete it, because the value in
5595 REG0 has changed. If the note's value is REG1, we must
5596 also delete it because that is now this insn's dest. */
5597 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5598 if (note != 0
5599 && (reg_mentioned_p (dest, XEXP (note, 0))
5600 || rtx_equal_p (src, XEXP (note, 0))))
5601 remove_note (insn, note);
5606 done:;
5609 /* Remove from the hash table all expressions that reference memory. */
5611 static void
5612 invalidate_memory (void)
5614 int i;
5615 struct table_elt *p, *next;
5617 for (i = 0; i < HASH_SIZE; i++)
5618 for (p = table[i]; p; p = next)
5620 next = p->next_same_hash;
5621 if (p->in_memory)
5622 remove_from_table (p, i);
5626 /* Perform invalidation on the basis of everything about an insn
5627 except for invalidating the actual places that are SET in it.
5628 This includes the places CLOBBERed, and anything that might
5629 alias with something that is SET or CLOBBERed.
5631 X is the pattern of the insn. */
5633 static void
5634 invalidate_from_clobbers (rtx x)
5636 if (GET_CODE (x) == CLOBBER)
5638 rtx ref = XEXP (x, 0);
5639 if (ref)
5641 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5642 || MEM_P (ref))
5643 invalidate (ref, VOIDmode);
5644 else if (GET_CODE (ref) == STRICT_LOW_PART
5645 || GET_CODE (ref) == ZERO_EXTRACT)
5646 invalidate (XEXP (ref, 0), GET_MODE (ref));
5649 else if (GET_CODE (x) == PARALLEL)
5651 int i;
5652 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5654 rtx y = XVECEXP (x, 0, i);
5655 if (GET_CODE (y) == CLOBBER)
5657 rtx ref = XEXP (y, 0);
5658 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5659 || MEM_P (ref))
5660 invalidate (ref, VOIDmode);
5661 else if (GET_CODE (ref) == STRICT_LOW_PART
5662 || GET_CODE (ref) == ZERO_EXTRACT)
5663 invalidate (XEXP (ref, 0), GET_MODE (ref));
5669 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5670 and replace any registers in them with either an equivalent constant
5671 or the canonical form of the register. If we are inside an address,
5672 only do this if the address remains valid.
5674 OBJECT is 0 except when within a MEM in which case it is the MEM.
5676 Return the replacement for X. */
5678 static rtx
5679 cse_process_notes_1 (rtx x, rtx object, bool *changed)
5681 enum rtx_code code = GET_CODE (x);
5682 const char *fmt = GET_RTX_FORMAT (code);
5683 int i;
5685 switch (code)
5687 case CONST_INT:
5688 case CONST:
5689 case SYMBOL_REF:
5690 case LABEL_REF:
5691 case CONST_DOUBLE:
5692 case CONST_FIXED:
5693 case CONST_VECTOR:
5694 case PC:
5695 case CC0:
5696 case LO_SUM:
5697 return x;
5699 case MEM:
5700 validate_change (x, &XEXP (x, 0),
5701 cse_process_notes (XEXP (x, 0), x, changed), 0);
5702 return x;
5704 case EXPR_LIST:
5705 case INSN_LIST:
5706 if (REG_NOTE_KIND (x) == REG_EQUAL)
5707 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
5708 if (XEXP (x, 1))
5709 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
5710 return x;
5712 case SIGN_EXTEND:
5713 case ZERO_EXTEND:
5714 case SUBREG:
5716 rtx new = cse_process_notes (XEXP (x, 0), object, changed);
5717 /* We don't substitute VOIDmode constants into these rtx,
5718 since they would impede folding. */
5719 if (GET_MODE (new) != VOIDmode)
5720 validate_change (object, &XEXP (x, 0), new, 0);
5721 return x;
5724 case REG:
5725 i = REG_QTY (REGNO (x));
5727 /* Return a constant or a constant register. */
5728 if (REGNO_QTY_VALID_P (REGNO (x)))
5730 struct qty_table_elem *ent = &qty_table[i];
5732 if (ent->const_rtx != NULL_RTX
5733 && (CONSTANT_P (ent->const_rtx)
5734 || REG_P (ent->const_rtx)))
5736 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
5737 if (new)
5738 return copy_rtx (new);
5742 /* Otherwise, canonicalize this register. */
5743 return canon_reg (x, NULL_RTX);
5745 default:
5746 break;
5749 for (i = 0; i < GET_RTX_LENGTH (code); i++)
5750 if (fmt[i] == 'e')
5751 validate_change (object, &XEXP (x, i),
5752 cse_process_notes (XEXP (x, i), object, changed), 0);
5754 return x;
5757 static rtx
5758 cse_process_notes (rtx x, rtx object, bool *changed)
5760 rtx new = cse_process_notes_1 (x, object, changed);
5761 if (new != x)
5762 *changed = true;
5763 return new;
5767 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
5769 DATA is a pointer to a struct cse_basic_block_data, that is used to
5770 describe the path.
5771 It is filled with a queue of basic blocks, starting with FIRST_BB
5772 and following a trace through the CFG.
5774 If all paths starting at FIRST_BB have been followed, or no new path
5775 starting at FIRST_BB can be constructed, this function returns FALSE.
5776 Otherwise, DATA->path is filled and the function returns TRUE indicating
5777 that a path to follow was found.
5779 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
5780 block in the path will be FIRST_BB. */
5782 static bool
5783 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
5784 int follow_jumps)
5786 basic_block bb;
5787 edge e;
5788 int path_size;
5790 SET_BIT (cse_visited_basic_blocks, first_bb->index);
5792 /* See if there is a previous path. */
5793 path_size = data->path_size;
5795 /* There is a previous path. Make sure it started with FIRST_BB. */
5796 if (path_size)
5797 gcc_assert (data->path[0].bb == first_bb);
5799 /* There was only one basic block in the last path. Clear the path and
5800 return, so that paths starting at another basic block can be tried. */
5801 if (path_size == 1)
5803 path_size = 0;
5804 goto done;
5807 /* If the path was empty from the beginning, construct a new path. */
5808 if (path_size == 0)
5809 data->path[path_size++].bb = first_bb;
5810 else
5812 /* Otherwise, path_size must be equal to or greater than 2, because
5813 a previous path exists that is at least two basic blocks long.
5815 Update the previous branch path, if any. If the last branch was
5816 previously along the branch edge, take the fallthrough edge now. */
5817 while (path_size >= 2)
5819 basic_block last_bb_in_path, previous_bb_in_path;
5820 edge e;
5822 --path_size;
5823 last_bb_in_path = data->path[path_size].bb;
5824 previous_bb_in_path = data->path[path_size - 1].bb;
5826 /* If we previously followed a path along the branch edge, try
5827 the fallthru edge now. */
5828 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
5829 && any_condjump_p (BB_END (previous_bb_in_path))
5830 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
5831 && e == BRANCH_EDGE (previous_bb_in_path))
5833 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
5834 if (bb != EXIT_BLOCK_PTR
5835 && single_pred_p (bb)
5836 /* We used to assert here that we would only see blocks
5837 that we have not visited yet. But we may end up
5838 visiting basic blocks twice if the CFG has changed
5839 in this run of cse_main, because when the CFG changes
5840 the topological sort of the CFG also changes. A basic
5841 blocks that previously had more than two predecessors
5842 may now have a single predecessor, and become part of
5843 a path that starts at another basic block.
5845 We still want to visit each basic block only once, so
5846 halt the path here if we have already visited BB. */
5847 && !TEST_BIT (cse_visited_basic_blocks, bb->index))
5849 SET_BIT (cse_visited_basic_blocks, bb->index);
5850 data->path[path_size++].bb = bb;
5851 break;
5855 data->path[path_size].bb = NULL;
5858 /* If only one block remains in the path, bail. */
5859 if (path_size == 1)
5861 path_size = 0;
5862 goto done;
5866 /* Extend the path if possible. */
5867 if (follow_jumps)
5869 bb = data->path[path_size - 1].bb;
5870 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
5872 if (single_succ_p (bb))
5873 e = single_succ_edge (bb);
5874 else if (EDGE_COUNT (bb->succs) == 2
5875 && any_condjump_p (BB_END (bb)))
5877 /* First try to follow the branch. If that doesn't lead
5878 to a useful path, follow the fallthru edge. */
5879 e = BRANCH_EDGE (bb);
5880 if (!single_pred_p (e->dest))
5881 e = FALLTHRU_EDGE (bb);
5883 else
5884 e = NULL;
5886 if (e && e->dest != EXIT_BLOCK_PTR
5887 && single_pred_p (e->dest)
5888 /* Avoid visiting basic blocks twice. The large comment
5889 above explains why this can happen. */
5890 && !TEST_BIT (cse_visited_basic_blocks, e->dest->index))
5892 basic_block bb2 = e->dest;
5893 SET_BIT (cse_visited_basic_blocks, bb2->index);
5894 data->path[path_size++].bb = bb2;
5895 bb = bb2;
5897 else
5898 bb = NULL;
5902 done:
5903 data->path_size = path_size;
5904 return path_size != 0;
5907 /* Dump the path in DATA to file F. NSETS is the number of sets
5908 in the path. */
5910 static void
5911 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
5913 int path_entry;
5915 fprintf (f, ";; Following path with %d sets: ", nsets);
5916 for (path_entry = 0; path_entry < data->path_size; path_entry++)
5917 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
5918 fputc ('\n', dump_file);
5919 fflush (f);
5923 /* Return true if BB has exception handling successor edges. */
5925 static bool
5926 have_eh_succ_edges (basic_block bb)
5928 edge e;
5929 edge_iterator ei;
5931 FOR_EACH_EDGE (e, ei, bb->succs)
5932 if (e->flags & EDGE_EH)
5933 return true;
5935 return false;
5939 /* Scan to the end of the path described by DATA. Return an estimate of
5940 the total number of SETs of all insns in the path. */
5942 static void
5943 cse_prescan_path (struct cse_basic_block_data *data)
5945 int nsets = 0;
5946 int path_size = data->path_size;
5947 int path_entry;
5949 /* Scan to end of each basic block in the path. */
5950 for (path_entry = 0; path_entry < path_size; path_entry++)
5952 basic_block bb;
5953 rtx insn;
5955 bb = data->path[path_entry].bb;
5957 FOR_BB_INSNS (bb, insn)
5959 if (!INSN_P (insn))
5960 continue;
5962 /* A PARALLEL can have lots of SETs in it,
5963 especially if it is really an ASM_OPERANDS. */
5964 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5965 nsets += XVECLEN (PATTERN (insn), 0);
5966 else
5967 nsets += 1;
5971 data->nsets = nsets;
5974 /* Process a single extended basic block described by EBB_DATA. */
5976 static void
5977 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
5979 int path_size = ebb_data->path_size;
5980 int path_entry;
5981 int num_insns = 0;
5983 /* Allocate the space needed by qty_table. */
5984 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
5986 new_basic_block ();
5987 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
5988 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
5989 for (path_entry = 0; path_entry < path_size; path_entry++)
5991 basic_block bb;
5992 rtx insn;
5993 rtx libcall_insn = NULL_RTX;
5994 int no_conflict = 0;
5996 bb = ebb_data->path[path_entry].bb;
5998 /* Invalidate recorded information for eh regs if there is an EH
5999 edge pointing to that bb. */
6000 if (bb_has_eh_pred (bb))
6002 struct df_ref **def_rec;
6004 for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++)
6006 struct df_ref *def = *def_rec;
6007 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6008 invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6012 FOR_BB_INSNS (bb, insn)
6014 /* If we have processed 1,000 insns, flush the hash table to
6015 avoid extreme quadratic behavior. We must not include NOTEs
6016 in the count since there may be more of them when generating
6017 debugging information. If we clear the table at different
6018 times, code generated with -g -O might be different than code
6019 generated with -O but not -g.
6021 FIXME: This is a real kludge and needs to be done some other
6022 way. */
6023 if (INSN_P (insn)
6024 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
6026 flush_hash_table ();
6027 num_insns = 0;
6030 if (INSN_P (insn))
6032 /* Process notes first so we have all notes in canonical forms
6033 when looking for duplicate operations. */
6034 if (REG_NOTES (insn))
6036 bool changed = false;
6037 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6038 NULL_RTX, &changed);
6039 if (changed)
6040 df_notes_rescan (insn);
6043 /* Track when we are inside in LIBCALL block. Inside such
6044 a block we do not want to record destinations. The last
6045 insn of a LIBCALL block is not considered to be part of
6046 the block, since its destination is the result of the
6047 block and hence should be recorded. */
6048 if (REG_NOTES (insn) != 0)
6050 rtx p;
6052 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6053 libcall_insn = XEXP (p, 0);
6054 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6056 /* Keep libcall_insn for the last SET insn of
6057 a no-conflict block to prevent changing the
6058 destination. */
6059 if (!no_conflict)
6060 libcall_insn = NULL_RTX;
6061 else
6062 no_conflict = -1;
6066 cse_insn (insn, libcall_insn);
6068 /* If we kept libcall_insn for a no-conflict bock,
6069 clear it here. */
6070 if (no_conflict == -1)
6072 libcall_insn = NULL_RTX;
6073 no_conflict = 0;
6076 /* If we haven't already found an insn where we added a LABEL_REF,
6077 check this one. */
6078 if (INSN_P (insn) && !recorded_label_ref
6079 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6080 (void *) insn))
6081 recorded_label_ref = true;
6083 #ifdef HAVE_cc0
6084 /* If the previous insn set CC0 and this insn no longer
6085 references CC0, delete the previous insn. Here we use
6086 fact that nothing expects CC0 to be valid over an insn,
6087 which is true until the final pass. */
6089 rtx prev_insn, tem;
6091 prev_insn = PREV_INSN (insn);
6092 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6093 && (tem = single_set (prev_insn)) != 0
6094 && SET_DEST (tem) == cc0_rtx
6095 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6096 delete_insn (prev_insn);
6099 /* If this insn is not the last insn in the basic block,
6100 it will be PREV_INSN(insn) in the next iteration. If
6101 we recorded any CC0-related information for this insn,
6102 remember it. */
6103 if (insn != BB_END (bb))
6105 prev_insn_cc0 = this_insn_cc0;
6106 prev_insn_cc0_mode = this_insn_cc0_mode;
6108 #endif
6112 /* Make sure that libcalls don't span multiple basic blocks. */
6113 gcc_assert (libcall_insn == NULL_RTX);
6115 /* With non-call exceptions, we are not always able to update
6116 the CFG properly inside cse_insn. So clean up possibly
6117 redundant EH edges here. */
6118 if (flag_non_call_exceptions && have_eh_succ_edges (bb))
6119 cse_cfg_altered |= purge_dead_edges (bb);
6121 /* If we changed a conditional jump, we may have terminated
6122 the path we are following. Check that by verifying that
6123 the edge we would take still exists. If the edge does
6124 not exist anymore, purge the remainder of the path.
6125 Note that this will cause us to return to the caller. */
6126 if (path_entry < path_size - 1)
6128 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6129 if (!find_edge (bb, next_bb))
6133 path_size--;
6135 /* If we truncate the path, we must also reset the
6136 visited bit on the remaining blocks in the path,
6137 or we will never visit them at all. */
6138 RESET_BIT (cse_visited_basic_blocks,
6139 ebb_data->path[path_size].bb->index);
6140 ebb_data->path[path_size].bb = NULL;
6142 while (path_size - 1 != path_entry);
6143 ebb_data->path_size = path_size;
6147 /* If this is a conditional jump insn, record any known
6148 equivalences due to the condition being tested. */
6149 insn = BB_END (bb);
6150 if (path_entry < path_size - 1
6151 && JUMP_P (insn)
6152 && single_set (insn)
6153 && any_condjump_p (insn))
6155 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6156 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6157 record_jump_equiv (insn, taken);
6160 #ifdef HAVE_cc0
6161 /* Clear the CC0-tracking related insns, they can't provide
6162 useful information across basic block boundaries. */
6163 prev_insn_cc0 = 0;
6164 #endif
6167 gcc_assert (next_qty <= max_qty);
6169 free (qty_table);
6173 /* Perform cse on the instructions of a function.
6174 F is the first instruction.
6175 NREGS is one plus the highest pseudo-reg number used in the instruction.
6177 Return 2 if jump optimizations should be redone due to simplifications
6178 in conditional jump instructions.
6179 Return 1 if the CFG should be cleaned up because it has been modified.
6180 Return 0 otherwise. */
6183 cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
6185 struct cse_basic_block_data ebb_data;
6186 basic_block bb;
6187 int *rc_order = XNEWVEC (int, last_basic_block);
6188 int i, n_blocks;
6190 df_set_flags (DF_LR_RUN_DCE);
6191 df_analyze ();
6192 df_set_flags (DF_DEFER_INSN_RESCAN);
6194 reg_scan (get_insns (), max_reg_num ());
6195 init_cse_reg_info (nregs);
6197 ebb_data.path = XNEWVEC (struct branch_path,
6198 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6200 cse_cfg_altered = false;
6201 cse_jumps_altered = false;
6202 recorded_label_ref = false;
6203 constant_pool_entries_cost = 0;
6204 constant_pool_entries_regcost = 0;
6205 ebb_data.path_size = 0;
6206 ebb_data.nsets = 0;
6207 rtl_hooks = cse_rtl_hooks;
6209 init_recog ();
6210 init_alias_analysis ();
6212 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6214 /* Set up the table of already visited basic blocks. */
6215 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block);
6216 sbitmap_zero (cse_visited_basic_blocks);
6218 /* Loop over basic blocks in reverse completion order (RPO),
6219 excluding the ENTRY and EXIT blocks. */
6220 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6221 i = 0;
6222 while (i < n_blocks)
6224 /* Find the first block in the RPO queue that we have not yet
6225 processed before. */
6228 bb = BASIC_BLOCK (rc_order[i++]);
6230 while (TEST_BIT (cse_visited_basic_blocks, bb->index)
6231 && i < n_blocks);
6233 /* Find all paths starting with BB, and process them. */
6234 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6236 /* Pre-scan the path. */
6237 cse_prescan_path (&ebb_data);
6239 /* If this basic block has no sets, skip it. */
6240 if (ebb_data.nsets == 0)
6241 continue;
6243 /* Get a reasonable estimate for the maximum number of qty's
6244 needed for this path. For this, we take the number of sets
6245 and multiply that by MAX_RECOG_OPERANDS. */
6246 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6248 /* Dump the path we're about to process. */
6249 if (dump_file)
6250 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6252 cse_extended_basic_block (&ebb_data);
6256 /* Clean up. */
6257 end_alias_analysis ();
6258 free (reg_eqv_table);
6259 free (ebb_data.path);
6260 sbitmap_free (cse_visited_basic_blocks);
6261 free (rc_order);
6262 rtl_hooks = general_rtl_hooks;
6264 if (cse_jumps_altered || recorded_label_ref)
6265 return 2;
6266 else if (cse_cfg_altered)
6267 return 1;
6268 else
6269 return 0;
6272 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6273 which there isn't a REG_LABEL_OPERAND note.
6274 Return one if so. DATA is the insn. */
6276 static int
6277 check_for_label_ref (rtx *rtl, void *data)
6279 rtx insn = (rtx) data;
6281 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6282 note for it, we must rerun jump since it needs to place the note. If
6283 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6284 don't do this since no REG_LABEL_OPERAND will be added. */
6285 return (GET_CODE (*rtl) == LABEL_REF
6286 && ! LABEL_REF_NONLOCAL_P (*rtl)
6287 && (!JUMP_P (insn)
6288 || !label_is_jump_target_p (XEXP (*rtl, 0), insn))
6289 && LABEL_P (XEXP (*rtl, 0))
6290 && INSN_UID (XEXP (*rtl, 0)) != 0
6291 && ! find_reg_note (insn, REG_LABEL_OPERAND, XEXP (*rtl, 0)));
6294 /* Count the number of times registers are used (not set) in X.
6295 COUNTS is an array in which we accumulate the count, INCR is how much
6296 we count each register usage.
6298 Don't count a usage of DEST, which is the SET_DEST of a SET which
6299 contains X in its SET_SRC. This is because such a SET does not
6300 modify the liveness of DEST.
6301 DEST is set to pc_rtx for a trapping insn, which means that we must count
6302 uses of a SET_DEST regardless because the insn can't be deleted here. */
6304 static void
6305 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6307 enum rtx_code code;
6308 rtx note;
6309 const char *fmt;
6310 int i, j;
6312 if (x == 0)
6313 return;
6315 switch (code = GET_CODE (x))
6317 case REG:
6318 if (x != dest)
6319 counts[REGNO (x)] += incr;
6320 return;
6322 case PC:
6323 case CC0:
6324 case CONST:
6325 case CONST_INT:
6326 case CONST_DOUBLE:
6327 case CONST_FIXED:
6328 case CONST_VECTOR:
6329 case SYMBOL_REF:
6330 case LABEL_REF:
6331 return;
6333 case CLOBBER:
6334 /* If we are clobbering a MEM, mark any registers inside the address
6335 as being used. */
6336 if (MEM_P (XEXP (x, 0)))
6337 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6338 return;
6340 case SET:
6341 /* Unless we are setting a REG, count everything in SET_DEST. */
6342 if (!REG_P (SET_DEST (x)))
6343 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6344 count_reg_usage (SET_SRC (x), counts,
6345 dest ? dest : SET_DEST (x),
6346 incr);
6347 return;
6349 case CALL_INSN:
6350 case INSN:
6351 case JUMP_INSN:
6352 /* We expect dest to be NULL_RTX here. If the insn may trap, mark
6353 this fact by setting DEST to pc_rtx. */
6354 if (flag_non_call_exceptions && may_trap_p (PATTERN (x)))
6355 dest = pc_rtx;
6356 if (code == CALL_INSN)
6357 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6358 count_reg_usage (PATTERN (x), counts, dest, incr);
6360 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6361 use them. */
6363 note = find_reg_equal_equiv_note (x);
6364 if (note)
6366 rtx eqv = XEXP (note, 0);
6368 if (GET_CODE (eqv) == EXPR_LIST)
6369 /* This REG_EQUAL note describes the result of a function call.
6370 Process all the arguments. */
6373 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6374 eqv = XEXP (eqv, 1);
6376 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6377 else
6378 count_reg_usage (eqv, counts, dest, incr);
6380 return;
6382 case EXPR_LIST:
6383 if (REG_NOTE_KIND (x) == REG_EQUAL
6384 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6385 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6386 involving registers in the address. */
6387 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6388 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6390 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6391 return;
6393 case ASM_OPERANDS:
6394 /* If the asm is volatile, then this insn cannot be deleted,
6395 and so the inputs *must* be live. */
6396 if (MEM_VOLATILE_P (x))
6397 dest = NULL_RTX;
6398 /* Iterate over just the inputs, not the constraints as well. */
6399 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6400 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6401 return;
6403 case INSN_LIST:
6404 gcc_unreachable ();
6406 default:
6407 break;
6410 fmt = GET_RTX_FORMAT (code);
6411 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6413 if (fmt[i] == 'e')
6414 count_reg_usage (XEXP (x, i), counts, dest, incr);
6415 else if (fmt[i] == 'E')
6416 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6417 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6421 /* Return true if set is live. */
6422 static bool
6423 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6424 int *counts)
6426 #ifdef HAVE_cc0
6427 rtx tem;
6428 #endif
6430 if (set_noop_p (set))
6433 #ifdef HAVE_cc0
6434 else if (GET_CODE (SET_DEST (set)) == CC0
6435 && !side_effects_p (SET_SRC (set))
6436 && ((tem = next_nonnote_insn (insn)) == 0
6437 || !INSN_P (tem)
6438 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6439 return false;
6440 #endif
6441 else if (!REG_P (SET_DEST (set))
6442 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
6443 || counts[REGNO (SET_DEST (set))] != 0
6444 || side_effects_p (SET_SRC (set)))
6445 return true;
6446 return false;
6449 /* Return true if insn is live. */
6451 static bool
6452 insn_live_p (rtx insn, int *counts)
6454 int i;
6455 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
6456 return true;
6457 else if (GET_CODE (PATTERN (insn)) == SET)
6458 return set_live_p (PATTERN (insn), insn, counts);
6459 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6461 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6463 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6465 if (GET_CODE (elt) == SET)
6467 if (set_live_p (elt, insn, counts))
6468 return true;
6470 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6471 return true;
6473 return false;
6475 else
6476 return true;
6479 /* Return true if libcall is dead as a whole. */
6481 static bool
6482 dead_libcall_p (rtx insn, int *counts)
6484 rtx note, set, new;
6486 /* See if there's a REG_EQUAL note on this insn and try to
6487 replace the source with the REG_EQUAL expression.
6489 We assume that insns with REG_RETVALs can only be reg->reg
6490 copies at this point. */
6491 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6492 if (!note)
6493 return false;
6495 set = single_set (insn);
6496 if (!set)
6497 return false;
6499 new = simplify_rtx (XEXP (note, 0));
6500 if (!new)
6501 new = XEXP (note, 0);
6503 /* While changing insn, we must update the counts accordingly. */
6504 count_reg_usage (insn, counts, NULL_RTX, -1);
6506 if (validate_change (insn, &SET_SRC (set), new, 0))
6508 count_reg_usage (insn, counts, NULL_RTX, 1);
6509 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
6510 remove_note (insn, note);
6511 return true;
6514 if (CONSTANT_P (new))
6516 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
6517 if (new && validate_change (insn, &SET_SRC (set), new, 0))
6519 count_reg_usage (insn, counts, NULL_RTX, 1);
6520 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
6521 remove_note (insn, note);
6522 return true;
6526 count_reg_usage (insn, counts, NULL_RTX, 1);
6527 return false;
6530 /* Scan all the insns and delete any that are dead; i.e., they store a register
6531 that is never used or they copy a register to itself.
6533 This is used to remove insns made obviously dead by cse, loop or other
6534 optimizations. It improves the heuristics in loop since it won't try to
6535 move dead invariants out of loops or make givs for dead quantities. The
6536 remaining passes of the compilation are also sped up. */
6539 delete_trivially_dead_insns (rtx insns, int nreg)
6541 int *counts;
6542 rtx insn, prev;
6543 int in_libcall = 0, dead_libcall = 0;
6544 int ndead = 0;
6546 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6547 /* First count the number of times each register is used. */
6548 counts = XCNEWVEC (int, nreg);
6549 for (insn = insns; insn; insn = NEXT_INSN (insn))
6550 if (INSN_P (insn))
6551 count_reg_usage (insn, counts, NULL_RTX, 1);
6553 /* Go from the last insn to the first and delete insns that only set unused
6554 registers or copy a register to itself. As we delete an insn, remove
6555 usage counts for registers it uses.
6557 The first jump optimization pass may leave a real insn as the last
6558 insn in the function. We must not skip that insn or we may end
6559 up deleting code that is not really dead. */
6560 for (insn = get_last_insn (); insn; insn = prev)
6562 int live_insn = 0;
6564 prev = PREV_INSN (insn);
6565 if (!INSN_P (insn))
6566 continue;
6568 /* Don't delete any insns that are part of a libcall block unless
6569 we can delete the whole libcall block.
6571 Flow or loop might get confused if we did that. Remember
6572 that we are scanning backwards. */
6573 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6575 in_libcall = 1;
6576 live_insn = 1;
6577 dead_libcall = dead_libcall_p (insn, counts);
6579 else if (in_libcall)
6580 live_insn = ! dead_libcall;
6581 else
6582 live_insn = insn_live_p (insn, counts);
6584 /* If this is a dead insn, delete it and show registers in it aren't
6585 being used. */
6587 if (! live_insn && dbg_cnt (delete_trivial_dead))
6589 count_reg_usage (insn, counts, NULL_RTX, -1);
6590 delete_insn_and_edges (insn);
6591 ndead++;
6594 if (in_libcall && find_reg_note (insn, REG_LIBCALL, NULL_RTX))
6596 in_libcall = 0;
6597 dead_libcall = 0;
6601 if (dump_file && ndead)
6602 fprintf (dump_file, "Deleted %i trivially dead insns\n",
6603 ndead);
6604 /* Clean up. */
6605 free (counts);
6606 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
6607 return ndead;
6610 /* This function is called via for_each_rtx. The argument, NEWREG, is
6611 a condition code register with the desired mode. If we are looking
6612 at the same register in a different mode, replace it with
6613 NEWREG. */
6615 static int
6616 cse_change_cc_mode (rtx *loc, void *data)
6618 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
6620 if (*loc
6621 && REG_P (*loc)
6622 && REGNO (*loc) == REGNO (args->newreg)
6623 && GET_MODE (*loc) != GET_MODE (args->newreg))
6625 validate_change (args->insn, loc, args->newreg, 1);
6627 return -1;
6629 return 0;
6632 /* Change the mode of any reference to the register REGNO (NEWREG) to
6633 GET_MODE (NEWREG) in INSN. */
6635 static void
6636 cse_change_cc_mode_insn (rtx insn, rtx newreg)
6638 struct change_cc_mode_args args;
6639 int success;
6641 if (!INSN_P (insn))
6642 return;
6644 args.insn = insn;
6645 args.newreg = newreg;
6647 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
6648 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, &args);
6650 /* If the following assertion was triggered, there is most probably
6651 something wrong with the cc_modes_compatible back end function.
6652 CC modes only can be considered compatible if the insn - with the mode
6653 replaced by any of the compatible modes - can still be recognized. */
6654 success = apply_change_group ();
6655 gcc_assert (success);
6658 /* Change the mode of any reference to the register REGNO (NEWREG) to
6659 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
6660 any instruction which modifies NEWREG. */
6662 static void
6663 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
6665 rtx insn;
6667 for (insn = start; insn != end; insn = NEXT_INSN (insn))
6669 if (! INSN_P (insn))
6670 continue;
6672 if (reg_set_p (newreg, insn))
6673 return;
6675 cse_change_cc_mode_insn (insn, newreg);
6679 /* BB is a basic block which finishes with CC_REG as a condition code
6680 register which is set to CC_SRC. Look through the successors of BB
6681 to find blocks which have a single predecessor (i.e., this one),
6682 and look through those blocks for an assignment to CC_REG which is
6683 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
6684 permitted to change the mode of CC_SRC to a compatible mode. This
6685 returns VOIDmode if no equivalent assignments were found.
6686 Otherwise it returns the mode which CC_SRC should wind up with.
6688 The main complexity in this function is handling the mode issues.
6689 We may have more than one duplicate which we can eliminate, and we
6690 try to find a mode which will work for multiple duplicates. */
6692 static enum machine_mode
6693 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
6695 bool found_equiv;
6696 enum machine_mode mode;
6697 unsigned int insn_count;
6698 edge e;
6699 rtx insns[2];
6700 enum machine_mode modes[2];
6701 rtx last_insns[2];
6702 unsigned int i;
6703 rtx newreg;
6704 edge_iterator ei;
6706 /* We expect to have two successors. Look at both before picking
6707 the final mode for the comparison. If we have more successors
6708 (i.e., some sort of table jump, although that seems unlikely),
6709 then we require all beyond the first two to use the same
6710 mode. */
6712 found_equiv = false;
6713 mode = GET_MODE (cc_src);
6714 insn_count = 0;
6715 FOR_EACH_EDGE (e, ei, bb->succs)
6717 rtx insn;
6718 rtx end;
6720 if (e->flags & EDGE_COMPLEX)
6721 continue;
6723 if (EDGE_COUNT (e->dest->preds) != 1
6724 || e->dest == EXIT_BLOCK_PTR)
6725 continue;
6727 end = NEXT_INSN (BB_END (e->dest));
6728 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
6730 rtx set;
6732 if (! INSN_P (insn))
6733 continue;
6735 /* If CC_SRC is modified, we have to stop looking for
6736 something which uses it. */
6737 if (modified_in_p (cc_src, insn))
6738 break;
6740 /* Check whether INSN sets CC_REG to CC_SRC. */
6741 set = single_set (insn);
6742 if (set
6743 && REG_P (SET_DEST (set))
6744 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
6746 bool found;
6747 enum machine_mode set_mode;
6748 enum machine_mode comp_mode;
6750 found = false;
6751 set_mode = GET_MODE (SET_SRC (set));
6752 comp_mode = set_mode;
6753 if (rtx_equal_p (cc_src, SET_SRC (set)))
6754 found = true;
6755 else if (GET_CODE (cc_src) == COMPARE
6756 && GET_CODE (SET_SRC (set)) == COMPARE
6757 && mode != set_mode
6758 && rtx_equal_p (XEXP (cc_src, 0),
6759 XEXP (SET_SRC (set), 0))
6760 && rtx_equal_p (XEXP (cc_src, 1),
6761 XEXP (SET_SRC (set), 1)))
6764 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
6765 if (comp_mode != VOIDmode
6766 && (can_change_mode || comp_mode == mode))
6767 found = true;
6770 if (found)
6772 found_equiv = true;
6773 if (insn_count < ARRAY_SIZE (insns))
6775 insns[insn_count] = insn;
6776 modes[insn_count] = set_mode;
6777 last_insns[insn_count] = end;
6778 ++insn_count;
6780 if (mode != comp_mode)
6782 gcc_assert (can_change_mode);
6783 mode = comp_mode;
6785 /* The modified insn will be re-recognized later. */
6786 PUT_MODE (cc_src, mode);
6789 else
6791 if (set_mode != mode)
6793 /* We found a matching expression in the
6794 wrong mode, but we don't have room to
6795 store it in the array. Punt. This case
6796 should be rare. */
6797 break;
6799 /* INSN sets CC_REG to a value equal to CC_SRC
6800 with the right mode. We can simply delete
6801 it. */
6802 delete_insn (insn);
6805 /* We found an instruction to delete. Keep looking,
6806 in the hopes of finding a three-way jump. */
6807 continue;
6810 /* We found an instruction which sets the condition
6811 code, so don't look any farther. */
6812 break;
6815 /* If INSN sets CC_REG in some other way, don't look any
6816 farther. */
6817 if (reg_set_p (cc_reg, insn))
6818 break;
6821 /* If we fell off the bottom of the block, we can keep looking
6822 through successors. We pass CAN_CHANGE_MODE as false because
6823 we aren't prepared to handle compatibility between the
6824 further blocks and this block. */
6825 if (insn == end)
6827 enum machine_mode submode;
6829 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
6830 if (submode != VOIDmode)
6832 gcc_assert (submode == mode);
6833 found_equiv = true;
6834 can_change_mode = false;
6839 if (! found_equiv)
6840 return VOIDmode;
6842 /* Now INSN_COUNT is the number of instructions we found which set
6843 CC_REG to a value equivalent to CC_SRC. The instructions are in
6844 INSNS. The modes used by those instructions are in MODES. */
6846 newreg = NULL_RTX;
6847 for (i = 0; i < insn_count; ++i)
6849 if (modes[i] != mode)
6851 /* We need to change the mode of CC_REG in INSNS[i] and
6852 subsequent instructions. */
6853 if (! newreg)
6855 if (GET_MODE (cc_reg) == mode)
6856 newreg = cc_reg;
6857 else
6858 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
6860 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
6861 newreg);
6864 delete_insn_and_edges (insns[i]);
6867 return mode;
6870 /* If we have a fixed condition code register (or two), walk through
6871 the instructions and try to eliminate duplicate assignments. */
6873 static void
6874 cse_condition_code_reg (void)
6876 unsigned int cc_regno_1;
6877 unsigned int cc_regno_2;
6878 rtx cc_reg_1;
6879 rtx cc_reg_2;
6880 basic_block bb;
6882 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
6883 return;
6885 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
6886 if (cc_regno_2 != INVALID_REGNUM)
6887 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
6888 else
6889 cc_reg_2 = NULL_RTX;
6891 FOR_EACH_BB (bb)
6893 rtx last_insn;
6894 rtx cc_reg;
6895 rtx insn;
6896 rtx cc_src_insn;
6897 rtx cc_src;
6898 enum machine_mode mode;
6899 enum machine_mode orig_mode;
6901 /* Look for blocks which end with a conditional jump based on a
6902 condition code register. Then look for the instruction which
6903 sets the condition code register. Then look through the
6904 successor blocks for instructions which set the condition
6905 code register to the same value. There are other possible
6906 uses of the condition code register, but these are by far the
6907 most common and the ones which we are most likely to be able
6908 to optimize. */
6910 last_insn = BB_END (bb);
6911 if (!JUMP_P (last_insn))
6912 continue;
6914 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
6915 cc_reg = cc_reg_1;
6916 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
6917 cc_reg = cc_reg_2;
6918 else
6919 continue;
6921 cc_src_insn = NULL_RTX;
6922 cc_src = NULL_RTX;
6923 for (insn = PREV_INSN (last_insn);
6924 insn && insn != PREV_INSN (BB_HEAD (bb));
6925 insn = PREV_INSN (insn))
6927 rtx set;
6929 if (! INSN_P (insn))
6930 continue;
6931 set = single_set (insn);
6932 if (set
6933 && REG_P (SET_DEST (set))
6934 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
6936 cc_src_insn = insn;
6937 cc_src = SET_SRC (set);
6938 break;
6940 else if (reg_set_p (cc_reg, insn))
6941 break;
6944 if (! cc_src_insn)
6945 continue;
6947 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
6948 continue;
6950 /* Now CC_REG is a condition code register used for a
6951 conditional jump at the end of the block, and CC_SRC, in
6952 CC_SRC_INSN, is the value to which that condition code
6953 register is set, and CC_SRC is still meaningful at the end of
6954 the basic block. */
6956 orig_mode = GET_MODE (cc_src);
6957 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
6958 if (mode != VOIDmode)
6960 gcc_assert (mode == GET_MODE (cc_src));
6961 if (mode != orig_mode)
6963 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
6965 cse_change_cc_mode_insn (cc_src_insn, newreg);
6967 /* Do the same in the following insns that use the
6968 current value of CC_REG within BB. */
6969 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
6970 NEXT_INSN (last_insn),
6971 newreg);
6978 /* Perform common subexpression elimination. Nonzero value from
6979 `cse_main' means that jumps were simplified and some code may now
6980 be unreachable, so do jump optimization again. */
6981 static bool
6982 gate_handle_cse (void)
6984 return optimize > 0;
6987 static unsigned int
6988 rest_of_handle_cse (void)
6990 int tem;
6992 if (dump_file)
6993 dump_flow_info (dump_file, dump_flags);
6995 tem = cse_main (get_insns (), max_reg_num ());
6997 /* If we are not running more CSE passes, then we are no longer
6998 expecting CSE to be run. But always rerun it in a cheap mode. */
6999 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7001 if (tem == 2)
7003 timevar_push (TV_JUMP);
7004 rebuild_jump_labels (get_insns ());
7005 cleanup_cfg (0);
7006 timevar_pop (TV_JUMP);
7008 else if (tem == 1 || optimize > 1)
7009 cleanup_cfg (0);
7011 return 0;
7014 struct rtl_opt_pass pass_cse =
7017 RTL_PASS,
7018 "cse1", /* name */
7019 gate_handle_cse, /* gate */
7020 rest_of_handle_cse, /* execute */
7021 NULL, /* sub */
7022 NULL, /* next */
7023 0, /* static_pass_number */
7024 TV_CSE, /* tv_id */
7025 0, /* properties_required */
7026 0, /* properties_provided */
7027 0, /* properties_destroyed */
7028 0, /* todo_flags_start */
7029 TODO_df_finish | TODO_verify_rtl_sharing |
7030 TODO_dump_func |
7031 TODO_ggc_collect |
7032 TODO_verify_flow, /* todo_flags_finish */
7037 static bool
7038 gate_handle_cse2 (void)
7040 return optimize > 0 && flag_rerun_cse_after_loop;
7043 /* Run second CSE pass after loop optimizations. */
7044 static unsigned int
7045 rest_of_handle_cse2 (void)
7047 int tem;
7049 if (dump_file)
7050 dump_flow_info (dump_file, dump_flags);
7052 tem = cse_main (get_insns (), max_reg_num ());
7054 /* Run a pass to eliminate duplicated assignments to condition code
7055 registers. We have to run this after bypass_jumps, because it
7056 makes it harder for that pass to determine whether a jump can be
7057 bypassed safely. */
7058 cse_condition_code_reg ();
7060 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7062 if (tem == 2)
7064 timevar_push (TV_JUMP);
7065 rebuild_jump_labels (get_insns ());
7066 cleanup_cfg (0);
7067 timevar_pop (TV_JUMP);
7069 else if (tem == 1)
7070 cleanup_cfg (0);
7072 cse_not_expected = 1;
7073 return 0;
7077 struct rtl_opt_pass pass_cse2 =
7080 RTL_PASS,
7081 "cse2", /* name */
7082 gate_handle_cse2, /* gate */
7083 rest_of_handle_cse2, /* execute */
7084 NULL, /* sub */
7085 NULL, /* next */
7086 0, /* static_pass_number */
7087 TV_CSE2, /* tv_id */
7088 0, /* properties_required */
7089 0, /* properties_provided */
7090 0, /* properties_destroyed */
7091 0, /* todo_flags_start */
7092 TODO_df_finish | TODO_verify_rtl_sharing |
7093 TODO_dump_func |
7094 TODO_ggc_collect |
7095 TODO_verify_flow /* todo_flags_finish */