Add support for SVE gather loads
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / mask_gather_load_5.c
blob60a93f1e42b6eb20a970ddff303a761a2a445909
1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O2 -ftree-vectorize -ffast-math --save-temps" } */
4 #include <stdint.h>
6 #ifndef INDEX32
7 #define INDEX32 int32_t
8 #define INDEX64 int64_t
9 #endif
11 #define TEST_LOOP(DATA_TYPE, CMP_TYPE) \
12 void \
13 f_##DATA_TYPE##_##CMP_TYPE \
14 (DATA_TYPE *restrict dest, DATA_TYPE *restrict *restrict src, \
15 CMP_TYPE *cmp1, CMP_TYPE *cmp2, int n) \
16 { \
17 for (int i = 0; i < n; ++i) \
18 if (cmp1[i] == cmp2[i]) \
19 dest[i] += *src[i]; \
22 #define TEST_TYPE(T, DATA_TYPE) \
23 T (DATA_TYPE, int64_t) \
24 T (DATA_TYPE, uint64_t) \
25 T (DATA_TYPE, double)
27 #define TEST_ALL(T) \
28 TEST_TYPE (T, int64_t) \
29 TEST_TYPE (T, uint64_t) \
30 TEST_TYPE (T, double)
32 TEST_ALL (TEST_LOOP)
34 /* { dg-final { scan-assembler-times {\tld1d\tz[0-9]+\.d, p[0-7]/z, \[x[0-9]+, x[0-9]+, lsl 3\]\n} 36 } } */
35 /* { dg-final { scan-assembler-times {\tcmpeq\tp[0-7]\.d, p[0-7]/z, z[0-9]+\.d, z[0-9]+\.d\n} 6 } } */
36 /* { dg-final { scan-assembler-times {\tfcmeq\tp[0-7]\.d, p[0-7]/z, z[0-9]+\.d, z[0-9]+\.d\n} 3 } } */
37 /* { dg-final { scan-assembler-times {\tld1d\tz[0-9]+\.d, p[0-7]/z, \[z[0-9]+\.d\]\n} 9 } } */
38 /* { dg-final { scan-assembler-times {\tst1d\tz[0-9]+\.d, p[0-7], \[x[0-9]+, x[0-9]+, lsl 3\]\n} 9 } } */