Add support for SVE gather loads
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve / gather_load_6.c
blob8445be423f0e105092560e1842e1d0df52309ce7
1 /* { dg-do assemble { target aarch64_asm_sve_ok } } */
2 /* { dg-options "-O2 -ftree-vectorize -fwrapv --save-temps" } */
4 #include <stdint.h>
6 #ifndef INDEX32
7 #define INDEX16 int16_t
8 #define INDEX32 int32_t
9 #endif
11 /* Invoked 18 times for each data size. */
12 #define TEST_LOOP(DATA_TYPE, BITS) \
13 void __attribute__ ((noinline, noclone)) \
14 f_##DATA_TYPE (DATA_TYPE *restrict dest, DATA_TYPE *restrict src, \
15 INDEX##BITS *indices, INDEX##BITS mask, int n) \
16 { \
17 for (int i = 9; i < n; ++i) \
18 dest[i] = src[(INDEX##BITS) (indices[i] | mask)]; \
21 #define TEST_ALL(T) \
22 T (int32_t, 16) \
23 T (uint32_t, 16) \
24 T (float, 16) \
25 T (int64_t, 32) \
26 T (uint64_t, 32) \
27 T (double, 32)
29 TEST_ALL (TEST_LOOP)
31 /* { dg-final { scan-assembler-times {\tsunpkhi\tz[0-9]+\.s, z[0-9]+\.h\n} 3 } } */
32 /* { dg-final { scan-assembler-times {\tsunpklo\tz[0-9]+\.s, z[0-9]+\.h\n} 3 } } */
33 /* { dg-final { scan-assembler-times {\tsunpkhi\tz[0-9]+\.d, z[0-9]+\.s\n} 3 } } */
34 /* { dg-final { scan-assembler-times {\tsunpklo\tz[0-9]+\.d, z[0-9]+\.s\n} 3 } } */
35 /* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.s, p[0-7]/z, \[x[0-9]+, z[0-9]+.s, sxtw 2\]\n} 6 } } */
36 /* { dg-final { scan-assembler-times {\tld1d\tz[0-9]+\.d, p[0-7]/z, \[x[0-9]+, z[0-9]+.d, lsl 3\]\n} 6 } } */