gcc/ChangeLog

   1 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
   2             Alan Hayward  <alan.hayward@arm.com>
   3             David Sherwood  <david.sherwood@arm.com>
   4
   5         * doc/md.texi (gather_load@var{m}): Document.
   6         (mask_gather_load@var{m}): Likewise.
   7         * genopinit.c (main): Add supports_vec_gather_load and
   8         supports_vec_gather_load_cached to target_optabs.
   9         * optabs-tree.c (init_tree_optimization_optabs): Use
  10         ggc_cleared_alloc to allocate target_optabs.
  11         * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
  12         * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
  13         functions.
  14         * internal-fn.h (internal_load_fn_p): Declare.
  15         (internal_gather_scatter_fn_p): Likewise.
  16         (internal_fn_mask_index): Likewise.
  17         (internal_gather_scatter_fn_supported_p): Likewise.
  18         * internal-fn.c (gather_load_direct): New macro.
  19         (expand_gather_load_optab_fn): New function.
  20         (direct_gather_load_optab_supported_p): New macro.
  21         (direct_internal_fn_optab): New function.
  22         (internal_load_fn_p): Likewise.
  23         (internal_gather_scatter_fn_p): Likewise.
  24         (internal_fn_mask_index): Likewise.
  25         (internal_gather_scatter_fn_supported_p): Likewise.
  26         * optabs-query.c (supports_at_least_one_mode_p): New function.
  27         (supports_vec_gather_load_p): Likewise.
  28         * optabs-query.h (supports_vec_gather_load_p): Declare.
  29         * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
  30         and memory_type field.
  31         (NUM_PATTERNS): Bump to 15.
  32         * tree-vect-data-refs.c: Include internal-fn.h.
  33         (vect_gather_scatter_fn_p): New function.
  34         (vect_describe_gather_scatter_call): Likewise.
  35         (vect_check_gather_scatter): Try using internal functions for
  36         gather loads.  Recognize existing calls to a gather load function.
  37         (vect_analyze_data_refs): Consider using gather loads if
  38         supports_vec_gather_load_p.
  39         * tree-vect-patterns.c (vect_get_load_store_mask): New function.
  40         (vect_get_gather_scatter_offset_type): Likewise.
  41         (vect_convert_mask_for_vectype): Likewise.
  42         (vect_add_conversion_to_patterm): Likewise.
  43         (vect_try_gather_scatter_pattern): Likewise.
  44         (vect_recog_gather_scatter_pattern): New pattern recognizer.
  45         (vect_vect_recog_func_ptrs): Add it.
  46         * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
  47         internal_fn_mask_index and internal_gather_scatter_fn_p.
  48         (check_load_store_masking): Take the gather_scatter_info as an
  49         argument and handle gather loads.
  50         (vect_get_gather_scatter_ops): New function.
  51         (vectorizable_call): Check internal_load_fn_p.
  52         (vectorizable_load): Likewise.  Handle gather load internal
  53         functions.
  54         (vectorizable_store): Update call to check_load_store_masking.
  55         * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
  56         * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
  57         * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
  58         (aarch64_gather_scale_operand_d): New predicates.
  59         * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
  60         (mask_gather_load<mode>): New insns.
  61
  62 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  63             Alan Hayward  <alan.hayward@arm.com>
  64             David Sherwood  <david.sherwood@arm.com>
  65
  66         * optabs.def (fold_left_plus_optab): New optab.
  67         * doc/md.texi (fold_left_plus_@var{m}): Document.
  68         * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
  69         * internal-fn.c (fold_left_direct): Define.
  70         (expand_fold_left_optab_fn): Likewise.
  71         (direct_fold_left_optab_supported_p): Likewise.
  72         * fold-const-call.c (fold_const_fold_left): New function.
  73         (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
  74         * tree-parloops.c (valid_reduction_p): New function.
  75         (gather_scalar_reductions): Use it.
  76         * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
  77         (vect_finish_replace_stmt): Declare.
  78         * tree-vect-loop.c (fold_left_reduction_fn): New function.
  79         (needs_fold_left_reduction_p): New function, split out from...
  80         (vect_is_simple_reduction): ...here.  Accept reductions that
  81         forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
  82         (vect_force_simple_reduction): Also store the reduction type in
  83         the assignment's STMT_VINFO_REDUC_TYPE.
  84         (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
  85         (merge_with_identity): New function.
  86         (vect_expand_fold_left): Likewise.
  87         (vectorize_fold_left_reduction): Likewise.
  88         (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION.  Leave the
  89         scalar phi in place for it.  Check for target support and reject
  90         cases that would reassociate the operation.  Defer the transform
  91         phase to vectorize_fold_left_reduction.
  92         * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
  93         * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
  94         (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
  95
  96 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
  97
  98         * tree-if-conv.c (predicate_mem_writes): Remove redundant
  99         call to ifc_temp_var.
 100
 101 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 102             Alan Hayward  <alan.hayward@arm.com>
 103             David Sherwood  <david.sherwood@arm.com>
 104
 105         * target.def (legitimize_address_displacement): Take the original
 106         offset as a poly_int.
 107         * targhooks.h (default_legitimize_address_displacement): Update
 108         accordingly.
 109         * targhooks.c (default_legitimize_address_displacement): Likewise.
 110         * doc/tm.texi: Regenerate.
 111         * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
 112         as an argument, moving assert of ad->disp == ad->disp_term to...
 113         (process_address_1): ...here.  Update calls to base_plus_disp_to_reg.
 114         Try calling targetm.legitimize_address_displacement before expanding
 115         the address rather than afterwards, and adjust for the new interface.
 116         * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
 117         Match the new hook interface.  Handle SVE addresses.
 118         * config/sh/sh.c (sh_legitimize_address_displacement): Make the
 119         new hook interface.
 120
 121 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 122
 123         * Makefile.in (OBJS): Add early-remat.o.
 124         * target.def (select_early_remat_modes): New hook.
 125         * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
 126         * doc/tm.texi: Regenerate.
 127         * targhooks.h (default_select_early_remat_modes): Declare.
 128         * targhooks.c (default_select_early_remat_modes): New function.
 129         * timevar.def (TV_EARLY_REMAT): New timevar.
 130         * passes.def (pass_early_remat): New pass.
 131         * tree-pass.h (make_pass_early_remat): Declare.
 132         * early-remat.c: New file.
 133         * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
 134         function.
 135         (TARGET_SELECT_EARLY_REMAT_MODES): Define.
 136
 137 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 138             Alan Hayward  <alan.hayward@arm.com>
 139             David Sherwood  <david.sherwood@arm.com>
 140
 141         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
 142         vfm1 with a bound_epilog parameter.
 143         (vect_do_peeling): Update calls accordingly, and move the prologue
 144         call earlier in the function.  Treat the base bound_epilog as 0 for
 145         fully-masked loops and retain vf - 1 for other loops.  Add 1 to
 146         this base when peeling for gaps.
 147         * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
 148         with fully-masked loops.
 149         (vect_estimate_min_profitable_iters): Handle the single peeled
 150         iteration in that case.
 151
 152 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 153             Alan Hayward  <alan.hayward@arm.com>
 154             David Sherwood  <david.sherwood@arm.com>
 155
 156         * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
 157         single-element interleaving even if the size is not a power of 2.
 158         * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
 159         accesses for single-element interleaving if the group size is
 160         not a power of 2.
 161
 162 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 163             Alan Hayward  <alan.hayward@arm.com>
 164             David Sherwood  <david.sherwood@arm.com>
 165
 166         * doc/md.texi (fold_extract_last_@var{m}): Document.
 167         * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
 168         * optabs.def (fold_extract_last_optab): New optab.
 169         * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
 170         * internal-fn.c (fold_extract_direct): New macro.
 171         (expand_fold_extract_optab_fn): Likewise.
 172         (direct_fold_extract_optab_supported_p): Likewise.
 173         * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
 174         * tree-vect-loop.c (vect_model_reduction_cost): Handle
 175         EXTRACT_LAST_REDUCTION.
 176         (get_initial_def_for_reduction): Do not create an initial vector
 177         for EXTRACT_LAST_REDUCTION reductions.
 178         (vectorizable_reduction): Leave the scalar phi in place for
 179         EXTRACT_LAST_REDUCTIONs.  Try using EXTRACT_LAST_REDUCTION
 180         ahead of INTEGER_INDUC_COND_REDUCTION.  Do not check for an
 181         epilogue code for EXTRACT_LAST_REDUCTION and defer the
 182         transform phase to vectorizable_condition.
 183         * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
 184         split out from...
 185         (vect_finish_stmt_generation): ...here.
 186         (vect_finish_replace_stmt): New function.
 187         (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
 188         * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
 189         pattern.
 190         * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
 191
 192 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 193             Alan Hayward  <alan.hayward@arm.com>
 194             David Sherwood  <david.sherwood@arm.com>
 195
 196         * doc/md.texi (extract_last_@var{m}): Document.
 197         * optabs.def (extract_last_optab): New optab.
 198         * internal-fn.def (EXTRACT_LAST): New internal function.
 199         * internal-fn.c (cond_unary_direct): New macro.
 200         (expand_cond_unary_optab_fn): Likewise.
 201         (direct_cond_unary_optab_supported_p): Likewise.
 202         * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
 203         loops using EXTRACT_LAST.
 204         * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
 205         (extract_last_<mode>): ...this optab.
 206         (vec_extract<mode><Vel>): Update accordingly.
 207
 208 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 209             Alan Hayward  <alan.hayward@arm.com>
 210             David Sherwood  <david.sherwood@arm.com>
 211
 212         * target.def (empty_mask_is_expensive): New hook.
 213         * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
 214         * doc/tm.texi: Regenerate.
 215         * targhooks.h (default_empty_mask_is_expensive): Declare.
 216         * targhooks.c (default_empty_mask_is_expensive): New function.
 217         * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
 218         if the target says that empty masks are expensive.
 219         * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
 220         New function.
 221         (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
 222
 223 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 224             Alan Hayward  <alan.hayward@arm.com>
 225             David Sherwood  <david.sherwood@arm.com>
 226
 227         * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
 228         (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
 229         (vect_use_loop_mask_for_alignment_p): New function.
 230         (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
 231         * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
 232         niters_skip argument.  Make sure that the first niters_skip elements
 233         of the first iteration are inactive.
 234         (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
 235         Update call to vect_set_loop_masks_directly.
 236         (get_misalign_in_elems): New function, split out from...
 237         (vect_gen_prolog_loop_niters): ...here.
 238         (vect_update_init_of_dr): Take a code argument that specifies whether
 239         the adjustment should be added or subtracted.
 240         (vect_update_init_of_drs): Likewise.
 241         (vect_prepare_for_masked_peels): New function.
 242         (vect_do_peeling): Skip prologue peeling if we're using a mask
 243         instead.  Update call to vect_update_inits_of_drs.
 244         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
 245         mask_skip_niters.
 246         (vect_analyze_loop_2): Allow fully-masked loops with peeling for
 247         alignment.  Do not include the number of peeled iterations in
 248         the minimum threshold in that case.
 249         (vectorizable_induction): Adjust the start value down by
 250         LOOP_VINFO_MASK_SKIP_NITERS iterations.
 251         (vect_transform_loop): Call vect_prepare_for_masked_peels.
 252         Take the number of skipped iterations into account when calculating
 253         the loop bounds.
 254         * tree-vect-stmts.c (vect_gen_while_not): New function.
 255
 256 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 257             Alan Hayward  <alan.hayward@arm.com>
 258             David Sherwood  <david.sherwood@arm.com>
 259
 260         * doc/sourcebuild.texi (vect_fully_masked): Document.
 261         * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
 262         default value to 0.
 263         * tree-vect-loop.c (vect_analyze_loop_costing): New function,
 264         split out from...
 265         (vect_analyze_loop_2): ...here. Don't check the vectorization
 266         factor against the number of loop iterations if the loop is
 267         fully-masked.
 268
 269 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 270             Alan Hayward  <alan.hayward@arm.com>
 271             David Sherwood  <david.sherwood@arm.com>
 272
 273         * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
 274         (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
 275         (dump_groups): Update accordingly.
 276         (iv_use::mem_type): New member variable.
 277         (address_p): New function.
 278         (record_use): Add a mem_type argument and initialize the new
 279         mem_type field.
 280         (record_group_use): Add a mem_type argument.  Use address_p.
 281         Remove obsolete null checks of base_object.  Update call to record_use.
 282         (find_interesting_uses_op): Update call to record_group_use.
 283         (find_interesting_uses_cond): Likewise.
 284         (find_interesting_uses_address): Likewise.
 285         (get_mem_type_for_internal_fn): New function.
 286         (find_address_like_use): Likewise.
 287         (find_interesting_uses_stmt): Try find_address_like_use before
 288         calling find_interesting_uses_op.
 289         (addr_offset_valid_p): Use the iv mem_type field as the type
 290         of the addressed memory.
 291         (add_autoinc_candidates): Likewise.
 292         (get_address_cost): Likewise.
 293         (split_small_address_groups_p): Use address_p.
 294         (split_address_groups): Likewise.
 295         (add_iv_candidate_for_use): Likewise.
 296         (autoinc_possible_for_pair): Likewise.
 297         (rewrite_groups): Likewise.
 298         (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
 299         (determine_group_iv_cost): Update after split of USE_ADDRESS.
 300         (get_alias_ptr_type_for_ptr_address): New function.
 301         (rewrite_use_address): Rewrite address uses in calls that were
 302         identified by find_address_like_use.
 303
 304 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 305             Alan Hayward  <alan.hayward@arm.com>
 306             David Sherwood  <david.sherwood@arm.com>
 307
 308         * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
 309         TARGET_MEM_REFs.
 310         * gimple-expr.h (is_gimple_addressable: Likewise.
 311         * gimple-expr.c (is_gimple_address): Likewise.
 312         * internal-fn.c (expand_call_mem_ref): New function.
 313         (expand_mask_load_optab_fn): Use it.
 314         (expand_mask_store_optab_fn): Likewise.
 315
 316 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 317             Alan Hayward  <alan.hayward@arm.com>
 318             David Sherwood  <david.sherwood@arm.com>
 319
 320         * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
 321         (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
 322         (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
 323         (cond_umax@var{mode}): Document.
 324         * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
 325         (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
 326         (cond_umin_optab, cond_umax_optab): New optabs.
 327         * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
 328         (COND_IOR, COND_XOR): New internal functions.
 329         * internal-fn.h (get_conditional_internal_fn): Declare.
 330         * internal-fn.c (cond_binary_direct): New macro.
 331         (expand_cond_binary_optab_fn): Likewise.
 332         (direct_cond_binary_optab_supported_p): Likewise.
 333         (get_conditional_internal_fn): New function.
 334         * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
 335         Cope with reduction statements that are vectorized as calls rather
 336         than assignments.
 337         * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
 338         * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
 339         (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
 340         (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
 341         (UNSPEC_COND_EOR): New unspecs.
 342         (optab): Add mappings for them.
 343         (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
 344         (sve_int_op, sve_fp_op): New int attributes.
 345
 346 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 347             Alan Hayward  <alan.hayward@arm.com>
 348             David Sherwood  <david.sherwood@arm.com>
 349
 350         * optabs.def (while_ult_optab): New optab.
 351         * doc/md.texi (while_ult@var{m}@var{n}): Document.
 352         * internal-fn.def (WHILE_ULT): New internal function.
 353         * internal-fn.h (direct_internal_fn_supported_p): New override
 354         that takes two types as argument.
 355         * internal-fn.c (while_direct): New macro.
 356         (expand_while_optab_fn): New function.
 357         (convert_optab_supported_p): Likewise.
 358         (direct_while_optab_supported_p): New macro.
 359         * wide-int.h (wi::udiv_ceil): New function.
 360         * tree-vectorizer.h (rgroup_masks): New structure.
 361         (vec_loop_masks): New typedef.
 362         (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
 363         and fully_masked_p.
 364         (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
 365         (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
 366         (vect_max_vf): New function.
 367         (slpeel_make_loop_iterate_ntimes): Delete.
 368         (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
 369         (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
 370         (vect_record_loop_mask, vect_get_loop_mask): Likewise.
 371         * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
 372         internal-fn.h, stor-layout.h and optabs-query.h.
 373         (vect_set_loop_mask): New function.
 374         (add_preheader_seq): Likewise.
 375         (add_header_seq): Likewise.
 376         (interleave_supported_p): Likewise.
 377         (vect_maybe_permute_loop_masks): Likewise.
 378         (vect_set_loop_masks_directly): Likewise.
 379         (vect_set_loop_condition_masked): Likewise.
 380         (vect_set_loop_condition_unmasked): New function, split out from
 381         slpeel_make_loop_iterate_ntimes.
 382         (slpeel_make_loop_iterate_ntimes): Rename to..
 383         (vect_set_loop_condition): ...this.  Use vect_set_loop_condition_masked
 384         for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
 385         (vect_do_peeling): Update call accordingly.
 386         (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
 387         loops.
 388         * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
 389         mask_compare_type, can_fully_mask_p and fully_masked_p.
 390         (release_vec_loop_masks): New function.
 391         (_loop_vec_info): Use it to free the loop masks.
 392         (can_produce_all_loop_masks_p): New function.
 393         (vect_get_max_nscalars_per_iter): Likewise.
 394         (vect_verify_full_masking): Likewise.
 395         (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
 396         retries, and free the mask rgroups before retrying.  Check loop-wide
 397         reasons for disallowing fully-masked loops.  Make the final decision
 398         about whether use a fully-masked loop or not.
 399         (vect_estimate_min_profitable_iters): Do not assume that peeling
 400         for the number of iterations will be needed for fully-masked loops.
 401         (vectorizable_reduction): Disable fully-masked loops.
 402         (vectorizable_live_operation): Likewise.
 403         (vect_halve_mask_nunits): New function.
 404         (vect_double_mask_nunits): Likewise.
 405         (vect_record_loop_mask): Likewise.
 406         (vect_get_loop_mask): Likewise.
 407         (vect_transform_loop): Handle the case in which the final loop
 408         iteration might handle a partial vector.  Call vect_set_loop_condition
 409         instead of slpeel_make_loop_iterate_ntimes.
 410         * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
 411         (check_load_store_masking): New function.
 412         (prepare_load_store_mask): Likewise.
 413         (vectorizable_store): Handle fully-masked loops.
 414         (vectorizable_load): Likewise.
 415         (supportable_widening_operation): Use vect_halve_mask_nunits for
 416         booleans.
 417         (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
 418         (vect_gen_while): New function.
 419         * config/aarch64/aarch64.md (umax<mode>3): New expander.
 420         (aarch64_uqdec<mode>): New insn.
 421
 422 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 423             Alan Hayward  <alan.hayward@arm.com>
 424             David Sherwood  <david.sherwood@arm.com>
 425
 426         * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
 427         (reduc_xor_scal_optab): New optabs.
 428         * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
 429         (reduc_xor_scal_@var{m}): Document.
 430         * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
 431         * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
 432         internal functions.
 433         * fold-const-call.c (fold_const_call): Handle them.
 434         * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
 435         internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
 436         * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
 437         (*reduc_<bit_reduc>_scal_<mode>): New patterns.
 438         * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
 439         (UNSPEC_XORV): New unspecs.
 440         (optab): Add entries for them.
 441         (BITWISEV): New int iterator.
 442         (bit_reduc_op): New int attributes.
 443
 444 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 445             Alan Hayward  <alan.hayward@arm.com>
 446             David Sherwood  <david.sherwood@arm.com>
 447
 448         * doc/md.texi (vec_shl_insert_@var{m}): New optab.
 449         * internal-fn.def (VEC_SHL_INSERT): New internal function.
 450         * optabs.def (vec_shl_insert_optab): New optab.
 451         * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
 452         (duplicate_and_interleave): Likewise.
 453         * tree-vect-loop.c: Include internal-fn.h.
 454         (neutral_op_for_slp_reduction): New function, split out from
 455         get_initial_defs_for_reduction.
 456         (get_initial_def_for_reduction): Handle option 2 for variable-length
 457         vectors by loading the neutral value into a vector and then shifting
 458         the initial value into element 0.
 459         (get_initial_defs_for_reduction): Replace the code argument with
 460         the neutral value calculated by neutral_op_for_slp_reduction.
 461         Use gimple_build_vector for constant-length vectors.
 462         Use IFN_VEC_SHL_INSERT for variable-length vectors if all
 463         but the first group_size elements have a neutral value.
 464         Use duplicate_and_interleave otherwise.
 465         (vect_create_epilog_for_reduction): Take a neutral_op parameter.
 466         Update call to get_initial_defs_for_reduction.  Handle SLP
 467         reductions for variable-length vectors by creating one vector
 468         result for each scalar result, with the elements associated
 469         with other scalar results stubbed out with the neutral value.
 470         (vectorizable_reduction): Call neutral_op_for_slp_reduction.
 471         Require IFN_VEC_SHL_INSERT for double reductions on
 472         variable-length vectors, or SLP reductions that have
 473         a neutral value.  Require can_duplicate_and_interleave_p
 474         support for variable-length unchained SLP reductions if there
 475         is no neutral value, such as for MIN/MAX reductions.  Also require
 476         the number of vector elements to be a multiple of the number of
 477         SLP statements when doing variable-length unchained SLP reductions.
 478         Update call to vect_create_epilog_for_reduction.
 479         * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
 480         and remove initial values.
 481         (duplicate_and_interleave): Make public.
 482         * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
 483         * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
 484
 485 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 486             Alan Hayward  <alan.hayward@arm.com>
 487             David Sherwood  <david.sherwood@arm.com>
 488
 489         * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
 490         (can_duplicate_and_interleave_p): New function.
 491         (vect_get_and_check_slp_defs): Take the vector of statements
 492         rather than just the current one.  Remove excess parentheses.
 493         Restriction rejectinon of vect_constant_def and vect_external_def
 494         for variable-length vectors to boolean types, or types for which
 495         can_duplicate_and_interleave_p is false.
 496         (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
 497         (duplicate_and_interleave): New function.
 498         (vect_get_constant_vectors): Use gimple_build_vector for
 499         constant-length vectors and suitable variable-length constant
 500         vectors.  Use duplicate_and_interleave for other variable-length
 501         vectors.  Don't defer the update when inserting new statements.
 502
 503 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 504             Alan Hayward  <alan.hayward@arm.com>
 505             David Sherwood  <david.sherwood@arm.com>
 506
 507         * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
 508         min_profitable_iters doesn't go negative.
 509
 510 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 511             Alan Hayward  <alan.hayward@arm.com>
 512             David Sherwood  <david.sherwood@arm.com>
 513
 514         * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
 515         (vec_mask_store_lanes@var{m}@var{n}): Likewise.
 516         * optabs.def (vec_mask_load_lanes_optab): New optab.
 517         (vec_mask_store_lanes_optab): Likewise.
 518         * internal-fn.def (MASK_LOAD_LANES): New internal function.
 519         (MASK_STORE_LANES): Likewise.
 520         * internal-fn.c (mask_load_lanes_direct): New macro.
 521         (mask_store_lanes_direct): Likewise.
 522         (expand_mask_load_optab_fn): Handle masked operations.
 523         (expand_mask_load_lanes_optab_fn): New macro.
 524         (expand_mask_store_optab_fn): Handle masked operations.
 525         (expand_mask_store_lanes_optab_fn): New macro.
 526         (direct_mask_load_lanes_optab_supported_p): Likewise.
 527         (direct_mask_store_lanes_optab_supported_p): Likewise.
 528         * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
 529         parameter.
 530         (vect_load_lanes_supported): Likewise.
 531         * tree-vect-data-refs.c (strip_conversion): New function.
 532         (can_group_stmts_p): Likewise.
 533         (vect_analyze_data_ref_accesses): Use it instead of checking
 534         for a pair of assignments.
 535         (vect_store_lanes_supported): Take a masked_p parameter.
 536         (vect_load_lanes_supported): Likewise.
 537         * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
 538         vect_store_lanes_supported and vect_load_lanes_supported.
 539         * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
 540         * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
 541         parameter.  Don't allow gaps for masked accesses.
 542         Use vect_get_store_rhs.  Update calls to vect_store_lanes_supported
 543         and vect_load_lanes_supported.
 544         (get_load_store_type): Take a masked_p parameter and update
 545         call to get_group_load_store_type.
 546         (vectorizable_store): Update call to get_load_store_type.
 547         Handle IFN_MASK_STORE_LANES.
 548         (vectorizable_load): Update call to get_load_store_type.
 549         Handle IFN_MASK_LOAD_LANES.
 550
 551 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 552             Alan Hayward  <alan.hayward@arm.com>
 553             David Sherwood  <david.sherwood@arm.com>
 554
 555         * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
 556         modes for SVE.
 557         * config/aarch64/aarch64-protos.h
 558         (aarch64_sve_struct_memory_operand_p): Declare.
 559         * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
 560         (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
 561         (VPRED, vpred): Handle SVE structure modes.
 562         * config/aarch64/constraints.md (Utx): New constraint.
 563         * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
 564         (aarch64_sve_struct_nonimmediate_operand): New predicates.
 565         * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
 566         * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
 567         (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
 568         structure modes.  Split into pieces after RA.
 569         (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
 570         (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
 571         New patterns.
 572         * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
 573         SVE structure modes.
 574         (aarch64_classify_address): Likewise.
 575         (sizetochar): Move earlier in file.
 576         (aarch64_print_operand): Handle SVE register lists.
 577         (aarch64_array_mode): New function.
 578         (aarch64_sve_struct_memory_operand_p): Likewise.
 579         (TARGET_ARRAY_MODE): Redefine.
 580
 581 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 582             Alan Hayward  <alan.hayward@arm.com>
 583             David Sherwood  <david.sherwood@arm.com>
 584
 585         * target.def (array_mode): New target hook.
 586         * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
 587         * doc/tm.texi: Regenerate.
 588         * hooks.h (hook_optmode_mode_uhwi_none): Declare.
 589         * hooks.c (hook_optmode_mode_uhwi_none): New function.
 590         * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
 591         targetm.array_mode.
 592         * stor-layout.c (mode_for_array): Likewise.  Support polynomial
 593         type sizes.
 594
 595 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 596             Alan Hayward  <alan.hayward@arm.com>
 597             David Sherwood  <david.sherwood@arm.com>
 598
 599         * fold-const.c (fold_binary_loc): Check the argument types
 600         rather than the result type when testing for a vector operation.
 601
 602 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 603
 604         * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
 605         * doc/tm.texi: Regenerate.
 606
 607 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 608             Alan Hayward  <alan.hayward@arm.com>
 609             David Sherwood  <david.sherwood@arm.com>
 610
 611         * doc/invoke.texi (-msve-vector-bits=): Document new option.
 612         (sve): Document new AArch64 extension.
 613         * doc/md.texi (w): Extend the description of the AArch64
 614         constraint to include SVE vectors.
 615         (Upl, Upa): Document new AArch64 predicate constraints.
 616         * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
 617         enum.
 618         * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
 619         (msve-vector-bits=): New option.
 620         * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
 621         SVE when these are disabled.
 622         (sve): New extension.
 623         * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
 624         modes.  Adjust their number of units based on aarch64_sve_vg.
 625         (MAX_BITSIZE_MODE_ANY_MODE): Define.
 626         * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
 627         aarch64_addr_query_type.
 628         (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
 629         (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
 630         (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
 631         (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
 632         (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
 633         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
 634         (aarch64_simd_imm_zero_p): Delete.
 635         (aarch64_check_zero_based_sve_index_immediate): Declare.
 636         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
 637         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
 638         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
 639         (aarch64_sve_float_mul_immediate_p): Likewise.
 640         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
 641         rather than an rtx.
 642         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
 643         (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
 644         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
 645         (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
 646         (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
 647         (aarch64_regmode_natural_size): Likewise.
 648         * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
 649         (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
 650         left one place.
 651         (AARCH64_ISA_SVE, TARGET_SVE): New macros.
 652         (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
 653         for VG and the SVE predicate registers.
 654         (V_ALIASES): Add a "z"-prefixed alias.
 655         (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
 656         (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
 657         (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
 658         (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
 659         (REG_CLASS_NAMES): Add entries for them.
 660         (REG_CLASS_CONTENTS): Likewise.  Update ALL_REGS to include VG
 661         and the predicate registers.
 662         (aarch64_sve_vg): Declare.
 663         (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
 664         (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
 665         (REGMODE_NATURAL_SIZE): Define.
 666         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
 667         SVE macros.
 668         * config/aarch64/aarch64.c: Include cfgrtl.h.
 669         (simd_immediate_info): Add a constructor for series vectors,
 670         and an associated step field.
 671         (aarch64_sve_vg): New variable.
 672         (aarch64_dbx_register_number): Handle VG and the predicate registers.
 673         (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
 674         (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
 675         (VEC_ANY_DATA, VEC_STRUCT): New constants.
 676         (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
 677         (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
 678         (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
 679         (aarch64_get_mask_mode): New functions.
 680         (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
 681         and FP_LO_REGS.  Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
 682         (aarch64_hard_regno_mode_ok): Handle VG.  Also handle the SVE
 683         predicate modes and predicate registers.  Explicitly restrict
 684         GPRs to modes of 16 bytes or smaller.  Only allow FP registers
 685         to store a vector mode if it is recognized by
 686         aarch64_classify_vector_mode.
 687         (aarch64_regmode_natural_size): New function.
 688         (aarch64_hard_regno_caller_save_mode): Return the original mode
 689         for predicates.
 690         (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
 691         (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
 692         (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
 693         (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
 694         functions.
 695         (aarch64_add_offset): Add a temp2 parameter.  Assert that temp1
 696         does not overlap dest if the function is frame-related.  Handle
 697         SVE constants.
 698         (aarch64_split_add_offset): New function.
 699         (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
 700         them aarch64_add_offset.
 701         (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
 702         and update call to aarch64_sub_sp.
 703         (aarch64_add_cfa_expression): New function.
 704         (aarch64_expand_prologue): Pass extra temporary registers to the
 705         functions above.  Handle the case in which we need to emit new
 706         DW_CFA_expressions for registers that were originally saved
 707         relative to the stack pointer, but now have to be expressed
 708         relative to the frame pointer.
 709         (aarch64_output_mi_thunk): Pass extra temporary registers to the
 710         functions above.
 711         (aarch64_expand_epilogue): Likewise.  Prevent inheritance of
 712         IP0 and IP1 values for SVE frames.
 713         (aarch64_expand_vec_series): New function.
 714         (aarch64_expand_sve_widened_duplicate): Likewise.
 715         (aarch64_expand_sve_const_vector): Likewise.
 716         (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
 717         Handle SVE constants.  Use emit_move_insn to move a force_const_mem
 718         into the register, rather than emitting a SET directly.
 719         (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
 720         (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
 721         (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
 722         (offset_9bit_signed_scaled_p): New functions.
 723         (aarch64_replicate_bitmask_imm): New function.
 724         (aarch64_bitmask_imm): Use it.
 725         (aarch64_cannot_force_const_mem): Reject expressions involving
 726         a CONST_POLY_INT.  Update call to aarch64_classify_symbol.
 727         (aarch64_classify_index): Handle SVE indices, by requiring
 728         a plain register index with a scale that matches the element size.
 729         (aarch64_classify_address): Handle SVE addresses.  Assert that
 730         the mode of the address is VOIDmode or an integer mode.
 731         Update call to aarch64_classify_symbol.
 732         (aarch64_classify_symbolic_expression): Update call to
 733         aarch64_classify_symbol.
 734         (aarch64_const_vec_all_in_range_p): New function.
 735         (aarch64_print_vector_float_operand): Likewise.
 736         (aarch64_print_operand): Handle 'N' and 'C'.  Use "zN" rather than
 737         "vN" for FP registers with SVE modes.  Handle (const ...) vectors
 738         and the FP immediates 1.0 and 0.5.
 739         (aarch64_print_address_internal): Handle SVE addresses.
 740         (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
 741         (aarch64_regno_regclass): Handle predicate registers.
 742         (aarch64_secondary_reload): Handle big-endian reloads of SVE
 743         data modes.
 744         (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
 745         (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
 746         (aarch64_convert_sve_vector_bits): New function.
 747         (aarch64_override_options): Use it to handle -msve-vector-bits=.
 748         (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
 749         rather than an rtx.
 750         (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
 751         Handle SVE vector and predicate modes.  Accept VL-based constants
 752         that need only one temporary register, and VL offsets that require
 753         no temporary registers.
 754         (aarch64_conditional_register_usage): Mark the predicate registers
 755         as fixed if SVE isn't available.
 756         (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
 757         Return true for SVE vector and predicate modes.
 758         (aarch64_simd_container_mode): Take the number of bits as a poly_int64
 759         rather than an unsigned int.  Handle SVE modes.
 760         (aarch64_preferred_simd_mode): Update call accordingly.  Handle
 761         SVE modes.
 762         (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
 763         if SVE is enabled.
 764         (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
 765         (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
 766         (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
 767         (aarch64_sve_float_mul_immediate_p): New functions.
 768         (aarch64_sve_valid_immediate): New function.
 769         (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
 770         Explicitly reject structure modes.  Check for INDEX constants.
 771         Handle PTRUE and PFALSE constants.
 772         (aarch64_check_zero_based_sve_index_immediate): New function.
 773         (aarch64_simd_imm_zero_p): Delete.
 774         (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
 775         vector modes.  Accept constants in the range of CNT[BHWD].
 776         (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
 777         ask for an Advanced SIMD mode.
 778         (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
 779         (aarch64_simd_vector_alignment): Handle SVE predicates.
 780         (aarch64_vectorize_preferred_vector_alignment): New function.
 781         (aarch64_simd_vector_alignment_reachable): Use it instead of
 782         the vector size.
 783         (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
 784         (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
 785         functions.
 786         (MAX_VECT_LEN): Delete.
 787         (expand_vec_perm_d): Add a vec_flags field.
 788         (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
 789         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
 790         (aarch64_evpc_ext): Don't apply a big-endian lane correction
 791         for SVE modes.
 792         (aarch64_evpc_rev): Rename to...
 793         (aarch64_evpc_rev_local): ...this.  Use a predicated operation for SVE.
 794         (aarch64_evpc_rev_global): New function.
 795         (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
 796         (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
 797         MAX_VECT_LEN.
 798         (aarch64_evpc_sve_tbl): New function.
 799         (aarch64_expand_vec_perm_const_1): Update after rename of
 800         aarch64_evpc_rev.  Handle SVE permutes too, trying
 801         aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
 802         than aarch64_evpc_tbl.
 803         (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
 804         (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
 805         (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
 806         (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
 807         (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
 808         (aarch64_expand_sve_vcond): New functions.
 809         (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
 810         of aarch64_vector_mode_p.
 811         (aarch64_dwarf_poly_indeterminate_value): New function.
 812         (aarch64_compute_pressure_classes): Likewise.
 813         (aarch64_can_change_mode_class): Likewise.
 814         (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
 815         (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
 816         (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
 817         (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
 818         (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
 819         (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
 820         * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
 821         (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
 822         constraints.
 823         (Dn, Dl, Dr): Accept const as well as const_vector.
 824         (Dz): Likewise.  Compare against CONST0_RTX.
 825         * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
 826         of "vector" where appropriate.
 827         (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
 828         (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
 829         (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
 830         (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
 831         (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
 832         (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
 833         (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
 834         (v_int_equiv): Extend to SVE modes.
 835         (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
 836         mode attributes.
 837         (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
 838         (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
 839         (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
 840         (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
 841         (SVE_COND_FP_CMP): New int iterators.
 842         (perm_hilo): Handle the new unpack unspecs.
 843         (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
 844         attributes.
 845         * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
 846         (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
 847         (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
 848         (aarch64_equality_operator, aarch64_constant_vector_operand)
 849         (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
 850         (aarch64_sve_nonimmediate_operand): Likewise.
 851         (aarch64_sve_general_operand): Likewise.
 852         (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
 853         (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
 854         (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
 855         (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
 856         (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
 857         (aarch64_sve_float_arith_immediate): Likewise.
 858         (aarch64_sve_float_arith_with_sub_immediate): Likewise.
 859         (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
 860         (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
 861         (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
 862         (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
 863         (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
 864         (aarch64_sve_float_arith_operand): Likewise.
 865         (aarch64_sve_float_arith_with_sub_operand): Likewise.
 866         (aarch64_sve_float_mul_operand): Likewise.
 867         (aarch64_sve_vec_perm_operand): Likewise.
 868         (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
 869         (aarch64_mov_operand): Accept const_poly_int and const_vector.
 870         (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
 871         as well as const_vector.
 872         (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
 873         in file.  Use CONST0_RTX and CONSTM1_RTX.
 874         (aarch64_simd_or_scalar_imm_zero): Likewise.  Add match_codes.
 875         (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
 876         Use aarch64_simd_imm_zero.
 877         * config/aarch64/aarch64-sve.md: New file.
 878         * config/aarch64/aarch64.md: Include it.
 879         (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
 880         (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
 881         (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
 882         (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
 883         (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
 884         (sve): New attribute.
 885         (enabled): Disable instructions with the sve attribute unless
 886         TARGET_SVE.
 887         (movqi, movhi): Pass CONST_POLY_INT operaneds through
 888         aarch64_expand_mov_immediate.
 889         (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
 890         CNT[BHSD] immediates.
 891         (movti): Split CONST_POLY_INT moves into two halves.
 892         (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
 893         Split additions that need a temporary here if the destination
 894         is the stack pointer.
 895         (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
 896         (*add<mode>3_poly_1): New instruction.
 897         (set_clobber_cc): New expander.
 898
 899 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 900
 901         * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
 902         parameter and use it instead of GET_MODE_SIZE (innermode).  Use
 903         inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
 904         Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
 905         GET_MODE_NUNITS (innermode).  Also add a first_elem parameter.
 906         Change innermode from fixed_mode_size to machine_mode.
 907         (simplify_subreg): Update call accordingly.  Handle a constant-sized
 908         subreg of a variable-length CONST_VECTOR.
 909
 910 2018-01-13  Richard Sandiford  <richard.sandiford@linaro.org>
 911             Alan Hayward  <alan.hayward@arm.com>
 912             David Sherwood  <david.sherwood@arm.com>
 913
 914         * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
 915         (add_offset_to_base): New function, split out from...
 916         (create_mem_ref): ...here.  When handling a scale other than 1,
 917         check first whether the address is valid without the offset.
 918         Add it into the base if so, leaving the index and scale as-is.
 919
 920 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
 921
 922         PR c++/83778
 923         * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
 924         fold_for_warn before checking if arg2 is INTEGER_CST.
 925
 926 2018-01-12  Segher Boessenkool  <segher@kernel.crashing.org>
 927
 928         * config/rs6000/predicates.md (load_multiple_operation): Delete.
 929         (store_multiple_operation): Delete.
 930         * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
 931         * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
 932         * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
 933         guarded by TARGET_STRING.
 934         (rs6000_output_load_multiple): Delete.
 935         * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
 936         OPTION_MASK_STRING / TARGET_STRING handling.
 937         (print_operand) <'N', 'O'>: Add comment that these are unused now.
 938         (const rs6000_opt_masks) <"string">: Change mask to 0.
 939         * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
 940         (MASK_STRING): Delete.
 941         * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
 942         parts.  Simplify.
 943         (load_multiple): Delete.
 944         (*ldmsi8): Delete.
 945         (*ldmsi7): Delete.
 946         (*ldmsi6): Delete.
 947         (*ldmsi5): Delete.
 948         (*ldmsi4): Delete.
 949         (*ldmsi3): Delete.
 950         (store_multiple): Delete.
 951         (*stmsi8): Delete.
 952         (*stmsi7): Delete.
 953         (*stmsi6): Delete.
 954         (*stmsi5): Delete.
 955         (*stmsi4): Delete.
 956         (*stmsi3): Delete.
 957         (movmemsi_8reg): Delete.
 958         (corresponding unnamed define_insn): Delete.
 959         (movmemsi_6reg): Delete.
 960         (corresponding unnamed define_insn): Delete.
 961         (movmemsi_4reg): Delete.
 962         (corresponding unnamed define_insn): Delete.
 963         (movmemsi_2reg): Delete.
 964         (corresponding unnamed define_insn): Delete.
 965         (movmemsi_1reg): Delete.
 966         (corresponding unnamed define_insn): Delete.
 967         * config/rs6000/rs6000.opt (mno-string): New.
 968         (mstring): Replace by deprecation warning stub.
 969         * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
 970
 971 2018-01-12  Jakub Jelinek  <jakub@redhat.com>
 972
 973         * regrename.c (regrename_do_replace): If replacing the same
 974         reg multiple times, try to reuse last created gen_raw_REG.
 975
 976         PR debug/81155
 977         * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
 978         main to workaround a bug in GDB.
 979
 980 2018-01-12  Tom de Vries  <tom@codesourcery.com>
 981
 982         PR target/83737
 983         * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
 984
 985 2018-01-12  Vladimir Makarov  <vmakarov@redhat.com>
 986
 987         PR rtl-optimization/80481
 988         * ira-color.c (get_cap_member): New function.
 989         (allocnos_conflict_by_live_ranges_p): Use it.
 990         (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
 991         (setup_slot_coalesced_allocno_live_ranges): Ditto.
 992
 993 2018-01-12  Uros Bizjak  <ubizjak@gmail.com>
 994
 995         PR target/83628
 996         * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
 997         (*saddl_se_1): Ditto.
 998         (*ssubsi_1): Ditto.
 999         (*saddl_se_1): Ditto.
1000
1001 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
1002
1003         * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1004         rather than wi::to_widest for DR_INITs.
1005         * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1006         wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1007         (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1008         INTEGER_CSTs.
1009         (vect_analyze_group_access_1): Note that here.
1010
1011 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
1012
1013         * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1014         polynomial type sizes.
1015
1016 2018-01-12  Richard Sandiford  <richard.sandiford@linaro.org>
1017
1018         * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1019         poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1020         (gimple_add_tmp_var): Likewise.
1021
1022 2018-01-12  Martin Liska  <mliska@suse.cz>
1023
1024         * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1025         (gimple_alloc_sizes): Likewise.
1026         (dump_gimple_statistics): Use PRIu64 in printf format.
1027         * gimple.h: Change uint64_t to int.
1028
1029 2018-01-12  Martin Liska  <mliska@suse.cz>
1030
1031         * tree-core.h: Use uint64_t instead of int.
1032         * tree.c (tree_node_counts): Likewise.
1033         (tree_node_sizes): Likewise.
1034         (dump_tree_statistics): Use PRIu64 in printf format.
1035
1036 2018-01-12  Martin Liska  <mliska@suse.cz>
1037
1038         * Makefile.in: As qsort_chk is implemented in vec.c, add
1039         vec.o to linkage of gencfn-macros.
1040         * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1041         passing the info to record_node_allocation_statistics.
1042         (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1043         and pass the info.
1044         * ggc-common.c (struct ggc_usage): Add operator== and use
1045         it in operator< and compare function.
1046         * mem-stats.h (struct mem_usage): Likewise.
1047         * vec.c (struct vec_usage): Remove operator< and compare
1048         function. Can be simply inherited.
1049
1050 2018-01-12  Martin Jambor  <mjambor@suse.cz>
1051
1052         PR target/81616
1053         * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1054         * tree-ssa-math-opts.c: Include domwalk.h.
1055         (convert_mult_to_fma_1): New function.
1056         (fma_transformation_info): New type.
1057         (fma_deferring_state): Likewise.
1058         (cancel_fma_deferring): New function.
1059         (result_of_phi): Likewise.
1060         (last_fma_candidate_feeds_initial_phi): Likewise.
1061         (convert_mult_to_fma): Added deferring logic, split actual
1062         transformation to convert_mult_to_fma_1.
1063         (math_opts_dom_walker): New type.
1064         (math_opts_dom_walker::after_dom_children): New method, body moved
1065         here from pass_optimize_widening_mul::execute, added deferring logic
1066         bits.
1067         (pass_optimize_widening_mul::execute): Moved most of code to
1068         math_opts_dom_walker::after_dom_children.
1069         * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1070         * config/i386/i386.c (ix86_option_override_internal): Added
1071         maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1072
1073 2018-01-12  Richard Biener  <rguenther@suse.de>
1074
1075         PR debug/83157
1076         * dwarf2out.c (gen_variable_die): Do not reset old_die for
1077         inline instance vars.
1078
1079 2018-01-12  Oleg Endo  <olegendo@gcc.gnu.org>
1080
1081         PR target/81819
1082         * config/rx/rx.c (rx_is_restricted_memory_address):
1083         Handle SUBREG case.
1084
1085 2018-01-12  Richard Biener  <rguenther@suse.de>
1086
1087         PR tree-optimization/80846
1088         * target.def (split_reduction): New target hook.
1089         * targhooks.c (default_split_reduction): New function.
1090         * targhooks.h (default_split_reduction): Declare.
1091         * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1092         target requests first reduce vectors by combining low and high
1093         parts.
1094         * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1095         (get_vectype_for_scalar_type_and_size): Export.
1096         * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1097         * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1098         * doc/tm.texi: Regenerate.
1099         * config/i386/i386.c (ix86_split_reduction): Implement
1100         TARGET_VECTORIZE_SPLIT_REDUCTION.
1101
1102 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
1103
1104         PR target/83368
1105         * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1106         in PIC mode except for TARGET_VXWORKS_RTP.
1107         * config/sparc/sparc.c: Include cfgrtl.h.
1108         (TARGET_INIT_PIC_REG): Define.
1109         (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1110         (sparc_pic_register_p): New predicate.
1111         (sparc_legitimate_address_p): Use it.
1112         (sparc_legitimize_pic_address): Likewise.
1113         (sparc_delegitimize_address): Likewise.
1114         (sparc_mode_dependent_address_p): Likewise.
1115         (gen_load_pcrel_sym): Remove 4th parameter.
1116         (load_got_register): Adjust call to above.  Remove obsolete stuff.
1117         (sparc_expand_prologue): Do not call load_got_register here.
1118         (sparc_flat_expand_prologue): Likewise.
1119         (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1120         (sparc_use_pseudo_pic_reg): New function.
1121         (sparc_init_pic_reg): Likewise.
1122         * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1123         (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1124
1125 2018-01-12  Christophe Lyon  <christophe.lyon@linaro.org>
1126
1127         * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1128         Add item for branch_cost.
1129
1130 2018-01-12  Eric Botcazou  <ebotcazou@adacore.com>
1131
1132         PR rtl-optimization/83565
1133         * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1134         not extend the result to a larger mode for rotate operations.
1135         (num_sign_bit_copies1): Likewise.
1136
1137 2018-01-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
1138
1139         PR target/40411
1140         * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1141         -symbolic.
1142         Use values-Xc.o for -pedantic.
1143         Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1144
1145 2018-01-12  Martin Liska  <mliska@suse.cz>
1146
1147         PR ipa/83054
1148         * ipa-devirt.c (final_warning_record::grow_type_warnings):
1149         New function.
1150         (possible_polymorphic_call_targets): Use it.
1151         (ipa_devirt): Likewise.
1152
1153 2018-01-12  Martin Liska  <mliska@suse.cz>
1154
1155         * profile-count.h (enum profile_quality): Use 0 as invalid
1156         enum value of profile_quality.
1157
1158 2018-01-12  Chung-Ju Wu  <jasonwucj@gmail.com>
1159
1160         * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1161         -mext-string options.
1162
1163 2018-01-12  Richard Biener  <rguenther@suse.de>
1164
1165         * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1166         DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1167         * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1168         Likewise.
1169         * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1170
1171 2018-01-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
1172
1173         * configure.ac (--with-long-double-format): Add support for the
1174         configuration option to change the default long double format on
1175         PowerPC systems.
1176         * config.gcc (powerpc*-linux*-*): Likewise.
1177         * configure: Regenerate.
1178         * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1179         double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1180         used without modification.
1181
1182 2018-01-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
1183
1184         * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1185         (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1186         * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1187         MISC_BUILTIN_SPEC_BARRIER.
1188         (rs6000_init_builtins): Likewise.
1189         * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1190         enum value.
1191         (speculation_barrier): New define_insn.
1192         * doc/extend.texi: Document __builtin_speculation_barrier.
1193
1194 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
1195
1196         PR target/83203
1197         * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1198         is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1199         * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1200         iterators.
1201         (ssescalarmodesuffix): Add 512-bit vectors.  Use "d" or "q" for
1202         integral modes instead of "ss" and "sd".
1203         (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1204         vectors with 32-bit and 64-bit elements.
1205         (vecdupssescalarmodesuffix): New mode attribute.
1206         (vec_dup<mode>): Use it.
1207
1208 2018-01-11  H.J. Lu  <hongjiu.lu@intel.com>
1209
1210         PR target/83330
1211         * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1212         frame if argument is passed on stack.
1213
1214 2018-01-11  Jakub Jelinek  <jakub@redhat.com>
1215
1216         PR target/82682
1217         * ree.c (combine_reaching_defs): Optimize also
1218         reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1219         reg2=any_extend(exp); reg1=reg2;, formatting fix.
1220
1221 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
1222
1223         PR middle-end/83189
1224         * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1225
1226 2018-01-11  Jan Hubicka  <hubicka@ucw.cz>
1227
1228         PR middle-end/83718
1229         * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1230         after they are computed.
1231
1232 2018-01-11  Bin Cheng  <bin.cheng@arm.com>
1233
1234         PR tree-optimization/83695
1235         * gimple-loop-linterchange.cc
1236         (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1237         reset cached scev information after interchange.
1238         (pass_linterchange::execute): Remove call to scev_reset_htab.
1239
1240 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1241
1242         * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1243         vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1244         vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1245         vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1246         vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1247         vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1248         * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1249         vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1250         vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1251         vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1252         vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1253         * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1254         (V_lane_reg): Likewise.
1255         * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1256         New define_expand.
1257         (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1258         (vfmal_lane_low<mode>_intrinsic,
1259         vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1260         vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1261         vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1262         vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1263         vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1264         vfmsl_lane_high<mode>_intrinsic): New define_insns.
1265
1266 2018-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1267
1268         * config/arm/arm-cpus.in (fp16fml): New feature.
1269         (ALL_SIMD): Add fp16fml.
1270         (armv8.2-a): Add fp16fml as an option.
1271         (armv8.3-a): Likewise.
1272         (armv8.4-a): Add fp16fml as part of fp16.
1273         * config/arm/arm.h (TARGET_FP16FML): Define.
1274         * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1275         when appropriate.
1276         * config/arm/arm-modes.def (V2HF): Define.
1277         * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1278         vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1279         vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1280         * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1281         vfmsl_low, vfmsl_high): New set of builtins.
1282         * config/arm/iterators.md (PLUSMINUS): New code iterator.
1283         (vfml_op): New code attribute.
1284         (VFMLHALVES): New int iterator.
1285         (VFML, VFMLSEL): New mode attributes.
1286         (V_reg): Define mapping for V2HF.
1287         (V_hi, V_lo): New mode attributes.
1288         (VF_constraint): Likewise.
1289         (vfml_half, vfml_half_selector): New int attributes.
1290         * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1291         define_expand.
1292         (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1293         vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1294         New define_insn.
1295         * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1296         * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1297         * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1298         * doc/invoke.texi (ARM Options): Document fp16fml.  Update armv8.4-a
1299         documentation.
1300         * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1301         Document new effective target and option set.
1302
1303 2017-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1304
1305         * config/arm/arm-cpus.in (armv8_4): New feature.
1306         (ARMv8_4a): New fgroup.
1307         (armv8.4-a): New arch.
1308         * config/arm/arm-tables.opt: Regenerate.
1309         * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1310         * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1311         * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1312         Add matching rules for -march=armv8.4-a and extensions.
1313         * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1314
1315 2018-01-11  Oleg Endo  <olegendo@gcc.gnu.org>
1316
1317         PR target/81821
1318         * config/rx/rx.md (BW): New mode attribute.
1319         (sync_lock_test_and_setsi): Add mode suffix to insn output.
1320
1321 2018-01-11  Richard Biener  <rguenther@suse.de>
1322
1323         PR tree-optimization/83435
1324         * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1325         * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1326         * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1327
1328 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1329             Alan Hayward  <alan.hayward@arm.com>
1330             David Sherwood  <david.sherwood@arm.com>
1331
1332         * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1333         field.
1334         (aarch64_classify_address): Initialize it.  Track polynomial offsets.
1335         (aarch64_print_address_internal): Use it to check for a zero offset.
1336
1337 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1338             Alan Hayward  <alan.hayward@arm.com>
1339             David Sherwood  <david.sherwood@arm.com>
1340
1341         * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1342         * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1343         Return a poly_int64 rather than a HOST_WIDE_INT.
1344         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1345         rather than a HOST_WIDE_INT.
1346         * config/aarch64/aarch64.h (aarch64_frame): Protect with
1347         HAVE_POLY_INT_H rather than HOST_WIDE_INT.  Change locals_offset,
1348         hard_fp_offset, frame_size, initial_adjust, callee_offset and
1349         final_offset from HOST_WIDE_INT to poly_int64.
1350         * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1351         to_constant when getting the number of units in an Advanced SIMD
1352         mode.
1353         (aarch64_builtin_vectorized_function): Check for a constant number
1354         of units.
1355         * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1356         GET_MODE_SIZE.
1357         (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1358         attribute instead of GET_MODE_NUNITS.
1359         * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1360         (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1361         GET_MODE_SIZE for fixed-size registers.
1362         (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1363         (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1364         (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1365         (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1366         (aarch64_print_operand, aarch64_print_address_internal)
1367         (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1368         (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1369         (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1370         Handle polynomial GET_MODE_SIZE.
1371         (aarch64_hard_regno_caller_save_mode): Likewise.  Return modes
1372         wider than SImode without modification.
1373         (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1374         (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1375         (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1376         passing and returning SVE modes.
1377         (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1378         rather than GEN_INT.
1379         (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1380         rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1381         (aarch64_allocate_and_probe_stack_space): Likewise.
1382         (aarch64_layout_frame): Cope with polynomial offsets.
1383         (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1384         start_offset as a poly_int64 rather than a HOST_WIDE_INT.  Track
1385         polynomial offsets.
1386         (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1387         (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1388         poly_int64 rather than a HOST_WIDE_INT.
1389         (aarch64_get_separate_components, aarch64_process_components)
1390         (aarch64_expand_prologue, aarch64_expand_epilogue)
1391         (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1392         (aarch64_anchor_offset): New function, split out from...
1393         (aarch64_legitimize_address): ...here.
1394         (aarch64_builtin_vectorization_cost): Handle polynomial
1395         TYPE_VECTOR_SUBPARTS.
1396         (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1397         GET_MODE_NUNITS.
1398         (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1399         number of elements from the PARALLEL rather than the mode.
1400         (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1401         rather than GET_MODE_BITSIZE.
1402         (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1403         (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1404         (aarch64_expand_vec_perm_const_1): Handle polynomial
1405         d->perm.length () and d->perm elements.
1406         (aarch64_evpc_tbl): Likewise.  Use nelt rather than GET_MODE_NUNITS.
1407         Apply to_constant to d->perm elements.
1408         (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1409         polynomial CONST_VECTOR_NUNITS.
1410         (aarch64_move_pointer): Take amount as a poly_int64 rather
1411         than an int.
1412         (aarch64_progress_pointer): Avoid temporary variable.
1413         * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1414         the mode attribute instead of GET_MODE.
1415
1416 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1417             Alan Hayward  <alan.hayward@arm.com>
1418             David Sherwood  <david.sherwood@arm.com>
1419
1420         * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1421         x exists before using it.
1422         (aarch64_add_constant_internal): Rename to...
1423         (aarch64_add_offset_1): ...this.  Replace regnum with separate
1424         src and dest rtxes.  Handle the case in which they're different,
1425         including when the offset is zero.  Replace scratchreg with an rtx.
1426         Use 2 additions if there is no spare register into which we can
1427         move a 16-bit constant.
1428         (aarch64_add_constant): Delete.
1429         (aarch64_add_offset): Replace reg with separate src and dest
1430         rtxes.  Take a poly_int64 offset instead of a HOST_WIDE_INT.
1431         Use aarch64_add_offset_1.
1432         (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1433         an rtx rather than an int.  Take the delta as a poly_int64
1434         rather than a HOST_WIDE_INT.  Use aarch64_add_offset.
1435         (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1436         (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1437         aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1438         (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1439         and aarch64_add_sp.
1440         (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1441         aarch64_add_constant.
1442
1443 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1444
1445         * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1446         Use scalar_float_mode.
1447
1448 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1449
1450         * config/aarch64/aarch64-simd.md
1451         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1452         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1453         (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1454         (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1455         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1456         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1457         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1458         (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1459         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1460         (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1461
1462 2018-01-11  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
1463
1464         PR target/83514
1465         * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1466         targ_options->x_arm_arch_string is non NULL.
1467
1468 2018-01-11  Tamar Christina  <tamar.christina@arm.com>
1469
1470         * config/aarch64/aarch64.h
1471         (AARCH64_FL_FOR_ARCH8_4): Add  AARCH64_FL_DOTPROD.
1472
1473 2018-01-11  Sudakshina Das  <sudi.das@arm.com>
1474
1475         PR target/82096
1476         * expmed.c (emit_store_flag_force): Swap if const op0
1477         and change VOIDmode to mode of op0.
1478
1479 2018-01-11  Richard Sandiford  <richard.sandiford@linaro.org>
1480
1481         PR rtl-optimization/83761
1482         * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1483         than bytes to mode_for_size.
1484
1485 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1486
1487         PR middle-end/83189
1488         * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1489         * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1490         profile.
1491
1492 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1493
1494         PR middle-end/83575
1495         * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1496         when in layout mode.
1497         (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1498         * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1499         partition fixup.
1500
1501 2018-01-10  Michael Collison  <michael.collison@arm.com>
1502
1503         * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1504         * config/aarch64/aarch64-option-extension.def: Add
1505         AARCH64_OPT_EXTENSION of 'fp16fml'.
1506         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1507         (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1508         * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1509         * config/aarch64/constraints.md (Ui7): New constraint.
1510         * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1511         (VFMLA_SEL_W): Ditto.
1512         (f16quad): Ditto.
1513         (f16mac1): Ditto.
1514         (VFMLA16_LOW): New int iterator.
1515         (VFMLA16_HIGH): Ditto.
1516         (UNSPEC_FMLAL): New unspec.
1517         (UNSPEC_FMLSL): Ditto.
1518         (UNSPEC_FMLAL2): Ditto.
1519         (UNSPEC_FMLSL2): Ditto.
1520         (f16mac): New code attribute.
1521         * config/aarch64/aarch64-simd-builtins.def
1522         (aarch64_fmlal_lowv2sf): Ditto.
1523         (aarch64_fmlsl_lowv2sf): Ditto.
1524         (aarch64_fmlalq_lowv4sf): Ditto.
1525         (aarch64_fmlslq_lowv4sf): Ditto.
1526         (aarch64_fmlal_highv2sf): Ditto.
1527         (aarch64_fmlsl_highv2sf): Ditto.
1528         (aarch64_fmlalq_highv4sf): Ditto.
1529         (aarch64_fmlslq_highv4sf): Ditto.
1530         (aarch64_fmlal_lane_lowv2sf): Ditto.
1531         (aarch64_fmlsl_lane_lowv2sf): Ditto.
1532         (aarch64_fmlal_laneq_lowv2sf): Ditto.
1533         (aarch64_fmlsl_laneq_lowv2sf): Ditto.
1534         (aarch64_fmlalq_lane_lowv4sf): Ditto.
1535         (aarch64_fmlsl_lane_lowv4sf): Ditto.
1536         (aarch64_fmlalq_laneq_lowv4sf): Ditto.
1537         (aarch64_fmlsl_laneq_lowv4sf): Ditto.
1538         (aarch64_fmlal_lane_highv2sf): Ditto.
1539         (aarch64_fmlsl_lane_highv2sf): Ditto.
1540         (aarch64_fmlal_laneq_highv2sf): Ditto.
1541         (aarch64_fmlsl_laneq_highv2sf): Ditto.
1542         (aarch64_fmlalq_lane_highv4sf): Ditto.
1543         (aarch64_fmlsl_lane_highv4sf): Ditto.
1544         (aarch64_fmlalq_laneq_highv4sf): Ditto.
1545         (aarch64_fmlsl_laneq_highv4sf): Ditto.
1546         * config/aarch64/aarch64-simd.md:
1547         (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
1548         (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1549         (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1550         (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1551         (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1552         (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1553         (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1554         (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1555         (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1556         (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1557         (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1558         (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1559         (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1560         (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1561         (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1562         (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1563         (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1564         (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1565         (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1566         (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1567         * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1568         (vfmlsl_low_u32): Ditto.
1569         (vfmlalq_low_u32): Ditto.
1570         (vfmlslq_low_u32): Ditto.
1571         (vfmlal_high_u32): Ditto.
1572         (vfmlsl_high_u32): Ditto.
1573         (vfmlalq_high_u32): Ditto.
1574         (vfmlslq_high_u32): Ditto.
1575         (vfmlal_lane_low_u32): Ditto.
1576         (vfmlsl_lane_low_u32): Ditto.
1577         (vfmlal_laneq_low_u32): Ditto.
1578         (vfmlsl_laneq_low_u32): Ditto.
1579         (vfmlalq_lane_low_u32): Ditto.
1580         (vfmlslq_lane_low_u32): Ditto.
1581         (vfmlalq_laneq_low_u32): Ditto.
1582         (vfmlslq_laneq_low_u32): Ditto.
1583         (vfmlal_lane_high_u32): Ditto.
1584         (vfmlsl_lane_high_u32): Ditto.
1585         (vfmlal_laneq_high_u32): Ditto.
1586         (vfmlsl_laneq_high_u32): Ditto.
1587         (vfmlalq_lane_high_u32): Ditto.
1588         (vfmlslq_lane_high_u32): Ditto.
1589         (vfmlalq_laneq_high_u32): Ditto.
1590         (vfmlslq_laneq_high_u32): Ditto.
1591         * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1592         (AARCH64_FL_FOR_ARCH8_4): New.
1593         (AARCH64_ISA_F16FML): New ISA flag.
1594         (TARGET_F16FML): New feature flag for fp16fml.
1595         (doc/invoke.texi): Document new fp16fml option.
1596
1597 2018-01-10  Michael Collison  <michael.collison@arm.com>
1598
1599         * config/aarch64/aarch64-builtins.c:
1600         (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1601         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1602         (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1603         * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1604         (AARCH64_ISA_SHA3): New ISA flag.
1605         (TARGET_SHA3): New feature flag for sha3.
1606         * config/aarch64/iterators.md (sha512_op): New int attribute.
1607         (CRYPTO_SHA512): New int iterator.
1608         (UNSPEC_SHA512H): New unspec.
1609         (UNSPEC_SHA512H2): Ditto.
1610         (UNSPEC_SHA512SU0): Ditto.
1611         (UNSPEC_SHA512SU1): Ditto.
1612         * config/aarch64/aarch64-simd-builtins.def
1613         (aarch64_crypto_sha512hqv2di): New builtin.
1614         (aarch64_crypto_sha512h2qv2di): Ditto.
1615         (aarch64_crypto_sha512su0qv2di): Ditto.
1616         (aarch64_crypto_sha512su1qv2di): Ditto.
1617         (aarch64_eor3qv8hi): Ditto.
1618         (aarch64_rax1qv2di): Ditto.
1619         (aarch64_xarqv2di): Ditto.
1620         (aarch64_bcaxqv8hi): Ditto.
1621         * config/aarch64/aarch64-simd.md:
1622         (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1623         (aarch64_crypto_sha512su0qv2di): Ditto.
1624         (aarch64_crypto_sha512su1qv2di): Ditto.
1625         (aarch64_eor3qv8hi): Ditto.
1626         (aarch64_rax1qv2di): Ditto.
1627         (aarch64_xarqv2di): Ditto.
1628         (aarch64_bcaxqv8hi): Ditto.
1629         * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1630         (vsha512h2q_u64): Ditto.
1631         (vsha512su0q_u64): Ditto.
1632         (vsha512su1q_u64): Ditto.
1633         (veor3q_u16): Ditto.
1634         (vrax1q_u64): Ditto.
1635         (vxarq_u64): Ditto.
1636         (vbcaxq_u16): Ditto.
1637         * config/arm/types.md (crypto_sha512): New type attribute.
1638         (crypto_sha3): Ditto.
1639         (doc/invoke.texi): Document new sha3 option.
1640
1641 2018-01-10  Michael Collison  <michael.collison@arm.com>
1642
1643         * config/aarch64/aarch64-builtins.c:
1644         (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1645         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1646         (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1647         (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1648         * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1649         (AARCH64_ISA_SM4): New ISA flag.
1650         (TARGET_SM4): New feature flag for sm4.
1651         * config/aarch64/aarch64-simd-builtins.def
1652         (aarch64_sm3ss1qv4si): Ditto.
1653         (aarch64_sm3tt1aq4si): Ditto.
1654         (aarch64_sm3tt1bq4si): Ditto.
1655         (aarch64_sm3tt2aq4si): Ditto.
1656         (aarch64_sm3tt2bq4si): Ditto.
1657         (aarch64_sm3partw1qv4si): Ditto.
1658         (aarch64_sm3partw2qv4si): Ditto.
1659         (aarch64_sm4eqv4si): Ditto.
1660         (aarch64_sm4ekeyqv4si): Ditto.
1661         * config/aarch64/aarch64-simd.md:
1662         (aarch64_sm3ss1qv4si): Ditto.
1663         (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1664         (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1665         (aarch64_sm4eqv4si): Ditto.
1666         (aarch64_sm4ekeyqv4si): Ditto.
1667         * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1668         (sm3part_op): Ditto.
1669         (CRYPTO_SM3TT): Ditto.
1670         (CRYPTO_SM3PART): Ditto.
1671         (UNSPEC_SM3SS1): New unspec.
1672         (UNSPEC_SM3TT1A): Ditto.
1673         (UNSPEC_SM3TT1B): Ditto.
1674         (UNSPEC_SM3TT2A): Ditto.
1675         (UNSPEC_SM3TT2B): Ditto.
1676         (UNSPEC_SM3PARTW1): Ditto.
1677         (UNSPEC_SM3PARTW2): Ditto.
1678         (UNSPEC_SM4E): Ditto.
1679         (UNSPEC_SM4EKEY): Ditto.
1680         * config/aarch64/constraints.md (Ui2): New constraint.
1681         * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1682         * config/arm/types.md (crypto_sm3): New type attribute.
1683         (crypto_sm4): Ditto.
1684         * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1685         (vsm3tt1aq_u32): Ditto.
1686         (vsm3tt1bq_u32): Ditto.
1687         (vsm3tt2aq_u32): Ditto.
1688         (vsm3tt2bq_u32): Ditto.
1689         (vsm3partw1q_u32): Ditto.
1690         (vsm3partw2q_u32): Ditto.
1691         (vsm4eq_u32): Ditto.
1692         (vsm4ekeyq_u32): Ditto.
1693         (doc/invoke.texi): Document new sm4 option.
1694
1695 2018-01-10  Michael Collison  <michael.collison@arm.com>
1696
1697         * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1698         * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1699         (AARCH64_FL_FOR_ARCH8_4): New.
1700         (AARCH64_FL_V8_4): New flag.
1701         (doc/invoke.texi): Document new armv8.4-a option.
1702
1703 2018-01-10  Michael Collison  <michael.collison@arm.com>
1704
1705         * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1706         (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1707         (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1708         * config/aarch64/aarch64-option-extension.def: Add
1709         AARCH64_OPT_EXTENSION of 'sha2'.
1710         (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1711         (crypto): Disable sha2 and aes if crypto disabled.
1712         (crypto): Enable aes and sha2 if enabled.
1713         (simd): Disable sha2 and aes if simd disabled.
1714         * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1715         New flags.
1716         (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1717         (TARGET_SHA2): New feature flag for sha2.
1718         (TARGET_AES): New feature flag for aes.
1719         * config/aarch64/aarch64-simd.md:
1720         (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1721         conditional on TARGET_AES.
1722         (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1723         (aarch64_crypto_sha1hsi): Make pattern conditional
1724         on TARGET_SHA2.
1725         (aarch64_crypto_sha1hv4si): Ditto.
1726         (aarch64_be_crypto_sha1hv4si): Ditto.
1727         (aarch64_crypto_sha1su1v4si): Ditto.
1728         (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1729         (aarch64_crypto_sha1su0v4si): Ditto.
1730         (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1731         (aarch64_crypto_sha256su0v4si): Ditto.
1732         (aarch64_crypto_sha256su1v4si): Ditto.
1733         (doc/invoke.texi): Document new aes and sha2 options.
1734
1735 2018-01-10  Martin Sebor  <msebor@redhat.com>
1736
1737         PR tree-optimization/83781
1738         * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1739         as string arrays.
1740
1741 2018-01-11  Martin Sebor  <msebor@gmail.com>
1742             Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
1743
1744         PR tree-optimization/83501
1745         PR tree-optimization/81703
1746
1747         * tree-ssa-strlen.c (get_string_cst): Rename...
1748         (get_string_len): ...to this.  Handle global constants.
1749         (handle_char_store): Adjust.
1750
1751 2018-01-10  Kito Cheng  <kito.cheng@gmail.com>
1752             Jim Wilson  <jimw@sifive.com>
1753
1754         * config/riscv/riscv-protos.h (riscv_output_return): New.
1755         * config/riscv/riscv.c (struct machine_function): New naked_p field.
1756         (riscv_attribute_table, riscv_output_return),
1757         (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1758         (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1759         (riscv_compute_frame_info): Only compute frame->mask if not a naked
1760         function.
1761         (riscv_expand_prologue): Add early return for naked function.
1762         (riscv_expand_epilogue): Likewise.
1763         (riscv_function_ok_for_sibcall): Return false for naked function.
1764         (riscv_set_current_function): New.
1765         (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
1766         (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
1767         * config/riscv/riscv.md (simple_return): Call riscv_output_return.
1768         * doc/extend.texi (RISC-V Function Attributes): New.
1769
1770 2018-01-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
1771
1772         * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
1773         check for 128-bit long double before checking TCmode.
1774         * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
1775         128-bit long doubles before checking TFmode or TCmode.
1776         (FLOAT128_IBM_P): Likewise.
1777
1778 2018-01-10  Martin Sebor  <msebor@redhat.com>
1779
1780         PR tree-optimization/83671
1781         * builtins.c (c_strlen): Unconditionally return zero for the empty
1782         string.
1783         Use -Warray-bounds for warnings.
1784         * gimple-fold.c (get_range_strlen): Handle non-constant lengths
1785         for non-constant array indices with COMPONENT_REF, arrays of
1786         arrays, and pointers to arrays.
1787         (gimple_fold_builtin_strlen): Determine and set length range for
1788         non-constant character arrays.
1789
1790 2018-01-10  Aldy Hernandez  <aldyh@redhat.com>
1791
1792         PR middle-end/81897
1793         * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
1794         empty blocks.
1795
1796 2018-01-10  Eric Botcazou  <ebotcazou@adacore.com>
1797
1798         * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
1799
1800 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
1801
1802         PR target/83399
1803         * config/rs6000/rs6000.c (print_operand) <'y'>: Use
1804         VECTOR_MEM_ALTIVEC_OR_VSX_P.
1805         * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
1806         indexed_or_indirect_operand predicate.
1807         (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
1808         (*vsx_le_perm_load_v8hi): Likewise.
1809         (*vsx_le_perm_load_v16qi): Likewise.
1810         (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
1811         (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
1812         (*vsx_le_perm_store_v8hi): Likewise.
1813         (*vsx_le_perm_store_v16qi): Likewise.
1814         (eight unnamed splitters): Likewise.
1815
1816 2018-01-10  Peter Bergner  <bergner@vnet.ibm.com>
1817
1818         * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
1819         * config/rs6000/emmintrin.h: Likewise.
1820         * config/rs6000/mmintrin.h: Likewise.
1821         * config/rs6000/xmmintrin.h: Likewise.
1822
1823 2018-01-10  David Malcolm  <dmalcolm@redhat.com>
1824
1825         PR c++/43486
1826         * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
1827         "public_flag".
1828         * tree.c (tree_nop_conversion): Return true for location wrapper
1829         nodes.
1830         (maybe_wrap_with_location): New function.
1831         (selftest::check_strip_nops): New function.
1832         (selftest::test_location_wrappers): New function.
1833         (selftest::tree_c_tests): Call it.
1834         * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
1835         (maybe_wrap_with_location): New decl.
1836         (EXPR_LOCATION_WRAPPER_P): New macro.
1837         (location_wrapper_p): New inline function.
1838         (tree_strip_any_location_wrapper): New inline function.
1839
1840 2018-01-10  H.J. Lu  <hongjiu.lu@intel.com>
1841
1842         PR target/83735
1843         * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
1844         stack_realign_offset for the largest alignment of stack slot
1845         actually used.
1846         (ix86_find_max_used_stack_alignment): New function.
1847         (ix86_finalize_stack_frame_flags): Use it.  Set
1848         max_used_stack_alignment if we don't realign stack.
1849         * config/i386/i386.h (machine_function): Add
1850         max_used_stack_alignment.
1851
1852 2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>
1853
1854         * config/arm/arm.opt (-mbranch-cost): New option.
1855         * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
1856         account.
1857
1858 2018-01-10  Segher Boessenkool  <segher@kernel.crashing.org>
1859
1860         PR target/83629
1861         * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
1862         load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
1863
1864 2018-01-10  Richard Biener  <rguenther@suse.de>
1865
1866         PR debug/83765
1867         * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
1868         early out so it also covers the case where we have a non-NULL
1869         origin.
1870
1871 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
1872
1873         PR tree-optimization/83753
1874         * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
1875         for non-strided grouped accesses if the number of elements is 1.
1876
1877 2018-01-10  Jan Hubicka  <hubicka@ucw.cz>
1878
1879         PR target/81616
1880         * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
1881         * i386.h (TARGET_USE_GATHER): Define.
1882         * x86-tune.def (X86_TUNE_USE_GATHER): New.
1883
1884 2018-01-10  Martin Liska  <mliska@suse.cz>
1885
1886         PR bootstrap/82831
1887         * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
1888         * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
1889         partitioning.
1890         * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
1891         CLEANUP_NO_PARTITIONING is not set.
1892
1893 2018-01-10  Richard Sandiford  <richard.sandiford@linaro.org>
1894
1895         * doc/rtl.texi: Remove documentation of (const ...) wrappers
1896         for vectors, as a partial revert of r254296.
1897         * rtl.h (const_vec_p): Delete.
1898         (const_vec_duplicate_p): Don't test for vector CONSTs.
1899         (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
1900         * expmed.c (make_tree): Likewise.
1901
1902         Revert:
1903         * common.md (E, F): Use CONSTANT_P instead of checking for
1904         CONST_VECTOR.
1905         * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
1906         checking for CONST_VECTOR.
1907
1908 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
1909
1910         PR middle-end/83575
1911         * predict.c (force_edge_cold): Handle in more sane way edges
1912         with no prediction.
1913
1914 2018-01-09  Carl Love  <cel@us.ibm.com>
1915
1916         * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
1917         V4SI, V4SF types.
1918         (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
1919         * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
1920         VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
1921         VMRGOW_V2DI, VMRGOW_V2DF.  Remove definition for VMRGOW.
1922         * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
1923         P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW):  Add definitions.
1924         * config/rs6000/rs6000-protos.h: Add extern defition for
1925         rs6000_generate_float2_double_code.
1926         * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
1927         function.
1928         * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
1929         (float2_v2df): Add define_expand.
1930
1931 2018-01-09  Uros Bizjak  <ubizjak@gmail.com>
1932
1933         PR target/83628
1934         * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
1935         op_mode in the force_to_mode call.
1936
1937 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1938
1939         * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
1940         instead of checking each element individually.
1941         (aarch64_evpc_uzp): Likewise.
1942         (aarch64_evpc_zip): Likewise.
1943         (aarch64_evpc_ext): Likewise.
1944         (aarch64_evpc_rev): Likewise.
1945         (aarch64_evpc_dup): Test the encoding for a single duplicated element,
1946         instead of checking each element individually.  Return true without
1947         generating rtl if
1948         (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
1949         whether all selected elements come from the same input, instead of
1950         checking each element individually.  Remove calls to gen_rtx_REG,
1951         start_sequence and end_sequence and instead assert that no rtl is
1952         generated.
1953
1954 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1955
1956         * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
1957         order of HIGH and CONST checks.
1958
1959 2018-01-09  Richard Sandiford  <richard.sandiford@linaro.org>
1960
1961         * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
1962         if the destination isn't an SSA_NAME.
1963
1964 2018-01-09  Richard Biener  <rguenther@suse.de>
1965
1966         PR tree-optimization/83668
1967         * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
1968         move prologue...
1969         (canonicalize_loop_form): ... here, renamed from ...
1970         (canonicalize_loop_closed_ssa_form): ... this and amended to
1971         swap successor edges for loop exit blocks to make us use
1972         the RPO order we need for initial schedule generation.
1973
1974 2018-01-09  Joseph Myers  <joseph@codesourcery.com>
1975
1976         PR tree-optimization/64811
1977         * match.pd: When optimizing comparisons with Inf, avoid
1978         introducing or losing exceptions from comparisons with NaN.
1979
1980 2018-01-09  Martin Liska  <mliska@suse.cz>
1981
1982         PR sanitizer/82517
1983         * asan.c (shadow_mem_size): Add gcc_assert.
1984
1985 2018-01-09  Georg-Johann Lay  <avr@gjlay.de>
1986
1987         Don't save registers in main().
1988
1989         PR target/83738
1990         * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
1991         * config/avr/avr.opt (-mmain-is-OS_task): New target option.
1992         * config/avr/avr.c (avr_set_current_function): Don't error if
1993         naked, OS_task or OS_main are specified at the same time.
1994         (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
1995         OS_main.
1996         (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
1997         attribute.
1998         * common/config/avr/avr-common.c (avr_option_optimization_table):
1999         Switch on -mmain-is-OS_task for optimizing compilations.
2000
2001 2018-01-09  Richard Biener  <rguenther@suse.de>
2002
2003         PR tree-optimization/83572
2004         * graphite.c: Include cfganal.h.
2005         (graphite_transform_loops): Connect infinite loops to exit
2006         and remove fake edges at the end.
2007
2008 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
2009
2010         * ipa-inline.c (edge_badness): Revert accidental checkin.
2011
2012 2018-01-09  Jan Hubicka  <hubicka@ucw.cz>
2013
2014         PR ipa/80763
2015         * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2016         symbols; not inline clones.
2017
2018 2018-01-09  Jakub Jelinek  <jakub@redhat.com>
2019
2020         PR target/83507
2021         * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2022         hard registers.  Formatting fixes.
2023
2024         PR preprocessor/83722
2025         * gcc.c (try_generate_repro): Pass
2026         &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2027         &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2028         do_report_bug.
2029
2030 2018-01-08  Monk Chiang  <sh.chiang04@gmail.com>
2031             Kito Cheng  <kito.cheng@gmail.com>
2032
2033         * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2034         (riscv_leaf_function_p): Delete.
2035         (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2036
2037 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
2038
2039         * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2040         function.
2041         (do_ifelse): New function.
2042         (do_isel): New function.
2043         (do_sub3): New function.
2044         (do_add3): New function.
2045         (do_load_mask_compare): New function.
2046         (do_overlap_load_compare): New function.
2047         (expand_compare_loop): New function.
2048         (expand_block_compare): Call expand_compare_loop() when appropriate.
2049         * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2050         option description.
2051         (-mblock-compare-inline-loop-limit): New option.
2052
2053 2018-01-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
2054
2055         PR target/83677
2056         * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2057         Reverse order of second and third operands in first alternative.
2058         * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2059         of first and second elements in UNSPEC_VPERMR vector.
2060         (altivec_expand_vec_perm_le): Likewise.
2061
2062 2017-01-08  Jeff Law  <law@redhat.com>
2063
2064         PR rtl-optimizatin/81308
2065         * tree-switch-conversion.c (cfg_altered): New file scoped static.
2066         (process_switch): If group_case_labels makes a change, then set
2067         cfg_altered.
2068         (pass_convert_switch::execute): If a switch is converted, then
2069         set cfg_altered.  Return TODO_cfg_cleanup if cfg_altered is true.
2070
2071         PR rtl-optimization/81308
2072         * recog.c (split_all_insns): Conditionally cleanup the CFG after
2073         splitting insns.
2074
2075 2018-01-08  Vidya Praveen  <vidyapraveen@arm.com>
2076
2077         PR target/83663 - Revert r255946
2078         * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2079         generation for cases where splatting a value is not useful.
2080         * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2081         across a vec_duplicate and a paradoxical subreg forming a vector
2082         mode to a vec_concat.
2083
2084 2018-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2085
2086         * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2087         -march=armv8.3-a variants.
2088         * config/arm/t-multilib: Likewise.
2089         * config/arm/t-arm-elf: Likewise.  Handle dotprod extension.
2090
2091 2018-01-08  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
2092
2093         * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2094         to generate rtl.
2095         (cceq_ior_compare_complement): Give it a name so I can use it, and
2096         change boolean_or_operator predicate to boolean_operator so it can
2097         be used to generate a crand.
2098         (eqne): New code iterator.
2099         (bd/bd_neg): New code_attrs.
2100         (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2101         a single define_insn.
2102         (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2103         decrement (bdnzt/bdnzf/bdzt/bdzf).
2104         * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2105         with the new names of the branch decrement patterns, and added the
2106         names of the branch decrement conditional patterns.
2107
2108 2018-01-08  Richard Biener  <rguenther@suse.de>
2109
2110         PR tree-optimization/83563
2111         * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2112         cache.
2113
2114 2018-01-08  Richard Biener  <rguenther@suse.de>
2115
2116         PR middle-end/83713
2117         * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2118
2119 2018-01-08  Richard Biener  <rguenther@suse.de>
2120
2121         PR tree-optimization/83685
2122         * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2123         references to abnormals.
2124
2125 2018-01-08  Richard Biener  <rguenther@suse.de>
2126
2127         PR lto/83719
2128         * dwarf2out.c (output_indirect_strings): Handle empty
2129         skeleton_debug_str_hash.
2130         (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2131
2132 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
2133
2134         * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2135         (emit_store_direct): Likewise.
2136         (arc_trampoline_adjust_address): Likewise.
2137         (arc_asm_trampoline_template): New function.
2138         (arc_initialize_trampoline): Use asm_trampoline_template.
2139         (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2140         * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2141         * config/arc/arc.md (flush_icache): Delete pattern.
2142
2143 2018-01-08  Claudiu Zissulescu  <claziss@synopsys.com>
2144
2145         * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2146         * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2147         munaligned-access.
2148
2149 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2150
2151         PR target/83681
2152         * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2153         by not USED_FOR_TARGET.
2154         (make_pass_resolve_sw_modes): Likewise.
2155
2156 2018-01-08  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2157
2158         * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2159         USED_FOR_TARGET.
2160
2161 2018-01-08  Richard Biener  <rguenther@suse.de>
2162
2163         PR middle-end/83580
2164         * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2165
2166 2018-01-08  Richard Biener  <rguenther@suse.de>
2167
2168         PR middle-end/83517
2169         * match.pd ((t * 2) / 2) -> t): Add missing :c.
2170
2171 2018-01-06  Aldy Hernandez  <aldyh@redhat.com>
2172
2173         PR middle-end/81897
2174         * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2175         basic blocks with a small number of successors.
2176         (convert_control_dep_chain_into_preds): Improve handling of
2177         forwarder blocks.
2178         (dump_predicates): Split apart into...
2179         (dump_pred_chain): ...here...
2180         (dump_pred_info): ...and here.
2181         (can_one_predicate_be_invalidated_p): Add debugging printfs.
2182         (can_chain_union_be_invalidated_p): Improve check for invalidation
2183         of paths.
2184         (uninit_uses_cannot_happen): Avoid unnecessary if
2185         convert_control_dep_chain_into_preds yielded nothing.
2186
2187 2018-01-06  Martin Sebor  <msebor@redhat.com>
2188
2189         PR tree-optimization/83640
2190         * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2191         subtracting negative offset from size.
2192         (builtin_access::overlap): Adjust offset bounds of the access to fall
2193         within the size of the object if possible.
2194
2195 2018-01-06  Richard Sandiford  <richard.sandiford@linaro.org>
2196
2197         PR rtl-optimization/83699
2198         * expmed.c (extract_bit_field_1): Restrict the vector usage of
2199         extract_bit_field_as_subreg to cases in which the extracted
2200         value is also a vector.
2201
2202         * lra-constraints.c (process_alt_operands): Test for the equivalence
2203         substitutions when detecting a possible reload cycle.
2204
2205 2018-01-06  Jakub Jelinek  <jakub@redhat.com>
2206
2207         PR debug/83480
2208         * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2209         by default if flag_selective_schedling{,2}.  Formatting fixes.
2210
2211         PR rtl-optimization/83682
2212         * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2213         if it has non-VECTOR_MODE element mode.
2214         (vec_duplicate_p): Likewise.
2215
2216         PR middle-end/83694
2217         * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2218         and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2219
2220 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
2221
2222         PR target/83604
2223         * config/i386/i386-builtin.def
2224         (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2225         __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2226         Require also OPTION_MASK_ISA_AVX512F in addition to
2227         OPTION_MASK_ISA_GFNI.
2228         (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2229         __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2230         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2231         to OPTION_MASK_ISA_GFNI.
2232         (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2233         OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2234         OPTION_MASK_ISA_AVX512BW.
2235         (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2236         OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2237         addition to OPTION_MASK_ISA_GFNI.
2238         (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2239         __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2240         Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2241         to OPTION_MASK_ISA_GFNI.
2242         * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2243         a requirement for all ISAs rather than any of them with a few
2244         exceptions.
2245         (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2246         processing.
2247         (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2248         bitmasks to be enabled with 3 exceptions, instead of requiring any
2249         enabled ISA with lots of exceptions.
2250         * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2251         vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2252         Change avx512bw in isa attribute to avx512f.
2253         * config/i386/sgxintrin.h: Add license boilerplate.
2254         * config/i386/vaesintrin.h: Likewise.  Fix macro spelling __AVX512F
2255         to __AVX512F__ and __AVX512VL to __AVX512VL__.
2256         (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2257         _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2258         defined.
2259         * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2260         _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2261         temporarily sse2 rather than sse if not enabled already.
2262
2263         PR target/83604
2264         * config/i386/sse.md (VI248_VLBW): Rename to ...
2265         (VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
2266         (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2267         vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2268         vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2269         vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2270         mode iterator instead of VI248_VLBW.
2271
2272 2018-01-05  Jan Hubicka  <hubicka@ucw.cz>
2273
2274         * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2275         (record_modified): Skip clobbers; add debug output.
2276         (param_change_prob): Use sreal frequencies.
2277
2278 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
2279
2280         * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2281         punt for user-aligned variables.
2282
2283 2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>
2284
2285         * tree-chrec.c (chrec_contains_symbols): Return true for
2286         POLY_INT_CST.
2287
2288 2018-01-05  Sudakshina Das  <sudi.das@arm.com>
2289
2290         PR target/82439
2291         * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2292         of (x|y) == x for BICS pattern.
2293
2294 2018-01-05  Jakub Jelinek  <jakub@redhat.com>
2295
2296         PR tree-optimization/83605
2297         * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2298         (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2299         can throw.
2300
2301 2018-01-05  Sebastian Huber  <sebastian.huber@embedded-brains.de>
2302
2303         * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2304         * config/epiphany/rtems.h: New file.
2305
2306 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2307             Uros Bizjak  <ubizjak@gmail.com>
2308
2309         PR target/83554
2310         * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2311         QIreg_operand instead of register_operand predicate.
2312         * config/i386/i386.c (ix86_rop_should_change_byte_p,
2313         set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2314         comments instead of -fmitigate[-_]rop.
2315
2316 2018-01-04  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
2317
2318         PR bootstrap/81926
2319         * cgraphunit.c (symbol_table::compile): Switch to text_section
2320         before calling assembly_start debug hook.
2321         * run-rtl-passes.c (run_rtl_passes): Likewise.
2322         Include output.h.
2323
2324 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2325
2326         * tree-vrp.c (extract_range_from_binary_expr_1): Check
2327         range_int_cst_p rather than !symbolic_range_p before calling
2328         extract_range_from_multiplicative_op_1.
2329
2330 2017-01-04  Jeff Law  <law@redhat.com>
2331
2332         * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2333         redundant test in assertion.
2334
2335 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2336
2337         * doc/rtl.texi: Document machine_mode wrapper classes.
2338
2339 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2340
2341         * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2342         using tree_to_uhwi.
2343
2344 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2345
2346         * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2347         the VEC_PERM_EXPR fold to fail.
2348
2349 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2350
2351         PR debug/83585
2352         * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2353         to switched_sections.
2354
2355 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2356
2357         PR target/83680
2358         * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2359         test for d.testing.
2360
2361 2018-01-04  Peter Bergner  <bergner@vnet.ibm.com>
2362
2363         PR target/83387
2364         * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2365         allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2366
2367 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2368
2369         PR debug/83666
2370         * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2371         is BLKmode and bitpos not zero or mode change is needed.
2372
2373 2018-01-04  Richard Sandiford  <richard.sandiford@linaro.org>
2374
2375         PR target/83675
2376         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2377         TARGET_VIS2.
2378
2379 2018-01-04  Uros Bizjak  <ubizjak@gmail.com>
2380
2381         PR target/83628
2382         * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2383         instead of MULT rtx.  Update all corresponding splitters.
2384         (*saddl_se): Ditto.
2385         (*ssub<modesuffix>): Ditto.
2386         (*ssubl_se): Ditto.
2387         (*cmp_sadd_di): Update split patterns.
2388         (*cmp_sadd_si): Ditto.
2389         (*cmp_sadd_sidi): Ditto.
2390         (*cmp_ssub_di): Ditto.
2391         (*cmp_ssub_si): Ditto.
2392         (*cmp_ssub_sidi): Ditto.
2393         * config/alpha/predicates.md (const23_operand): New predicate.
2394         * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2395         Look for ASHIFT, not MULT inner operand.
2396         (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2397
2398 2018-01-04  Martin Liska  <mliska@suse.cz>
2399
2400         PR gcov-profile/83669
2401         * gcov.c (output_intermediate_file): Add version to intermediate
2402         gcov file.
2403         * doc/gcov.texi: Document new field 'version' in intermediate
2404         file format. Fix location of '-k' option of gcov command.
2405
2406 2018-01-04  Martin Liska  <mliska@suse.cz>
2407
2408         PR ipa/82352
2409         * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2410
2411 2018-01-04  Jakub Jelinek  <jakub@redhat.com>
2412
2413         * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2414
2415 2018-01-03  Martin Sebor  <msebor@redhat.com>
2416
2417         PR tree-optimization/83655
2418         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2419         checking calls with invalid arguments.
2420
2421 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2422
2423         * tree-vect-stmts.c (vect_get_store_rhs): New function.
2424         (vectorizable_mask_load_store): Delete.
2425         (vectorizable_call): Return false for masked loads and stores.
2426         (vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
2427         instead of gimple_assign_rhs1.
2428         (vectorizable_load): Handle IFN_MASK_LOAD.
2429         (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2430
2431 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2432
2433         * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2434         split out from..,
2435         (vectorizable_mask_load_store): ...here.
2436         (vectorizable_load): ...and here.
2437
2438 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2439
2440         * tree-vect-stmts.c (vect_build_all_ones_mask)
2441         (vect_build_zero_merge_argument): New functions, split out from...
2442         (vectorizable_load): ...here.
2443
2444 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2445
2446         * tree-vect-stmts.c (vect_check_store_rhs): New function,
2447         split out from...
2448         (vectorizable_mask_load_store): ...here.
2449         (vectorizable_store): ...and here.
2450
2451 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2452
2453         * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2454         split out from...
2455         (vectorizable_mask_load_store): ...here.
2456
2457 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2458
2459         * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2460         (vect_model_store_cost): Take a vec_load_store_type instead of a
2461         vect_def_type.
2462         * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2463         (vect_model_store_cost): Take a vec_load_store_type instead of a
2464         vect_def_type.
2465         (vectorizable_mask_load_store): Update accordingly.
2466         (vectorizable_store): Likewise.
2467         * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2468
2469 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2470
2471         * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2472         IFN_MASK_LOAD calls here rather than...
2473         * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2474
2475 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2476             Alan Hayward  <alan.hayward@arm.com>
2477             David Sherwood  <david.sherwood@arm.com>
2478
2479         * expmed.c (extract_bit_field_1): For vector extracts,
2480         fall back to extract_bit_field_as_subreg if vec_extract
2481         isn't available.
2482
2483 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2484             Alan Hayward  <alan.hayward@arm.com>
2485             David Sherwood  <david.sherwood@arm.com>
2486
2487         * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2488         they are variable or constant sized.
2489         (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2490         slots for constant-sized data.
2491
2492 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2493             Alan Hayward  <alan.hayward@arm.com>
2494             David Sherwood  <david.sherwood@arm.com>
2495
2496         * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2497         handling COND_EXPRs with boolean comparisons, try to find a better
2498         basis for the mask type than the boolean itself.
2499
2500 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2501
2502         * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2503         is calculated and how it can be overridden.
2504         * genmodes.c (max_bitsize_mode_any_mode): New variable.
2505         (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2506         if defined.
2507         (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2508         if nonzero.
2509
2510 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2511             Alan Hayward  <alan.hayward@arm.com>
2512             David Sherwood  <david.sherwood@arm.com>
2513
2514         * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
2515         Remove the mode argument.
2516         (aarch64_simd_valid_immediate): Remove the mode and inverse
2517         arguments.
2518         * config/aarch64/iterators.md (bitsize): New iterator.
2519         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
2520         (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
2521         * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
2522         aarch64_simd_valid_immediate.
2523         * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
2524         (aarch64_reg_or_bic_imm): Likewise.
2525         * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
2526         with an insn_type enum and msl with a modifier_type enum.
2527         Replace element_width with a scalar_mode.  Change the shift
2528         to unsigned int.  Add constructors for scalar_float_mode and
2529         scalar_int_mode elements.
2530         (aarch64_vect_float_const_representable_p): Delete.
2531         (aarch64_can_const_movi_rtx_p)
2532         (aarch64_simd_scalar_immediate_valid_for_move)
2533         (aarch64_simd_make_constant): Update call to
2534         aarch64_simd_valid_immediate.
2535         (aarch64_advsimd_valid_immediate_hs): New function.
2536         (aarch64_advsimd_valid_immediate): Likewise.
2537         (aarch64_simd_valid_immediate): Remove mode and inverse
2538         arguments.  Rewrite to use the above.  Use const_vec_duplicate_p
2539         to detect duplicated constants and use aarch64_float_const_zero_rtx_p
2540         and aarch64_float_const_representable_p on the result.
2541         (aarch64_output_simd_mov_immediate): Remove mode argument.
2542         Update call to aarch64_simd_valid_immediate and use of
2543         simd_immediate_info.
2544         (aarch64_output_scalar_simd_mov_immediate): Update call
2545         accordingly.
2546
2547 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2548             Alan Hayward  <alan.hayward@arm.com>
2549             David Sherwood  <david.sherwood@arm.com>
2550
2551         * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2552         (mode_nunits): Likewise CONST_MODE_NUNITS.
2553         * machmode.def (ADJUST_NUNITS): Document.
2554         * genmodes.c (mode_data::need_nunits_adj): New field.
2555         (blank_mode): Update accordingly.
2556         (adj_nunits): New variable.
2557         (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2558         parameter.
2559         (emit_mode_size_inline): Set need_bytesize_adj for all modes
2560         listed in adj_nunits.
2561         (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2562         listed in adj_nunits.  Don't emit case statements for such modes.
2563         (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2564         and CONST_MODE_PRECISION.  Make CONST_MODE_SIZE expand to
2565         nothing if adj_nunits is nonnull.
2566         (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2567         (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2568         (emit_mode_fbit): Update use of print_maybe_const_decl.
2569         (emit_move_size): Likewise.  Treat the array as non-const
2570         if adj_nunits.
2571         (emit_mode_adjustments): Handle adj_nunits.
2572
2573 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2574
2575         * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2576         * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2577         (VECTOR_MODES): Use it.
2578         (make_vector_modes): Take the prefix as an argument.
2579
2580 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2581             Alan Hayward  <alan.hayward@arm.com>
2582             David Sherwood  <david.sherwood@arm.com>
2583
2584         * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2585         * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2586         for MODE_VECTOR_BOOL.
2587         * machmode.def (VECTOR_BOOL_MODE): Document.
2588         * genmodes.c (VECTOR_BOOL_MODE): New macro.
2589         (make_vector_bool_mode): New function.
2590         (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2591         MODE_VECTOR_BOOL.
2592         * lto-streamer-in.c (lto_input_mode_table): Likewise.
2593         * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2594         Likewise.
2595         * stor-layout.c (int_mode_for_mode): Likewise.
2596         * tree.c (build_vector_type_for_mode): Likewise.
2597         * varasm.c (output_constant_pool_2): Likewise.
2598         * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2599         CONSTM1_RTX (BImode) are the same thing.  Initialize const_tiny_rtx
2600         for MODE_VECTOR_BOOL.
2601         * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2602         of mode class checks.
2603         * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2604         instead of a list of mode class checks.
2605         (expand_vector_scalar_condition): Likewise.
2606         (type_for_widest_vector_mode): Handle BImode as an inner mode.
2607
2608 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2609             Alan Hayward  <alan.hayward@arm.com>
2610             David Sherwood  <david.sherwood@arm.com>
2611
2612         * machmode.h (mode_size): Change from unsigned short to
2613         poly_uint16_pod.
2614         (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2615         (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2616         or if measurement_type is not polynomial.
2617         (fixed_size_mode::includes_p): Check for constant-sized modes.
2618         * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2619         return a poly_uint16 rather than an unsigned short.
2620         (emit_mode_size): Change the type of mode_size from unsigned short
2621         to poly_uint16_pod.  Use ZERO_COEFFS for the initializer.
2622         (emit_mode_adjustments): Cope with polynomial vector sizes.
2623         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2624         for GET_MODE_SIZE.
2625         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2626         for GET_MODE_SIZE.
2627         * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2628         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2629         * caller-save.c (setup_save_areas): Likewise.
2630         (replace_reg_with_saved_mem): Likewise.
2631         * calls.c (emit_library_call_value_1): Likewise.
2632         * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2633         * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2634         (gen_lowpart_for_combine): Likewise.
2635         * convert.c (convert_to_integer_1): Likewise.
2636         * cse.c (equiv_constant, cse_insn): Likewise.
2637         * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2638         (cselib_subst_to_values): Likewise.
2639         * dce.c (word_dce_process_block): Likewise.
2640         * df-problems.c (df_word_lr_mark_ref): Likewise.
2641         * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2642         * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2643         (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2644         (rtl_for_decl_location): Likewise.
2645         * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2646         * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2647         * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2648         (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2649         (expand_expr_real_1): Likewise.
2650         * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2651         (pad_below): Likewise.
2652         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2653         * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2654         * ira.c (get_subreg_tracking_sizes): Likewise.
2655         * ira-build.c (ira_create_allocno_objects): Likewise.
2656         * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2657         (ira_sort_regnos_for_alter_reg): Likewise.
2658         * ira-costs.c (record_operand_costs): Likewise.
2659         * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2660         (resolve_simple_move): Likewise.
2661         * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2662         (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2663         (lra_constraints): Likewise.
2664         (CONST_POOL_OK_P): Reject variable-sized modes.
2665         * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2666         (add_pseudo_to_slot, lra_spill): Likewise.
2667         * omp-low.c (omp_clause_aligned_alignment): Likewise.
2668         * optabs-query.c (get_best_extraction_insn): Likewise.
2669         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2670         * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2671         (expand_mult_highpart, valid_multiword_target_p): Likewise.
2672         * recog.c (offsettable_address_addr_space_p): Likewise.
2673         * regcprop.c (maybe_mode_change): Likewise.
2674         * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2675         * regrename.c (build_def_use): Likewise.
2676         * regstat.c (dump_reg_info): Likewise.
2677         * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2678         (find_reloads, find_reloads_subreg_address): Likewise.
2679         * reload1.c (eliminate_regs_1): Likewise.
2680         * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2681         * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2682         (simplify_binary_operation_1, simplify_subreg): Likewise.
2683         * targhooks.c (default_function_arg_padding): Likewise.
2684         (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2685         * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2686         (verify_gimple_assign_ternary): Likewise.
2687         * tree-inline.c (estimate_move_cost): Likewise.
2688         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2689         * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2690         (get_address_cost_ainc): Likewise.
2691         * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2692         (vect_supportable_dr_alignment): Likewise.
2693         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2694         (vectorizable_reduction): Likewise.
2695         * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2696         (vectorizable_operation, vectorizable_load): Likewise.
2697         * tree.c (build_same_sized_truth_vector_type): Likewise.
2698         * valtrack.c (cleanup_auto_inc_dec): Likewise.
2699         * var-tracking.c (emit_note_insn_var_location): Likewise.
2700         * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2701         (ADDR_VEC_ALIGN): Likewise.
2702
2703 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2704             Alan Hayward  <alan.hayward@arm.com>
2705             David Sherwood  <david.sherwood@arm.com>
2706
2707         * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2708         unsigned short.
2709         (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2710         or if measurement_type is polynomial.
2711         * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2712         * combine.c (make_extraction): Likewise.
2713         * dse.c (find_shift_sequence): Likewise.
2714         * dwarf2out.c (mem_loc_descriptor): Likewise.
2715         * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2716         (extract_bit_field, extract_low_bits): Likewise.
2717         * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2718         (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2719         (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2720         * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2721         * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2722         * reload.c (find_reloads): Likewise.
2723         * reload1.c (alter_reg): Likewise.
2724         * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2725         * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2726         * tree-if-conv.c (predicate_mem_writes): Likewise.
2727         * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2728         * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2729         * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2730         * valtrack.c (dead_debug_insert_temp): Likewise.
2731         * varasm.c (mergeable_constant_section): Likewise.
2732         * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2733
2734 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2735             Alan Hayward  <alan.hayward@arm.com>
2736             David Sherwood  <david.sherwood@arm.com>
2737
2738         * expr.c (expand_assignment): Cope with polynomial mode sizes
2739         when assigning to a CONCAT.
2740
2741 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2742             Alan Hayward  <alan.hayward@arm.com>
2743             David Sherwood  <david.sherwood@arm.com>
2744
2745         * machmode.h (mode_precision): Change from unsigned short to
2746         poly_uint16_pod.
2747         (mode_to_precision): Return a poly_uint16 rather than an unsigned
2748         short.
2749         (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2750         or if measurement_type is not polynomial.
2751         (HWI_COMPUTABLE_MODE_P): Turn into a function.  Optimize the case
2752         in which the mode is already known to be a scalar_int_mode.
2753         * genmodes.c (emit_mode_precision): Change the type of mode_precision
2754         from unsigned short to poly_uint16_pod.  Use ZERO_COEFFS for the
2755         initializer.
2756         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2757         for GET_MODE_PRECISION.
2758         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2759         for GET_MODE_PRECISION.
2760         * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2761         as polynomial.
2762         (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2763         (expand_field_assignment, make_extraction): Likewise.
2764         (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
2765         (get_last_value): Likewise.
2766         * convert.c (convert_to_integer_1): Likewise.
2767         * cse.c (cse_insn): Likewise.
2768         * expr.c (expand_expr_real_1): Likewise.
2769         * lra-constraints.c (simplify_operand_subreg): Likewise.
2770         * optabs-query.c (can_atomic_load_p): Likewise.
2771         * optabs.c (expand_atomic_load): Likewise.
2772         (expand_atomic_store): Likewise.
2773         * ree.c (combine_reaching_defs): Likewise.
2774         * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
2775         * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
2776         * tree.h (type_has_mode_precision_p): Likewise.
2777         * ubsan.c (instrument_si_overflow): Likewise.
2778
2779 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2780             Alan Hayward  <alan.hayward@arm.com>
2781             David Sherwood  <david.sherwood@arm.com>
2782
2783         * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
2784         polynomial numbers of units.
2785         (SET_TYPE_VECTOR_SUBPARTS): Likewise.
2786         (valid_vector_subparts_p): New function.
2787         (build_vector_type): Remove temporary shim and take the number
2788         of units as a poly_uint64 rather than an int.
2789         (build_opaque_vector_type): Take the number of units as a
2790         poly_uint64 rather than an int.
2791         * tree.c (build_vector_from_ctor): Handle polynomial
2792         TYPE_VECTOR_SUBPARTS.
2793         (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
2794         (uniform_vector_p, vector_type_mode, build_vector): Likewise.
2795         (build_vector_from_val): If the number of units is variable,
2796         use build_vec_duplicate_cst for constant operands and
2797         VEC_DUPLICATE_EXPR otherwise.
2798         (make_vector_type): Remove temporary is_constant ().
2799         (build_vector_type, build_opaque_vector_type): Take the number of
2800         units as a poly_uint64 rather than an int.
2801         (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
2802         VECTOR_CST_NELTS.
2803         * cfgexpand.c (expand_debug_expr): Likewise.
2804         * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
2805         (store_constructor, expand_expr_real_1): Likewise.
2806         (const_scalar_mask_from_tree): Likewise.
2807         * fold-const-call.c (fold_const_reduction): Likewise.
2808         * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
2809         (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
2810         (native_encode_vector, vec_cst_ctor_to_array): Likewise.
2811         (fold_relational_const): Likewise.
2812         (native_interpret_vector): Likewise.  Change the size from an
2813         int to an unsigned int.
2814         * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
2815         TYPE_VECTOR_SUBPARTS.
2816         (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
2817         (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
2818         duplicating a non-constant operand into a variable-length vector.
2819         * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
2820         TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
2821         * ipa-icf.c (sem_variable::equals): Likewise.
2822         * match.pd: Likewise.
2823         * omp-simd-clone.c (simd_clone_subparts): Likewise.
2824         * print-tree.c (print_node): Likewise.
2825         * stor-layout.c (layout_type): Likewise.
2826         * targhooks.c (default_builtin_vectorization_cost): Likewise.
2827         * tree-cfg.c (verify_gimple_comparison): Likewise.
2828         (verify_gimple_assign_binary): Likewise.
2829         (verify_gimple_assign_ternary): Likewise.
2830         (verify_gimple_assign_single): Likewise.
2831         * tree-pretty-print.c (dump_generic_node): Likewise.
2832         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2833         (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
2834         * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
2835         (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
2836         (vect_shift_permute_load_chain): Likewise.
2837         * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
2838         (expand_vector_condition, optimize_vector_constructor): Likewise.
2839         (lower_vec_perm, get_compute_type): Likewise.
2840         * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2841         (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
2842         * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
2843         (vect_recog_mask_conversion_pattern): Likewise.
2844         * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
2845         (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
2846         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2847         (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
2848         (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
2849         (vectorizable_shift, vectorizable_operation, vectorizable_store)
2850         (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
2851         (supportable_widening_operation): Likewise.
2852         (supportable_narrowing_operation): Likewise.
2853         * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
2854         Likewise.
2855         * varasm.c (output_constant): Likewise.
2856
2857 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2858             Alan Hayward  <alan.hayward@arm.com>
2859             David Sherwood  <david.sherwood@arm.com>
2860
2861         * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
2862         so that both the length == 3 and length != 3 cases set up their
2863         own permute vectors.  Add comments explaining why we know the
2864         number of elements is constant.
2865         (vect_permute_load_chain): Likewise.
2866
2867 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2868             Alan Hayward  <alan.hayward@arm.com>
2869             David Sherwood  <david.sherwood@arm.com>
2870
2871         * machmode.h (mode_nunits): Change from unsigned char to
2872         poly_uint16_pod.
2873         (ONLY_FIXED_SIZE_MODES): New macro.
2874         (pod_mode::measurement_type, scalar_int_mode::measurement_type)
2875         (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
2876         (complex_mode::measurement_type, fixed_size_mode::measurement_type):
2877         New typedefs.
2878         (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
2879         (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
2880         or if measurement_type is not polynomial.
2881         * genmodes.c (ZERO_COEFFS): New macro.
2882         (emit_mode_nunits_inline): Make mode_nunits_inline return a
2883         poly_uint16.
2884         (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
2885         Use ZERO_COEFFS when emitting initializers.
2886         * data-streamer.h (bp_pack_poly_value): New function.
2887         (bp_unpack_poly_value): Likewise.
2888         * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2889         for GET_MODE_NUNITS.
2890         * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2891         for GET_MODE_NUNITS.
2892         * tree.c (make_vector_type): Remove temporary shim and make
2893         the real function take the number of units as a poly_uint64
2894         rather than an int.
2895         (build_vector_type_for_mode): Handle polynomial nunits.
2896         * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
2897         * emit-rtl.c (const_vec_series_p_1): Likewise.
2898         (gen_rtx_CONST_VECTOR): Likewise.
2899         * fold-const.c (test_vec_duplicate_folding): Likewise.
2900         * genrecog.c (validate_pattern): Likewise.
2901         * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
2902         * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2903         * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
2904         (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
2905         (expand_vec_cond_expr, expand_mult_highpart): Likewise.
2906         * rtlanal.c (subreg_get_info): Likewise.
2907         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2908         (vect_grouped_load_supported): Likewise.
2909         * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
2910         * tree-vect-loop.c (have_whole_vector_shift): Likewise.
2911         * simplify-rtx.c (simplify_unary_operation_1): Likewise.
2912         (simplify_const_unary_operation, simplify_binary_operation_1)
2913         (simplify_const_binary_operation, simplify_ternary_operation)
2914         (test_vector_ops_duplicate, test_vector_ops): Likewise.
2915         (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
2916         instead of CONST_VECTOR_NUNITS.
2917         * varasm.c (output_constant_pool_2): Likewise.
2918         * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
2919         explicit-encoded elements in the XVEC for variable-length vectors.
2920
2921 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2922
2923         * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
2924
2925 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2926             Alan Hayward  <alan.hayward@arm.com>
2927             David Sherwood  <david.sherwood@arm.com>
2928
2929         * coretypes.h (fixed_size_mode): Declare.
2930         (fixed_size_mode_pod): New typedef.
2931         * builtins.h (target_builtins::x_apply_args_mode)
2932         (target_builtins::x_apply_result_mode): Change type to
2933         fixed_size_mode_pod.
2934         * builtins.c (apply_args_size, apply_result_size, result_vector)
2935         (expand_builtin_apply_args_1, expand_builtin_apply)
2936         (expand_builtin_return): Update accordingly.
2937
2938 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
2939
2940         * cse.c (hash_rtx_cb): Hash only the encoded elements.
2941         * cselib.c (cselib_hash_rtx): Likewise.
2942         * expmed.c (make_tree): Build VECTOR_CSTs directly from the
2943         CONST_VECTOR encoding.
2944
2945 2017-01-03  Jakub Jelinek  <jakub@redhat.com>
2946             Jeff Law  <law@redhat.com>
2947
2948         PR target/83641
2949         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
2950         noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
2951         only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
2952         and add REG_CFA_ADJUST_CFA notes in that case to both insns.
2953
2954         PR target/83641
2955         * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
2956         explicitly probe *sp in a noreturn function if there were any callee
2957         register saves or frame pointer is needed.
2958
2959 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
2960
2961         PR debug/83621
2962         * cfgexpand.c (expand_debug_expr): Return NULL if mode is
2963         BLKmode for ternary, binary or unary expressions.
2964
2965         PR debug/83645
2966         * var-tracking.c (delete_vta_debug_insn): New inline function.
2967         (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
2968         insns from get_insns () to NULL instead of each bb separately.
2969         Use delete_vta_debug_insn.  No longer static.
2970         (vt_debug_insns_local, variable_tracking_main_1): Adjust
2971         delete_vta_debug_insns callers.
2972         * rtl.h (delete_vta_debug_insns): Declare.
2973         * final.c (rest_of_handle_final): Call delete_vta_debug_insns
2974         instead of variable_tracking_main.
2975
2976 2018-01-03  Martin Sebor  <msebor@redhat.com>
2977
2978         PR tree-optimization/83603
2979         * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
2980         arguments past the endof the argument list in functions declared
2981         without a prototype.
2982         * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
2983         Avoid checking when arguments are null.
2984
2985 2018-01-03  Martin Sebor  <msebor@redhat.com>
2986
2987         PR c/83559
2988         * doc/extend.texi (attribute const): Fix a typo.
2989         * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
2990         issuing -Wsuggest-attribute for void functions.
2991
2992 2018-01-03  Martin Sebor  <msebor@redhat.com>
2993
2994         * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
2995         offset_int::from instead of wide_int::to_shwi.
2996         (maybe_diag_overlap): Remove assertion.
2997         Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
2998         * gimple-ssa-sprintf.c (format_directive): Same.
2999         (parse_directive): Same.
3000         (sprintf_dom_walker::compute_format_length): Same.
3001         (try_substitute_return_value): Same.
3002
3003 2017-01-03  Jeff Law  <law@redhat.com>
3004
3005         PR middle-end/83654
3006         * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3007         non-constant residual for zero at runtime and avoid probing in
3008         that case.  Reorganize code for trailing problem to mirror handling
3009         of the residual.
3010
3011 2018-01-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
3012
3013         PR tree-optimization/83501
3014         * tree-ssa-strlen.c (get_string_cst): New.
3015         (handle_char_store): Call get_string_cst.
3016
3017 2018-01-03  Martin Liska  <mliska@suse.cz>
3018
3019         PR tree-optimization/83593
3020         * tree-ssa-strlen.c: Include tree-cfg.h.
3021         (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3022         (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3023         (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3024         to false.
3025         (strlen_dom_walker::before_dom_children): Call
3026         gimple_purge_dead_eh_edges. Dump tranformation with details
3027         dump flags.
3028         (strlen_dom_walker::before_dom_children): Update call by adding
3029         new argument cleanup_eh.
3030         (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3031
3032 2018-01-03  Martin Liska  <mliska@suse.cz>
3033
3034         PR ipa/83549
3035         * cif-code.def (VARIADIC_THUNK): New enum value.
3036         * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3037         thunks.
3038
3039 2018-01-03  Jan Beulich  <jbeulich@suse.com>
3040
3041         * sse.md (mov<mode>_internal): Tighten condition for when to use
3042         vmovdqu<ssescalarsize> for TI and OI modes.
3043
3044 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
3045
3046         Update copyright years.
3047
3048 2018-01-03  Martin Liska  <mliska@suse.cz>
3049
3050         PR ipa/83594
3051         * ipa-visibility.c (function_and_variable_visibility): Skip
3052         functions with noipa attribure.
3053
3054 2018-01-03  Jakub Jelinek  <jakub@redhat.com>
3055
3056         * gcc.c (process_command): Update copyright notice dates.
3057         * gcov-dump.c (print_version): Ditto.
3058         * gcov.c (print_version): Ditto.
3059         * gcov-tool.c (print_version): Ditto.
3060         * gengtype.c (create_file): Ditto.
3061         * doc/cpp.texi: Bump @copying's copyright year.
3062         * doc/cppinternals.texi: Ditto.
3063         * doc/gcc.texi: Ditto.
3064         * doc/gccint.texi: Ditto.
3065         * doc/gcov.texi: Ditto.
3066         * doc/install.texi: Ditto.
3067         * doc/invoke.texi: Ditto.
3068
3069 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3070
3071         * vector-builder.h (vector_builder::m_full_nelts): Change from
3072         unsigned int to poly_uint64.
3073         (vector_builder::full_nelts): Update prototype accordingly.
3074         (vector_builder::new_vector): Likewise.
3075         (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3076         (vector_builder::operator ==): Likewise.
3077         (vector_builder::finalize): Likewise.
3078         * int-vector-builder.h (int_vector_builder::int_vector_builder):
3079         Take the number of elements as a poly_uint64 rather than an
3080         unsigned int.
3081         * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3082         from unsigned int to poly_uint64.
3083         (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3084         (vec_perm_indices::new_vector): Likewise.
3085         (vec_perm_indices::length): Likewise.
3086         (vec_perm_indices::nelts_per_input): Likewise.
3087         (vec_perm_indices::input_nelts): Likewise.
3088         * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3089         number of elements per input as a poly_uint64 rather than an
3090         unsigned int.  Use the original encoding for variable-length
3091         vectors, rather than clamping each individual element.
3092         For the second and subsequent elements in each pattern,
3093         clamp the step and base before clamping their sum.
3094         (vec_perm_indices::series_p): Handle polynomial element counts.
3095         (vec_perm_indices::all_in_range_p): Likewise.
3096         (vec_perm_indices_to_tree): Likewise.
3097         (vec_perm_indices_to_rtx): Likewise.
3098         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3099         * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3100         (tree_vector_builder::new_binary_operation): Handle polynomial
3101         element counts.  Return false if we need to know the number
3102         of elements at compile time.
3103         * fold-const.c (fold_vec_perm): Punt if the number of elements
3104         isn't known at compile time.
3105
3106 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3107
3108         * vec-perm-indices.h (vec_perm_builder): Change element type
3109         from HOST_WIDE_INT to poly_int64.
3110         (vec_perm_indices::element_type): Update accordingly.
3111         (vec_perm_indices::clamp): Handle polynomial element_types.
3112         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3113         (vec_perm_indices::all_in_range_p): Likewise.
3114         (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3115         than shwi trees.
3116         * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3117         polynomial vec_perm_indices element types.
3118         * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3119         * fold-const.c (fold_vec_perm): Likewise.
3120         * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3121         * tree-vect-generic.c (lower_vec_perm): Likewise.
3122         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3123         * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3124         element type to HOST_WIDE_INT.
3125
3126 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3127             Alan Hayward  <alan.hayward@arm.com>
3128             David Sherwood  <david.sherwood@arm.com>
3129
3130         * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3131         rather than an int.  Use plus_constant.
3132         (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3133         Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3134
3135 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3136             Alan Hayward  <alan.hayward@arm.com>
3137             David Sherwood  <david.sherwood@arm.com>
3138
3139         * calls.c (emit_call_1, expand_call): Change struct_value_size from
3140         a HOST_WIDE_INT to a poly_int64.
3141
3142 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3143             Alan Hayward  <alan.hayward@arm.com>
3144             David Sherwood  <david.sherwood@arm.com>
3145
3146         * calls.c (load_register_parameters): Cope with polynomial
3147         mode sizes.  Require a constant size for BLKmode parameters
3148         that aren't described by a PARALLEL.  If BLOCK_REG_PADDING
3149         forces a parameter to be padded at the lsb end in order to
3150         fill a complete number of words, require the parameter size
3151         to be ordered wrt UNITS_PER_WORD.
3152
3153 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3154             Alan Hayward  <alan.hayward@arm.com>
3155             David Sherwood  <david.sherwood@arm.com>
3156
3157         * reload1.c (spill_stack_slot_width): Change element type
3158         from unsigned int to poly_uint64_pod.
3159         (alter_reg): Treat mode sizes as polynomial.
3160
3161 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3162             Alan Hayward  <alan.hayward@arm.com>
3163             David Sherwood  <david.sherwood@arm.com>
3164
3165         * reload.c (complex_word_subreg_p): New function.
3166         (reload_inner_reg_of_subreg, push_reload): Use it.
3167
3168 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3169             Alan Hayward  <alan.hayward@arm.com>
3170             David Sherwood  <david.sherwood@arm.com>
3171
3172         * lra-constraints.c (process_alt_operands): Reject matched
3173         operands whose sizes aren't ordered.
3174         (match_reload): Refer to this check here.
3175
3176 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3177             Alan Hayward  <alan.hayward@arm.com>
3178             David Sherwood  <david.sherwood@arm.com>
3179
3180         * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3181         that the mode size is in the set {1, 2, 4, 8, 16}.
3182
3183 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3184             Alan Hayward  <alan.hayward@arm.com>
3185             David Sherwood  <david.sherwood@arm.com>
3186
3187         * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3188         Use plus_constant instead of gen_rtx_PLUS.
3189
3190 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3191             Alan Hayward  <alan.hayward@arm.com>
3192             David Sherwood  <david.sherwood@arm.com>
3193
3194         * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3195         * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3196         * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3197         * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3198         * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3199         * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3200         * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3201         * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3202         * config/i386/i386.c (ix86_push_rounding): ...this new function.
3203         * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3204         a poly_int64.
3205         * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3206         * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3207         * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3208         * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3209         * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3210         * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3211         * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3212         * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3213         * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3214         * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3215         function.
3216         * expr.c (emit_move_resolve_push): Treat the input and result
3217         of PUSH_ROUNDING as a poly_int64.
3218         (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3219         (emit_push_insn): Likewise.
3220         * lra-eliminations.c (mark_not_eliminable): Likewise.
3221         * recog.c (push_operand): Likewise.
3222         * reload1.c (elimination_effects): Likewise.
3223         * rtlanal.c (nonzero_bits1): Likewise.
3224         * calls.c (store_one_arg): Likewise.  Require the padding to be
3225         known at compile time.
3226
3227 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3228             Alan Hayward  <alan.hayward@arm.com>
3229             David Sherwood  <david.sherwood@arm.com>
3230
3231         * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3232         Use plus_constant instead of gen_rtx_PLUS.
3233
3234 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3235             Alan Hayward  <alan.hayward@arm.com>
3236             David Sherwood  <david.sherwood@arm.com>
3237
3238         * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3239         rather than an int.
3240
3241 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3242             Alan Hayward  <alan.hayward@arm.com>
3243             David Sherwood  <david.sherwood@arm.com>
3244
3245         * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3246         instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3247         via stack temporaries.  Treat the mode size as polynomial too.
3248
3249 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3250             Alan Hayward  <alan.hayward@arm.com>
3251             David Sherwood  <david.sherwood@arm.com>
3252
3253         * expr.c (expand_expr_real_2): When handling conversions involving
3254         unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3255         multiplying int_size_in_bytes by BITS_PER_UNIT.  Treat GET_MODE_BISIZE
3256         as a poly_uint64 too.
3257
3258 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3259             Alan Hayward  <alan.hayward@arm.com>
3260             David Sherwood  <david.sherwood@arm.com>
3261
3262         * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3263
3264 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3265             Alan Hayward  <alan.hayward@arm.com>
3266             David Sherwood  <david.sherwood@arm.com>
3267
3268         * combine.c (can_change_dest_mode): Handle polynomial
3269         REGMODE_NATURAL_SIZE.
3270         * expmed.c (store_bit_field_1): Likewise.
3271         * expr.c (store_constructor): Likewise.
3272         * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3273         and polynomial REGMODE_NATURAL_SIZE.
3274         (gen_lowpart_common): Likewise.
3275         * reginfo.c (record_subregs_of_mode): Likewise.
3276         * rtlanal.c (read_modify_subreg_p): Likewise.
3277
3278 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3279             Alan Hayward  <alan.hayward@arm.com>
3280             David Sherwood  <david.sherwood@arm.com>
3281
3282         * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3283         numbers of elements.
3284
3285 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3286             Alan Hayward  <alan.hayward@arm.com>
3287             David Sherwood  <david.sherwood@arm.com>
3288
3289         * match.pd: Cope with polynomial numbers of vector elements.
3290
3291 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3292             Alan Hayward  <alan.hayward@arm.com>
3293             David Sherwood  <david.sherwood@arm.com>
3294
3295         * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3296         in a POINTER_PLUS_EXPR.
3297
3298 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3299             Alan Hayward  <alan.hayward@arm.com>
3300             David Sherwood  <david.sherwood@arm.com>
3301
3302         * omp-simd-clone.c (simd_clone_subparts): New function.
3303         (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3304         (ipa_simd_modify_function_body): Likewise.
3305
3306 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3307             Alan Hayward  <alan.hayward@arm.com>
3308             David Sherwood  <david.sherwood@arm.com>
3309
3310         * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3311         (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3312         (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3313         (expand_vector_condition, vector_element): Likewise.
3314         (subparts_gt): New function.
3315         (get_compute_type): Use subparts_gt.
3316         (count_type_subparts): Delete.
3317         (expand_vector_operations_1): Use subparts_gt instead of
3318         count_type_subparts.
3319
3320 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3321             Alan Hayward  <alan.hayward@arm.com>
3322             David Sherwood  <david.sherwood@arm.com>
3323
3324         * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3325         (vect_compile_time_alias): ...this new function.  Do the calculation
3326         on poly_ints rather than trees.
3327         (vect_prune_runtime_alias_test_list): Update call accordingly.
3328
3329 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3330             Alan Hayward  <alan.hayward@arm.com>
3331             David Sherwood  <david.sherwood@arm.com>
3332
3333         * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3334         numbers of units.
3335         (vect_schedule_slp_instance): Likewise.
3336
3337 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3338             Alan Hayward  <alan.hayward@arm.com>
3339             David Sherwood  <david.sherwood@arm.com>
3340
3341         * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3342         constant and extern definitions for variable-length vectors.
3343         (vect_get_constant_vectors): Note that the number of units
3344         is known to be constant.
3345
3346 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3347             Alan Hayward  <alan.hayward@arm.com>
3348             David Sherwood  <david.sherwood@arm.com>
3349
3350         * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3351         of units as polynomial.  Choose between WIDE and NARROW based
3352         on multiple_p.
3353
3354 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3355             Alan Hayward  <alan.hayward@arm.com>
3356             David Sherwood  <david.sherwood@arm.com>
3357
3358         * tree-vect-stmts.c (simd_clone_subparts): New function.
3359         (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3360
3361 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3362             Alan Hayward  <alan.hayward@arm.com>
3363             David Sherwood  <david.sherwood@arm.com>
3364
3365         * tree-vect-stmts.c (vectorizable_call): Treat the number of
3366         vectors as polynomial.  Use build_index_vector for
3367         IFN_GOMP_SIMD_LANE.
3368
3369 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3370             Alan Hayward  <alan.hayward@arm.com>
3371             David Sherwood  <david.sherwood@arm.com>
3372
3373         * tree-vect-stmts.c (get_load_store_type): Treat the number of
3374         units as polynomial.  Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3375         for variable-length vectors.
3376         (vectorizable_mask_load_store): Treat the number of units as
3377         polynomial, asserting that it is constant if the condition has
3378         already been enforced.
3379         (vectorizable_store, vectorizable_load): Likewise.
3380
3381 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3382             Alan Hayward  <alan.hayward@arm.com>
3383             David Sherwood  <david.sherwood@arm.com>
3384
3385         * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3386         of units as polynomial.  Punt if we can't tell at compile time
3387         which vector contains the final result.
3388
3389 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3390             Alan Hayward  <alan.hayward@arm.com>
3391             David Sherwood  <david.sherwood@arm.com>
3392
3393         * tree-vect-loop.c (vectorizable_induction): Treat the number
3394         of units as polynomial.  Punt on SLP inductions.  Use an integer
3395         VEC_SERIES_EXPR for variable-length integer reductions.  Use a
3396         cast of such a series for variable-length floating-point
3397         reductions.
3398
3399 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3400             Alan Hayward  <alan.hayward@arm.com>
3401             David Sherwood  <david.sherwood@arm.com>
3402
3403         * tree.h (build_index_vector): Declare.
3404         * tree.c (build_index_vector): New function.
3405         * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3406         of units as polynomial, forcibly converting it to a constant if
3407         vectorizable_reduction has already enforced the condition.
3408         (vect_create_epilog_for_reduction): Likewise.  Use build_index_vector
3409         to create a {1,2,3,...} vector.
3410         (vectorizable_reduction): Treat the number of units as polynomial.
3411         Choose vectype_in based on the largest scalar element size rather
3412         than the smallest number of units.  Enforce the restrictions
3413         relied on above.
3414
3415 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3416             Alan Hayward  <alan.hayward@arm.com>
3417             David Sherwood  <david.sherwood@arm.com>
3418
3419         * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3420         number of units as polynomial.
3421
3422 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3423             Alan Hayward  <alan.hayward@arm.com>
3424             David Sherwood  <david.sherwood@arm.com>
3425
3426         * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3427         * target.def (autovectorize_vector_sizes): Return the vector sizes
3428         by pointer, using vector_sizes rather than a bitmask.
3429         * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3430         * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3431         * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3432         Likewise.
3433         * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3434         * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3435         * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3436         * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3437         * omp-general.c (omp_max_vf): Likewise.
3438         * omp-low.c (omp_clause_aligned_alignment): Likewise.
3439         * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3440         * tree-vect-loop.c (vect_analyze_loop): Likewise.
3441         * tree-vect-slp.c (vect_slp_bb): Likewise.
3442         * doc/tm.texi: Regenerate.
3443         * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3444         to a poly_uint64.
3445         * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3446         the vector size as a poly_uint64 rather than an unsigned int.
3447         (current_vector_size): Change from an unsigned int to a poly_uint64.
3448         (get_vectype_for_scalar_type): Update accordingly.
3449         * tree.h (build_truth_vector_type): Take the size and number of
3450         units as a poly_uint64 rather than an unsigned int.
3451         (build_vector_type): Add a temporary overload that takes
3452         the number of units as a poly_uint64 rather than an unsigned int.
3453         * tree.c (make_vector_type): Likewise.
3454         (build_truth_vector_type): Take the number of units as a poly_uint64
3455         rather than an unsigned int.
3456
3457 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3458             Alan Hayward  <alan.hayward@arm.com>
3459             David Sherwood  <david.sherwood@arm.com>
3460
3461         * target.def (get_mask_mode): Take the number of units and length
3462         as poly_uint64s rather than unsigned ints.
3463         * targhooks.h (default_get_mask_mode): Update accordingly.
3464         * targhooks.c (default_get_mask_mode): Likewise.
3465         * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3466         * doc/tm.texi: Regenerate.
3467
3468 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3469             Alan Hayward  <alan.hayward@arm.com>
3470             David Sherwood  <david.sherwood@arm.com>
3471
3472         * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3473         * omp-general.c (omp_max_vf): Likewise.
3474         * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3475         (expand_omp_simd): Handle polynomial safelen.
3476         * omp-low.c (omplow_simd_context): Add a default constructor.
3477         (omplow_simd_context::max_vf): Change from int to poly_uint64.
3478         (lower_rec_simd_input_clauses): Update accordingly.
3479         (lower_rec_input_clauses): Likewise.
3480
3481 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3482             Alan Hayward  <alan.hayward@arm.com>
3483             David Sherwood  <david.sherwood@arm.com>
3484
3485         * tree-vectorizer.h (vect_nunits_for_cost): New function.
3486         * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3487         * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3488         (vect_analyze_slp_cost): Likewise.
3489         * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3490         (vect_model_load_cost): Likewise.
3491
3492 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3493             Alan Hayward  <alan.hayward@arm.com>
3494             David Sherwood  <david.sherwood@arm.com>
3495
3496         * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3497         (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3498         from an unsigned int * to a poly_uint64_pod *.
3499         (calculate_unrolling_factor): New function.
3500         (vect_analyze_slp_instance): Use it.  Track polynomial max_nunits.
3501
3502 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3503             Alan Hayward  <alan.hayward@arm.com>
3504             David Sherwood  <david.sherwood@arm.com>
3505
3506         * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3507         from an unsigned int to a poly_uint64.
3508         (_loop_vec_info::slp_unrolling_factor): Likewise.
3509         (_loop_vec_info::vectorization_factor): Change from an int
3510         to a poly_uint64.
3511         (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
3512         (vect_get_num_vectors): New function.
3513         (vect_update_max_nunits, vect_vf_for_cost): Likewise.
3514         (vect_get_num_copies): Use vect_get_num_vectors.
3515         (vect_analyze_data_ref_dependences): Change max_vf from an int *
3516         to an unsigned int *.
3517         (vect_analyze_data_refs): Change min_vf from an int * to a
3518         poly_uint64 *.
3519         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3520         than an unsigned HOST_WIDE_INT.
3521         * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
3522         (vect_analyze_data_ref_dependence): Change max_vf from an int *
3523         to an unsigned int *.
3524         (vect_analyze_data_ref_dependences): Likewise.
3525         (vect_compute_data_ref_alignment): Handle polynomial vf.
3526         (vect_enhance_data_refs_alignment): Likewise.
3527         (vect_prune_runtime_alias_test_list): Likewise.
3528         (vect_shift_permute_load_chain): Likewise.
3529         (vect_supportable_dr_alignment): Likewise.
3530         (dependence_distance_ge_vf): Take the vectorization factor as a
3531         poly_uint64 rather than an unsigned HOST_WIDE_INT.
3532         (vect_analyze_data_refs): Change min_vf from an int * to a
3533         poly_uint64 *.
3534         * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
3535         vfm1 as a poly_uint64 rather than an int.  Make the same change
3536         for the returned bound_scalar.
3537         (vect_gen_vector_loop_niters): Handle polynomial vf.
3538         (vect_do_peeling): Likewise.  Update call to
3539         vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
3540         (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
3541         be constant.
3542         * tree-vect-loop.c (vect_determine_vectorization_factor)
3543         (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
3544         (vect_get_known_peeling_cost): Likewise.
3545         (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
3546         (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
3547         (vect_transform_loop): Likewise.  Use the lowest possible VF when
3548         updating the upper bounds of the loop.
3549         (vect_min_worthwhile_factor): Make static.  Return an unsigned int
3550         rather than an int.
3551         * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3552         polynomial unroll factors.
3553         (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3554         (vect_make_slp_decision): Likewise.
3555         (vect_supported_load_permutation_p): Likewise, and polynomial
3556         vf too.
3557         (vect_analyze_slp_cost): Handle polynomial vf.
3558         (vect_slp_analyze_node_operations): Likewise.
3559         (vect_slp_analyze_bb_1): Likewise.
3560         (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3561         than an unsigned HOST_WIDE_INT.
3562         * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3563         (vectorizable_load): Handle polynomial vf.
3564         * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3565         a poly_uint64.
3566         (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3567
3568 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3569             Alan Hayward  <alan.hayward@arm.com>
3570             David Sherwood  <david.sherwood@arm.com>
3571
3572         * match.pd: Handle bit operations involving three constants
3573         and try to fold one pair.
3574
3575 2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>
3576
3577         * tree-vect-loop-manip.c: Include gimple-fold.h.
3578         (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3579         niters_maybe_zero parameters.  Handle other cases besides a step of 1.
3580         (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3581         Add a path that uses a step of VF instead of 1, but disable it
3582         for now.
3583         (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3584         and niters_no_overflow parameters.  Update calls to
3585         slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3586         Create a new SSA name if the latter choses to use a ste other
3587         than zero, and return it via niters_vector_mult_vf_var.
3588         * tree-vect-loop.c (vect_transform_loop): Update calls to
3589         vect_do_peeling, vect_gen_vector_loop_niters and
3590         slpeel_make_loop_iterate_ntimes.
3591         * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3592         (vect_gen_vector_loop_niters): Update declarations after above changes.
3593
3594 2018-01-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
3595
3596         * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3597         128-bit round to integer instructions.
3598         (ceil<mode>2): Likewise.
3599         (btrunc<mode>2): Likewise.
3600         (round<mode>2): Likewise.
3601
3602 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
3603
3604         * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3605         unaligned VSX load/store on P8/P9.
3606         (expand_block_clear): Allow the use of unaligned VSX
3607         load/store on P8/P9.
3608
3609 2018-01-02  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
3610
3611         * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3612         New function.
3613         (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3614         swap associated with both a load and a store.
3615
3616 2018-01-02  Andrew Waterman  <andrew@sifive.com>
3617
3618         * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3619         * config/riscv/riscv.md (clear_cache): Use it.
3620
3621 2018-01-02  Artyom Skrobov  <tyomitch@gmail.com>
3622
3623         * web.c: Remove out-of-date comment.
3624
3625 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3626
3627         * expr.c (fixup_args_size_notes): Check that any existing
3628         REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3629         (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3630         (emit_single_push_insn): ...here.
3631
3632 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3633
3634         * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3635         (const_vector_encoded_nelts): New function.
3636         (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3637         (const_vector_int_elt, const_vector_elt): Declare.
3638         * emit-rtl.c (const_vector_int_elt_1): New function.
3639         (const_vector_elt): Likewise.
3640         * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3641         of CONST_VECTOR_ELT.
3642
3643 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3644
3645         * expr.c: Include rtx-vector-builder.h.
3646         (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3647         directly on the tree encoding.
3648         (const_vector_from_tree): Likewise.
3649         * optabs.c: Include rtx-vector-builder.h.
3650         (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3651         sequence of "u" values.
3652         * vec-perm-indices.c: Include rtx-vector-builder.h.
3653         (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3654         directly on the vec_perm_indices encoding.
3655
3656 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3657
3658         * doc/rtl.texi (const_vector): Describe new encoding scheme.
3659         * Makefile.in (OBJS): Add rtx-vector-builder.o.
3660         * rtx-vector-builder.h: New file.
3661         * rtx-vector-builder.c: Likewise.
3662         * rtl.h (rtx_def::u2): Add a const_vector field.
3663         (CONST_VECTOR_NPATTERNS): New macro.
3664         (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3665         (CONST_VECTOR_DUPLICATE_P): Likewise.
3666         (CONST_VECTOR_STEPPED_P): Likewise.
3667         (CONST_VECTOR_ENCODED_ELT): Likewise.
3668         (const_vec_duplicate_p): Check for a duplicated vector encoding.
3669         (unwrap_const_vec_duplicate): Likewise.
3670         (const_vec_series_p): Check for a non-duplicated vector encoding.
3671         Say that the function only returns true for integer vectors.
3672         * emit-rtl.c: Include rtx-vector-builder.h.
3673         (gen_const_vec_duplicate_1): Delete.
3674         (gen_const_vector): Call gen_const_vec_duplicate instead of
3675         gen_const_vec_duplicate_1.
3676         (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3677         (gen_const_vec_duplicate): Use rtx_vector_builder.
3678         (gen_const_vec_series): Likewise.
3679         (gen_rtx_CONST_VECTOR): Likewise.
3680         * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3681         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3682         Build a new vector rather than modifying a CONST_VECTOR in-place.
3683         (handle_special_swappables): Update call accordingly.
3684         * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3685         (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3686         Build a new vector rather than modifying a CONST_VECTOR in-place.
3687         (handle_special_swappables): Update call accordingly.
3688
3689 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3690
3691         * simplify-rtx.c (simplify_const_binary_operation): Use
3692         CONST_VECTOR_ELT instead of XVECEXP.
3693
3694 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3695
3696         * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3697         the selector elements to be different from the data elements
3698         if the selector is a VECTOR_CST.
3699         * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3700         ssizetype for the selector.
3701
3702 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3703
3704         * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3705         before testing each element individually.
3706         * tree-vect-generic.c (lower_vec_perm): Likewise.
3707
3708 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3709
3710         * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3711         * selftest-run-tests.c (selftest::run_tests): Call it.
3712         * vector-builder.h (vector_builder::operator ==): New function.
3713         (vector_builder::operator !=): Likewise.
3714         * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3715         (vec_perm_indices::all_from_input_p): New function.
3716         * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3717         (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3718         * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3719         instead of reading the VECTOR_CST directly.  Detect whether both
3720         vector inputs are the same before constructing the vec_perm_indices,
3721         and update the number of inputs argument accordingly.  Use the
3722         utility functions added above.  Only construct sel2 if we need to.
3723
3724 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3725
3726         * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3727         the broadcast of the low byte.
3728         (expand_mult_highpart): Use an explicit encoding for the permutes.
3729         * optabs-query.c (can_mult_highpart_p): Likewise.
3730         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3731         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3732         (vectorizable_bswap): Likewise.
3733         * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3734         explicit encoding for the power-of-2 permutes.
3735         (vect_permute_store_chain): Likewise.
3736         (vect_grouped_load_supported): Likewise.
3737         (vect_permute_load_chain): Likewise.
3738
3739 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3740
3741         * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3742         * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3743         * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3744         * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3745         * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3746         (vect_gen_perm_mask_any): Likewise.
3747
3748 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3749
3750         * int-vector-builder.h: New file.
3751         * vec-perm-indices.h: Include int-vector-builder.h.
3752         (vec_perm_indices): Redefine as an int_vector_builder.
3753         (auto_vec_perm_indices): Delete.
3754         (vec_perm_builder): Redefine as a stand-alone class.
3755         (vec_perm_indices::vec_perm_indices): New function.
3756         (vec_perm_indices::clamp): Likewise.
3757         * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3758         (vec_perm_indices::new_vector): New function.
3759         (vec_perm_indices::new_expanded_vector): Update for new
3760         vec_perm_indices class.
3761         (vec_perm_indices::rotate_inputs): New function.
3762         (vec_perm_indices::all_in_range_p): Operate directly on the
3763         encoded form, without computing elided elements.
3764         (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
3765         encoding.  Update for new vec_perm_indices class.
3766         * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
3767         the given vec_perm_builder.
3768         (expand_vec_perm_var): Update vec_perm_builder constructor.
3769         (expand_mult_highpart): Use vec_perm_builder instead of
3770         auto_vec_perm_indices.
3771         * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
3772         vec_perm_indices instead of auto_vec_perm_indices.  Use a single
3773         or double series encoding as appropriate.
3774         * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
3775         vec_perm_indices instead of auto_vec_perm_indices.
3776         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3777         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3778         (vect_permute_store_chain): Likewise.
3779         (vect_grouped_load_supported): Likewise.
3780         (vect_permute_load_chain): Likewise.
3781         (vect_shift_permute_load_chain): Likewise.
3782         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3783         (vect_transform_slp_perm_load): Likewise.
3784         (vect_schedule_slp_instance): Likewise.
3785         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3786         (vectorizable_mask_load_store): Likewise.
3787         (vectorizable_bswap): Likewise.
3788         (vectorizable_store): Likewise.
3789         (vectorizable_load): Likewise.
3790         * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
3791         vec_perm_indices instead of auto_vec_perm_indices.  Use
3792         tree_to_vec_perm_builder to read the vector from a tree.
3793         * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
3794         vec_perm_builder instead of a vec_perm_indices.
3795         (have_whole_vector_shift): Use vec_perm_builder and
3796         vec_perm_indices instead of auto_vec_perm_indices.  Leave the
3797         truncation to calc_vec_perm_mask_for_shift.
3798         (vect_create_epilog_for_reduction): Likewise.
3799         * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
3800         from auto_vec_perm_indices to vec_perm_indices.
3801         (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3802         instead of changing individual elements.
3803         (aarch64_vectorize_vec_perm_const): Use new_vector to install
3804         the vector in d.perm.
3805         * config/arm/arm.c (expand_vec_perm_d::perm): Change
3806         from auto_vec_perm_indices to vec_perm_indices.
3807         (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3808         instead of changing individual elements.
3809         (arm_vectorize_vec_perm_const): Use new_vector to install
3810         the vector in d.perm.
3811         * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
3812         Update vec_perm_builder constructor.
3813         (rs6000_expand_interleave): Likewise.
3814         * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
3815         (rs6000_expand_interleave): Likewise.
3816
3817 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3818
3819         * optabs-query.c (can_vec_perm_var_p): Check whether lowering
3820         to qimode could truncate the indices.
3821         * optabs.c (expand_vec_perm_var): Likewise.
3822
3823 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3824
3825         * Makefile.in (OBJS): Add vec-perm-indices.o.
3826         * vec-perm-indices.h: New file.
3827         * vec-perm-indices.c: Likewise.
3828         * target.h (vec_perm_indices): Replace with a forward class
3829         declaration.
3830         (auto_vec_perm_indices): Move to vec-perm-indices.h.
3831         * optabs.h: Include vec-perm-indices.h.
3832         (expand_vec_perm): Delete.
3833         (selector_fits_mode_p, expand_vec_perm_var): Declare.
3834         (expand_vec_perm_const): Declare.
3835         * target.def (vec_perm_const_ok): Replace with...
3836         (vec_perm_const): ...this new hook.
3837         * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
3838         (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
3839         * doc/tm.texi: Regenerate.
3840         * optabs.def (vec_perm_const): Delete.
3841         * doc/md.texi (vec_perm_const): Likewise.
3842         (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
3843         * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
3844         expand_vec_perm for constant permutation vectors.  Assert that
3845         the mode of variable permutation vectors is the integer equivalent
3846         of the mode that is being permuted.
3847         * optabs-query.h (selector_fits_mode_p): Declare.
3848         * optabs-query.c: Include vec-perm-indices.h.
3849         (selector_fits_mode_p): New function.
3850         (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
3851         is defined, instead of checking whether the vec_perm_const_optab
3852         exists.  Use targetm.vectorize.vec_perm_const instead of
3853         targetm.vectorize.vec_perm_const_ok.  Check whether the indices
3854         fit in the vector mode before using a variable permute.
3855         * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
3856         vec_perm_indices instead of an rtx.
3857         (expand_vec_perm): Replace with...
3858         (expand_vec_perm_const): ...this new function.  Take the selector
3859         as a vec_perm_indices rather than an rtx.  Also take the mode of
3860         the selector.  Update call to shift_amt_for_vec_perm_mask.
3861         Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
3862         Use vec_perm_indices::new_expanded_vector to expand the original
3863         selector into bytes.  Check whether the indices fit in the vector
3864         mode before using a variable permute.
3865         (expand_vec_perm_var): Make global.
3866         (expand_mult_highpart): Use expand_vec_perm_const.
3867         * fold-const.c: Includes vec-perm-indices.h.
3868         * tree-ssa-forwprop.c: Likewise.
3869         * tree-vect-data-refs.c: Likewise.
3870         * tree-vect-generic.c: Likewise.
3871         * tree-vect-loop.c: Likewise.
3872         * tree-vect-slp.c: Likewise.
3873         * tree-vect-stmts.c: Likewise.
3874         * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
3875         Delete.
3876         * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
3877         * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
3878         (aarch64_vectorize_vec_perm_const_ok): Fuse into...
3879         (aarch64_vectorize_vec_perm_const): ...this new function.
3880         (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3881         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3882         * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
3883         * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
3884         * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3885         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3886         (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
3887         into...
3888         (arm_vectorize_vec_perm_const): ...this new function.  Explicitly
3889         check for NEON modes.
3890         * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
3891         * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
3892         * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
3893         (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
3894         into...
3895         (ix86_vectorize_vec_perm_const): ...this new function.  Incorporate
3896         the old VEC_PERM_CONST conditions.
3897         * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
3898         * config/ia64/vect.md (vec_perm_const<mode>): Delete.
3899         * config/ia64/ia64.c (ia64_expand_vec_perm_const)
3900         (ia64_vectorize_vec_perm_const_ok): Merge into...
3901         (ia64_vectorize_vec_perm_const): ...this new function.
3902         * config/mips/loongson.md (vec_perm_const<mode>): Delete.
3903         * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
3904         * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
3905         * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
3906         * config/mips/mips.c (mips_expand_vec_perm_const)
3907         (mips_vectorize_vec_perm_const_ok): Merge into...
3908         (mips_vectorize_vec_perm_const): ...this new function.
3909         * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
3910         * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
3911         * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
3912         * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
3913         * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
3914         (rs6000_expand_vec_perm_const): Delete.
3915         * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
3916         Delete.
3917         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3918         (altivec_expand_vec_perm_const_le): Take each operand individually.
3919         Operate on constant selectors rather than rtxes.
3920         (altivec_expand_vec_perm_const): Likewise.  Update call to
3921         altivec_expand_vec_perm_const_le.
3922         (rs6000_expand_vec_perm_const): Delete.
3923         (rs6000_vectorize_vec_perm_const_ok): Delete.
3924         (rs6000_vectorize_vec_perm_const): New function.
3925         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3926         an element count and rtx array.
3927         (rs6000_expand_extract_even): Update call accordingly.
3928         (rs6000_expand_interleave): Likewise.
3929         * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
3930         * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
3931         * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
3932         * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
3933         (rs6000_expand_vec_perm_const): Delete.
3934         * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3935         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3936         (altivec_expand_vec_perm_const_le): Take each operand individually.
3937         Operate on constant selectors rather than rtxes.
3938         (altivec_expand_vec_perm_const): Likewise.  Update call to
3939         altivec_expand_vec_perm_const_le.
3940         (rs6000_expand_vec_perm_const): Delete.
3941         (rs6000_vectorize_vec_perm_const_ok): Delete.
3942         (rs6000_vectorize_vec_perm_const): New function.  Remove stray
3943         reference to the SPE evmerge intructions.
3944         (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3945         an element count and rtx array.
3946         (rs6000_expand_extract_even): Update call accordingly.
3947         (rs6000_expand_interleave): Likewise.
3948         * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
3949         * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
3950         new function.
3951         (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3952
3953 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3954
3955         * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
3956         vector mode and that that mode matches the mode of the data
3957         being permuted.
3958         (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
3959         out into expand_vec_perm_var.  Do all CONST_VECTOR handling here,
3960         directly using expand_vec_perm_1 when forcing selectors into
3961         registers.
3962         (expand_vec_perm_var): New function, split out from expand_vec_perm.
3963
3964 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3965
3966         * optabs-query.h (can_vec_perm_p): Delete.
3967         (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
3968         * optabs-query.c (can_vec_perm_p): Split into...
3969         (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
3970         (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
3971         particular selector is valid.
3972         * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3973         * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3974         (vect_grouped_load_supported): Likewise.
3975         (vect_shift_permute_load_chain): Likewise.
3976         * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3977         (vect_transform_slp_perm_load): Likewise.
3978         * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3979         (vectorizable_bswap): Likewise.
3980         (vect_gen_perm_mask_checked): Likewise.
3981         * fold-const.c (fold_ternary_loc): Likewise.  Don't take
3982         implementations of variable permutation vectors into account
3983         when deciding which selector to use.
3984         * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
3985         vec_perm_const_optab is supported; instead use can_vec_perm_const_p
3986         with a false third argument.
3987         * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
3988         to test whether the constant selector is valid and can_vec_perm_var_p
3989         to test whether a variable selector is valid.
3990
3991 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
3992
3993         * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
3994         * optabs-query.c (can_vec_perm_p): Likewise.
3995         * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
3996         instead of vec_perm_indices.
3997         * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
3998         (vect_gen_perm_mask_checked): Likewise,
3999         * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4000         (vect_gen_perm_mask_checked): Likewise,
4001
4002 2018-01-02  Richard Sandiford  <richard.sandiford@linaro.org>
4003
4004         * optabs-query.h (qimode_for_vec_perm): Declare.
4005         * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4006         (qimode_for_vec_perm): ...this new function.
4007         * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4008
4009 2018-01-02  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
4010
4011         * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4012         does not have a conditional at the top.
4013
4014 2018-01-02  Richard Biener  <rguenther@suse.de>
4015
4016         * ipa-inline.c (big_speedup_p): Fix expression.
4017
4018 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
4019
4020         PR target/81616
4021         * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4022         for generic 4->6.
4023
4024 2018-01-02  Jan Hubicka  <hubicka@ucw.cz>
4025
4026         PR target/81616
4027         Generic tuning.
4028         * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4029         cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4030         and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4031         cond_taken_branch_cost 3->4.
4032
4033 2018-01-01  Jakub Jelinek  <jakub@redhat.com>
4034
4035         PR tree-optimization/83581
4036         * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4037         TODO_cleanup_cfg if any changes have been made.
4038
4039         PR middle-end/83608
4040         * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4041         convert_modes if target mode has the right side, but different mode
4042         class.
4043
4044         PR middle-end/83609
4045         * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4046         last argument when extracting from CONCAT.  If either from_real or
4047         from_imag is NULL, use expansion through memory.  If result is not
4048         a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4049         the parts directly to inner mode, if even that fails, use expansion
4050         through memory.
4051
4052         PR middle-end/83623
4053         * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4054         check for bswap in mode rather than HImode and use that in expand_unop
4055         too.
4056 \f
4057 Copyright (C) 2018 Free Software Foundation, Inc.
4058
4059 Copying and distribution of this file, with or without modification,
4060 are permitted in any medium without royalty provided the copyright
4061 notice and this notice are preserved.