| blob | bf8689abb9f70a52bee71b1a56d6012efea492fb |
1 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
3 * config/rl78/rl78.md: New define_expand "smindi3".
5 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
7 * config/rl78/rl78.md: New define_expand "smaxdi3".
9 2018-01-22 Carl Love <cel@us.ibm.com>
11 * config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
12 LVX_V1TI): Add macro expansion.
13 * config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
14 definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
15 VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
16 * config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
17 Change check to determine if the instruction is a byte reversing
18 entry. Fix typo in comment.
19 * config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
20 for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
21 Add def_builtin calls for new builtins.
22 * config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
23 Add define_insn expansion.
25 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
27 * config/rl78/rl78.md: New define_expand "umaxdi3".
29 2018-01-22 Sebastian Perta <sebastian.perta@renesas.com>
31 * config/rl78/rl78.c (rl78_note_reg_set): fixed dead reg check
32 for non-QImode registers
34 2018-01-22 Richard Biener <rguenther@suse.de>
36 PR tree-optimization/83963
37 * graphite-scop-detection.c (scop_detection::get_sese): Delay
38 including the loop exit block.
39 (scop_detection::merge_sese): Likewise.
40 (scop_detection::add_scop): Do it here instead.
42 2018-01-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
44 * doc/sourcebuild.texi (arm_softfloat): Document.
46 2018-01-21 John David Anglin <danglin@gcc.gnu.org>
48 PR gcc/77734
49 * config/pa/pa.c (pa_function_ok_for_sibcall): Use
50 targetm.binds_local_p instead of TREE_PUBLIC to check local binding.
51 Move TARGET_PORTABLE_RUNTIME check after TARGET_64BIT check.
53 2018-01-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
54 David Edelsohn <dje.gcc@gmail.com>
56 PR target/83946
57 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
58 Change "crset eq" to "crset 2".
59 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
60 (*call_indirect_aix<mode>_nospec): Likewise.
61 (*call_value_indirect_aix<mode>_nospec): Likewise.
62 (*call_indirect_elfv2<mode>_nospec): Likewise.
63 (*call_value_indirect_elfv2<mode>_nospec): Likewise.
64 (*sibcall_nonlocal_sysv<mode>): Change "crset eq" to "crset 2";
65 change assembly output from . to $.
66 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
67 (indirect_jump<mode>_nospec): Change assembly output from . to $.
68 (*tablejump<mode>_internal1_nospec): Likewise.
70 2018-01-21 Oleg Endo <olegendo@gcc.gnu.org>
72 PR target/80870
73 * config/sh/sh_optimize_sett_clrt.cc:
74 Use INCLUDE_ALGORITHM and INCLUDE_VECTOR instead of direct includes.
76 2018-01-20 Richard Sandiford <richard.sandiford@linaro.org>
78 PR tree-optimization/83940
79 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): Set
80 offset_dt to vect_constant_def rather than vect_unknown_def_type.
81 (vect_check_load_store_mask): Add a mask_dt_out parameter and
82 use it to pass back the definition type.
83 (vect_check_store_rhs): Likewise rhs_dt_out.
84 (vect_build_gather_load_calls): Add a mask_dt argument and use
85 it instead of a call to vect_is_simple_use.
86 (vectorizable_store): Update calls to vect_check_load_store_mask
87 and vect_check_store_rhs. Use the dt returned by the latter instead
88 of scatter_src_dt. Use the cached mask_dt and gs_info.offset_dt
89 instead of calls to vect_is_simple_use. Pass the scalar rather
90 than the vector operand to vect_is_simple_use when handling
91 second and subsequent copies of an rhs value.
92 (vectorizable_load): Update calls to vect_check_load_store_mask
93 and vect_build_gather_load_calls. Use the cached mask_dt and
94 gs_info.offset_dt instead of calls to vect_is_simple_use.
96 2018-01-20 Jakub Jelinek <jakub@redhat.com>
98 PR middle-end/83945
99 * tree-emutls.c: Include gimplify.h.
100 (lower_emutls_2): New function.
101 (lower_emutls_1): If ADDR_EXPR is a gimple invariant and walk_tree
102 with lower_emutls_2 callback finds some TLS decl in it, unshare_expr
103 it before further processing.
105 PR target/83930
106 * simplify-rtx.c (simplify_binary_operation_1) <case UMOD>: Use
107 UINTVAL (trueop1) instead of INTVAL (op1).
109 2018-01-19 Jakub Jelinek <jakub@redhat.com>
111 PR debug/81570
112 PR debug/83728
113 * dwarf2cfi.c (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define to
114 INCOMING_FRAME_SP_OFFSET if not defined.
115 (scan_trace): Add ENTRY argument. If true and
116 DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET,
117 emit a note to adjust the CFA offset.
118 (create_cfi_notes): Adjust scan_trace callers.
119 (create_cie_data): Use DEFAULT_INCOMING_FRAME_SP_OFFSET rather than
120 INCOMING_FRAME_SP_OFFSET in the CIE.
121 * config/i386/i386.h (DEFAULT_INCOMING_FRAME_SP_OFFSET): Define.
122 * config/stormy16/stormy16.h (DEFAULT_INCOMING_FRAME_SP_OFFSET):
123 Likewise.
124 * doc/tm.texi.in (DEFAULT_INCOMING_FRAME_SP_OFFSET): Document.
125 * doc/tm.texi: Regenerated.
127 2018-01-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
129 PR rtl-optimization/83147
130 * lra-constraints.c (remove_inheritance_pseudos): Use
131 lra_substitute_pseudo_within_insn.
133 2018-01-19 Tom de Vries <tom@codesourcery.com>
134 Cesar Philippidis <cesar@codesourcery.com>
136 PR target/83920
137 * config/nvptx/nvptx.c (nvptx_single): Fix jit workaround.
139 2018-01-19 Cesar Philippidis <cesar@codesourcery.com>
141 PR target/83790
142 * config/nvptx/nvptx.c (output_init_frag): Don't use generic address
143 spaces for function labels.
145 2018-01-19 Martin Liska <mliska@suse.cz>
147 * predict.def (PRED_LOOP_EXIT): Change from 85 to 89.
148 (PRED_LOOP_EXIT_WITH_RECURSION): Change from 72 to 78.
149 (PRED_LOOP_EXTRA_EXIT): Change from 83 to 67.
150 (PRED_OPCODE_POSITIVE): Change from 64 to 59.
151 (PRED_TREE_OPCODE_POSITIVE): Change from 64 to 59.
152 (PRED_CONST_RETURN): Change from 69 to 65.
153 (PRED_NULL_RETURN): Change from 91 to 71.
154 (PRED_LOOP_IV_COMPARE_GUESS): Change from 98 to 64.
155 (PRED_LOOP_GUARD): Change from 66 to 73.
157 2018-01-19 Martin Liska <mliska@suse.cz>
159 * predict.c (predict_insn_def): Add new assert.
160 (struct branch_predictor): Change type to signed integer.
161 (test_prediction_value_range): Amend test to cover
162 PROB_UNINITIALIZED.
163 * predict.def (PRED_LOOP_ITERATIONS): Use the new constant.
164 (PRED_LOOP_ITERATIONS_GUESSED): Likewise.
165 (PRED_LOOP_ITERATIONS_MAX): Likewise.
166 (PRED_LOOP_IV_COMPARE): Likewise.
167 * predict.h (PROB_UNINITIALIZED): Define new constant.
169 2018-01-19 Martin Liska <mliska@suse.cz>
171 * predict.c (dump_prediction): Add new format for
172 analyze_brprob.py script which is enabled with -details
173 suboption.
174 * profile-count.h (precise_p): New function.
176 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
178 PR tree-optimization/83922
179 * tree-vect-loop.c (vect_verify_full_masking): Return false if
180 there are no statements that need masking.
181 (vect_active_double_reduction_p): New function.
182 (vect_analyze_loop_operations): Use it when handling phis that
183 are not in the loop header.
185 2018-01-19 Richard Sandiford <richard.sandiford@linaro.org>
187 PR tree-optimization/83914
188 * tree-vect-loop.c (vectorizable_induction): Don't convert
189 init_expr or apply the peeling adjustment for inductions
190 that are nested within the vectorized loop.
192 2018-01-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
194 * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
195 instead of NEG.
197 2018-01-18 Jakub Jelinek <jakub@redhat.com>
199 PR sanitizer/81715
200 PR testsuite/83882
201 * function.h (gimplify_parameters): Add gimple_seq * argument.
202 * function.c: Include gimple.h and options.h.
203 (gimplify_parameters): Add cleanup argument, add CLOBBER stmts
204 for the added local temporaries if needed.
205 * gimplify.c (gimplify_body): Adjust gimplify_parameters caller,
206 if there are any parameter cleanups, wrap whole body into a
207 try/finally with the cleanups.
209 2018-01-18 Wilco Dijkstra <wdijkstr@arm.com>
211 PR target/82964
212 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p):
213 Use GET_MODE_CLASS for scalar floating point.
215 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
217 PR ipa/82256
218 patch by PaX Team
219 * cgraphclones.c (cgraph_node::create_version_clone_with_body):
220 Fix call of call_cgraph_insertion_hooks.
222 2018-01-18 Martin Sebor <msebor@redhat.com>
224 * doc/invoke.texi (-Wclass-memaccess): Tweak text.
226 2018-01-18 Jan Hubicka <hubicka@ucw.cz>
228 PR ipa/83619
229 * cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Update edge
230 frequencies.
232 2018-01-18 Boris Kolpackov <boris@codesynthesis.com>
234 PR other/70268
235 * common.opt: (-ffile-prefix-map): New option.
236 * opts.c (common_handle_option): Defer it.
237 * opts-global.c (handle_common_deferred_options): Handle it.
238 * debug.h (remap_debug_filename, add_debug_prefix_map): Move to...
239 * file-prefix-map.h: New file.
240 (remap_debug_filename, add_debug_prefix_map): ...here.
241 (add_macro_prefix_map, add_file_prefix_map, remap_macro_filename): New.
242 * final.c (debug_prefix_map, add_debug_prefix_map
243 remap_debug_filename): Move to...
244 * file-prefix-map.c: New file.
245 (file_prefix_map, add_prefix_map, remap_filename) ...here and rename,
246 generalize, get rid of alloca(), use strrchr() instead of strchr().
247 (add_macro_prefix_map, add_debug_prefix_map, add_file_prefix_map):
248 Implement in terms of add_prefix_map().
249 (remap_macro_filename, remap_debug_filename): Implement in term of
250 remap_filename().
251 * Makefile.in (OBJS, PLUGIN_HEADERS): Add new files.
252 * builtins.c (fold_builtin_FILE): Call remap_macro_filename().
253 * dbxout.c: Include file-prefix-map.h.
254 * varasm.c: Likewise.
255 * vmsdbgout.c: Likewise.
256 * xcoffout.c: Likewise.
257 * dwarf2out.c: Likewise plus omit new options from DW_AT_producer.
258 * doc/cppopts.texi (-fmacro-prefix-map): Document.
259 * doc/invoke.texi (-ffile-prefix-map): Document.
260 (-fdebug-prefix-map): Update description.
262 2018-01-18 Martin Liska <mliska@suse.cz>
264 * config/i386/i386.c (indirect_thunk_name): Document that also
265 lfence is emitted.
266 (output_indirect_thunk): Document why both instructions
267 (pause and lfence) are generated.
269 2018-01-18 Richard Biener <rguenther@suse.de>
271 PR tree-optimization/83887
272 * graphite-scop-detection.c
273 (scop_detection::get_nearest_dom_with_single_entry): Remove.
274 (scop_detection::get_nearest_pdom_with_single_exit): Likewise.
275 (scop_detection::merge_sese): Re-implement with a flood-fill
276 algorithm that properly finds a SESE region if it exists.
278 2018-01-18 Jakub Jelinek <jakub@redhat.com>
280 PR c/61240
281 * match.pd ((P + A) - P, P - (P + A), (P + A) - (P + B)): For
282 pointer_diff optimizations use view_convert instead of convert.
284 2018-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
286 * config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
287 Generate different code for -mno-speculate-indirect-jumps.
288 (*call_value_indirect_nonlocal_sysv<mode>): Likewise.
289 (*call_indirect_aix<mode>): Disable for
290 -mno-speculate-indirect-jumps.
291 (*call_indirect_aix<mode>_nospec): New define_insn.
292 (*call_value_indirect_aix<mode>): Disable for
293 -mno-speculate-indirect-jumps.
294 (*call_value_indirect_aix<mode>_nospec): New define_insn.
295 (*sibcall_nonlocal_sysv<mode>): Generate different code for
296 -mno-speculate-indirect-jumps.
297 (*sibcall_value_nonlocal_sysv<mode>): Likewise.
299 2018-01-17 Michael Meissner <meissner@linux.vnet.ibm.com>
301 * config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
302 long double type, set the flags for noting the default long double
303 type, even if we don't pass or return a long double type.
305 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
307 PR ipa/83051
308 * ipa-inline.c (flatten_function): Do not overwrite final inlining
309 failure.
311 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
313 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
314 support for merge[hl].
315 (fold_mergehl_helper): New helper function.
316 (tree-vector-builder.h): New #include for tree_vector_builder usage.
317 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
318 (altivec_vmrglw_direct): Add xxmrglw insn.
320 2018-01-17 Andrew Waterman <andrew@sifive.com>
322 * config/riscv/riscv.c (riscv_conditional_register_usage): If
323 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
325 2018-01-17 David Malcolm <dmalcolm@redhat.com>
327 PR lto/83121
328 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
329 call the lto_location_cache before reading the
330 DECL_SOURCE_LOCATION of the types.
332 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
333 Richard Sandiford <richard.sandiford@linaro.org>
335 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
336 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
337 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
338 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
339 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
340 Add declaration.
341 * config/aarch64/constraints.md (aarch64_movti_operand):
342 Limit immediates.
343 * config/aarch64/predicates.md (Uti): Add new constraint.
345 2018-01-17 Carl Love <cel@us.ibm.com>
346 * config/rs6000/vsx.md (define_expand xl_len_r,
347 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
348 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
349 lxvll.
350 (define_expand, define_insn): Move the shift left from the
351 define_insn to the define_expand for lxvl and stxvl instructions.
352 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
353 and XL_LEN_R definitions to PURE.
355 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
357 * config/i386/i386.c (indirect_thunk_name): Declare regno
358 as unsigned int. Compare regno with INVALID_REGNUM.
359 (output_indirect_thunk): Ditto.
360 (output_indirect_thunk_function): Ditto.
361 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
362 in the call to output_indirect_thunk_function.
364 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
366 PR middle-end/83884
367 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
368 rather than the size of inner_type to determine the stack slot size
369 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
371 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
373 PR target/83546
374 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
375 to PTA_SILVERMONT.
377 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
379 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
380 endian Linux systems to optionally enable multilibs for selecting
381 the long double type if the user configured an explicit type.
382 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
383 have no long double multilibs if not defined.
384 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
385 warn if the user used -mabi={ieee,ibm}longdouble and we built
386 multilibs for long double.
387 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
388 appropriate multilib option.
389 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
390 multilib options.
391 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
392 for building long double multilibs.
393 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
395 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
397 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
398 copies.
400 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
401 64 bits.
402 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
403 128 bits.
405 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
406 variables.
408 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
409 return value.
411 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
413 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
414 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
416 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
418 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
419 different rtl trees depending on TARGET_64BIT.
420 (rs6000_gen_lvx): Likewise.
422 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
424 * config/visium/visium.md (nop): Tweak comment.
425 (hazard_nop): Likewise.
427 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
429 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
430 -mspeculate-indirect-jumps.
431 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
432 for -mno-speculate-indirect-jumps.
433 (*call_indirect_elfv2<mode>_nospec): New define_insn.
434 (*call_value_indirect_elfv2<mode>): Disable for
435 -mno-speculate-indirect-jumps.
436 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
437 (indirect_jump): Emit different RTL for
438 -mno-speculate-indirect-jumps.
439 (*indirect_jump<mode>): Disable for
440 -mno-speculate-indirect-jumps.
441 (*indirect_jump<mode>_nospec): New define_insn.
442 (tablejump): Emit different RTL for
443 -mno-speculate-indirect-jumps.
444 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
445 (tablejumpsi_nospec): New define_expand.
446 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
447 (tablejumpdi_nospec): New define_expand.
448 (*tablejump<mode>_internal1): Disable for
449 -mno-speculate-indirect-jumps.
450 (*tablejump<mode>_internal1_nospec): New define_insn.
451 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
452 option.
454 2018-01-16 Artyom Skrobov tyomitch@gmail.com
456 * caller-save.c (insert_save): Drop unnecessary parameter. All
457 callers updated.
459 2018-01-16 Jakub Jelinek <jakub@redhat.com>
460 Richard Biener <rguenth@suse.de>
462 PR libgomp/83590
463 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
464 return early, inline manually is_gimple_sizepos. Make sure if we
465 call gimplify_expr we don't end up with a gimple constant.
466 * tree.c (variably_modified_type_p): Don't return true for
467 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
468 * gimplify.h (is_gimple_sizepos): Remove.
470 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
472 PR tree-optimization/83857
473 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
474 vectorizable_live_operation for pure SLP statements.
475 (vectorizable_live_operation): Handle PHIs.
477 2018-01-16 Richard Biener <rguenther@suse.de>
479 PR tree-optimization/83867
480 * tree-vect-stmts.c (vect_transform_stmt): Precompute
481 nested_in_vect_loop_p since the scalar stmt may get invalidated.
483 2018-01-16 Jakub Jelinek <jakub@redhat.com>
485 PR c/83844
486 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
487 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
488 If off is not INTEGER_CST, issue a may not be aligned warning
489 rather than isn't aligned. Use isn%'t rather than isn't.
490 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
491 into MULT_EXPR.
492 <case MULT_EXPR>: Improve the case when bottom and one of the
493 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
494 operand, in that case check if the other operand is multiple of
495 bottom divided by the INTEGER_CST operand.
497 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
499 PR target/83858
500 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
501 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
502 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
503 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
504 * config/pa/pa.c (pa_function_arg_advance): Likewise.
505 (pa_function_arg, pa_arg_partial_bytes): Likewise.
506 (pa_function_arg_size): New function.
508 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
510 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
511 in a separate statement.
513 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
515 PR tree-optimization/83847
516 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
517 group gathers and scatters.
519 2018-01-16 Jakub Jelinek <jakub@redhat.com>
521 PR rtl-optimization/86620
522 * params.def (max-sched-ready-insns): Bump minimum value to 1.
524 PR rtl-optimization/83213
525 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
526 to last if both are JUMP_INSNs.
528 PR tree-optimization/83843
529 * gimple-ssa-store-merging.c
530 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
531 store_immediate_info for bswap/nop orig_stores.
533 2018-01-15 Andrew Waterman <andrew@sifive.com>
535 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
536 !TARGET_MUL.
537 <UDIV>: Increase cost if !TARGET_DIV.
539 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
541 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
542 (define_attr "cr_logical_3op"): New.
543 (cceq_ior_compare): Adjust.
544 (cceq_ior_compare_complement): Adjust.
545 (*cceq_rev_compare): Adjust.
546 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
547 (is_cracked_insn): Adjust.
548 (insn_must_be_first_in_group): Adjust.
549 * config/rs6000/40x.md: Adjust.
550 * config/rs6000/440.md: Adjust.
551 * config/rs6000/476.md: Adjust.
552 * config/rs6000/601.md: Adjust.
553 * config/rs6000/603.md: Adjust.
554 * config/rs6000/6xx.md: Adjust.
555 * config/rs6000/7450.md: Adjust.
556 * config/rs6000/7xx.md: Adjust.
557 * config/rs6000/8540.md: Adjust.
558 * config/rs6000/cell.md: Adjust.
559 * config/rs6000/e300c2c3.md: Adjust.
560 * config/rs6000/e500mc.md: Adjust.
561 * config/rs6000/e500mc64.md: Adjust.
562 * config/rs6000/e5500.md: Adjust.
563 * config/rs6000/e6500.md: Adjust.
564 * config/rs6000/mpc.md: Adjust.
565 * config/rs6000/power4.md: Adjust.
566 * config/rs6000/power5.md: Adjust.
567 * config/rs6000/power6.md: Adjust.
568 * config/rs6000/power7.md: Adjust.
569 * config/rs6000/power8.md: Adjust.
570 * config/rs6000/power9.md: Adjust.
571 * config/rs6000/rs64.md: Adjust.
572 * config/rs6000/titan.md: Adjust.
574 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
576 * config/i386/predicates.md (indirect_branch_operand): Rewrite
577 ix86_indirect_branch_register logic.
579 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
581 * config/i386/constraints.md (Bs): Update
582 ix86_indirect_branch_register check. Don't check
583 ix86_indirect_branch_register with GOT_memory_operand.
584 (Bw): Likewise.
585 * config/i386/predicates.md (GOT_memory_operand): Don't check
586 ix86_indirect_branch_register here.
587 (GOT32_symbol_operand): Likewise.
589 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
591 * config/i386/predicates.md (constant_call_address_operand):
592 Rewrite ix86_indirect_branch_register logic.
593 (sibcall_insn_operand): Likewise.
595 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
597 * config/i386/constraints.md (Bs): Replace
598 ix86_indirect_branch_thunk_register with
599 ix86_indirect_branch_register.
600 (Bw): Likewise.
601 * config/i386/i386.md (indirect_jump): Likewise.
602 (tablejump): Likewise.
603 (*sibcall_memory): Likewise.
604 (*sibcall_value_memory): Likewise.
605 Peepholes of indirect call and jump via memory: Likewise.
606 * config/i386/i386.opt: Likewise.
607 * config/i386/predicates.md (indirect_branch_operand): Likewise.
608 (GOT_memory_operand): Likewise.
609 (call_insn_operand): Likewise.
610 (sibcall_insn_operand): Likewise.
611 (GOT32_symbol_operand): Likewise.
613 2018-01-15 Jakub Jelinek <jakub@redhat.com>
615 PR middle-end/83837
616 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
617 type rather than type addr's type points to.
618 (expand_omp_atomic_mutex): Likewise.
619 (expand_omp_atomic): Likewise.
621 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
623 PR target/83839
624 * config/i386/i386.c (output_indirect_thunk_function): Use
625 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
626 for __x86_return_thunk.
628 2018-01-15 Richard Biener <rguenther@suse.de>
630 PR middle-end/83850
631 * expmed.c (extract_bit_field_1): Fix typo.
633 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
635 PR target/83687
636 * config/arm/iterators.md (VF): New mode iterator.
637 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
638 Remove integer-related logic from pattern.
639 (neon_vabd<mode>_3): Likewise.
641 2018-01-15 Jakub Jelinek <jakub@redhat.com>
643 PR middle-end/82694
644 * common.opt (fstrict-overflow): No longer an alias.
645 (fwrapv-pointer): New option.
646 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
647 also for pointer types based on flag_wrapv_pointer.
648 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
649 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
650 opts->x_flag_wrapv got set.
651 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
652 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
653 POINTER_TYPE_OVERFLOW_UNDEFINED.
654 * match.pd: Likewise in address comparison pattern.
655 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
657 2018-01-15 Richard Biener <rguenther@suse.de>
659 PR lto/83804
660 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
661 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
662 Reset type names to their identifier if their TYPE_DECL doesn't
663 have linkage (and thus is used for ODR and devirt).
664 (save_debug_info_for_decl): Remove.
665 (save_debug_info_for_type): Likewise.
666 (add_tree_to_fld_list): Adjust.
667 * tree-pretty-print.c (dump_generic_node): Make dumping of
668 type names more robust.
670 2018-01-15 Richard Biener <rguenther@suse.de>
672 * BASE-VER: Bump to 8.0.1.
674 2018-01-14 Martin Sebor <msebor@redhat.com>
676 PR other/83508
677 * builtins.c (check_access): Avoid warning when the no-warning bit
678 is set.
680 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
682 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
683 * ira-color (allocno_hard_regs_compare): Likewise.
685 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
687 PR target/83013
688 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
689 Use .pushsection/.popsection.
691 2018-01-14 Martin Sebor <msebor@redhat.com>
693 PR c++/81327
694 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
696 2018-01-14 Jakub Jelinek <jakub@redhat.com>
698 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
699 entry from extra_headers.
700 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
701 extra_headers, make the list bitwise identical to the i?86-*-* one.
703 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
705 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
706 -mcmodel=large with -mindirect-branch=thunk,
707 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
708 -mfunction-return=thunk-extern.
709 * doc/invoke.texi: Document -mcmodel=large is incompatible with
710 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
711 -mfunction-return=thunk and -mfunction-return=thunk-extern.
713 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
715 * config/i386/i386.c (print_reg): Print the name of the full
716 integer register without '%'.
717 (ix86_print_operand): Handle 'V'.
718 * doc/extend.texi: Document 'V' modifier.
720 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
722 * config/i386/constraints.md (Bs): Disallow memory operand for
723 -mindirect-branch-register.
724 (Bw): Likewise.
725 * config/i386/predicates.md (indirect_branch_operand): Likewise.
726 (GOT_memory_operand): Likewise.
727 (call_insn_operand): Likewise.
728 (sibcall_insn_operand): Likewise.
729 (GOT32_symbol_operand): Likewise.
730 * config/i386/i386.md (indirect_jump): Call convert_memory_address
731 for -mindirect-branch-register.
732 (tablejump): Likewise.
733 (*sibcall_memory): Likewise.
734 (*sibcall_value_memory): Likewise.
735 Disallow peepholes of indirect call and jump via memory for
736 -mindirect-branch-register.
737 (*call_pop): Replace m with Bw.
738 (*call_value_pop): Likewise.
739 (*sibcall_pop_memory): Replace m with Bs.
740 * config/i386/i386.opt (mindirect-branch-register): New option.
741 * doc/invoke.texi: Document -mindirect-branch-register option.
743 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
745 * config/i386/i386-protos.h (ix86_output_function_return): New.
746 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
747 set function_return_type.
748 (indirect_thunk_name): Add ret_p to indicate thunk for function
749 return.
750 (output_indirect_thunk_function): Pass false to
751 indirect_thunk_name.
752 (ix86_output_indirect_branch_via_reg): Likewise.
753 (ix86_output_indirect_branch_via_push): Likewise.
754 (output_indirect_thunk_function): Create alias for function
755 return thunk if regno < 0.
756 (ix86_output_function_return): New function.
757 (ix86_handle_fndecl_attribute): Handle function_return.
758 (ix86_attribute_table): Add function_return.
759 * config/i386/i386.h (machine_function): Add
760 function_return_type.
761 * config/i386/i386.md (simple_return_internal): Use
762 ix86_output_function_return.
763 (simple_return_internal_long): Likewise.
764 * config/i386/i386.opt (mfunction-return=): New option.
765 (indirect_branch): Mention -mfunction-return=.
766 * doc/extend.texi: Document function_return function attribute.
767 * doc/invoke.texi: Document -mfunction-return= option.
769 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
771 * config/i386/i386-opts.h (indirect_branch): New.
772 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
773 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
774 with local indirect jump when converting indirect call and jump.
775 (ix86_set_indirect_branch_type): New.
776 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
777 (indirectlabelno): New.
778 (indirect_thunk_needed): Likewise.
779 (indirect_thunk_bnd_needed): Likewise.
780 (indirect_thunks_used): Likewise.
781 (indirect_thunks_bnd_used): Likewise.
782 (INDIRECT_LABEL): Likewise.
783 (indirect_thunk_name): Likewise.
784 (output_indirect_thunk): Likewise.
785 (output_indirect_thunk_function): Likewise.
786 (ix86_output_indirect_branch_via_reg): Likewise.
787 (ix86_output_indirect_branch_via_push): Likewise.
788 (ix86_output_indirect_branch): Likewise.
789 (ix86_output_indirect_jmp): Likewise.
790 (ix86_code_end): Call output_indirect_thunk_function if needed.
791 (ix86_output_call_insn): Call ix86_output_indirect_branch if
792 needed.
793 (ix86_handle_fndecl_attribute): Handle indirect_branch.
794 (ix86_attribute_table): Add indirect_branch.
795 * config/i386/i386.h (machine_function): Add indirect_branch_type
796 and has_local_indirect_jump.
797 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
798 to true.
799 (tablejump): Likewise.
800 (*indirect_jump): Use ix86_output_indirect_jmp.
801 (*tablejump_1): Likewise.
802 (simple_return_indirect_internal): Likewise.
803 * config/i386/i386.opt (mindirect-branch=): New option.
804 (indirect_branch): New.
805 (keep): Likewise.
806 (thunk): Likewise.
807 (thunk-inline): Likewise.
808 (thunk-extern): Likewise.
809 * doc/extend.texi: Document indirect_branch function attribute.
810 * doc/invoke.texi: Document -mindirect-branch= option.
812 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
814 PR ipa/83051
815 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
817 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
819 * ipa-inline.c (want_inline_small_function_p): Return false if
820 inlining has already failed with CIF_FINAL_ERROR.
821 (update_caller_keys): Call want_inline_small_function_p before
822 can_inline_edge_p.
823 (update_callee_keys): Likewise.
825 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
827 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
828 New function.
829 (rs6000_quadword_masked_address_p): Likewise.
830 (quad_aligned_load_p): Likewise.
831 (quad_aligned_store_p): Likewise.
832 (const_load_sequence_p): Add comment to describe the outer-most loop.
833 (mimic_memory_attributes_and_flags): New function.
834 (rs6000_gen_stvx): Likewise.
835 (replace_swapped_aligned_store): Likewise.
836 (rs6000_gen_lvx): Likewise.
837 (replace_swapped_aligned_load): Likewise.
838 (replace_swapped_load_constant): Capitalize argument name in
839 comment describing this function.
840 (rs6000_analyze_swaps): Add a third pass to search for vector loads
841 and stores that access quad-word aligned addresses and replace
842 with stvx or lvx instructions when appropriate.
843 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
844 New function prototype.
845 (rs6000_quadword_masked_address_p): Likewise.
846 (rs6000_gen_lvx): Likewise.
847 (rs6000_gen_stvx): Likewise.
848 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
849 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
850 when memory address is aligned.
851 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
852 this split to select lvx instruction when memory address is aligned.
853 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
854 instruction when memory address is aligned.
855 (*vsx_le_perm_load_v16qi): Likewise.
856 (four unnamed splitters): Modify to select the stvx instruction
857 when memory is aligned.
859 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
861 * predict.c (determine_unlikely_bbs): Handle correctly BBs
862 which appears in the queue multiple times.
864 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
865 Alan Hayward <alan.hayward@arm.com>
866 David Sherwood <david.sherwood@arm.com>
868 * tree-vectorizer.h (vec_lower_bound): New structure.
869 (_loop_vec_info): Add check_nonzero and lower_bounds.
870 (LOOP_VINFO_CHECK_NONZERO): New macro.
871 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
872 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
873 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
874 fields. Make seg_len the distance travelled, not including the
875 access size.
876 (dr_direction_indicator): Declare.
877 (dr_zero_step_indicator): Likewise.
878 (dr_known_forward_stride_p): Likewise.
879 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
880 tree-ssanames.h.
881 (runtime_alias_check_p): Allow runtime alias checks with
882 variable strides.
883 (operator ==): Compare access_size and align.
884 (prune_runtime_alias_test_list): Rework for new distinction between
885 the access_size and seg_len.
886 (create_intersect_range_checks_index): Likewise. Cope with polynomial
887 segment lengths.
888 (get_segment_min_max): New function.
889 (create_intersect_range_checks): Use it.
890 (dr_step_indicator): New function.
891 (dr_direction_indicator): Likewise.
892 (dr_zero_step_indicator): Likewise.
893 (dr_known_forward_stride_p): Likewise.
894 * tree-loop-distribution.c (data_ref_segment_size): Return
895 DR_STEP * (niters - 1).
896 (compute_alias_check_pairs): Update call to the dr_with_seg_len
897 constructor.
898 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
899 (vect_preserves_scalar_order_p): New function, split out from...
900 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
901 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
902 (vect_vfa_access_size): New function.
903 (vect_vfa_align): Likewise.
904 (vect_compile_time_alias): Take access_size_a and access_b arguments.
905 (dump_lower_bound): New function.
906 (vect_check_lower_bound): Likewise.
907 (vect_small_gap_p): Likewise.
908 (vectorizable_with_step_bound_p): Likewise.
909 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
910 depencies if the vectorization factor is 1. Convert the checks
911 for nonzero steps into checks on the bounds of DR_STEP. Try using
912 a bunds check for variable steps if the minimum required step is
913 relatively small. Update calls to the dr_with_seg_len
914 constructor and to vect_compile_time_alias.
915 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
916 function.
917 (vect_loop_versioning): Call it.
918 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
919 when retrying.
920 (vect_estimate_min_profitable_iters): Account for any bounds checks.
922 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
923 Alan Hayward <alan.hayward@arm.com>
924 David Sherwood <david.sherwood@arm.com>
926 * doc/sourcebuild.texi (vect_scatter_store): Document.
927 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
928 optabs.
929 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
930 Document.
931 * genopinit.c (main): Add supports_vec_scatter_store and
932 supports_vec_scatter_store_cached to target_optabs.
933 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
934 IFN_MASK_SCATTER_STORE.
935 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
936 functions.
937 * internal-fn.h (internal_store_fn_p): Declare.
938 (internal_fn_stored_value_index): Likewise.
939 * internal-fn.c (scatter_store_direct): New macro.
940 (expand_scatter_store_optab_fn): New function.
941 (direct_scatter_store_optab_supported_p): New macro.
942 (internal_store_fn_p): New function.
943 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
944 IFN_MASK_SCATTER_STORE.
945 (internal_fn_mask_index): Likewise.
946 (internal_fn_stored_value_index): New function.
947 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
948 for scatter stores.
949 * optabs-query.h (supports_vec_scatter_store_p): Declare.
950 * optabs-query.c (supports_vec_scatter_store_p): New function.
951 * tree-vectorizer.h (vect_get_store_rhs): Declare.
952 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
953 true for scatter stores.
954 (vect_gather_scatter_fn_p): Handle scatter stores too.
955 (vect_check_gather_scatter): Consider using scatter stores if
956 supports_vec_scatter_store_p.
957 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
958 scatter stores too.
959 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
960 internal_fn_stored_value_index.
961 (check_load_store_masking): Handle scatter stores too.
962 (vect_get_store_rhs): Make public.
963 (vectorizable_call): Use internal_store_fn_p.
964 (vectorizable_store): Handle scatter store internal functions.
965 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
966 when deciding whether the end of the group has been reached.
967 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
968 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
969 (mask_scatter_store<mode>): New insns.
971 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
972 Alan Hayward <alan.hayward@arm.com>
973 David Sherwood <david.sherwood@arm.com>
975 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
976 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
977 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
978 function.
979 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
980 Use vect_truncate_gather_scatter_offset if we can't treat the
981 operation as a normal gather load or scatter store.
982 (get_group_load_store_type): Take the gather_scatter_info
983 as argument. Try using a gather load or scatter store for
984 single-element groups.
985 (get_load_store_type): Update calls to get_group_load_store_type
986 and vect_use_strided_gather_scatters_p.
988 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
989 Alan Hayward <alan.hayward@arm.com>
990 David Sherwood <david.sherwood@arm.com>
992 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
993 optional tree argument.
994 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
995 null target hooks.
996 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
997 but continue to use the current value as a fallback.
998 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
999 to compare the updates.
1000 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
1001 (get_load_store_type): Use it when handling a strided access.
1002 (vect_get_strided_load_store_ops): New function.
1003 (vect_get_data_ptr_increment): Likewise.
1004 (vectorizable_load): Handle strided gather loads. Always pass
1005 a step to vect_create_data_ref_ptr and bump_vector_ptr.
1007 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1008 Alan Hayward <alan.hayward@arm.com>
1009 David Sherwood <david.sherwood@arm.com>
1011 * doc/md.texi (gather_load@var{m}): Document.
1012 (mask_gather_load@var{m}): Likewise.
1013 * genopinit.c (main): Add supports_vec_gather_load and
1014 supports_vec_gather_load_cached to target_optabs.
1015 * optabs-tree.c (init_tree_optimization_optabs): Use
1016 ggc_cleared_alloc to allocate target_optabs.
1017 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
1018 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
1019 functions.
1020 * internal-fn.h (internal_load_fn_p): Declare.
1021 (internal_gather_scatter_fn_p): Likewise.
1022 (internal_fn_mask_index): Likewise.
1023 (internal_gather_scatter_fn_supported_p): Likewise.
1024 * internal-fn.c (gather_load_direct): New macro.
1025 (expand_gather_load_optab_fn): New function.
1026 (direct_gather_load_optab_supported_p): New macro.
1027 (direct_internal_fn_optab): New function.
1028 (internal_load_fn_p): Likewise.
1029 (internal_gather_scatter_fn_p): Likewise.
1030 (internal_fn_mask_index): Likewise.
1031 (internal_gather_scatter_fn_supported_p): Likewise.
1032 * optabs-query.c (supports_at_least_one_mode_p): New function.
1033 (supports_vec_gather_load_p): Likewise.
1034 * optabs-query.h (supports_vec_gather_load_p): Declare.
1035 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
1036 and memory_type field.
1037 (NUM_PATTERNS): Bump to 15.
1038 * tree-vect-data-refs.c: Include internal-fn.h.
1039 (vect_gather_scatter_fn_p): New function.
1040 (vect_describe_gather_scatter_call): Likewise.
1041 (vect_check_gather_scatter): Try using internal functions for
1042 gather loads. Recognize existing calls to a gather load function.
1043 (vect_analyze_data_refs): Consider using gather loads if
1044 supports_vec_gather_load_p.
1045 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
1046 (vect_get_gather_scatter_offset_type): Likewise.
1047 (vect_convert_mask_for_vectype): Likewise.
1048 (vect_add_conversion_to_patterm): Likewise.
1049 (vect_try_gather_scatter_pattern): Likewise.
1050 (vect_recog_gather_scatter_pattern): New pattern recognizer.
1051 (vect_vect_recog_func_ptrs): Add it.
1052 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
1053 internal_fn_mask_index and internal_gather_scatter_fn_p.
1054 (check_load_store_masking): Take the gather_scatter_info as an
1055 argument and handle gather loads.
1056 (vect_get_gather_scatter_ops): New function.
1057 (vectorizable_call): Check internal_load_fn_p.
1058 (vectorizable_load): Likewise. Handle gather load internal
1059 functions.
1060 (vectorizable_store): Update call to check_load_store_masking.
1061 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
1062 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
1063 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
1064 (aarch64_gather_scale_operand_d): New predicates.
1065 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
1066 (mask_gather_load<mode>): New insns.
1068 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1069 Alan Hayward <alan.hayward@arm.com>
1070 David Sherwood <david.sherwood@arm.com>
1072 * optabs.def (fold_left_plus_optab): New optab.
1073 * doc/md.texi (fold_left_plus_@var{m}): Document.
1074 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
1075 * internal-fn.c (fold_left_direct): Define.
1076 (expand_fold_left_optab_fn): Likewise.
1077 (direct_fold_left_optab_supported_p): Likewise.
1078 * fold-const-call.c (fold_const_fold_left): New function.
1079 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
1080 * tree-parloops.c (valid_reduction_p): New function.
1081 (gather_scalar_reductions): Use it.
1082 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
1083 (vect_finish_replace_stmt): Declare.
1084 * tree-vect-loop.c (fold_left_reduction_fn): New function.
1085 (needs_fold_left_reduction_p): New function, split out from...
1086 (vect_is_simple_reduction): ...here. Accept reductions that
1087 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
1088 (vect_force_simple_reduction): Also store the reduction type in
1089 the assignment's STMT_VINFO_REDUC_TYPE.
1090 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
1091 (merge_with_identity): New function.
1092 (vect_expand_fold_left): Likewise.
1093 (vectorize_fold_left_reduction): Likewise.
1094 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
1095 scalar phi in place for it. Check for target support and reject
1096 cases that would reassociate the operation. Defer the transform
1097 phase to vectorize_fold_left_reduction.
1098 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
1099 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
1100 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
1102 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1104 * tree-if-conv.c (predicate_mem_writes): Remove redundant
1105 call to ifc_temp_var.
1107 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1108 Alan Hayward <alan.hayward@arm.com>
1109 David Sherwood <david.sherwood@arm.com>
1111 * target.def (legitimize_address_displacement): Take the original
1112 offset as a poly_int.
1113 * targhooks.h (default_legitimize_address_displacement): Update
1114 accordingly.
1115 * targhooks.c (default_legitimize_address_displacement): Likewise.
1116 * doc/tm.texi: Regenerate.
1117 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
1118 as an argument, moving assert of ad->disp == ad->disp_term to...
1119 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
1120 Try calling targetm.legitimize_address_displacement before expanding
1121 the address rather than afterwards, and adjust for the new interface.
1122 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
1123 Match the new hook interface. Handle SVE addresses.
1124 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
1125 new hook interface.
1127 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1129 * Makefile.in (OBJS): Add early-remat.o.
1130 * target.def (select_early_remat_modes): New hook.
1131 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
1132 * doc/tm.texi: Regenerate.
1133 * targhooks.h (default_select_early_remat_modes): Declare.
1134 * targhooks.c (default_select_early_remat_modes): New function.
1135 * timevar.def (TV_EARLY_REMAT): New timevar.
1136 * passes.def (pass_early_remat): New pass.
1137 * tree-pass.h (make_pass_early_remat): Declare.
1138 * early-remat.c: New file.
1139 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
1140 function.
1141 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
1143 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1144 Alan Hayward <alan.hayward@arm.com>
1145 David Sherwood <david.sherwood@arm.com>
1147 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
1148 vfm1 with a bound_epilog parameter.
1149 (vect_do_peeling): Update calls accordingly, and move the prologue
1150 call earlier in the function. Treat the base bound_epilog as 0 for
1151 fully-masked loops and retain vf - 1 for other loops. Add 1 to
1152 this base when peeling for gaps.
1153 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
1154 with fully-masked loops.
1155 (vect_estimate_min_profitable_iters): Handle the single peeled
1156 iteration in that case.
1158 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1159 Alan Hayward <alan.hayward@arm.com>
1160 David Sherwood <david.sherwood@arm.com>
1162 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
1163 single-element interleaving even if the size is not a power of 2.
1164 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
1165 accesses for single-element interleaving if the group size is
1166 not a power of 2.
1168 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1169 Alan Hayward <alan.hayward@arm.com>
1170 David Sherwood <david.sherwood@arm.com>
1172 * doc/md.texi (fold_extract_last_@var{m}): Document.
1173 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
1174 * optabs.def (fold_extract_last_optab): New optab.
1175 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
1176 * internal-fn.c (fold_extract_direct): New macro.
1177 (expand_fold_extract_optab_fn): Likewise.
1178 (direct_fold_extract_optab_supported_p): Likewise.
1179 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
1180 * tree-vect-loop.c (vect_model_reduction_cost): Handle
1181 EXTRACT_LAST_REDUCTION.
1182 (get_initial_def_for_reduction): Do not create an initial vector
1183 for EXTRACT_LAST_REDUCTION reductions.
1184 (vectorizable_reduction): Leave the scalar phi in place for
1185 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
1186 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
1187 epilogue code for EXTRACT_LAST_REDUCTION and defer the
1188 transform phase to vectorizable_condition.
1189 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
1190 split out from...
1191 (vect_finish_stmt_generation): ...here.
1192 (vect_finish_replace_stmt): New function.
1193 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
1194 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
1195 pattern.
1196 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
1198 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1199 Alan Hayward <alan.hayward@arm.com>
1200 David Sherwood <david.sherwood@arm.com>
1202 * doc/md.texi (extract_last_@var{m}): Document.
1203 * optabs.def (extract_last_optab): New optab.
1204 * internal-fn.def (EXTRACT_LAST): New internal function.
1205 * internal-fn.c (cond_unary_direct): New macro.
1206 (expand_cond_unary_optab_fn): Likewise.
1207 (direct_cond_unary_optab_supported_p): Likewise.
1208 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
1209 loops using EXTRACT_LAST.
1210 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
1211 (extract_last_<mode>): ...this optab.
1212 (vec_extract<mode><Vel>): Update accordingly.
1214 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1215 Alan Hayward <alan.hayward@arm.com>
1216 David Sherwood <david.sherwood@arm.com>
1218 * target.def (empty_mask_is_expensive): New hook.
1219 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
1220 * doc/tm.texi: Regenerate.
1221 * targhooks.h (default_empty_mask_is_expensive): Declare.
1222 * targhooks.c (default_empty_mask_is_expensive): New function.
1223 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
1224 if the target says that empty masks are expensive.
1225 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
1226 New function.
1227 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
1229 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1230 Alan Hayward <alan.hayward@arm.com>
1231 David Sherwood <david.sherwood@arm.com>
1233 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
1234 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
1235 (vect_use_loop_mask_for_alignment_p): New function.
1236 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
1237 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
1238 niters_skip argument. Make sure that the first niters_skip elements
1239 of the first iteration are inactive.
1240 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
1241 Update call to vect_set_loop_masks_directly.
1242 (get_misalign_in_elems): New function, split out from...
1243 (vect_gen_prolog_loop_niters): ...here.
1244 (vect_update_init_of_dr): Take a code argument that specifies whether
1245 the adjustment should be added or subtracted.
1246 (vect_update_init_of_drs): Likewise.
1247 (vect_prepare_for_masked_peels): New function.
1248 (vect_do_peeling): Skip prologue peeling if we're using a mask
1249 instead. Update call to vect_update_inits_of_drs.
1250 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1251 mask_skip_niters.
1252 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
1253 alignment. Do not include the number of peeled iterations in
1254 the minimum threshold in that case.
1255 (vectorizable_induction): Adjust the start value down by
1256 LOOP_VINFO_MASK_SKIP_NITERS iterations.
1257 (vect_transform_loop): Call vect_prepare_for_masked_peels.
1258 Take the number of skipped iterations into account when calculating
1259 the loop bounds.
1260 * tree-vect-stmts.c (vect_gen_while_not): New function.
1262 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1263 Alan Hayward <alan.hayward@arm.com>
1264 David Sherwood <david.sherwood@arm.com>
1266 * doc/sourcebuild.texi (vect_fully_masked): Document.
1267 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
1268 default value to 0.
1269 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
1270 split out from...
1271 (vect_analyze_loop_2): ...here. Don't check the vectorization
1272 factor against the number of loop iterations if the loop is
1273 fully-masked.
1275 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1276 Alan Hayward <alan.hayward@arm.com>
1277 David Sherwood <david.sherwood@arm.com>
1279 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
1280 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
1281 (dump_groups): Update accordingly.
1282 (iv_use::mem_type): New member variable.
1283 (address_p): New function.
1284 (record_use): Add a mem_type argument and initialize the new
1285 mem_type field.
1286 (record_group_use): Add a mem_type argument. Use address_p.
1287 Remove obsolete null checks of base_object. Update call to record_use.
1288 (find_interesting_uses_op): Update call to record_group_use.
1289 (find_interesting_uses_cond): Likewise.
1290 (find_interesting_uses_address): Likewise.
1291 (get_mem_type_for_internal_fn): New function.
1292 (find_address_like_use): Likewise.
1293 (find_interesting_uses_stmt): Try find_address_like_use before
1294 calling find_interesting_uses_op.
1295 (addr_offset_valid_p): Use the iv mem_type field as the type
1296 of the addressed memory.
1297 (add_autoinc_candidates): Likewise.
1298 (get_address_cost): Likewise.
1299 (split_small_address_groups_p): Use address_p.
1300 (split_address_groups): Likewise.
1301 (add_iv_candidate_for_use): Likewise.
1302 (autoinc_possible_for_pair): Likewise.
1303 (rewrite_groups): Likewise.
1304 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1305 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1306 (get_alias_ptr_type_for_ptr_address): New function.
1307 (rewrite_use_address): Rewrite address uses in calls that were
1308 identified by find_address_like_use.
1310 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1311 Alan Hayward <alan.hayward@arm.com>
1312 David Sherwood <david.sherwood@arm.com>
1314 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1315 TARGET_MEM_REFs.
1316 * gimple-expr.h (is_gimple_addressable: Likewise.
1317 * gimple-expr.c (is_gimple_address): Likewise.
1318 * internal-fn.c (expand_call_mem_ref): New function.
1319 (expand_mask_load_optab_fn): Use it.
1320 (expand_mask_store_optab_fn): Likewise.
1322 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1323 Alan Hayward <alan.hayward@arm.com>
1324 David Sherwood <david.sherwood@arm.com>
1326 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1327 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1328 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1329 (cond_umax@var{mode}): Document.
1330 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1331 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1332 (cond_umin_optab, cond_umax_optab): New optabs.
1333 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1334 (COND_IOR, COND_XOR): New internal functions.
1335 * internal-fn.h (get_conditional_internal_fn): Declare.
1336 * internal-fn.c (cond_binary_direct): New macro.
1337 (expand_cond_binary_optab_fn): Likewise.
1338 (direct_cond_binary_optab_supported_p): Likewise.
1339 (get_conditional_internal_fn): New function.
1340 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1341 Cope with reduction statements that are vectorized as calls rather
1342 than assignments.
1343 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1344 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1345 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1346 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1347 (UNSPEC_COND_EOR): New unspecs.
1348 (optab): Add mappings for them.
1349 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1350 (sve_int_op, sve_fp_op): New int attributes.
1352 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1353 Alan Hayward <alan.hayward@arm.com>
1354 David Sherwood <david.sherwood@arm.com>
1356 * optabs.def (while_ult_optab): New optab.
1357 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1358 * internal-fn.def (WHILE_ULT): New internal function.
1359 * internal-fn.h (direct_internal_fn_supported_p): New override
1360 that takes two types as argument.
1361 * internal-fn.c (while_direct): New macro.
1362 (expand_while_optab_fn): New function.
1363 (convert_optab_supported_p): Likewise.
1364 (direct_while_optab_supported_p): New macro.
1365 * wide-int.h (wi::udiv_ceil): New function.
1366 * tree-vectorizer.h (rgroup_masks): New structure.
1367 (vec_loop_masks): New typedef.
1368 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1369 and fully_masked_p.
1370 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1371 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1372 (vect_max_vf): New function.
1373 (slpeel_make_loop_iterate_ntimes): Delete.
1374 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1375 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1376 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1377 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1378 internal-fn.h, stor-layout.h and optabs-query.h.
1379 (vect_set_loop_mask): New function.
1380 (add_preheader_seq): Likewise.
1381 (add_header_seq): Likewise.
1382 (interleave_supported_p): Likewise.
1383 (vect_maybe_permute_loop_masks): Likewise.
1384 (vect_set_loop_masks_directly): Likewise.
1385 (vect_set_loop_condition_masked): Likewise.
1386 (vect_set_loop_condition_unmasked): New function, split out from
1387 slpeel_make_loop_iterate_ntimes.
1388 (slpeel_make_loop_iterate_ntimes): Rename to..
1389 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1390 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1391 (vect_do_peeling): Update call accordingly.
1392 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1393 loops.
1394 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1395 mask_compare_type, can_fully_mask_p and fully_masked_p.
1396 (release_vec_loop_masks): New function.
1397 (_loop_vec_info): Use it to free the loop masks.
1398 (can_produce_all_loop_masks_p): New function.
1399 (vect_get_max_nscalars_per_iter): Likewise.
1400 (vect_verify_full_masking): Likewise.
1401 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1402 retries, and free the mask rgroups before retrying. Check loop-wide
1403 reasons for disallowing fully-masked loops. Make the final decision
1404 about whether use a fully-masked loop or not.
1405 (vect_estimate_min_profitable_iters): Do not assume that peeling
1406 for the number of iterations will be needed for fully-masked loops.
1407 (vectorizable_reduction): Disable fully-masked loops.
1408 (vectorizable_live_operation): Likewise.
1409 (vect_halve_mask_nunits): New function.
1410 (vect_double_mask_nunits): Likewise.
1411 (vect_record_loop_mask): Likewise.
1412 (vect_get_loop_mask): Likewise.
1413 (vect_transform_loop): Handle the case in which the final loop
1414 iteration might handle a partial vector. Call vect_set_loop_condition
1415 instead of slpeel_make_loop_iterate_ntimes.
1416 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1417 (check_load_store_masking): New function.
1418 (prepare_load_store_mask): Likewise.
1419 (vectorizable_store): Handle fully-masked loops.
1420 (vectorizable_load): Likewise.
1421 (supportable_widening_operation): Use vect_halve_mask_nunits for
1422 booleans.
1423 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1424 (vect_gen_while): New function.
1425 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1426 (aarch64_uqdec<mode>): New insn.
1428 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1429 Alan Hayward <alan.hayward@arm.com>
1430 David Sherwood <david.sherwood@arm.com>
1432 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1433 (reduc_xor_scal_optab): New optabs.
1434 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1435 (reduc_xor_scal_@var{m}): Document.
1436 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1437 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1438 internal functions.
1439 * fold-const-call.c (fold_const_call): Handle them.
1440 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1441 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1442 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1443 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1444 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1445 (UNSPEC_XORV): New unspecs.
1446 (optab): Add entries for them.
1447 (BITWISEV): New int iterator.
1448 (bit_reduc_op): New int attributes.
1450 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1451 Alan Hayward <alan.hayward@arm.com>
1452 David Sherwood <david.sherwood@arm.com>
1454 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1455 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1456 * optabs.def (vec_shl_insert_optab): New optab.
1457 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1458 (duplicate_and_interleave): Likewise.
1459 * tree-vect-loop.c: Include internal-fn.h.
1460 (neutral_op_for_slp_reduction): New function, split out from
1461 get_initial_defs_for_reduction.
1462 (get_initial_def_for_reduction): Handle option 2 for variable-length
1463 vectors by loading the neutral value into a vector and then shifting
1464 the initial value into element 0.
1465 (get_initial_defs_for_reduction): Replace the code argument with
1466 the neutral value calculated by neutral_op_for_slp_reduction.
1467 Use gimple_build_vector for constant-length vectors.
1468 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1469 but the first group_size elements have a neutral value.
1470 Use duplicate_and_interleave otherwise.
1471 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1472 Update call to get_initial_defs_for_reduction. Handle SLP
1473 reductions for variable-length vectors by creating one vector
1474 result for each scalar result, with the elements associated
1475 with other scalar results stubbed out with the neutral value.
1476 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1477 Require IFN_VEC_SHL_INSERT for double reductions on
1478 variable-length vectors, or SLP reductions that have
1479 a neutral value. Require can_duplicate_and_interleave_p
1480 support for variable-length unchained SLP reductions if there
1481 is no neutral value, such as for MIN/MAX reductions. Also require
1482 the number of vector elements to be a multiple of the number of
1483 SLP statements when doing variable-length unchained SLP reductions.
1484 Update call to vect_create_epilog_for_reduction.
1485 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1486 and remove initial values.
1487 (duplicate_and_interleave): Make public.
1488 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1489 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1491 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1492 Alan Hayward <alan.hayward@arm.com>
1493 David Sherwood <david.sherwood@arm.com>
1495 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1496 (can_duplicate_and_interleave_p): New function.
1497 (vect_get_and_check_slp_defs): Take the vector of statements
1498 rather than just the current one. Remove excess parentheses.
1499 Restriction rejectinon of vect_constant_def and vect_external_def
1500 for variable-length vectors to boolean types, or types for which
1501 can_duplicate_and_interleave_p is false.
1502 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1503 (duplicate_and_interleave): New function.
1504 (vect_get_constant_vectors): Use gimple_build_vector for
1505 constant-length vectors and suitable variable-length constant
1506 vectors. Use duplicate_and_interleave for other variable-length
1507 vectors. Don't defer the update when inserting new statements.
1509 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1510 Alan Hayward <alan.hayward@arm.com>
1511 David Sherwood <david.sherwood@arm.com>
1513 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1514 min_profitable_iters doesn't go negative.
1516 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1517 Alan Hayward <alan.hayward@arm.com>
1518 David Sherwood <david.sherwood@arm.com>
1520 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1521 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1522 * optabs.def (vec_mask_load_lanes_optab): New optab.
1523 (vec_mask_store_lanes_optab): Likewise.
1524 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1525 (MASK_STORE_LANES): Likewise.
1526 * internal-fn.c (mask_load_lanes_direct): New macro.
1527 (mask_store_lanes_direct): Likewise.
1528 (expand_mask_load_optab_fn): Handle masked operations.
1529 (expand_mask_load_lanes_optab_fn): New macro.
1530 (expand_mask_store_optab_fn): Handle masked operations.
1531 (expand_mask_store_lanes_optab_fn): New macro.
1532 (direct_mask_load_lanes_optab_supported_p): Likewise.
1533 (direct_mask_store_lanes_optab_supported_p): Likewise.
1534 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1535 parameter.
1536 (vect_load_lanes_supported): Likewise.
1537 * tree-vect-data-refs.c (strip_conversion): New function.
1538 (can_group_stmts_p): Likewise.
1539 (vect_analyze_data_ref_accesses): Use it instead of checking
1540 for a pair of assignments.
1541 (vect_store_lanes_supported): Take a masked_p parameter.
1542 (vect_load_lanes_supported): Likewise.
1543 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1544 vect_store_lanes_supported and vect_load_lanes_supported.
1545 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1546 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1547 parameter. Don't allow gaps for masked accesses.
1548 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1549 and vect_load_lanes_supported.
1550 (get_load_store_type): Take a masked_p parameter and update
1551 call to get_group_load_store_type.
1552 (vectorizable_store): Update call to get_load_store_type.
1553 Handle IFN_MASK_STORE_LANES.
1554 (vectorizable_load): Update call to get_load_store_type.
1555 Handle IFN_MASK_LOAD_LANES.
1557 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1558 Alan Hayward <alan.hayward@arm.com>
1559 David Sherwood <david.sherwood@arm.com>
1561 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1562 modes for SVE.
1563 * config/aarch64/aarch64-protos.h
1564 (aarch64_sve_struct_memory_operand_p): Declare.
1565 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1566 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1567 (VPRED, vpred): Handle SVE structure modes.
1568 * config/aarch64/constraints.md (Utx): New constraint.
1569 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1570 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1571 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1572 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1573 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1574 structure modes. Split into pieces after RA.
1575 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1576 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1577 New patterns.
1578 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1579 SVE structure modes.
1580 (aarch64_classify_address): Likewise.
1581 (sizetochar): Move earlier in file.
1582 (aarch64_print_operand): Handle SVE register lists.
1583 (aarch64_array_mode): New function.
1584 (aarch64_sve_struct_memory_operand_p): Likewise.
1585 (TARGET_ARRAY_MODE): Redefine.
1587 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1588 Alan Hayward <alan.hayward@arm.com>
1589 David Sherwood <david.sherwood@arm.com>
1591 * target.def (array_mode): New target hook.
1592 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1593 * doc/tm.texi: Regenerate.
1594 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1595 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1596 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1597 targetm.array_mode.
1598 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1599 type sizes.
1601 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1602 Alan Hayward <alan.hayward@arm.com>
1603 David Sherwood <david.sherwood@arm.com>
1605 * fold-const.c (fold_binary_loc): Check the argument types
1606 rather than the result type when testing for a vector operation.
1608 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1610 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1611 * doc/tm.texi: Regenerate.
1613 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1614 Alan Hayward <alan.hayward@arm.com>
1615 David Sherwood <david.sherwood@arm.com>
1617 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1618 (sve): Document new AArch64 extension.
1619 * doc/md.texi (w): Extend the description of the AArch64
1620 constraint to include SVE vectors.
1621 (Upl, Upa): Document new AArch64 predicate constraints.
1622 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1623 enum.
1624 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1625 (msve-vector-bits=): New option.
1626 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1627 SVE when these are disabled.
1628 (sve): New extension.
1629 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1630 modes. Adjust their number of units based on aarch64_sve_vg.
1631 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1632 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1633 aarch64_addr_query_type.
1634 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1635 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1636 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1637 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1638 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1639 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1640 (aarch64_simd_imm_zero_p): Delete.
1641 (aarch64_check_zero_based_sve_index_immediate): Declare.
1642 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1643 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1644 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1645 (aarch64_sve_float_mul_immediate_p): Likewise.
1646 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1647 rather than an rtx.
1648 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1649 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1650 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1651 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1652 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1653 (aarch64_regmode_natural_size): Likewise.
1654 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1655 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1656 left one place.
1657 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1658 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1659 for VG and the SVE predicate registers.
1660 (V_ALIASES): Add a "z"-prefixed alias.
1661 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1662 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1663 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1664 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1665 (REG_CLASS_NAMES): Add entries for them.
1666 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1667 and the predicate registers.
1668 (aarch64_sve_vg): Declare.
1669 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1670 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1671 (REGMODE_NATURAL_SIZE): Define.
1672 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1673 SVE macros.
1674 * config/aarch64/aarch64.c: Include cfgrtl.h.
1675 (simd_immediate_info): Add a constructor for series vectors,
1676 and an associated step field.
1677 (aarch64_sve_vg): New variable.
1678 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1679 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1680 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1681 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1682 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1683 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1684 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1685 (aarch64_get_mask_mode): New functions.
1686 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1687 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1688 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1689 predicate modes and predicate registers. Explicitly restrict
1690 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1691 to store a vector mode if it is recognized by
1692 aarch64_classify_vector_mode.
1693 (aarch64_regmode_natural_size): New function.
1694 (aarch64_hard_regno_caller_save_mode): Return the original mode
1695 for predicates.
1696 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1697 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1698 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1699 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1700 functions.
1701 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1702 does not overlap dest if the function is frame-related. Handle
1703 SVE constants.
1704 (aarch64_split_add_offset): New function.
1705 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1706 them aarch64_add_offset.
1707 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1708 and update call to aarch64_sub_sp.
1709 (aarch64_add_cfa_expression): New function.
1710 (aarch64_expand_prologue): Pass extra temporary registers to the
1711 functions above. Handle the case in which we need to emit new
1712 DW_CFA_expressions for registers that were originally saved
1713 relative to the stack pointer, but now have to be expressed
1714 relative to the frame pointer.
1715 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1716 functions above.
1717 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1718 IP0 and IP1 values for SVE frames.
1719 (aarch64_expand_vec_series): New function.
1720 (aarch64_expand_sve_widened_duplicate): Likewise.
1721 (aarch64_expand_sve_const_vector): Likewise.
1722 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1723 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1724 into the register, rather than emitting a SET directly.
1725 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1726 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1727 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1728 (offset_9bit_signed_scaled_p): New functions.
1729 (aarch64_replicate_bitmask_imm): New function.
1730 (aarch64_bitmask_imm): Use it.
1731 (aarch64_cannot_force_const_mem): Reject expressions involving
1732 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1733 (aarch64_classify_index): Handle SVE indices, by requiring
1734 a plain register index with a scale that matches the element size.
1735 (aarch64_classify_address): Handle SVE addresses. Assert that
1736 the mode of the address is VOIDmode or an integer mode.
1737 Update call to aarch64_classify_symbol.
1738 (aarch64_classify_symbolic_expression): Update call to
1739 aarch64_classify_symbol.
1740 (aarch64_const_vec_all_in_range_p): New function.
1741 (aarch64_print_vector_float_operand): Likewise.
1742 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1743 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1744 and the FP immediates 1.0 and 0.5.
1745 (aarch64_print_address_internal): Handle SVE addresses.
1746 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1747 (aarch64_regno_regclass): Handle predicate registers.
1748 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1749 data modes.
1750 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1751 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1752 (aarch64_convert_sve_vector_bits): New function.
1753 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1754 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1755 rather than an rtx.
1756 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1757 Handle SVE vector and predicate modes. Accept VL-based constants
1758 that need only one temporary register, and VL offsets that require
1759 no temporary registers.
1760 (aarch64_conditional_register_usage): Mark the predicate registers
1761 as fixed if SVE isn't available.
1762 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1763 Return true for SVE vector and predicate modes.
1764 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1765 rather than an unsigned int. Handle SVE modes.
1766 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1767 SVE modes.
1768 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1769 if SVE is enabled.
1770 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1771 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1772 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1773 (aarch64_sve_float_mul_immediate_p): New functions.
1774 (aarch64_sve_valid_immediate): New function.
1775 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1776 Explicitly reject structure modes. Check for INDEX constants.
1777 Handle PTRUE and PFALSE constants.
1778 (aarch64_check_zero_based_sve_index_immediate): New function.
1779 (aarch64_simd_imm_zero_p): Delete.
1780 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1781 vector modes. Accept constants in the range of CNT[BHWD].
1782 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1783 ask for an Advanced SIMD mode.
1784 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1785 (aarch64_simd_vector_alignment): Handle SVE predicates.
1786 (aarch64_vectorize_preferred_vector_alignment): New function.
1787 (aarch64_simd_vector_alignment_reachable): Use it instead of
1788 the vector size.
1789 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1790 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1791 functions.
1792 (MAX_VECT_LEN): Delete.
1793 (expand_vec_perm_d): Add a vec_flags field.
1794 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1795 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1796 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1797 for SVE modes.
1798 (aarch64_evpc_rev): Rename to...
1799 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1800 (aarch64_evpc_rev_global): New function.
1801 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1802 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1803 MAX_VECT_LEN.
1804 (aarch64_evpc_sve_tbl): New function.
1805 (aarch64_expand_vec_perm_const_1): Update after rename of
1806 aarch64_evpc_rev. Handle SVE permutes too, trying
1807 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1808 than aarch64_evpc_tbl.
1809 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1810 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1811 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1812 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1813 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1814 (aarch64_expand_sve_vcond): New functions.
1815 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1816 of aarch64_vector_mode_p.
1817 (aarch64_dwarf_poly_indeterminate_value): New function.
1818 (aarch64_compute_pressure_classes): Likewise.
1819 (aarch64_can_change_mode_class): Likewise.
1820 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1821 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1822 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1823 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1824 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1825 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1826 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1827 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1828 constraints.
1829 (Dn, Dl, Dr): Accept const as well as const_vector.
1830 (Dz): Likewise. Compare against CONST0_RTX.
1831 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1832 of "vector" where appropriate.
1833 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1834 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1835 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1836 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1837 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1838 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1839 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1840 (v_int_equiv): Extend to SVE modes.
1841 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1842 mode attributes.
1843 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1844 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1845 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1846 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1847 (SVE_COND_FP_CMP): New int iterators.
1848 (perm_hilo): Handle the new unpack unspecs.
1849 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1850 attributes.
1851 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1852 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1853 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1854 (aarch64_equality_operator, aarch64_constant_vector_operand)
1855 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1856 (aarch64_sve_nonimmediate_operand): Likewise.
1857 (aarch64_sve_general_operand): Likewise.
1858 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1859 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1860 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1861 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1862 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1863 (aarch64_sve_float_arith_immediate): Likewise.
1864 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1865 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1866 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1867 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1868 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1869 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1870 (aarch64_sve_float_arith_operand): Likewise.
1871 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1872 (aarch64_sve_float_mul_operand): Likewise.
1873 (aarch64_sve_vec_perm_operand): Likewise.
1874 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1875 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1876 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1877 as well as const_vector.
1878 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1879 in file. Use CONST0_RTX and CONSTM1_RTX.
1880 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1881 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1882 Use aarch64_simd_imm_zero.
1883 * config/aarch64/aarch64-sve.md: New file.
1884 * config/aarch64/aarch64.md: Include it.
1885 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1886 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1887 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1888 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1889 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1890 (sve): New attribute.
1891 (enabled): Disable instructions with the sve attribute unless
1892 TARGET_SVE.
1893 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1894 aarch64_expand_mov_immediate.
1895 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1896 CNT[BHSD] immediates.
1897 (movti): Split CONST_POLY_INT moves into two halves.
1898 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1899 Split additions that need a temporary here if the destination
1900 is the stack pointer.
1901 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1902 (*add<mode>3_poly_1): New instruction.
1903 (set_clobber_cc): New expander.
1905 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1907 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1908 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1909 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1910 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1911 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1912 Change innermode from fixed_mode_size to machine_mode.
1913 (simplify_subreg): Update call accordingly. Handle a constant-sized
1914 subreg of a variable-length CONST_VECTOR.
1916 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1917 Alan Hayward <alan.hayward@arm.com>
1918 David Sherwood <david.sherwood@arm.com>
1920 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1921 (add_offset_to_base): New function, split out from...
1922 (create_mem_ref): ...here. When handling a scale other than 1,
1923 check first whether the address is valid without the offset.
1924 Add it into the base if so, leaving the index and scale as-is.
1926 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1928 PR c++/83778
1929 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1930 fold_for_warn before checking if arg2 is INTEGER_CST.
1932 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1934 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1935 (store_multiple_operation): Delete.
1936 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1937 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1938 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1939 guarded by TARGET_STRING.
1940 (rs6000_output_load_multiple): Delete.
1941 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1942 OPTION_MASK_STRING / TARGET_STRING handling.
1943 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1944 (const rs6000_opt_masks) <"string">: Change mask to 0.
1945 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1946 (MASK_STRING): Delete.
1947 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1948 parts. Simplify.
1949 (load_multiple): Delete.
1950 (*ldmsi8): Delete.
1951 (*ldmsi7): Delete.
1952 (*ldmsi6): Delete.
1953 (*ldmsi5): Delete.
1954 (*ldmsi4): Delete.
1955 (*ldmsi3): Delete.
1956 (store_multiple): Delete.
1957 (*stmsi8): Delete.
1958 (*stmsi7): Delete.
1959 (*stmsi6): Delete.
1960 (*stmsi5): Delete.
1961 (*stmsi4): Delete.
1962 (*stmsi3): Delete.
1963 (movmemsi_8reg): Delete.
1964 (corresponding unnamed define_insn): Delete.
1965 (movmemsi_6reg): Delete.
1966 (corresponding unnamed define_insn): Delete.
1967 (movmemsi_4reg): Delete.
1968 (corresponding unnamed define_insn): Delete.
1969 (movmemsi_2reg): Delete.
1970 (corresponding unnamed define_insn): Delete.
1971 (movmemsi_1reg): Delete.
1972 (corresponding unnamed define_insn): Delete.
1973 * config/rs6000/rs6000.opt (mno-string): New.
1974 (mstring): Replace by deprecation warning stub.
1975 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1977 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1979 * regrename.c (regrename_do_replace): If replacing the same
1980 reg multiple times, try to reuse last created gen_raw_REG.
1982 PR debug/81155
1983 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1984 main to workaround a bug in GDB.
1986 2018-01-12 Tom de Vries <tom@codesourcery.com>
1988 PR target/83737
1989 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1991 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1993 PR rtl-optimization/80481
1994 * ira-color.c (get_cap_member): New function.
1995 (allocnos_conflict_by_live_ranges_p): Use it.
1996 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1997 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1999 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
2001 PR target/83628
2002 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
2003 (*saddl_se_1): Ditto.
2004 (*ssubsi_1): Ditto.
2005 (*ssubl_se_1): Ditto.
2007 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2009 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
2010 rather than wi::to_widest for DR_INITs.
2011 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
2012 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
2013 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
2014 INTEGER_CSTs.
2015 (vect_analyze_group_access_1): Note that here.
2017 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2019 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
2020 polynomial type sizes.
2022 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
2024 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
2025 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
2026 (gimple_add_tmp_var): Likewise.
2028 2018-01-12 Martin Liska <mliska@suse.cz>
2030 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
2031 (gimple_alloc_sizes): Likewise.
2032 (dump_gimple_statistics): Use PRIu64 in printf format.
2033 * gimple.h: Change uint64_t to int.
2035 2018-01-12 Martin Liska <mliska@suse.cz>
2037 * tree-core.h: Use uint64_t instead of int.
2038 * tree.c (tree_node_counts): Likewise.
2039 (tree_node_sizes): Likewise.
2040 (dump_tree_statistics): Use PRIu64 in printf format.
2042 2018-01-12 Martin Liska <mliska@suse.cz>
2044 * Makefile.in: As qsort_chk is implemented in vec.c, add
2045 vec.o to linkage of gencfn-macros.
2046 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
2047 passing the info to record_node_allocation_statistics.
2048 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
2049 and pass the info.
2050 * ggc-common.c (struct ggc_usage): Add operator== and use
2051 it in operator< and compare function.
2052 * mem-stats.h (struct mem_usage): Likewise.
2053 * vec.c (struct vec_usage): Remove operator< and compare
2054 function. Can be simply inherited.
2056 2018-01-12 Martin Jambor <mjambor@suse.cz>
2058 PR target/81616
2059 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
2060 * tree-ssa-math-opts.c: Include domwalk.h.
2061 (convert_mult_to_fma_1): New function.
2062 (fma_transformation_info): New type.
2063 (fma_deferring_state): Likewise.
2064 (cancel_fma_deferring): New function.
2065 (result_of_phi): Likewise.
2066 (last_fma_candidate_feeds_initial_phi): Likewise.
2067 (convert_mult_to_fma): Added deferring logic, split actual
2068 transformation to convert_mult_to_fma_1.
2069 (math_opts_dom_walker): New type.
2070 (math_opts_dom_walker::after_dom_children): New method, body moved
2071 here from pass_optimize_widening_mul::execute, added deferring logic
2072 bits.
2073 (pass_optimize_widening_mul::execute): Moved most of code to
2074 math_opts_dom_walker::after_dom_children.
2075 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
2076 * config/i386/i386.c (ix86_option_override_internal): Added
2077 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
2079 2018-01-12 Richard Biener <rguenther@suse.de>
2081 PR debug/83157
2082 * dwarf2out.c (gen_variable_die): Do not reset old_die for
2083 inline instance vars.
2085 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
2087 PR target/81819
2088 * config/rx/rx.c (rx_is_restricted_memory_address):
2089 Handle SUBREG case.
2091 2018-01-12 Richard Biener <rguenther@suse.de>
2093 PR tree-optimization/80846
2094 * target.def (split_reduction): New target hook.
2095 * targhooks.c (default_split_reduction): New function.
2096 * targhooks.h (default_split_reduction): Declare.
2097 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
2098 target requests first reduce vectors by combining low and high
2099 parts.
2100 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
2101 (get_vectype_for_scalar_type_and_size): Export.
2102 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
2103 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
2104 * doc/tm.texi: Regenerate.
2105 * config/i386/i386.c (ix86_split_reduction): Implement
2106 TARGET_VECTORIZE_SPLIT_REDUCTION.
2108 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2110 PR target/83368
2111 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
2112 in PIC mode except for TARGET_VXWORKS_RTP.
2113 * config/sparc/sparc.c: Include cfgrtl.h.
2114 (TARGET_INIT_PIC_REG): Define.
2115 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
2116 (sparc_pic_register_p): New predicate.
2117 (sparc_legitimate_address_p): Use it.
2118 (sparc_legitimize_pic_address): Likewise.
2119 (sparc_delegitimize_address): Likewise.
2120 (sparc_mode_dependent_address_p): Likewise.
2121 (gen_load_pcrel_sym): Remove 4th parameter.
2122 (load_got_register): Adjust call to above. Remove obsolete stuff.
2123 (sparc_expand_prologue): Do not call load_got_register here.
2124 (sparc_flat_expand_prologue): Likewise.
2125 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
2126 (sparc_use_pseudo_pic_reg): New function.
2127 (sparc_init_pic_reg): Likewise.
2128 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
2129 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
2131 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
2133 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
2134 Add item for branch_cost.
2136 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
2138 PR rtl-optimization/83565
2139 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
2140 not extend the result to a larger mode for rotate operations.
2141 (num_sign_bit_copies1): Likewise.
2143 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2145 PR target/40411
2146 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
2147 -symbolic.
2148 Use values-Xc.o for -pedantic.
2149 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
2151 2018-01-12 Martin Liska <mliska@suse.cz>
2153 PR ipa/83054
2154 * ipa-devirt.c (final_warning_record::grow_type_warnings):
2155 New function.
2156 (possible_polymorphic_call_targets): Use it.
2157 (ipa_devirt): Likewise.
2159 2018-01-12 Martin Liska <mliska@suse.cz>
2161 * profile-count.h (enum profile_quality): Use 0 as invalid
2162 enum value of profile_quality.
2164 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
2166 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
2167 -mext-string options.
2169 2018-01-12 Richard Biener <rguenther@suse.de>
2171 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
2172 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
2173 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
2174 Likewise.
2175 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
2177 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
2179 * configure.ac (--with-long-double-format): Add support for the
2180 configuration option to change the default long double format on
2181 PowerPC systems.
2182 * config.gcc (powerpc*-linux*-*): Likewise.
2183 * configure: Regenerate.
2184 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
2185 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
2186 used without modification.
2188 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2190 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
2191 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
2192 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
2193 MISC_BUILTIN_SPEC_BARRIER.
2194 (rs6000_init_builtins): Likewise.
2195 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
2196 enum value.
2197 (speculation_barrier): New define_insn.
2198 * doc/extend.texi: Document __builtin_speculation_barrier.
2200 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2202 PR target/83203
2203 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
2204 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
2205 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
2206 iterators.
2207 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
2208 integral modes instead of "ss" and "sd".
2209 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
2210 vectors with 32-bit and 64-bit elements.
2211 (vecdupssescalarmodesuffix): New mode attribute.
2212 (vec_dup<mode>): Use it.
2214 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
2216 PR target/83330
2217 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
2218 frame if argument is passed on stack.
2220 2018-01-11 Jakub Jelinek <jakub@redhat.com>
2222 PR target/82682
2223 * ree.c (combine_reaching_defs): Optimize also
2224 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
2225 reg2=any_extend(exp); reg1=reg2;, formatting fix.
2227 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2229 PR middle-end/83189
2230 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
2232 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
2234 PR middle-end/83718
2235 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
2236 after they are computed.
2238 2018-01-11 Bin Cheng <bin.cheng@arm.com>
2240 PR tree-optimization/83695
2241 * gimple-loop-linterchange.cc
2242 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
2243 reset cached scev information after interchange.
2244 (pass_linterchange::execute): Remove call to scev_reset_htab.
2246 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2248 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
2249 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
2250 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
2251 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
2252 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
2253 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
2254 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
2255 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
2256 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
2257 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
2258 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
2259 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
2260 (V_lane_reg): Likewise.
2261 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
2262 New define_expand.
2263 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
2264 (vfmal_lane_low<mode>_intrinsic,
2265 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
2266 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
2267 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
2268 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
2269 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
2270 vfmsl_lane_high<mode>_intrinsic): New define_insns.
2272 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2274 * config/arm/arm-cpus.in (fp16fml): New feature.
2275 (ALL_SIMD): Add fp16fml.
2276 (armv8.2-a): Add fp16fml as an option.
2277 (armv8.3-a): Likewise.
2278 (armv8.4-a): Add fp16fml as part of fp16.
2279 * config/arm/arm.h (TARGET_FP16FML): Define.
2280 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
2281 when appropriate.
2282 * config/arm/arm-modes.def (V2HF): Define.
2283 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
2284 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
2285 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
2286 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
2287 vfmsl_low, vfmsl_high): New set of builtins.
2288 * config/arm/iterators.md (PLUSMINUS): New code iterator.
2289 (vfml_op): New code attribute.
2290 (VFMLHALVES): New int iterator.
2291 (VFML, VFMLSEL): New mode attributes.
2292 (V_reg): Define mapping for V2HF.
2293 (V_hi, V_lo): New mode attributes.
2294 (VF_constraint): Likewise.
2295 (vfml_half, vfml_half_selector): New int attributes.
2296 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
2297 define_expand.
2298 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
2299 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
2300 New define_insn.
2301 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
2302 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
2303 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2304 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2305 documentation.
2306 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2307 Document new effective target and option set.
2309 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2311 * config/arm/arm-cpus.in (armv8_4): New feature.
2312 (ARMv8_4a): New fgroup.
2313 (armv8.4-a): New arch.
2314 * config/arm/arm-tables.opt: Regenerate.
2315 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2316 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2317 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2318 Add matching rules for -march=armv8.4-a and extensions.
2319 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2321 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2323 PR target/81821
2324 * config/rx/rx.md (BW): New mode attribute.
2325 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2327 2018-01-11 Richard Biener <rguenther@suse.de>
2329 PR tree-optimization/83435
2330 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2331 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2332 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2334 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2335 Alan Hayward <alan.hayward@arm.com>
2336 David Sherwood <david.sherwood@arm.com>
2338 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2339 field.
2340 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2341 (aarch64_print_address_internal): Use it to check for a zero offset.
2343 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2344 Alan Hayward <alan.hayward@arm.com>
2345 David Sherwood <david.sherwood@arm.com>
2347 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2348 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2349 Return a poly_int64 rather than a HOST_WIDE_INT.
2350 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2351 rather than a HOST_WIDE_INT.
2352 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2353 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2354 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2355 final_offset from HOST_WIDE_INT to poly_int64.
2356 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2357 to_constant when getting the number of units in an Advanced SIMD
2358 mode.
2359 (aarch64_builtin_vectorized_function): Check for a constant number
2360 of units.
2361 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2362 GET_MODE_SIZE.
2363 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2364 attribute instead of GET_MODE_NUNITS.
2365 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2366 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2367 GET_MODE_SIZE for fixed-size registers.
2368 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2369 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2370 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2371 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2372 (aarch64_print_operand, aarch64_print_address_internal)
2373 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2374 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2375 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2376 Handle polynomial GET_MODE_SIZE.
2377 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2378 wider than SImode without modification.
2379 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2380 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2381 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2382 passing and returning SVE modes.
2383 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2384 rather than GEN_INT.
2385 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2386 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2387 (aarch64_allocate_and_probe_stack_space): Likewise.
2388 (aarch64_layout_frame): Cope with polynomial offsets.
2389 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2390 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2391 polynomial offsets.
2392 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2393 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2394 poly_int64 rather than a HOST_WIDE_INT.
2395 (aarch64_get_separate_components, aarch64_process_components)
2396 (aarch64_expand_prologue, aarch64_expand_epilogue)
2397 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2398 (aarch64_anchor_offset): New function, split out from...
2399 (aarch64_legitimize_address): ...here.
2400 (aarch64_builtin_vectorization_cost): Handle polynomial
2401 TYPE_VECTOR_SUBPARTS.
2402 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2403 GET_MODE_NUNITS.
2404 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2405 number of elements from the PARALLEL rather than the mode.
2406 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2407 rather than GET_MODE_BITSIZE.
2408 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2409 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2410 (aarch64_expand_vec_perm_const_1): Handle polynomial
2411 d->perm.length () and d->perm elements.
2412 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2413 Apply to_constant to d->perm elements.
2414 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2415 polynomial CONST_VECTOR_NUNITS.
2416 (aarch64_move_pointer): Take amount as a poly_int64 rather
2417 than an int.
2418 (aarch64_progress_pointer): Avoid temporary variable.
2419 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2420 the mode attribute instead of GET_MODE.
2422 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2423 Alan Hayward <alan.hayward@arm.com>
2424 David Sherwood <david.sherwood@arm.com>
2426 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2427 x exists before using it.
2428 (aarch64_add_constant_internal): Rename to...
2429 (aarch64_add_offset_1): ...this. Replace regnum with separate
2430 src and dest rtxes. Handle the case in which they're different,
2431 including when the offset is zero. Replace scratchreg with an rtx.
2432 Use 2 additions if there is no spare register into which we can
2433 move a 16-bit constant.
2434 (aarch64_add_constant): Delete.
2435 (aarch64_add_offset): Replace reg with separate src and dest
2436 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2437 Use aarch64_add_offset_1.
2438 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2439 an rtx rather than an int. Take the delta as a poly_int64
2440 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2441 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2442 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2443 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2444 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2445 and aarch64_add_sp.
2446 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2447 aarch64_add_constant.
2449 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2451 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2452 Use scalar_float_mode.
2454 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2456 * config/aarch64/aarch64-simd.md
2457 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2458 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2459 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2460 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2461 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2462 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2463 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2464 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2465 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2466 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2468 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2470 PR target/83514
2471 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2472 targ_options->x_arm_arch_string is non NULL.
2474 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2476 * config/aarch64/aarch64.h
2477 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2479 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2481 PR target/82096
2482 * expmed.c (emit_store_flag_force): Swap if const op0
2483 and change VOIDmode to mode of op0.
2485 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2487 PR rtl-optimization/83761
2488 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2489 than bytes to mode_for_size.
2491 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2493 PR middle-end/83189
2494 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2495 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2496 profile.
2498 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2500 PR middle-end/83575
2501 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2502 when in layout mode.
2503 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2504 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2505 partition fixup.
2507 2018-01-10 Michael Collison <michael.collison@arm.com>
2509 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2510 * config/aarch64/aarch64-option-extension.def: Add
2511 AARCH64_OPT_EXTENSION of 'fp16fml'.
2512 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2513 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2514 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2515 * config/aarch64/constraints.md (Ui7): New constraint.
2516 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2517 (VFMLA_SEL_W): Ditto.
2518 (f16quad): Ditto.
2519 (f16mac1): Ditto.
2520 (VFMLA16_LOW): New int iterator.
2521 (VFMLA16_HIGH): Ditto.
2522 (UNSPEC_FMLAL): New unspec.
2523 (UNSPEC_FMLSL): Ditto.
2524 (UNSPEC_FMLAL2): Ditto.
2525 (UNSPEC_FMLSL2): Ditto.
2526 (f16mac): New code attribute.
2527 * config/aarch64/aarch64-simd-builtins.def
2528 (aarch64_fmlal_lowv2sf): Ditto.
2529 (aarch64_fmlsl_lowv2sf): Ditto.
2530 (aarch64_fmlalq_lowv4sf): Ditto.
2531 (aarch64_fmlslq_lowv4sf): Ditto.
2532 (aarch64_fmlal_highv2sf): Ditto.
2533 (aarch64_fmlsl_highv2sf): Ditto.
2534 (aarch64_fmlalq_highv4sf): Ditto.
2535 (aarch64_fmlslq_highv4sf): Ditto.
2536 (aarch64_fmlal_lane_lowv2sf): Ditto.
2537 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2538 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2539 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2540 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2541 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2542 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2543 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2544 (aarch64_fmlal_lane_highv2sf): Ditto.
2545 (aarch64_fmlsl_lane_highv2sf): Ditto.
2546 (aarch64_fmlal_laneq_highv2sf): Ditto.
2547 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2548 (aarch64_fmlalq_lane_highv4sf): Ditto.
2549 (aarch64_fmlsl_lane_highv4sf): Ditto.
2550 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2551 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2552 * config/aarch64/aarch64-simd.md:
2553 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2554 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2555 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2556 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2557 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2558 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2559 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2560 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2561 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2562 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2563 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2564 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2565 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2566 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2567 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2568 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2569 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2570 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2571 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2572 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2573 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2574 (vfmlsl_low_u32): Ditto.
2575 (vfmlalq_low_u32): Ditto.
2576 (vfmlslq_low_u32): Ditto.
2577 (vfmlal_high_u32): Ditto.
2578 (vfmlsl_high_u32): Ditto.
2579 (vfmlalq_high_u32): Ditto.
2580 (vfmlslq_high_u32): Ditto.
2581 (vfmlal_lane_low_u32): Ditto.
2582 (vfmlsl_lane_low_u32): Ditto.
2583 (vfmlal_laneq_low_u32): Ditto.
2584 (vfmlsl_laneq_low_u32): Ditto.
2585 (vfmlalq_lane_low_u32): Ditto.
2586 (vfmlslq_lane_low_u32): Ditto.
2587 (vfmlalq_laneq_low_u32): Ditto.
2588 (vfmlslq_laneq_low_u32): Ditto.
2589 (vfmlal_lane_high_u32): Ditto.
2590 (vfmlsl_lane_high_u32): Ditto.
2591 (vfmlal_laneq_high_u32): Ditto.
2592 (vfmlsl_laneq_high_u32): Ditto.
2593 (vfmlalq_lane_high_u32): Ditto.
2594 (vfmlslq_lane_high_u32): Ditto.
2595 (vfmlalq_laneq_high_u32): Ditto.
2596 (vfmlslq_laneq_high_u32): Ditto.
2597 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2598 (AARCH64_FL_FOR_ARCH8_4): New.
2599 (AARCH64_ISA_F16FML): New ISA flag.
2600 (TARGET_F16FML): New feature flag for fp16fml.
2601 (doc/invoke.texi): Document new fp16fml option.
2603 2018-01-10 Michael Collison <michael.collison@arm.com>
2605 * config/aarch64/aarch64-builtins.c:
2606 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2607 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2608 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2609 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2610 (AARCH64_ISA_SHA3): New ISA flag.
2611 (TARGET_SHA3): New feature flag for sha3.
2612 * config/aarch64/iterators.md (sha512_op): New int attribute.
2613 (CRYPTO_SHA512): New int iterator.
2614 (UNSPEC_SHA512H): New unspec.
2615 (UNSPEC_SHA512H2): Ditto.
2616 (UNSPEC_SHA512SU0): Ditto.
2617 (UNSPEC_SHA512SU1): Ditto.
2618 * config/aarch64/aarch64-simd-builtins.def
2619 (aarch64_crypto_sha512hqv2di): New builtin.
2620 (aarch64_crypto_sha512h2qv2di): Ditto.
2621 (aarch64_crypto_sha512su0qv2di): Ditto.
2622 (aarch64_crypto_sha512su1qv2di): Ditto.
2623 (aarch64_eor3qv8hi): Ditto.
2624 (aarch64_rax1qv2di): Ditto.
2625 (aarch64_xarqv2di): Ditto.
2626 (aarch64_bcaxqv8hi): Ditto.
2627 * config/aarch64/aarch64-simd.md:
2628 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2629 (aarch64_crypto_sha512su0qv2di): Ditto.
2630 (aarch64_crypto_sha512su1qv2di): Ditto.
2631 (aarch64_eor3qv8hi): Ditto.
2632 (aarch64_rax1qv2di): Ditto.
2633 (aarch64_xarqv2di): Ditto.
2634 (aarch64_bcaxqv8hi): Ditto.
2635 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2636 (vsha512h2q_u64): Ditto.
2637 (vsha512su0q_u64): Ditto.
2638 (vsha512su1q_u64): Ditto.
2639 (veor3q_u16): Ditto.
2640 (vrax1q_u64): Ditto.
2641 (vxarq_u64): Ditto.
2642 (vbcaxq_u16): Ditto.
2643 * config/arm/types.md (crypto_sha512): New type attribute.
2644 (crypto_sha3): Ditto.
2645 (doc/invoke.texi): Document new sha3 option.
2647 2018-01-10 Michael Collison <michael.collison@arm.com>
2649 * config/aarch64/aarch64-builtins.c:
2650 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2651 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2652 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2653 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2654 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2655 (AARCH64_ISA_SM4): New ISA flag.
2656 (TARGET_SM4): New feature flag for sm4.
2657 * config/aarch64/aarch64-simd-builtins.def
2658 (aarch64_sm3ss1qv4si): Ditto.
2659 (aarch64_sm3tt1aq4si): Ditto.
2660 (aarch64_sm3tt1bq4si): Ditto.
2661 (aarch64_sm3tt2aq4si): Ditto.
2662 (aarch64_sm3tt2bq4si): Ditto.
2663 (aarch64_sm3partw1qv4si): Ditto.
2664 (aarch64_sm3partw2qv4si): Ditto.
2665 (aarch64_sm4eqv4si): Ditto.
2666 (aarch64_sm4ekeyqv4si): Ditto.
2667 * config/aarch64/aarch64-simd.md:
2668 (aarch64_sm3ss1qv4si): Ditto.
2669 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2670 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2671 (aarch64_sm4eqv4si): Ditto.
2672 (aarch64_sm4ekeyqv4si): Ditto.
2673 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2674 (sm3part_op): Ditto.
2675 (CRYPTO_SM3TT): Ditto.
2676 (CRYPTO_SM3PART): Ditto.
2677 (UNSPEC_SM3SS1): New unspec.
2678 (UNSPEC_SM3TT1A): Ditto.
2679 (UNSPEC_SM3TT1B): Ditto.
2680 (UNSPEC_SM3TT2A): Ditto.
2681 (UNSPEC_SM3TT2B): Ditto.
2682 (UNSPEC_SM3PARTW1): Ditto.
2683 (UNSPEC_SM3PARTW2): Ditto.
2684 (UNSPEC_SM4E): Ditto.
2685 (UNSPEC_SM4EKEY): Ditto.
2686 * config/aarch64/constraints.md (Ui2): New constraint.
2687 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2688 * config/arm/types.md (crypto_sm3): New type attribute.
2689 (crypto_sm4): Ditto.
2690 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2691 (vsm3tt1aq_u32): Ditto.
2692 (vsm3tt1bq_u32): Ditto.
2693 (vsm3tt2aq_u32): Ditto.
2694 (vsm3tt2bq_u32): Ditto.
2695 (vsm3partw1q_u32): Ditto.
2696 (vsm3partw2q_u32): Ditto.
2697 (vsm4eq_u32): Ditto.
2698 (vsm4ekeyq_u32): Ditto.
2699 (doc/invoke.texi): Document new sm4 option.
2701 2018-01-10 Michael Collison <michael.collison@arm.com>
2703 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2704 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2705 (AARCH64_FL_FOR_ARCH8_4): New.
2706 (AARCH64_FL_V8_4): New flag.
2707 (doc/invoke.texi): Document new armv8.4-a option.
2709 2018-01-10 Michael Collison <michael.collison@arm.com>
2711 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2712 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2713 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2714 * config/aarch64/aarch64-option-extension.def: Add
2715 AARCH64_OPT_EXTENSION of 'sha2'.
2716 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2717 (crypto): Disable sha2 and aes if crypto disabled.
2718 (crypto): Enable aes and sha2 if enabled.
2719 (simd): Disable sha2 and aes if simd disabled.
2720 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2721 New flags.
2722 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2723 (TARGET_SHA2): New feature flag for sha2.
2724 (TARGET_AES): New feature flag for aes.
2725 * config/aarch64/aarch64-simd.md:
2726 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2727 conditional on TARGET_AES.
2728 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2729 (aarch64_crypto_sha1hsi): Make pattern conditional
2730 on TARGET_SHA2.
2731 (aarch64_crypto_sha1hv4si): Ditto.
2732 (aarch64_be_crypto_sha1hv4si): Ditto.
2733 (aarch64_crypto_sha1su1v4si): Ditto.
2734 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2735 (aarch64_crypto_sha1su0v4si): Ditto.
2736 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2737 (aarch64_crypto_sha256su0v4si): Ditto.
2738 (aarch64_crypto_sha256su1v4si): Ditto.
2739 (doc/invoke.texi): Document new aes and sha2 options.
2741 2018-01-10 Martin Sebor <msebor@redhat.com>
2743 PR tree-optimization/83781
2744 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2745 as string arrays.
2747 2018-01-11 Martin Sebor <msebor@gmail.com>
2748 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2750 PR tree-optimization/83501
2751 PR tree-optimization/81703
2753 * tree-ssa-strlen.c (get_string_cst): Rename...
2754 (get_string_len): ...to this. Handle global constants.
2755 (handle_char_store): Adjust.
2757 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2758 Jim Wilson <jimw@sifive.com>
2760 * config/riscv/riscv-protos.h (riscv_output_return): New.
2761 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2762 (riscv_attribute_table, riscv_output_return),
2763 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2764 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2765 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2766 function.
2767 (riscv_expand_prologue): Add early return for naked function.
2768 (riscv_expand_epilogue): Likewise.
2769 (riscv_function_ok_for_sibcall): Return false for naked function.
2770 (riscv_set_current_function): New.
2771 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2772 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2773 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2774 * doc/extend.texi (RISC-V Function Attributes): New.
2776 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2778 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2779 check for 128-bit long double before checking TCmode.
2780 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2781 128-bit long doubles before checking TFmode or TCmode.
2782 (FLOAT128_IBM_P): Likewise.
2784 2018-01-10 Martin Sebor <msebor@redhat.com>
2786 PR tree-optimization/83671
2787 * builtins.c (c_strlen): Unconditionally return zero for the empty
2788 string.
2789 Use -Warray-bounds for warnings.
2790 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2791 for non-constant array indices with COMPONENT_REF, arrays of
2792 arrays, and pointers to arrays.
2793 (gimple_fold_builtin_strlen): Determine and set length range for
2794 non-constant character arrays.
2796 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2798 PR middle-end/81897
2799 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2800 empty blocks.
2802 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2804 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2806 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2808 PR target/83399
2809 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2810 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2811 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2812 indexed_or_indirect_operand predicate.
2813 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2814 (*vsx_le_perm_load_v8hi): Likewise.
2815 (*vsx_le_perm_load_v16qi): Likewise.
2816 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2817 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2818 (*vsx_le_perm_store_v8hi): Likewise.
2819 (*vsx_le_perm_store_v16qi): Likewise.
2820 (eight unnamed splitters): Likewise.
2822 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2824 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2825 * config/rs6000/emmintrin.h: Likewise.
2826 * config/rs6000/mmintrin.h: Likewise.
2827 * config/rs6000/xmmintrin.h: Likewise.
2829 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2831 PR c++/43486
2832 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2833 "public_flag".
2834 * tree.c (tree_nop_conversion): Return true for location wrapper
2835 nodes.
2836 (maybe_wrap_with_location): New function.
2837 (selftest::check_strip_nops): New function.
2838 (selftest::test_location_wrappers): New function.
2839 (selftest::tree_c_tests): Call it.
2840 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2841 (maybe_wrap_with_location): New decl.
2842 (EXPR_LOCATION_WRAPPER_P): New macro.
2843 (location_wrapper_p): New inline function.
2844 (tree_strip_any_location_wrapper): New inline function.
2846 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2848 PR target/83735
2849 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2850 stack_realign_offset for the largest alignment of stack slot
2851 actually used.
2852 (ix86_find_max_used_stack_alignment): New function.
2853 (ix86_finalize_stack_frame_flags): Use it. Set
2854 max_used_stack_alignment if we don't realign stack.
2855 * config/i386/i386.h (machine_function): Add
2856 max_used_stack_alignment.
2858 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2860 * config/arm/arm.opt (-mbranch-cost): New option.
2861 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2862 account.
2864 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2866 PR target/83629
2867 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2868 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2870 2018-01-10 Richard Biener <rguenther@suse.de>
2872 PR debug/83765
2873 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2874 early out so it also covers the case where we have a non-NULL
2875 origin.
2877 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2879 PR tree-optimization/83753
2880 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2881 for non-strided grouped accesses if the number of elements is 1.
2883 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2885 PR target/81616
2886 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2887 * i386.h (TARGET_USE_GATHER): Define.
2888 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2890 2018-01-10 Martin Liska <mliska@suse.cz>
2892 PR bootstrap/82831
2893 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2894 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2895 partitioning.
2896 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2897 CLEANUP_NO_PARTITIONING is not set.
2899 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2901 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2902 for vectors, as a partial revert of r254296.
2903 * rtl.h (const_vec_p): Delete.
2904 (const_vec_duplicate_p): Don't test for vector CONSTs.
2905 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2906 * expmed.c (make_tree): Likewise.
2908 Revert:
2909 * common.md (E, F): Use CONSTANT_P instead of checking for
2910 CONST_VECTOR.
2911 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2912 checking for CONST_VECTOR.
2914 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2916 PR middle-end/83575
2917 * predict.c (force_edge_cold): Handle in more sane way edges
2918 with no prediction.
2920 2018-01-09 Carl Love <cel@us.ibm.com>
2922 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2923 V4SI, V4SF types.
2924 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2925 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2926 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2927 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2928 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2929 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2930 * config/rs6000/rs6000-protos.h: Add extern defition for
2931 rs6000_generate_float2_double_code.
2932 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2933 function.
2934 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2935 (float2_v2df): Add define_expand.
2937 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2939 PR target/83628
2940 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2941 op_mode in the force_to_mode call.
2943 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2945 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2946 instead of checking each element individually.
2947 (aarch64_evpc_uzp): Likewise.
2948 (aarch64_evpc_zip): Likewise.
2949 (aarch64_evpc_ext): Likewise.
2950 (aarch64_evpc_rev): Likewise.
2951 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2952 instead of checking each element individually. Return true without
2953 generating rtl if
2954 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2955 whether all selected elements come from the same input, instead of
2956 checking each element individually. Remove calls to gen_rtx_REG,
2957 start_sequence and end_sequence and instead assert that no rtl is
2958 generated.
2960 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2962 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2963 order of HIGH and CONST checks.
2965 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2967 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2968 if the destination isn't an SSA_NAME.
2970 2018-01-09 Richard Biener <rguenther@suse.de>
2972 PR tree-optimization/83668
2973 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2974 move prologue...
2975 (canonicalize_loop_form): ... here, renamed from ...
2976 (canonicalize_loop_closed_ssa_form): ... this and amended to
2977 swap successor edges for loop exit blocks to make us use
2978 the RPO order we need for initial schedule generation.
2980 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2982 PR tree-optimization/64811
2983 * match.pd: When optimizing comparisons with Inf, avoid
2984 introducing or losing exceptions from comparisons with NaN.
2986 2018-01-09 Martin Liska <mliska@suse.cz>
2988 PR sanitizer/82517
2989 * asan.c (shadow_mem_size): Add gcc_assert.
2991 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2993 Don't save registers in main().
2995 PR target/83738
2996 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2997 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2998 * config/avr/avr.c (avr_set_current_function): Don't error if
2999 naked, OS_task or OS_main are specified at the same time.
3000 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
3001 OS_main.
3002 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
3003 attribute.
3004 * common/config/avr/avr-common.c (avr_option_optimization_table):
3005 Switch on -mmain-is-OS_task for optimizing compilations.
3007 2018-01-09 Richard Biener <rguenther@suse.de>
3009 PR tree-optimization/83572
3010 * graphite.c: Include cfganal.h.
3011 (graphite_transform_loops): Connect infinite loops to exit
3012 and remove fake edges at the end.
3014 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
3016 * ipa-inline.c (edge_badness): Revert accidental checkin.
3018 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
3020 PR ipa/80763
3021 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
3022 symbols; not inline clones.
3024 2018-01-09 Jakub Jelinek <jakub@redhat.com>
3026 PR target/83507
3027 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
3028 hard registers. Formatting fixes.
3030 PR preprocessor/83722
3031 * gcc.c (try_generate_repro): Pass
3032 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
3033 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
3034 do_report_bug.
3036 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
3037 Kito Cheng <kito.cheng@gmail.com>
3039 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
3040 (riscv_leaf_function_p): Delete.
3041 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
3043 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3045 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
3046 function.
3047 (do_ifelse): New function.
3048 (do_isel): New function.
3049 (do_sub3): New function.
3050 (do_add3): New function.
3051 (do_load_mask_compare): New function.
3052 (do_overlap_load_compare): New function.
3053 (expand_compare_loop): New function.
3054 (expand_block_compare): Call expand_compare_loop() when appropriate.
3055 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
3056 option description.
3057 (-mblock-compare-inline-loop-limit): New option.
3059 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3061 PR target/83677
3062 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
3063 Reverse order of second and third operands in first alternative.
3064 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
3065 of first and second elements in UNSPEC_VPERMR vector.
3066 (altivec_expand_vec_perm_le): Likewise.
3068 2017-01-08 Jeff Law <law@redhat.com>
3070 PR rtl-optimizatin/81308
3071 * tree-switch-conversion.c (cfg_altered): New file scoped static.
3072 (process_switch): If group_case_labels makes a change, then set
3073 cfg_altered.
3074 (pass_convert_switch::execute): If a switch is converted, then
3075 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
3077 PR rtl-optimization/81308
3078 * recog.c (split_all_insns): Conditionally cleanup the CFG after
3079 splitting insns.
3081 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
3083 PR target/83663 - Revert r255946
3084 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
3085 generation for cases where splatting a value is not useful.
3086 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
3087 across a vec_duplicate and a paradoxical subreg forming a vector
3088 mode to a vec_concat.
3090 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3092 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
3093 -march=armv8.3-a variants.
3094 * config/arm/t-multilib: Likewise.
3095 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
3097 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3099 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
3100 to generate rtl.
3101 (cceq_ior_compare_complement): Give it a name so I can use it, and
3102 change boolean_or_operator predicate to boolean_operator so it can
3103 be used to generate a crand.
3104 (eqne): New code iterator.
3105 (bd/bd_neg): New code_attrs.
3106 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
3107 a single define_insn.
3108 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
3109 decrement (bdnzt/bdnzf/bdzt/bdzf).
3110 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
3111 with the new names of the branch decrement patterns, and added the
3112 names of the branch decrement conditional patterns.
3114 2018-01-08 Richard Biener <rguenther@suse.de>
3116 PR tree-optimization/83563
3117 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
3118 cache.
3120 2018-01-08 Richard Biener <rguenther@suse.de>
3122 PR middle-end/83713
3123 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
3125 2018-01-08 Richard Biener <rguenther@suse.de>
3127 PR tree-optimization/83685
3128 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
3129 references to abnormals.
3131 2018-01-08 Richard Biener <rguenther@suse.de>
3133 PR lto/83719
3134 * dwarf2out.c (output_indirect_strings): Handle empty
3135 skeleton_debug_str_hash.
3136 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
3138 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3140 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
3141 (emit_store_direct): Likewise.
3142 (arc_trampoline_adjust_address): Likewise.
3143 (arc_asm_trampoline_template): New function.
3144 (arc_initialize_trampoline): Use asm_trampoline_template.
3145 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
3146 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
3147 * config/arc/arc.md (flush_icache): Delete pattern.
3149 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
3151 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
3152 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
3153 munaligned-access.
3155 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3157 PR target/83681
3158 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
3159 by not USED_FOR_TARGET.
3160 (make_pass_resolve_sw_modes): Likewise.
3162 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
3164 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
3165 USED_FOR_TARGET.
3167 2018-01-08 Richard Biener <rguenther@suse.de>
3169 PR middle-end/83580
3170 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
3172 2018-01-08 Richard Biener <rguenther@suse.de>
3174 PR middle-end/83517
3175 * match.pd ((t * 2) / 2) -> t): Add missing :c.
3177 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
3179 PR middle-end/81897
3180 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
3181 basic blocks with a small number of successors.
3182 (convert_control_dep_chain_into_preds): Improve handling of
3183 forwarder blocks.
3184 (dump_predicates): Split apart into...
3185 (dump_pred_chain): ...here...
3186 (dump_pred_info): ...and here.
3187 (can_one_predicate_be_invalidated_p): Add debugging printfs.
3188 (can_chain_union_be_invalidated_p): Improve check for invalidation
3189 of paths.
3190 (uninit_uses_cannot_happen): Avoid unnecessary if
3191 convert_control_dep_chain_into_preds yielded nothing.
3193 2018-01-06 Martin Sebor <msebor@redhat.com>
3195 PR tree-optimization/83640
3196 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
3197 subtracting negative offset from size.
3198 (builtin_access::overlap): Adjust offset bounds of the access to fall
3199 within the size of the object if possible.
3201 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
3203 PR rtl-optimization/83699
3204 * expmed.c (extract_bit_field_1): Restrict the vector usage of
3205 extract_bit_field_as_subreg to cases in which the extracted
3206 value is also a vector.
3208 * lra-constraints.c (process_alt_operands): Test for the equivalence
3209 substitutions when detecting a possible reload cycle.
3211 2018-01-06 Jakub Jelinek <jakub@redhat.com>
3213 PR debug/83480
3214 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
3215 by default if flag_selective_schedling{,2}. Formatting fixes.
3217 PR rtl-optimization/83682
3218 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
3219 if it has non-VECTOR_MODE element mode.
3220 (vec_duplicate_p): Likewise.
3222 PR middle-end/83694
3223 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
3224 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
3226 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3228 PR target/83604
3229 * config/i386/i386-builtin.def
3230 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
3231 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
3232 Require also OPTION_MASK_ISA_AVX512F in addition to
3233 OPTION_MASK_ISA_GFNI.
3234 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
3235 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
3236 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
3237 to OPTION_MASK_ISA_GFNI.
3238 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
3239 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
3240 OPTION_MASK_ISA_AVX512BW.
3241 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
3242 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
3243 addition to OPTION_MASK_ISA_GFNI.
3244 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
3245 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
3246 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
3247 to OPTION_MASK_ISA_GFNI.
3248 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
3249 a requirement for all ISAs rather than any of them with a few
3250 exceptions.
3251 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
3252 processing.
3253 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
3254 bitmasks to be enabled with 3 exceptions, instead of requiring any
3255 enabled ISA with lots of exceptions.
3256 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
3257 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
3258 Change avx512bw in isa attribute to avx512f.
3259 * config/i386/sgxintrin.h: Add license boilerplate.
3260 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
3261 to __AVX512F__ and __AVX512VL to __AVX512VL__.
3262 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
3263 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
3264 defined.
3265 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
3266 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
3267 temporarily sse2 rather than sse if not enabled already.
3269 PR target/83604
3270 * config/i386/sse.md (VI248_VLBW): Rename to ...
3271 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
3272 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
3273 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
3274 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
3275 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
3276 mode iterator instead of VI248_VLBW.
3278 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
3280 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
3281 (record_modified): Skip clobbers; add debug output.
3282 (param_change_prob): Use sreal frequencies.
3284 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3286 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
3287 punt for user-aligned variables.
3289 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
3291 * tree-chrec.c (chrec_contains_symbols): Return true for
3292 POLY_INT_CST.
3294 2018-01-05 Sudakshina Das <sudi.das@arm.com>
3296 PR target/82439
3297 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
3298 of (x|y) == x for BICS pattern.
3300 2018-01-05 Jakub Jelinek <jakub@redhat.com>
3302 PR tree-optimization/83605
3303 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3304 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3305 can throw.
3307 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3309 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3310 * config/epiphany/rtems.h: New file.
3312 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3313 Uros Bizjak <ubizjak@gmail.com>
3315 PR target/83554
3316 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3317 QIreg_operand instead of register_operand predicate.
3318 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3319 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3320 comments instead of -fmitigate[-_]rop.
3322 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3324 PR bootstrap/81926
3325 * cgraphunit.c (symbol_table::compile): Switch to text_section
3326 before calling assembly_start debug hook.
3327 * run-rtl-passes.c (run_rtl_passes): Likewise.
3328 Include output.h.
3330 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3332 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3333 range_int_cst_p rather than !symbolic_range_p before calling
3334 extract_range_from_multiplicative_op_1.
3336 2017-01-04 Jeff Law <law@redhat.com>
3338 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3339 redundant test in assertion.
3341 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3343 * doc/rtl.texi: Document machine_mode wrapper classes.
3345 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3347 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3348 using tree_to_uhwi.
3350 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3352 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3353 the VEC_PERM_EXPR fold to fail.
3355 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3357 PR debug/83585
3358 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3359 to switched_sections.
3361 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3363 PR target/83680
3364 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3365 test for d.testing.
3367 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3369 PR target/83387
3370 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3371 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3373 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3375 PR debug/83666
3376 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3377 is BLKmode and bitpos not zero or mode change is needed.
3379 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3381 PR target/83675
3382 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3383 TARGET_VIS2.
3385 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3387 PR target/83628
3388 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3389 instead of MULT rtx. Update all corresponding splitters.
3390 (*saddl_se): Ditto.
3391 (*ssub<modesuffix>): Ditto.
3392 (*ssubl_se): Ditto.
3393 (*cmp_sadd_di): Update split patterns.
3394 (*cmp_sadd_si): Ditto.
3395 (*cmp_sadd_sidi): Ditto.
3396 (*cmp_ssub_di): Ditto.
3397 (*cmp_ssub_si): Ditto.
3398 (*cmp_ssub_sidi): Ditto.
3399 * config/alpha/predicates.md (const23_operand): New predicate.
3400 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3401 Look for ASHIFT, not MULT inner operand.
3402 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3404 2018-01-04 Martin Liska <mliska@suse.cz>
3406 PR gcov-profile/83669
3407 * gcov.c (output_intermediate_file): Add version to intermediate
3408 gcov file.
3409 * doc/gcov.texi: Document new field 'version' in intermediate
3410 file format. Fix location of '-k' option of gcov command.
3412 2018-01-04 Martin Liska <mliska@suse.cz>
3414 PR ipa/82352
3415 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3417 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3419 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3421 2018-01-03 Martin Sebor <msebor@redhat.com>
3423 PR tree-optimization/83655
3424 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3425 checking calls with invalid arguments.
3427 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3429 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3430 (vectorizable_mask_load_store): Delete.
3431 (vectorizable_call): Return false for masked loads and stores.
3432 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3433 instead of gimple_assign_rhs1.
3434 (vectorizable_load): Handle IFN_MASK_LOAD.
3435 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3437 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3439 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3440 split out from..,
3441 (vectorizable_mask_load_store): ...here.
3442 (vectorizable_load): ...and here.
3444 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3446 * tree-vect-stmts.c (vect_build_all_ones_mask)
3447 (vect_build_zero_merge_argument): New functions, split out from...
3448 (vectorizable_load): ...here.
3450 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3452 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3453 split out from...
3454 (vectorizable_mask_load_store): ...here.
3455 (vectorizable_store): ...and here.
3457 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3459 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3460 split out from...
3461 (vectorizable_mask_load_store): ...here.
3463 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3465 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3466 (vect_model_store_cost): Take a vec_load_store_type instead of a
3467 vect_def_type.
3468 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3469 (vect_model_store_cost): Take a vec_load_store_type instead of a
3470 vect_def_type.
3471 (vectorizable_mask_load_store): Update accordingly.
3472 (vectorizable_store): Likewise.
3473 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3475 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3477 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3478 IFN_MASK_LOAD calls here rather than...
3479 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3481 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3482 Alan Hayward <alan.hayward@arm.com>
3483 David Sherwood <david.sherwood@arm.com>
3485 * expmed.c (extract_bit_field_1): For vector extracts,
3486 fall back to extract_bit_field_as_subreg if vec_extract
3487 isn't available.
3489 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3490 Alan Hayward <alan.hayward@arm.com>
3491 David Sherwood <david.sherwood@arm.com>
3493 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3494 they are variable or constant sized.
3495 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3496 slots for constant-sized data.
3498 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3499 Alan Hayward <alan.hayward@arm.com>
3500 David Sherwood <david.sherwood@arm.com>
3502 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3503 handling COND_EXPRs with boolean comparisons, try to find a better
3504 basis for the mask type than the boolean itself.
3506 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3508 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3509 is calculated and how it can be overridden.
3510 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3511 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3512 if defined.
3513 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3514 if nonzero.
3516 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3517 Alan Hayward <alan.hayward@arm.com>
3518 David Sherwood <david.sherwood@arm.com>
3520 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3521 Remove the mode argument.
3522 (aarch64_simd_valid_immediate): Remove the mode and inverse
3523 arguments.
3524 * config/aarch64/iterators.md (bitsize): New iterator.
3525 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3526 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3527 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3528 aarch64_simd_valid_immediate.
3529 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3530 (aarch64_reg_or_bic_imm): Likewise.
3531 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3532 with an insn_type enum and msl with a modifier_type enum.
3533 Replace element_width with a scalar_mode. Change the shift
3534 to unsigned int. Add constructors for scalar_float_mode and
3535 scalar_int_mode elements.
3536 (aarch64_vect_float_const_representable_p): Delete.
3537 (aarch64_can_const_movi_rtx_p)
3538 (aarch64_simd_scalar_immediate_valid_for_move)
3539 (aarch64_simd_make_constant): Update call to
3540 aarch64_simd_valid_immediate.
3541 (aarch64_advsimd_valid_immediate_hs): New function.
3542 (aarch64_advsimd_valid_immediate): Likewise.
3543 (aarch64_simd_valid_immediate): Remove mode and inverse
3544 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3545 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3546 and aarch64_float_const_representable_p on the result.
3547 (aarch64_output_simd_mov_immediate): Remove mode argument.
3548 Update call to aarch64_simd_valid_immediate and use of
3549 simd_immediate_info.
3550 (aarch64_output_scalar_simd_mov_immediate): Update call
3551 accordingly.
3553 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3554 Alan Hayward <alan.hayward@arm.com>
3555 David Sherwood <david.sherwood@arm.com>
3557 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3558 (mode_nunits): Likewise CONST_MODE_NUNITS.
3559 * machmode.def (ADJUST_NUNITS): Document.
3560 * genmodes.c (mode_data::need_nunits_adj): New field.
3561 (blank_mode): Update accordingly.
3562 (adj_nunits): New variable.
3563 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3564 parameter.
3565 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3566 listed in adj_nunits.
3567 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3568 listed in adj_nunits. Don't emit case statements for such modes.
3569 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3570 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3571 nothing if adj_nunits is nonnull.
3572 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3573 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3574 (emit_mode_fbit): Update use of print_maybe_const_decl.
3575 (emit_move_size): Likewise. Treat the array as non-const
3576 if adj_nunits.
3577 (emit_mode_adjustments): Handle adj_nunits.
3579 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3581 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3582 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3583 (VECTOR_MODES): Use it.
3584 (make_vector_modes): Take the prefix as an argument.
3586 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3587 Alan Hayward <alan.hayward@arm.com>
3588 David Sherwood <david.sherwood@arm.com>
3590 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3591 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3592 for MODE_VECTOR_BOOL.
3593 * machmode.def (VECTOR_BOOL_MODE): Document.
3594 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3595 (make_vector_bool_mode): New function.
3596 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3597 MODE_VECTOR_BOOL.
3598 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3599 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3600 Likewise.
3601 * stor-layout.c (int_mode_for_mode): Likewise.
3602 * tree.c (build_vector_type_for_mode): Likewise.
3603 * varasm.c (output_constant_pool_2): Likewise.
3604 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3605 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3606 for MODE_VECTOR_BOOL.
3607 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3608 of mode class checks.
3609 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3610 instead of a list of mode class checks.
3611 (expand_vector_scalar_condition): Likewise.
3612 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3614 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3615 Alan Hayward <alan.hayward@arm.com>
3616 David Sherwood <david.sherwood@arm.com>
3618 * machmode.h (mode_size): Change from unsigned short to
3619 poly_uint16_pod.
3620 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3621 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3622 or if measurement_type is not polynomial.
3623 (fixed_size_mode::includes_p): Check for constant-sized modes.
3624 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3625 return a poly_uint16 rather than an unsigned short.
3626 (emit_mode_size): Change the type of mode_size from unsigned short
3627 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3628 (emit_mode_adjustments): Cope with polynomial vector sizes.
3629 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3630 for GET_MODE_SIZE.
3631 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3632 for GET_MODE_SIZE.
3633 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3634 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3635 * caller-save.c (setup_save_areas): Likewise.
3636 (replace_reg_with_saved_mem): Likewise.
3637 * calls.c (emit_library_call_value_1): Likewise.
3638 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3639 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3640 (gen_lowpart_for_combine): Likewise.
3641 * convert.c (convert_to_integer_1): Likewise.
3642 * cse.c (equiv_constant, cse_insn): Likewise.
3643 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3644 (cselib_subst_to_values): Likewise.
3645 * dce.c (word_dce_process_block): Likewise.
3646 * df-problems.c (df_word_lr_mark_ref): Likewise.
3647 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3648 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3649 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3650 (rtl_for_decl_location): Likewise.
3651 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3652 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3653 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3654 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3655 (expand_expr_real_1): Likewise.
3656 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3657 (pad_below): Likewise.
3658 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3659 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3660 * ira.c (get_subreg_tracking_sizes): Likewise.
3661 * ira-build.c (ira_create_allocno_objects): Likewise.
3662 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3663 (ira_sort_regnos_for_alter_reg): Likewise.
3664 * ira-costs.c (record_operand_costs): Likewise.
3665 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3666 (resolve_simple_move): Likewise.
3667 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3668 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3669 (lra_constraints): Likewise.
3670 (CONST_POOL_OK_P): Reject variable-sized modes.
3671 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3672 (add_pseudo_to_slot, lra_spill): Likewise.
3673 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3674 * optabs-query.c (get_best_extraction_insn): Likewise.
3675 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3676 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3677 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3678 * recog.c (offsettable_address_addr_space_p): Likewise.
3679 * regcprop.c (maybe_mode_change): Likewise.
3680 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3681 * regrename.c (build_def_use): Likewise.
3682 * regstat.c (dump_reg_info): Likewise.
3683 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3684 (find_reloads, find_reloads_subreg_address): Likewise.
3685 * reload1.c (eliminate_regs_1): Likewise.
3686 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3687 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3688 (simplify_binary_operation_1, simplify_subreg): Likewise.
3689 * targhooks.c (default_function_arg_padding): Likewise.
3690 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3691 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3692 (verify_gimple_assign_ternary): Likewise.
3693 * tree-inline.c (estimate_move_cost): Likewise.
3694 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3695 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3696 (get_address_cost_ainc): Likewise.
3697 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3698 (vect_supportable_dr_alignment): Likewise.
3699 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3700 (vectorizable_reduction): Likewise.
3701 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3702 (vectorizable_operation, vectorizable_load): Likewise.
3703 * tree.c (build_same_sized_truth_vector_type): Likewise.
3704 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3705 * var-tracking.c (emit_note_insn_var_location): Likewise.
3706 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3707 (ADDR_VEC_ALIGN): Likewise.
3709 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3710 Alan Hayward <alan.hayward@arm.com>
3711 David Sherwood <david.sherwood@arm.com>
3713 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3714 unsigned short.
3715 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3716 or if measurement_type is polynomial.
3717 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3718 * combine.c (make_extraction): Likewise.
3719 * dse.c (find_shift_sequence): Likewise.
3720 * dwarf2out.c (mem_loc_descriptor): Likewise.
3721 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3722 (extract_bit_field, extract_low_bits): Likewise.
3723 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3724 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3725 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3726 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3727 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3728 * reload.c (find_reloads): Likewise.
3729 * reload1.c (alter_reg): Likewise.
3730 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3731 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3732 * tree-if-conv.c (predicate_mem_writes): Likewise.
3733 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3734 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3735 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3736 * valtrack.c (dead_debug_insert_temp): Likewise.
3737 * varasm.c (mergeable_constant_section): Likewise.
3738 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3740 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3741 Alan Hayward <alan.hayward@arm.com>
3742 David Sherwood <david.sherwood@arm.com>
3744 * expr.c (expand_assignment): Cope with polynomial mode sizes
3745 when assigning to a CONCAT.
3747 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3748 Alan Hayward <alan.hayward@arm.com>
3749 David Sherwood <david.sherwood@arm.com>
3751 * machmode.h (mode_precision): Change from unsigned short to
3752 poly_uint16_pod.
3753 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3754 short.
3755 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3756 or if measurement_type is not polynomial.
3757 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3758 in which the mode is already known to be a scalar_int_mode.
3759 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3760 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3761 initializer.
3762 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3763 for GET_MODE_PRECISION.
3764 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3765 for GET_MODE_PRECISION.
3766 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3767 as polynomial.
3768 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3769 (expand_field_assignment, make_extraction): Likewise.
3770 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3771 (get_last_value): Likewise.
3772 * convert.c (convert_to_integer_1): Likewise.
3773 * cse.c (cse_insn): Likewise.
3774 * expr.c (expand_expr_real_1): Likewise.
3775 * lra-constraints.c (simplify_operand_subreg): Likewise.
3776 * optabs-query.c (can_atomic_load_p): Likewise.
3777 * optabs.c (expand_atomic_load): Likewise.
3778 (expand_atomic_store): Likewise.
3779 * ree.c (combine_reaching_defs): Likewise.
3780 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3781 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3782 * tree.h (type_has_mode_precision_p): Likewise.
3783 * ubsan.c (instrument_si_overflow): Likewise.
3785 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3786 Alan Hayward <alan.hayward@arm.com>
3787 David Sherwood <david.sherwood@arm.com>
3789 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3790 polynomial numbers of units.
3791 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3792 (valid_vector_subparts_p): New function.
3793 (build_vector_type): Remove temporary shim and take the number
3794 of units as a poly_uint64 rather than an int.
3795 (build_opaque_vector_type): Take the number of units as a
3796 poly_uint64 rather than an int.
3797 * tree.c (build_vector_from_ctor): Handle polynomial
3798 TYPE_VECTOR_SUBPARTS.
3799 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3800 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3801 (build_vector_from_val): If the number of units is variable,
3802 use build_vec_duplicate_cst for constant operands and
3803 VEC_DUPLICATE_EXPR otherwise.
3804 (make_vector_type): Remove temporary is_constant ().
3805 (build_vector_type, build_opaque_vector_type): Take the number of
3806 units as a poly_uint64 rather than an int.
3807 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3808 VECTOR_CST_NELTS.
3809 * cfgexpand.c (expand_debug_expr): Likewise.
3810 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3811 (store_constructor, expand_expr_real_1): Likewise.
3812 (const_scalar_mask_from_tree): Likewise.
3813 * fold-const-call.c (fold_const_reduction): Likewise.
3814 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3815 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3816 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3817 (fold_relational_const): Likewise.
3818 (native_interpret_vector): Likewise. Change the size from an
3819 int to an unsigned int.
3820 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3821 TYPE_VECTOR_SUBPARTS.
3822 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3823 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3824 duplicating a non-constant operand into a variable-length vector.
3825 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3826 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3827 * ipa-icf.c (sem_variable::equals): Likewise.
3828 * match.pd: Likewise.
3829 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3830 * print-tree.c (print_node): Likewise.
3831 * stor-layout.c (layout_type): Likewise.
3832 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3833 * tree-cfg.c (verify_gimple_comparison): Likewise.
3834 (verify_gimple_assign_binary): Likewise.
3835 (verify_gimple_assign_ternary): Likewise.
3836 (verify_gimple_assign_single): Likewise.
3837 * tree-pretty-print.c (dump_generic_node): Likewise.
3838 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3839 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3840 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3841 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3842 (vect_shift_permute_load_chain): Likewise.
3843 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3844 (expand_vector_condition, optimize_vector_constructor): Likewise.
3845 (lower_vec_perm, get_compute_type): Likewise.
3846 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3847 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3848 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3849 (vect_recog_mask_conversion_pattern): Likewise.
3850 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3851 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3852 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3853 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3854 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3855 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3856 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3857 (supportable_widening_operation): Likewise.
3858 (supportable_narrowing_operation): Likewise.
3859 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3860 Likewise.
3861 * varasm.c (output_constant): Likewise.
3863 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3864 Alan Hayward <alan.hayward@arm.com>
3865 David Sherwood <david.sherwood@arm.com>
3867 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3868 so that both the length == 3 and length != 3 cases set up their
3869 own permute vectors. Add comments explaining why we know the
3870 number of elements is constant.
3871 (vect_permute_load_chain): Likewise.
3873 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3874 Alan Hayward <alan.hayward@arm.com>
3875 David Sherwood <david.sherwood@arm.com>
3877 * machmode.h (mode_nunits): Change from unsigned char to
3878 poly_uint16_pod.
3879 (ONLY_FIXED_SIZE_MODES): New macro.
3880 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3881 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3882 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3883 New typedefs.
3884 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3885 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3886 or if measurement_type is not polynomial.
3887 * genmodes.c (ZERO_COEFFS): New macro.
3888 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3889 poly_uint16.
3890 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3891 Use ZERO_COEFFS when emitting initializers.
3892 * data-streamer.h (bp_pack_poly_value): New function.
3893 (bp_unpack_poly_value): Likewise.
3894 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3895 for GET_MODE_NUNITS.
3896 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3897 for GET_MODE_NUNITS.
3898 * tree.c (make_vector_type): Remove temporary shim and make
3899 the real function take the number of units as a poly_uint64
3900 rather than an int.
3901 (build_vector_type_for_mode): Handle polynomial nunits.
3902 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3903 * emit-rtl.c (const_vec_series_p_1): Likewise.
3904 (gen_rtx_CONST_VECTOR): Likewise.
3905 * fold-const.c (test_vec_duplicate_folding): Likewise.
3906 * genrecog.c (validate_pattern): Likewise.
3907 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3908 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3909 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3910 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3911 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3912 * rtlanal.c (subreg_get_info): Likewise.
3913 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3914 (vect_grouped_load_supported): Likewise.
3915 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3916 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3917 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3918 (simplify_const_unary_operation, simplify_binary_operation_1)
3919 (simplify_const_binary_operation, simplify_ternary_operation)
3920 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3921 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3922 instead of CONST_VECTOR_NUNITS.
3923 * varasm.c (output_constant_pool_2): Likewise.
3924 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3925 explicit-encoded elements in the XVEC for variable-length vectors.
3927 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3929 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3931 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3932 Alan Hayward <alan.hayward@arm.com>
3933 David Sherwood <david.sherwood@arm.com>
3935 * coretypes.h (fixed_size_mode): Declare.
3936 (fixed_size_mode_pod): New typedef.
3937 * builtins.h (target_builtins::x_apply_args_mode)
3938 (target_builtins::x_apply_result_mode): Change type to
3939 fixed_size_mode_pod.
3940 * builtins.c (apply_args_size, apply_result_size, result_vector)
3941 (expand_builtin_apply_args_1, expand_builtin_apply)
3942 (expand_builtin_return): Update accordingly.
3944 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3946 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3947 * cselib.c (cselib_hash_rtx): Likewise.
3948 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3949 CONST_VECTOR encoding.
3951 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3952 Jeff Law <law@redhat.com>
3954 PR target/83641
3955 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3956 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3957 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3958 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3960 PR target/83641
3961 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3962 explicitly probe *sp in a noreturn function if there were any callee
3963 register saves or frame pointer is needed.
3965 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3967 PR debug/83621
3968 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3969 BLKmode for ternary, binary or unary expressions.
3971 PR debug/83645
3972 * var-tracking.c (delete_vta_debug_insn): New inline function.
3973 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3974 insns from get_insns () to NULL instead of each bb separately.
3975 Use delete_vta_debug_insn. No longer static.
3976 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3977 delete_vta_debug_insns callers.
3978 * rtl.h (delete_vta_debug_insns): Declare.
3979 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3980 instead of variable_tracking_main.
3982 2018-01-03 Martin Sebor <msebor@redhat.com>
3984 PR tree-optimization/83603
3985 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3986 arguments past the endof the argument list in functions declared
3987 without a prototype.
3988 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3989 Avoid checking when arguments are null.
3991 2018-01-03 Martin Sebor <msebor@redhat.com>
3993 PR c/83559
3994 * doc/extend.texi (attribute const): Fix a typo.
3995 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3996 issuing -Wsuggest-attribute for void functions.
3998 2018-01-03 Martin Sebor <msebor@redhat.com>
4000 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
4001 offset_int::from instead of wide_int::to_shwi.
4002 (maybe_diag_overlap): Remove assertion.
4003 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
4004 * gimple-ssa-sprintf.c (format_directive): Same.
4005 (parse_directive): Same.
4006 (sprintf_dom_walker::compute_format_length): Same.
4007 (try_substitute_return_value): Same.
4009 2017-01-03 Jeff Law <law@redhat.com>
4011 PR middle-end/83654
4012 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
4013 non-constant residual for zero at runtime and avoid probing in
4014 that case. Reorganize code for trailing problem to mirror handling
4015 of the residual.
4017 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
4019 PR tree-optimization/83501
4020 * tree-ssa-strlen.c (get_string_cst): New.
4021 (handle_char_store): Call get_string_cst.
4023 2018-01-03 Martin Liska <mliska@suse.cz>
4025 PR tree-optimization/83593
4026 * tree-ssa-strlen.c: Include tree-cfg.h.
4027 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
4028 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
4029 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
4030 to false.
4031 (strlen_dom_walker::before_dom_children): Call
4032 gimple_purge_dead_eh_edges. Dump tranformation with details
4033 dump flags.
4034 (strlen_dom_walker::before_dom_children): Update call by adding
4035 new argument cleanup_eh.
4036 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
4038 2018-01-03 Martin Liska <mliska@suse.cz>
4040 PR ipa/83549
4041 * cif-code.def (VARIADIC_THUNK): New enum value.
4042 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
4043 thunks.
4045 2018-01-03 Jan Beulich <jbeulich@suse.com>
4047 * sse.md (mov<mode>_internal): Tighten condition for when to use
4048 vmovdqu<ssescalarsize> for TI and OI modes.
4050 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4052 Update copyright years.
4054 2018-01-03 Martin Liska <mliska@suse.cz>
4056 PR ipa/83594
4057 * ipa-visibility.c (function_and_variable_visibility): Skip
4058 functions with noipa attribure.
4060 2018-01-03 Jakub Jelinek <jakub@redhat.com>
4062 * gcc.c (process_command): Update copyright notice dates.
4063 * gcov-dump.c (print_version): Ditto.
4064 * gcov.c (print_version): Ditto.
4065 * gcov-tool.c (print_version): Ditto.
4066 * gengtype.c (create_file): Ditto.
4067 * doc/cpp.texi: Bump @copying's copyright year.
4068 * doc/cppinternals.texi: Ditto.
4069 * doc/gcc.texi: Ditto.
4070 * doc/gccint.texi: Ditto.
4071 * doc/gcov.texi: Ditto.
4072 * doc/install.texi: Ditto.
4073 * doc/invoke.texi: Ditto.
4075 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4077 * vector-builder.h (vector_builder::m_full_nelts): Change from
4078 unsigned int to poly_uint64.
4079 (vector_builder::full_nelts): Update prototype accordingly.
4080 (vector_builder::new_vector): Likewise.
4081 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
4082 (vector_builder::operator ==): Likewise.
4083 (vector_builder::finalize): Likewise.
4084 * int-vector-builder.h (int_vector_builder::int_vector_builder):
4085 Take the number of elements as a poly_uint64 rather than an
4086 unsigned int.
4087 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
4088 from unsigned int to poly_uint64.
4089 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
4090 (vec_perm_indices::new_vector): Likewise.
4091 (vec_perm_indices::length): Likewise.
4092 (vec_perm_indices::nelts_per_input): Likewise.
4093 (vec_perm_indices::input_nelts): Likewise.
4094 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
4095 number of elements per input as a poly_uint64 rather than an
4096 unsigned int. Use the original encoding for variable-length
4097 vectors, rather than clamping each individual element.
4098 For the second and subsequent elements in each pattern,
4099 clamp the step and base before clamping their sum.
4100 (vec_perm_indices::series_p): Handle polynomial element counts.
4101 (vec_perm_indices::all_in_range_p): Likewise.
4102 (vec_perm_indices_to_tree): Likewise.
4103 (vec_perm_indices_to_rtx): Likewise.
4104 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
4105 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
4106 (tree_vector_builder::new_binary_operation): Handle polynomial
4107 element counts. Return false if we need to know the number
4108 of elements at compile time.
4109 * fold-const.c (fold_vec_perm): Punt if the number of elements
4110 isn't known at compile time.
4112 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4114 * vec-perm-indices.h (vec_perm_builder): Change element type
4115 from HOST_WIDE_INT to poly_int64.
4116 (vec_perm_indices::element_type): Update accordingly.
4117 (vec_perm_indices::clamp): Handle polynomial element_types.
4118 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4119 (vec_perm_indices::all_in_range_p): Likewise.
4120 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
4121 than shwi trees.
4122 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
4123 polynomial vec_perm_indices element types.
4124 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
4125 * fold-const.c (fold_vec_perm): Likewise.
4126 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
4127 * tree-vect-generic.c (lower_vec_perm): Likewise.
4128 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4129 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
4130 element type to HOST_WIDE_INT.
4132 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4133 Alan Hayward <alan.hayward@arm.com>
4134 David Sherwood <david.sherwood@arm.com>
4136 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
4137 rather than an int. Use plus_constant.
4138 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
4139 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
4141 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4142 Alan Hayward <alan.hayward@arm.com>
4143 David Sherwood <david.sherwood@arm.com>
4145 * calls.c (emit_call_1, expand_call): Change struct_value_size from
4146 a HOST_WIDE_INT to a poly_int64.
4148 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4149 Alan Hayward <alan.hayward@arm.com>
4150 David Sherwood <david.sherwood@arm.com>
4152 * calls.c (load_register_parameters): Cope with polynomial
4153 mode sizes. Require a constant size for BLKmode parameters
4154 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
4155 forces a parameter to be padded at the lsb end in order to
4156 fill a complete number of words, require the parameter size
4157 to be ordered wrt UNITS_PER_WORD.
4159 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4160 Alan Hayward <alan.hayward@arm.com>
4161 David Sherwood <david.sherwood@arm.com>
4163 * reload1.c (spill_stack_slot_width): Change element type
4164 from unsigned int to poly_uint64_pod.
4165 (alter_reg): Treat mode sizes as polynomial.
4167 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4168 Alan Hayward <alan.hayward@arm.com>
4169 David Sherwood <david.sherwood@arm.com>
4171 * reload.c (complex_word_subreg_p): New function.
4172 (reload_inner_reg_of_subreg, push_reload): Use it.
4174 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4175 Alan Hayward <alan.hayward@arm.com>
4176 David Sherwood <david.sherwood@arm.com>
4178 * lra-constraints.c (process_alt_operands): Reject matched
4179 operands whose sizes aren't ordered.
4180 (match_reload): Refer to this check here.
4182 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4183 Alan Hayward <alan.hayward@arm.com>
4184 David Sherwood <david.sherwood@arm.com>
4186 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
4187 that the mode size is in the set {1, 2, 4, 8, 16}.
4189 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4190 Alan Hayward <alan.hayward@arm.com>
4191 David Sherwood <david.sherwood@arm.com>
4193 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
4194 Use plus_constant instead of gen_rtx_PLUS.
4196 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4197 Alan Hayward <alan.hayward@arm.com>
4198 David Sherwood <david.sherwood@arm.com>
4200 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
4201 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
4202 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
4203 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
4204 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
4205 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
4206 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
4207 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
4208 * config/i386/i386.c (ix86_push_rounding): ...this new function.
4209 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
4210 a poly_int64.
4211 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
4212 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
4213 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
4214 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
4215 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
4216 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
4217 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
4218 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
4219 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
4220 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
4221 function.
4222 * expr.c (emit_move_resolve_push): Treat the input and result
4223 of PUSH_ROUNDING as a poly_int64.
4224 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
4225 (emit_push_insn): Likewise.
4226 * lra-eliminations.c (mark_not_eliminable): Likewise.
4227 * recog.c (push_operand): Likewise.
4228 * reload1.c (elimination_effects): Likewise.
4229 * rtlanal.c (nonzero_bits1): Likewise.
4230 * calls.c (store_one_arg): Likewise. Require the padding to be
4231 known at compile time.
4233 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4234 Alan Hayward <alan.hayward@arm.com>
4235 David Sherwood <david.sherwood@arm.com>
4237 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
4238 Use plus_constant instead of gen_rtx_PLUS.
4240 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4241 Alan Hayward <alan.hayward@arm.com>
4242 David Sherwood <david.sherwood@arm.com>
4244 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
4245 rather than an int.
4247 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4248 Alan Hayward <alan.hayward@arm.com>
4249 David Sherwood <david.sherwood@arm.com>
4251 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
4252 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
4253 via stack temporaries. Treat the mode size as polynomial too.
4255 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4256 Alan Hayward <alan.hayward@arm.com>
4257 David Sherwood <david.sherwood@arm.com>
4259 * expr.c (expand_expr_real_2): When handling conversions involving
4260 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
4261 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
4262 as a poly_uint64 too.
4264 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4265 Alan Hayward <alan.hayward@arm.com>
4266 David Sherwood <david.sherwood@arm.com>
4268 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
4270 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4271 Alan Hayward <alan.hayward@arm.com>
4272 David Sherwood <david.sherwood@arm.com>
4274 * combine.c (can_change_dest_mode): Handle polynomial
4275 REGMODE_NATURAL_SIZE.
4276 * expmed.c (store_bit_field_1): Likewise.
4277 * expr.c (store_constructor): Likewise.
4278 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
4279 and polynomial REGMODE_NATURAL_SIZE.
4280 (gen_lowpart_common): Likewise.
4281 * reginfo.c (record_subregs_of_mode): Likewise.
4282 * rtlanal.c (read_modify_subreg_p): Likewise.
4284 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4285 Alan Hayward <alan.hayward@arm.com>
4286 David Sherwood <david.sherwood@arm.com>
4288 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
4289 numbers of elements.
4291 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4292 Alan Hayward <alan.hayward@arm.com>
4293 David Sherwood <david.sherwood@arm.com>
4295 * match.pd: Cope with polynomial numbers of vector elements.
4297 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4298 Alan Hayward <alan.hayward@arm.com>
4299 David Sherwood <david.sherwood@arm.com>
4301 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
4302 in a POINTER_PLUS_EXPR.
4304 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4305 Alan Hayward <alan.hayward@arm.com>
4306 David Sherwood <david.sherwood@arm.com>
4308 * omp-simd-clone.c (simd_clone_subparts): New function.
4309 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4310 (ipa_simd_modify_function_body): Likewise.
4312 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4313 Alan Hayward <alan.hayward@arm.com>
4314 David Sherwood <david.sherwood@arm.com>
4316 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4317 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4318 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4319 (expand_vector_condition, vector_element): Likewise.
4320 (subparts_gt): New function.
4321 (get_compute_type): Use subparts_gt.
4322 (count_type_subparts): Delete.
4323 (expand_vector_operations_1): Use subparts_gt instead of
4324 count_type_subparts.
4326 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4327 Alan Hayward <alan.hayward@arm.com>
4328 David Sherwood <david.sherwood@arm.com>
4330 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4331 (vect_compile_time_alias): ...this new function. Do the calculation
4332 on poly_ints rather than trees.
4333 (vect_prune_runtime_alias_test_list): Update call accordingly.
4335 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4336 Alan Hayward <alan.hayward@arm.com>
4337 David Sherwood <david.sherwood@arm.com>
4339 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4340 numbers of units.
4341 (vect_schedule_slp_instance): Likewise.
4343 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4344 Alan Hayward <alan.hayward@arm.com>
4345 David Sherwood <david.sherwood@arm.com>
4347 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4348 constant and extern definitions for variable-length vectors.
4349 (vect_get_constant_vectors): Note that the number of units
4350 is known to be constant.
4352 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4353 Alan Hayward <alan.hayward@arm.com>
4354 David Sherwood <david.sherwood@arm.com>
4356 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4357 of units as polynomial. Choose between WIDE and NARROW based
4358 on multiple_p.
4360 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4361 Alan Hayward <alan.hayward@arm.com>
4362 David Sherwood <david.sherwood@arm.com>
4364 * tree-vect-stmts.c (simd_clone_subparts): New function.
4365 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4367 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4368 Alan Hayward <alan.hayward@arm.com>
4369 David Sherwood <david.sherwood@arm.com>
4371 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4372 vectors as polynomial. Use build_index_vector for
4373 IFN_GOMP_SIMD_LANE.
4375 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4376 Alan Hayward <alan.hayward@arm.com>
4377 David Sherwood <david.sherwood@arm.com>
4379 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4380 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4381 for variable-length vectors.
4382 (vectorizable_mask_load_store): Treat the number of units as
4383 polynomial, asserting that it is constant if the condition has
4384 already been enforced.
4385 (vectorizable_store, vectorizable_load): Likewise.
4387 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4388 Alan Hayward <alan.hayward@arm.com>
4389 David Sherwood <david.sherwood@arm.com>
4391 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4392 of units as polynomial. Punt if we can't tell at compile time
4393 which vector contains the final result.
4395 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4396 Alan Hayward <alan.hayward@arm.com>
4397 David Sherwood <david.sherwood@arm.com>
4399 * tree-vect-loop.c (vectorizable_induction): Treat the number
4400 of units as polynomial. Punt on SLP inductions. Use an integer
4401 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4402 cast of such a series for variable-length floating-point
4403 reductions.
4405 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4406 Alan Hayward <alan.hayward@arm.com>
4407 David Sherwood <david.sherwood@arm.com>
4409 * tree.h (build_index_vector): Declare.
4410 * tree.c (build_index_vector): New function.
4411 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4412 of units as polynomial, forcibly converting it to a constant if
4413 vectorizable_reduction has already enforced the condition.
4414 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4415 to create a {1,2,3,...} vector.
4416 (vectorizable_reduction): Treat the number of units as polynomial.
4417 Choose vectype_in based on the largest scalar element size rather
4418 than the smallest number of units. Enforce the restrictions
4419 relied on above.
4421 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4422 Alan Hayward <alan.hayward@arm.com>
4423 David Sherwood <david.sherwood@arm.com>
4425 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4426 number of units as polynomial.
4428 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4429 Alan Hayward <alan.hayward@arm.com>
4430 David Sherwood <david.sherwood@arm.com>
4432 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4433 * target.def (autovectorize_vector_sizes): Return the vector sizes
4434 by pointer, using vector_sizes rather than a bitmask.
4435 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4436 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4437 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4438 Likewise.
4439 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4440 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4441 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4442 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4443 * omp-general.c (omp_max_vf): Likewise.
4444 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4445 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4446 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4447 * tree-vect-slp.c (vect_slp_bb): Likewise.
4448 * doc/tm.texi: Regenerate.
4449 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4450 to a poly_uint64.
4451 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4452 the vector size as a poly_uint64 rather than an unsigned int.
4453 (current_vector_size): Change from an unsigned int to a poly_uint64.
4454 (get_vectype_for_scalar_type): Update accordingly.
4455 * tree.h (build_truth_vector_type): Take the size and number of
4456 units as a poly_uint64 rather than an unsigned int.
4457 (build_vector_type): Add a temporary overload that takes
4458 the number of units as a poly_uint64 rather than an unsigned int.
4459 * tree.c (make_vector_type): Likewise.
4460 (build_truth_vector_type): Take the number of units as a poly_uint64
4461 rather than an unsigned int.
4463 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4464 Alan Hayward <alan.hayward@arm.com>
4465 David Sherwood <david.sherwood@arm.com>
4467 * target.def (get_mask_mode): Take the number of units and length
4468 as poly_uint64s rather than unsigned ints.
4469 * targhooks.h (default_get_mask_mode): Update accordingly.
4470 * targhooks.c (default_get_mask_mode): Likewise.
4471 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4472 * doc/tm.texi: Regenerate.
4474 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4475 Alan Hayward <alan.hayward@arm.com>
4476 David Sherwood <david.sherwood@arm.com>
4478 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4479 * omp-general.c (omp_max_vf): Likewise.
4480 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4481 (expand_omp_simd): Handle polynomial safelen.
4482 * omp-low.c (omplow_simd_context): Add a default constructor.
4483 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4484 (lower_rec_simd_input_clauses): Update accordingly.
4485 (lower_rec_input_clauses): Likewise.
4487 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4488 Alan Hayward <alan.hayward@arm.com>
4489 David Sherwood <david.sherwood@arm.com>
4491 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4492 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4493 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4494 (vect_analyze_slp_cost): Likewise.
4495 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4496 (vect_model_load_cost): Likewise.
4498 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4499 Alan Hayward <alan.hayward@arm.com>
4500 David Sherwood <david.sherwood@arm.com>
4502 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4503 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4504 from an unsigned int * to a poly_uint64_pod *.
4505 (calculate_unrolling_factor): New function.
4506 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4508 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4509 Alan Hayward <alan.hayward@arm.com>
4510 David Sherwood <david.sherwood@arm.com>
4512 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4513 from an unsigned int to a poly_uint64.
4514 (_loop_vec_info::slp_unrolling_factor): Likewise.
4515 (_loop_vec_info::vectorization_factor): Change from an int
4516 to a poly_uint64.
4517 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4518 (vect_get_num_vectors): New function.
4519 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4520 (vect_get_num_copies): Use vect_get_num_vectors.
4521 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4522 to an unsigned int *.
4523 (vect_analyze_data_refs): Change min_vf from an int * to a
4524 poly_uint64 *.
4525 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4526 than an unsigned HOST_WIDE_INT.
4527 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4528 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4529 to an unsigned int *.
4530 (vect_analyze_data_ref_dependences): Likewise.
4531 (vect_compute_data_ref_alignment): Handle polynomial vf.
4532 (vect_enhance_data_refs_alignment): Likewise.
4533 (vect_prune_runtime_alias_test_list): Likewise.
4534 (vect_shift_permute_load_chain): Likewise.
4535 (vect_supportable_dr_alignment): Likewise.
4536 (dependence_distance_ge_vf): Take the vectorization factor as a
4537 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4538 (vect_analyze_data_refs): Change min_vf from an int * to a
4539 poly_uint64 *.
4540 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4541 vfm1 as a poly_uint64 rather than an int. Make the same change
4542 for the returned bound_scalar.
4543 (vect_gen_vector_loop_niters): Handle polynomial vf.
4544 (vect_do_peeling): Likewise. Update call to
4545 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4546 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4547 be constant.
4548 * tree-vect-loop.c (vect_determine_vectorization_factor)
4549 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4550 (vect_get_known_peeling_cost): Likewise.
4551 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4552 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4553 (vect_transform_loop): Likewise. Use the lowest possible VF when
4554 updating the upper bounds of the loop.
4555 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4556 rather than an int.
4557 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4558 polynomial unroll factors.
4559 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4560 (vect_make_slp_decision): Likewise.
4561 (vect_supported_load_permutation_p): Likewise, and polynomial
4562 vf too.
4563 (vect_analyze_slp_cost): Handle polynomial vf.
4564 (vect_slp_analyze_node_operations): Likewise.
4565 (vect_slp_analyze_bb_1): Likewise.
4566 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4567 than an unsigned HOST_WIDE_INT.
4568 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4569 (vectorizable_load): Handle polynomial vf.
4570 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4571 a poly_uint64.
4572 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4574 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4575 Alan Hayward <alan.hayward@arm.com>
4576 David Sherwood <david.sherwood@arm.com>
4578 * match.pd: Handle bit operations involving three constants
4579 and try to fold one pair.
4581 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4583 * tree-vect-loop-manip.c: Include gimple-fold.h.
4584 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4585 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4586 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4587 Add a path that uses a step of VF instead of 1, but disable it
4588 for now.
4589 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4590 and niters_no_overflow parameters. Update calls to
4591 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4592 Create a new SSA name if the latter choses to use a ste other
4593 than zero, and return it via niters_vector_mult_vf_var.
4594 * tree-vect-loop.c (vect_transform_loop): Update calls to
4595 vect_do_peeling, vect_gen_vector_loop_niters and
4596 slpeel_make_loop_iterate_ntimes.
4597 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4598 (vect_gen_vector_loop_niters): Update declarations after above changes.
4600 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4602 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4603 128-bit round to integer instructions.
4604 (ceil<mode>2): Likewise.
4605 (btrunc<mode>2): Likewise.
4606 (round<mode>2): Likewise.
4608 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4610 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4611 unaligned VSX load/store on P8/P9.
4612 (expand_block_clear): Allow the use of unaligned VSX
4613 load/store on P8/P9.
4615 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4617 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4618 New function.
4619 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4620 swap associated with both a load and a store.
4622 2018-01-02 Andrew Waterman <andrew@sifive.com>
4624 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4625 * config/riscv/riscv.md (clear_cache): Use it.
4627 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4629 * web.c: Remove out-of-date comment.
4631 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4633 * expr.c (fixup_args_size_notes): Check that any existing
4634 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4635 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4636 (emit_single_push_insn): ...here.
4638 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4640 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4641 (const_vector_encoded_nelts): New function.
4642 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4643 (const_vector_int_elt, const_vector_elt): Declare.
4644 * emit-rtl.c (const_vector_int_elt_1): New function.
4645 (const_vector_elt): Likewise.
4646 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4647 of CONST_VECTOR_ELT.
4649 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4651 * expr.c: Include rtx-vector-builder.h.
4652 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4653 directly on the tree encoding.
4654 (const_vector_from_tree): Likewise.
4655 * optabs.c: Include rtx-vector-builder.h.
4656 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4657 sequence of "u" values.
4658 * vec-perm-indices.c: Include rtx-vector-builder.h.
4659 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4660 directly on the vec_perm_indices encoding.
4662 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4664 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4665 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4666 * rtx-vector-builder.h: New file.
4667 * rtx-vector-builder.c: Likewise.
4668 * rtl.h (rtx_def::u2): Add a const_vector field.
4669 (CONST_VECTOR_NPATTERNS): New macro.
4670 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4671 (CONST_VECTOR_DUPLICATE_P): Likewise.
4672 (CONST_VECTOR_STEPPED_P): Likewise.
4673 (CONST_VECTOR_ENCODED_ELT): Likewise.
4674 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4675 (unwrap_const_vec_duplicate): Likewise.
4676 (const_vec_series_p): Check for a non-duplicated vector encoding.
4677 Say that the function only returns true for integer vectors.
4678 * emit-rtl.c: Include rtx-vector-builder.h.
4679 (gen_const_vec_duplicate_1): Delete.
4680 (gen_const_vector): Call gen_const_vec_duplicate instead of
4681 gen_const_vec_duplicate_1.
4682 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4683 (gen_const_vec_duplicate): Use rtx_vector_builder.
4684 (gen_const_vec_series): Likewise.
4685 (gen_rtx_CONST_VECTOR): Likewise.
4686 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4687 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4688 Build a new vector rather than modifying a CONST_VECTOR in-place.
4689 (handle_special_swappables): Update call accordingly.
4690 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4691 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4692 Build a new vector rather than modifying a CONST_VECTOR in-place.
4693 (handle_special_swappables): Update call accordingly.
4695 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4697 * simplify-rtx.c (simplify_const_binary_operation): Use
4698 CONST_VECTOR_ELT instead of XVECEXP.
4700 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4702 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4703 the selector elements to be different from the data elements
4704 if the selector is a VECTOR_CST.
4705 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4706 ssizetype for the selector.
4708 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4710 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4711 before testing each element individually.
4712 * tree-vect-generic.c (lower_vec_perm): Likewise.
4714 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4716 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4717 * selftest-run-tests.c (selftest::run_tests): Call it.
4718 * vector-builder.h (vector_builder::operator ==): New function.
4719 (vector_builder::operator !=): Likewise.
4720 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4721 (vec_perm_indices::all_from_input_p): New function.
4722 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4723 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4724 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4725 instead of reading the VECTOR_CST directly. Detect whether both
4726 vector inputs are the same before constructing the vec_perm_indices,
4727 and update the number of inputs argument accordingly. Use the
4728 utility functions added above. Only construct sel2 if we need to.
4730 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4732 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4733 the broadcast of the low byte.
4734 (expand_mult_highpart): Use an explicit encoding for the permutes.
4735 * optabs-query.c (can_mult_highpart_p): Likewise.
4736 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4737 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4738 (vectorizable_bswap): Likewise.
4739 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4740 explicit encoding for the power-of-2 permutes.
4741 (vect_permute_store_chain): Likewise.
4742 (vect_grouped_load_supported): Likewise.
4743 (vect_permute_load_chain): Likewise.
4745 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4747 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4748 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4749 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4750 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4751 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4752 (vect_gen_perm_mask_any): Likewise.
4754 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4756 * int-vector-builder.h: New file.
4757 * vec-perm-indices.h: Include int-vector-builder.h.
4758 (vec_perm_indices): Redefine as an int_vector_builder.
4759 (auto_vec_perm_indices): Delete.
4760 (vec_perm_builder): Redefine as a stand-alone class.
4761 (vec_perm_indices::vec_perm_indices): New function.
4762 (vec_perm_indices::clamp): Likewise.
4763 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4764 (vec_perm_indices::new_vector): New function.
4765 (vec_perm_indices::new_expanded_vector): Update for new
4766 vec_perm_indices class.
4767 (vec_perm_indices::rotate_inputs): New function.
4768 (vec_perm_indices::all_in_range_p): Operate directly on the
4769 encoded form, without computing elided elements.
4770 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4771 encoding. Update for new vec_perm_indices class.
4772 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4773 the given vec_perm_builder.
4774 (expand_vec_perm_var): Update vec_perm_builder constructor.
4775 (expand_mult_highpart): Use vec_perm_builder instead of
4776 auto_vec_perm_indices.
4777 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4778 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4779 or double series encoding as appropriate.
4780 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4781 vec_perm_indices instead of auto_vec_perm_indices.
4782 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4783 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4784 (vect_permute_store_chain): Likewise.
4785 (vect_grouped_load_supported): Likewise.
4786 (vect_permute_load_chain): Likewise.
4787 (vect_shift_permute_load_chain): Likewise.
4788 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4789 (vect_transform_slp_perm_load): Likewise.
4790 (vect_schedule_slp_instance): Likewise.
4791 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4792 (vectorizable_mask_load_store): Likewise.
4793 (vectorizable_bswap): Likewise.
4794 (vectorizable_store): Likewise.
4795 (vectorizable_load): Likewise.
4796 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4797 vec_perm_indices instead of auto_vec_perm_indices. Use
4798 tree_to_vec_perm_builder to read the vector from a tree.
4799 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4800 vec_perm_builder instead of a vec_perm_indices.
4801 (have_whole_vector_shift): Use vec_perm_builder and
4802 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4803 truncation to calc_vec_perm_mask_for_shift.
4804 (vect_create_epilog_for_reduction): Likewise.
4805 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4806 from auto_vec_perm_indices to vec_perm_indices.
4807 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4808 instead of changing individual elements.
4809 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4810 the vector in d.perm.
4811 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4812 from auto_vec_perm_indices to vec_perm_indices.
4813 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4814 instead of changing individual elements.
4815 (arm_vectorize_vec_perm_const): Use new_vector to install
4816 the vector in d.perm.
4817 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4818 Update vec_perm_builder constructor.
4819 (rs6000_expand_interleave): Likewise.
4820 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4821 (rs6000_expand_interleave): Likewise.
4823 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4825 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4826 to qimode could truncate the indices.
4827 * optabs.c (expand_vec_perm_var): Likewise.
4829 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4831 * Makefile.in (OBJS): Add vec-perm-indices.o.
4832 * vec-perm-indices.h: New file.
4833 * vec-perm-indices.c: Likewise.
4834 * target.h (vec_perm_indices): Replace with a forward class
4835 declaration.
4836 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4837 * optabs.h: Include vec-perm-indices.h.
4838 (expand_vec_perm): Delete.
4839 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4840 (expand_vec_perm_const): Declare.
4841 * target.def (vec_perm_const_ok): Replace with...
4842 (vec_perm_const): ...this new hook.
4843 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4844 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4845 * doc/tm.texi: Regenerate.
4846 * optabs.def (vec_perm_const): Delete.
4847 * doc/md.texi (vec_perm_const): Likewise.
4848 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4849 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4850 expand_vec_perm for constant permutation vectors. Assert that
4851 the mode of variable permutation vectors is the integer equivalent
4852 of the mode that is being permuted.
4853 * optabs-query.h (selector_fits_mode_p): Declare.
4854 * optabs-query.c: Include vec-perm-indices.h.
4855 (selector_fits_mode_p): New function.
4856 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4857 is defined, instead of checking whether the vec_perm_const_optab
4858 exists. Use targetm.vectorize.vec_perm_const instead of
4859 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4860 fit in the vector mode before using a variable permute.
4861 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4862 vec_perm_indices instead of an rtx.
4863 (expand_vec_perm): Replace with...
4864 (expand_vec_perm_const): ...this new function. Take the selector
4865 as a vec_perm_indices rather than an rtx. Also take the mode of
4866 the selector. Update call to shift_amt_for_vec_perm_mask.
4867 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4868 Use vec_perm_indices::new_expanded_vector to expand the original
4869 selector into bytes. Check whether the indices fit in the vector
4870 mode before using a variable permute.
4871 (expand_vec_perm_var): Make global.
4872 (expand_mult_highpart): Use expand_vec_perm_const.
4873 * fold-const.c: Includes vec-perm-indices.h.
4874 * tree-ssa-forwprop.c: Likewise.
4875 * tree-vect-data-refs.c: Likewise.
4876 * tree-vect-generic.c: Likewise.
4877 * tree-vect-loop.c: Likewise.
4878 * tree-vect-slp.c: Likewise.
4879 * tree-vect-stmts.c: Likewise.
4880 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4881 Delete.
4882 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4883 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4884 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4885 (aarch64_vectorize_vec_perm_const): ...this new function.
4886 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4887 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4888 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4889 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4890 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4891 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4892 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4893 into...
4894 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4895 check for NEON modes.
4896 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4897 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4898 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4899 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4900 into...
4901 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4902 the old VEC_PERM_CONST conditions.
4903 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4904 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4905 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4906 (ia64_vectorize_vec_perm_const_ok): Merge into...
4907 (ia64_vectorize_vec_perm_const): ...this new function.
4908 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4909 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4910 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4911 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4912 * config/mips/mips.c (mips_expand_vec_perm_const)
4913 (mips_vectorize_vec_perm_const_ok): Merge into...
4914 (mips_vectorize_vec_perm_const): ...this new function.
4915 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4916 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4917 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4918 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4919 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4920 (rs6000_expand_vec_perm_const): Delete.
4921 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4922 Delete.
4923 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4924 (altivec_expand_vec_perm_const_le): Take each operand individually.
4925 Operate on constant selectors rather than rtxes.
4926 (altivec_expand_vec_perm_const): Likewise. Update call to
4927 altivec_expand_vec_perm_const_le.
4928 (rs6000_expand_vec_perm_const): Delete.
4929 (rs6000_vectorize_vec_perm_const_ok): Delete.
4930 (rs6000_vectorize_vec_perm_const): New function.
4931 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4932 an element count and rtx array.
4933 (rs6000_expand_extract_even): Update call accordingly.
4934 (rs6000_expand_interleave): Likewise.
4935 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4936 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4937 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4938 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4939 (rs6000_expand_vec_perm_const): Delete.
4940 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4941 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4942 (altivec_expand_vec_perm_const_le): Take each operand individually.
4943 Operate on constant selectors rather than rtxes.
4944 (altivec_expand_vec_perm_const): Likewise. Update call to
4945 altivec_expand_vec_perm_const_le.
4946 (rs6000_expand_vec_perm_const): Delete.
4947 (rs6000_vectorize_vec_perm_const_ok): Delete.
4948 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4949 reference to the SPE evmerge intructions.
4950 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4951 an element count and rtx array.
4952 (rs6000_expand_extract_even): Update call accordingly.
4953 (rs6000_expand_interleave): Likewise.
4954 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4955 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4956 new function.
4957 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4959 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4961 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4962 vector mode and that that mode matches the mode of the data
4963 being permuted.
4964 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4965 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4966 directly using expand_vec_perm_1 when forcing selectors into
4967 registers.
4968 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4970 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4972 * optabs-query.h (can_vec_perm_p): Delete.
4973 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4974 * optabs-query.c (can_vec_perm_p): Split into...
4975 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4976 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4977 particular selector is valid.
4978 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4979 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4980 (vect_grouped_load_supported): Likewise.
4981 (vect_shift_permute_load_chain): Likewise.
4982 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4983 (vect_transform_slp_perm_load): Likewise.
4984 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4985 (vectorizable_bswap): Likewise.
4986 (vect_gen_perm_mask_checked): Likewise.
4987 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4988 implementations of variable permutation vectors into account
4989 when deciding which selector to use.
4990 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4991 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4992 with a false third argument.
4993 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4994 to test whether the constant selector is valid and can_vec_perm_var_p
4995 to test whether a variable selector is valid.
4997 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4999 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
5000 * optabs-query.c (can_vec_perm_p): Likewise.
5001 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
5002 instead of vec_perm_indices.
5003 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
5004 (vect_gen_perm_mask_checked): Likewise,
5005 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
5006 (vect_gen_perm_mask_checked): Likewise,
5008 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
5010 * optabs-query.h (qimode_for_vec_perm): Declare.
5011 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
5012 (qimode_for_vec_perm): ...this new function.
5013 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
5015 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
5017 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
5018 does not have a conditional at the top.
5020 2018-01-02 Richard Biener <rguenther@suse.de>
5022 * ipa-inline.c (big_speedup_p): Fix expression.
5024 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
5026 PR target/81616
5027 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
5028 for generic 4->6.
5030 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
5032 PR target/81616
5033 Generic tuning.
5034 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
5035 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
5036 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
5037 cond_taken_branch_cost 3->4.
5039 2018-01-01 Jakub Jelinek <jakub@redhat.com>
5041 PR tree-optimization/83581
5042 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
5043 TODO_cleanup_cfg if any changes have been made.
5045 PR middle-end/83608
5046 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
5047 convert_modes if target mode has the right side, but different mode
5048 class.
5050 PR middle-end/83609
5051 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
5052 last argument when extracting from CONCAT. If either from_real or
5053 from_imag is NULL, use expansion through memory. If result is not
5054 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
5055 the parts directly to inner mode, if even that fails, use expansion
5056 through memory.
5058 PR middle-end/83623
5059 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
5060 check for bswap in mode rather than HImode and use that in expand_unop
5061 too.
5062 \f
5063 Copyright (C) 2018 Free Software Foundation, Inc.
5065 Copying and distribution of this file, with or without modification,
5066 are permitted in any medium without royalty provided the copyright
5067 notice and this notice are preserved.