LWG 3035. std::allocator's constructors should be constexpr
[official-gcc.git] / gcc / expr.c
blob56751df8431a31eebc2dadd21ae4e26a532975e3
1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "backend.h"
24 #include "target.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "gimple.h"
28 #include "predict.h"
29 #include "memmodel.h"
30 #include "tm_p.h"
31 #include "ssa.h"
32 #include "expmed.h"
33 #include "optabs.h"
34 #include "regs.h"
35 #include "emit-rtl.h"
36 #include "recog.h"
37 #include "cgraph.h"
38 #include "diagnostic.h"
39 #include "alias.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
42 #include "attribs.h"
43 #include "varasm.h"
44 #include "except.h"
45 #include "insn-attr.h"
46 #include "dojump.h"
47 #include "explow.h"
48 #include "calls.h"
49 #include "stmt.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
51 #include "expr.h"
52 #include "optabs-tree.h"
53 #include "libfuncs.h"
54 #include "reload.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
60 #include "builtins.h"
61 #include "ccmp.h"
62 #include "rtx-vector-builder.h"
65 /* If this is nonzero, we do not bother generating VOLATILE
66 around volatile memory references, and we are willing to
67 output indirect addresses. If cse is to follow, we reject
68 indirect addresses so a useful potential cse is generated;
69 if it is used only once, instruction combination will produce
70 the same indirect address eventually. */
71 int cse_not_expected;
73 static bool block_move_libcall_safe_for_call_parm (void);
74 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
75 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
76 unsigned HOST_WIDE_INT);
77 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
78 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
79 static rtx_insn *compress_float_constant (rtx, rtx);
80 static rtx get_subtarget (rtx);
81 static void store_constructor (tree, rtx, int, poly_int64, bool);
82 static rtx store_field (rtx, poly_int64, poly_int64, poly_uint64, poly_uint64,
83 machine_mode, tree, alias_set_type, bool, bool);
85 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
87 static int is_aligning_offset (const_tree, const_tree);
88 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
89 static rtx do_store_flag (sepops, rtx, machine_mode);
90 #ifdef PUSH_ROUNDING
91 static void emit_single_push_insn (machine_mode, rtx, tree);
92 #endif
93 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx,
94 profile_probability);
95 static rtx const_vector_from_tree (tree);
96 static rtx const_scalar_mask_from_tree (scalar_int_mode, tree);
97 static tree tree_expr_size (const_tree);
98 static HOST_WIDE_INT int_expr_size (tree);
99 static void convert_mode_scalar (rtx, rtx, int);
102 /* This is run to set up which modes can be used
103 directly in memory and to initialize the block move optab. It is run
104 at the beginning of compilation and when the target is reinitialized. */
106 void
107 init_expr_target (void)
109 rtx pat;
110 int num_clobbers;
111 rtx mem, mem1;
112 rtx reg;
114 /* Try indexing by frame ptr and try by stack ptr.
115 It is known that on the Convex the stack ptr isn't a valid index.
116 With luck, one or the other is valid on any machine. */
117 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
118 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
120 /* A scratch register we can modify in-place below to avoid
121 useless RTL allocations. */
122 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
124 rtx_insn *insn = as_a<rtx_insn *> (rtx_alloc (INSN));
125 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
126 PATTERN (insn) = pat;
128 for (machine_mode mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
129 mode = (machine_mode) ((int) mode + 1))
131 int regno;
133 direct_load[(int) mode] = direct_store[(int) mode] = 0;
134 PUT_MODE (mem, mode);
135 PUT_MODE (mem1, mode);
137 /* See if there is some register that can be used in this mode and
138 directly loaded or stored from memory. */
140 if (mode != VOIDmode && mode != BLKmode)
141 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
142 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
143 regno++)
145 if (!targetm.hard_regno_mode_ok (regno, mode))
146 continue;
148 set_mode_and_regno (reg, mode, regno);
150 SET_SRC (pat) = mem;
151 SET_DEST (pat) = reg;
152 if (recog (pat, insn, &num_clobbers) >= 0)
153 direct_load[(int) mode] = 1;
155 SET_SRC (pat) = mem1;
156 SET_DEST (pat) = reg;
157 if (recog (pat, insn, &num_clobbers) >= 0)
158 direct_load[(int) mode] = 1;
160 SET_SRC (pat) = reg;
161 SET_DEST (pat) = mem;
162 if (recog (pat, insn, &num_clobbers) >= 0)
163 direct_store[(int) mode] = 1;
165 SET_SRC (pat) = reg;
166 SET_DEST (pat) = mem1;
167 if (recog (pat, insn, &num_clobbers) >= 0)
168 direct_store[(int) mode] = 1;
172 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
174 opt_scalar_float_mode mode_iter;
175 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT)
177 scalar_float_mode mode = mode_iter.require ();
178 scalar_float_mode srcmode;
179 FOR_EACH_MODE_UNTIL (srcmode, mode)
181 enum insn_code ic;
183 ic = can_extend_p (mode, srcmode, 0);
184 if (ic == CODE_FOR_nothing)
185 continue;
187 PUT_MODE (mem, srcmode);
189 if (insn_operand_matches (ic, 1, mem))
190 float_extend_from_mem[mode][srcmode] = true;
195 /* This is run at the start of compiling a function. */
197 void
198 init_expr (void)
200 memset (&crtl->expr, 0, sizeof (crtl->expr));
203 /* Copy data from FROM to TO, where the machine modes are not the same.
204 Both modes may be integer, or both may be floating, or both may be
205 fixed-point.
206 UNSIGNEDP should be nonzero if FROM is an unsigned type.
207 This causes zero-extension instead of sign-extension. */
209 void
210 convert_move (rtx to, rtx from, int unsignedp)
212 machine_mode to_mode = GET_MODE (to);
213 machine_mode from_mode = GET_MODE (from);
215 gcc_assert (to_mode != BLKmode);
216 gcc_assert (from_mode != BLKmode);
218 /* If the source and destination are already the same, then there's
219 nothing to do. */
220 if (to == from)
221 return;
223 /* If FROM is a SUBREG that indicates that we have already done at least
224 the required extension, strip it. We don't handle such SUBREGs as
225 TO here. */
227 scalar_int_mode to_int_mode;
228 if (GET_CODE (from) == SUBREG
229 && SUBREG_PROMOTED_VAR_P (from)
230 && is_a <scalar_int_mode> (to_mode, &to_int_mode)
231 && (GET_MODE_PRECISION (subreg_promoted_mode (from))
232 >= GET_MODE_PRECISION (to_int_mode))
233 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
235 from = gen_lowpart (to_int_mode, SUBREG_REG (from));
236 from_mode = to_int_mode;
239 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
241 if (to_mode == from_mode
242 || (from_mode == VOIDmode && CONSTANT_P (from)))
244 emit_move_insn (to, from);
245 return;
248 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
250 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode),
251 GET_MODE_BITSIZE (to_mode)));
253 if (VECTOR_MODE_P (to_mode))
254 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
255 else
256 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
258 emit_move_insn (to, from);
259 return;
262 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
264 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
265 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
266 return;
269 convert_mode_scalar (to, from, unsignedp);
272 /* Like convert_move, but deals only with scalar modes. */
274 static void
275 convert_mode_scalar (rtx to, rtx from, int unsignedp)
277 /* Both modes should be scalar types. */
278 scalar_mode from_mode = as_a <scalar_mode> (GET_MODE (from));
279 scalar_mode to_mode = as_a <scalar_mode> (GET_MODE (to));
280 bool to_real = SCALAR_FLOAT_MODE_P (to_mode);
281 bool from_real = SCALAR_FLOAT_MODE_P (from_mode);
282 enum insn_code code;
283 rtx libcall;
285 gcc_assert (to_real == from_real);
287 /* rtx code for making an equivalent value. */
288 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
289 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
291 if (to_real)
293 rtx value;
294 rtx_insn *insns;
295 convert_optab tab;
297 gcc_assert ((GET_MODE_PRECISION (from_mode)
298 != GET_MODE_PRECISION (to_mode))
299 || (DECIMAL_FLOAT_MODE_P (from_mode)
300 != DECIMAL_FLOAT_MODE_P (to_mode)));
302 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
303 /* Conversion between decimal float and binary float, same size. */
304 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
305 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
306 tab = sext_optab;
307 else
308 tab = trunc_optab;
310 /* Try converting directly if the insn is supported. */
312 code = convert_optab_handler (tab, to_mode, from_mode);
313 if (code != CODE_FOR_nothing)
315 emit_unop_insn (code, to, from,
316 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
317 return;
320 /* Otherwise use a libcall. */
321 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
323 /* Is this conversion implemented yet? */
324 gcc_assert (libcall);
326 start_sequence ();
327 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
328 from, from_mode);
329 insns = get_insns ();
330 end_sequence ();
331 emit_libcall_block (insns, to, value,
332 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
333 from)
334 : gen_rtx_FLOAT_EXTEND (to_mode, from));
335 return;
338 /* Handle pointer conversion. */ /* SPEE 900220. */
339 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
341 convert_optab ctab;
343 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
344 ctab = trunc_optab;
345 else if (unsignedp)
346 ctab = zext_optab;
347 else
348 ctab = sext_optab;
350 if (convert_optab_handler (ctab, to_mode, from_mode)
351 != CODE_FOR_nothing)
353 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
354 to, from, UNKNOWN);
355 return;
359 /* Targets are expected to provide conversion insns between PxImode and
360 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
361 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
363 scalar_int_mode full_mode
364 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode));
366 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
367 != CODE_FOR_nothing);
369 if (full_mode != from_mode)
370 from = convert_to_mode (full_mode, from, unsignedp);
371 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
372 to, from, UNKNOWN);
373 return;
375 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
377 rtx new_from;
378 scalar_int_mode full_mode
379 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode));
380 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
381 enum insn_code icode;
383 icode = convert_optab_handler (ctab, full_mode, from_mode);
384 gcc_assert (icode != CODE_FOR_nothing);
386 if (to_mode == full_mode)
388 emit_unop_insn (icode, to, from, UNKNOWN);
389 return;
392 new_from = gen_reg_rtx (full_mode);
393 emit_unop_insn (icode, new_from, from, UNKNOWN);
395 /* else proceed to integer conversions below. */
396 from_mode = full_mode;
397 from = new_from;
400 /* Make sure both are fixed-point modes or both are not. */
401 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
402 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
403 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
405 /* If we widen from_mode to to_mode and they are in the same class,
406 we won't saturate the result.
407 Otherwise, always saturate the result to play safe. */
408 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
409 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
410 expand_fixed_convert (to, from, 0, 0);
411 else
412 expand_fixed_convert (to, from, 0, 1);
413 return;
416 /* Now both modes are integers. */
418 /* Handle expanding beyond a word. */
419 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
420 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
422 rtx_insn *insns;
423 rtx lowpart;
424 rtx fill_value;
425 rtx lowfrom;
426 int i;
427 scalar_mode lowpart_mode;
428 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
430 /* Try converting directly if the insn is supported. */
431 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
432 != CODE_FOR_nothing)
434 /* If FROM is a SUBREG, put it into a register. Do this
435 so that we always generate the same set of insns for
436 better cse'ing; if an intermediate assignment occurred,
437 we won't be doing the operation directly on the SUBREG. */
438 if (optimize > 0 && GET_CODE (from) == SUBREG)
439 from = force_reg (from_mode, from);
440 emit_unop_insn (code, to, from, equiv_code);
441 return;
443 /* Next, try converting via full word. */
444 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
445 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
446 != CODE_FOR_nothing))
448 rtx word_to = gen_reg_rtx (word_mode);
449 if (REG_P (to))
451 if (reg_overlap_mentioned_p (to, from))
452 from = force_reg (from_mode, from);
453 emit_clobber (to);
455 convert_move (word_to, from, unsignedp);
456 emit_unop_insn (code, to, word_to, equiv_code);
457 return;
460 /* No special multiword conversion insn; do it by hand. */
461 start_sequence ();
463 /* Since we will turn this into a no conflict block, we must ensure
464 the source does not overlap the target so force it into an isolated
465 register when maybe so. Likewise for any MEM input, since the
466 conversion sequence might require several references to it and we
467 must ensure we're getting the same value every time. */
469 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
470 from = force_reg (from_mode, from);
472 /* Get a copy of FROM widened to a word, if necessary. */
473 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
474 lowpart_mode = word_mode;
475 else
476 lowpart_mode = from_mode;
478 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
480 lowpart = gen_lowpart (lowpart_mode, to);
481 emit_move_insn (lowpart, lowfrom);
483 /* Compute the value to put in each remaining word. */
484 if (unsignedp)
485 fill_value = const0_rtx;
486 else
487 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
488 LT, lowfrom, const0_rtx,
489 lowpart_mode, 0, -1);
491 /* Fill the remaining words. */
492 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
494 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
495 rtx subword = operand_subword (to, index, 1, to_mode);
497 gcc_assert (subword);
499 if (fill_value != subword)
500 emit_move_insn (subword, fill_value);
503 insns = get_insns ();
504 end_sequence ();
506 emit_insn (insns);
507 return;
510 /* Truncating multi-word to a word or less. */
511 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
512 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
514 if (!((MEM_P (from)
515 && ! MEM_VOLATILE_P (from)
516 && direct_load[(int) to_mode]
517 && ! mode_dependent_address_p (XEXP (from, 0),
518 MEM_ADDR_SPACE (from)))
519 || REG_P (from)
520 || GET_CODE (from) == SUBREG))
521 from = force_reg (from_mode, from);
522 convert_move (to, gen_lowpart (word_mode, from), 0);
523 return;
526 /* Now follow all the conversions between integers
527 no more than a word long. */
529 /* For truncation, usually we can just refer to FROM in a narrower mode. */
530 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
531 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
533 if (!((MEM_P (from)
534 && ! MEM_VOLATILE_P (from)
535 && direct_load[(int) to_mode]
536 && ! mode_dependent_address_p (XEXP (from, 0),
537 MEM_ADDR_SPACE (from)))
538 || REG_P (from)
539 || GET_CODE (from) == SUBREG))
540 from = force_reg (from_mode, from);
541 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
542 && !targetm.hard_regno_mode_ok (REGNO (from), to_mode))
543 from = copy_to_reg (from);
544 emit_move_insn (to, gen_lowpart (to_mode, from));
545 return;
548 /* Handle extension. */
549 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
551 /* Convert directly if that works. */
552 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
553 != CODE_FOR_nothing)
555 emit_unop_insn (code, to, from, equiv_code);
556 return;
558 else
560 scalar_mode intermediate;
561 rtx tmp;
562 int shift_amount;
564 /* Search for a mode to convert via. */
565 opt_scalar_mode intermediate_iter;
566 FOR_EACH_MODE_FROM (intermediate_iter, from_mode)
568 scalar_mode intermediate = intermediate_iter.require ();
569 if (((can_extend_p (to_mode, intermediate, unsignedp)
570 != CODE_FOR_nothing)
571 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
572 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode,
573 intermediate)))
574 && (can_extend_p (intermediate, from_mode, unsignedp)
575 != CODE_FOR_nothing))
577 convert_move (to, convert_to_mode (intermediate, from,
578 unsignedp), unsignedp);
579 return;
583 /* No suitable intermediate mode.
584 Generate what we need with shifts. */
585 shift_amount = (GET_MODE_PRECISION (to_mode)
586 - GET_MODE_PRECISION (from_mode));
587 from = gen_lowpart (to_mode, force_reg (from_mode, from));
588 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
589 to, unsignedp);
590 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
591 to, unsignedp);
592 if (tmp != to)
593 emit_move_insn (to, tmp);
594 return;
598 /* Support special truncate insns for certain modes. */
599 if (convert_optab_handler (trunc_optab, to_mode,
600 from_mode) != CODE_FOR_nothing)
602 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
603 to, from, UNKNOWN);
604 return;
607 /* Handle truncation of volatile memrefs, and so on;
608 the things that couldn't be truncated directly,
609 and for which there was no special instruction.
611 ??? Code above formerly short-circuited this, for most integer
612 mode pairs, with a force_reg in from_mode followed by a recursive
613 call to this routine. Appears always to have been wrong. */
614 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
616 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
617 emit_move_insn (to, temp);
618 return;
621 /* Mode combination is not recognized. */
622 gcc_unreachable ();
625 /* Return an rtx for a value that would result
626 from converting X to mode MODE.
627 Both X and MODE may be floating, or both integer.
628 UNSIGNEDP is nonzero if X is an unsigned value.
629 This can be done by referring to a part of X in place
630 or by copying to a new temporary with conversion. */
633 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
635 return convert_modes (mode, VOIDmode, x, unsignedp);
638 /* Return an rtx for a value that would result
639 from converting X from mode OLDMODE to mode MODE.
640 Both modes may be floating, or both integer.
641 UNSIGNEDP is nonzero if X is an unsigned value.
643 This can be done by referring to a part of X in place
644 or by copying to a new temporary with conversion.
646 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
649 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
651 rtx temp;
652 scalar_int_mode int_mode;
654 /* If FROM is a SUBREG that indicates that we have already done at least
655 the required extension, strip it. */
657 if (GET_CODE (x) == SUBREG
658 && SUBREG_PROMOTED_VAR_P (x)
659 && is_a <scalar_int_mode> (mode, &int_mode)
660 && (GET_MODE_PRECISION (subreg_promoted_mode (x))
661 >= GET_MODE_PRECISION (int_mode))
662 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
663 x = gen_lowpart (int_mode, SUBREG_REG (x));
665 if (GET_MODE (x) != VOIDmode)
666 oldmode = GET_MODE (x);
668 if (mode == oldmode)
669 return x;
671 if (CONST_SCALAR_INT_P (x)
672 && is_int_mode (mode, &int_mode))
674 /* If the caller did not tell us the old mode, then there is not
675 much to do with respect to canonicalization. We have to
676 assume that all the bits are significant. */
677 if (GET_MODE_CLASS (oldmode) != MODE_INT)
678 oldmode = MAX_MODE_INT;
679 wide_int w = wide_int::from (rtx_mode_t (x, oldmode),
680 GET_MODE_PRECISION (int_mode),
681 unsignedp ? UNSIGNED : SIGNED);
682 return immed_wide_int_const (w, int_mode);
685 /* We can do this with a gen_lowpart if both desired and current modes
686 are integer, and this is either a constant integer, a register, or a
687 non-volatile MEM. */
688 scalar_int_mode int_oldmode;
689 if (is_int_mode (mode, &int_mode)
690 && is_int_mode (oldmode, &int_oldmode)
691 && GET_MODE_PRECISION (int_mode) <= GET_MODE_PRECISION (int_oldmode)
692 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) int_mode])
693 || CONST_POLY_INT_P (x)
694 || (REG_P (x)
695 && (!HARD_REGISTER_P (x)
696 || targetm.hard_regno_mode_ok (REGNO (x), int_mode))
697 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, GET_MODE (x)))))
698 return gen_lowpart (int_mode, x);
700 /* Converting from integer constant into mode is always equivalent to an
701 subreg operation. */
702 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
704 gcc_assert (known_eq (GET_MODE_BITSIZE (mode),
705 GET_MODE_BITSIZE (oldmode)));
706 return simplify_gen_subreg (mode, x, oldmode, 0);
709 temp = gen_reg_rtx (mode);
710 convert_move (temp, x, unsignedp);
711 return temp;
714 /* Return the largest alignment we can use for doing a move (or store)
715 of MAX_PIECES. ALIGN is the largest alignment we could use. */
717 static unsigned int
718 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
720 scalar_int_mode tmode
721 = int_mode_for_size (max_pieces * BITS_PER_UNIT, 1).require ();
723 if (align >= GET_MODE_ALIGNMENT (tmode))
724 align = GET_MODE_ALIGNMENT (tmode);
725 else
727 scalar_int_mode xmode = NARROWEST_INT_MODE;
728 opt_scalar_int_mode mode_iter;
729 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
731 tmode = mode_iter.require ();
732 if (GET_MODE_SIZE (tmode) > max_pieces
733 || targetm.slow_unaligned_access (tmode, align))
734 break;
735 xmode = tmode;
738 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
741 return align;
744 /* Return the widest integer mode that is narrower than SIZE bytes. */
746 static scalar_int_mode
747 widest_int_mode_for_size (unsigned int size)
749 scalar_int_mode result = NARROWEST_INT_MODE;
751 gcc_checking_assert (size > 1);
753 opt_scalar_int_mode tmode;
754 FOR_EACH_MODE_IN_CLASS (tmode, MODE_INT)
755 if (GET_MODE_SIZE (tmode.require ()) < size)
756 result = tmode.require ();
758 return result;
761 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
762 and should be performed piecewise. */
764 static bool
765 can_do_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align,
766 enum by_pieces_operation op)
768 return targetm.use_by_pieces_infrastructure_p (len, align, op,
769 optimize_insn_for_speed_p ());
772 /* Determine whether the LEN bytes can be moved by using several move
773 instructions. Return nonzero if a call to move_by_pieces should
774 succeed. */
776 bool
777 can_move_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align)
779 return can_do_by_pieces (len, align, MOVE_BY_PIECES);
782 /* Return number of insns required to perform operation OP by pieces
783 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
785 unsigned HOST_WIDE_INT
786 by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
787 unsigned int max_size, by_pieces_operation op)
789 unsigned HOST_WIDE_INT n_insns = 0;
791 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
793 while (max_size > 1 && l > 0)
795 scalar_int_mode mode = widest_int_mode_for_size (max_size);
796 enum insn_code icode;
798 unsigned int modesize = GET_MODE_SIZE (mode);
800 icode = optab_handler (mov_optab, mode);
801 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
803 unsigned HOST_WIDE_INT n_pieces = l / modesize;
804 l %= modesize;
805 switch (op)
807 default:
808 n_insns += n_pieces;
809 break;
811 case COMPARE_BY_PIECES:
812 int batch = targetm.compare_by_pieces_branch_ratio (mode);
813 int batch_ops = 4 * batch - 1;
814 unsigned HOST_WIDE_INT full = n_pieces / batch;
815 n_insns += full * batch_ops;
816 if (n_pieces % batch != 0)
817 n_insns++;
818 break;
822 max_size = modesize;
825 gcc_assert (!l);
826 return n_insns;
829 /* Used when performing piecewise block operations, holds information
830 about one of the memory objects involved. The member functions
831 can be used to generate code for loading from the object and
832 updating the address when iterating. */
834 class pieces_addr
836 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
837 stack pushes. */
838 rtx m_obj;
839 /* The address of the object. Can differ from that seen in the
840 MEM rtx if we copied the address to a register. */
841 rtx m_addr;
842 /* Nonzero if the address on the object has an autoincrement already,
843 signifies whether that was an increment or decrement. */
844 signed char m_addr_inc;
845 /* Nonzero if we intend to use autoinc without the address already
846 having autoinc form. We will insert add insns around each memory
847 reference, expecting later passes to form autoinc addressing modes.
848 The only supported options are predecrement and postincrement. */
849 signed char m_explicit_inc;
850 /* True if we have either of the two possible cases of using
851 autoincrement. */
852 bool m_auto;
853 /* True if this is an address to be used for load operations rather
854 than stores. */
855 bool m_is_load;
857 /* Optionally, a function to obtain constants for any given offset into
858 the objects, and data associated with it. */
859 by_pieces_constfn m_constfn;
860 void *m_cfndata;
861 public:
862 pieces_addr (rtx, bool, by_pieces_constfn, void *);
863 rtx adjust (scalar_int_mode, HOST_WIDE_INT);
864 void increment_address (HOST_WIDE_INT);
865 void maybe_predec (HOST_WIDE_INT);
866 void maybe_postinc (HOST_WIDE_INT);
867 void decide_autoinc (machine_mode, bool, HOST_WIDE_INT);
868 int get_addr_inc ()
870 return m_addr_inc;
874 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
875 true if the operation to be performed on this object is a load
876 rather than a store. For stores, OBJ can be NULL, in which case we
877 assume the operation is a stack push. For loads, the optional
878 CONSTFN and its associated CFNDATA can be used in place of the
879 memory load. */
881 pieces_addr::pieces_addr (rtx obj, bool is_load, by_pieces_constfn constfn,
882 void *cfndata)
883 : m_obj (obj), m_is_load (is_load), m_constfn (constfn), m_cfndata (cfndata)
885 m_addr_inc = 0;
886 m_auto = false;
887 if (obj)
889 rtx addr = XEXP (obj, 0);
890 rtx_code code = GET_CODE (addr);
891 m_addr = addr;
892 bool dec = code == PRE_DEC || code == POST_DEC;
893 bool inc = code == PRE_INC || code == POST_INC;
894 m_auto = inc || dec;
895 if (m_auto)
896 m_addr_inc = dec ? -1 : 1;
898 /* While we have always looked for these codes here, the code
899 implementing the memory operation has never handled them.
900 Support could be added later if necessary or beneficial. */
901 gcc_assert (code != PRE_INC && code != POST_DEC);
903 else
905 m_addr = NULL_RTX;
906 if (!is_load)
908 m_auto = true;
909 if (STACK_GROWS_DOWNWARD)
910 m_addr_inc = -1;
911 else
912 m_addr_inc = 1;
914 else
915 gcc_assert (constfn != NULL);
917 m_explicit_inc = 0;
918 if (constfn)
919 gcc_assert (is_load);
922 /* Decide whether to use autoinc for an address involved in a memory op.
923 MODE is the mode of the accesses, REVERSE is true if we've decided to
924 perform the operation starting from the end, and LEN is the length of
925 the operation. Don't override an earlier decision to set m_auto. */
927 void
928 pieces_addr::decide_autoinc (machine_mode ARG_UNUSED (mode), bool reverse,
929 HOST_WIDE_INT len)
931 if (m_auto || m_obj == NULL_RTX)
932 return;
934 bool use_predec = (m_is_load
935 ? USE_LOAD_PRE_DECREMENT (mode)
936 : USE_STORE_PRE_DECREMENT (mode));
937 bool use_postinc = (m_is_load
938 ? USE_LOAD_POST_INCREMENT (mode)
939 : USE_STORE_POST_INCREMENT (mode));
940 machine_mode addr_mode = get_address_mode (m_obj);
942 if (use_predec && reverse)
944 m_addr = copy_to_mode_reg (addr_mode,
945 plus_constant (addr_mode,
946 m_addr, len));
947 m_auto = true;
948 m_explicit_inc = -1;
950 else if (use_postinc && !reverse)
952 m_addr = copy_to_mode_reg (addr_mode, m_addr);
953 m_auto = true;
954 m_explicit_inc = 1;
956 else if (CONSTANT_P (m_addr))
957 m_addr = copy_to_mode_reg (addr_mode, m_addr);
960 /* Adjust the address to refer to the data at OFFSET in MODE. If we
961 are using autoincrement for this address, we don't add the offset,
962 but we still modify the MEM's properties. */
965 pieces_addr::adjust (scalar_int_mode mode, HOST_WIDE_INT offset)
967 if (m_constfn)
968 return m_constfn (m_cfndata, offset, mode);
969 if (m_obj == NULL_RTX)
970 return NULL_RTX;
971 if (m_auto)
972 return adjust_automodify_address (m_obj, mode, m_addr, offset);
973 else
974 return adjust_address (m_obj, mode, offset);
977 /* Emit an add instruction to increment the address by SIZE. */
979 void
980 pieces_addr::increment_address (HOST_WIDE_INT size)
982 rtx amount = gen_int_mode (size, GET_MODE (m_addr));
983 emit_insn (gen_add2_insn (m_addr, amount));
986 /* If we are supposed to decrement the address after each access, emit code
987 to do so now. Increment by SIZE (which has should have the correct sign
988 already). */
990 void
991 pieces_addr::maybe_predec (HOST_WIDE_INT size)
993 if (m_explicit_inc >= 0)
994 return;
995 gcc_assert (HAVE_PRE_DECREMENT);
996 increment_address (size);
999 /* If we are supposed to decrement the address after each access, emit code
1000 to do so now. Increment by SIZE. */
1002 void
1003 pieces_addr::maybe_postinc (HOST_WIDE_INT size)
1005 if (m_explicit_inc <= 0)
1006 return;
1007 gcc_assert (HAVE_POST_INCREMENT);
1008 increment_address (size);
1011 /* This structure is used by do_op_by_pieces to describe the operation
1012 to be performed. */
1014 class op_by_pieces_d
1016 protected:
1017 pieces_addr m_to, m_from;
1018 unsigned HOST_WIDE_INT m_len;
1019 HOST_WIDE_INT m_offset;
1020 unsigned int m_align;
1021 unsigned int m_max_size;
1022 bool m_reverse;
1024 /* Virtual functions, overriden by derived classes for the specific
1025 operation. */
1026 virtual void generate (rtx, rtx, machine_mode) = 0;
1027 virtual bool prepare_mode (machine_mode, unsigned int) = 0;
1028 virtual void finish_mode (machine_mode)
1032 public:
1033 op_by_pieces_d (rtx, bool, rtx, bool, by_pieces_constfn, void *,
1034 unsigned HOST_WIDE_INT, unsigned int);
1035 void run ();
1038 /* The constructor for an op_by_pieces_d structure. We require two
1039 objects named TO and FROM, which are identified as loads or stores
1040 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1041 and its associated FROM_CFN_DATA can be used to replace loads with
1042 constant values. LEN describes the length of the operation. */
1044 op_by_pieces_d::op_by_pieces_d (rtx to, bool to_load,
1045 rtx from, bool from_load,
1046 by_pieces_constfn from_cfn,
1047 void *from_cfn_data,
1048 unsigned HOST_WIDE_INT len,
1049 unsigned int align)
1050 : m_to (to, to_load, NULL, NULL),
1051 m_from (from, from_load, from_cfn, from_cfn_data),
1052 m_len (len), m_max_size (MOVE_MAX_PIECES + 1)
1054 int toi = m_to.get_addr_inc ();
1055 int fromi = m_from.get_addr_inc ();
1056 if (toi >= 0 && fromi >= 0)
1057 m_reverse = false;
1058 else if (toi <= 0 && fromi <= 0)
1059 m_reverse = true;
1060 else
1061 gcc_unreachable ();
1063 m_offset = m_reverse ? len : 0;
1064 align = MIN (to ? MEM_ALIGN (to) : align,
1065 from ? MEM_ALIGN (from) : align);
1067 /* If copying requires more than two move insns,
1068 copy addresses to registers (to make displacements shorter)
1069 and use post-increment if available. */
1070 if (by_pieces_ninsns (len, align, m_max_size, MOVE_BY_PIECES) > 2)
1072 /* Find the mode of the largest comparison. */
1073 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1075 m_from.decide_autoinc (mode, m_reverse, len);
1076 m_to.decide_autoinc (mode, m_reverse, len);
1079 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1080 m_align = align;
1083 /* This function contains the main loop used for expanding a block
1084 operation. First move what we can in the largest integer mode,
1085 then go to successively smaller modes. For every access, call
1086 GENFUN with the two operands and the EXTRA_DATA. */
1088 void
1089 op_by_pieces_d::run ()
1091 while (m_max_size > 1 && m_len > 0)
1093 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1095 if (prepare_mode (mode, m_align))
1097 unsigned int size = GET_MODE_SIZE (mode);
1098 rtx to1 = NULL_RTX, from1;
1100 while (m_len >= size)
1102 if (m_reverse)
1103 m_offset -= size;
1105 to1 = m_to.adjust (mode, m_offset);
1106 from1 = m_from.adjust (mode, m_offset);
1108 m_to.maybe_predec (-(HOST_WIDE_INT)size);
1109 m_from.maybe_predec (-(HOST_WIDE_INT)size);
1111 generate (to1, from1, mode);
1113 m_to.maybe_postinc (size);
1114 m_from.maybe_postinc (size);
1116 if (!m_reverse)
1117 m_offset += size;
1119 m_len -= size;
1122 finish_mode (mode);
1125 m_max_size = GET_MODE_SIZE (mode);
1128 /* The code above should have handled everything. */
1129 gcc_assert (!m_len);
1132 /* Derived class from op_by_pieces_d, providing support for block move
1133 operations. */
1135 class move_by_pieces_d : public op_by_pieces_d
1137 insn_gen_fn m_gen_fun;
1138 void generate (rtx, rtx, machine_mode);
1139 bool prepare_mode (machine_mode, unsigned int);
1141 public:
1142 move_by_pieces_d (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1143 unsigned int align)
1144 : op_by_pieces_d (to, false, from, true, NULL, NULL, len, align)
1147 rtx finish_endp (int);
1150 /* Return true if MODE can be used for a set of copies, given an
1151 alignment ALIGN. Prepare whatever data is necessary for later
1152 calls to generate. */
1154 bool
1155 move_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1157 insn_code icode = optab_handler (mov_optab, mode);
1158 m_gen_fun = GEN_FCN (icode);
1159 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1162 /* A callback used when iterating for a compare_by_pieces_operation.
1163 OP0 and OP1 are the values that have been loaded and should be
1164 compared in MODE. If OP0 is NULL, this means we should generate a
1165 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1166 gen function that should be used to generate the mode. */
1168 void
1169 move_by_pieces_d::generate (rtx op0, rtx op1,
1170 machine_mode mode ATTRIBUTE_UNUSED)
1172 #ifdef PUSH_ROUNDING
1173 if (op0 == NULL_RTX)
1175 emit_single_push_insn (mode, op1, NULL);
1176 return;
1178 #endif
1179 emit_insn (m_gen_fun (op0, op1));
1182 /* Perform the final adjustment at the end of a string to obtain the
1183 correct return value for the block operation. If ENDP is 1 return
1184 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1185 end minus one byte ala stpcpy. */
1188 move_by_pieces_d::finish_endp (int endp)
1190 gcc_assert (!m_reverse);
1191 if (endp == 2)
1193 m_to.maybe_postinc (-1);
1194 --m_offset;
1196 return m_to.adjust (QImode, m_offset);
1199 /* Generate several move instructions to copy LEN bytes from block FROM to
1200 block TO. (These are MEM rtx's with BLKmode).
1202 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1203 used to push FROM to the stack.
1205 ALIGN is maximum stack alignment we can assume.
1207 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1208 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1209 stpcpy. */
1212 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1213 unsigned int align, int endp)
1215 #ifndef PUSH_ROUNDING
1216 if (to == NULL)
1217 gcc_unreachable ();
1218 #endif
1220 move_by_pieces_d data (to, from, len, align);
1222 data.run ();
1224 if (endp)
1225 return data.finish_endp (endp);
1226 else
1227 return to;
1230 /* Derived class from op_by_pieces_d, providing support for block move
1231 operations. */
1233 class store_by_pieces_d : public op_by_pieces_d
1235 insn_gen_fn m_gen_fun;
1236 void generate (rtx, rtx, machine_mode);
1237 bool prepare_mode (machine_mode, unsigned int);
1239 public:
1240 store_by_pieces_d (rtx to, by_pieces_constfn cfn, void *cfn_data,
1241 unsigned HOST_WIDE_INT len, unsigned int align)
1242 : op_by_pieces_d (to, false, NULL_RTX, true, cfn, cfn_data, len, align)
1245 rtx finish_endp (int);
1248 /* Return true if MODE can be used for a set of stores, given an
1249 alignment ALIGN. Prepare whatever data is necessary for later
1250 calls to generate. */
1252 bool
1253 store_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1255 insn_code icode = optab_handler (mov_optab, mode);
1256 m_gen_fun = GEN_FCN (icode);
1257 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1260 /* A callback used when iterating for a store_by_pieces_operation.
1261 OP0 and OP1 are the values that have been loaded and should be
1262 compared in MODE. If OP0 is NULL, this means we should generate a
1263 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1264 gen function that should be used to generate the mode. */
1266 void
1267 store_by_pieces_d::generate (rtx op0, rtx op1, machine_mode)
1269 emit_insn (m_gen_fun (op0, op1));
1272 /* Perform the final adjustment at the end of a string to obtain the
1273 correct return value for the block operation. If ENDP is 1 return
1274 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1275 end minus one byte ala stpcpy. */
1278 store_by_pieces_d::finish_endp (int endp)
1280 gcc_assert (!m_reverse);
1281 if (endp == 2)
1283 m_to.maybe_postinc (-1);
1284 --m_offset;
1286 return m_to.adjust (QImode, m_offset);
1289 /* Determine whether the LEN bytes generated by CONSTFUN can be
1290 stored to memory using several move instructions. CONSTFUNDATA is
1291 a pointer which will be passed as argument in every CONSTFUN call.
1292 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1293 a memset operation and false if it's a copy of a constant string.
1294 Return nonzero if a call to store_by_pieces should succeed. */
1297 can_store_by_pieces (unsigned HOST_WIDE_INT len,
1298 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1299 void *constfundata, unsigned int align, bool memsetp)
1301 unsigned HOST_WIDE_INT l;
1302 unsigned int max_size;
1303 HOST_WIDE_INT offset = 0;
1304 enum insn_code icode;
1305 int reverse;
1306 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1307 rtx cst ATTRIBUTE_UNUSED;
1309 if (len == 0)
1310 return 1;
1312 if (!targetm.use_by_pieces_infrastructure_p (len, align,
1313 memsetp
1314 ? SET_BY_PIECES
1315 : STORE_BY_PIECES,
1316 optimize_insn_for_speed_p ()))
1317 return 0;
1319 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
1321 /* We would first store what we can in the largest integer mode, then go to
1322 successively smaller modes. */
1324 for (reverse = 0;
1325 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
1326 reverse++)
1328 l = len;
1329 max_size = STORE_MAX_PIECES + 1;
1330 while (max_size > 1 && l > 0)
1332 scalar_int_mode mode = widest_int_mode_for_size (max_size);
1334 icode = optab_handler (mov_optab, mode);
1335 if (icode != CODE_FOR_nothing
1336 && align >= GET_MODE_ALIGNMENT (mode))
1338 unsigned int size = GET_MODE_SIZE (mode);
1340 while (l >= size)
1342 if (reverse)
1343 offset -= size;
1345 cst = (*constfun) (constfundata, offset, mode);
1346 if (!targetm.legitimate_constant_p (mode, cst))
1347 return 0;
1349 if (!reverse)
1350 offset += size;
1352 l -= size;
1356 max_size = GET_MODE_SIZE (mode);
1359 /* The code above should have handled everything. */
1360 gcc_assert (!l);
1363 return 1;
1366 /* Generate several move instructions to store LEN bytes generated by
1367 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1368 pointer which will be passed as argument in every CONSTFUN call.
1369 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1370 a memset operation and false if it's a copy of a constant string.
1371 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1372 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1373 stpcpy. */
1376 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
1377 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1378 void *constfundata, unsigned int align, bool memsetp, int endp)
1380 if (len == 0)
1382 gcc_assert (endp != 2);
1383 return to;
1386 gcc_assert (targetm.use_by_pieces_infrastructure_p
1387 (len, align,
1388 memsetp ? SET_BY_PIECES : STORE_BY_PIECES,
1389 optimize_insn_for_speed_p ()));
1391 store_by_pieces_d data (to, constfun, constfundata, len, align);
1392 data.run ();
1394 if (endp)
1395 return data.finish_endp (endp);
1396 else
1397 return to;
1400 /* Callback routine for clear_by_pieces.
1401 Return const0_rtx unconditionally. */
1403 static rtx
1404 clear_by_pieces_1 (void *, HOST_WIDE_INT, scalar_int_mode)
1406 return const0_rtx;
1409 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1410 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1412 static void
1413 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
1415 if (len == 0)
1416 return;
1418 store_by_pieces_d data (to, clear_by_pieces_1, NULL, len, align);
1419 data.run ();
1422 /* Context used by compare_by_pieces_genfn. It stores the fail label
1423 to jump to in case of miscomparison, and for branch ratios greater than 1,
1424 it stores an accumulator and the current and maximum counts before
1425 emitting another branch. */
1427 class compare_by_pieces_d : public op_by_pieces_d
1429 rtx_code_label *m_fail_label;
1430 rtx m_accumulator;
1431 int m_count, m_batch;
1433 void generate (rtx, rtx, machine_mode);
1434 bool prepare_mode (machine_mode, unsigned int);
1435 void finish_mode (machine_mode);
1436 public:
1437 compare_by_pieces_d (rtx op0, rtx op1, by_pieces_constfn op1_cfn,
1438 void *op1_cfn_data, HOST_WIDE_INT len, int align,
1439 rtx_code_label *fail_label)
1440 : op_by_pieces_d (op0, true, op1, true, op1_cfn, op1_cfn_data, len, align)
1442 m_fail_label = fail_label;
1446 /* A callback used when iterating for a compare_by_pieces_operation.
1447 OP0 and OP1 are the values that have been loaded and should be
1448 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1449 context structure. */
1451 void
1452 compare_by_pieces_d::generate (rtx op0, rtx op1, machine_mode mode)
1454 if (m_batch > 1)
1456 rtx temp = expand_binop (mode, sub_optab, op0, op1, NULL_RTX,
1457 true, OPTAB_LIB_WIDEN);
1458 if (m_count != 0)
1459 temp = expand_binop (mode, ior_optab, m_accumulator, temp, temp,
1460 true, OPTAB_LIB_WIDEN);
1461 m_accumulator = temp;
1463 if (++m_count < m_batch)
1464 return;
1466 m_count = 0;
1467 op0 = m_accumulator;
1468 op1 = const0_rtx;
1469 m_accumulator = NULL_RTX;
1471 do_compare_rtx_and_jump (op0, op1, NE, true, mode, NULL_RTX, NULL,
1472 m_fail_label, profile_probability::uninitialized ());
1475 /* Return true if MODE can be used for a set of moves and comparisons,
1476 given an alignment ALIGN. Prepare whatever data is necessary for
1477 later calls to generate. */
1479 bool
1480 compare_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1482 insn_code icode = optab_handler (mov_optab, mode);
1483 if (icode == CODE_FOR_nothing
1484 || align < GET_MODE_ALIGNMENT (mode)
1485 || !can_compare_p (EQ, mode, ccp_jump))
1486 return false;
1487 m_batch = targetm.compare_by_pieces_branch_ratio (mode);
1488 if (m_batch < 0)
1489 return false;
1490 m_accumulator = NULL_RTX;
1491 m_count = 0;
1492 return true;
1495 /* Called after expanding a series of comparisons in MODE. If we have
1496 accumulated results for which we haven't emitted a branch yet, do
1497 so now. */
1499 void
1500 compare_by_pieces_d::finish_mode (machine_mode mode)
1502 if (m_accumulator != NULL_RTX)
1503 do_compare_rtx_and_jump (m_accumulator, const0_rtx, NE, true, mode,
1504 NULL_RTX, NULL, m_fail_label,
1505 profile_probability::uninitialized ());
1508 /* Generate several move instructions to compare LEN bytes from blocks
1509 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1511 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1512 used to push FROM to the stack.
1514 ALIGN is maximum stack alignment we can assume.
1516 Optionally, the caller can pass a constfn and associated data in A1_CFN
1517 and A1_CFN_DATA. describing that the second operand being compared is a
1518 known constant and how to obtain its data. */
1520 static rtx
1521 compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INT len,
1522 rtx target, unsigned int align,
1523 by_pieces_constfn a1_cfn, void *a1_cfn_data)
1525 rtx_code_label *fail_label = gen_label_rtx ();
1526 rtx_code_label *end_label = gen_label_rtx ();
1528 if (target == NULL_RTX
1529 || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
1530 target = gen_reg_rtx (TYPE_MODE (integer_type_node));
1532 compare_by_pieces_d data (arg0, arg1, a1_cfn, a1_cfn_data, len, align,
1533 fail_label);
1535 data.run ();
1537 emit_move_insn (target, const0_rtx);
1538 emit_jump (end_label);
1539 emit_barrier ();
1540 emit_label (fail_label);
1541 emit_move_insn (target, const1_rtx);
1542 emit_label (end_label);
1544 return target;
1547 /* Emit code to move a block Y to a block X. This may be done with
1548 string-move instructions, with multiple scalar move instructions,
1549 or with a library call.
1551 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1552 SIZE is an rtx that says how long they are.
1553 ALIGN is the maximum alignment we can assume they have.
1554 METHOD describes what kind of copy this is, and what mechanisms may be used.
1555 MIN_SIZE is the minimal size of block to move
1556 MAX_SIZE is the maximal size of block to move, if it can not be represented
1557 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1559 Return the address of the new block, if memcpy is called and returns it,
1560 0 otherwise. */
1563 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1564 unsigned int expected_align, HOST_WIDE_INT expected_size,
1565 unsigned HOST_WIDE_INT min_size,
1566 unsigned HOST_WIDE_INT max_size,
1567 unsigned HOST_WIDE_INT probable_max_size)
1569 int may_use_call;
1570 rtx retval = 0;
1571 unsigned int align;
1573 gcc_assert (size);
1574 if (CONST_INT_P (size) && INTVAL (size) == 0)
1575 return 0;
1577 switch (method)
1579 case BLOCK_OP_NORMAL:
1580 case BLOCK_OP_TAILCALL:
1581 may_use_call = 1;
1582 break;
1584 case BLOCK_OP_CALL_PARM:
1585 may_use_call = block_move_libcall_safe_for_call_parm ();
1587 /* Make inhibit_defer_pop nonzero around the library call
1588 to force it to pop the arguments right away. */
1589 NO_DEFER_POP;
1590 break;
1592 case BLOCK_OP_NO_LIBCALL:
1593 may_use_call = 0;
1594 break;
1596 case BLOCK_OP_NO_LIBCALL_RET:
1597 may_use_call = -1;
1598 break;
1600 default:
1601 gcc_unreachable ();
1604 gcc_assert (MEM_P (x) && MEM_P (y));
1605 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1606 gcc_assert (align >= BITS_PER_UNIT);
1608 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1609 block copy is more efficient for other large modes, e.g. DCmode. */
1610 x = adjust_address (x, BLKmode, 0);
1611 y = adjust_address (y, BLKmode, 0);
1613 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1614 can be incorrect is coming from __builtin_memcpy. */
1615 poly_int64 const_size;
1616 if (poly_int_rtx_p (size, &const_size))
1618 x = shallow_copy_rtx (x);
1619 y = shallow_copy_rtx (y);
1620 set_mem_size (x, const_size);
1621 set_mem_size (y, const_size);
1624 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align))
1625 move_by_pieces (x, y, INTVAL (size), align, 0);
1626 else if (emit_block_move_via_movmem (x, y, size, align,
1627 expected_align, expected_size,
1628 min_size, max_size, probable_max_size))
1630 else if (may_use_call
1631 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1632 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1634 if (may_use_call < 0)
1635 return pc_rtx;
1637 /* Since x and y are passed to a libcall, mark the corresponding
1638 tree EXPR as addressable. */
1639 tree y_expr = MEM_EXPR (y);
1640 tree x_expr = MEM_EXPR (x);
1641 if (y_expr)
1642 mark_addressable (y_expr);
1643 if (x_expr)
1644 mark_addressable (x_expr);
1645 retval = emit_block_copy_via_libcall (x, y, size,
1646 method == BLOCK_OP_TAILCALL);
1649 else
1650 emit_block_move_via_loop (x, y, size, align);
1652 if (method == BLOCK_OP_CALL_PARM)
1653 OK_DEFER_POP;
1655 return retval;
1659 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1661 unsigned HOST_WIDE_INT max, min = 0;
1662 if (GET_CODE (size) == CONST_INT)
1663 min = max = UINTVAL (size);
1664 else
1665 max = GET_MODE_MASK (GET_MODE (size));
1666 return emit_block_move_hints (x, y, size, method, 0, -1,
1667 min, max, max);
1670 /* A subroutine of emit_block_move. Returns true if calling the
1671 block move libcall will not clobber any parameters which may have
1672 already been placed on the stack. */
1674 static bool
1675 block_move_libcall_safe_for_call_parm (void)
1677 #if defined (REG_PARM_STACK_SPACE)
1678 tree fn;
1679 #endif
1681 /* If arguments are pushed on the stack, then they're safe. */
1682 if (PUSH_ARGS)
1683 return true;
1685 /* If registers go on the stack anyway, any argument is sure to clobber
1686 an outgoing argument. */
1687 #if defined (REG_PARM_STACK_SPACE)
1688 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1689 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1690 depend on its argument. */
1691 (void) fn;
1692 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1693 && REG_PARM_STACK_SPACE (fn) != 0)
1694 return false;
1695 #endif
1697 /* If any argument goes in memory, then it might clobber an outgoing
1698 argument. */
1700 CUMULATIVE_ARGS args_so_far_v;
1701 cumulative_args_t args_so_far;
1702 tree fn, arg;
1704 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1705 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1706 args_so_far = pack_cumulative_args (&args_so_far_v);
1708 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1709 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1711 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1712 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1713 NULL_TREE, true);
1714 if (!tmp || !REG_P (tmp))
1715 return false;
1716 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1717 return false;
1718 targetm.calls.function_arg_advance (args_so_far, mode,
1719 NULL_TREE, true);
1722 return true;
1725 /* A subroutine of emit_block_move. Expand a movmem pattern;
1726 return true if successful. */
1728 static bool
1729 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1730 unsigned int expected_align, HOST_WIDE_INT expected_size,
1731 unsigned HOST_WIDE_INT min_size,
1732 unsigned HOST_WIDE_INT max_size,
1733 unsigned HOST_WIDE_INT probable_max_size)
1735 int save_volatile_ok = volatile_ok;
1737 if (expected_align < align)
1738 expected_align = align;
1739 if (expected_size != -1)
1741 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1742 expected_size = probable_max_size;
1743 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1744 expected_size = min_size;
1747 /* Since this is a move insn, we don't care about volatility. */
1748 volatile_ok = 1;
1750 /* Try the most limited insn first, because there's no point
1751 including more than one in the machine description unless
1752 the more limited one has some advantage. */
1754 opt_scalar_int_mode mode_iter;
1755 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
1757 scalar_int_mode mode = mode_iter.require ();
1758 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1760 if (code != CODE_FOR_nothing
1761 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1762 here because if SIZE is less than the mode mask, as it is
1763 returned by the macro, it will definitely be less than the
1764 actual mode mask. Since SIZE is within the Pmode address
1765 space, we limit MODE to Pmode. */
1766 && ((CONST_INT_P (size)
1767 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1768 <= (GET_MODE_MASK (mode) >> 1)))
1769 || max_size <= (GET_MODE_MASK (mode) >> 1)
1770 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1772 struct expand_operand ops[9];
1773 unsigned int nops;
1775 /* ??? When called via emit_block_move_for_call, it'd be
1776 nice if there were some way to inform the backend, so
1777 that it doesn't fail the expansion because it thinks
1778 emitting the libcall would be more efficient. */
1779 nops = insn_data[(int) code].n_generator_args;
1780 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1782 create_fixed_operand (&ops[0], x);
1783 create_fixed_operand (&ops[1], y);
1784 /* The check above guarantees that this size conversion is valid. */
1785 create_convert_operand_to (&ops[2], size, mode, true);
1786 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1787 if (nops >= 6)
1789 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1790 create_integer_operand (&ops[5], expected_size);
1792 if (nops >= 8)
1794 create_integer_operand (&ops[6], min_size);
1795 /* If we can not represent the maximal size,
1796 make parameter NULL. */
1797 if ((HOST_WIDE_INT) max_size != -1)
1798 create_integer_operand (&ops[7], max_size);
1799 else
1800 create_fixed_operand (&ops[7], NULL);
1802 if (nops == 9)
1804 /* If we can not represent the maximal size,
1805 make parameter NULL. */
1806 if ((HOST_WIDE_INT) probable_max_size != -1)
1807 create_integer_operand (&ops[8], probable_max_size);
1808 else
1809 create_fixed_operand (&ops[8], NULL);
1811 if (maybe_expand_insn (code, nops, ops))
1813 volatile_ok = save_volatile_ok;
1814 return true;
1819 volatile_ok = save_volatile_ok;
1820 return false;
1823 /* A subroutine of emit_block_move. Copy the data via an explicit
1824 loop. This is used only when libcalls are forbidden. */
1825 /* ??? It'd be nice to copy in hunks larger than QImode. */
1827 static void
1828 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1829 unsigned int align ATTRIBUTE_UNUSED)
1831 rtx_code_label *cmp_label, *top_label;
1832 rtx iter, x_addr, y_addr, tmp;
1833 machine_mode x_addr_mode = get_address_mode (x);
1834 machine_mode y_addr_mode = get_address_mode (y);
1835 machine_mode iter_mode;
1837 iter_mode = GET_MODE (size);
1838 if (iter_mode == VOIDmode)
1839 iter_mode = word_mode;
1841 top_label = gen_label_rtx ();
1842 cmp_label = gen_label_rtx ();
1843 iter = gen_reg_rtx (iter_mode);
1845 emit_move_insn (iter, const0_rtx);
1847 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1848 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1849 do_pending_stack_adjust ();
1851 emit_jump (cmp_label);
1852 emit_label (top_label);
1854 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1855 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1857 if (x_addr_mode != y_addr_mode)
1858 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1859 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1861 x = change_address (x, QImode, x_addr);
1862 y = change_address (y, QImode, y_addr);
1864 emit_move_insn (x, y);
1866 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1867 true, OPTAB_LIB_WIDEN);
1868 if (tmp != iter)
1869 emit_move_insn (iter, tmp);
1871 emit_label (cmp_label);
1873 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1874 true, top_label,
1875 profile_probability::guessed_always ()
1876 .apply_scale (9, 10));
1879 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1880 TAILCALL is true if this is a tail call. */
1883 emit_block_op_via_libcall (enum built_in_function fncode, rtx dst, rtx src,
1884 rtx size, bool tailcall)
1886 rtx dst_addr, src_addr;
1887 tree call_expr, dst_tree, src_tree, size_tree;
1888 machine_mode size_mode;
1890 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1891 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1892 dst_tree = make_tree (ptr_type_node, dst_addr);
1894 src_addr = copy_addr_to_reg (XEXP (src, 0));
1895 src_addr = convert_memory_address (ptr_mode, src_addr);
1896 src_tree = make_tree (ptr_type_node, src_addr);
1898 size_mode = TYPE_MODE (sizetype);
1899 size = convert_to_mode (size_mode, size, 1);
1900 size = copy_to_mode_reg (size_mode, size);
1901 size_tree = make_tree (sizetype, size);
1903 /* It is incorrect to use the libcall calling conventions for calls to
1904 memcpy/memmove/memcmp because they can be provided by the user. */
1905 tree fn = builtin_decl_implicit (fncode);
1906 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1907 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1909 return expand_call (call_expr, NULL_RTX, false);
1912 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1913 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1914 otherwise return null. */
1917 expand_cmpstrn_or_cmpmem (insn_code icode, rtx target, rtx arg1_rtx,
1918 rtx arg2_rtx, tree arg3_type, rtx arg3_rtx,
1919 HOST_WIDE_INT align)
1921 machine_mode insn_mode = insn_data[icode].operand[0].mode;
1923 if (target && (!REG_P (target) || HARD_REGISTER_P (target)))
1924 target = NULL_RTX;
1926 struct expand_operand ops[5];
1927 create_output_operand (&ops[0], target, insn_mode);
1928 create_fixed_operand (&ops[1], arg1_rtx);
1929 create_fixed_operand (&ops[2], arg2_rtx);
1930 create_convert_operand_from (&ops[3], arg3_rtx, TYPE_MODE (arg3_type),
1931 TYPE_UNSIGNED (arg3_type));
1932 create_integer_operand (&ops[4], align);
1933 if (maybe_expand_insn (icode, 5, ops))
1934 return ops[0].value;
1935 return NULL_RTX;
1938 /* Expand a block compare between X and Y with length LEN using the
1939 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1940 of the expression that was used to calculate the length. ALIGN
1941 gives the known minimum common alignment. */
1943 static rtx
1944 emit_block_cmp_via_cmpmem (rtx x, rtx y, rtx len, tree len_type, rtx target,
1945 unsigned align)
1947 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1948 implementing memcmp because it will stop if it encounters two
1949 zero bytes. */
1950 insn_code icode = direct_optab_handler (cmpmem_optab, SImode);
1952 if (icode == CODE_FOR_nothing)
1953 return NULL_RTX;
1955 return expand_cmpstrn_or_cmpmem (icode, target, x, y, len_type, len, align);
1958 /* Emit code to compare a block Y to a block X. This may be done with
1959 string-compare instructions, with multiple scalar instructions,
1960 or with a library call.
1962 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1963 they are. LEN_TYPE is the type of the expression that was used to
1964 calculate it.
1966 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1967 value of a normal memcmp call, instead we can just compare for equality.
1968 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1969 returning NULL_RTX.
1971 Optionally, the caller can pass a constfn and associated data in Y_CFN
1972 and Y_CFN_DATA. describing that the second operand being compared is a
1973 known constant and how to obtain its data.
1974 Return the result of the comparison, or NULL_RTX if we failed to
1975 perform the operation. */
1978 emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target,
1979 bool equality_only, by_pieces_constfn y_cfn,
1980 void *y_cfndata)
1982 rtx result = 0;
1984 if (CONST_INT_P (len) && INTVAL (len) == 0)
1985 return const0_rtx;
1987 gcc_assert (MEM_P (x) && MEM_P (y));
1988 unsigned int align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1989 gcc_assert (align >= BITS_PER_UNIT);
1991 x = adjust_address (x, BLKmode, 0);
1992 y = adjust_address (y, BLKmode, 0);
1994 if (equality_only
1995 && CONST_INT_P (len)
1996 && can_do_by_pieces (INTVAL (len), align, COMPARE_BY_PIECES))
1997 result = compare_by_pieces (x, y, INTVAL (len), target, align,
1998 y_cfn, y_cfndata);
1999 else
2000 result = emit_block_cmp_via_cmpmem (x, y, len, len_type, target, align);
2002 return result;
2005 /* Copy all or part of a value X into registers starting at REGNO.
2006 The number of registers to be filled is NREGS. */
2008 void
2009 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
2011 if (nregs == 0)
2012 return;
2014 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
2015 x = validize_mem (force_const_mem (mode, x));
2017 /* See if the machine can do this with a load multiple insn. */
2018 if (targetm.have_load_multiple ())
2020 rtx_insn *last = get_last_insn ();
2021 rtx first = gen_rtx_REG (word_mode, regno);
2022 if (rtx_insn *pat = targetm.gen_load_multiple (first, x,
2023 GEN_INT (nregs)))
2025 emit_insn (pat);
2026 return;
2028 else
2029 delete_insns_since (last);
2032 for (int i = 0; i < nregs; i++)
2033 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
2034 operand_subword_force (x, i, mode));
2037 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2038 The number of registers to be filled is NREGS. */
2040 void
2041 move_block_from_reg (int regno, rtx x, int nregs)
2043 if (nregs == 0)
2044 return;
2046 /* See if the machine can do this with a store multiple insn. */
2047 if (targetm.have_store_multiple ())
2049 rtx_insn *last = get_last_insn ();
2050 rtx first = gen_rtx_REG (word_mode, regno);
2051 if (rtx_insn *pat = targetm.gen_store_multiple (x, first,
2052 GEN_INT (nregs)))
2054 emit_insn (pat);
2055 return;
2057 else
2058 delete_insns_since (last);
2061 for (int i = 0; i < nregs; i++)
2063 rtx tem = operand_subword (x, i, 1, BLKmode);
2065 gcc_assert (tem);
2067 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
2071 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2072 ORIG, where ORIG is a non-consecutive group of registers represented by
2073 a PARALLEL. The clone is identical to the original except in that the
2074 original set of registers is replaced by a new set of pseudo registers.
2075 The new set has the same modes as the original set. */
2078 gen_group_rtx (rtx orig)
2080 int i, length;
2081 rtx *tmps;
2083 gcc_assert (GET_CODE (orig) == PARALLEL);
2085 length = XVECLEN (orig, 0);
2086 tmps = XALLOCAVEC (rtx, length);
2088 /* Skip a NULL entry in first slot. */
2089 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
2091 if (i)
2092 tmps[0] = 0;
2094 for (; i < length; i++)
2096 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
2097 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
2099 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
2102 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
2105 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2106 except that values are placed in TMPS[i], and must later be moved
2107 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2109 static void
2110 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type,
2111 poly_int64 ssize)
2113 rtx src;
2114 int start, i;
2115 machine_mode m = GET_MODE (orig_src);
2117 gcc_assert (GET_CODE (dst) == PARALLEL);
2119 if (m != VOIDmode
2120 && !SCALAR_INT_MODE_P (m)
2121 && !MEM_P (orig_src)
2122 && GET_CODE (orig_src) != CONCAT)
2124 scalar_int_mode imode;
2125 if (int_mode_for_mode (GET_MODE (orig_src)).exists (&imode))
2127 src = gen_reg_rtx (imode);
2128 emit_move_insn (gen_lowpart (GET_MODE (orig_src), src), orig_src);
2130 else
2132 src = assign_stack_temp (GET_MODE (orig_src), ssize);
2133 emit_move_insn (src, orig_src);
2135 emit_group_load_1 (tmps, dst, src, type, ssize);
2136 return;
2139 /* Check for a NULL entry, used to indicate that the parameter goes
2140 both on the stack and in registers. */
2141 if (XEXP (XVECEXP (dst, 0, 0), 0))
2142 start = 0;
2143 else
2144 start = 1;
2146 /* Process the pieces. */
2147 for (i = start; i < XVECLEN (dst, 0); i++)
2149 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
2150 poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (dst, 0, i), 1));
2151 poly_int64 bytelen = GET_MODE_SIZE (mode);
2152 poly_int64 shift = 0;
2154 /* Handle trailing fragments that run over the size of the struct.
2155 It's the target's responsibility to make sure that the fragment
2156 cannot be strictly smaller in some cases and strictly larger
2157 in others. */
2158 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize));
2159 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2161 /* Arrange to shift the fragment to where it belongs.
2162 extract_bit_field loads to the lsb of the reg. */
2163 if (
2164 #ifdef BLOCK_REG_PADDING
2165 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
2166 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2167 #else
2168 BYTES_BIG_ENDIAN
2169 #endif
2171 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2172 bytelen = ssize - bytepos;
2173 gcc_assert (maybe_gt (bytelen, 0));
2176 /* If we won't be loading directly from memory, protect the real source
2177 from strange tricks we might play; but make sure that the source can
2178 be loaded directly into the destination. */
2179 src = orig_src;
2180 if (!MEM_P (orig_src)
2181 && (!CONSTANT_P (orig_src)
2182 || (GET_MODE (orig_src) != mode
2183 && GET_MODE (orig_src) != VOIDmode)))
2185 if (GET_MODE (orig_src) == VOIDmode)
2186 src = gen_reg_rtx (mode);
2187 else
2188 src = gen_reg_rtx (GET_MODE (orig_src));
2190 emit_move_insn (src, orig_src);
2193 /* Optimize the access just a bit. */
2194 if (MEM_P (src)
2195 && (! targetm.slow_unaligned_access (mode, MEM_ALIGN (src))
2196 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
2197 && multiple_p (bytepos * BITS_PER_UNIT, GET_MODE_ALIGNMENT (mode))
2198 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2200 tmps[i] = gen_reg_rtx (mode);
2201 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
2203 else if (COMPLEX_MODE_P (mode)
2204 && GET_MODE (src) == mode
2205 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2206 /* Let emit_move_complex do the bulk of the work. */
2207 tmps[i] = src;
2208 else if (GET_CODE (src) == CONCAT)
2210 poly_int64 slen = GET_MODE_SIZE (GET_MODE (src));
2211 poly_int64 slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
2212 unsigned int elt;
2213 poly_int64 subpos;
2215 if (can_div_trunc_p (bytepos, slen0, &elt, &subpos)
2216 && known_le (subpos + bytelen, slen0))
2218 /* The following assumes that the concatenated objects all
2219 have the same size. In this case, a simple calculation
2220 can be used to determine the object and the bit field
2221 to be extracted. */
2222 tmps[i] = XEXP (src, elt);
2223 if (maybe_ne (subpos, 0)
2224 || maybe_ne (subpos + bytelen, slen0)
2225 || (!CONSTANT_P (tmps[i])
2226 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)))
2227 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
2228 subpos * BITS_PER_UNIT,
2229 1, NULL_RTX, mode, mode, false,
2230 NULL);
2232 else
2234 rtx mem;
2236 gcc_assert (known_eq (bytepos, 0));
2237 mem = assign_stack_temp (GET_MODE (src), slen);
2238 emit_move_insn (mem, src);
2239 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
2240 0, 1, NULL_RTX, mode, mode, false,
2241 NULL);
2244 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2245 SIMD register, which is currently broken. While we get GCC
2246 to emit proper RTL for these cases, let's dump to memory. */
2247 else if (VECTOR_MODE_P (GET_MODE (dst))
2248 && REG_P (src))
2250 poly_uint64 slen = GET_MODE_SIZE (GET_MODE (src));
2251 rtx mem;
2253 mem = assign_stack_temp (GET_MODE (src), slen);
2254 emit_move_insn (mem, src);
2255 tmps[i] = adjust_address (mem, mode, bytepos);
2257 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
2258 && XVECLEN (dst, 0) > 1)
2259 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
2260 else if (CONSTANT_P (src))
2262 if (known_eq (bytelen, ssize))
2263 tmps[i] = src;
2264 else
2266 rtx first, second;
2268 /* TODO: const_wide_int can have sizes other than this... */
2269 gcc_assert (known_eq (2 * bytelen, ssize));
2270 split_double (src, &first, &second);
2271 if (i)
2272 tmps[i] = second;
2273 else
2274 tmps[i] = first;
2277 else if (REG_P (src) && GET_MODE (src) == mode)
2278 tmps[i] = src;
2279 else
2280 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
2281 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
2282 mode, mode, false, NULL);
2284 if (maybe_ne (shift, 0))
2285 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
2286 shift, tmps[i], 0);
2290 /* Emit code to move a block SRC of type TYPE to a block DST,
2291 where DST is non-consecutive registers represented by a PARALLEL.
2292 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2293 if not known. */
2295 void
2296 emit_group_load (rtx dst, rtx src, tree type, poly_int64 ssize)
2298 rtx *tmps;
2299 int i;
2301 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
2302 emit_group_load_1 (tmps, dst, src, type, ssize);
2304 /* Copy the extracted pieces into the proper (probable) hard regs. */
2305 for (i = 0; i < XVECLEN (dst, 0); i++)
2307 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
2308 if (d == NULL)
2309 continue;
2310 emit_move_insn (d, tmps[i]);
2314 /* Similar, but load SRC into new pseudos in a format that looks like
2315 PARALLEL. This can later be fed to emit_group_move to get things
2316 in the right place. */
2319 emit_group_load_into_temps (rtx parallel, rtx src, tree type, poly_int64 ssize)
2321 rtvec vec;
2322 int i;
2324 vec = rtvec_alloc (XVECLEN (parallel, 0));
2325 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
2327 /* Convert the vector to look just like the original PARALLEL, except
2328 with the computed values. */
2329 for (i = 0; i < XVECLEN (parallel, 0); i++)
2331 rtx e = XVECEXP (parallel, 0, i);
2332 rtx d = XEXP (e, 0);
2334 if (d)
2336 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
2337 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
2339 RTVEC_ELT (vec, i) = e;
2342 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
2345 /* Emit code to move a block SRC to block DST, where SRC and DST are
2346 non-consecutive groups of registers, each represented by a PARALLEL. */
2348 void
2349 emit_group_move (rtx dst, rtx src)
2351 int i;
2353 gcc_assert (GET_CODE (src) == PARALLEL
2354 && GET_CODE (dst) == PARALLEL
2355 && XVECLEN (src, 0) == XVECLEN (dst, 0));
2357 /* Skip first entry if NULL. */
2358 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
2359 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
2360 XEXP (XVECEXP (src, 0, i), 0));
2363 /* Move a group of registers represented by a PARALLEL into pseudos. */
2366 emit_group_move_into_temps (rtx src)
2368 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
2369 int i;
2371 for (i = 0; i < XVECLEN (src, 0); i++)
2373 rtx e = XVECEXP (src, 0, i);
2374 rtx d = XEXP (e, 0);
2376 if (d)
2377 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
2378 RTVEC_ELT (vec, i) = e;
2381 return gen_rtx_PARALLEL (GET_MODE (src), vec);
2384 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2385 where SRC is non-consecutive registers represented by a PARALLEL.
2386 SSIZE represents the total size of block ORIG_DST, or -1 if not
2387 known. */
2389 void
2390 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED,
2391 poly_int64 ssize)
2393 rtx *tmps, dst;
2394 int start, finish, i;
2395 machine_mode m = GET_MODE (orig_dst);
2397 gcc_assert (GET_CODE (src) == PARALLEL);
2399 if (!SCALAR_INT_MODE_P (m)
2400 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
2402 scalar_int_mode imode;
2403 if (int_mode_for_mode (GET_MODE (orig_dst)).exists (&imode))
2405 dst = gen_reg_rtx (imode);
2406 emit_group_store (dst, src, type, ssize);
2407 dst = gen_lowpart (GET_MODE (orig_dst), dst);
2409 else
2411 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
2412 emit_group_store (dst, src, type, ssize);
2414 emit_move_insn (orig_dst, dst);
2415 return;
2418 /* Check for a NULL entry, used to indicate that the parameter goes
2419 both on the stack and in registers. */
2420 if (XEXP (XVECEXP (src, 0, 0), 0))
2421 start = 0;
2422 else
2423 start = 1;
2424 finish = XVECLEN (src, 0);
2426 tmps = XALLOCAVEC (rtx, finish);
2428 /* Copy the (probable) hard regs into pseudos. */
2429 for (i = start; i < finish; i++)
2431 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
2432 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
2434 tmps[i] = gen_reg_rtx (GET_MODE (reg));
2435 emit_move_insn (tmps[i], reg);
2437 else
2438 tmps[i] = reg;
2441 /* If we won't be storing directly into memory, protect the real destination
2442 from strange tricks we might play. */
2443 dst = orig_dst;
2444 if (GET_CODE (dst) == PARALLEL)
2446 rtx temp;
2448 /* We can get a PARALLEL dst if there is a conditional expression in
2449 a return statement. In that case, the dst and src are the same,
2450 so no action is necessary. */
2451 if (rtx_equal_p (dst, src))
2452 return;
2454 /* It is unclear if we can ever reach here, but we may as well handle
2455 it. Allocate a temporary, and split this into a store/load to/from
2456 the temporary. */
2457 temp = assign_stack_temp (GET_MODE (dst), ssize);
2458 emit_group_store (temp, src, type, ssize);
2459 emit_group_load (dst, temp, type, ssize);
2460 return;
2462 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
2464 machine_mode outer = GET_MODE (dst);
2465 machine_mode inner;
2466 poly_int64 bytepos;
2467 bool done = false;
2468 rtx temp;
2470 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
2471 dst = gen_reg_rtx (outer);
2473 /* Make life a bit easier for combine. */
2474 /* If the first element of the vector is the low part
2475 of the destination mode, use a paradoxical subreg to
2476 initialize the destination. */
2477 if (start < finish)
2479 inner = GET_MODE (tmps[start]);
2480 bytepos = subreg_lowpart_offset (inner, outer);
2481 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, start), 1)),
2482 bytepos))
2484 temp = simplify_gen_subreg (outer, tmps[start],
2485 inner, 0);
2486 if (temp)
2488 emit_move_insn (dst, temp);
2489 done = true;
2490 start++;
2495 /* If the first element wasn't the low part, try the last. */
2496 if (!done
2497 && start < finish - 1)
2499 inner = GET_MODE (tmps[finish - 1]);
2500 bytepos = subreg_lowpart_offset (inner, outer);
2501 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0,
2502 finish - 1), 1)),
2503 bytepos))
2505 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2506 inner, 0);
2507 if (temp)
2509 emit_move_insn (dst, temp);
2510 done = true;
2511 finish--;
2516 /* Otherwise, simply initialize the result to zero. */
2517 if (!done)
2518 emit_move_insn (dst, CONST0_RTX (outer));
2521 /* Process the pieces. */
2522 for (i = start; i < finish; i++)
2524 poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, i), 1));
2525 machine_mode mode = GET_MODE (tmps[i]);
2526 poly_int64 bytelen = GET_MODE_SIZE (mode);
2527 poly_uint64 adj_bytelen;
2528 rtx dest = dst;
2530 /* Handle trailing fragments that run over the size of the struct.
2531 It's the target's responsibility to make sure that the fragment
2532 cannot be strictly smaller in some cases and strictly larger
2533 in others. */
2534 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize));
2535 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2536 adj_bytelen = ssize - bytepos;
2537 else
2538 adj_bytelen = bytelen;
2540 if (GET_CODE (dst) == CONCAT)
2542 if (known_le (bytepos + adj_bytelen,
2543 GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))))
2544 dest = XEXP (dst, 0);
2545 else if (known_ge (bytepos, GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))))
2547 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2548 dest = XEXP (dst, 1);
2550 else
2552 machine_mode dest_mode = GET_MODE (dest);
2553 machine_mode tmp_mode = GET_MODE (tmps[i]);
2555 gcc_assert (known_eq (bytepos, 0) && XVECLEN (src, 0));
2557 if (GET_MODE_ALIGNMENT (dest_mode)
2558 >= GET_MODE_ALIGNMENT (tmp_mode))
2560 dest = assign_stack_temp (dest_mode,
2561 GET_MODE_SIZE (dest_mode));
2562 emit_move_insn (adjust_address (dest,
2563 tmp_mode,
2564 bytepos),
2565 tmps[i]);
2566 dst = dest;
2568 else
2570 dest = assign_stack_temp (tmp_mode,
2571 GET_MODE_SIZE (tmp_mode));
2572 emit_move_insn (dest, tmps[i]);
2573 dst = adjust_address (dest, dest_mode, bytepos);
2575 break;
2579 /* Handle trailing fragments that run over the size of the struct. */
2580 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2582 /* store_bit_field always takes its value from the lsb.
2583 Move the fragment to the lsb if it's not already there. */
2584 if (
2585 #ifdef BLOCK_REG_PADDING
2586 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2587 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2588 #else
2589 BYTES_BIG_ENDIAN
2590 #endif
2593 poly_int64 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2594 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2595 shift, tmps[i], 0);
2598 /* Make sure not to write past the end of the struct. */
2599 store_bit_field (dest,
2600 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2601 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2602 VOIDmode, tmps[i], false);
2605 /* Optimize the access just a bit. */
2606 else if (MEM_P (dest)
2607 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (dest))
2608 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2609 && multiple_p (bytepos * BITS_PER_UNIT,
2610 GET_MODE_ALIGNMENT (mode))
2611 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2612 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2614 else
2615 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2616 0, 0, mode, tmps[i], false);
2619 /* Copy from the pseudo into the (probable) hard reg. */
2620 if (orig_dst != dst)
2621 emit_move_insn (orig_dst, dst);
2624 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2625 of the value stored in X. */
2628 maybe_emit_group_store (rtx x, tree type)
2630 machine_mode mode = TYPE_MODE (type);
2631 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2632 if (GET_CODE (x) == PARALLEL)
2634 rtx result = gen_reg_rtx (mode);
2635 emit_group_store (result, x, type, int_size_in_bytes (type));
2636 return result;
2638 return x;
2641 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2643 This is used on targets that return BLKmode values in registers. */
2645 static void
2646 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2648 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2649 rtx src = NULL, dst = NULL;
2650 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2651 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2652 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2653 fixed_size_mode mode = as_a <fixed_size_mode> (GET_MODE (srcreg));
2654 fixed_size_mode tmode = as_a <fixed_size_mode> (GET_MODE (target));
2655 fixed_size_mode copy_mode;
2657 /* BLKmode registers created in the back-end shouldn't have survived. */
2658 gcc_assert (mode != BLKmode);
2660 /* If the structure doesn't take up a whole number of words, see whether
2661 SRCREG is padded on the left or on the right. If it's on the left,
2662 set PADDING_CORRECTION to the number of bits to skip.
2664 In most ABIs, the structure will be returned at the least end of
2665 the register, which translates to right padding on little-endian
2666 targets and left padding on big-endian targets. The opposite
2667 holds if the structure is returned at the most significant
2668 end of the register. */
2669 if (bytes % UNITS_PER_WORD != 0
2670 && (targetm.calls.return_in_msb (type)
2671 ? !BYTES_BIG_ENDIAN
2672 : BYTES_BIG_ENDIAN))
2673 padding_correction
2674 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2676 /* We can use a single move if we have an exact mode for the size. */
2677 else if (MEM_P (target)
2678 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (target))
2679 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2680 && bytes == GET_MODE_SIZE (mode))
2682 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2683 return;
2686 /* And if we additionally have the same mode for a register. */
2687 else if (REG_P (target)
2688 && GET_MODE (target) == mode
2689 && bytes == GET_MODE_SIZE (mode))
2691 emit_move_insn (target, srcreg);
2692 return;
2695 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2696 into a new pseudo which is a full word. */
2697 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2699 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2700 mode = word_mode;
2703 /* Copy the structure BITSIZE bits at a time. If the target lives in
2704 memory, take care of not reading/writing past its end by selecting
2705 a copy mode suited to BITSIZE. This should always be possible given
2706 how it is computed.
2708 If the target lives in register, make sure not to select a copy mode
2709 larger than the mode of the register.
2711 We could probably emit more efficient code for machines which do not use
2712 strict alignment, but it doesn't seem worth the effort at the current
2713 time. */
2715 copy_mode = word_mode;
2716 if (MEM_P (target))
2718 opt_scalar_int_mode mem_mode = int_mode_for_size (bitsize, 1);
2719 if (mem_mode.exists ())
2720 copy_mode = mem_mode.require ();
2722 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2723 copy_mode = tmode;
2725 for (bitpos = 0, xbitpos = padding_correction;
2726 bitpos < bytes * BITS_PER_UNIT;
2727 bitpos += bitsize, xbitpos += bitsize)
2729 /* We need a new source operand each time xbitpos is on a
2730 word boundary and when xbitpos == padding_correction
2731 (the first time through). */
2732 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2733 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2735 /* We need a new destination operand each time bitpos is on
2736 a word boundary. */
2737 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2738 dst = target;
2739 else if (bitpos % BITS_PER_WORD == 0)
2740 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2742 /* Use xbitpos for the source extraction (right justified) and
2743 bitpos for the destination store (left justified). */
2744 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2745 extract_bit_field (src, bitsize,
2746 xbitpos % BITS_PER_WORD, 1,
2747 NULL_RTX, copy_mode, copy_mode,
2748 false, NULL),
2749 false);
2753 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2754 register if it contains any data, otherwise return null.
2756 This is used on targets that return BLKmode values in registers. */
2759 copy_blkmode_to_reg (machine_mode mode_in, tree src)
2761 int i, n_regs;
2762 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2763 unsigned int bitsize;
2764 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2765 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2766 fixed_size_mode mode = as_a <fixed_size_mode> (mode_in);
2767 fixed_size_mode dst_mode;
2769 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2771 x = expand_normal (src);
2773 bytes = arg_int_size_in_bytes (TREE_TYPE (src));
2774 if (bytes == 0)
2775 return NULL_RTX;
2777 /* If the structure doesn't take up a whole number of words, see
2778 whether the register value should be padded on the left or on
2779 the right. Set PADDING_CORRECTION to the number of padding
2780 bits needed on the left side.
2782 In most ABIs, the structure will be returned at the least end of
2783 the register, which translates to right padding on little-endian
2784 targets and left padding on big-endian targets. The opposite
2785 holds if the structure is returned at the most significant
2786 end of the register. */
2787 if (bytes % UNITS_PER_WORD != 0
2788 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2789 ? !BYTES_BIG_ENDIAN
2790 : BYTES_BIG_ENDIAN))
2791 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2792 * BITS_PER_UNIT));
2794 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2795 dst_words = XALLOCAVEC (rtx, n_regs);
2796 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2798 /* Copy the structure BITSIZE bits at a time. */
2799 for (bitpos = 0, xbitpos = padding_correction;
2800 bitpos < bytes * BITS_PER_UNIT;
2801 bitpos += bitsize, xbitpos += bitsize)
2803 /* We need a new destination pseudo each time xbitpos is
2804 on a word boundary and when xbitpos == padding_correction
2805 (the first time through). */
2806 if (xbitpos % BITS_PER_WORD == 0
2807 || xbitpos == padding_correction)
2809 /* Generate an appropriate register. */
2810 dst_word = gen_reg_rtx (word_mode);
2811 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2813 /* Clear the destination before we move anything into it. */
2814 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2817 /* We need a new source operand each time bitpos is on a word
2818 boundary. */
2819 if (bitpos % BITS_PER_WORD == 0)
2820 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2822 /* Use bitpos for the source extraction (left justified) and
2823 xbitpos for the destination store (right justified). */
2824 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2825 0, 0, word_mode,
2826 extract_bit_field (src_word, bitsize,
2827 bitpos % BITS_PER_WORD, 1,
2828 NULL_RTX, word_mode, word_mode,
2829 false, NULL),
2830 false);
2833 if (mode == BLKmode)
2835 /* Find the smallest integer mode large enough to hold the
2836 entire structure. */
2837 opt_scalar_int_mode mode_iter;
2838 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
2839 if (GET_MODE_SIZE (mode_iter.require ()) >= bytes)
2840 break;
2842 /* A suitable mode should have been found. */
2843 mode = mode_iter.require ();
2846 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2847 dst_mode = word_mode;
2848 else
2849 dst_mode = mode;
2850 dst = gen_reg_rtx (dst_mode);
2852 for (i = 0; i < n_regs; i++)
2853 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2855 if (mode != dst_mode)
2856 dst = gen_lowpart (mode, dst);
2858 return dst;
2861 /* Add a USE expression for REG to the (possibly empty) list pointed
2862 to by CALL_FUSAGE. REG must denote a hard register. */
2864 void
2865 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2867 gcc_assert (REG_P (reg));
2869 if (!HARD_REGISTER_P (reg))
2870 return;
2872 *call_fusage
2873 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2876 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2877 to by CALL_FUSAGE. REG must denote a hard register. */
2879 void
2880 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2882 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2884 *call_fusage
2885 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2888 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2889 starting at REGNO. All of these registers must be hard registers. */
2891 void
2892 use_regs (rtx *call_fusage, int regno, int nregs)
2894 int i;
2896 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2898 for (i = 0; i < nregs; i++)
2899 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2902 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2903 PARALLEL REGS. This is for calls that pass values in multiple
2904 non-contiguous locations. The Irix 6 ABI has examples of this. */
2906 void
2907 use_group_regs (rtx *call_fusage, rtx regs)
2909 int i;
2911 for (i = 0; i < XVECLEN (regs, 0); i++)
2913 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2915 /* A NULL entry means the parameter goes both on the stack and in
2916 registers. This can also be a MEM for targets that pass values
2917 partially on the stack and partially in registers. */
2918 if (reg != 0 && REG_P (reg))
2919 use_reg (call_fusage, reg);
2923 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2924 assigment and the code of the expresion on the RHS is CODE. Return
2925 NULL otherwise. */
2927 static gimple *
2928 get_def_for_expr (tree name, enum tree_code code)
2930 gimple *def_stmt;
2932 if (TREE_CODE (name) != SSA_NAME)
2933 return NULL;
2935 def_stmt = get_gimple_for_ssa_name (name);
2936 if (!def_stmt
2937 || gimple_assign_rhs_code (def_stmt) != code)
2938 return NULL;
2940 return def_stmt;
2943 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2944 assigment and the class of the expresion on the RHS is CLASS. Return
2945 NULL otherwise. */
2947 static gimple *
2948 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2950 gimple *def_stmt;
2952 if (TREE_CODE (name) != SSA_NAME)
2953 return NULL;
2955 def_stmt = get_gimple_for_ssa_name (name);
2956 if (!def_stmt
2957 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2958 return NULL;
2960 return def_stmt;
2963 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2964 its length in bytes. */
2967 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2968 unsigned int expected_align, HOST_WIDE_INT expected_size,
2969 unsigned HOST_WIDE_INT min_size,
2970 unsigned HOST_WIDE_INT max_size,
2971 unsigned HOST_WIDE_INT probable_max_size)
2973 machine_mode mode = GET_MODE (object);
2974 unsigned int align;
2976 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2978 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2979 just move a zero. Otherwise, do this a piece at a time. */
2980 poly_int64 size_val;
2981 if (mode != BLKmode
2982 && poly_int_rtx_p (size, &size_val)
2983 && known_eq (size_val, GET_MODE_SIZE (mode)))
2985 rtx zero = CONST0_RTX (mode);
2986 if (zero != NULL)
2988 emit_move_insn (object, zero);
2989 return NULL;
2992 if (COMPLEX_MODE_P (mode))
2994 zero = CONST0_RTX (GET_MODE_INNER (mode));
2995 if (zero != NULL)
2997 write_complex_part (object, zero, 0);
2998 write_complex_part (object, zero, 1);
2999 return NULL;
3004 if (size == const0_rtx)
3005 return NULL;
3007 align = MEM_ALIGN (object);
3009 if (CONST_INT_P (size)
3010 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
3011 CLEAR_BY_PIECES,
3012 optimize_insn_for_speed_p ()))
3013 clear_by_pieces (object, INTVAL (size), align);
3014 else if (set_storage_via_setmem (object, size, const0_rtx, align,
3015 expected_align, expected_size,
3016 min_size, max_size, probable_max_size))
3018 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
3019 return set_storage_via_libcall (object, size, const0_rtx,
3020 method == BLOCK_OP_TAILCALL);
3021 else
3022 gcc_unreachable ();
3024 return NULL;
3028 clear_storage (rtx object, rtx size, enum block_op_methods method)
3030 unsigned HOST_WIDE_INT max, min = 0;
3031 if (GET_CODE (size) == CONST_INT)
3032 min = max = UINTVAL (size);
3033 else
3034 max = GET_MODE_MASK (GET_MODE (size));
3035 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
3039 /* A subroutine of clear_storage. Expand a call to memset.
3040 Return the return value of memset, 0 otherwise. */
3043 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
3045 tree call_expr, fn, object_tree, size_tree, val_tree;
3046 machine_mode size_mode;
3048 object = copy_addr_to_reg (XEXP (object, 0));
3049 object_tree = make_tree (ptr_type_node, object);
3051 if (!CONST_INT_P (val))
3052 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
3053 val_tree = make_tree (integer_type_node, val);
3055 size_mode = TYPE_MODE (sizetype);
3056 size = convert_to_mode (size_mode, size, 1);
3057 size = copy_to_mode_reg (size_mode, size);
3058 size_tree = make_tree (sizetype, size);
3060 /* It is incorrect to use the libcall calling conventions for calls to
3061 memset because it can be provided by the user. */
3062 fn = builtin_decl_implicit (BUILT_IN_MEMSET);
3063 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
3064 CALL_EXPR_TAILCALL (call_expr) = tailcall;
3066 return expand_call (call_expr, NULL_RTX, false);
3069 /* Expand a setmem pattern; return true if successful. */
3071 bool
3072 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
3073 unsigned int expected_align, HOST_WIDE_INT expected_size,
3074 unsigned HOST_WIDE_INT min_size,
3075 unsigned HOST_WIDE_INT max_size,
3076 unsigned HOST_WIDE_INT probable_max_size)
3078 /* Try the most limited insn first, because there's no point
3079 including more than one in the machine description unless
3080 the more limited one has some advantage. */
3082 if (expected_align < align)
3083 expected_align = align;
3084 if (expected_size != -1)
3086 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
3087 expected_size = max_size;
3088 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
3089 expected_size = min_size;
3092 opt_scalar_int_mode mode_iter;
3093 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
3095 scalar_int_mode mode = mode_iter.require ();
3096 enum insn_code code = direct_optab_handler (setmem_optab, mode);
3098 if (code != CODE_FOR_nothing
3099 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3100 here because if SIZE is less than the mode mask, as it is
3101 returned by the macro, it will definitely be less than the
3102 actual mode mask. Since SIZE is within the Pmode address
3103 space, we limit MODE to Pmode. */
3104 && ((CONST_INT_P (size)
3105 && ((unsigned HOST_WIDE_INT) INTVAL (size)
3106 <= (GET_MODE_MASK (mode) >> 1)))
3107 || max_size <= (GET_MODE_MASK (mode) >> 1)
3108 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
3110 struct expand_operand ops[9];
3111 unsigned int nops;
3113 nops = insn_data[(int) code].n_generator_args;
3114 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
3116 create_fixed_operand (&ops[0], object);
3117 /* The check above guarantees that this size conversion is valid. */
3118 create_convert_operand_to (&ops[1], size, mode, true);
3119 create_convert_operand_from (&ops[2], val, byte_mode, true);
3120 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
3121 if (nops >= 6)
3123 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
3124 create_integer_operand (&ops[5], expected_size);
3126 if (nops >= 8)
3128 create_integer_operand (&ops[6], min_size);
3129 /* If we can not represent the maximal size,
3130 make parameter NULL. */
3131 if ((HOST_WIDE_INT) max_size != -1)
3132 create_integer_operand (&ops[7], max_size);
3133 else
3134 create_fixed_operand (&ops[7], NULL);
3136 if (nops == 9)
3138 /* If we can not represent the maximal size,
3139 make parameter NULL. */
3140 if ((HOST_WIDE_INT) probable_max_size != -1)
3141 create_integer_operand (&ops[8], probable_max_size);
3142 else
3143 create_fixed_operand (&ops[8], NULL);
3145 if (maybe_expand_insn (code, nops, ops))
3146 return true;
3150 return false;
3154 /* Write to one of the components of the complex value CPLX. Write VAL to
3155 the real part if IMAG_P is false, and the imaginary part if its true. */
3157 void
3158 write_complex_part (rtx cplx, rtx val, bool imag_p)
3160 machine_mode cmode;
3161 scalar_mode imode;
3162 unsigned ibitsize;
3164 if (GET_CODE (cplx) == CONCAT)
3166 emit_move_insn (XEXP (cplx, imag_p), val);
3167 return;
3170 cmode = GET_MODE (cplx);
3171 imode = GET_MODE_INNER (cmode);
3172 ibitsize = GET_MODE_BITSIZE (imode);
3174 /* For MEMs simplify_gen_subreg may generate an invalid new address
3175 because, e.g., the original address is considered mode-dependent
3176 by the target, which restricts simplify_subreg from invoking
3177 adjust_address_nv. Instead of preparing fallback support for an
3178 invalid address, we call adjust_address_nv directly. */
3179 if (MEM_P (cplx))
3181 emit_move_insn (adjust_address_nv (cplx, imode,
3182 imag_p ? GET_MODE_SIZE (imode) : 0),
3183 val);
3184 return;
3187 /* If the sub-object is at least word sized, then we know that subregging
3188 will work. This special case is important, since store_bit_field
3189 wants to operate on integer modes, and there's rarely an OImode to
3190 correspond to TCmode. */
3191 if (ibitsize >= BITS_PER_WORD
3192 /* For hard regs we have exact predicates. Assume we can split
3193 the original object if it spans an even number of hard regs.
3194 This special case is important for SCmode on 64-bit platforms
3195 where the natural size of floating-point regs is 32-bit. */
3196 || (REG_P (cplx)
3197 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3198 && REG_NREGS (cplx) % 2 == 0))
3200 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3201 imag_p ? GET_MODE_SIZE (imode) : 0);
3202 if (part)
3204 emit_move_insn (part, val);
3205 return;
3207 else
3208 /* simplify_gen_subreg may fail for sub-word MEMs. */
3209 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3212 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val,
3213 false);
3216 /* Extract one of the components of the complex value CPLX. Extract the
3217 real part if IMAG_P is false, and the imaginary part if it's true. */
3220 read_complex_part (rtx cplx, bool imag_p)
3222 machine_mode cmode;
3223 scalar_mode imode;
3224 unsigned ibitsize;
3226 if (GET_CODE (cplx) == CONCAT)
3227 return XEXP (cplx, imag_p);
3229 cmode = GET_MODE (cplx);
3230 imode = GET_MODE_INNER (cmode);
3231 ibitsize = GET_MODE_BITSIZE (imode);
3233 /* Special case reads from complex constants that got spilled to memory. */
3234 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3236 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3237 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3239 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3240 if (CONSTANT_CLASS_P (part))
3241 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3245 /* For MEMs simplify_gen_subreg may generate an invalid new address
3246 because, e.g., the original address is considered mode-dependent
3247 by the target, which restricts simplify_subreg from invoking
3248 adjust_address_nv. Instead of preparing fallback support for an
3249 invalid address, we call adjust_address_nv directly. */
3250 if (MEM_P (cplx))
3251 return adjust_address_nv (cplx, imode,
3252 imag_p ? GET_MODE_SIZE (imode) : 0);
3254 /* If the sub-object is at least word sized, then we know that subregging
3255 will work. This special case is important, since extract_bit_field
3256 wants to operate on integer modes, and there's rarely an OImode to
3257 correspond to TCmode. */
3258 if (ibitsize >= BITS_PER_WORD
3259 /* For hard regs we have exact predicates. Assume we can split
3260 the original object if it spans an even number of hard regs.
3261 This special case is important for SCmode on 64-bit platforms
3262 where the natural size of floating-point regs is 32-bit. */
3263 || (REG_P (cplx)
3264 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3265 && REG_NREGS (cplx) % 2 == 0))
3267 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3268 imag_p ? GET_MODE_SIZE (imode) : 0);
3269 if (ret)
3270 return ret;
3271 else
3272 /* simplify_gen_subreg may fail for sub-word MEMs. */
3273 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3276 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3277 true, NULL_RTX, imode, imode, false, NULL);
3280 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3281 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3282 represented in NEW_MODE. If FORCE is true, this will never happen, as
3283 we'll force-create a SUBREG if needed. */
3285 static rtx
3286 emit_move_change_mode (machine_mode new_mode,
3287 machine_mode old_mode, rtx x, bool force)
3289 rtx ret;
3291 if (push_operand (x, GET_MODE (x)))
3293 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3294 MEM_COPY_ATTRIBUTES (ret, x);
3296 else if (MEM_P (x))
3298 /* We don't have to worry about changing the address since the
3299 size in bytes is supposed to be the same. */
3300 if (reload_in_progress)
3302 /* Copy the MEM to change the mode and move any
3303 substitutions from the old MEM to the new one. */
3304 ret = adjust_address_nv (x, new_mode, 0);
3305 copy_replacements (x, ret);
3307 else
3308 ret = adjust_address (x, new_mode, 0);
3310 else
3312 /* Note that we do want simplify_subreg's behavior of validating
3313 that the new mode is ok for a hard register. If we were to use
3314 simplify_gen_subreg, we would create the subreg, but would
3315 probably run into the target not being able to implement it. */
3316 /* Except, of course, when FORCE is true, when this is exactly what
3317 we want. Which is needed for CCmodes on some targets. */
3318 if (force)
3319 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3320 else
3321 ret = simplify_subreg (new_mode, x, old_mode, 0);
3324 return ret;
3327 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3328 an integer mode of the same size as MODE. Returns the instruction
3329 emitted, or NULL if such a move could not be generated. */
3331 static rtx_insn *
3332 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3334 scalar_int_mode imode;
3335 enum insn_code code;
3337 /* There must exist a mode of the exact size we require. */
3338 if (!int_mode_for_mode (mode).exists (&imode))
3339 return NULL;
3341 /* The target must support moves in this mode. */
3342 code = optab_handler (mov_optab, imode);
3343 if (code == CODE_FOR_nothing)
3344 return NULL;
3346 x = emit_move_change_mode (imode, mode, x, force);
3347 if (x == NULL_RTX)
3348 return NULL;
3349 y = emit_move_change_mode (imode, mode, y, force);
3350 if (y == NULL_RTX)
3351 return NULL;
3352 return emit_insn (GEN_FCN (code) (x, y));
3355 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3356 Return an equivalent MEM that does not use an auto-increment. */
3359 emit_move_resolve_push (machine_mode mode, rtx x)
3361 enum rtx_code code = GET_CODE (XEXP (x, 0));
3362 rtx temp;
3364 poly_int64 adjust = GET_MODE_SIZE (mode);
3365 #ifdef PUSH_ROUNDING
3366 adjust = PUSH_ROUNDING (adjust);
3367 #endif
3368 if (code == PRE_DEC || code == POST_DEC)
3369 adjust = -adjust;
3370 else if (code == PRE_MODIFY || code == POST_MODIFY)
3372 rtx expr = XEXP (XEXP (x, 0), 1);
3374 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3375 poly_int64 val = rtx_to_poly_int64 (XEXP (expr, 1));
3376 if (GET_CODE (expr) == MINUS)
3377 val = -val;
3378 gcc_assert (known_eq (adjust, val) || known_eq (adjust, -val));
3379 adjust = val;
3382 /* Do not use anti_adjust_stack, since we don't want to update
3383 stack_pointer_delta. */
3384 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3385 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3386 0, OPTAB_LIB_WIDEN);
3387 if (temp != stack_pointer_rtx)
3388 emit_move_insn (stack_pointer_rtx, temp);
3390 switch (code)
3392 case PRE_INC:
3393 case PRE_DEC:
3394 case PRE_MODIFY:
3395 temp = stack_pointer_rtx;
3396 break;
3397 case POST_INC:
3398 case POST_DEC:
3399 case POST_MODIFY:
3400 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3401 break;
3402 default:
3403 gcc_unreachable ();
3406 return replace_equiv_address (x, temp);
3409 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3410 X is known to satisfy push_operand, and MODE is known to be complex.
3411 Returns the last instruction emitted. */
3413 rtx_insn *
3414 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3416 scalar_mode submode = GET_MODE_INNER (mode);
3417 bool imag_first;
3419 #ifdef PUSH_ROUNDING
3420 poly_int64 submodesize = GET_MODE_SIZE (submode);
3422 /* In case we output to the stack, but the size is smaller than the
3423 machine can push exactly, we need to use move instructions. */
3424 if (maybe_ne (PUSH_ROUNDING (submodesize), submodesize))
3426 x = emit_move_resolve_push (mode, x);
3427 return emit_move_insn (x, y);
3429 #endif
3431 /* Note that the real part always precedes the imag part in memory
3432 regardless of machine's endianness. */
3433 switch (GET_CODE (XEXP (x, 0)))
3435 case PRE_DEC:
3436 case POST_DEC:
3437 imag_first = true;
3438 break;
3439 case PRE_INC:
3440 case POST_INC:
3441 imag_first = false;
3442 break;
3443 default:
3444 gcc_unreachable ();
3447 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3448 read_complex_part (y, imag_first));
3449 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3450 read_complex_part (y, !imag_first));
3453 /* A subroutine of emit_move_complex. Perform the move from Y to X
3454 via two moves of the parts. Returns the last instruction emitted. */
3456 rtx_insn *
3457 emit_move_complex_parts (rtx x, rtx y)
3459 /* Show the output dies here. This is necessary for SUBREGs
3460 of pseudos since we cannot track their lifetimes correctly;
3461 hard regs shouldn't appear here except as return values. */
3462 if (!reload_completed && !reload_in_progress
3463 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3464 emit_clobber (x);
3466 write_complex_part (x, read_complex_part (y, false), false);
3467 write_complex_part (x, read_complex_part (y, true), true);
3469 return get_last_insn ();
3472 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3473 MODE is known to be complex. Returns the last instruction emitted. */
3475 static rtx_insn *
3476 emit_move_complex (machine_mode mode, rtx x, rtx y)
3478 bool try_int;
3480 /* Need to take special care for pushes, to maintain proper ordering
3481 of the data, and possibly extra padding. */
3482 if (push_operand (x, mode))
3483 return emit_move_complex_push (mode, x, y);
3485 /* See if we can coerce the target into moving both values at once, except
3486 for floating point where we favor moving as parts if this is easy. */
3487 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3488 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3489 && !(REG_P (x)
3490 && HARD_REGISTER_P (x)
3491 && REG_NREGS (x) == 1)
3492 && !(REG_P (y)
3493 && HARD_REGISTER_P (y)
3494 && REG_NREGS (y) == 1))
3495 try_int = false;
3496 /* Not possible if the values are inherently not adjacent. */
3497 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3498 try_int = false;
3499 /* Is possible if both are registers (or subregs of registers). */
3500 else if (register_operand (x, mode) && register_operand (y, mode))
3501 try_int = true;
3502 /* If one of the operands is a memory, and alignment constraints
3503 are friendly enough, we may be able to do combined memory operations.
3504 We do not attempt this if Y is a constant because that combination is
3505 usually better with the by-parts thing below. */
3506 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3507 && (!STRICT_ALIGNMENT
3508 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3509 try_int = true;
3510 else
3511 try_int = false;
3513 if (try_int)
3515 rtx_insn *ret;
3517 /* For memory to memory moves, optimal behavior can be had with the
3518 existing block move logic. */
3519 if (MEM_P (x) && MEM_P (y))
3521 emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode),
3522 BLOCK_OP_NO_LIBCALL);
3523 return get_last_insn ();
3526 ret = emit_move_via_integer (mode, x, y, true);
3527 if (ret)
3528 return ret;
3531 return emit_move_complex_parts (x, y);
3534 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3535 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3537 static rtx_insn *
3538 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3540 rtx_insn *ret;
3542 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3543 if (mode != CCmode)
3545 enum insn_code code = optab_handler (mov_optab, CCmode);
3546 if (code != CODE_FOR_nothing)
3548 x = emit_move_change_mode (CCmode, mode, x, true);
3549 y = emit_move_change_mode (CCmode, mode, y, true);
3550 return emit_insn (GEN_FCN (code) (x, y));
3554 /* Otherwise, find the MODE_INT mode of the same width. */
3555 ret = emit_move_via_integer (mode, x, y, false);
3556 gcc_assert (ret != NULL);
3557 return ret;
3560 /* Return true if word I of OP lies entirely in the
3561 undefined bits of a paradoxical subreg. */
3563 static bool
3564 undefined_operand_subword_p (const_rtx op, int i)
3566 if (GET_CODE (op) != SUBREG)
3567 return false;
3568 machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
3569 poly_int64 offset = i * UNITS_PER_WORD + subreg_memory_offset (op);
3570 return (known_ge (offset, GET_MODE_SIZE (innermostmode))
3571 || known_le (offset, -UNITS_PER_WORD));
3574 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3575 MODE is any multi-word or full-word mode that lacks a move_insn
3576 pattern. Note that you will get better code if you define such
3577 patterns, even if they must turn into multiple assembler instructions. */
3579 static rtx_insn *
3580 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3582 rtx_insn *last_insn = 0;
3583 rtx_insn *seq;
3584 rtx inner;
3585 bool need_clobber;
3586 int i, mode_size;
3588 /* This function can only handle cases where the number of words is
3589 known at compile time. */
3590 mode_size = GET_MODE_SIZE (mode).to_constant ();
3591 gcc_assert (mode_size >= UNITS_PER_WORD);
3593 /* If X is a push on the stack, do the push now and replace
3594 X with a reference to the stack pointer. */
3595 if (push_operand (x, mode))
3596 x = emit_move_resolve_push (mode, x);
3598 /* If we are in reload, see if either operand is a MEM whose address
3599 is scheduled for replacement. */
3600 if (reload_in_progress && MEM_P (x)
3601 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3602 x = replace_equiv_address_nv (x, inner);
3603 if (reload_in_progress && MEM_P (y)
3604 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3605 y = replace_equiv_address_nv (y, inner);
3607 start_sequence ();
3609 need_clobber = false;
3610 for (i = 0; i < CEIL (mode_size, UNITS_PER_WORD); i++)
3612 rtx xpart = operand_subword (x, i, 1, mode);
3613 rtx ypart;
3615 /* Do not generate code for a move if it would come entirely
3616 from the undefined bits of a paradoxical subreg. */
3617 if (undefined_operand_subword_p (y, i))
3618 continue;
3620 ypart = operand_subword (y, i, 1, mode);
3622 /* If we can't get a part of Y, put Y into memory if it is a
3623 constant. Otherwise, force it into a register. Then we must
3624 be able to get a part of Y. */
3625 if (ypart == 0 && CONSTANT_P (y))
3627 y = use_anchored_address (force_const_mem (mode, y));
3628 ypart = operand_subword (y, i, 1, mode);
3630 else if (ypart == 0)
3631 ypart = operand_subword_force (y, i, mode);
3633 gcc_assert (xpart && ypart);
3635 need_clobber |= (GET_CODE (xpart) == SUBREG);
3637 last_insn = emit_move_insn (xpart, ypart);
3640 seq = get_insns ();
3641 end_sequence ();
3643 /* Show the output dies here. This is necessary for SUBREGs
3644 of pseudos since we cannot track their lifetimes correctly;
3645 hard regs shouldn't appear here except as return values.
3646 We never want to emit such a clobber after reload. */
3647 if (x != y
3648 && ! (reload_in_progress || reload_completed)
3649 && need_clobber != 0)
3650 emit_clobber (x);
3652 emit_insn (seq);
3654 return last_insn;
3657 /* Low level part of emit_move_insn.
3658 Called just like emit_move_insn, but assumes X and Y
3659 are basically valid. */
3661 rtx_insn *
3662 emit_move_insn_1 (rtx x, rtx y)
3664 machine_mode mode = GET_MODE (x);
3665 enum insn_code code;
3667 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3669 code = optab_handler (mov_optab, mode);
3670 if (code != CODE_FOR_nothing)
3671 return emit_insn (GEN_FCN (code) (x, y));
3673 /* Expand complex moves by moving real part and imag part. */
3674 if (COMPLEX_MODE_P (mode))
3675 return emit_move_complex (mode, x, y);
3677 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3678 || ALL_FIXED_POINT_MODE_P (mode))
3680 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3682 /* If we can't find an integer mode, use multi words. */
3683 if (result)
3684 return result;
3685 else
3686 return emit_move_multi_word (mode, x, y);
3689 if (GET_MODE_CLASS (mode) == MODE_CC)
3690 return emit_move_ccmode (mode, x, y);
3692 /* Try using a move pattern for the corresponding integer mode. This is
3693 only safe when simplify_subreg can convert MODE constants into integer
3694 constants. At present, it can only do this reliably if the value
3695 fits within a HOST_WIDE_INT. */
3696 if (!CONSTANT_P (y)
3697 || known_le (GET_MODE_BITSIZE (mode), HOST_BITS_PER_WIDE_INT))
3699 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3701 if (ret)
3703 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3704 return ret;
3708 return emit_move_multi_word (mode, x, y);
3711 /* Generate code to copy Y into X.
3712 Both Y and X must have the same mode, except that
3713 Y can be a constant with VOIDmode.
3714 This mode cannot be BLKmode; use emit_block_move for that.
3716 Return the last instruction emitted. */
3718 rtx_insn *
3719 emit_move_insn (rtx x, rtx y)
3721 machine_mode mode = GET_MODE (x);
3722 rtx y_cst = NULL_RTX;
3723 rtx_insn *last_insn;
3724 rtx set;
3726 gcc_assert (mode != BLKmode
3727 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3729 if (CONSTANT_P (y))
3731 if (optimize
3732 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3733 && (last_insn = compress_float_constant (x, y)))
3734 return last_insn;
3736 y_cst = y;
3738 if (!targetm.legitimate_constant_p (mode, y))
3740 y = force_const_mem (mode, y);
3742 /* If the target's cannot_force_const_mem prevented the spill,
3743 assume that the target's move expanders will also take care
3744 of the non-legitimate constant. */
3745 if (!y)
3746 y = y_cst;
3747 else
3748 y = use_anchored_address (y);
3752 /* If X or Y are memory references, verify that their addresses are valid
3753 for the machine. */
3754 if (MEM_P (x)
3755 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3756 MEM_ADDR_SPACE (x))
3757 && ! push_operand (x, GET_MODE (x))))
3758 x = validize_mem (x);
3760 if (MEM_P (y)
3761 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3762 MEM_ADDR_SPACE (y)))
3763 y = validize_mem (y);
3765 gcc_assert (mode != BLKmode);
3767 last_insn = emit_move_insn_1 (x, y);
3769 if (y_cst && REG_P (x)
3770 && (set = single_set (last_insn)) != NULL_RTX
3771 && SET_DEST (set) == x
3772 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3773 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3775 return last_insn;
3778 /* Generate the body of an instruction to copy Y into X.
3779 It may be a list of insns, if one insn isn't enough. */
3781 rtx_insn *
3782 gen_move_insn (rtx x, rtx y)
3784 rtx_insn *seq;
3786 start_sequence ();
3787 emit_move_insn_1 (x, y);
3788 seq = get_insns ();
3789 end_sequence ();
3790 return seq;
3793 /* If Y is representable exactly in a narrower mode, and the target can
3794 perform the extension directly from constant or memory, then emit the
3795 move as an extension. */
3797 static rtx_insn *
3798 compress_float_constant (rtx x, rtx y)
3800 machine_mode dstmode = GET_MODE (x);
3801 machine_mode orig_srcmode = GET_MODE (y);
3802 machine_mode srcmode;
3803 const REAL_VALUE_TYPE *r;
3804 int oldcost, newcost;
3805 bool speed = optimize_insn_for_speed_p ();
3807 r = CONST_DOUBLE_REAL_VALUE (y);
3809 if (targetm.legitimate_constant_p (dstmode, y))
3810 oldcost = set_src_cost (y, orig_srcmode, speed);
3811 else
3812 oldcost = set_src_cost (force_const_mem (dstmode, y), dstmode, speed);
3814 FOR_EACH_MODE_UNTIL (srcmode, orig_srcmode)
3816 enum insn_code ic;
3817 rtx trunc_y;
3818 rtx_insn *last_insn;
3820 /* Skip if the target can't extend this way. */
3821 ic = can_extend_p (dstmode, srcmode, 0);
3822 if (ic == CODE_FOR_nothing)
3823 continue;
3825 /* Skip if the narrowed value isn't exact. */
3826 if (! exact_real_truncate (srcmode, r))
3827 continue;
3829 trunc_y = const_double_from_real_value (*r, srcmode);
3831 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3833 /* Skip if the target needs extra instructions to perform
3834 the extension. */
3835 if (!insn_operand_matches (ic, 1, trunc_y))
3836 continue;
3837 /* This is valid, but may not be cheaper than the original. */
3838 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3839 dstmode, speed);
3840 if (oldcost < newcost)
3841 continue;
3843 else if (float_extend_from_mem[dstmode][srcmode])
3845 trunc_y = force_const_mem (srcmode, trunc_y);
3846 /* This is valid, but may not be cheaper than the original. */
3847 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3848 dstmode, speed);
3849 if (oldcost < newcost)
3850 continue;
3851 trunc_y = validize_mem (trunc_y);
3853 else
3854 continue;
3856 /* For CSE's benefit, force the compressed constant pool entry
3857 into a new pseudo. This constant may be used in different modes,
3858 and if not, combine will put things back together for us. */
3859 trunc_y = force_reg (srcmode, trunc_y);
3861 /* If x is a hard register, perform the extension into a pseudo,
3862 so that e.g. stack realignment code is aware of it. */
3863 rtx target = x;
3864 if (REG_P (x) && HARD_REGISTER_P (x))
3865 target = gen_reg_rtx (dstmode);
3867 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3868 last_insn = get_last_insn ();
3870 if (REG_P (target))
3871 set_unique_reg_note (last_insn, REG_EQUAL, y);
3873 if (target != x)
3874 return emit_move_insn (x, target);
3875 return last_insn;
3878 return NULL;
3881 /* Pushing data onto the stack. */
3883 /* Push a block of length SIZE (perhaps variable)
3884 and return an rtx to address the beginning of the block.
3885 The value may be virtual_outgoing_args_rtx.
3887 EXTRA is the number of bytes of padding to push in addition to SIZE.
3888 BELOW nonzero means this padding comes at low addresses;
3889 otherwise, the padding comes at high addresses. */
3892 push_block (rtx size, poly_int64 extra, int below)
3894 rtx temp;
3896 size = convert_modes (Pmode, ptr_mode, size, 1);
3897 if (CONSTANT_P (size))
3898 anti_adjust_stack (plus_constant (Pmode, size, extra));
3899 else if (REG_P (size) && known_eq (extra, 0))
3900 anti_adjust_stack (size);
3901 else
3903 temp = copy_to_mode_reg (Pmode, size);
3904 if (maybe_ne (extra, 0))
3905 temp = expand_binop (Pmode, add_optab, temp,
3906 gen_int_mode (extra, Pmode),
3907 temp, 0, OPTAB_LIB_WIDEN);
3908 anti_adjust_stack (temp);
3911 if (STACK_GROWS_DOWNWARD)
3913 temp = virtual_outgoing_args_rtx;
3914 if (maybe_ne (extra, 0) && below)
3915 temp = plus_constant (Pmode, temp, extra);
3917 else
3919 poly_int64 csize;
3920 if (poly_int_rtx_p (size, &csize))
3921 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3922 -csize - (below ? 0 : extra));
3923 else if (maybe_ne (extra, 0) && !below)
3924 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3925 negate_rtx (Pmode, plus_constant (Pmode, size,
3926 extra)));
3927 else
3928 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3929 negate_rtx (Pmode, size));
3932 return memory_address (NARROWEST_INT_MODE, temp);
3935 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3937 static rtx
3938 mem_autoinc_base (rtx mem)
3940 if (MEM_P (mem))
3942 rtx addr = XEXP (mem, 0);
3943 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3944 return XEXP (addr, 0);
3946 return NULL;
3949 /* A utility routine used here, in reload, and in try_split. The insns
3950 after PREV up to and including LAST are known to adjust the stack,
3951 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3952 placing notes as appropriate. PREV may be NULL, indicating the
3953 entire insn sequence prior to LAST should be scanned.
3955 The set of allowed stack pointer modifications is small:
3956 (1) One or more auto-inc style memory references (aka pushes),
3957 (2) One or more addition/subtraction with the SP as destination,
3958 (3) A single move insn with the SP as destination,
3959 (4) A call_pop insn,
3960 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3962 Insns in the sequence that do not modify the SP are ignored,
3963 except for noreturn calls.
3965 The return value is the amount of adjustment that can be trivially
3966 verified, via immediate operand or auto-inc. If the adjustment
3967 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3969 poly_int64
3970 find_args_size_adjust (rtx_insn *insn)
3972 rtx dest, set, pat;
3973 int i;
3975 pat = PATTERN (insn);
3976 set = NULL;
3978 /* Look for a call_pop pattern. */
3979 if (CALL_P (insn))
3981 /* We have to allow non-call_pop patterns for the case
3982 of emit_single_push_insn of a TLS address. */
3983 if (GET_CODE (pat) != PARALLEL)
3984 return 0;
3986 /* All call_pop have a stack pointer adjust in the parallel.
3987 The call itself is always first, and the stack adjust is
3988 usually last, so search from the end. */
3989 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3991 set = XVECEXP (pat, 0, i);
3992 if (GET_CODE (set) != SET)
3993 continue;
3994 dest = SET_DEST (set);
3995 if (dest == stack_pointer_rtx)
3996 break;
3998 /* We'd better have found the stack pointer adjust. */
3999 if (i == 0)
4000 return 0;
4001 /* Fall through to process the extracted SET and DEST
4002 as if it was a standalone insn. */
4004 else if (GET_CODE (pat) == SET)
4005 set = pat;
4006 else if ((set = single_set (insn)) != NULL)
4008 else if (GET_CODE (pat) == PARALLEL)
4010 /* ??? Some older ports use a parallel with a stack adjust
4011 and a store for a PUSH_ROUNDING pattern, rather than a
4012 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4013 /* ??? See h8300 and m68k, pushqi1. */
4014 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
4016 set = XVECEXP (pat, 0, i);
4017 if (GET_CODE (set) != SET)
4018 continue;
4019 dest = SET_DEST (set);
4020 if (dest == stack_pointer_rtx)
4021 break;
4023 /* We do not expect an auto-inc of the sp in the parallel. */
4024 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
4025 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4026 != stack_pointer_rtx);
4028 if (i < 0)
4029 return 0;
4031 else
4032 return 0;
4034 dest = SET_DEST (set);
4036 /* Look for direct modifications of the stack pointer. */
4037 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
4039 /* Look for a trivial adjustment, otherwise assume nothing. */
4040 /* Note that the SPU restore_stack_block pattern refers to
4041 the stack pointer in V4SImode. Consider that non-trivial. */
4042 poly_int64 offset;
4043 if (SCALAR_INT_MODE_P (GET_MODE (dest))
4044 && strip_offset (SET_SRC (set), &offset) == stack_pointer_rtx)
4045 return offset;
4046 /* ??? Reload can generate no-op moves, which will be cleaned
4047 up later. Recognize it and continue searching. */
4048 else if (rtx_equal_p (dest, SET_SRC (set)))
4049 return 0;
4050 else
4051 return HOST_WIDE_INT_MIN;
4053 else
4055 rtx mem, addr;
4057 /* Otherwise only think about autoinc patterns. */
4058 if (mem_autoinc_base (dest) == stack_pointer_rtx)
4060 mem = dest;
4061 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4062 != stack_pointer_rtx);
4064 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
4065 mem = SET_SRC (set);
4066 else
4067 return 0;
4069 addr = XEXP (mem, 0);
4070 switch (GET_CODE (addr))
4072 case PRE_INC:
4073 case POST_INC:
4074 return GET_MODE_SIZE (GET_MODE (mem));
4075 case PRE_DEC:
4076 case POST_DEC:
4077 return -GET_MODE_SIZE (GET_MODE (mem));
4078 case PRE_MODIFY:
4079 case POST_MODIFY:
4080 addr = XEXP (addr, 1);
4081 gcc_assert (GET_CODE (addr) == PLUS);
4082 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
4083 return rtx_to_poly_int64 (XEXP (addr, 1));
4084 default:
4085 gcc_unreachable ();
4090 poly_int64
4091 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last,
4092 poly_int64 end_args_size)
4094 poly_int64 args_size = end_args_size;
4095 bool saw_unknown = false;
4096 rtx_insn *insn;
4098 for (insn = last; insn != prev; insn = PREV_INSN (insn))
4100 if (!NONDEBUG_INSN_P (insn))
4101 continue;
4103 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4104 a call argument containing a TLS address that itself requires
4105 a call to __tls_get_addr. The handling of stack_pointer_delta
4106 in emit_single_push_insn is supposed to ensure that any such
4107 notes are already correct. */
4108 rtx note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4109 gcc_assert (!note || known_eq (args_size, get_args_size (note)));
4111 poly_int64 this_delta = find_args_size_adjust (insn);
4112 if (known_eq (this_delta, 0))
4114 if (!CALL_P (insn)
4115 || ACCUMULATE_OUTGOING_ARGS
4116 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
4117 continue;
4120 gcc_assert (!saw_unknown);
4121 if (known_eq (this_delta, HOST_WIDE_INT_MIN))
4122 saw_unknown = true;
4124 if (!note)
4125 add_args_size_note (insn, args_size);
4126 if (STACK_GROWS_DOWNWARD)
4127 this_delta = -poly_uint64 (this_delta);
4129 if (saw_unknown)
4130 args_size = HOST_WIDE_INT_MIN;
4131 else
4132 args_size -= this_delta;
4135 return args_size;
4138 #ifdef PUSH_ROUNDING
4139 /* Emit single push insn. */
4141 static void
4142 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4144 rtx dest_addr;
4145 poly_int64 rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4146 rtx dest;
4147 enum insn_code icode;
4149 /* If there is push pattern, use it. Otherwise try old way of throwing
4150 MEM representing push operation to move expander. */
4151 icode = optab_handler (push_optab, mode);
4152 if (icode != CODE_FOR_nothing)
4154 struct expand_operand ops[1];
4156 create_input_operand (&ops[0], x, mode);
4157 if (maybe_expand_insn (icode, 1, ops))
4158 return;
4160 if (known_eq (GET_MODE_SIZE (mode), rounded_size))
4161 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4162 /* If we are to pad downward, adjust the stack pointer first and
4163 then store X into the stack location using an offset. This is
4164 because emit_move_insn does not know how to pad; it does not have
4165 access to type. */
4166 else if (targetm.calls.function_arg_padding (mode, type) == PAD_DOWNWARD)
4168 emit_move_insn (stack_pointer_rtx,
4169 expand_binop (Pmode,
4170 STACK_GROWS_DOWNWARD ? sub_optab
4171 : add_optab,
4172 stack_pointer_rtx,
4173 gen_int_mode (rounded_size, Pmode),
4174 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4176 poly_int64 offset = rounded_size - GET_MODE_SIZE (mode);
4177 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4178 /* We have already decremented the stack pointer, so get the
4179 previous value. */
4180 offset += rounded_size;
4182 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4183 /* We have already incremented the stack pointer, so get the
4184 previous value. */
4185 offset -= rounded_size;
4187 dest_addr = plus_constant (Pmode, stack_pointer_rtx, offset);
4189 else
4191 if (STACK_GROWS_DOWNWARD)
4192 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4193 dest_addr = plus_constant (Pmode, stack_pointer_rtx, -rounded_size);
4194 else
4195 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4196 dest_addr = plus_constant (Pmode, stack_pointer_rtx, rounded_size);
4198 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4201 dest = gen_rtx_MEM (mode, dest_addr);
4203 if (type != 0)
4205 set_mem_attributes (dest, type, 1);
4207 if (cfun->tail_call_marked)
4208 /* Function incoming arguments may overlap with sibling call
4209 outgoing arguments and we cannot allow reordering of reads
4210 from function arguments with stores to outgoing arguments
4211 of sibling calls. */
4212 set_mem_alias_set (dest, 0);
4214 emit_move_insn (dest, x);
4217 /* Emit and annotate a single push insn. */
4219 static void
4220 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4222 poly_int64 delta, old_delta = stack_pointer_delta;
4223 rtx_insn *prev = get_last_insn ();
4224 rtx_insn *last;
4226 emit_single_push_insn_1 (mode, x, type);
4228 /* Adjust stack_pointer_delta to describe the situation after the push
4229 we just performed. Note that we must do this after the push rather
4230 than before the push in case calculating X needs pushes and pops of
4231 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4232 for such pushes and pops must not include the effect of the future
4233 push of X. */
4234 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4236 last = get_last_insn ();
4238 /* Notice the common case where we emitted exactly one insn. */
4239 if (PREV_INSN (last) == prev)
4241 add_args_size_note (last, stack_pointer_delta);
4242 return;
4245 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4246 gcc_assert (known_eq (delta, HOST_WIDE_INT_MIN)
4247 || known_eq (delta, old_delta));
4249 #endif
4251 /* If reading SIZE bytes from X will end up reading from
4252 Y return the number of bytes that overlap. Return -1
4253 if there is no overlap or -2 if we can't determine
4254 (for example when X and Y have different base registers). */
4256 static int
4257 memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size)
4259 rtx tmp = plus_constant (Pmode, x, size);
4260 rtx sub = simplify_gen_binary (MINUS, Pmode, tmp, y);
4262 if (!CONST_INT_P (sub))
4263 return -2;
4265 HOST_WIDE_INT val = INTVAL (sub);
4267 return IN_RANGE (val, 1, size) ? val : -1;
4270 /* Generate code to push X onto the stack, assuming it has mode MODE and
4271 type TYPE.
4272 MODE is redundant except when X is a CONST_INT (since they don't
4273 carry mode info).
4274 SIZE is an rtx for the size of data to be copied (in bytes),
4275 needed only if X is BLKmode.
4276 Return true if successful. May return false if asked to push a
4277 partial argument during a sibcall optimization (as specified by
4278 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4279 to not overlap.
4281 ALIGN (in bits) is maximum alignment we can assume.
4283 If PARTIAL and REG are both nonzero, then copy that many of the first
4284 bytes of X into registers starting with REG, and push the rest of X.
4285 The amount of space pushed is decreased by PARTIAL bytes.
4286 REG must be a hard register in this case.
4287 If REG is zero but PARTIAL is not, take any all others actions for an
4288 argument partially in registers, but do not actually load any
4289 registers.
4291 EXTRA is the amount in bytes of extra space to leave next to this arg.
4292 This is ignored if an argument block has already been allocated.
4294 On a machine that lacks real push insns, ARGS_ADDR is the address of
4295 the bottom of the argument block for this call. We use indexing off there
4296 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4297 argument block has not been preallocated.
4299 ARGS_SO_FAR is the size of args previously pushed for this call.
4301 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4302 for arguments passed in registers. If nonzero, it will be the number
4303 of bytes required. */
4305 bool
4306 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4307 unsigned int align, int partial, rtx reg, poly_int64 extra,
4308 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4309 rtx alignment_pad, bool sibcall_p)
4311 rtx xinner;
4312 pad_direction stack_direction
4313 = STACK_GROWS_DOWNWARD ? PAD_DOWNWARD : PAD_UPWARD;
4315 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4316 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4317 Default is below for small data on big-endian machines; else above. */
4318 pad_direction where_pad = targetm.calls.function_arg_padding (mode, type);
4320 /* Invert direction if stack is post-decrement.
4321 FIXME: why? */
4322 if (STACK_PUSH_CODE == POST_DEC)
4323 if (where_pad != PAD_NONE)
4324 where_pad = (where_pad == PAD_DOWNWARD ? PAD_UPWARD : PAD_DOWNWARD);
4326 xinner = x;
4328 int nregs = partial / UNITS_PER_WORD;
4329 rtx *tmp_regs = NULL;
4330 int overlapping = 0;
4332 if (mode == BLKmode
4333 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4335 /* Copy a block into the stack, entirely or partially. */
4337 rtx temp;
4338 int used;
4339 int offset;
4340 int skip;
4342 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4343 used = partial - offset;
4345 if (mode != BLKmode)
4347 /* A value is to be stored in an insufficiently aligned
4348 stack slot; copy via a suitably aligned slot if
4349 necessary. */
4350 size = gen_int_mode (GET_MODE_SIZE (mode), Pmode);
4351 if (!MEM_P (xinner))
4353 temp = assign_temp (type, 1, 1);
4354 emit_move_insn (temp, xinner);
4355 xinner = temp;
4359 gcc_assert (size);
4361 /* USED is now the # of bytes we need not copy to the stack
4362 because registers will take care of them. */
4364 if (partial != 0)
4365 xinner = adjust_address (xinner, BLKmode, used);
4367 /* If the partial register-part of the arg counts in its stack size,
4368 skip the part of stack space corresponding to the registers.
4369 Otherwise, start copying to the beginning of the stack space,
4370 by setting SKIP to 0. */
4371 skip = (reg_parm_stack_space == 0) ? 0 : used;
4373 #ifdef PUSH_ROUNDING
4374 /* Do it with several push insns if that doesn't take lots of insns
4375 and if there is no difficulty with push insns that skip bytes
4376 on the stack for alignment purposes. */
4377 if (args_addr == 0
4378 && PUSH_ARGS
4379 && CONST_INT_P (size)
4380 && skip == 0
4381 && MEM_ALIGN (xinner) >= align
4382 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4383 /* Here we avoid the case of a structure whose weak alignment
4384 forces many pushes of a small amount of data,
4385 and such small pushes do rounding that causes trouble. */
4386 && ((!targetm.slow_unaligned_access (word_mode, align))
4387 || align >= BIGGEST_ALIGNMENT
4388 || known_eq (PUSH_ROUNDING (align / BITS_PER_UNIT),
4389 align / BITS_PER_UNIT))
4390 && known_eq (PUSH_ROUNDING (INTVAL (size)), INTVAL (size)))
4392 /* Push padding now if padding above and stack grows down,
4393 or if padding below and stack grows up.
4394 But if space already allocated, this has already been done. */
4395 if (maybe_ne (extra, 0)
4396 && args_addr == 0
4397 && where_pad != PAD_NONE
4398 && where_pad != stack_direction)
4399 anti_adjust_stack (gen_int_mode (extra, Pmode));
4401 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4403 else
4404 #endif /* PUSH_ROUNDING */
4406 rtx target;
4408 /* Otherwise make space on the stack and copy the data
4409 to the address of that space. */
4411 /* Deduct words put into registers from the size we must copy. */
4412 if (partial != 0)
4414 if (CONST_INT_P (size))
4415 size = GEN_INT (INTVAL (size) - used);
4416 else
4417 size = expand_binop (GET_MODE (size), sub_optab, size,
4418 gen_int_mode (used, GET_MODE (size)),
4419 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4422 /* Get the address of the stack space.
4423 In this case, we do not deal with EXTRA separately.
4424 A single stack adjust will do. */
4425 poly_int64 offset;
4426 if (! args_addr)
4428 temp = push_block (size, extra, where_pad == PAD_DOWNWARD);
4429 extra = 0;
4431 else if (poly_int_rtx_p (args_so_far, &offset))
4432 temp = memory_address (BLKmode,
4433 plus_constant (Pmode, args_addr,
4434 skip + offset));
4435 else
4436 temp = memory_address (BLKmode,
4437 plus_constant (Pmode,
4438 gen_rtx_PLUS (Pmode,
4439 args_addr,
4440 args_so_far),
4441 skip));
4443 if (!ACCUMULATE_OUTGOING_ARGS)
4445 /* If the source is referenced relative to the stack pointer,
4446 copy it to another register to stabilize it. We do not need
4447 to do this if we know that we won't be changing sp. */
4449 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4450 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4451 temp = copy_to_reg (temp);
4454 target = gen_rtx_MEM (BLKmode, temp);
4456 /* We do *not* set_mem_attributes here, because incoming arguments
4457 may overlap with sibling call outgoing arguments and we cannot
4458 allow reordering of reads from function arguments with stores
4459 to outgoing arguments of sibling calls. We do, however, want
4460 to record the alignment of the stack slot. */
4461 /* ALIGN may well be better aligned than TYPE, e.g. due to
4462 PARM_BOUNDARY. Assume the caller isn't lying. */
4463 set_mem_align (target, align);
4465 /* If part should go in registers and pushing to that part would
4466 overwrite some of the values that need to go into regs, load the
4467 overlapping values into temporary pseudos to be moved into the hard
4468 regs at the end after the stack pushing has completed.
4469 We cannot load them directly into the hard regs here because
4470 they can be clobbered by the block move expansions.
4471 See PR 65358. */
4473 if (partial > 0 && reg != 0 && mode == BLKmode
4474 && GET_CODE (reg) != PARALLEL)
4476 overlapping = memory_load_overlap (XEXP (x, 0), temp, partial);
4477 if (overlapping > 0)
4479 gcc_assert (overlapping % UNITS_PER_WORD == 0);
4480 overlapping /= UNITS_PER_WORD;
4482 tmp_regs = XALLOCAVEC (rtx, overlapping);
4484 for (int i = 0; i < overlapping; i++)
4485 tmp_regs[i] = gen_reg_rtx (word_mode);
4487 for (int i = 0; i < overlapping; i++)
4488 emit_move_insn (tmp_regs[i],
4489 operand_subword_force (target, i, mode));
4491 else if (overlapping == -1)
4492 overlapping = 0;
4493 /* Could not determine whether there is overlap.
4494 Fail the sibcall. */
4495 else
4497 overlapping = 0;
4498 if (sibcall_p)
4499 return false;
4502 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4505 else if (partial > 0)
4507 /* Scalar partly in registers. This case is only supported
4508 for fixed-wdth modes. */
4509 int size = GET_MODE_SIZE (mode).to_constant ();
4510 size /= UNITS_PER_WORD;
4511 int i;
4512 int not_stack;
4513 /* # bytes of start of argument
4514 that we must make space for but need not store. */
4515 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4516 int args_offset = INTVAL (args_so_far);
4517 int skip;
4519 /* Push padding now if padding above and stack grows down,
4520 or if padding below and stack grows up.
4521 But if space already allocated, this has already been done. */
4522 if (maybe_ne (extra, 0)
4523 && args_addr == 0
4524 && where_pad != PAD_NONE
4525 && where_pad != stack_direction)
4526 anti_adjust_stack (gen_int_mode (extra, Pmode));
4528 /* If we make space by pushing it, we might as well push
4529 the real data. Otherwise, we can leave OFFSET nonzero
4530 and leave the space uninitialized. */
4531 if (args_addr == 0)
4532 offset = 0;
4534 /* Now NOT_STACK gets the number of words that we don't need to
4535 allocate on the stack. Convert OFFSET to words too. */
4536 not_stack = (partial - offset) / UNITS_PER_WORD;
4537 offset /= UNITS_PER_WORD;
4539 /* If the partial register-part of the arg counts in its stack size,
4540 skip the part of stack space corresponding to the registers.
4541 Otherwise, start copying to the beginning of the stack space,
4542 by setting SKIP to 0. */
4543 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4545 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4546 x = validize_mem (force_const_mem (mode, x));
4548 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4549 SUBREGs of such registers are not allowed. */
4550 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4551 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4552 x = copy_to_reg (x);
4554 /* Loop over all the words allocated on the stack for this arg. */
4555 /* We can do it by words, because any scalar bigger than a word
4556 has a size a multiple of a word. */
4557 for (i = size - 1; i >= not_stack; i--)
4558 if (i >= not_stack + offset)
4559 if (!emit_push_insn (operand_subword_force (x, i, mode),
4560 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4561 0, args_addr,
4562 GEN_INT (args_offset + ((i - not_stack + skip)
4563 * UNITS_PER_WORD)),
4564 reg_parm_stack_space, alignment_pad, sibcall_p))
4565 return false;
4567 else
4569 rtx addr;
4570 rtx dest;
4572 /* Push padding now if padding above and stack grows down,
4573 or if padding below and stack grows up.
4574 But if space already allocated, this has already been done. */
4575 if (maybe_ne (extra, 0)
4576 && args_addr == 0
4577 && where_pad != PAD_NONE
4578 && where_pad != stack_direction)
4579 anti_adjust_stack (gen_int_mode (extra, Pmode));
4581 #ifdef PUSH_ROUNDING
4582 if (args_addr == 0 && PUSH_ARGS)
4583 emit_single_push_insn (mode, x, type);
4584 else
4585 #endif
4587 addr = simplify_gen_binary (PLUS, Pmode, args_addr, args_so_far);
4588 dest = gen_rtx_MEM (mode, memory_address (mode, addr));
4590 /* We do *not* set_mem_attributes here, because incoming arguments
4591 may overlap with sibling call outgoing arguments and we cannot
4592 allow reordering of reads from function arguments with stores
4593 to outgoing arguments of sibling calls. We do, however, want
4594 to record the alignment of the stack slot. */
4595 /* ALIGN may well be better aligned than TYPE, e.g. due to
4596 PARM_BOUNDARY. Assume the caller isn't lying. */
4597 set_mem_align (dest, align);
4599 emit_move_insn (dest, x);
4603 /* Move the partial arguments into the registers and any overlapping
4604 values that we moved into the pseudos in tmp_regs. */
4605 if (partial > 0 && reg != 0)
4607 /* Handle calls that pass values in multiple non-contiguous locations.
4608 The Irix 6 ABI has examples of this. */
4609 if (GET_CODE (reg) == PARALLEL)
4610 emit_group_load (reg, x, type, -1);
4611 else
4613 gcc_assert (partial % UNITS_PER_WORD == 0);
4614 move_block_to_reg (REGNO (reg), x, nregs - overlapping, mode);
4616 for (int i = 0; i < overlapping; i++)
4617 emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg)
4618 + nregs - overlapping + i),
4619 tmp_regs[i]);
4624 if (maybe_ne (extra, 0) && args_addr == 0 && where_pad == stack_direction)
4625 anti_adjust_stack (gen_int_mode (extra, Pmode));
4627 if (alignment_pad && args_addr == 0)
4628 anti_adjust_stack (alignment_pad);
4630 return true;
4633 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4634 operations. */
4636 static rtx
4637 get_subtarget (rtx x)
4639 return (optimize
4640 || x == 0
4641 /* Only registers can be subtargets. */
4642 || !REG_P (x)
4643 /* Don't use hard regs to avoid extending their life. */
4644 || REGNO (x) < FIRST_PSEUDO_REGISTER
4645 ? 0 : x);
4648 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4649 FIELD is a bitfield. Returns true if the optimization was successful,
4650 and there's nothing else to do. */
4652 static bool
4653 optimize_bitfield_assignment_op (poly_uint64 pbitsize,
4654 poly_uint64 pbitpos,
4655 poly_uint64 pbitregion_start,
4656 poly_uint64 pbitregion_end,
4657 machine_mode mode1, rtx str_rtx,
4658 tree to, tree src, bool reverse)
4660 /* str_mode is not guaranteed to be a scalar type. */
4661 machine_mode str_mode = GET_MODE (str_rtx);
4662 unsigned int str_bitsize;
4663 tree op0, op1;
4664 rtx value, result;
4665 optab binop;
4666 gimple *srcstmt;
4667 enum tree_code code;
4669 unsigned HOST_WIDE_INT bitsize, bitpos, bitregion_start, bitregion_end;
4670 if (mode1 != VOIDmode
4671 || !pbitsize.is_constant (&bitsize)
4672 || !pbitpos.is_constant (&bitpos)
4673 || !pbitregion_start.is_constant (&bitregion_start)
4674 || !pbitregion_end.is_constant (&bitregion_end)
4675 || bitsize >= BITS_PER_WORD
4676 || !GET_MODE_BITSIZE (str_mode).is_constant (&str_bitsize)
4677 || str_bitsize > BITS_PER_WORD
4678 || TREE_SIDE_EFFECTS (to)
4679 || TREE_THIS_VOLATILE (to))
4680 return false;
4682 STRIP_NOPS (src);
4683 if (TREE_CODE (src) != SSA_NAME)
4684 return false;
4685 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4686 return false;
4688 srcstmt = get_gimple_for_ssa_name (src);
4689 if (!srcstmt
4690 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4691 return false;
4693 code = gimple_assign_rhs_code (srcstmt);
4695 op0 = gimple_assign_rhs1 (srcstmt);
4697 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4698 to find its initialization. Hopefully the initialization will
4699 be from a bitfield load. */
4700 if (TREE_CODE (op0) == SSA_NAME)
4702 gimple *op0stmt = get_gimple_for_ssa_name (op0);
4704 /* We want to eventually have OP0 be the same as TO, which
4705 should be a bitfield. */
4706 if (!op0stmt
4707 || !is_gimple_assign (op0stmt)
4708 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4709 return false;
4710 op0 = gimple_assign_rhs1 (op0stmt);
4713 op1 = gimple_assign_rhs2 (srcstmt);
4715 if (!operand_equal_p (to, op0, 0))
4716 return false;
4718 if (MEM_P (str_rtx))
4720 unsigned HOST_WIDE_INT offset1;
4722 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4723 str_bitsize = BITS_PER_WORD;
4725 scalar_int_mode best_mode;
4726 if (!get_best_mode (bitsize, bitpos, bitregion_start, bitregion_end,
4727 MEM_ALIGN (str_rtx), str_bitsize, false, &best_mode))
4728 return false;
4729 str_mode = best_mode;
4730 str_bitsize = GET_MODE_BITSIZE (best_mode);
4732 offset1 = bitpos;
4733 bitpos %= str_bitsize;
4734 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4735 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4737 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4738 return false;
4740 /* If the bit field covers the whole REG/MEM, store_field
4741 will likely generate better code. */
4742 if (bitsize >= str_bitsize)
4743 return false;
4745 /* We can't handle fields split across multiple entities. */
4746 if (bitpos + bitsize > str_bitsize)
4747 return false;
4749 if (reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
4750 bitpos = str_bitsize - bitpos - bitsize;
4752 switch (code)
4754 case PLUS_EXPR:
4755 case MINUS_EXPR:
4756 /* For now, just optimize the case of the topmost bitfield
4757 where we don't need to do any masking and also
4758 1 bit bitfields where xor can be used.
4759 We might win by one instruction for the other bitfields
4760 too if insv/extv instructions aren't used, so that
4761 can be added later. */
4762 if ((reverse || bitpos + bitsize != str_bitsize)
4763 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4764 break;
4766 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4767 value = convert_modes (str_mode,
4768 TYPE_MODE (TREE_TYPE (op1)), value,
4769 TYPE_UNSIGNED (TREE_TYPE (op1)));
4771 /* We may be accessing data outside the field, which means
4772 we can alias adjacent data. */
4773 if (MEM_P (str_rtx))
4775 str_rtx = shallow_copy_rtx (str_rtx);
4776 set_mem_alias_set (str_rtx, 0);
4777 set_mem_expr (str_rtx, 0);
4780 if (bitsize == 1 && (reverse || bitpos + bitsize != str_bitsize))
4782 value = expand_and (str_mode, value, const1_rtx, NULL);
4783 binop = xor_optab;
4785 else
4786 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4788 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4789 if (reverse)
4790 value = flip_storage_order (str_mode, value);
4791 result = expand_binop (str_mode, binop, str_rtx,
4792 value, str_rtx, 1, OPTAB_WIDEN);
4793 if (result != str_rtx)
4794 emit_move_insn (str_rtx, result);
4795 return true;
4797 case BIT_IOR_EXPR:
4798 case BIT_XOR_EXPR:
4799 if (TREE_CODE (op1) != INTEGER_CST)
4800 break;
4801 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4802 value = convert_modes (str_mode,
4803 TYPE_MODE (TREE_TYPE (op1)), value,
4804 TYPE_UNSIGNED (TREE_TYPE (op1)));
4806 /* We may be accessing data outside the field, which means
4807 we can alias adjacent data. */
4808 if (MEM_P (str_rtx))
4810 str_rtx = shallow_copy_rtx (str_rtx);
4811 set_mem_alias_set (str_rtx, 0);
4812 set_mem_expr (str_rtx, 0);
4815 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4816 if (bitpos + bitsize != str_bitsize)
4818 rtx mask = gen_int_mode ((HOST_WIDE_INT_1U << bitsize) - 1,
4819 str_mode);
4820 value = expand_and (str_mode, value, mask, NULL_RTX);
4822 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4823 if (reverse)
4824 value = flip_storage_order (str_mode, value);
4825 result = expand_binop (str_mode, binop, str_rtx,
4826 value, str_rtx, 1, OPTAB_WIDEN);
4827 if (result != str_rtx)
4828 emit_move_insn (str_rtx, result);
4829 return true;
4831 default:
4832 break;
4835 return false;
4838 /* In the C++ memory model, consecutive bit fields in a structure are
4839 considered one memory location.
4841 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4842 returns the bit range of consecutive bits in which this COMPONENT_REF
4843 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4844 and *OFFSET may be adjusted in the process.
4846 If the access does not need to be restricted, 0 is returned in both
4847 *BITSTART and *BITEND. */
4849 void
4850 get_bit_range (poly_uint64_pod *bitstart, poly_uint64_pod *bitend, tree exp,
4851 poly_int64_pod *bitpos, tree *offset)
4853 poly_int64 bitoffset;
4854 tree field, repr;
4856 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4858 field = TREE_OPERAND (exp, 1);
4859 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4860 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4861 need to limit the range we can access. */
4862 if (!repr)
4864 *bitstart = *bitend = 0;
4865 return;
4868 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4869 part of a larger bit field, then the representative does not serve any
4870 useful purpose. This can occur in Ada. */
4871 if (handled_component_p (TREE_OPERAND (exp, 0)))
4873 machine_mode rmode;
4874 poly_int64 rbitsize, rbitpos;
4875 tree roffset;
4876 int unsignedp, reversep, volatilep = 0;
4877 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4878 &roffset, &rmode, &unsignedp, &reversep,
4879 &volatilep);
4880 if (!multiple_p (rbitpos, BITS_PER_UNIT))
4882 *bitstart = *bitend = 0;
4883 return;
4887 /* Compute the adjustment to bitpos from the offset of the field
4888 relative to the representative. DECL_FIELD_OFFSET of field and
4889 repr are the same by construction if they are not constants,
4890 see finish_bitfield_layout. */
4891 poly_uint64 field_offset, repr_offset;
4892 if (poly_int_tree_p (DECL_FIELD_OFFSET (field), &field_offset)
4893 && poly_int_tree_p (DECL_FIELD_OFFSET (repr), &repr_offset))
4894 bitoffset = (field_offset - repr_offset) * BITS_PER_UNIT;
4895 else
4896 bitoffset = 0;
4897 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4898 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4900 /* If the adjustment is larger than bitpos, we would have a negative bit
4901 position for the lower bound and this may wreak havoc later. Adjust
4902 offset and bitpos to make the lower bound non-negative in that case. */
4903 if (maybe_gt (bitoffset, *bitpos))
4905 poly_int64 adjust_bits = upper_bound (bitoffset, *bitpos) - *bitpos;
4906 poly_int64 adjust_bytes = exact_div (adjust_bits, BITS_PER_UNIT);
4908 *bitpos += adjust_bits;
4909 if (*offset == NULL_TREE)
4910 *offset = size_int (-adjust_bytes);
4911 else
4912 *offset = size_binop (MINUS_EXPR, *offset, size_int (adjust_bytes));
4913 *bitstart = 0;
4915 else
4916 *bitstart = *bitpos - bitoffset;
4918 *bitend = *bitstart + tree_to_poly_uint64 (DECL_SIZE (repr)) - 1;
4921 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4922 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4923 DECL_RTL was not set yet, return NORTL. */
4925 static inline bool
4926 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4928 if (TREE_CODE (addr) != ADDR_EXPR)
4929 return false;
4931 tree base = TREE_OPERAND (addr, 0);
4933 if (!DECL_P (base)
4934 || TREE_ADDRESSABLE (base)
4935 || DECL_MODE (base) == BLKmode)
4936 return false;
4938 if (!DECL_RTL_SET_P (base))
4939 return nortl;
4941 return (!MEM_P (DECL_RTL (base)));
4944 /* Returns true if the MEM_REF REF refers to an object that does not
4945 reside in memory and has non-BLKmode. */
4947 static inline bool
4948 mem_ref_refers_to_non_mem_p (tree ref)
4950 tree base = TREE_OPERAND (ref, 0);
4951 return addr_expr_of_non_mem_decl_p_1 (base, false);
4954 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4955 is true, try generating a nontemporal store. */
4957 void
4958 expand_assignment (tree to, tree from, bool nontemporal)
4960 rtx to_rtx = 0;
4961 rtx result;
4962 machine_mode mode;
4963 unsigned int align;
4964 enum insn_code icode;
4966 /* Don't crash if the lhs of the assignment was erroneous. */
4967 if (TREE_CODE (to) == ERROR_MARK)
4969 expand_normal (from);
4970 return;
4973 /* Optimize away no-op moves without side-effects. */
4974 if (operand_equal_p (to, from, 0))
4975 return;
4977 /* Handle misaligned stores. */
4978 mode = TYPE_MODE (TREE_TYPE (to));
4979 if ((TREE_CODE (to) == MEM_REF
4980 || TREE_CODE (to) == TARGET_MEM_REF)
4981 && mode != BLKmode
4982 && !mem_ref_refers_to_non_mem_p (to)
4983 && ((align = get_object_alignment (to))
4984 < GET_MODE_ALIGNMENT (mode))
4985 && (((icode = optab_handler (movmisalign_optab, mode))
4986 != CODE_FOR_nothing)
4987 || targetm.slow_unaligned_access (mode, align)))
4989 rtx reg, mem;
4991 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4992 reg = force_not_mem (reg);
4993 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4994 if (TREE_CODE (to) == MEM_REF && REF_REVERSE_STORAGE_ORDER (to))
4995 reg = flip_storage_order (mode, reg);
4997 if (icode != CODE_FOR_nothing)
4999 struct expand_operand ops[2];
5001 create_fixed_operand (&ops[0], mem);
5002 create_input_operand (&ops[1], reg, mode);
5003 /* The movmisalign<mode> pattern cannot fail, else the assignment
5004 would silently be omitted. */
5005 expand_insn (icode, 2, ops);
5007 else
5008 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg,
5009 false);
5010 return;
5013 /* Assignment of a structure component needs special treatment
5014 if the structure component's rtx is not simply a MEM.
5015 Assignment of an array element at a constant index, and assignment of
5016 an array element in an unaligned packed structure field, has the same
5017 problem. Same for (partially) storing into a non-memory object. */
5018 if (handled_component_p (to)
5019 || (TREE_CODE (to) == MEM_REF
5020 && (REF_REVERSE_STORAGE_ORDER (to)
5021 || mem_ref_refers_to_non_mem_p (to)))
5022 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
5024 machine_mode mode1;
5025 poly_int64 bitsize, bitpos;
5026 poly_uint64 bitregion_start = 0;
5027 poly_uint64 bitregion_end = 0;
5028 tree offset;
5029 int unsignedp, reversep, volatilep = 0;
5030 tree tem;
5032 push_temp_slots ();
5033 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
5034 &unsignedp, &reversep, &volatilep);
5036 /* Make sure bitpos is not negative, it can wreak havoc later. */
5037 if (maybe_lt (bitpos, 0))
5039 gcc_assert (offset == NULL_TREE);
5040 offset = size_int (bits_to_bytes_round_down (bitpos));
5041 bitpos = num_trailing_bits (bitpos);
5044 if (TREE_CODE (to) == COMPONENT_REF
5045 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
5046 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
5047 /* The C++ memory model naturally applies to byte-aligned fields.
5048 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5049 BITSIZE are not byte-aligned, there is no need to limit the range
5050 we can access. This can occur with packed structures in Ada. */
5051 else if (maybe_gt (bitsize, 0)
5052 && multiple_p (bitsize, BITS_PER_UNIT)
5053 && multiple_p (bitpos, BITS_PER_UNIT))
5055 bitregion_start = bitpos;
5056 bitregion_end = bitpos + bitsize - 1;
5059 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
5061 /* If the field has a mode, we want to access it in the
5062 field's mode, not the computed mode.
5063 If a MEM has VOIDmode (external with incomplete type),
5064 use BLKmode for it instead. */
5065 if (MEM_P (to_rtx))
5067 if (mode1 != VOIDmode)
5068 to_rtx = adjust_address (to_rtx, mode1, 0);
5069 else if (GET_MODE (to_rtx) == VOIDmode)
5070 to_rtx = adjust_address (to_rtx, BLKmode, 0);
5073 if (offset != 0)
5075 machine_mode address_mode;
5076 rtx offset_rtx;
5078 if (!MEM_P (to_rtx))
5080 /* We can get constant negative offsets into arrays with broken
5081 user code. Translate this to a trap instead of ICEing. */
5082 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
5083 expand_builtin_trap ();
5084 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
5087 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
5088 address_mode = get_address_mode (to_rtx);
5089 if (GET_MODE (offset_rtx) != address_mode)
5091 /* We cannot be sure that the RTL in offset_rtx is valid outside
5092 of a memory address context, so force it into a register
5093 before attempting to convert it to the desired mode. */
5094 offset_rtx = force_operand (offset_rtx, NULL_RTX);
5095 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5098 /* If we have an expression in OFFSET_RTX and a non-zero
5099 byte offset in BITPOS, adding the byte offset before the
5100 OFFSET_RTX results in better intermediate code, which makes
5101 later rtl optimization passes perform better.
5103 We prefer intermediate code like this:
5105 r124:DI=r123:DI+0x18
5106 [r124:DI]=r121:DI
5108 ... instead of ...
5110 r124:DI=r123:DI+0x10
5111 [r124:DI+0x8]=r121:DI
5113 This is only done for aligned data values, as these can
5114 be expected to result in single move instructions. */
5115 poly_int64 bytepos;
5116 if (mode1 != VOIDmode
5117 && maybe_ne (bitpos, 0)
5118 && maybe_gt (bitsize, 0)
5119 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
5120 && multiple_p (bitpos, bitsize)
5121 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1))
5122 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
5124 to_rtx = adjust_address (to_rtx, mode1, bytepos);
5125 bitregion_start = 0;
5126 if (known_ge (bitregion_end, poly_uint64 (bitpos)))
5127 bitregion_end -= bitpos;
5128 bitpos = 0;
5131 to_rtx = offset_address (to_rtx, offset_rtx,
5132 highest_pow2_factor_for_target (to,
5133 offset));
5136 /* No action is needed if the target is not a memory and the field
5137 lies completely outside that target. This can occur if the source
5138 code contains an out-of-bounds access to a small array. */
5139 if (!MEM_P (to_rtx)
5140 && GET_MODE (to_rtx) != BLKmode
5141 && known_ge (bitpos, GET_MODE_PRECISION (GET_MODE (to_rtx))))
5143 expand_normal (from);
5144 result = NULL;
5146 /* Handle expand_expr of a complex value returning a CONCAT. */
5147 else if (GET_CODE (to_rtx) == CONCAT)
5149 machine_mode to_mode = GET_MODE (to_rtx);
5150 gcc_checking_assert (COMPLEX_MODE_P (to_mode));
5151 poly_int64 mode_bitsize = GET_MODE_BITSIZE (to_mode);
5152 unsigned short inner_bitsize = GET_MODE_UNIT_BITSIZE (to_mode);
5153 if (TYPE_MODE (TREE_TYPE (from)) == to_mode
5154 && known_eq (bitpos, 0)
5155 && known_eq (bitsize, mode_bitsize))
5156 result = store_expr (from, to_rtx, false, nontemporal, reversep);
5157 else if (TYPE_MODE (TREE_TYPE (from)) == GET_MODE_INNER (to_mode)
5158 && known_eq (bitsize, inner_bitsize)
5159 && (known_eq (bitpos, 0)
5160 || known_eq (bitpos, inner_bitsize)))
5161 result = store_expr (from, XEXP (to_rtx, maybe_ne (bitpos, 0)),
5162 false, nontemporal, reversep);
5163 else if (known_le (bitpos + bitsize, inner_bitsize))
5164 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
5165 bitregion_start, bitregion_end,
5166 mode1, from, get_alias_set (to),
5167 nontemporal, reversep);
5168 else if (known_ge (bitpos, inner_bitsize))
5169 result = store_field (XEXP (to_rtx, 1), bitsize,
5170 bitpos - inner_bitsize,
5171 bitregion_start, bitregion_end,
5172 mode1, from, get_alias_set (to),
5173 nontemporal, reversep);
5174 else if (known_eq (bitpos, 0) && known_eq (bitsize, mode_bitsize))
5176 result = expand_normal (from);
5177 if (GET_CODE (result) == CONCAT)
5179 to_mode = GET_MODE_INNER (to_mode);
5180 machine_mode from_mode = GET_MODE_INNER (GET_MODE (result));
5181 rtx from_real
5182 = simplify_gen_subreg (to_mode, XEXP (result, 0),
5183 from_mode, 0);
5184 rtx from_imag
5185 = simplify_gen_subreg (to_mode, XEXP (result, 1),
5186 from_mode, 0);
5187 if (!from_real || !from_imag)
5188 goto concat_store_slow;
5189 emit_move_insn (XEXP (to_rtx, 0), from_real);
5190 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5192 else
5194 rtx from_rtx
5195 = simplify_gen_subreg (to_mode, result,
5196 TYPE_MODE (TREE_TYPE (from)), 0);
5197 if (from_rtx)
5199 emit_move_insn (XEXP (to_rtx, 0),
5200 read_complex_part (from_rtx, false));
5201 emit_move_insn (XEXP (to_rtx, 1),
5202 read_complex_part (from_rtx, true));
5204 else
5206 machine_mode to_mode
5207 = GET_MODE_INNER (GET_MODE (to_rtx));
5208 rtx from_real
5209 = simplify_gen_subreg (to_mode, result,
5210 TYPE_MODE (TREE_TYPE (from)),
5212 rtx from_imag
5213 = simplify_gen_subreg (to_mode, result,
5214 TYPE_MODE (TREE_TYPE (from)),
5215 GET_MODE_SIZE (to_mode));
5216 if (!from_real || !from_imag)
5217 goto concat_store_slow;
5218 emit_move_insn (XEXP (to_rtx, 0), from_real);
5219 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5223 else
5225 concat_store_slow:;
5226 rtx temp = assign_stack_temp (to_mode,
5227 GET_MODE_SIZE (GET_MODE (to_rtx)));
5228 write_complex_part (temp, XEXP (to_rtx, 0), false);
5229 write_complex_part (temp, XEXP (to_rtx, 1), true);
5230 result = store_field (temp, bitsize, bitpos,
5231 bitregion_start, bitregion_end,
5232 mode1, from, get_alias_set (to),
5233 nontemporal, reversep);
5234 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
5235 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
5238 else
5240 if (MEM_P (to_rtx))
5242 /* If the field is at offset zero, we could have been given the
5243 DECL_RTX of the parent struct. Don't munge it. */
5244 to_rtx = shallow_copy_rtx (to_rtx);
5245 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
5246 if (volatilep)
5247 MEM_VOLATILE_P (to_rtx) = 1;
5250 if (optimize_bitfield_assignment_op (bitsize, bitpos,
5251 bitregion_start, bitregion_end,
5252 mode1, to_rtx, to, from,
5253 reversep))
5254 result = NULL;
5255 else
5256 result = store_field (to_rtx, bitsize, bitpos,
5257 bitregion_start, bitregion_end,
5258 mode1, from, get_alias_set (to),
5259 nontemporal, reversep);
5262 if (result)
5263 preserve_temp_slots (result);
5264 pop_temp_slots ();
5265 return;
5268 /* If the rhs is a function call and its value is not an aggregate,
5269 call the function before we start to compute the lhs.
5270 This is needed for correct code for cases such as
5271 val = setjmp (buf) on machines where reference to val
5272 requires loading up part of an address in a separate insn.
5274 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5275 since it might be a promoted variable where the zero- or sign- extension
5276 needs to be done. Handling this in the normal way is safe because no
5277 computation is done before the call. The same is true for SSA names. */
5278 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5279 && COMPLETE_TYPE_P (TREE_TYPE (from))
5280 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5281 && ! (((VAR_P (to)
5282 || TREE_CODE (to) == PARM_DECL
5283 || TREE_CODE (to) == RESULT_DECL)
5284 && REG_P (DECL_RTL (to)))
5285 || TREE_CODE (to) == SSA_NAME))
5287 rtx value;
5289 push_temp_slots ();
5290 value = expand_normal (from);
5292 if (to_rtx == 0)
5293 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5295 /* Handle calls that return values in multiple non-contiguous locations.
5296 The Irix 6 ABI has examples of this. */
5297 if (GET_CODE (to_rtx) == PARALLEL)
5299 if (GET_CODE (value) == PARALLEL)
5300 emit_group_move (to_rtx, value);
5301 else
5302 emit_group_load (to_rtx, value, TREE_TYPE (from),
5303 int_size_in_bytes (TREE_TYPE (from)));
5305 else if (GET_CODE (value) == PARALLEL)
5306 emit_group_store (to_rtx, value, TREE_TYPE (from),
5307 int_size_in_bytes (TREE_TYPE (from)));
5308 else if (GET_MODE (to_rtx) == BLKmode)
5310 /* Handle calls that return BLKmode values in registers. */
5311 if (REG_P (value))
5312 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5313 else
5314 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5316 else
5318 if (POINTER_TYPE_P (TREE_TYPE (to)))
5319 value = convert_memory_address_addr_space
5320 (as_a <scalar_int_mode> (GET_MODE (to_rtx)), value,
5321 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5323 emit_move_insn (to_rtx, value);
5326 preserve_temp_slots (to_rtx);
5327 pop_temp_slots ();
5328 return;
5331 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5332 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5334 /* Don't move directly into a return register. */
5335 if (TREE_CODE (to) == RESULT_DECL
5336 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5338 rtx temp;
5340 push_temp_slots ();
5342 /* If the source is itself a return value, it still is in a pseudo at
5343 this point so we can move it back to the return register directly. */
5344 if (REG_P (to_rtx)
5345 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5346 && TREE_CODE (from) != CALL_EXPR)
5347 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5348 else
5349 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5351 /* Handle calls that return values in multiple non-contiguous locations.
5352 The Irix 6 ABI has examples of this. */
5353 if (GET_CODE (to_rtx) == PARALLEL)
5355 if (GET_CODE (temp) == PARALLEL)
5356 emit_group_move (to_rtx, temp);
5357 else
5358 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5359 int_size_in_bytes (TREE_TYPE (from)));
5361 else if (temp)
5362 emit_move_insn (to_rtx, temp);
5364 preserve_temp_slots (to_rtx);
5365 pop_temp_slots ();
5366 return;
5369 /* In case we are returning the contents of an object which overlaps
5370 the place the value is being stored, use a safe function when copying
5371 a value through a pointer into a structure value return block. */
5372 if (TREE_CODE (to) == RESULT_DECL
5373 && TREE_CODE (from) == INDIRECT_REF
5374 && ADDR_SPACE_GENERIC_P
5375 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5376 && refs_may_alias_p (to, from)
5377 && cfun->returns_struct
5378 && !cfun->returns_pcc_struct)
5380 rtx from_rtx, size;
5382 push_temp_slots ();
5383 size = expr_size (from);
5384 from_rtx = expand_normal (from);
5386 emit_block_move_via_libcall (XEXP (to_rtx, 0), XEXP (from_rtx, 0), size);
5388 preserve_temp_slots (to_rtx);
5389 pop_temp_slots ();
5390 return;
5393 /* Compute FROM and store the value in the rtx we got. */
5395 push_temp_slots ();
5396 result = store_expr (from, to_rtx, 0, nontemporal, false);
5397 preserve_temp_slots (result);
5398 pop_temp_slots ();
5399 return;
5402 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5403 succeeded, false otherwise. */
5405 bool
5406 emit_storent_insn (rtx to, rtx from)
5408 struct expand_operand ops[2];
5409 machine_mode mode = GET_MODE (to);
5410 enum insn_code code = optab_handler (storent_optab, mode);
5412 if (code == CODE_FOR_nothing)
5413 return false;
5415 create_fixed_operand (&ops[0], to);
5416 create_input_operand (&ops[1], from, mode);
5417 return maybe_expand_insn (code, 2, ops);
5420 /* Generate code for computing expression EXP,
5421 and storing the value into TARGET.
5423 If the mode is BLKmode then we may return TARGET itself.
5424 It turns out that in BLKmode it doesn't cause a problem.
5425 because C has no operators that could combine two different
5426 assignments into the same BLKmode object with different values
5427 with no sequence point. Will other languages need this to
5428 be more thorough?
5430 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5431 stack, and block moves may need to be treated specially.
5433 If NONTEMPORAL is true, try using a nontemporal store instruction.
5435 If REVERSE is true, the store is to be done in reverse order. */
5438 store_expr (tree exp, rtx target, int call_param_p,
5439 bool nontemporal, bool reverse)
5441 rtx temp;
5442 rtx alt_rtl = NULL_RTX;
5443 location_t loc = curr_insn_location ();
5445 if (VOID_TYPE_P (TREE_TYPE (exp)))
5447 /* C++ can generate ?: expressions with a throw expression in one
5448 branch and an rvalue in the other. Here, we resolve attempts to
5449 store the throw expression's nonexistent result. */
5450 gcc_assert (!call_param_p);
5451 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5452 return NULL_RTX;
5454 if (TREE_CODE (exp) == COMPOUND_EXPR)
5456 /* Perform first part of compound expression, then assign from second
5457 part. */
5458 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5459 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5460 return store_expr (TREE_OPERAND (exp, 1), target,
5461 call_param_p, nontemporal, reverse);
5463 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5465 /* For conditional expression, get safe form of the target. Then
5466 test the condition, doing the appropriate assignment on either
5467 side. This avoids the creation of unnecessary temporaries.
5468 For non-BLKmode, it is more efficient not to do this. */
5470 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5472 do_pending_stack_adjust ();
5473 NO_DEFER_POP;
5474 jumpifnot (TREE_OPERAND (exp, 0), lab1,
5475 profile_probability::uninitialized ());
5476 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5477 nontemporal, reverse);
5478 emit_jump_insn (targetm.gen_jump (lab2));
5479 emit_barrier ();
5480 emit_label (lab1);
5481 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5482 nontemporal, reverse);
5483 emit_label (lab2);
5484 OK_DEFER_POP;
5486 return NULL_RTX;
5488 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5489 /* If this is a scalar in a register that is stored in a wider mode
5490 than the declared mode, compute the result into its declared mode
5491 and then convert to the wider mode. Our value is the computed
5492 expression. */
5494 rtx inner_target = 0;
5495 scalar_int_mode outer_mode = subreg_unpromoted_mode (target);
5496 scalar_int_mode inner_mode = subreg_promoted_mode (target);
5498 /* We can do the conversion inside EXP, which will often result
5499 in some optimizations. Do the conversion in two steps: first
5500 change the signedness, if needed, then the extend. But don't
5501 do this if the type of EXP is a subtype of something else
5502 since then the conversion might involve more than just
5503 converting modes. */
5504 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5505 && TREE_TYPE (TREE_TYPE (exp)) == 0
5506 && GET_MODE_PRECISION (outer_mode)
5507 == TYPE_PRECISION (TREE_TYPE (exp)))
5509 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5510 TYPE_UNSIGNED (TREE_TYPE (exp))))
5512 /* Some types, e.g. Fortran's logical*4, won't have a signed
5513 version, so use the mode instead. */
5514 tree ntype
5515 = (signed_or_unsigned_type_for
5516 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5517 if (ntype == NULL)
5518 ntype = lang_hooks.types.type_for_mode
5519 (TYPE_MODE (TREE_TYPE (exp)),
5520 SUBREG_PROMOTED_SIGN (target));
5522 exp = fold_convert_loc (loc, ntype, exp);
5525 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5526 (inner_mode, SUBREG_PROMOTED_SIGN (target)),
5527 exp);
5529 inner_target = SUBREG_REG (target);
5532 temp = expand_expr (exp, inner_target, VOIDmode,
5533 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5536 /* If TEMP is a VOIDmode constant, use convert_modes to make
5537 sure that we properly convert it. */
5538 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5540 temp = convert_modes (outer_mode, TYPE_MODE (TREE_TYPE (exp)),
5541 temp, SUBREG_PROMOTED_SIGN (target));
5542 temp = convert_modes (inner_mode, outer_mode, temp,
5543 SUBREG_PROMOTED_SIGN (target));
5546 convert_move (SUBREG_REG (target), temp,
5547 SUBREG_PROMOTED_SIGN (target));
5549 return NULL_RTX;
5551 else if ((TREE_CODE (exp) == STRING_CST
5552 || (TREE_CODE (exp) == MEM_REF
5553 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5554 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5555 == STRING_CST
5556 && integer_zerop (TREE_OPERAND (exp, 1))))
5557 && !nontemporal && !call_param_p
5558 && MEM_P (target))
5560 /* Optimize initialization of an array with a STRING_CST. */
5561 HOST_WIDE_INT exp_len, str_copy_len;
5562 rtx dest_mem;
5563 tree str = TREE_CODE (exp) == STRING_CST
5564 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5566 exp_len = int_expr_size (exp);
5567 if (exp_len <= 0)
5568 goto normal_expr;
5570 if (TREE_STRING_LENGTH (str) <= 0)
5571 goto normal_expr;
5573 str_copy_len = strlen (TREE_STRING_POINTER (str));
5574 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5575 goto normal_expr;
5577 str_copy_len = TREE_STRING_LENGTH (str);
5578 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5579 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5581 str_copy_len += STORE_MAX_PIECES - 1;
5582 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5584 str_copy_len = MIN (str_copy_len, exp_len);
5585 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5586 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5587 MEM_ALIGN (target), false))
5588 goto normal_expr;
5590 dest_mem = target;
5592 dest_mem = store_by_pieces (dest_mem,
5593 str_copy_len, builtin_strncpy_read_str,
5594 CONST_CAST (char *,
5595 TREE_STRING_POINTER (str)),
5596 MEM_ALIGN (target), false,
5597 exp_len > str_copy_len ? 1 : 0);
5598 if (exp_len > str_copy_len)
5599 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5600 GEN_INT (exp_len - str_copy_len),
5601 BLOCK_OP_NORMAL);
5602 return NULL_RTX;
5604 else
5606 rtx tmp_target;
5608 normal_expr:
5609 /* If we want to use a nontemporal or a reverse order store, force the
5610 value into a register first. */
5611 tmp_target = nontemporal || reverse ? NULL_RTX : target;
5612 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5613 (call_param_p
5614 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5615 &alt_rtl, false);
5618 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5619 the same as that of TARGET, adjust the constant. This is needed, for
5620 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5621 only a word-sized value. */
5622 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5623 && TREE_CODE (exp) != ERROR_MARK
5624 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5626 if (GET_MODE_CLASS (GET_MODE (target))
5627 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp)))
5628 && known_eq (GET_MODE_BITSIZE (GET_MODE (target)),
5629 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)))))
5631 rtx t = simplify_gen_subreg (GET_MODE (target), temp,
5632 TYPE_MODE (TREE_TYPE (exp)), 0);
5633 if (t)
5634 temp = t;
5636 if (GET_MODE (temp) == VOIDmode)
5637 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5638 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5641 /* If value was not generated in the target, store it there.
5642 Convert the value to TARGET's type first if necessary and emit the
5643 pending incrementations that have been queued when expanding EXP.
5644 Note that we cannot emit the whole queue blindly because this will
5645 effectively disable the POST_INC optimization later.
5647 If TEMP and TARGET compare equal according to rtx_equal_p, but
5648 one or both of them are volatile memory refs, we have to distinguish
5649 two cases:
5650 - expand_expr has used TARGET. In this case, we must not generate
5651 another copy. This can be detected by TARGET being equal according
5652 to == .
5653 - expand_expr has not used TARGET - that means that the source just
5654 happens to have the same RTX form. Since temp will have been created
5655 by expand_expr, it will compare unequal according to == .
5656 We must generate a copy in this case, to reach the correct number
5657 of volatile memory references. */
5659 if ((! rtx_equal_p (temp, target)
5660 || (temp != target && (side_effects_p (temp)
5661 || side_effects_p (target))))
5662 && TREE_CODE (exp) != ERROR_MARK
5663 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5664 but TARGET is not valid memory reference, TEMP will differ
5665 from TARGET although it is really the same location. */
5666 && !(alt_rtl
5667 && rtx_equal_p (alt_rtl, target)
5668 && !side_effects_p (alt_rtl)
5669 && !side_effects_p (target))
5670 /* If there's nothing to copy, don't bother. Don't call
5671 expr_size unless necessary, because some front-ends (C++)
5672 expr_size-hook must not be given objects that are not
5673 supposed to be bit-copied or bit-initialized. */
5674 && expr_size (exp) != const0_rtx)
5676 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5678 if (GET_MODE (target) == BLKmode)
5680 /* Handle calls that return BLKmode values in registers. */
5681 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5682 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5683 else
5684 store_bit_field (target,
5685 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5686 0, 0, 0, GET_MODE (temp), temp, reverse);
5688 else
5689 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5692 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5694 /* Handle copying a string constant into an array. The string
5695 constant may be shorter than the array. So copy just the string's
5696 actual length, and clear the rest. First get the size of the data
5697 type of the string, which is actually the size of the target. */
5698 rtx size = expr_size (exp);
5700 if (CONST_INT_P (size)
5701 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5702 emit_block_move (target, temp, size,
5703 (call_param_p
5704 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5705 else
5707 machine_mode pointer_mode
5708 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5709 machine_mode address_mode = get_address_mode (target);
5711 /* Compute the size of the data to copy from the string. */
5712 tree copy_size
5713 = size_binop_loc (loc, MIN_EXPR,
5714 make_tree (sizetype, size),
5715 size_int (TREE_STRING_LENGTH (exp)));
5716 rtx copy_size_rtx
5717 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5718 (call_param_p
5719 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5720 rtx_code_label *label = 0;
5722 /* Copy that much. */
5723 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5724 TYPE_UNSIGNED (sizetype));
5725 emit_block_move (target, temp, copy_size_rtx,
5726 (call_param_p
5727 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5729 /* Figure out how much is left in TARGET that we have to clear.
5730 Do all calculations in pointer_mode. */
5731 poly_int64 const_copy_size;
5732 if (poly_int_rtx_p (copy_size_rtx, &const_copy_size))
5734 size = plus_constant (address_mode, size, -const_copy_size);
5735 target = adjust_address (target, BLKmode, const_copy_size);
5737 else
5739 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5740 copy_size_rtx, NULL_RTX, 0,
5741 OPTAB_LIB_WIDEN);
5743 if (GET_MODE (copy_size_rtx) != address_mode)
5744 copy_size_rtx = convert_to_mode (address_mode,
5745 copy_size_rtx,
5746 TYPE_UNSIGNED (sizetype));
5748 target = offset_address (target, copy_size_rtx,
5749 highest_pow2_factor (copy_size));
5750 label = gen_label_rtx ();
5751 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5752 GET_MODE (size), 0, label);
5755 if (size != const0_rtx)
5756 clear_storage (target, size, BLOCK_OP_NORMAL);
5758 if (label)
5759 emit_label (label);
5762 /* Handle calls that return values in multiple non-contiguous locations.
5763 The Irix 6 ABI has examples of this. */
5764 else if (GET_CODE (target) == PARALLEL)
5766 if (GET_CODE (temp) == PARALLEL)
5767 emit_group_move (target, temp);
5768 else
5769 emit_group_load (target, temp, TREE_TYPE (exp),
5770 int_size_in_bytes (TREE_TYPE (exp)));
5772 else if (GET_CODE (temp) == PARALLEL)
5773 emit_group_store (target, temp, TREE_TYPE (exp),
5774 int_size_in_bytes (TREE_TYPE (exp)));
5775 else if (GET_MODE (temp) == BLKmode)
5776 emit_block_move (target, temp, expr_size (exp),
5777 (call_param_p
5778 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5779 /* If we emit a nontemporal store, there is nothing else to do. */
5780 else if (nontemporal && emit_storent_insn (target, temp))
5782 else
5784 if (reverse)
5785 temp = flip_storage_order (GET_MODE (target), temp);
5786 temp = force_operand (temp, target);
5787 if (temp != target)
5788 emit_move_insn (target, temp);
5792 return NULL_RTX;
5795 /* Return true if field F of structure TYPE is a flexible array. */
5797 static bool
5798 flexible_array_member_p (const_tree f, const_tree type)
5800 const_tree tf;
5802 tf = TREE_TYPE (f);
5803 return (DECL_CHAIN (f) == NULL
5804 && TREE_CODE (tf) == ARRAY_TYPE
5805 && TYPE_DOMAIN (tf)
5806 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5807 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5808 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5809 && int_size_in_bytes (type) >= 0);
5812 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5813 must have in order for it to completely initialize a value of type TYPE.
5814 Return -1 if the number isn't known.
5816 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5818 static HOST_WIDE_INT
5819 count_type_elements (const_tree type, bool for_ctor_p)
5821 switch (TREE_CODE (type))
5823 case ARRAY_TYPE:
5825 tree nelts;
5827 nelts = array_type_nelts (type);
5828 if (nelts && tree_fits_uhwi_p (nelts))
5830 unsigned HOST_WIDE_INT n;
5832 n = tree_to_uhwi (nelts) + 1;
5833 if (n == 0 || for_ctor_p)
5834 return n;
5835 else
5836 return n * count_type_elements (TREE_TYPE (type), false);
5838 return for_ctor_p ? -1 : 1;
5841 case RECORD_TYPE:
5843 unsigned HOST_WIDE_INT n;
5844 tree f;
5846 n = 0;
5847 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5848 if (TREE_CODE (f) == FIELD_DECL)
5850 if (!for_ctor_p)
5851 n += count_type_elements (TREE_TYPE (f), false);
5852 else if (!flexible_array_member_p (f, type))
5853 /* Don't count flexible arrays, which are not supposed
5854 to be initialized. */
5855 n += 1;
5858 return n;
5861 case UNION_TYPE:
5862 case QUAL_UNION_TYPE:
5864 tree f;
5865 HOST_WIDE_INT n, m;
5867 gcc_assert (!for_ctor_p);
5868 /* Estimate the number of scalars in each field and pick the
5869 maximum. Other estimates would do instead; the idea is simply
5870 to make sure that the estimate is not sensitive to the ordering
5871 of the fields. */
5872 n = 1;
5873 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5874 if (TREE_CODE (f) == FIELD_DECL)
5876 m = count_type_elements (TREE_TYPE (f), false);
5877 /* If the field doesn't span the whole union, add an extra
5878 scalar for the rest. */
5879 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5880 TYPE_SIZE (type)) != 1)
5881 m++;
5882 if (n < m)
5883 n = m;
5885 return n;
5888 case COMPLEX_TYPE:
5889 return 2;
5891 case VECTOR_TYPE:
5893 unsigned HOST_WIDE_INT nelts;
5894 if (TYPE_VECTOR_SUBPARTS (type).is_constant (&nelts))
5895 return nelts;
5896 else
5897 return -1;
5900 case INTEGER_TYPE:
5901 case REAL_TYPE:
5902 case FIXED_POINT_TYPE:
5903 case ENUMERAL_TYPE:
5904 case BOOLEAN_TYPE:
5905 case POINTER_TYPE:
5906 case OFFSET_TYPE:
5907 case REFERENCE_TYPE:
5908 case NULLPTR_TYPE:
5909 return 1;
5911 case ERROR_MARK:
5912 return 0;
5914 case VOID_TYPE:
5915 case METHOD_TYPE:
5916 case FUNCTION_TYPE:
5917 case LANG_TYPE:
5918 default:
5919 gcc_unreachable ();
5923 /* Helper for categorize_ctor_elements. Identical interface. */
5925 static bool
5926 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5927 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5929 unsigned HOST_WIDE_INT idx;
5930 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5931 tree value, purpose, elt_type;
5933 /* Whether CTOR is a valid constant initializer, in accordance with what
5934 initializer_constant_valid_p does. If inferred from the constructor
5935 elements, true until proven otherwise. */
5936 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5937 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5939 nz_elts = 0;
5940 init_elts = 0;
5941 num_fields = 0;
5942 elt_type = NULL_TREE;
5944 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5946 HOST_WIDE_INT mult = 1;
5948 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5950 tree lo_index = TREE_OPERAND (purpose, 0);
5951 tree hi_index = TREE_OPERAND (purpose, 1);
5953 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5954 mult = (tree_to_uhwi (hi_index)
5955 - tree_to_uhwi (lo_index) + 1);
5957 num_fields += mult;
5958 elt_type = TREE_TYPE (value);
5960 switch (TREE_CODE (value))
5962 case CONSTRUCTOR:
5964 HOST_WIDE_INT nz = 0, ic = 0;
5966 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5967 p_complete);
5969 nz_elts += mult * nz;
5970 init_elts += mult * ic;
5972 if (const_from_elts_p && const_p)
5973 const_p = const_elt_p;
5975 break;
5977 case INTEGER_CST:
5978 case REAL_CST:
5979 case FIXED_CST:
5980 if (!initializer_zerop (value))
5981 nz_elts += mult;
5982 init_elts += mult;
5983 break;
5985 case STRING_CST:
5986 nz_elts += mult * TREE_STRING_LENGTH (value);
5987 init_elts += mult * TREE_STRING_LENGTH (value);
5988 break;
5990 case COMPLEX_CST:
5991 if (!initializer_zerop (TREE_REALPART (value)))
5992 nz_elts += mult;
5993 if (!initializer_zerop (TREE_IMAGPART (value)))
5994 nz_elts += mult;
5995 init_elts += mult;
5996 break;
5998 case VECTOR_CST:
6000 /* We can only construct constant-length vectors using
6001 CONSTRUCTOR. */
6002 unsigned int nunits = VECTOR_CST_NELTS (value).to_constant ();
6003 for (unsigned int i = 0; i < nunits; ++i)
6005 tree v = VECTOR_CST_ELT (value, i);
6006 if (!initializer_zerop (v))
6007 nz_elts += mult;
6008 init_elts += mult;
6011 break;
6013 default:
6015 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
6016 nz_elts += mult * tc;
6017 init_elts += mult * tc;
6019 if (const_from_elts_p && const_p)
6020 const_p
6021 = initializer_constant_valid_p (value,
6022 elt_type,
6023 TYPE_REVERSE_STORAGE_ORDER
6024 (TREE_TYPE (ctor)))
6025 != NULL_TREE;
6027 break;
6031 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
6032 num_fields, elt_type))
6033 *p_complete = false;
6035 *p_nz_elts += nz_elts;
6036 *p_init_elts += init_elts;
6038 return const_p;
6041 /* Examine CTOR to discover:
6042 * how many scalar fields are set to nonzero values,
6043 and place it in *P_NZ_ELTS;
6044 * how many scalar fields in total are in CTOR,
6045 and place it in *P_ELT_COUNT.
6046 * whether the constructor is complete -- in the sense that every
6047 meaningful byte is explicitly given a value --
6048 and place it in *P_COMPLETE.
6050 Return whether or not CTOR is a valid static constant initializer, the same
6051 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6053 bool
6054 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
6055 HOST_WIDE_INT *p_init_elts, bool *p_complete)
6057 *p_nz_elts = 0;
6058 *p_init_elts = 0;
6059 *p_complete = true;
6061 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
6064 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6065 of which had type LAST_TYPE. Each element was itself a complete
6066 initializer, in the sense that every meaningful byte was explicitly
6067 given a value. Return true if the same is true for the constructor
6068 as a whole. */
6070 bool
6071 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
6072 const_tree last_type)
6074 if (TREE_CODE (type) == UNION_TYPE
6075 || TREE_CODE (type) == QUAL_UNION_TYPE)
6077 if (num_elts == 0)
6078 return false;
6080 gcc_assert (num_elts == 1 && last_type);
6082 /* ??? We could look at each element of the union, and find the
6083 largest element. Which would avoid comparing the size of the
6084 initialized element against any tail padding in the union.
6085 Doesn't seem worth the effort... */
6086 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
6089 return count_type_elements (type, true) == num_elts;
6092 /* Return 1 if EXP contains mostly (3/4) zeros. */
6094 static int
6095 mostly_zeros_p (const_tree exp)
6097 if (TREE_CODE (exp) == CONSTRUCTOR)
6099 HOST_WIDE_INT nz_elts, init_elts;
6100 bool complete_p;
6102 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
6103 return !complete_p || nz_elts < init_elts / 4;
6106 return initializer_zerop (exp);
6109 /* Return 1 if EXP contains all zeros. */
6111 static int
6112 all_zeros_p (const_tree exp)
6114 if (TREE_CODE (exp) == CONSTRUCTOR)
6116 HOST_WIDE_INT nz_elts, init_elts;
6117 bool complete_p;
6119 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
6120 return nz_elts == 0;
6123 return initializer_zerop (exp);
6126 /* Helper function for store_constructor.
6127 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6128 CLEARED is as for store_constructor.
6129 ALIAS_SET is the alias set to use for any stores.
6130 If REVERSE is true, the store is to be done in reverse order.
6132 This provides a recursive shortcut back to store_constructor when it isn't
6133 necessary to go through store_field. This is so that we can pass through
6134 the cleared field to let store_constructor know that we may not have to
6135 clear a substructure if the outer structure has already been cleared. */
6137 static void
6138 store_constructor_field (rtx target, poly_uint64 bitsize, poly_int64 bitpos,
6139 poly_uint64 bitregion_start,
6140 poly_uint64 bitregion_end,
6141 machine_mode mode,
6142 tree exp, int cleared,
6143 alias_set_type alias_set, bool reverse)
6145 poly_int64 bytepos;
6146 poly_uint64 bytesize;
6147 if (TREE_CODE (exp) == CONSTRUCTOR
6148 /* We can only call store_constructor recursively if the size and
6149 bit position are on a byte boundary. */
6150 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
6151 && maybe_ne (bitsize, 0U)
6152 && multiple_p (bitsize, BITS_PER_UNIT, &bytesize)
6153 /* If we have a nonzero bitpos for a register target, then we just
6154 let store_field do the bitfield handling. This is unlikely to
6155 generate unnecessary clear instructions anyways. */
6156 && (known_eq (bitpos, 0) || MEM_P (target)))
6158 if (MEM_P (target))
6160 machine_mode target_mode = GET_MODE (target);
6161 if (target_mode != BLKmode
6162 && !multiple_p (bitpos, GET_MODE_ALIGNMENT (target_mode)))
6163 target_mode = BLKmode;
6164 target = adjust_address (target, target_mode, bytepos);
6168 /* Update the alias set, if required. */
6169 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
6170 && MEM_ALIAS_SET (target) != 0)
6172 target = copy_rtx (target);
6173 set_mem_alias_set (target, alias_set);
6176 store_constructor (exp, target, cleared, bytesize, reverse);
6178 else
6179 store_field (target, bitsize, bitpos, bitregion_start, bitregion_end, mode,
6180 exp, alias_set, false, reverse);
6184 /* Returns the number of FIELD_DECLs in TYPE. */
6186 static int
6187 fields_length (const_tree type)
6189 tree t = TYPE_FIELDS (type);
6190 int count = 0;
6192 for (; t; t = DECL_CHAIN (t))
6193 if (TREE_CODE (t) == FIELD_DECL)
6194 ++count;
6196 return count;
6200 /* Store the value of constructor EXP into the rtx TARGET.
6201 TARGET is either a REG or a MEM; we know it cannot conflict, since
6202 safe_from_p has been called.
6203 CLEARED is true if TARGET is known to have been zero'd.
6204 SIZE is the number of bytes of TARGET we are allowed to modify: this
6205 may not be the same as the size of EXP if we are assigning to a field
6206 which has been packed to exclude padding bits.
6207 If REVERSE is true, the store is to be done in reverse order. */
6209 static void
6210 store_constructor (tree exp, rtx target, int cleared, poly_int64 size,
6211 bool reverse)
6213 tree type = TREE_TYPE (exp);
6214 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
6215 poly_int64 bitregion_end = known_gt (size, 0) ? size * BITS_PER_UNIT - 1 : 0;
6217 switch (TREE_CODE (type))
6219 case RECORD_TYPE:
6220 case UNION_TYPE:
6221 case QUAL_UNION_TYPE:
6223 unsigned HOST_WIDE_INT idx;
6224 tree field, value;
6226 /* The storage order is specified for every aggregate type. */
6227 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6229 /* If size is zero or the target is already cleared, do nothing. */
6230 if (known_eq (size, 0) || cleared)
6231 cleared = 1;
6232 /* We either clear the aggregate or indicate the value is dead. */
6233 else if ((TREE_CODE (type) == UNION_TYPE
6234 || TREE_CODE (type) == QUAL_UNION_TYPE)
6235 && ! CONSTRUCTOR_ELTS (exp))
6236 /* If the constructor is empty, clear the union. */
6238 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6239 cleared = 1;
6242 /* If we are building a static constructor into a register,
6243 set the initial value as zero so we can fold the value into
6244 a constant. But if more than one register is involved,
6245 this probably loses. */
6246 else if (REG_P (target) && TREE_STATIC (exp)
6247 && known_le (GET_MODE_SIZE (GET_MODE (target)),
6248 REGMODE_NATURAL_SIZE (GET_MODE (target))))
6250 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6251 cleared = 1;
6254 /* If the constructor has fewer fields than the structure or
6255 if we are initializing the structure to mostly zeros, clear
6256 the whole structure first. Don't do this if TARGET is a
6257 register whose mode size isn't equal to SIZE since
6258 clear_storage can't handle this case. */
6259 else if (known_size_p (size)
6260 && (((int) CONSTRUCTOR_NELTS (exp) != fields_length (type))
6261 || mostly_zeros_p (exp))
6262 && (!REG_P (target)
6263 || known_eq (GET_MODE_SIZE (GET_MODE (target)), size)))
6265 clear_storage (target, gen_int_mode (size, Pmode),
6266 BLOCK_OP_NORMAL);
6267 cleared = 1;
6270 if (REG_P (target) && !cleared)
6271 emit_clobber (target);
6273 /* Store each element of the constructor into the
6274 corresponding field of TARGET. */
6275 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6277 machine_mode mode;
6278 HOST_WIDE_INT bitsize;
6279 HOST_WIDE_INT bitpos = 0;
6280 tree offset;
6281 rtx to_rtx = target;
6283 /* Just ignore missing fields. We cleared the whole
6284 structure, above, if any fields are missing. */
6285 if (field == 0)
6286 continue;
6288 if (cleared && initializer_zerop (value))
6289 continue;
6291 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6292 bitsize = tree_to_uhwi (DECL_SIZE (field));
6293 else
6294 gcc_unreachable ();
6296 mode = DECL_MODE (field);
6297 if (DECL_BIT_FIELD (field))
6298 mode = VOIDmode;
6300 offset = DECL_FIELD_OFFSET (field);
6301 if (tree_fits_shwi_p (offset)
6302 && tree_fits_shwi_p (bit_position (field)))
6304 bitpos = int_bit_position (field);
6305 offset = NULL_TREE;
6307 else
6308 gcc_unreachable ();
6310 /* If this initializes a field that is smaller than a
6311 word, at the start of a word, try to widen it to a full
6312 word. This special case allows us to output C++ member
6313 function initializations in a form that the optimizers
6314 can understand. */
6315 if (WORD_REGISTER_OPERATIONS
6316 && REG_P (target)
6317 && bitsize < BITS_PER_WORD
6318 && bitpos % BITS_PER_WORD == 0
6319 && GET_MODE_CLASS (mode) == MODE_INT
6320 && TREE_CODE (value) == INTEGER_CST
6321 && exp_size >= 0
6322 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6324 tree type = TREE_TYPE (value);
6326 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6328 type = lang_hooks.types.type_for_mode
6329 (word_mode, TYPE_UNSIGNED (type));
6330 value = fold_convert (type, value);
6331 /* Make sure the bits beyond the original bitsize are zero
6332 so that we can correctly avoid extra zeroing stores in
6333 later constructor elements. */
6334 tree bitsize_mask
6335 = wide_int_to_tree (type, wi::mask (bitsize, false,
6336 BITS_PER_WORD));
6337 value = fold_build2 (BIT_AND_EXPR, type, value, bitsize_mask);
6340 if (BYTES_BIG_ENDIAN)
6341 value
6342 = fold_build2 (LSHIFT_EXPR, type, value,
6343 build_int_cst (type,
6344 BITS_PER_WORD - bitsize));
6345 bitsize = BITS_PER_WORD;
6346 mode = word_mode;
6349 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6350 && DECL_NONADDRESSABLE_P (field))
6352 to_rtx = copy_rtx (to_rtx);
6353 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6356 store_constructor_field (to_rtx, bitsize, bitpos,
6357 0, bitregion_end, mode,
6358 value, cleared,
6359 get_alias_set (TREE_TYPE (field)),
6360 reverse);
6362 break;
6364 case ARRAY_TYPE:
6366 tree value, index;
6367 unsigned HOST_WIDE_INT i;
6368 int need_to_clear;
6369 tree domain;
6370 tree elttype = TREE_TYPE (type);
6371 int const_bounds_p;
6372 HOST_WIDE_INT minelt = 0;
6373 HOST_WIDE_INT maxelt = 0;
6375 /* The storage order is specified for every aggregate type. */
6376 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6378 domain = TYPE_DOMAIN (type);
6379 const_bounds_p = (TYPE_MIN_VALUE (domain)
6380 && TYPE_MAX_VALUE (domain)
6381 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6382 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6384 /* If we have constant bounds for the range of the type, get them. */
6385 if (const_bounds_p)
6387 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6388 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6391 /* If the constructor has fewer elements than the array, clear
6392 the whole array first. Similarly if this is static
6393 constructor of a non-BLKmode object. */
6394 if (cleared)
6395 need_to_clear = 0;
6396 else if (REG_P (target) && TREE_STATIC (exp))
6397 need_to_clear = 1;
6398 else
6400 unsigned HOST_WIDE_INT idx;
6401 tree index, value;
6402 HOST_WIDE_INT count = 0, zero_count = 0;
6403 need_to_clear = ! const_bounds_p;
6405 /* This loop is a more accurate version of the loop in
6406 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6407 is also needed to check for missing elements. */
6408 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6410 HOST_WIDE_INT this_node_count;
6412 if (need_to_clear)
6413 break;
6415 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6417 tree lo_index = TREE_OPERAND (index, 0);
6418 tree hi_index = TREE_OPERAND (index, 1);
6420 if (! tree_fits_uhwi_p (lo_index)
6421 || ! tree_fits_uhwi_p (hi_index))
6423 need_to_clear = 1;
6424 break;
6427 this_node_count = (tree_to_uhwi (hi_index)
6428 - tree_to_uhwi (lo_index) + 1);
6430 else
6431 this_node_count = 1;
6433 count += this_node_count;
6434 if (mostly_zeros_p (value))
6435 zero_count += this_node_count;
6438 /* Clear the entire array first if there are any missing
6439 elements, or if the incidence of zero elements is >=
6440 75%. */
6441 if (! need_to_clear
6442 && (count < maxelt - minelt + 1
6443 || 4 * zero_count >= 3 * count))
6444 need_to_clear = 1;
6447 if (need_to_clear && maybe_gt (size, 0))
6449 if (REG_P (target))
6450 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6451 else
6452 clear_storage (target, gen_int_mode (size, Pmode),
6453 BLOCK_OP_NORMAL);
6454 cleared = 1;
6457 if (!cleared && REG_P (target))
6458 /* Inform later passes that the old value is dead. */
6459 emit_clobber (target);
6461 /* Store each element of the constructor into the
6462 corresponding element of TARGET, determined by counting the
6463 elements. */
6464 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6466 machine_mode mode;
6467 poly_int64 bitsize;
6468 HOST_WIDE_INT bitpos;
6469 rtx xtarget = target;
6471 if (cleared && initializer_zerop (value))
6472 continue;
6474 mode = TYPE_MODE (elttype);
6475 if (mode != BLKmode)
6476 bitsize = GET_MODE_BITSIZE (mode);
6477 else if (!poly_int_tree_p (TYPE_SIZE (elttype), &bitsize))
6478 bitsize = -1;
6480 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6482 tree lo_index = TREE_OPERAND (index, 0);
6483 tree hi_index = TREE_OPERAND (index, 1);
6484 rtx index_r, pos_rtx;
6485 HOST_WIDE_INT lo, hi, count;
6486 tree position;
6488 /* If the range is constant and "small", unroll the loop. */
6489 if (const_bounds_p
6490 && tree_fits_shwi_p (lo_index)
6491 && tree_fits_shwi_p (hi_index)
6492 && (lo = tree_to_shwi (lo_index),
6493 hi = tree_to_shwi (hi_index),
6494 count = hi - lo + 1,
6495 (!MEM_P (target)
6496 || count <= 2
6497 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6498 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6499 <= 40 * 8)))))
6501 lo -= minelt; hi -= minelt;
6502 for (; lo <= hi; lo++)
6504 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6506 if (MEM_P (target)
6507 && !MEM_KEEP_ALIAS_SET_P (target)
6508 && TREE_CODE (type) == ARRAY_TYPE
6509 && TYPE_NONALIASED_COMPONENT (type))
6511 target = copy_rtx (target);
6512 MEM_KEEP_ALIAS_SET_P (target) = 1;
6515 store_constructor_field
6516 (target, bitsize, bitpos, 0, bitregion_end,
6517 mode, value, cleared,
6518 get_alias_set (elttype), reverse);
6521 else
6523 rtx_code_label *loop_start = gen_label_rtx ();
6524 rtx_code_label *loop_end = gen_label_rtx ();
6525 tree exit_cond;
6527 expand_normal (hi_index);
6529 index = build_decl (EXPR_LOCATION (exp),
6530 VAR_DECL, NULL_TREE, domain);
6531 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6532 SET_DECL_RTL (index, index_r);
6533 store_expr (lo_index, index_r, 0, false, reverse);
6535 /* Build the head of the loop. */
6536 do_pending_stack_adjust ();
6537 emit_label (loop_start);
6539 /* Assign value to element index. */
6540 position =
6541 fold_convert (ssizetype,
6542 fold_build2 (MINUS_EXPR,
6543 TREE_TYPE (index),
6544 index,
6545 TYPE_MIN_VALUE (domain)));
6547 position =
6548 size_binop (MULT_EXPR, position,
6549 fold_convert (ssizetype,
6550 TYPE_SIZE_UNIT (elttype)));
6552 pos_rtx = expand_normal (position);
6553 xtarget = offset_address (target, pos_rtx,
6554 highest_pow2_factor (position));
6555 xtarget = adjust_address (xtarget, mode, 0);
6556 if (TREE_CODE (value) == CONSTRUCTOR)
6557 store_constructor (value, xtarget, cleared,
6558 exact_div (bitsize, BITS_PER_UNIT),
6559 reverse);
6560 else
6561 store_expr (value, xtarget, 0, false, reverse);
6563 /* Generate a conditional jump to exit the loop. */
6564 exit_cond = build2 (LT_EXPR, integer_type_node,
6565 index, hi_index);
6566 jumpif (exit_cond, loop_end,
6567 profile_probability::uninitialized ());
6569 /* Update the loop counter, and jump to the head of
6570 the loop. */
6571 expand_assignment (index,
6572 build2 (PLUS_EXPR, TREE_TYPE (index),
6573 index, integer_one_node),
6574 false);
6576 emit_jump (loop_start);
6578 /* Build the end of the loop. */
6579 emit_label (loop_end);
6582 else if ((index != 0 && ! tree_fits_shwi_p (index))
6583 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6585 tree position;
6587 if (index == 0)
6588 index = ssize_int (1);
6590 if (minelt)
6591 index = fold_convert (ssizetype,
6592 fold_build2 (MINUS_EXPR,
6593 TREE_TYPE (index),
6594 index,
6595 TYPE_MIN_VALUE (domain)));
6597 position =
6598 size_binop (MULT_EXPR, index,
6599 fold_convert (ssizetype,
6600 TYPE_SIZE_UNIT (elttype)));
6601 xtarget = offset_address (target,
6602 expand_normal (position),
6603 highest_pow2_factor (position));
6604 xtarget = adjust_address (xtarget, mode, 0);
6605 store_expr (value, xtarget, 0, false, reverse);
6607 else
6609 if (index != 0)
6610 bitpos = ((tree_to_shwi (index) - minelt)
6611 * tree_to_uhwi (TYPE_SIZE (elttype)));
6612 else
6613 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6615 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6616 && TREE_CODE (type) == ARRAY_TYPE
6617 && TYPE_NONALIASED_COMPONENT (type))
6619 target = copy_rtx (target);
6620 MEM_KEEP_ALIAS_SET_P (target) = 1;
6622 store_constructor_field (target, bitsize, bitpos, 0,
6623 bitregion_end, mode, value,
6624 cleared, get_alias_set (elttype),
6625 reverse);
6628 break;
6631 case VECTOR_TYPE:
6633 unsigned HOST_WIDE_INT idx;
6634 constructor_elt *ce;
6635 int i;
6636 int need_to_clear;
6637 insn_code icode = CODE_FOR_nothing;
6638 tree elt;
6639 tree elttype = TREE_TYPE (type);
6640 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6641 machine_mode eltmode = TYPE_MODE (elttype);
6642 HOST_WIDE_INT bitsize;
6643 HOST_WIDE_INT bitpos;
6644 rtvec vector = NULL;
6645 poly_uint64 n_elts;
6646 unsigned HOST_WIDE_INT const_n_elts;
6647 alias_set_type alias;
6648 bool vec_vec_init_p = false;
6649 machine_mode mode = GET_MODE (target);
6651 gcc_assert (eltmode != BLKmode);
6653 /* Try using vec_duplicate_optab for uniform vectors. */
6654 if (!TREE_SIDE_EFFECTS (exp)
6655 && VECTOR_MODE_P (mode)
6656 && eltmode == GET_MODE_INNER (mode)
6657 && ((icode = optab_handler (vec_duplicate_optab, mode))
6658 != CODE_FOR_nothing)
6659 && (elt = uniform_vector_p (exp)))
6661 struct expand_operand ops[2];
6662 create_output_operand (&ops[0], target, mode);
6663 create_input_operand (&ops[1], expand_normal (elt), eltmode);
6664 expand_insn (icode, 2, ops);
6665 if (!rtx_equal_p (target, ops[0].value))
6666 emit_move_insn (target, ops[0].value);
6667 break;
6670 n_elts = TYPE_VECTOR_SUBPARTS (type);
6671 if (REG_P (target)
6672 && VECTOR_MODE_P (mode)
6673 && n_elts.is_constant (&const_n_elts))
6675 machine_mode emode = eltmode;
6677 if (CONSTRUCTOR_NELTS (exp)
6678 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value))
6679 == VECTOR_TYPE))
6681 tree etype = TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value);
6682 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp)
6683 * TYPE_VECTOR_SUBPARTS (etype),
6684 n_elts));
6685 emode = TYPE_MODE (etype);
6687 icode = convert_optab_handler (vec_init_optab, mode, emode);
6688 if (icode != CODE_FOR_nothing)
6690 unsigned int i, n = const_n_elts;
6692 if (emode != eltmode)
6694 n = CONSTRUCTOR_NELTS (exp);
6695 vec_vec_init_p = true;
6697 vector = rtvec_alloc (n);
6698 for (i = 0; i < n; i++)
6699 RTVEC_ELT (vector, i) = CONST0_RTX (emode);
6703 /* If the constructor has fewer elements than the vector,
6704 clear the whole array first. Similarly if this is static
6705 constructor of a non-BLKmode object. */
6706 if (cleared)
6707 need_to_clear = 0;
6708 else if (REG_P (target) && TREE_STATIC (exp))
6709 need_to_clear = 1;
6710 else
6712 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6713 tree value;
6715 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6717 tree sz = TYPE_SIZE (TREE_TYPE (value));
6718 int n_elts_here
6719 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR, sz,
6720 TYPE_SIZE (elttype)));
6722 count += n_elts_here;
6723 if (mostly_zeros_p (value))
6724 zero_count += n_elts_here;
6727 /* Clear the entire vector first if there are any missing elements,
6728 or if the incidence of zero elements is >= 75%. */
6729 need_to_clear = (maybe_lt (count, n_elts)
6730 || 4 * zero_count >= 3 * count);
6733 if (need_to_clear && maybe_gt (size, 0) && !vector)
6735 if (REG_P (target))
6736 emit_move_insn (target, CONST0_RTX (mode));
6737 else
6738 clear_storage (target, gen_int_mode (size, Pmode),
6739 BLOCK_OP_NORMAL);
6740 cleared = 1;
6743 /* Inform later passes that the old value is dead. */
6744 if (!cleared && !vector && REG_P (target))
6745 emit_move_insn (target, CONST0_RTX (mode));
6747 if (MEM_P (target))
6748 alias = MEM_ALIAS_SET (target);
6749 else
6750 alias = get_alias_set (elttype);
6752 /* Store each element of the constructor into the corresponding
6753 element of TARGET, determined by counting the elements. */
6754 for (idx = 0, i = 0;
6755 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6756 idx++, i += bitsize / elt_size)
6758 HOST_WIDE_INT eltpos;
6759 tree value = ce->value;
6761 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6762 if (cleared && initializer_zerop (value))
6763 continue;
6765 if (ce->index)
6766 eltpos = tree_to_uhwi (ce->index);
6767 else
6768 eltpos = i;
6770 if (vector)
6772 if (vec_vec_init_p)
6774 gcc_assert (ce->index == NULL_TREE);
6775 gcc_assert (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE);
6776 eltpos = idx;
6778 else
6779 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6780 RTVEC_ELT (vector, eltpos) = expand_normal (value);
6782 else
6784 machine_mode value_mode
6785 = (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6786 ? TYPE_MODE (TREE_TYPE (value)) : eltmode);
6787 bitpos = eltpos * elt_size;
6788 store_constructor_field (target, bitsize, bitpos, 0,
6789 bitregion_end, value_mode,
6790 value, cleared, alias, reverse);
6794 if (vector)
6795 emit_insn (GEN_FCN (icode) (target,
6796 gen_rtx_PARALLEL (mode, vector)));
6797 break;
6800 default:
6801 gcc_unreachable ();
6805 /* Store the value of EXP (an expression tree)
6806 into a subfield of TARGET which has mode MODE and occupies
6807 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6808 If MODE is VOIDmode, it means that we are storing into a bit-field.
6810 BITREGION_START is bitpos of the first bitfield in this region.
6811 BITREGION_END is the bitpos of the ending bitfield in this region.
6812 These two fields are 0, if the C++ memory model does not apply,
6813 or we are not interested in keeping track of bitfield regions.
6815 Always return const0_rtx unless we have something particular to
6816 return.
6818 ALIAS_SET is the alias set for the destination. This value will
6819 (in general) be different from that for TARGET, since TARGET is a
6820 reference to the containing structure.
6822 If NONTEMPORAL is true, try generating a nontemporal store.
6824 If REVERSE is true, the store is to be done in reverse order. */
6826 static rtx
6827 store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos,
6828 poly_uint64 bitregion_start, poly_uint64 bitregion_end,
6829 machine_mode mode, tree exp,
6830 alias_set_type alias_set, bool nontemporal, bool reverse)
6832 if (TREE_CODE (exp) == ERROR_MARK)
6833 return const0_rtx;
6835 /* If we have nothing to store, do nothing unless the expression has
6836 side-effects. Don't do that for zero sized addressable lhs of
6837 calls. */
6838 if (known_eq (bitsize, 0)
6839 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
6840 || TREE_CODE (exp) != CALL_EXPR))
6841 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6843 if (GET_CODE (target) == CONCAT)
6845 /* We're storing into a struct containing a single __complex. */
6847 gcc_assert (known_eq (bitpos, 0));
6848 return store_expr (exp, target, 0, nontemporal, reverse);
6851 /* If the structure is in a register or if the component
6852 is a bit field, we cannot use addressing to access it.
6853 Use bit-field techniques or SUBREG to store in it. */
6855 poly_int64 decl_bitsize;
6856 if (mode == VOIDmode
6857 || (mode != BLKmode && ! direct_store[(int) mode]
6858 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6859 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6860 || REG_P (target)
6861 || GET_CODE (target) == SUBREG
6862 /* If the field isn't aligned enough to store as an ordinary memref,
6863 store it as a bit field. */
6864 || (mode != BLKmode
6865 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6866 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode)))
6867 && targetm.slow_unaligned_access (mode, MEM_ALIGN (target)))
6868 || !multiple_p (bitpos, BITS_PER_UNIT)))
6869 || (known_size_p (bitsize)
6870 && mode != BLKmode
6871 && maybe_gt (GET_MODE_BITSIZE (mode), bitsize))
6872 /* If the RHS and field are a constant size and the size of the
6873 RHS isn't the same size as the bitfield, we must use bitfield
6874 operations. */
6875 || (known_size_p (bitsize)
6876 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp)))
6877 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))),
6878 bitsize)
6879 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6880 we will handle specially below. */
6881 && !(TREE_CODE (exp) == CONSTRUCTOR
6882 && multiple_p (bitsize, BITS_PER_UNIT))
6883 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6884 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6885 includes some extra padding. store_expr / expand_expr will in
6886 that case call get_inner_reference that will have the bitsize
6887 we check here and thus the block move will not clobber the
6888 padding that shouldn't be clobbered. In the future we could
6889 replace the TREE_ADDRESSABLE check with a check that
6890 get_base_address needs to live in memory. */
6891 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
6892 || TREE_CODE (exp) != COMPONENT_REF
6893 || !multiple_p (bitsize, BITS_PER_UNIT)
6894 || !multiple_p (bitpos, BITS_PER_UNIT)
6895 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp, 1)),
6896 &decl_bitsize)
6897 || maybe_ne (decl_bitsize, bitsize)))
6898 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6899 decl we must use bitfield operations. */
6900 || (known_size_p (bitsize)
6901 && TREE_CODE (exp) == MEM_REF
6902 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6903 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6904 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6905 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6907 rtx temp;
6908 gimple *nop_def;
6910 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6911 implies a mask operation. If the precision is the same size as
6912 the field we're storing into, that mask is redundant. This is
6913 particularly common with bit field assignments generated by the
6914 C front end. */
6915 nop_def = get_def_for_expr (exp, NOP_EXPR);
6916 if (nop_def)
6918 tree type = TREE_TYPE (exp);
6919 if (INTEGRAL_TYPE_P (type)
6920 && maybe_ne (TYPE_PRECISION (type),
6921 GET_MODE_BITSIZE (TYPE_MODE (type)))
6922 && known_eq (bitsize, TYPE_PRECISION (type)))
6924 tree op = gimple_assign_rhs1 (nop_def);
6925 type = TREE_TYPE (op);
6926 if (INTEGRAL_TYPE_P (type)
6927 && known_ge (TYPE_PRECISION (type), bitsize))
6928 exp = op;
6932 temp = expand_normal (exp);
6934 /* We don't support variable-sized BLKmode bitfields, since our
6935 handling of BLKmode is bound up with the ability to break
6936 things into words. */
6937 gcc_assert (mode != BLKmode || bitsize.is_constant ());
6939 /* Handle calls that return values in multiple non-contiguous locations.
6940 The Irix 6 ABI has examples of this. */
6941 if (GET_CODE (temp) == PARALLEL)
6943 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6944 machine_mode temp_mode = GET_MODE (temp);
6945 if (temp_mode == BLKmode || temp_mode == VOIDmode)
6946 temp_mode = smallest_int_mode_for_size (size * BITS_PER_UNIT);
6947 rtx temp_target = gen_reg_rtx (temp_mode);
6948 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6949 temp = temp_target;
6952 /* Handle calls that return BLKmode values in registers. */
6953 else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6955 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6956 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6957 temp = temp_target;
6960 /* If the value has aggregate type and an integral mode then, if BITSIZE
6961 is narrower than this mode and this is for big-endian data, we first
6962 need to put the value into the low-order bits for store_bit_field,
6963 except when MODE is BLKmode and BITSIZE larger than the word size
6964 (see the handling of fields larger than a word in store_bit_field).
6965 Moreover, the field may be not aligned on a byte boundary; in this
6966 case, if it has reverse storage order, it needs to be accessed as a
6967 scalar field with reverse storage order and we must first put the
6968 value into target order. */
6969 scalar_int_mode temp_mode;
6970 if (AGGREGATE_TYPE_P (TREE_TYPE (exp))
6971 && is_int_mode (GET_MODE (temp), &temp_mode))
6973 HOST_WIDE_INT size = GET_MODE_BITSIZE (temp_mode);
6975 reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp));
6977 if (reverse)
6978 temp = flip_storage_order (temp_mode, temp);
6980 gcc_checking_assert (known_le (bitsize, size));
6981 if (maybe_lt (bitsize, size)
6982 && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN
6983 /* Use of to_constant for BLKmode was checked above. */
6984 && !(mode == BLKmode && bitsize.to_constant () > BITS_PER_WORD))
6985 temp = expand_shift (RSHIFT_EXPR, temp_mode, temp,
6986 size - bitsize, NULL_RTX, 1);
6989 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6990 if (mode != VOIDmode && mode != BLKmode
6991 && mode != TYPE_MODE (TREE_TYPE (exp)))
6992 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6994 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
6995 and BITPOS must be aligned on a byte boundary. If so, we simply do
6996 a block copy. Likewise for a BLKmode-like TARGET. */
6997 if (GET_MODE (temp) == BLKmode
6998 && (GET_MODE (target) == BLKmode
6999 || (MEM_P (target)
7000 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
7001 && multiple_p (bitpos, BITS_PER_UNIT)
7002 && multiple_p (bitsize, BITS_PER_UNIT))))
7004 gcc_assert (MEM_P (target) && MEM_P (temp));
7005 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT);
7006 poly_int64 bytesize = bits_to_bytes_round_up (bitsize);
7008 target = adjust_address (target, VOIDmode, bytepos);
7009 emit_block_move (target, temp,
7010 gen_int_mode (bytesize, Pmode),
7011 BLOCK_OP_NORMAL);
7013 return const0_rtx;
7016 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7017 word size, we need to load the value (see again store_bit_field). */
7018 if (GET_MODE (temp) == BLKmode && known_le (bitsize, BITS_PER_WORD))
7020 scalar_int_mode temp_mode = smallest_int_mode_for_size (bitsize);
7021 temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode,
7022 temp_mode, false, NULL);
7025 /* Store the value in the bitfield. */
7026 store_bit_field (target, bitsize, bitpos,
7027 bitregion_start, bitregion_end,
7028 mode, temp, reverse);
7030 return const0_rtx;
7032 else
7034 /* Now build a reference to just the desired component. */
7035 rtx to_rtx = adjust_address (target, mode,
7036 exact_div (bitpos, BITS_PER_UNIT));
7038 if (to_rtx == target)
7039 to_rtx = copy_rtx (to_rtx);
7041 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
7042 set_mem_alias_set (to_rtx, alias_set);
7044 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7045 into a target smaller than its type; handle that case now. */
7046 if (TREE_CODE (exp) == CONSTRUCTOR && known_size_p (bitsize))
7048 poly_int64 bytesize = exact_div (bitsize, BITS_PER_UNIT);
7049 store_constructor (exp, to_rtx, 0, bytesize, reverse);
7050 return to_rtx;
7053 return store_expr (exp, to_rtx, 0, nontemporal, reverse);
7057 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7058 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7059 codes and find the ultimate containing object, which we return.
7061 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7062 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7063 storage order of the field.
7064 If the position of the field is variable, we store a tree
7065 giving the variable offset (in units) in *POFFSET.
7066 This offset is in addition to the bit position.
7067 If the position is not variable, we store 0 in *POFFSET.
7069 If any of the extraction expressions is volatile,
7070 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7072 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7073 Otherwise, it is a mode that can be used to access the field.
7075 If the field describes a variable-sized object, *PMODE is set to
7076 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7077 this case, but the address of the object can be found. */
7079 tree
7080 get_inner_reference (tree exp, poly_int64_pod *pbitsize,
7081 poly_int64_pod *pbitpos, tree *poffset,
7082 machine_mode *pmode, int *punsignedp,
7083 int *preversep, int *pvolatilep)
7085 tree size_tree = 0;
7086 machine_mode mode = VOIDmode;
7087 bool blkmode_bitfield = false;
7088 tree offset = size_zero_node;
7089 poly_offset_int bit_offset = 0;
7091 /* First get the mode, signedness, storage order and size. We do this from
7092 just the outermost expression. */
7093 *pbitsize = -1;
7094 if (TREE_CODE (exp) == COMPONENT_REF)
7096 tree field = TREE_OPERAND (exp, 1);
7097 size_tree = DECL_SIZE (field);
7098 if (flag_strict_volatile_bitfields > 0
7099 && TREE_THIS_VOLATILE (exp)
7100 && DECL_BIT_FIELD_TYPE (field)
7101 && DECL_MODE (field) != BLKmode)
7102 /* Volatile bitfields should be accessed in the mode of the
7103 field's type, not the mode computed based on the bit
7104 size. */
7105 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
7106 else if (!DECL_BIT_FIELD (field))
7108 mode = DECL_MODE (field);
7109 /* For vector fields re-check the target flags, as DECL_MODE
7110 could have been set with different target flags than
7111 the current function has. */
7112 if (mode == BLKmode
7113 && VECTOR_TYPE_P (TREE_TYPE (field))
7114 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field))))
7115 mode = TYPE_MODE (TREE_TYPE (field));
7117 else if (DECL_MODE (field) == BLKmode)
7118 blkmode_bitfield = true;
7120 *punsignedp = DECL_UNSIGNED (field);
7122 else if (TREE_CODE (exp) == BIT_FIELD_REF)
7124 size_tree = TREE_OPERAND (exp, 1);
7125 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
7126 || TYPE_UNSIGNED (TREE_TYPE (exp)));
7128 /* For vector types, with the correct size of access, use the mode of
7129 inner type. */
7130 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
7131 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
7132 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
7133 mode = TYPE_MODE (TREE_TYPE (exp));
7135 else
7137 mode = TYPE_MODE (TREE_TYPE (exp));
7138 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
7140 if (mode == BLKmode)
7141 size_tree = TYPE_SIZE (TREE_TYPE (exp));
7142 else
7143 *pbitsize = GET_MODE_BITSIZE (mode);
7146 if (size_tree != 0)
7148 if (! tree_fits_uhwi_p (size_tree))
7149 mode = BLKmode, *pbitsize = -1;
7150 else
7151 *pbitsize = tree_to_uhwi (size_tree);
7154 *preversep = reverse_storage_order_for_component_p (exp);
7156 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7157 and find the ultimate containing object. */
7158 while (1)
7160 switch (TREE_CODE (exp))
7162 case BIT_FIELD_REF:
7163 bit_offset += wi::to_poly_offset (TREE_OPERAND (exp, 2));
7164 break;
7166 case COMPONENT_REF:
7168 tree field = TREE_OPERAND (exp, 1);
7169 tree this_offset = component_ref_field_offset (exp);
7171 /* If this field hasn't been filled in yet, don't go past it.
7172 This should only happen when folding expressions made during
7173 type construction. */
7174 if (this_offset == 0)
7175 break;
7177 offset = size_binop (PLUS_EXPR, offset, this_offset);
7178 bit_offset += wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field));
7180 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7182 break;
7184 case ARRAY_REF:
7185 case ARRAY_RANGE_REF:
7187 tree index = TREE_OPERAND (exp, 1);
7188 tree low_bound = array_ref_low_bound (exp);
7189 tree unit_size = array_ref_element_size (exp);
7191 /* We assume all arrays have sizes that are a multiple of a byte.
7192 First subtract the lower bound, if any, in the type of the
7193 index, then convert to sizetype and multiply by the size of
7194 the array element. */
7195 if (! integer_zerop (low_bound))
7196 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
7197 index, low_bound);
7199 offset = size_binop (PLUS_EXPR, offset,
7200 size_binop (MULT_EXPR,
7201 fold_convert (sizetype, index),
7202 unit_size));
7204 break;
7206 case REALPART_EXPR:
7207 break;
7209 case IMAGPART_EXPR:
7210 bit_offset += *pbitsize;
7211 break;
7213 case VIEW_CONVERT_EXPR:
7214 break;
7216 case MEM_REF:
7217 /* Hand back the decl for MEM[&decl, off]. */
7218 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
7220 tree off = TREE_OPERAND (exp, 1);
7221 if (!integer_zerop (off))
7223 poly_offset_int boff = mem_ref_offset (exp);
7224 boff <<= LOG2_BITS_PER_UNIT;
7225 bit_offset += boff;
7227 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7229 goto done;
7231 default:
7232 goto done;
7235 /* If any reference in the chain is volatile, the effect is volatile. */
7236 if (TREE_THIS_VOLATILE (exp))
7237 *pvolatilep = 1;
7239 exp = TREE_OPERAND (exp, 0);
7241 done:
7243 /* If OFFSET is constant, see if we can return the whole thing as a
7244 constant bit position. Make sure to handle overflow during
7245 this conversion. */
7246 if (poly_int_tree_p (offset))
7248 poly_offset_int tem = wi::sext (wi::to_poly_offset (offset),
7249 TYPE_PRECISION (sizetype));
7250 tem <<= LOG2_BITS_PER_UNIT;
7251 tem += bit_offset;
7252 if (tem.to_shwi (pbitpos))
7253 *poffset = offset = NULL_TREE;
7256 /* Otherwise, split it up. */
7257 if (offset)
7259 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7260 if (!bit_offset.to_shwi (pbitpos) || maybe_lt (*pbitpos, 0))
7262 *pbitpos = num_trailing_bits (bit_offset.force_shwi ());
7263 poly_offset_int bytes = bits_to_bytes_round_down (bit_offset);
7264 offset = size_binop (PLUS_EXPR, offset,
7265 build_int_cst (sizetype, bytes.force_shwi ()));
7268 *poffset = offset;
7271 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7272 if (mode == VOIDmode
7273 && blkmode_bitfield
7274 && multiple_p (*pbitpos, BITS_PER_UNIT)
7275 && multiple_p (*pbitsize, BITS_PER_UNIT))
7276 *pmode = BLKmode;
7277 else
7278 *pmode = mode;
7280 return exp;
7283 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7285 static unsigned HOST_WIDE_INT
7286 target_align (const_tree target)
7288 /* We might have a chain of nested references with intermediate misaligning
7289 bitfields components, so need to recurse to find out. */
7291 unsigned HOST_WIDE_INT this_align, outer_align;
7293 switch (TREE_CODE (target))
7295 case BIT_FIELD_REF:
7296 return 1;
7298 case COMPONENT_REF:
7299 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7300 outer_align = target_align (TREE_OPERAND (target, 0));
7301 return MIN (this_align, outer_align);
7303 case ARRAY_REF:
7304 case ARRAY_RANGE_REF:
7305 this_align = TYPE_ALIGN (TREE_TYPE (target));
7306 outer_align = target_align (TREE_OPERAND (target, 0));
7307 return MIN (this_align, outer_align);
7309 CASE_CONVERT:
7310 case NON_LVALUE_EXPR:
7311 case VIEW_CONVERT_EXPR:
7312 this_align = TYPE_ALIGN (TREE_TYPE (target));
7313 outer_align = target_align (TREE_OPERAND (target, 0));
7314 return MAX (this_align, outer_align);
7316 default:
7317 return TYPE_ALIGN (TREE_TYPE (target));
7322 /* Given an rtx VALUE that may contain additions and multiplications, return
7323 an equivalent value that just refers to a register, memory, or constant.
7324 This is done by generating instructions to perform the arithmetic and
7325 returning a pseudo-register containing the value.
7327 The returned value may be a REG, SUBREG, MEM or constant. */
7330 force_operand (rtx value, rtx target)
7332 rtx op1, op2;
7333 /* Use subtarget as the target for operand 0 of a binary operation. */
7334 rtx subtarget = get_subtarget (target);
7335 enum rtx_code code = GET_CODE (value);
7337 /* Check for subreg applied to an expression produced by loop optimizer. */
7338 if (code == SUBREG
7339 && !REG_P (SUBREG_REG (value))
7340 && !MEM_P (SUBREG_REG (value)))
7342 value
7343 = simplify_gen_subreg (GET_MODE (value),
7344 force_reg (GET_MODE (SUBREG_REG (value)),
7345 force_operand (SUBREG_REG (value),
7346 NULL_RTX)),
7347 GET_MODE (SUBREG_REG (value)),
7348 SUBREG_BYTE (value));
7349 code = GET_CODE (value);
7352 /* Check for a PIC address load. */
7353 if ((code == PLUS || code == MINUS)
7354 && XEXP (value, 0) == pic_offset_table_rtx
7355 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7356 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7357 || GET_CODE (XEXP (value, 1)) == CONST))
7359 if (!subtarget)
7360 subtarget = gen_reg_rtx (GET_MODE (value));
7361 emit_move_insn (subtarget, value);
7362 return subtarget;
7365 if (ARITHMETIC_P (value))
7367 op2 = XEXP (value, 1);
7368 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7369 subtarget = 0;
7370 if (code == MINUS && CONST_INT_P (op2))
7372 code = PLUS;
7373 op2 = negate_rtx (GET_MODE (value), op2);
7376 /* Check for an addition with OP2 a constant integer and our first
7377 operand a PLUS of a virtual register and something else. In that
7378 case, we want to emit the sum of the virtual register and the
7379 constant first and then add the other value. This allows virtual
7380 register instantiation to simply modify the constant rather than
7381 creating another one around this addition. */
7382 if (code == PLUS && CONST_INT_P (op2)
7383 && GET_CODE (XEXP (value, 0)) == PLUS
7384 && REG_P (XEXP (XEXP (value, 0), 0))
7385 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7386 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7388 rtx temp = expand_simple_binop (GET_MODE (value), code,
7389 XEXP (XEXP (value, 0), 0), op2,
7390 subtarget, 0, OPTAB_LIB_WIDEN);
7391 return expand_simple_binop (GET_MODE (value), code, temp,
7392 force_operand (XEXP (XEXP (value,
7393 0), 1), 0),
7394 target, 0, OPTAB_LIB_WIDEN);
7397 op1 = force_operand (XEXP (value, 0), subtarget);
7398 op2 = force_operand (op2, NULL_RTX);
7399 switch (code)
7401 case MULT:
7402 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7403 case DIV:
7404 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7405 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7406 target, 1, OPTAB_LIB_WIDEN);
7407 else
7408 return expand_divmod (0,
7409 FLOAT_MODE_P (GET_MODE (value))
7410 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7411 GET_MODE (value), op1, op2, target, 0);
7412 case MOD:
7413 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7414 target, 0);
7415 case UDIV:
7416 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7417 target, 1);
7418 case UMOD:
7419 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7420 target, 1);
7421 case ASHIFTRT:
7422 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7423 target, 0, OPTAB_LIB_WIDEN);
7424 default:
7425 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7426 target, 1, OPTAB_LIB_WIDEN);
7429 if (UNARY_P (value))
7431 if (!target)
7432 target = gen_reg_rtx (GET_MODE (value));
7433 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7434 switch (code)
7436 case ZERO_EXTEND:
7437 case SIGN_EXTEND:
7438 case TRUNCATE:
7439 case FLOAT_EXTEND:
7440 case FLOAT_TRUNCATE:
7441 convert_move (target, op1, code == ZERO_EXTEND);
7442 return target;
7444 case FIX:
7445 case UNSIGNED_FIX:
7446 expand_fix (target, op1, code == UNSIGNED_FIX);
7447 return target;
7449 case FLOAT:
7450 case UNSIGNED_FLOAT:
7451 expand_float (target, op1, code == UNSIGNED_FLOAT);
7452 return target;
7454 default:
7455 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7459 #ifdef INSN_SCHEDULING
7460 /* On machines that have insn scheduling, we want all memory reference to be
7461 explicit, so we need to deal with such paradoxical SUBREGs. */
7462 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7463 value
7464 = simplify_gen_subreg (GET_MODE (value),
7465 force_reg (GET_MODE (SUBREG_REG (value)),
7466 force_operand (SUBREG_REG (value),
7467 NULL_RTX)),
7468 GET_MODE (SUBREG_REG (value)),
7469 SUBREG_BYTE (value));
7470 #endif
7472 return value;
7475 /* Subroutine of expand_expr: return nonzero iff there is no way that
7476 EXP can reference X, which is being modified. TOP_P is nonzero if this
7477 call is going to be used to determine whether we need a temporary
7478 for EXP, as opposed to a recursive call to this function.
7480 It is always safe for this routine to return zero since it merely
7481 searches for optimization opportunities. */
7484 safe_from_p (const_rtx x, tree exp, int top_p)
7486 rtx exp_rtl = 0;
7487 int i, nops;
7489 if (x == 0
7490 /* If EXP has varying size, we MUST use a target since we currently
7491 have no way of allocating temporaries of variable size
7492 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7493 So we assume here that something at a higher level has prevented a
7494 clash. This is somewhat bogus, but the best we can do. Only
7495 do this when X is BLKmode and when we are at the top level. */
7496 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7497 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7498 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7499 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7500 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7501 != INTEGER_CST)
7502 && GET_MODE (x) == BLKmode)
7503 /* If X is in the outgoing argument area, it is always safe. */
7504 || (MEM_P (x)
7505 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7506 || (GET_CODE (XEXP (x, 0)) == PLUS
7507 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7508 return 1;
7510 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7511 find the underlying pseudo. */
7512 if (GET_CODE (x) == SUBREG)
7514 x = SUBREG_REG (x);
7515 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7516 return 0;
7519 /* Now look at our tree code and possibly recurse. */
7520 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7522 case tcc_declaration:
7523 exp_rtl = DECL_RTL_IF_SET (exp);
7524 break;
7526 case tcc_constant:
7527 return 1;
7529 case tcc_exceptional:
7530 if (TREE_CODE (exp) == TREE_LIST)
7532 while (1)
7534 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7535 return 0;
7536 exp = TREE_CHAIN (exp);
7537 if (!exp)
7538 return 1;
7539 if (TREE_CODE (exp) != TREE_LIST)
7540 return safe_from_p (x, exp, 0);
7543 else if (TREE_CODE (exp) == CONSTRUCTOR)
7545 constructor_elt *ce;
7546 unsigned HOST_WIDE_INT idx;
7548 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7549 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7550 || !safe_from_p (x, ce->value, 0))
7551 return 0;
7552 return 1;
7554 else if (TREE_CODE (exp) == ERROR_MARK)
7555 return 1; /* An already-visited SAVE_EXPR? */
7556 else
7557 return 0;
7559 case tcc_statement:
7560 /* The only case we look at here is the DECL_INITIAL inside a
7561 DECL_EXPR. */
7562 return (TREE_CODE (exp) != DECL_EXPR
7563 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7564 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7565 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7567 case tcc_binary:
7568 case tcc_comparison:
7569 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7570 return 0;
7571 /* Fall through. */
7573 case tcc_unary:
7574 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7576 case tcc_expression:
7577 case tcc_reference:
7578 case tcc_vl_exp:
7579 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7580 the expression. If it is set, we conflict iff we are that rtx or
7581 both are in memory. Otherwise, we check all operands of the
7582 expression recursively. */
7584 switch (TREE_CODE (exp))
7586 case ADDR_EXPR:
7587 /* If the operand is static or we are static, we can't conflict.
7588 Likewise if we don't conflict with the operand at all. */
7589 if (staticp (TREE_OPERAND (exp, 0))
7590 || TREE_STATIC (exp)
7591 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7592 return 1;
7594 /* Otherwise, the only way this can conflict is if we are taking
7595 the address of a DECL a that address if part of X, which is
7596 very rare. */
7597 exp = TREE_OPERAND (exp, 0);
7598 if (DECL_P (exp))
7600 if (!DECL_RTL_SET_P (exp)
7601 || !MEM_P (DECL_RTL (exp)))
7602 return 0;
7603 else
7604 exp_rtl = XEXP (DECL_RTL (exp), 0);
7606 break;
7608 case MEM_REF:
7609 if (MEM_P (x)
7610 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7611 get_alias_set (exp)))
7612 return 0;
7613 break;
7615 case CALL_EXPR:
7616 /* Assume that the call will clobber all hard registers and
7617 all of memory. */
7618 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7619 || MEM_P (x))
7620 return 0;
7621 break;
7623 case WITH_CLEANUP_EXPR:
7624 case CLEANUP_POINT_EXPR:
7625 /* Lowered by gimplify.c. */
7626 gcc_unreachable ();
7628 case SAVE_EXPR:
7629 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7631 default:
7632 break;
7635 /* If we have an rtx, we do not need to scan our operands. */
7636 if (exp_rtl)
7637 break;
7639 nops = TREE_OPERAND_LENGTH (exp);
7640 for (i = 0; i < nops; i++)
7641 if (TREE_OPERAND (exp, i) != 0
7642 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7643 return 0;
7645 break;
7647 case tcc_type:
7648 /* Should never get a type here. */
7649 gcc_unreachable ();
7652 /* If we have an rtl, find any enclosed object. Then see if we conflict
7653 with it. */
7654 if (exp_rtl)
7656 if (GET_CODE (exp_rtl) == SUBREG)
7658 exp_rtl = SUBREG_REG (exp_rtl);
7659 if (REG_P (exp_rtl)
7660 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7661 return 0;
7664 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7665 are memory and they conflict. */
7666 return ! (rtx_equal_p (x, exp_rtl)
7667 || (MEM_P (x) && MEM_P (exp_rtl)
7668 && true_dependence (exp_rtl, VOIDmode, x)));
7671 /* If we reach here, it is safe. */
7672 return 1;
7676 /* Return the highest power of two that EXP is known to be a multiple of.
7677 This is used in updating alignment of MEMs in array references. */
7679 unsigned HOST_WIDE_INT
7680 highest_pow2_factor (const_tree exp)
7682 unsigned HOST_WIDE_INT ret;
7683 int trailing_zeros = tree_ctz (exp);
7684 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7685 return BIGGEST_ALIGNMENT;
7686 ret = HOST_WIDE_INT_1U << trailing_zeros;
7687 if (ret > BIGGEST_ALIGNMENT)
7688 return BIGGEST_ALIGNMENT;
7689 return ret;
7692 /* Similar, except that the alignment requirements of TARGET are
7693 taken into account. Assume it is at least as aligned as its
7694 type, unless it is a COMPONENT_REF in which case the layout of
7695 the structure gives the alignment. */
7697 static unsigned HOST_WIDE_INT
7698 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7700 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7701 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7703 return MAX (factor, talign);
7706 /* Convert the tree comparison code TCODE to the rtl one where the
7707 signedness is UNSIGNEDP. */
7709 static enum rtx_code
7710 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7712 enum rtx_code code;
7713 switch (tcode)
7715 case EQ_EXPR:
7716 code = EQ;
7717 break;
7718 case NE_EXPR:
7719 code = NE;
7720 break;
7721 case LT_EXPR:
7722 code = unsignedp ? LTU : LT;
7723 break;
7724 case LE_EXPR:
7725 code = unsignedp ? LEU : LE;
7726 break;
7727 case GT_EXPR:
7728 code = unsignedp ? GTU : GT;
7729 break;
7730 case GE_EXPR:
7731 code = unsignedp ? GEU : GE;
7732 break;
7733 case UNORDERED_EXPR:
7734 code = UNORDERED;
7735 break;
7736 case ORDERED_EXPR:
7737 code = ORDERED;
7738 break;
7739 case UNLT_EXPR:
7740 code = UNLT;
7741 break;
7742 case UNLE_EXPR:
7743 code = UNLE;
7744 break;
7745 case UNGT_EXPR:
7746 code = UNGT;
7747 break;
7748 case UNGE_EXPR:
7749 code = UNGE;
7750 break;
7751 case UNEQ_EXPR:
7752 code = UNEQ;
7753 break;
7754 case LTGT_EXPR:
7755 code = LTGT;
7756 break;
7758 default:
7759 gcc_unreachable ();
7761 return code;
7764 /* Subroutine of expand_expr. Expand the two operands of a binary
7765 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7766 The value may be stored in TARGET if TARGET is nonzero. The
7767 MODIFIER argument is as documented by expand_expr. */
7769 void
7770 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7771 enum expand_modifier modifier)
7773 if (! safe_from_p (target, exp1, 1))
7774 target = 0;
7775 if (operand_equal_p (exp0, exp1, 0))
7777 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7778 *op1 = copy_rtx (*op0);
7780 else
7782 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7783 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7788 /* Return a MEM that contains constant EXP. DEFER is as for
7789 output_constant_def and MODIFIER is as for expand_expr. */
7791 static rtx
7792 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7794 rtx mem;
7796 mem = output_constant_def (exp, defer);
7797 if (modifier != EXPAND_INITIALIZER)
7798 mem = use_anchored_address (mem);
7799 return mem;
7802 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7803 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7805 static rtx
7806 expand_expr_addr_expr_1 (tree exp, rtx target, scalar_int_mode tmode,
7807 enum expand_modifier modifier, addr_space_t as)
7809 rtx result, subtarget;
7810 tree inner, offset;
7811 poly_int64 bitsize, bitpos;
7812 int unsignedp, reversep, volatilep = 0;
7813 machine_mode mode1;
7815 /* If we are taking the address of a constant and are at the top level,
7816 we have to use output_constant_def since we can't call force_const_mem
7817 at top level. */
7818 /* ??? This should be considered a front-end bug. We should not be
7819 generating ADDR_EXPR of something that isn't an LVALUE. The only
7820 exception here is STRING_CST. */
7821 if (CONSTANT_CLASS_P (exp))
7823 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7824 if (modifier < EXPAND_SUM)
7825 result = force_operand (result, target);
7826 return result;
7829 /* Everything must be something allowed by is_gimple_addressable. */
7830 switch (TREE_CODE (exp))
7832 case INDIRECT_REF:
7833 /* This case will happen via recursion for &a->b. */
7834 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7836 case MEM_REF:
7838 tree tem = TREE_OPERAND (exp, 0);
7839 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7840 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7841 return expand_expr (tem, target, tmode, modifier);
7844 case TARGET_MEM_REF:
7845 return addr_for_mem_ref (exp, as, true);
7847 case CONST_DECL:
7848 /* Expand the initializer like constants above. */
7849 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7850 0, modifier), 0);
7851 if (modifier < EXPAND_SUM)
7852 result = force_operand (result, target);
7853 return result;
7855 case REALPART_EXPR:
7856 /* The real part of the complex number is always first, therefore
7857 the address is the same as the address of the parent object. */
7858 offset = 0;
7859 bitpos = 0;
7860 inner = TREE_OPERAND (exp, 0);
7861 break;
7863 case IMAGPART_EXPR:
7864 /* The imaginary part of the complex number is always second.
7865 The expression is therefore always offset by the size of the
7866 scalar type. */
7867 offset = 0;
7868 bitpos = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp)));
7869 inner = TREE_OPERAND (exp, 0);
7870 break;
7872 case COMPOUND_LITERAL_EXPR:
7873 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7874 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7875 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7876 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7877 the initializers aren't gimplified. */
7878 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7879 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7880 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7881 target, tmode, modifier, as);
7882 /* FALLTHRU */
7883 default:
7884 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7885 expand_expr, as that can have various side effects; LABEL_DECLs for
7886 example, may not have their DECL_RTL set yet. Expand the rtl of
7887 CONSTRUCTORs too, which should yield a memory reference for the
7888 constructor's contents. Assume language specific tree nodes can
7889 be expanded in some interesting way. */
7890 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7891 if (DECL_P (exp)
7892 || TREE_CODE (exp) == CONSTRUCTOR
7893 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7895 result = expand_expr (exp, target, tmode,
7896 modifier == EXPAND_INITIALIZER
7897 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7899 /* If the DECL isn't in memory, then the DECL wasn't properly
7900 marked TREE_ADDRESSABLE, which will be either a front-end
7901 or a tree optimizer bug. */
7903 gcc_assert (MEM_P (result));
7904 result = XEXP (result, 0);
7906 /* ??? Is this needed anymore? */
7907 if (DECL_P (exp))
7908 TREE_USED (exp) = 1;
7910 if (modifier != EXPAND_INITIALIZER
7911 && modifier != EXPAND_CONST_ADDRESS
7912 && modifier != EXPAND_SUM)
7913 result = force_operand (result, target);
7914 return result;
7917 /* Pass FALSE as the last argument to get_inner_reference although
7918 we are expanding to RTL. The rationale is that we know how to
7919 handle "aligning nodes" here: we can just bypass them because
7920 they won't change the final object whose address will be returned
7921 (they actually exist only for that purpose). */
7922 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
7923 &unsignedp, &reversep, &volatilep);
7924 break;
7927 /* We must have made progress. */
7928 gcc_assert (inner != exp);
7930 subtarget = offset || maybe_ne (bitpos, 0) ? NULL_RTX : target;
7931 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7932 inner alignment, force the inner to be sufficiently aligned. */
7933 if (CONSTANT_CLASS_P (inner)
7934 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7936 inner = copy_node (inner);
7937 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7938 SET_TYPE_ALIGN (TREE_TYPE (inner), TYPE_ALIGN (TREE_TYPE (exp)));
7939 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7941 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7943 if (offset)
7945 rtx tmp;
7947 if (modifier != EXPAND_NORMAL)
7948 result = force_operand (result, NULL);
7949 tmp = expand_expr (offset, NULL_RTX, tmode,
7950 modifier == EXPAND_INITIALIZER
7951 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7953 /* expand_expr is allowed to return an object in a mode other
7954 than TMODE. If it did, we need to convert. */
7955 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
7956 tmp = convert_modes (tmode, GET_MODE (tmp),
7957 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
7958 result = convert_memory_address_addr_space (tmode, result, as);
7959 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7961 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7962 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7963 else
7965 subtarget = maybe_ne (bitpos, 0) ? NULL_RTX : target;
7966 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7967 1, OPTAB_LIB_WIDEN);
7971 if (maybe_ne (bitpos, 0))
7973 /* Someone beforehand should have rejected taking the address
7974 of an object that isn't byte-aligned. */
7975 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT);
7976 result = convert_memory_address_addr_space (tmode, result, as);
7977 result = plus_constant (tmode, result, bytepos);
7978 if (modifier < EXPAND_SUM)
7979 result = force_operand (result, target);
7982 return result;
7985 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7986 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7988 static rtx
7989 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
7990 enum expand_modifier modifier)
7992 addr_space_t as = ADDR_SPACE_GENERIC;
7993 scalar_int_mode address_mode = Pmode;
7994 scalar_int_mode pointer_mode = ptr_mode;
7995 machine_mode rmode;
7996 rtx result;
7998 /* Target mode of VOIDmode says "whatever's natural". */
7999 if (tmode == VOIDmode)
8000 tmode = TYPE_MODE (TREE_TYPE (exp));
8002 if (POINTER_TYPE_P (TREE_TYPE (exp)))
8004 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
8005 address_mode = targetm.addr_space.address_mode (as);
8006 pointer_mode = targetm.addr_space.pointer_mode (as);
8009 /* We can get called with some Weird Things if the user does silliness
8010 like "(short) &a". In that case, convert_memory_address won't do
8011 the right thing, so ignore the given target mode. */
8012 scalar_int_mode new_tmode = (tmode == pointer_mode
8013 ? pointer_mode
8014 : address_mode);
8016 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
8017 new_tmode, modifier, as);
8019 /* Despite expand_expr claims concerning ignoring TMODE when not
8020 strictly convenient, stuff breaks if we don't honor it. Note
8021 that combined with the above, we only do this for pointer modes. */
8022 rmode = GET_MODE (result);
8023 if (rmode == VOIDmode)
8024 rmode = new_tmode;
8025 if (rmode != new_tmode)
8026 result = convert_memory_address_addr_space (new_tmode, result, as);
8028 return result;
8031 /* Generate code for computing CONSTRUCTOR EXP.
8032 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8033 is TRUE, instead of creating a temporary variable in memory
8034 NULL is returned and the caller needs to handle it differently. */
8036 static rtx
8037 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
8038 bool avoid_temp_mem)
8040 tree type = TREE_TYPE (exp);
8041 machine_mode mode = TYPE_MODE (type);
8043 /* Try to avoid creating a temporary at all. This is possible
8044 if all of the initializer is zero.
8045 FIXME: try to handle all [0..255] initializers we can handle
8046 with memset. */
8047 if (TREE_STATIC (exp)
8048 && !TREE_ADDRESSABLE (exp)
8049 && target != 0 && mode == BLKmode
8050 && all_zeros_p (exp))
8052 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
8053 return target;
8056 /* All elts simple constants => refer to a constant in memory. But
8057 if this is a non-BLKmode mode, let it store a field at a time
8058 since that should make a CONST_INT, CONST_WIDE_INT or
8059 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8060 use, it is best to store directly into the target unless the type
8061 is large enough that memcpy will be used. If we are making an
8062 initializer and all operands are constant, put it in memory as
8063 well.
8065 FIXME: Avoid trying to fill vector constructors piece-meal.
8066 Output them with output_constant_def below unless we're sure
8067 they're zeros. This should go away when vector initializers
8068 are treated like VECTOR_CST instead of arrays. */
8069 if ((TREE_STATIC (exp)
8070 && ((mode == BLKmode
8071 && ! (target != 0 && safe_from_p (target, exp, 1)))
8072 || TREE_ADDRESSABLE (exp)
8073 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
8074 && (! can_move_by_pieces
8075 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
8076 TYPE_ALIGN (type)))
8077 && ! mostly_zeros_p (exp))))
8078 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
8079 && TREE_CONSTANT (exp)))
8081 rtx constructor;
8083 if (avoid_temp_mem)
8084 return NULL_RTX;
8086 constructor = expand_expr_constant (exp, 1, modifier);
8088 if (modifier != EXPAND_CONST_ADDRESS
8089 && modifier != EXPAND_INITIALIZER
8090 && modifier != EXPAND_SUM)
8091 constructor = validize_mem (constructor);
8093 return constructor;
8096 /* Handle calls that pass values in multiple non-contiguous
8097 locations. The Irix 6 ABI has examples of this. */
8098 if (target == 0 || ! safe_from_p (target, exp, 1)
8099 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
8101 if (avoid_temp_mem)
8102 return NULL_RTX;
8104 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
8107 store_constructor (exp, target, 0, int_expr_size (exp), false);
8108 return target;
8112 /* expand_expr: generate code for computing expression EXP.
8113 An rtx for the computed value is returned. The value is never null.
8114 In the case of a void EXP, const0_rtx is returned.
8116 The value may be stored in TARGET if TARGET is nonzero.
8117 TARGET is just a suggestion; callers must assume that
8118 the rtx returned may not be the same as TARGET.
8120 If TARGET is CONST0_RTX, it means that the value will be ignored.
8122 If TMODE is not VOIDmode, it suggests generating the
8123 result in mode TMODE. But this is done only when convenient.
8124 Otherwise, TMODE is ignored and the value generated in its natural mode.
8125 TMODE is just a suggestion; callers must assume that
8126 the rtx returned may not have mode TMODE.
8128 Note that TARGET may have neither TMODE nor MODE. In that case, it
8129 probably will not be used.
8131 If MODIFIER is EXPAND_SUM then when EXP is an addition
8132 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8133 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8134 products as above, or REG or MEM, or constant.
8135 Ordinarily in such cases we would output mul or add instructions
8136 and then return a pseudo reg containing the sum.
8138 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8139 it also marks a label as absolutely required (it can't be dead).
8140 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8141 This is used for outputting expressions used in initializers.
8143 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8144 with a constant address even if that address is not normally legitimate.
8145 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8147 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8148 a call parameter. Such targets require special care as we haven't yet
8149 marked TARGET so that it's safe from being trashed by libcalls. We
8150 don't want to use TARGET for anything but the final result;
8151 Intermediate values must go elsewhere. Additionally, calls to
8152 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8154 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8155 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8156 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8157 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8158 recursively.
8160 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8161 In this case, we don't adjust a returned MEM rtx that wouldn't be
8162 sufficiently aligned for its mode; instead, it's up to the caller
8163 to deal with it afterwards. This is used to make sure that unaligned
8164 base objects for which out-of-bounds accesses are supported, for
8165 example record types with trailing arrays, aren't realigned behind
8166 the back of the caller.
8167 The normal operating mode is to pass FALSE for this parameter. */
8170 expand_expr_real (tree exp, rtx target, machine_mode tmode,
8171 enum expand_modifier modifier, rtx *alt_rtl,
8172 bool inner_reference_p)
8174 rtx ret;
8176 /* Handle ERROR_MARK before anybody tries to access its type. */
8177 if (TREE_CODE (exp) == ERROR_MARK
8178 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
8180 ret = CONST0_RTX (tmode);
8181 return ret ? ret : const0_rtx;
8184 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
8185 inner_reference_p);
8186 return ret;
8189 /* Try to expand the conditional expression which is represented by
8190 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8191 return the rtl reg which represents the result. Otherwise return
8192 NULL_RTX. */
8194 static rtx
8195 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
8196 tree treeop1 ATTRIBUTE_UNUSED,
8197 tree treeop2 ATTRIBUTE_UNUSED)
8199 rtx insn;
8200 rtx op00, op01, op1, op2;
8201 enum rtx_code comparison_code;
8202 machine_mode comparison_mode;
8203 gimple *srcstmt;
8204 rtx temp;
8205 tree type = TREE_TYPE (treeop1);
8206 int unsignedp = TYPE_UNSIGNED (type);
8207 machine_mode mode = TYPE_MODE (type);
8208 machine_mode orig_mode = mode;
8209 static bool expanding_cond_expr_using_cmove = false;
8211 /* Conditional move expansion can end up TERing two operands which,
8212 when recursively hitting conditional expressions can result in
8213 exponential behavior if the cmove expansion ultimatively fails.
8214 It's hardly profitable to TER a cmove into a cmove so avoid doing
8215 that by failing early if we end up recursing. */
8216 if (expanding_cond_expr_using_cmove)
8217 return NULL_RTX;
8219 /* If we cannot do a conditional move on the mode, try doing it
8220 with the promoted mode. */
8221 if (!can_conditionally_move_p (mode))
8223 mode = promote_mode (type, mode, &unsignedp);
8224 if (!can_conditionally_move_p (mode))
8225 return NULL_RTX;
8226 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
8228 else
8229 temp = assign_temp (type, 0, 1);
8231 expanding_cond_expr_using_cmove = true;
8232 start_sequence ();
8233 expand_operands (treeop1, treeop2,
8234 temp, &op1, &op2, EXPAND_NORMAL);
8236 if (TREE_CODE (treeop0) == SSA_NAME
8237 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
8239 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
8240 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
8241 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
8242 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
8243 comparison_mode = TYPE_MODE (type);
8244 unsignedp = TYPE_UNSIGNED (type);
8245 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8247 else if (COMPARISON_CLASS_P (treeop0))
8249 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
8250 enum tree_code cmpcode = TREE_CODE (treeop0);
8251 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
8252 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
8253 unsignedp = TYPE_UNSIGNED (type);
8254 comparison_mode = TYPE_MODE (type);
8255 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8257 else
8259 op00 = expand_normal (treeop0);
8260 op01 = const0_rtx;
8261 comparison_code = NE;
8262 comparison_mode = GET_MODE (op00);
8263 if (comparison_mode == VOIDmode)
8264 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8266 expanding_cond_expr_using_cmove = false;
8268 if (GET_MODE (op1) != mode)
8269 op1 = gen_lowpart (mode, op1);
8271 if (GET_MODE (op2) != mode)
8272 op2 = gen_lowpart (mode, op2);
8274 /* Try to emit the conditional move. */
8275 insn = emit_conditional_move (temp, comparison_code,
8276 op00, op01, comparison_mode,
8277 op1, op2, mode,
8278 unsignedp);
8280 /* If we could do the conditional move, emit the sequence,
8281 and return. */
8282 if (insn)
8284 rtx_insn *seq = get_insns ();
8285 end_sequence ();
8286 emit_insn (seq);
8287 return convert_modes (orig_mode, mode, temp, 0);
8290 /* Otherwise discard the sequence and fall back to code with
8291 branches. */
8292 end_sequence ();
8293 return NULL_RTX;
8297 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8298 enum expand_modifier modifier)
8300 rtx op0, op1, op2, temp;
8301 rtx_code_label *lab;
8302 tree type;
8303 int unsignedp;
8304 machine_mode mode;
8305 scalar_int_mode int_mode;
8306 enum tree_code code = ops->code;
8307 optab this_optab;
8308 rtx subtarget, original_target;
8309 int ignore;
8310 bool reduce_bit_field;
8311 location_t loc = ops->location;
8312 tree treeop0, treeop1, treeop2;
8313 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8314 ? reduce_to_bit_field_precision ((expr), \
8315 target, \
8316 type) \
8317 : (expr))
8319 type = ops->type;
8320 mode = TYPE_MODE (type);
8321 unsignedp = TYPE_UNSIGNED (type);
8323 treeop0 = ops->op0;
8324 treeop1 = ops->op1;
8325 treeop2 = ops->op2;
8327 /* We should be called only on simple (binary or unary) expressions,
8328 exactly those that are valid in gimple expressions that aren't
8329 GIMPLE_SINGLE_RHS (or invalid). */
8330 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8331 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8332 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8334 ignore = (target == const0_rtx
8335 || ((CONVERT_EXPR_CODE_P (code)
8336 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8337 && TREE_CODE (type) == VOID_TYPE));
8339 /* We should be called only if we need the result. */
8340 gcc_assert (!ignore);
8342 /* An operation in what may be a bit-field type needs the
8343 result to be reduced to the precision of the bit-field type,
8344 which is narrower than that of the type's mode. */
8345 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8346 && !type_has_mode_precision_p (type));
8348 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8349 target = 0;
8351 /* Use subtarget as the target for operand 0 of a binary operation. */
8352 subtarget = get_subtarget (target);
8353 original_target = target;
8355 switch (code)
8357 case NON_LVALUE_EXPR:
8358 case PAREN_EXPR:
8359 CASE_CONVERT:
8360 if (treeop0 == error_mark_node)
8361 return const0_rtx;
8363 if (TREE_CODE (type) == UNION_TYPE)
8365 tree valtype = TREE_TYPE (treeop0);
8367 /* If both input and output are BLKmode, this conversion isn't doing
8368 anything except possibly changing memory attribute. */
8369 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8371 rtx result = expand_expr (treeop0, target, tmode,
8372 modifier);
8374 result = copy_rtx (result);
8375 set_mem_attributes (result, type, 0);
8376 return result;
8379 if (target == 0)
8381 if (TYPE_MODE (type) != BLKmode)
8382 target = gen_reg_rtx (TYPE_MODE (type));
8383 else
8384 target = assign_temp (type, 1, 1);
8387 if (MEM_P (target))
8388 /* Store data into beginning of memory target. */
8389 store_expr (treeop0,
8390 adjust_address (target, TYPE_MODE (valtype), 0),
8391 modifier == EXPAND_STACK_PARM,
8392 false, TYPE_REVERSE_STORAGE_ORDER (type));
8394 else
8396 gcc_assert (REG_P (target)
8397 && !TYPE_REVERSE_STORAGE_ORDER (type));
8399 /* Store this field into a union of the proper type. */
8400 poly_uint64 op0_size
8401 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0)));
8402 poly_uint64 union_size = GET_MODE_BITSIZE (mode);
8403 store_field (target,
8404 /* The conversion must be constructed so that
8405 we know at compile time how many bits
8406 to preserve. */
8407 ordered_min (op0_size, union_size),
8408 0, 0, 0, TYPE_MODE (valtype), treeop0, 0,
8409 false, false);
8412 /* Return the entire union. */
8413 return target;
8416 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8418 op0 = expand_expr (treeop0, target, VOIDmode,
8419 modifier);
8421 /* If the signedness of the conversion differs and OP0 is
8422 a promoted SUBREG, clear that indication since we now
8423 have to do the proper extension. */
8424 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8425 && GET_CODE (op0) == SUBREG)
8426 SUBREG_PROMOTED_VAR_P (op0) = 0;
8428 return REDUCE_BIT_FIELD (op0);
8431 op0 = expand_expr (treeop0, NULL_RTX, mode,
8432 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8433 if (GET_MODE (op0) == mode)
8436 /* If OP0 is a constant, just convert it into the proper mode. */
8437 else if (CONSTANT_P (op0))
8439 tree inner_type = TREE_TYPE (treeop0);
8440 machine_mode inner_mode = GET_MODE (op0);
8442 if (inner_mode == VOIDmode)
8443 inner_mode = TYPE_MODE (inner_type);
8445 if (modifier == EXPAND_INITIALIZER)
8446 op0 = lowpart_subreg (mode, op0, inner_mode);
8447 else
8448 op0= convert_modes (mode, inner_mode, op0,
8449 TYPE_UNSIGNED (inner_type));
8452 else if (modifier == EXPAND_INITIALIZER)
8453 op0 = gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8454 ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8456 else if (target == 0)
8457 op0 = convert_to_mode (mode, op0,
8458 TYPE_UNSIGNED (TREE_TYPE
8459 (treeop0)));
8460 else
8462 convert_move (target, op0,
8463 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8464 op0 = target;
8467 return REDUCE_BIT_FIELD (op0);
8469 case ADDR_SPACE_CONVERT_EXPR:
8471 tree treeop0_type = TREE_TYPE (treeop0);
8473 gcc_assert (POINTER_TYPE_P (type));
8474 gcc_assert (POINTER_TYPE_P (treeop0_type));
8476 addr_space_t as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8477 addr_space_t as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8479 /* Conversions between pointers to the same address space should
8480 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8481 gcc_assert (as_to != as_from);
8483 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8485 /* Ask target code to handle conversion between pointers
8486 to overlapping address spaces. */
8487 if (targetm.addr_space.subset_p (as_to, as_from)
8488 || targetm.addr_space.subset_p (as_from, as_to))
8490 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8492 else
8494 /* For disjoint address spaces, converting anything but a null
8495 pointer invokes undefined behavior. We truncate or extend the
8496 value as if we'd converted via integers, which handles 0 as
8497 required, and all others as the programmer likely expects. */
8498 #ifndef POINTERS_EXTEND_UNSIGNED
8499 const int POINTERS_EXTEND_UNSIGNED = 1;
8500 #endif
8501 op0 = convert_modes (mode, TYPE_MODE (treeop0_type),
8502 op0, POINTERS_EXTEND_UNSIGNED);
8504 gcc_assert (op0);
8505 return op0;
8508 case POINTER_PLUS_EXPR:
8509 /* Even though the sizetype mode and the pointer's mode can be different
8510 expand is able to handle this correctly and get the correct result out
8511 of the PLUS_EXPR code. */
8512 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8513 if sizetype precision is smaller than pointer precision. */
8514 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8515 treeop1 = fold_convert_loc (loc, type,
8516 fold_convert_loc (loc, ssizetype,
8517 treeop1));
8518 /* If sizetype precision is larger than pointer precision, truncate the
8519 offset to have matching modes. */
8520 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8521 treeop1 = fold_convert_loc (loc, type, treeop1);
8522 /* FALLTHRU */
8524 case PLUS_EXPR:
8525 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8526 something else, make sure we add the register to the constant and
8527 then to the other thing. This case can occur during strength
8528 reduction and doing it this way will produce better code if the
8529 frame pointer or argument pointer is eliminated.
8531 fold-const.c will ensure that the constant is always in the inner
8532 PLUS_EXPR, so the only case we need to do anything about is if
8533 sp, ap, or fp is our second argument, in which case we must swap
8534 the innermost first argument and our second argument. */
8536 if (TREE_CODE (treeop0) == PLUS_EXPR
8537 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8538 && VAR_P (treeop1)
8539 && (DECL_RTL (treeop1) == frame_pointer_rtx
8540 || DECL_RTL (treeop1) == stack_pointer_rtx
8541 || DECL_RTL (treeop1) == arg_pointer_rtx))
8543 gcc_unreachable ();
8546 /* If the result is to be ptr_mode and we are adding an integer to
8547 something, we might be forming a constant. So try to use
8548 plus_constant. If it produces a sum and we can't accept it,
8549 use force_operand. This allows P = &ARR[const] to generate
8550 efficient code on machines where a SYMBOL_REF is not a valid
8551 address.
8553 If this is an EXPAND_SUM call, always return the sum. */
8554 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8555 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8557 if (modifier == EXPAND_STACK_PARM)
8558 target = 0;
8559 if (TREE_CODE (treeop0) == INTEGER_CST
8560 && HWI_COMPUTABLE_MODE_P (mode)
8561 && TREE_CONSTANT (treeop1))
8563 rtx constant_part;
8564 HOST_WIDE_INT wc;
8565 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8567 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8568 EXPAND_SUM);
8569 /* Use wi::shwi to ensure that the constant is
8570 truncated according to the mode of OP1, then sign extended
8571 to a HOST_WIDE_INT. Using the constant directly can result
8572 in non-canonical RTL in a 64x32 cross compile. */
8573 wc = TREE_INT_CST_LOW (treeop0);
8574 constant_part =
8575 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8576 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8577 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8578 op1 = force_operand (op1, target);
8579 return REDUCE_BIT_FIELD (op1);
8582 else if (TREE_CODE (treeop1) == INTEGER_CST
8583 && HWI_COMPUTABLE_MODE_P (mode)
8584 && TREE_CONSTANT (treeop0))
8586 rtx constant_part;
8587 HOST_WIDE_INT wc;
8588 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8590 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8591 (modifier == EXPAND_INITIALIZER
8592 ? EXPAND_INITIALIZER : EXPAND_SUM));
8593 if (! CONSTANT_P (op0))
8595 op1 = expand_expr (treeop1, NULL_RTX,
8596 VOIDmode, modifier);
8597 /* Return a PLUS if modifier says it's OK. */
8598 if (modifier == EXPAND_SUM
8599 || modifier == EXPAND_INITIALIZER)
8600 return simplify_gen_binary (PLUS, mode, op0, op1);
8601 goto binop2;
8603 /* Use wi::shwi to ensure that the constant is
8604 truncated according to the mode of OP1, then sign extended
8605 to a HOST_WIDE_INT. Using the constant directly can result
8606 in non-canonical RTL in a 64x32 cross compile. */
8607 wc = TREE_INT_CST_LOW (treeop1);
8608 constant_part
8609 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8610 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8611 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8612 op0 = force_operand (op0, target);
8613 return REDUCE_BIT_FIELD (op0);
8617 /* Use TER to expand pointer addition of a negated value
8618 as pointer subtraction. */
8619 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8620 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8621 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8622 && TREE_CODE (treeop1) == SSA_NAME
8623 && TYPE_MODE (TREE_TYPE (treeop0))
8624 == TYPE_MODE (TREE_TYPE (treeop1)))
8626 gimple *def = get_def_for_expr (treeop1, NEGATE_EXPR);
8627 if (def)
8629 treeop1 = gimple_assign_rhs1 (def);
8630 code = MINUS_EXPR;
8631 goto do_minus;
8635 /* No sense saving up arithmetic to be done
8636 if it's all in the wrong mode to form part of an address.
8637 And force_operand won't know whether to sign-extend or
8638 zero-extend. */
8639 if (modifier != EXPAND_INITIALIZER
8640 && (modifier != EXPAND_SUM || mode != ptr_mode))
8642 expand_operands (treeop0, treeop1,
8643 subtarget, &op0, &op1, modifier);
8644 if (op0 == const0_rtx)
8645 return op1;
8646 if (op1 == const0_rtx)
8647 return op0;
8648 goto binop2;
8651 expand_operands (treeop0, treeop1,
8652 subtarget, &op0, &op1, modifier);
8653 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8655 case MINUS_EXPR:
8656 case POINTER_DIFF_EXPR:
8657 do_minus:
8658 /* For initializers, we are allowed to return a MINUS of two
8659 symbolic constants. Here we handle all cases when both operands
8660 are constant. */
8661 /* Handle difference of two symbolic constants,
8662 for the sake of an initializer. */
8663 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8664 && really_constant_p (treeop0)
8665 && really_constant_p (treeop1))
8667 expand_operands (treeop0, treeop1,
8668 NULL_RTX, &op0, &op1, modifier);
8669 return simplify_gen_binary (MINUS, mode, op0, op1);
8672 /* No sense saving up arithmetic to be done
8673 if it's all in the wrong mode to form part of an address.
8674 And force_operand won't know whether to sign-extend or
8675 zero-extend. */
8676 if (modifier != EXPAND_INITIALIZER
8677 && (modifier != EXPAND_SUM || mode != ptr_mode))
8678 goto binop;
8680 expand_operands (treeop0, treeop1,
8681 subtarget, &op0, &op1, modifier);
8683 /* Convert A - const to A + (-const). */
8684 if (CONST_INT_P (op1))
8686 op1 = negate_rtx (mode, op1);
8687 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8690 goto binop2;
8692 case WIDEN_MULT_PLUS_EXPR:
8693 case WIDEN_MULT_MINUS_EXPR:
8694 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8695 op2 = expand_normal (treeop2);
8696 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8697 target, unsignedp);
8698 return target;
8700 case WIDEN_MULT_EXPR:
8701 /* If first operand is constant, swap them.
8702 Thus the following special case checks need only
8703 check the second operand. */
8704 if (TREE_CODE (treeop0) == INTEGER_CST)
8705 std::swap (treeop0, treeop1);
8707 /* First, check if we have a multiplication of one signed and one
8708 unsigned operand. */
8709 if (TREE_CODE (treeop1) != INTEGER_CST
8710 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8711 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8713 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8714 this_optab = usmul_widen_optab;
8715 if (find_widening_optab_handler (this_optab, mode, innermode)
8716 != CODE_FOR_nothing)
8718 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8719 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8720 EXPAND_NORMAL);
8721 else
8722 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8723 EXPAND_NORMAL);
8724 /* op0 and op1 might still be constant, despite the above
8725 != INTEGER_CST check. Handle it. */
8726 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8728 op0 = convert_modes (innermode, mode, op0, true);
8729 op1 = convert_modes (innermode, mode, op1, false);
8730 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8731 target, unsignedp));
8733 goto binop3;
8736 /* Check for a multiplication with matching signedness. */
8737 else if ((TREE_CODE (treeop1) == INTEGER_CST
8738 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8739 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8740 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8742 tree op0type = TREE_TYPE (treeop0);
8743 machine_mode innermode = TYPE_MODE (op0type);
8744 bool zextend_p = TYPE_UNSIGNED (op0type);
8745 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8746 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8748 if (TREE_CODE (treeop0) != INTEGER_CST)
8750 if (find_widening_optab_handler (this_optab, mode, innermode)
8751 != CODE_FOR_nothing)
8753 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8754 EXPAND_NORMAL);
8755 /* op0 and op1 might still be constant, despite the above
8756 != INTEGER_CST check. Handle it. */
8757 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8759 widen_mult_const:
8760 op0 = convert_modes (innermode, mode, op0, zextend_p);
8762 = convert_modes (innermode, mode, op1,
8763 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8764 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8765 target,
8766 unsignedp));
8768 temp = expand_widening_mult (mode, op0, op1, target,
8769 unsignedp, this_optab);
8770 return REDUCE_BIT_FIELD (temp);
8772 if (find_widening_optab_handler (other_optab, mode, innermode)
8773 != CODE_FOR_nothing
8774 && innermode == word_mode)
8776 rtx htem, hipart;
8777 op0 = expand_normal (treeop0);
8778 if (TREE_CODE (treeop1) == INTEGER_CST)
8779 op1 = convert_modes (word_mode, mode,
8780 expand_normal (treeop1),
8781 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8782 else
8783 op1 = expand_normal (treeop1);
8784 /* op0 and op1 might still be constant, despite the above
8785 != INTEGER_CST check. Handle it. */
8786 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8787 goto widen_mult_const;
8788 temp = expand_binop (mode, other_optab, op0, op1, target,
8789 unsignedp, OPTAB_LIB_WIDEN);
8790 hipart = gen_highpart (word_mode, temp);
8791 htem = expand_mult_highpart_adjust (word_mode, hipart,
8792 op0, op1, hipart,
8793 zextend_p);
8794 if (htem != hipart)
8795 emit_move_insn (hipart, htem);
8796 return REDUCE_BIT_FIELD (temp);
8800 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8801 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8802 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8803 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8805 case MULT_EXPR:
8806 /* If this is a fixed-point operation, then we cannot use the code
8807 below because "expand_mult" doesn't support sat/no-sat fixed-point
8808 multiplications. */
8809 if (ALL_FIXED_POINT_MODE_P (mode))
8810 goto binop;
8812 /* If first operand is constant, swap them.
8813 Thus the following special case checks need only
8814 check the second operand. */
8815 if (TREE_CODE (treeop0) == INTEGER_CST)
8816 std::swap (treeop0, treeop1);
8818 /* Attempt to return something suitable for generating an
8819 indexed address, for machines that support that. */
8821 if (modifier == EXPAND_SUM && mode == ptr_mode
8822 && tree_fits_shwi_p (treeop1))
8824 tree exp1 = treeop1;
8826 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8827 EXPAND_SUM);
8829 if (!REG_P (op0))
8830 op0 = force_operand (op0, NULL_RTX);
8831 if (!REG_P (op0))
8832 op0 = copy_to_mode_reg (mode, op0);
8834 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8835 gen_int_mode (tree_to_shwi (exp1),
8836 TYPE_MODE (TREE_TYPE (exp1)))));
8839 if (modifier == EXPAND_STACK_PARM)
8840 target = 0;
8842 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8843 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8845 case TRUNC_MOD_EXPR:
8846 case FLOOR_MOD_EXPR:
8847 case CEIL_MOD_EXPR:
8848 case ROUND_MOD_EXPR:
8850 case TRUNC_DIV_EXPR:
8851 case FLOOR_DIV_EXPR:
8852 case CEIL_DIV_EXPR:
8853 case ROUND_DIV_EXPR:
8854 case EXACT_DIV_EXPR:
8856 /* If this is a fixed-point operation, then we cannot use the code
8857 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8858 divisions. */
8859 if (ALL_FIXED_POINT_MODE_P (mode))
8860 goto binop;
8862 if (modifier == EXPAND_STACK_PARM)
8863 target = 0;
8864 /* Possible optimization: compute the dividend with EXPAND_SUM
8865 then if the divisor is constant can optimize the case
8866 where some terms of the dividend have coeffs divisible by it. */
8867 expand_operands (treeop0, treeop1,
8868 subtarget, &op0, &op1, EXPAND_NORMAL);
8869 bool mod_p = code == TRUNC_MOD_EXPR || code == FLOOR_MOD_EXPR
8870 || code == CEIL_MOD_EXPR || code == ROUND_MOD_EXPR;
8871 if (SCALAR_INT_MODE_P (mode)
8872 && optimize >= 2
8873 && get_range_pos_neg (treeop0) == 1
8874 && get_range_pos_neg (treeop1) == 1)
8876 /* If both arguments are known to be positive when interpreted
8877 as signed, we can expand it as both signed and unsigned
8878 division or modulo. Choose the cheaper sequence in that case. */
8879 bool speed_p = optimize_insn_for_speed_p ();
8880 do_pending_stack_adjust ();
8881 start_sequence ();
8882 rtx uns_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 1);
8883 rtx_insn *uns_insns = get_insns ();
8884 end_sequence ();
8885 start_sequence ();
8886 rtx sgn_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 0);
8887 rtx_insn *sgn_insns = get_insns ();
8888 end_sequence ();
8889 unsigned uns_cost = seq_cost (uns_insns, speed_p);
8890 unsigned sgn_cost = seq_cost (sgn_insns, speed_p);
8892 /* If costs are the same then use as tie breaker the other
8893 other factor. */
8894 if (uns_cost == sgn_cost)
8896 uns_cost = seq_cost (uns_insns, !speed_p);
8897 sgn_cost = seq_cost (sgn_insns, !speed_p);
8900 if (uns_cost < sgn_cost || (uns_cost == sgn_cost && unsignedp))
8902 emit_insn (uns_insns);
8903 return uns_ret;
8905 emit_insn (sgn_insns);
8906 return sgn_ret;
8908 return expand_divmod (mod_p, code, mode, op0, op1, target, unsignedp);
8910 case RDIV_EXPR:
8911 goto binop;
8913 case MULT_HIGHPART_EXPR:
8914 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8915 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8916 gcc_assert (temp);
8917 return temp;
8919 case FIXED_CONVERT_EXPR:
8920 op0 = expand_normal (treeop0);
8921 if (target == 0 || modifier == EXPAND_STACK_PARM)
8922 target = gen_reg_rtx (mode);
8924 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8925 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8926 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8927 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8928 else
8929 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8930 return target;
8932 case FIX_TRUNC_EXPR:
8933 op0 = expand_normal (treeop0);
8934 if (target == 0 || modifier == EXPAND_STACK_PARM)
8935 target = gen_reg_rtx (mode);
8936 expand_fix (target, op0, unsignedp);
8937 return target;
8939 case FLOAT_EXPR:
8940 op0 = expand_normal (treeop0);
8941 if (target == 0 || modifier == EXPAND_STACK_PARM)
8942 target = gen_reg_rtx (mode);
8943 /* expand_float can't figure out what to do if FROM has VOIDmode.
8944 So give it the correct mode. With -O, cse will optimize this. */
8945 if (GET_MODE (op0) == VOIDmode)
8946 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8947 op0);
8948 expand_float (target, op0,
8949 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8950 return target;
8952 case NEGATE_EXPR:
8953 op0 = expand_expr (treeop0, subtarget,
8954 VOIDmode, EXPAND_NORMAL);
8955 if (modifier == EXPAND_STACK_PARM)
8956 target = 0;
8957 temp = expand_unop (mode,
8958 optab_for_tree_code (NEGATE_EXPR, type,
8959 optab_default),
8960 op0, target, 0);
8961 gcc_assert (temp);
8962 return REDUCE_BIT_FIELD (temp);
8964 case ABS_EXPR:
8965 case ABSU_EXPR:
8966 op0 = expand_expr (treeop0, subtarget,
8967 VOIDmode, EXPAND_NORMAL);
8968 if (modifier == EXPAND_STACK_PARM)
8969 target = 0;
8971 /* ABS_EXPR is not valid for complex arguments. */
8972 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8973 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8975 /* Unsigned abs is simply the operand. Testing here means we don't
8976 risk generating incorrect code below. */
8977 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8978 return op0;
8980 return expand_abs (mode, op0, target, unsignedp,
8981 safe_from_p (target, treeop0, 1));
8983 case MAX_EXPR:
8984 case MIN_EXPR:
8985 target = original_target;
8986 if (target == 0
8987 || modifier == EXPAND_STACK_PARM
8988 || (MEM_P (target) && MEM_VOLATILE_P (target))
8989 || GET_MODE (target) != mode
8990 || (REG_P (target)
8991 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8992 target = gen_reg_rtx (mode);
8993 expand_operands (treeop0, treeop1,
8994 target, &op0, &op1, EXPAND_NORMAL);
8996 /* First try to do it with a special MIN or MAX instruction.
8997 If that does not win, use a conditional jump to select the proper
8998 value. */
8999 this_optab = optab_for_tree_code (code, type, optab_default);
9000 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
9001 OPTAB_WIDEN);
9002 if (temp != 0)
9003 return temp;
9005 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9006 and similarly for MAX <x, y>. */
9007 if (VECTOR_TYPE_P (type))
9009 tree t0 = make_tree (type, op0);
9010 tree t1 = make_tree (type, op1);
9011 tree comparison = build2 (code == MIN_EXPR ? LE_EXPR : GE_EXPR,
9012 type, t0, t1);
9013 return expand_vec_cond_expr (type, comparison, t0, t1,
9014 original_target);
9017 /* At this point, a MEM target is no longer useful; we will get better
9018 code without it. */
9020 if (! REG_P (target))
9021 target = gen_reg_rtx (mode);
9023 /* If op1 was placed in target, swap op0 and op1. */
9024 if (target != op0 && target == op1)
9025 std::swap (op0, op1);
9027 /* We generate better code and avoid problems with op1 mentioning
9028 target by forcing op1 into a pseudo if it isn't a constant. */
9029 if (! CONSTANT_P (op1))
9030 op1 = force_reg (mode, op1);
9033 enum rtx_code comparison_code;
9034 rtx cmpop1 = op1;
9036 if (code == MAX_EXPR)
9037 comparison_code = unsignedp ? GEU : GE;
9038 else
9039 comparison_code = unsignedp ? LEU : LE;
9041 /* Canonicalize to comparisons against 0. */
9042 if (op1 == const1_rtx)
9044 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9045 or (a != 0 ? a : 1) for unsigned.
9046 For MIN we are safe converting (a <= 1 ? a : 1)
9047 into (a <= 0 ? a : 1) */
9048 cmpop1 = const0_rtx;
9049 if (code == MAX_EXPR)
9050 comparison_code = unsignedp ? NE : GT;
9052 if (op1 == constm1_rtx && !unsignedp)
9054 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9055 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9056 cmpop1 = const0_rtx;
9057 if (code == MIN_EXPR)
9058 comparison_code = LT;
9061 /* Use a conditional move if possible. */
9062 if (can_conditionally_move_p (mode))
9064 rtx insn;
9066 start_sequence ();
9068 /* Try to emit the conditional move. */
9069 insn = emit_conditional_move (target, comparison_code,
9070 op0, cmpop1, mode,
9071 op0, op1, mode,
9072 unsignedp);
9074 /* If we could do the conditional move, emit the sequence,
9075 and return. */
9076 if (insn)
9078 rtx_insn *seq = get_insns ();
9079 end_sequence ();
9080 emit_insn (seq);
9081 return target;
9084 /* Otherwise discard the sequence and fall back to code with
9085 branches. */
9086 end_sequence ();
9089 if (target != op0)
9090 emit_move_insn (target, op0);
9092 lab = gen_label_rtx ();
9093 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
9094 unsignedp, mode, NULL_RTX, NULL, lab,
9095 profile_probability::uninitialized ());
9097 emit_move_insn (target, op1);
9098 emit_label (lab);
9099 return target;
9101 case BIT_NOT_EXPR:
9102 op0 = expand_expr (treeop0, subtarget,
9103 VOIDmode, EXPAND_NORMAL);
9104 if (modifier == EXPAND_STACK_PARM)
9105 target = 0;
9106 /* In case we have to reduce the result to bitfield precision
9107 for unsigned bitfield expand this as XOR with a proper constant
9108 instead. */
9109 if (reduce_bit_field && TYPE_UNSIGNED (type))
9111 int_mode = SCALAR_INT_TYPE_MODE (type);
9112 wide_int mask = wi::mask (TYPE_PRECISION (type),
9113 false, GET_MODE_PRECISION (int_mode));
9115 temp = expand_binop (int_mode, xor_optab, op0,
9116 immed_wide_int_const (mask, int_mode),
9117 target, 1, OPTAB_LIB_WIDEN);
9119 else
9120 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
9121 gcc_assert (temp);
9122 return temp;
9124 /* ??? Can optimize bitwise operations with one arg constant.
9125 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9126 and (a bitwise1 b) bitwise2 b (etc)
9127 but that is probably not worth while. */
9129 case BIT_AND_EXPR:
9130 case BIT_IOR_EXPR:
9131 case BIT_XOR_EXPR:
9132 goto binop;
9134 case LROTATE_EXPR:
9135 case RROTATE_EXPR:
9136 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
9137 || type_has_mode_precision_p (type));
9138 /* fall through */
9140 case LSHIFT_EXPR:
9141 case RSHIFT_EXPR:
9143 /* If this is a fixed-point operation, then we cannot use the code
9144 below because "expand_shift" doesn't support sat/no-sat fixed-point
9145 shifts. */
9146 if (ALL_FIXED_POINT_MODE_P (mode))
9147 goto binop;
9149 if (! safe_from_p (subtarget, treeop1, 1))
9150 subtarget = 0;
9151 if (modifier == EXPAND_STACK_PARM)
9152 target = 0;
9153 op0 = expand_expr (treeop0, subtarget,
9154 VOIDmode, EXPAND_NORMAL);
9156 /* Left shift optimization when shifting across word_size boundary.
9158 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9159 there isn't native instruction to support this wide mode
9160 left shift. Given below scenario:
9162 Type A = (Type) B << C
9164 |< T >|
9165 | dest_high | dest_low |
9167 | word_size |
9169 If the shift amount C caused we shift B to across the word
9170 size boundary, i.e part of B shifted into high half of
9171 destination register, and part of B remains in the low
9172 half, then GCC will use the following left shift expand
9173 logic:
9175 1. Initialize dest_low to B.
9176 2. Initialize every bit of dest_high to the sign bit of B.
9177 3. Logic left shift dest_low by C bit to finalize dest_low.
9178 The value of dest_low before this shift is kept in a temp D.
9179 4. Logic left shift dest_high by C.
9180 5. Logic right shift D by (word_size - C).
9181 6. Or the result of 4 and 5 to finalize dest_high.
9183 While, by checking gimple statements, if operand B is
9184 coming from signed extension, then we can simplify above
9185 expand logic into:
9187 1. dest_high = src_low >> (word_size - C).
9188 2. dest_low = src_low << C.
9190 We can use one arithmetic right shift to finish all the
9191 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9192 needed from 6 into 2.
9194 The case is similar for zero extension, except that we
9195 initialize dest_high to zero rather than copies of the sign
9196 bit from B. Furthermore, we need to use a logical right shift
9197 in this case.
9199 The choice of sign-extension versus zero-extension is
9200 determined entirely by whether or not B is signed and is
9201 independent of the current setting of unsignedp. */
9203 temp = NULL_RTX;
9204 if (code == LSHIFT_EXPR
9205 && target
9206 && REG_P (target)
9207 && GET_MODE_2XWIDER_MODE (word_mode).exists (&int_mode)
9208 && mode == int_mode
9209 && TREE_CONSTANT (treeop1)
9210 && TREE_CODE (treeop0) == SSA_NAME)
9212 gimple *def = SSA_NAME_DEF_STMT (treeop0);
9213 if (is_gimple_assign (def)
9214 && gimple_assign_rhs_code (def) == NOP_EXPR)
9216 scalar_int_mode rmode = SCALAR_INT_TYPE_MODE
9217 (TREE_TYPE (gimple_assign_rhs1 (def)));
9219 if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (int_mode)
9220 && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (word_mode)
9221 && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode))
9222 >= GET_MODE_BITSIZE (word_mode)))
9224 rtx_insn *seq, *seq_old;
9225 poly_uint64 high_off = subreg_highpart_offset (word_mode,
9226 int_mode);
9227 bool extend_unsigned
9228 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def)));
9229 rtx low = lowpart_subreg (word_mode, op0, int_mode);
9230 rtx dest_low = lowpart_subreg (word_mode, target, int_mode);
9231 rtx dest_high = simplify_gen_subreg (word_mode, target,
9232 int_mode, high_off);
9233 HOST_WIDE_INT ramount = (BITS_PER_WORD
9234 - TREE_INT_CST_LOW (treeop1));
9235 tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount);
9237 start_sequence ();
9238 /* dest_high = src_low >> (word_size - C). */
9239 temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low,
9240 rshift, dest_high,
9241 extend_unsigned);
9242 if (temp != dest_high)
9243 emit_move_insn (dest_high, temp);
9245 /* dest_low = src_low << C. */
9246 temp = expand_variable_shift (LSHIFT_EXPR, word_mode, low,
9247 treeop1, dest_low, unsignedp);
9248 if (temp != dest_low)
9249 emit_move_insn (dest_low, temp);
9251 seq = get_insns ();
9252 end_sequence ();
9253 temp = target ;
9255 if (have_insn_for (ASHIFT, int_mode))
9257 bool speed_p = optimize_insn_for_speed_p ();
9258 start_sequence ();
9259 rtx ret_old = expand_variable_shift (code, int_mode,
9260 op0, treeop1,
9261 target,
9262 unsignedp);
9264 seq_old = get_insns ();
9265 end_sequence ();
9266 if (seq_cost (seq, speed_p)
9267 >= seq_cost (seq_old, speed_p))
9269 seq = seq_old;
9270 temp = ret_old;
9273 emit_insn (seq);
9278 if (temp == NULL_RTX)
9279 temp = expand_variable_shift (code, mode, op0, treeop1, target,
9280 unsignedp);
9281 if (code == LSHIFT_EXPR)
9282 temp = REDUCE_BIT_FIELD (temp);
9283 return temp;
9286 /* Could determine the answer when only additive constants differ. Also,
9287 the addition of one can be handled by changing the condition. */
9288 case LT_EXPR:
9289 case LE_EXPR:
9290 case GT_EXPR:
9291 case GE_EXPR:
9292 case EQ_EXPR:
9293 case NE_EXPR:
9294 case UNORDERED_EXPR:
9295 case ORDERED_EXPR:
9296 case UNLT_EXPR:
9297 case UNLE_EXPR:
9298 case UNGT_EXPR:
9299 case UNGE_EXPR:
9300 case UNEQ_EXPR:
9301 case LTGT_EXPR:
9303 temp = do_store_flag (ops,
9304 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9305 tmode != VOIDmode ? tmode : mode);
9306 if (temp)
9307 return temp;
9309 /* Use a compare and a jump for BLKmode comparisons, or for function
9310 type comparisons is have_canonicalize_funcptr_for_compare. */
9312 if ((target == 0
9313 || modifier == EXPAND_STACK_PARM
9314 || ! safe_from_p (target, treeop0, 1)
9315 || ! safe_from_p (target, treeop1, 1)
9316 /* Make sure we don't have a hard reg (such as function's return
9317 value) live across basic blocks, if not optimizing. */
9318 || (!optimize && REG_P (target)
9319 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9320 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9322 emit_move_insn (target, const0_rtx);
9324 rtx_code_label *lab1 = gen_label_rtx ();
9325 jumpifnot_1 (code, treeop0, treeop1, lab1,
9326 profile_probability::uninitialized ());
9328 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
9329 emit_move_insn (target, constm1_rtx);
9330 else
9331 emit_move_insn (target, const1_rtx);
9333 emit_label (lab1);
9334 return target;
9336 case COMPLEX_EXPR:
9337 /* Get the rtx code of the operands. */
9338 op0 = expand_normal (treeop0);
9339 op1 = expand_normal (treeop1);
9341 if (!target)
9342 target = gen_reg_rtx (TYPE_MODE (type));
9343 else
9344 /* If target overlaps with op1, then either we need to force
9345 op1 into a pseudo (if target also overlaps with op0),
9346 or write the complex parts in reverse order. */
9347 switch (GET_CODE (target))
9349 case CONCAT:
9350 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
9352 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
9354 complex_expr_force_op1:
9355 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
9356 emit_move_insn (temp, op1);
9357 op1 = temp;
9358 break;
9360 complex_expr_swap_order:
9361 /* Move the imaginary (op1) and real (op0) parts to their
9362 location. */
9363 write_complex_part (target, op1, true);
9364 write_complex_part (target, op0, false);
9366 return target;
9368 break;
9369 case MEM:
9370 temp = adjust_address_nv (target,
9371 GET_MODE_INNER (GET_MODE (target)), 0);
9372 if (reg_overlap_mentioned_p (temp, op1))
9374 scalar_mode imode = GET_MODE_INNER (GET_MODE (target));
9375 temp = adjust_address_nv (target, imode,
9376 GET_MODE_SIZE (imode));
9377 if (reg_overlap_mentioned_p (temp, op0))
9378 goto complex_expr_force_op1;
9379 goto complex_expr_swap_order;
9381 break;
9382 default:
9383 if (reg_overlap_mentioned_p (target, op1))
9385 if (reg_overlap_mentioned_p (target, op0))
9386 goto complex_expr_force_op1;
9387 goto complex_expr_swap_order;
9389 break;
9392 /* Move the real (op0) and imaginary (op1) parts to their location. */
9393 write_complex_part (target, op0, false);
9394 write_complex_part (target, op1, true);
9396 return target;
9398 case WIDEN_SUM_EXPR:
9400 tree oprnd0 = treeop0;
9401 tree oprnd1 = treeop1;
9403 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9404 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9405 target, unsignedp);
9406 return target;
9409 case VEC_UNPACK_HI_EXPR:
9410 case VEC_UNPACK_LO_EXPR:
9411 case VEC_UNPACK_FIX_TRUNC_HI_EXPR:
9412 case VEC_UNPACK_FIX_TRUNC_LO_EXPR:
9414 op0 = expand_normal (treeop0);
9415 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9416 target, unsignedp);
9417 gcc_assert (temp);
9418 return temp;
9421 case VEC_UNPACK_FLOAT_HI_EXPR:
9422 case VEC_UNPACK_FLOAT_LO_EXPR:
9424 op0 = expand_normal (treeop0);
9425 /* The signedness is determined from input operand. */
9426 temp = expand_widen_pattern_expr
9427 (ops, op0, NULL_RTX, NULL_RTX,
9428 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9430 gcc_assert (temp);
9431 return temp;
9434 case VEC_WIDEN_MULT_HI_EXPR:
9435 case VEC_WIDEN_MULT_LO_EXPR:
9436 case VEC_WIDEN_MULT_EVEN_EXPR:
9437 case VEC_WIDEN_MULT_ODD_EXPR:
9438 case VEC_WIDEN_LSHIFT_HI_EXPR:
9439 case VEC_WIDEN_LSHIFT_LO_EXPR:
9440 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9441 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9442 target, unsignedp);
9443 gcc_assert (target);
9444 return target;
9446 case VEC_PACK_TRUNC_EXPR:
9447 case VEC_PACK_SAT_EXPR:
9448 case VEC_PACK_FIX_TRUNC_EXPR:
9449 mode = TYPE_MODE (TREE_TYPE (treeop0));
9450 goto binop;
9452 case VEC_PACK_FLOAT_EXPR:
9453 mode = TYPE_MODE (TREE_TYPE (treeop0));
9454 expand_operands (treeop0, treeop1,
9455 subtarget, &op0, &op1, EXPAND_NORMAL);
9456 this_optab = optab_for_tree_code (code, TREE_TYPE (treeop0),
9457 optab_default);
9458 target = expand_binop (mode, this_optab, op0, op1, target,
9459 TYPE_UNSIGNED (TREE_TYPE (treeop0)),
9460 OPTAB_LIB_WIDEN);
9461 gcc_assert (target);
9462 return target;
9464 case VEC_PERM_EXPR:
9466 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9467 vec_perm_builder sel;
9468 if (TREE_CODE (treeop2) == VECTOR_CST
9469 && tree_to_vec_perm_builder (&sel, treeop2))
9471 machine_mode sel_mode = TYPE_MODE (TREE_TYPE (treeop2));
9472 temp = expand_vec_perm_const (mode, op0, op1, sel,
9473 sel_mode, target);
9475 else
9477 op2 = expand_normal (treeop2);
9478 temp = expand_vec_perm_var (mode, op0, op1, op2, target);
9480 gcc_assert (temp);
9481 return temp;
9484 case DOT_PROD_EXPR:
9486 tree oprnd0 = treeop0;
9487 tree oprnd1 = treeop1;
9488 tree oprnd2 = treeop2;
9489 rtx op2;
9491 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9492 op2 = expand_normal (oprnd2);
9493 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9494 target, unsignedp);
9495 return target;
9498 case SAD_EXPR:
9500 tree oprnd0 = treeop0;
9501 tree oprnd1 = treeop1;
9502 tree oprnd2 = treeop2;
9503 rtx op2;
9505 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9506 op2 = expand_normal (oprnd2);
9507 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9508 target, unsignedp);
9509 return target;
9512 case REALIGN_LOAD_EXPR:
9514 tree oprnd0 = treeop0;
9515 tree oprnd1 = treeop1;
9516 tree oprnd2 = treeop2;
9517 rtx op2;
9519 this_optab = optab_for_tree_code (code, type, optab_default);
9520 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9521 op2 = expand_normal (oprnd2);
9522 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9523 target, unsignedp);
9524 gcc_assert (temp);
9525 return temp;
9528 case COND_EXPR:
9530 /* A COND_EXPR with its type being VOID_TYPE represents a
9531 conditional jump and is handled in
9532 expand_gimple_cond_expr. */
9533 gcc_assert (!VOID_TYPE_P (type));
9535 /* Note that COND_EXPRs whose type is a structure or union
9536 are required to be constructed to contain assignments of
9537 a temporary variable, so that we can evaluate them here
9538 for side effect only. If type is void, we must do likewise. */
9540 gcc_assert (!TREE_ADDRESSABLE (type)
9541 && !ignore
9542 && TREE_TYPE (treeop1) != void_type_node
9543 && TREE_TYPE (treeop2) != void_type_node);
9545 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9546 if (temp)
9547 return temp;
9549 /* If we are not to produce a result, we have no target. Otherwise,
9550 if a target was specified use it; it will not be used as an
9551 intermediate target unless it is safe. If no target, use a
9552 temporary. */
9554 if (modifier != EXPAND_STACK_PARM
9555 && original_target
9556 && safe_from_p (original_target, treeop0, 1)
9557 && GET_MODE (original_target) == mode
9558 && !MEM_P (original_target))
9559 temp = original_target;
9560 else
9561 temp = assign_temp (type, 0, 1);
9563 do_pending_stack_adjust ();
9564 NO_DEFER_POP;
9565 rtx_code_label *lab0 = gen_label_rtx ();
9566 rtx_code_label *lab1 = gen_label_rtx ();
9567 jumpifnot (treeop0, lab0,
9568 profile_probability::uninitialized ());
9569 store_expr (treeop1, temp,
9570 modifier == EXPAND_STACK_PARM,
9571 false, false);
9573 emit_jump_insn (targetm.gen_jump (lab1));
9574 emit_barrier ();
9575 emit_label (lab0);
9576 store_expr (treeop2, temp,
9577 modifier == EXPAND_STACK_PARM,
9578 false, false);
9580 emit_label (lab1);
9581 OK_DEFER_POP;
9582 return temp;
9585 case VEC_COND_EXPR:
9586 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9587 return target;
9589 case VEC_DUPLICATE_EXPR:
9590 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
9591 target = expand_vector_broadcast (mode, op0);
9592 gcc_assert (target);
9593 return target;
9595 case VEC_SERIES_EXPR:
9596 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, modifier);
9597 return expand_vec_series_expr (mode, op0, op1, target);
9599 case BIT_INSERT_EXPR:
9601 unsigned bitpos = tree_to_uhwi (treeop2);
9602 unsigned bitsize;
9603 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1)))
9604 bitsize = TYPE_PRECISION (TREE_TYPE (treeop1));
9605 else
9606 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1)));
9607 rtx op0 = expand_normal (treeop0);
9608 rtx op1 = expand_normal (treeop1);
9609 rtx dst = gen_reg_rtx (mode);
9610 emit_move_insn (dst, op0);
9611 store_bit_field (dst, bitsize, bitpos, 0, 0,
9612 TYPE_MODE (TREE_TYPE (treeop1)), op1, false);
9613 return dst;
9616 default:
9617 gcc_unreachable ();
9620 /* Here to do an ordinary binary operator. */
9621 binop:
9622 expand_operands (treeop0, treeop1,
9623 subtarget, &op0, &op1, EXPAND_NORMAL);
9624 binop2:
9625 this_optab = optab_for_tree_code (code, type, optab_default);
9626 binop3:
9627 if (modifier == EXPAND_STACK_PARM)
9628 target = 0;
9629 temp = expand_binop (mode, this_optab, op0, op1, target,
9630 unsignedp, OPTAB_LIB_WIDEN);
9631 gcc_assert (temp);
9632 /* Bitwise operations do not need bitfield reduction as we expect their
9633 operands being properly truncated. */
9634 if (code == BIT_XOR_EXPR
9635 || code == BIT_AND_EXPR
9636 || code == BIT_IOR_EXPR)
9637 return temp;
9638 return REDUCE_BIT_FIELD (temp);
9640 #undef REDUCE_BIT_FIELD
9643 /* Return TRUE if expression STMT is suitable for replacement.
9644 Never consider memory loads as replaceable, because those don't ever lead
9645 into constant expressions. */
9647 static bool
9648 stmt_is_replaceable_p (gimple *stmt)
9650 if (ssa_is_replaceable_p (stmt))
9652 /* Don't move around loads. */
9653 if (!gimple_assign_single_p (stmt)
9654 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9655 return true;
9657 return false;
9661 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9662 enum expand_modifier modifier, rtx *alt_rtl,
9663 bool inner_reference_p)
9665 rtx op0, op1, temp, decl_rtl;
9666 tree type;
9667 int unsignedp;
9668 machine_mode mode, dmode;
9669 enum tree_code code = TREE_CODE (exp);
9670 rtx subtarget, original_target;
9671 int ignore;
9672 tree context;
9673 bool reduce_bit_field;
9674 location_t loc = EXPR_LOCATION (exp);
9675 struct separate_ops ops;
9676 tree treeop0, treeop1, treeop2;
9677 tree ssa_name = NULL_TREE;
9678 gimple *g;
9680 type = TREE_TYPE (exp);
9681 mode = TYPE_MODE (type);
9682 unsignedp = TYPE_UNSIGNED (type);
9684 treeop0 = treeop1 = treeop2 = NULL_TREE;
9685 if (!VL_EXP_CLASS_P (exp))
9686 switch (TREE_CODE_LENGTH (code))
9688 default:
9689 case 3: treeop2 = TREE_OPERAND (exp, 2); /* FALLTHRU */
9690 case 2: treeop1 = TREE_OPERAND (exp, 1); /* FALLTHRU */
9691 case 1: treeop0 = TREE_OPERAND (exp, 0); /* FALLTHRU */
9692 case 0: break;
9694 ops.code = code;
9695 ops.type = type;
9696 ops.op0 = treeop0;
9697 ops.op1 = treeop1;
9698 ops.op2 = treeop2;
9699 ops.location = loc;
9701 ignore = (target == const0_rtx
9702 || ((CONVERT_EXPR_CODE_P (code)
9703 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9704 && TREE_CODE (type) == VOID_TYPE));
9706 /* An operation in what may be a bit-field type needs the
9707 result to be reduced to the precision of the bit-field type,
9708 which is narrower than that of the type's mode. */
9709 reduce_bit_field = (!ignore
9710 && INTEGRAL_TYPE_P (type)
9711 && !type_has_mode_precision_p (type));
9713 /* If we are going to ignore this result, we need only do something
9714 if there is a side-effect somewhere in the expression. If there
9715 is, short-circuit the most common cases here. Note that we must
9716 not call expand_expr with anything but const0_rtx in case this
9717 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9719 if (ignore)
9721 if (! TREE_SIDE_EFFECTS (exp))
9722 return const0_rtx;
9724 /* Ensure we reference a volatile object even if value is ignored, but
9725 don't do this if all we are doing is taking its address. */
9726 if (TREE_THIS_VOLATILE (exp)
9727 && TREE_CODE (exp) != FUNCTION_DECL
9728 && mode != VOIDmode && mode != BLKmode
9729 && modifier != EXPAND_CONST_ADDRESS)
9731 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9732 if (MEM_P (temp))
9733 copy_to_reg (temp);
9734 return const0_rtx;
9737 if (TREE_CODE_CLASS (code) == tcc_unary
9738 || code == BIT_FIELD_REF
9739 || code == COMPONENT_REF
9740 || code == INDIRECT_REF)
9741 return expand_expr (treeop0, const0_rtx, VOIDmode,
9742 modifier);
9744 else if (TREE_CODE_CLASS (code) == tcc_binary
9745 || TREE_CODE_CLASS (code) == tcc_comparison
9746 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9748 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9749 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9750 return const0_rtx;
9753 target = 0;
9756 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9757 target = 0;
9759 /* Use subtarget as the target for operand 0 of a binary operation. */
9760 subtarget = get_subtarget (target);
9761 original_target = target;
9763 switch (code)
9765 case LABEL_DECL:
9767 tree function = decl_function_context (exp);
9769 temp = label_rtx (exp);
9770 temp = gen_rtx_LABEL_REF (Pmode, temp);
9772 if (function != current_function_decl
9773 && function != 0)
9774 LABEL_REF_NONLOCAL_P (temp) = 1;
9776 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9777 return temp;
9780 case SSA_NAME:
9781 /* ??? ivopts calls expander, without any preparation from
9782 out-of-ssa. So fake instructions as if this was an access to the
9783 base variable. This unnecessarily allocates a pseudo, see how we can
9784 reuse it, if partition base vars have it set already. */
9785 if (!currently_expanding_to_rtl)
9787 tree var = SSA_NAME_VAR (exp);
9788 if (var && DECL_RTL_SET_P (var))
9789 return DECL_RTL (var);
9790 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9791 LAST_VIRTUAL_REGISTER + 1);
9794 g = get_gimple_for_ssa_name (exp);
9795 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9796 if (g == NULL
9797 && modifier == EXPAND_INITIALIZER
9798 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9799 && (optimize || !SSA_NAME_VAR (exp)
9800 || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9801 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9802 g = SSA_NAME_DEF_STMT (exp);
9803 if (g)
9805 rtx r;
9806 location_t saved_loc = curr_insn_location ();
9807 location_t loc = gimple_location (g);
9808 if (loc != UNKNOWN_LOCATION)
9809 set_curr_insn_location (loc);
9810 ops.code = gimple_assign_rhs_code (g);
9811 switch (get_gimple_rhs_class (ops.code))
9813 case GIMPLE_TERNARY_RHS:
9814 ops.op2 = gimple_assign_rhs3 (g);
9815 /* Fallthru */
9816 case GIMPLE_BINARY_RHS:
9817 ops.op1 = gimple_assign_rhs2 (g);
9819 /* Try to expand conditonal compare. */
9820 if (targetm.gen_ccmp_first)
9822 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
9823 r = expand_ccmp_expr (g, mode);
9824 if (r)
9825 break;
9827 /* Fallthru */
9828 case GIMPLE_UNARY_RHS:
9829 ops.op0 = gimple_assign_rhs1 (g);
9830 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9831 ops.location = loc;
9832 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9833 break;
9834 case GIMPLE_SINGLE_RHS:
9836 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9837 tmode, modifier, alt_rtl,
9838 inner_reference_p);
9839 break;
9841 default:
9842 gcc_unreachable ();
9844 set_curr_insn_location (saved_loc);
9845 if (REG_P (r) && !REG_EXPR (r))
9846 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9847 return r;
9850 ssa_name = exp;
9851 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9852 exp = SSA_NAME_VAR (ssa_name);
9853 goto expand_decl_rtl;
9855 case PARM_DECL:
9856 case VAR_DECL:
9857 /* If a static var's type was incomplete when the decl was written,
9858 but the type is complete now, lay out the decl now. */
9859 if (DECL_SIZE (exp) == 0
9860 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9861 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9862 layout_decl (exp, 0);
9864 /* fall through */
9866 case FUNCTION_DECL:
9867 case RESULT_DECL:
9868 decl_rtl = DECL_RTL (exp);
9869 expand_decl_rtl:
9870 gcc_assert (decl_rtl);
9872 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9873 settings for VECTOR_TYPE_P that might switch for the function. */
9874 if (currently_expanding_to_rtl
9875 && code == VAR_DECL && MEM_P (decl_rtl)
9876 && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode)
9877 decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0);
9878 else
9879 decl_rtl = copy_rtx (decl_rtl);
9881 /* Record writes to register variables. */
9882 if (modifier == EXPAND_WRITE
9883 && REG_P (decl_rtl)
9884 && HARD_REGISTER_P (decl_rtl))
9885 add_to_hard_reg_set (&crtl->asm_clobbers,
9886 GET_MODE (decl_rtl), REGNO (decl_rtl));
9888 /* Ensure variable marked as used even if it doesn't go through
9889 a parser. If it hasn't be used yet, write out an external
9890 definition. */
9891 if (exp)
9892 TREE_USED (exp) = 1;
9894 /* Show we haven't gotten RTL for this yet. */
9895 temp = 0;
9897 /* Variables inherited from containing functions should have
9898 been lowered by this point. */
9899 if (exp)
9900 context = decl_function_context (exp);
9901 gcc_assert (!exp
9902 || SCOPE_FILE_SCOPE_P (context)
9903 || context == current_function_decl
9904 || TREE_STATIC (exp)
9905 || DECL_EXTERNAL (exp)
9906 /* ??? C++ creates functions that are not TREE_STATIC. */
9907 || TREE_CODE (exp) == FUNCTION_DECL);
9909 /* This is the case of an array whose size is to be determined
9910 from its initializer, while the initializer is still being parsed.
9911 ??? We aren't parsing while expanding anymore. */
9913 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9914 temp = validize_mem (decl_rtl);
9916 /* If DECL_RTL is memory, we are in the normal case and the
9917 address is not valid, get the address into a register. */
9919 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9921 if (alt_rtl)
9922 *alt_rtl = decl_rtl;
9923 decl_rtl = use_anchored_address (decl_rtl);
9924 if (modifier != EXPAND_CONST_ADDRESS
9925 && modifier != EXPAND_SUM
9926 && !memory_address_addr_space_p (exp ? DECL_MODE (exp)
9927 : GET_MODE (decl_rtl),
9928 XEXP (decl_rtl, 0),
9929 MEM_ADDR_SPACE (decl_rtl)))
9930 temp = replace_equiv_address (decl_rtl,
9931 copy_rtx (XEXP (decl_rtl, 0)));
9934 /* If we got something, return it. But first, set the alignment
9935 if the address is a register. */
9936 if (temp != 0)
9938 if (exp && MEM_P (temp) && REG_P (XEXP (temp, 0)))
9939 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9941 return temp;
9944 if (exp)
9945 dmode = DECL_MODE (exp);
9946 else
9947 dmode = TYPE_MODE (TREE_TYPE (ssa_name));
9949 /* If the mode of DECL_RTL does not match that of the decl,
9950 there are two cases: we are dealing with a BLKmode value
9951 that is returned in a register, or we are dealing with
9952 a promoted value. In the latter case, return a SUBREG
9953 of the wanted mode, but mark it so that we know that it
9954 was already extended. */
9955 if (REG_P (decl_rtl)
9956 && dmode != BLKmode
9957 && GET_MODE (decl_rtl) != dmode)
9959 machine_mode pmode;
9961 /* Get the signedness to be used for this variable. Ensure we get
9962 the same mode we got when the variable was declared. */
9963 if (code != SSA_NAME)
9964 pmode = promote_decl_mode (exp, &unsignedp);
9965 else if ((g = SSA_NAME_DEF_STMT (ssa_name))
9966 && gimple_code (g) == GIMPLE_CALL
9967 && !gimple_call_internal_p (g))
9968 pmode = promote_function_mode (type, mode, &unsignedp,
9969 gimple_call_fntype (g),
9971 else
9972 pmode = promote_ssa_mode (ssa_name, &unsignedp);
9973 gcc_assert (GET_MODE (decl_rtl) == pmode);
9975 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9976 SUBREG_PROMOTED_VAR_P (temp) = 1;
9977 SUBREG_PROMOTED_SET (temp, unsignedp);
9978 return temp;
9981 return decl_rtl;
9983 case INTEGER_CST:
9985 /* Given that TYPE_PRECISION (type) is not always equal to
9986 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9987 the former to the latter according to the signedness of the
9988 type. */
9989 scalar_int_mode mode = SCALAR_INT_TYPE_MODE (type);
9990 temp = immed_wide_int_const
9991 (wi::to_wide (exp, GET_MODE_PRECISION (mode)), mode);
9992 return temp;
9995 case VECTOR_CST:
9997 tree tmp = NULL_TREE;
9998 if (VECTOR_MODE_P (mode))
9999 return const_vector_from_tree (exp);
10000 scalar_int_mode int_mode;
10001 if (is_int_mode (mode, &int_mode))
10003 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
10004 return const_scalar_mask_from_tree (int_mode, exp);
10005 else
10007 tree type_for_mode
10008 = lang_hooks.types.type_for_mode (int_mode, 1);
10009 if (type_for_mode)
10010 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR,
10011 type_for_mode, exp);
10014 if (!tmp)
10016 vec<constructor_elt, va_gc> *v;
10017 /* Constructors need to be fixed-length. FIXME. */
10018 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant ();
10019 vec_alloc (v, nunits);
10020 for (unsigned int i = 0; i < nunits; ++i)
10021 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
10022 tmp = build_constructor (type, v);
10024 return expand_expr (tmp, ignore ? const0_rtx : target,
10025 tmode, modifier);
10028 case CONST_DECL:
10029 if (modifier == EXPAND_WRITE)
10031 /* Writing into CONST_DECL is always invalid, but handle it
10032 gracefully. */
10033 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
10034 scalar_int_mode address_mode = targetm.addr_space.address_mode (as);
10035 op0 = expand_expr_addr_expr_1 (exp, NULL_RTX, address_mode,
10036 EXPAND_NORMAL, as);
10037 op0 = memory_address_addr_space (mode, op0, as);
10038 temp = gen_rtx_MEM (mode, op0);
10039 set_mem_addr_space (temp, as);
10040 return temp;
10042 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
10044 case REAL_CST:
10045 /* If optimized, generate immediate CONST_DOUBLE
10046 which will be turned into memory by reload if necessary.
10048 We used to force a register so that loop.c could see it. But
10049 this does not allow gen_* patterns to perform optimizations with
10050 the constants. It also produces two insns in cases like "x = 1.0;".
10051 On most machines, floating-point constants are not permitted in
10052 many insns, so we'd end up copying it to a register in any case.
10054 Now, we do the copying in expand_binop, if appropriate. */
10055 return const_double_from_real_value (TREE_REAL_CST (exp),
10056 TYPE_MODE (TREE_TYPE (exp)));
10058 case FIXED_CST:
10059 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
10060 TYPE_MODE (TREE_TYPE (exp)));
10062 case COMPLEX_CST:
10063 /* Handle evaluating a complex constant in a CONCAT target. */
10064 if (original_target && GET_CODE (original_target) == CONCAT)
10066 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
10067 rtx rtarg, itarg;
10069 rtarg = XEXP (original_target, 0);
10070 itarg = XEXP (original_target, 1);
10072 /* Move the real and imaginary parts separately. */
10073 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
10074 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
10076 if (op0 != rtarg)
10077 emit_move_insn (rtarg, op0);
10078 if (op1 != itarg)
10079 emit_move_insn (itarg, op1);
10081 return original_target;
10084 /* fall through */
10086 case STRING_CST:
10087 temp = expand_expr_constant (exp, 1, modifier);
10089 /* temp contains a constant address.
10090 On RISC machines where a constant address isn't valid,
10091 make some insns to get that address into a register. */
10092 if (modifier != EXPAND_CONST_ADDRESS
10093 && modifier != EXPAND_INITIALIZER
10094 && modifier != EXPAND_SUM
10095 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
10096 MEM_ADDR_SPACE (temp)))
10097 return replace_equiv_address (temp,
10098 copy_rtx (XEXP (temp, 0)));
10099 return temp;
10101 case POLY_INT_CST:
10102 return immed_wide_int_const (poly_int_cst_value (exp), mode);
10104 case SAVE_EXPR:
10106 tree val = treeop0;
10107 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
10108 inner_reference_p);
10110 if (!SAVE_EXPR_RESOLVED_P (exp))
10112 /* We can indeed still hit this case, typically via builtin
10113 expanders calling save_expr immediately before expanding
10114 something. Assume this means that we only have to deal
10115 with non-BLKmode values. */
10116 gcc_assert (GET_MODE (ret) != BLKmode);
10118 val = build_decl (curr_insn_location (),
10119 VAR_DECL, NULL, TREE_TYPE (exp));
10120 DECL_ARTIFICIAL (val) = 1;
10121 DECL_IGNORED_P (val) = 1;
10122 treeop0 = val;
10123 TREE_OPERAND (exp, 0) = treeop0;
10124 SAVE_EXPR_RESOLVED_P (exp) = 1;
10126 if (!CONSTANT_P (ret))
10127 ret = copy_to_reg (ret);
10128 SET_DECL_RTL (val, ret);
10131 return ret;
10135 case CONSTRUCTOR:
10136 /* If we don't need the result, just ensure we evaluate any
10137 subexpressions. */
10138 if (ignore)
10140 unsigned HOST_WIDE_INT idx;
10141 tree value;
10143 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
10144 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
10146 return const0_rtx;
10149 return expand_constructor (exp, target, modifier, false);
10151 case TARGET_MEM_REF:
10153 addr_space_t as
10154 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10155 enum insn_code icode;
10156 unsigned int align;
10158 op0 = addr_for_mem_ref (exp, as, true);
10159 op0 = memory_address_addr_space (mode, op0, as);
10160 temp = gen_rtx_MEM (mode, op0);
10161 set_mem_attributes (temp, exp, 0);
10162 set_mem_addr_space (temp, as);
10163 align = get_object_alignment (exp);
10164 if (modifier != EXPAND_WRITE
10165 && modifier != EXPAND_MEMORY
10166 && mode != BLKmode
10167 && align < GET_MODE_ALIGNMENT (mode)
10168 /* If the target does not have special handling for unaligned
10169 loads of mode then it can use regular moves for them. */
10170 && ((icode = optab_handler (movmisalign_optab, mode))
10171 != CODE_FOR_nothing))
10173 struct expand_operand ops[2];
10175 /* We've already validated the memory, and we're creating a
10176 new pseudo destination. The predicates really can't fail,
10177 nor can the generator. */
10178 create_output_operand (&ops[0], NULL_RTX, mode);
10179 create_fixed_operand (&ops[1], temp);
10180 expand_insn (icode, 2, ops);
10181 temp = ops[0].value;
10183 return temp;
10186 case MEM_REF:
10188 const bool reverse = REF_REVERSE_STORAGE_ORDER (exp);
10189 addr_space_t as
10190 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10191 machine_mode address_mode;
10192 tree base = TREE_OPERAND (exp, 0);
10193 gimple *def_stmt;
10194 enum insn_code icode;
10195 unsigned align;
10196 /* Handle expansion of non-aliased memory with non-BLKmode. That
10197 might end up in a register. */
10198 if (mem_ref_refers_to_non_mem_p (exp))
10200 poly_int64 offset = mem_ref_offset (exp).force_shwi ();
10201 base = TREE_OPERAND (base, 0);
10202 poly_uint64 type_size;
10203 if (known_eq (offset, 0)
10204 && !reverse
10205 && poly_int_tree_p (TYPE_SIZE (type), &type_size)
10206 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base)), type_size))
10207 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
10208 target, tmode, modifier);
10209 if (TYPE_MODE (type) == BLKmode)
10211 temp = assign_stack_temp (DECL_MODE (base),
10212 GET_MODE_SIZE (DECL_MODE (base)));
10213 store_expr (base, temp, 0, false, false);
10214 temp = adjust_address (temp, BLKmode, offset);
10215 set_mem_size (temp, int_size_in_bytes (type));
10216 return temp;
10218 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
10219 bitsize_int (offset * BITS_PER_UNIT));
10220 REF_REVERSE_STORAGE_ORDER (exp) = reverse;
10221 return expand_expr (exp, target, tmode, modifier);
10223 address_mode = targetm.addr_space.address_mode (as);
10224 base = TREE_OPERAND (exp, 0);
10225 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
10227 tree mask = gimple_assign_rhs2 (def_stmt);
10228 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
10229 gimple_assign_rhs1 (def_stmt), mask);
10230 TREE_OPERAND (exp, 0) = base;
10232 align = get_object_alignment (exp);
10233 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
10234 op0 = memory_address_addr_space (mode, op0, as);
10235 if (!integer_zerop (TREE_OPERAND (exp, 1)))
10237 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
10238 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
10239 op0 = memory_address_addr_space (mode, op0, as);
10241 temp = gen_rtx_MEM (mode, op0);
10242 set_mem_attributes (temp, exp, 0);
10243 set_mem_addr_space (temp, as);
10244 if (TREE_THIS_VOLATILE (exp))
10245 MEM_VOLATILE_P (temp) = 1;
10246 if (modifier != EXPAND_WRITE
10247 && modifier != EXPAND_MEMORY
10248 && !inner_reference_p
10249 && mode != BLKmode
10250 && align < GET_MODE_ALIGNMENT (mode))
10252 if ((icode = optab_handler (movmisalign_optab, mode))
10253 != CODE_FOR_nothing)
10255 struct expand_operand ops[2];
10257 /* We've already validated the memory, and we're creating a
10258 new pseudo destination. The predicates really can't fail,
10259 nor can the generator. */
10260 create_output_operand (&ops[0], NULL_RTX, mode);
10261 create_fixed_operand (&ops[1], temp);
10262 expand_insn (icode, 2, ops);
10263 temp = ops[0].value;
10265 else if (targetm.slow_unaligned_access (mode, align))
10266 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
10267 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
10268 (modifier == EXPAND_STACK_PARM
10269 ? NULL_RTX : target),
10270 mode, mode, false, alt_rtl);
10272 if (reverse
10273 && modifier != EXPAND_MEMORY
10274 && modifier != EXPAND_WRITE)
10275 temp = flip_storage_order (mode, temp);
10276 return temp;
10279 case ARRAY_REF:
10282 tree array = treeop0;
10283 tree index = treeop1;
10284 tree init;
10286 /* Fold an expression like: "foo"[2].
10287 This is not done in fold so it won't happen inside &.
10288 Don't fold if this is for wide characters since it's too
10289 difficult to do correctly and this is a very rare case. */
10291 if (modifier != EXPAND_CONST_ADDRESS
10292 && modifier != EXPAND_INITIALIZER
10293 && modifier != EXPAND_MEMORY)
10295 tree t = fold_read_from_constant_string (exp);
10297 if (t)
10298 return expand_expr (t, target, tmode, modifier);
10301 /* If this is a constant index into a constant array,
10302 just get the value from the array. Handle both the cases when
10303 we have an explicit constructor and when our operand is a variable
10304 that was declared const. */
10306 if (modifier != EXPAND_CONST_ADDRESS
10307 && modifier != EXPAND_INITIALIZER
10308 && modifier != EXPAND_MEMORY
10309 && TREE_CODE (array) == CONSTRUCTOR
10310 && ! TREE_SIDE_EFFECTS (array)
10311 && TREE_CODE (index) == INTEGER_CST)
10313 unsigned HOST_WIDE_INT ix;
10314 tree field, value;
10316 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
10317 field, value)
10318 if (tree_int_cst_equal (field, index))
10320 if (!TREE_SIDE_EFFECTS (value))
10321 return expand_expr (fold (value), target, tmode, modifier);
10322 break;
10326 else if (optimize >= 1
10327 && modifier != EXPAND_CONST_ADDRESS
10328 && modifier != EXPAND_INITIALIZER
10329 && modifier != EXPAND_MEMORY
10330 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
10331 && TREE_CODE (index) == INTEGER_CST
10332 && (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
10333 && (init = ctor_for_folding (array)) != error_mark_node)
10335 if (init == NULL_TREE)
10337 tree value = build_zero_cst (type);
10338 if (TREE_CODE (value) == CONSTRUCTOR)
10340 /* If VALUE is a CONSTRUCTOR, this optimization is only
10341 useful if this doesn't store the CONSTRUCTOR into
10342 memory. If it does, it is more efficient to just
10343 load the data from the array directly. */
10344 rtx ret = expand_constructor (value, target,
10345 modifier, true);
10346 if (ret == NULL_RTX)
10347 value = NULL_TREE;
10350 if (value)
10351 return expand_expr (value, target, tmode, modifier);
10353 else if (TREE_CODE (init) == CONSTRUCTOR)
10355 unsigned HOST_WIDE_INT ix;
10356 tree field, value;
10358 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
10359 field, value)
10360 if (tree_int_cst_equal (field, index))
10362 if (TREE_SIDE_EFFECTS (value))
10363 break;
10365 if (TREE_CODE (value) == CONSTRUCTOR)
10367 /* If VALUE is a CONSTRUCTOR, this
10368 optimization is only useful if
10369 this doesn't store the CONSTRUCTOR
10370 into memory. If it does, it is more
10371 efficient to just load the data from
10372 the array directly. */
10373 rtx ret = expand_constructor (value, target,
10374 modifier, true);
10375 if (ret == NULL_RTX)
10376 break;
10379 return
10380 expand_expr (fold (value), target, tmode, modifier);
10383 else if (TREE_CODE (init) == STRING_CST)
10385 tree low_bound = array_ref_low_bound (exp);
10386 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
10388 /* Optimize the special case of a zero lower bound.
10390 We convert the lower bound to sizetype to avoid problems
10391 with constant folding. E.g. suppose the lower bound is
10392 1 and its mode is QI. Without the conversion
10393 (ARRAY + (INDEX - (unsigned char)1))
10394 becomes
10395 (ARRAY + (-(unsigned char)1) + INDEX)
10396 which becomes
10397 (ARRAY + 255 + INDEX). Oops! */
10398 if (!integer_zerop (low_bound))
10399 index1 = size_diffop_loc (loc, index1,
10400 fold_convert_loc (loc, sizetype,
10401 low_bound));
10403 if (tree_fits_uhwi_p (index1)
10404 && compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
10406 tree type = TREE_TYPE (TREE_TYPE (init));
10407 scalar_int_mode mode;
10409 if (is_int_mode (TYPE_MODE (type), &mode)
10410 && GET_MODE_SIZE (mode) == 1)
10411 return gen_int_mode (TREE_STRING_POINTER (init)
10412 [TREE_INT_CST_LOW (index1)],
10413 mode);
10418 goto normal_inner_ref;
10420 case COMPONENT_REF:
10421 /* If the operand is a CONSTRUCTOR, we can just extract the
10422 appropriate field if it is present. */
10423 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10425 unsigned HOST_WIDE_INT idx;
10426 tree field, value;
10427 scalar_int_mode field_mode;
10429 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10430 idx, field, value)
10431 if (field == treeop1
10432 /* We can normally use the value of the field in the
10433 CONSTRUCTOR. However, if this is a bitfield in
10434 an integral mode that we can fit in a HOST_WIDE_INT,
10435 we must mask only the number of bits in the bitfield,
10436 since this is done implicitly by the constructor. If
10437 the bitfield does not meet either of those conditions,
10438 we can't do this optimization. */
10439 && (! DECL_BIT_FIELD (field)
10440 || (is_int_mode (DECL_MODE (field), &field_mode)
10441 && (GET_MODE_PRECISION (field_mode)
10442 <= HOST_BITS_PER_WIDE_INT))))
10444 if (DECL_BIT_FIELD (field)
10445 && modifier == EXPAND_STACK_PARM)
10446 target = 0;
10447 op0 = expand_expr (value, target, tmode, modifier);
10448 if (DECL_BIT_FIELD (field))
10450 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10451 scalar_int_mode imode
10452 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field));
10454 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10456 op1 = gen_int_mode ((HOST_WIDE_INT_1 << bitsize) - 1,
10457 imode);
10458 op0 = expand_and (imode, op0, op1, target);
10460 else
10462 int count = GET_MODE_PRECISION (imode) - bitsize;
10464 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10465 target, 0);
10466 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10467 target, 0);
10471 return op0;
10474 goto normal_inner_ref;
10476 case BIT_FIELD_REF:
10477 case ARRAY_RANGE_REF:
10478 normal_inner_ref:
10480 machine_mode mode1, mode2;
10481 poly_int64 bitsize, bitpos, bytepos;
10482 tree offset;
10483 int reversep, volatilep = 0, must_force_mem;
10484 tree tem
10485 = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
10486 &unsignedp, &reversep, &volatilep);
10487 rtx orig_op0, memloc;
10488 bool clear_mem_expr = false;
10490 /* If we got back the original object, something is wrong. Perhaps
10491 we are evaluating an expression too early. In any event, don't
10492 infinitely recurse. */
10493 gcc_assert (tem != exp);
10495 /* If TEM's type is a union of variable size, pass TARGET to the inner
10496 computation, since it will need a temporary and TARGET is known
10497 to have to do. This occurs in unchecked conversion in Ada. */
10498 orig_op0 = op0
10499 = expand_expr_real (tem,
10500 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10501 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10502 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10503 != INTEGER_CST)
10504 && modifier != EXPAND_STACK_PARM
10505 ? target : NULL_RTX),
10506 VOIDmode,
10507 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10508 NULL, true);
10510 /* If the field has a mode, we want to access it in the
10511 field's mode, not the computed mode.
10512 If a MEM has VOIDmode (external with incomplete type),
10513 use BLKmode for it instead. */
10514 if (MEM_P (op0))
10516 if (mode1 != VOIDmode)
10517 op0 = adjust_address (op0, mode1, 0);
10518 else if (GET_MODE (op0) == VOIDmode)
10519 op0 = adjust_address (op0, BLKmode, 0);
10522 mode2
10523 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10525 /* If we have either an offset, a BLKmode result, or a reference
10526 outside the underlying object, we must force it to memory.
10527 Such a case can occur in Ada if we have unchecked conversion
10528 of an expression from a scalar type to an aggregate type or
10529 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10530 passed a partially uninitialized object or a view-conversion
10531 to a larger size. */
10532 must_force_mem = (offset
10533 || mode1 == BLKmode
10534 || (mode == BLKmode
10535 && !int_mode_for_size (bitsize, 1).exists ())
10536 || maybe_gt (bitpos + bitsize,
10537 GET_MODE_BITSIZE (mode2)));
10539 /* Handle CONCAT first. */
10540 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10542 if (known_eq (bitpos, 0)
10543 && known_eq (bitsize, GET_MODE_BITSIZE (GET_MODE (op0)))
10544 && COMPLEX_MODE_P (mode1)
10545 && COMPLEX_MODE_P (GET_MODE (op0))
10546 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1))
10547 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0)))))
10549 if (reversep)
10550 op0 = flip_storage_order (GET_MODE (op0), op0);
10551 if (mode1 != GET_MODE (op0))
10553 rtx parts[2];
10554 for (int i = 0; i < 2; i++)
10556 rtx op = read_complex_part (op0, i != 0);
10557 if (GET_CODE (op) == SUBREG)
10558 op = force_reg (GET_MODE (op), op);
10559 rtx temp = gen_lowpart_common (GET_MODE_INNER (mode1),
10560 op);
10561 if (temp)
10562 op = temp;
10563 else
10565 if (!REG_P (op) && !MEM_P (op))
10566 op = force_reg (GET_MODE (op), op);
10567 op = gen_lowpart (GET_MODE_INNER (mode1), op);
10569 parts[i] = op;
10571 op0 = gen_rtx_CONCAT (mode1, parts[0], parts[1]);
10573 return op0;
10575 if (known_eq (bitpos, 0)
10576 && known_eq (bitsize,
10577 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))))
10578 && maybe_ne (bitsize, 0))
10580 op0 = XEXP (op0, 0);
10581 mode2 = GET_MODE (op0);
10583 else if (known_eq (bitpos,
10584 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))))
10585 && known_eq (bitsize,
10586 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1))))
10587 && maybe_ne (bitpos, 0)
10588 && maybe_ne (bitsize, 0))
10590 op0 = XEXP (op0, 1);
10591 bitpos = 0;
10592 mode2 = GET_MODE (op0);
10594 else
10595 /* Otherwise force into memory. */
10596 must_force_mem = 1;
10599 /* If this is a constant, put it in a register if it is a legitimate
10600 constant and we don't need a memory reference. */
10601 if (CONSTANT_P (op0)
10602 && mode2 != BLKmode
10603 && targetm.legitimate_constant_p (mode2, op0)
10604 && !must_force_mem)
10605 op0 = force_reg (mode2, op0);
10607 /* Otherwise, if this is a constant, try to force it to the constant
10608 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10609 is a legitimate constant. */
10610 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10611 op0 = validize_mem (memloc);
10613 /* Otherwise, if this is a constant or the object is not in memory
10614 and need be, put it there. */
10615 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10617 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10618 emit_move_insn (memloc, op0);
10619 op0 = memloc;
10620 clear_mem_expr = true;
10623 if (offset)
10625 machine_mode address_mode;
10626 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10627 EXPAND_SUM);
10629 gcc_assert (MEM_P (op0));
10631 address_mode = get_address_mode (op0);
10632 if (GET_MODE (offset_rtx) != address_mode)
10634 /* We cannot be sure that the RTL in offset_rtx is valid outside
10635 of a memory address context, so force it into a register
10636 before attempting to convert it to the desired mode. */
10637 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10638 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10641 /* See the comment in expand_assignment for the rationale. */
10642 if (mode1 != VOIDmode
10643 && maybe_ne (bitpos, 0)
10644 && maybe_gt (bitsize, 0)
10645 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
10646 && multiple_p (bitpos, bitsize)
10647 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1))
10648 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10650 op0 = adjust_address (op0, mode1, bytepos);
10651 bitpos = 0;
10654 op0 = offset_address (op0, offset_rtx,
10655 highest_pow2_factor (offset));
10658 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10659 record its alignment as BIGGEST_ALIGNMENT. */
10660 if (MEM_P (op0)
10661 && known_eq (bitpos, 0)
10662 && offset != 0
10663 && is_aligning_offset (offset, tem))
10664 set_mem_align (op0, BIGGEST_ALIGNMENT);
10666 /* Don't forget about volatility even if this is a bitfield. */
10667 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10669 if (op0 == orig_op0)
10670 op0 = copy_rtx (op0);
10672 MEM_VOLATILE_P (op0) = 1;
10675 /* In cases where an aligned union has an unaligned object
10676 as a field, we might be extracting a BLKmode value from
10677 an integer-mode (e.g., SImode) object. Handle this case
10678 by doing the extract into an object as wide as the field
10679 (which we know to be the width of a basic mode), then
10680 storing into memory, and changing the mode to BLKmode. */
10681 if (mode1 == VOIDmode
10682 || REG_P (op0) || GET_CODE (op0) == SUBREG
10683 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10684 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10685 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10686 && modifier != EXPAND_CONST_ADDRESS
10687 && modifier != EXPAND_INITIALIZER
10688 && modifier != EXPAND_MEMORY)
10689 /* If the bitfield is volatile and the bitsize
10690 is narrower than the access size of the bitfield,
10691 we need to extract bitfields from the access. */
10692 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10693 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10694 && mode1 != BLKmode
10695 && maybe_lt (bitsize, GET_MODE_SIZE (mode1) * BITS_PER_UNIT))
10696 /* If the field isn't aligned enough to fetch as a memref,
10697 fetch it as a bit field. */
10698 || (mode1 != BLKmode
10699 && (((MEM_P (op0)
10700 ? MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10701 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode1))
10702 : TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10703 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode)))
10704 && modifier != EXPAND_MEMORY
10705 && ((modifier == EXPAND_CONST_ADDRESS
10706 || modifier == EXPAND_INITIALIZER)
10707 ? STRICT_ALIGNMENT
10708 : targetm.slow_unaligned_access (mode1,
10709 MEM_ALIGN (op0))))
10710 || !multiple_p (bitpos, BITS_PER_UNIT)))
10711 /* If the type and the field are a constant size and the
10712 size of the type isn't the same size as the bitfield,
10713 we must use bitfield operations. */
10714 || (known_size_p (bitsize)
10715 && TYPE_SIZE (TREE_TYPE (exp))
10716 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp)))
10717 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))),
10718 bitsize)))
10720 machine_mode ext_mode = mode;
10722 if (ext_mode == BLKmode
10723 && ! (target != 0 && MEM_P (op0)
10724 && MEM_P (target)
10725 && multiple_p (bitpos, BITS_PER_UNIT)))
10726 ext_mode = int_mode_for_size (bitsize, 1).else_blk ();
10728 if (ext_mode == BLKmode)
10730 if (target == 0)
10731 target = assign_temp (type, 1, 1);
10733 /* ??? Unlike the similar test a few lines below, this one is
10734 very likely obsolete. */
10735 if (known_eq (bitsize, 0))
10736 return target;
10738 /* In this case, BITPOS must start at a byte boundary and
10739 TARGET, if specified, must be a MEM. */
10740 gcc_assert (MEM_P (op0)
10741 && (!target || MEM_P (target)));
10743 bytepos = exact_div (bitpos, BITS_PER_UNIT);
10744 poly_int64 bytesize = bits_to_bytes_round_up (bitsize);
10745 emit_block_move (target,
10746 adjust_address (op0, VOIDmode, bytepos),
10747 gen_int_mode (bytesize, Pmode),
10748 (modifier == EXPAND_STACK_PARM
10749 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10751 return target;
10754 /* If we have nothing to extract, the result will be 0 for targets
10755 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10756 return 0 for the sake of consistency, as reading a zero-sized
10757 bitfield is valid in Ada and the value is fully specified. */
10758 if (known_eq (bitsize, 0))
10759 return const0_rtx;
10761 op0 = validize_mem (op0);
10763 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10764 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10766 /* If the result has a record type and the extraction is done in
10767 an integral mode, then the field may be not aligned on a byte
10768 boundary; in this case, if it has reverse storage order, it
10769 needs to be extracted as a scalar field with reverse storage
10770 order and put back into memory order afterwards. */
10771 if (TREE_CODE (type) == RECORD_TYPE
10772 && GET_MODE_CLASS (ext_mode) == MODE_INT)
10773 reversep = TYPE_REVERSE_STORAGE_ORDER (type);
10775 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10776 (modifier == EXPAND_STACK_PARM
10777 ? NULL_RTX : target),
10778 ext_mode, ext_mode, reversep, alt_rtl);
10780 /* If the result has a record type and the mode of OP0 is an
10781 integral mode then, if BITSIZE is narrower than this mode
10782 and this is for big-endian data, we must put the field
10783 into the high-order bits. And we must also put it back
10784 into memory order if it has been previously reversed. */
10785 scalar_int_mode op0_mode;
10786 if (TREE_CODE (type) == RECORD_TYPE
10787 && is_int_mode (GET_MODE (op0), &op0_mode))
10789 HOST_WIDE_INT size = GET_MODE_BITSIZE (op0_mode);
10791 gcc_checking_assert (known_le (bitsize, size));
10792 if (maybe_lt (bitsize, size)
10793 && reversep ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
10794 op0 = expand_shift (LSHIFT_EXPR, op0_mode, op0,
10795 size - bitsize, op0, 1);
10797 if (reversep)
10798 op0 = flip_storage_order (op0_mode, op0);
10801 /* If the result type is BLKmode, store the data into a temporary
10802 of the appropriate type, but with the mode corresponding to the
10803 mode for the data we have (op0's mode). */
10804 if (mode == BLKmode)
10806 rtx new_rtx
10807 = assign_stack_temp_for_type (ext_mode,
10808 GET_MODE_BITSIZE (ext_mode),
10809 type);
10810 emit_move_insn (new_rtx, op0);
10811 op0 = copy_rtx (new_rtx);
10812 PUT_MODE (op0, BLKmode);
10815 return op0;
10818 /* If the result is BLKmode, use that to access the object
10819 now as well. */
10820 if (mode == BLKmode)
10821 mode1 = BLKmode;
10823 /* Get a reference to just this component. */
10824 bytepos = bits_to_bytes_round_down (bitpos);
10825 if (modifier == EXPAND_CONST_ADDRESS
10826 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10827 op0 = adjust_address_nv (op0, mode1, bytepos);
10828 else
10829 op0 = adjust_address (op0, mode1, bytepos);
10831 if (op0 == orig_op0)
10832 op0 = copy_rtx (op0);
10834 /* Don't set memory attributes if the base expression is
10835 SSA_NAME that got expanded as a MEM. In that case, we should
10836 just honor its original memory attributes. */
10837 if (TREE_CODE (tem) != SSA_NAME || !MEM_P (orig_op0))
10838 set_mem_attributes (op0, exp, 0);
10840 if (REG_P (XEXP (op0, 0)))
10841 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10843 /* If op0 is a temporary because the original expressions was forced
10844 to memory, clear MEM_EXPR so that the original expression cannot
10845 be marked as addressable through MEM_EXPR of the temporary. */
10846 if (clear_mem_expr)
10847 set_mem_expr (op0, NULL_TREE);
10849 MEM_VOLATILE_P (op0) |= volatilep;
10851 if (reversep
10852 && modifier != EXPAND_MEMORY
10853 && modifier != EXPAND_WRITE)
10854 op0 = flip_storage_order (mode1, op0);
10856 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10857 || modifier == EXPAND_CONST_ADDRESS
10858 || modifier == EXPAND_INITIALIZER)
10859 return op0;
10861 if (target == 0)
10862 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10864 convert_move (target, op0, unsignedp);
10865 return target;
10868 case OBJ_TYPE_REF:
10869 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10871 case CALL_EXPR:
10872 /* All valid uses of __builtin_va_arg_pack () are removed during
10873 inlining. */
10874 if (CALL_EXPR_VA_ARG_PACK (exp))
10875 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10877 tree fndecl = get_callee_fndecl (exp), attr;
10879 if (fndecl
10880 /* Don't diagnose the error attribute in thunks, those are
10881 artificially created. */
10882 && !CALL_FROM_THUNK_P (exp)
10883 && (attr = lookup_attribute ("error",
10884 DECL_ATTRIBUTES (fndecl))) != NULL)
10886 const char *ident = lang_hooks.decl_printable_name (fndecl, 1);
10887 error ("%Kcall to %qs declared with attribute error: %s", exp,
10888 identifier_to_locale (ident),
10889 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10891 if (fndecl
10892 /* Don't diagnose the warning attribute in thunks, those are
10893 artificially created. */
10894 && !CALL_FROM_THUNK_P (exp)
10895 && (attr = lookup_attribute ("warning",
10896 DECL_ATTRIBUTES (fndecl))) != NULL)
10898 const char *ident = lang_hooks.decl_printable_name (fndecl, 1);
10899 warning_at (tree_nonartificial_location (exp), 0,
10900 "%Kcall to %qs declared with attribute warning: %s",
10901 exp, identifier_to_locale (ident),
10902 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10905 /* Check for a built-in function. */
10906 if (fndecl && DECL_BUILT_IN (fndecl))
10908 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10909 return expand_builtin (exp, target, subtarget, tmode, ignore);
10912 return expand_call (exp, target, ignore);
10914 case VIEW_CONVERT_EXPR:
10915 op0 = NULL_RTX;
10917 /* If we are converting to BLKmode, try to avoid an intermediate
10918 temporary by fetching an inner memory reference. */
10919 if (mode == BLKmode
10920 && poly_int_tree_p (TYPE_SIZE (type))
10921 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10922 && handled_component_p (treeop0))
10924 machine_mode mode1;
10925 poly_int64 bitsize, bitpos, bytepos;
10926 tree offset;
10927 int unsignedp, reversep, volatilep = 0;
10928 tree tem
10929 = get_inner_reference (treeop0, &bitsize, &bitpos, &offset, &mode1,
10930 &unsignedp, &reversep, &volatilep);
10931 rtx orig_op0;
10933 /* ??? We should work harder and deal with non-zero offsets. */
10934 if (!offset
10935 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
10936 && !reversep
10937 && known_size_p (bitsize)
10938 && known_eq (wi::to_poly_offset (TYPE_SIZE (type)), bitsize))
10940 /* See the normal_inner_ref case for the rationale. */
10941 orig_op0
10942 = expand_expr_real (tem,
10943 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10944 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10945 != INTEGER_CST)
10946 && modifier != EXPAND_STACK_PARM
10947 ? target : NULL_RTX),
10948 VOIDmode,
10949 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10950 NULL, true);
10952 if (MEM_P (orig_op0))
10954 op0 = orig_op0;
10956 /* Get a reference to just this component. */
10957 if (modifier == EXPAND_CONST_ADDRESS
10958 || modifier == EXPAND_SUM
10959 || modifier == EXPAND_INITIALIZER)
10960 op0 = adjust_address_nv (op0, mode, bytepos);
10961 else
10962 op0 = adjust_address (op0, mode, bytepos);
10964 if (op0 == orig_op0)
10965 op0 = copy_rtx (op0);
10967 set_mem_attributes (op0, treeop0, 0);
10968 if (REG_P (XEXP (op0, 0)))
10969 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10971 MEM_VOLATILE_P (op0) |= volatilep;
10976 if (!op0)
10977 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
10978 NULL, inner_reference_p);
10980 /* If the input and output modes are both the same, we are done. */
10981 if (mode == GET_MODE (op0))
10983 /* If neither mode is BLKmode, and both modes are the same size
10984 then we can use gen_lowpart. */
10985 else if (mode != BLKmode
10986 && GET_MODE (op0) != BLKmode
10987 && known_eq (GET_MODE_PRECISION (mode),
10988 GET_MODE_PRECISION (GET_MODE (op0)))
10989 && !COMPLEX_MODE_P (GET_MODE (op0)))
10991 if (GET_CODE (op0) == SUBREG)
10992 op0 = force_reg (GET_MODE (op0), op0);
10993 temp = gen_lowpart_common (mode, op0);
10994 if (temp)
10995 op0 = temp;
10996 else
10998 if (!REG_P (op0) && !MEM_P (op0))
10999 op0 = force_reg (GET_MODE (op0), op0);
11000 op0 = gen_lowpart (mode, op0);
11003 /* If both types are integral, convert from one mode to the other. */
11004 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
11005 op0 = convert_modes (mode, GET_MODE (op0), op0,
11006 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
11007 /* If the output type is a bit-field type, do an extraction. */
11008 else if (reduce_bit_field)
11009 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
11010 TYPE_UNSIGNED (type), NULL_RTX,
11011 mode, mode, false, NULL);
11012 /* As a last resort, spill op0 to memory, and reload it in a
11013 different mode. */
11014 else if (!MEM_P (op0))
11016 /* If the operand is not a MEM, force it into memory. Since we
11017 are going to be changing the mode of the MEM, don't call
11018 force_const_mem for constants because we don't allow pool
11019 constants to change mode. */
11020 tree inner_type = TREE_TYPE (treeop0);
11022 gcc_assert (!TREE_ADDRESSABLE (exp));
11024 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
11025 target
11026 = assign_stack_temp_for_type
11027 (TYPE_MODE (inner_type),
11028 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
11030 emit_move_insn (target, op0);
11031 op0 = target;
11034 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11035 output type is such that the operand is known to be aligned, indicate
11036 that it is. Otherwise, we need only be concerned about alignment for
11037 non-BLKmode results. */
11038 if (MEM_P (op0))
11040 enum insn_code icode;
11042 if (modifier != EXPAND_WRITE
11043 && modifier != EXPAND_MEMORY
11044 && !inner_reference_p
11045 && mode != BLKmode
11046 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
11048 /* If the target does have special handling for unaligned
11049 loads of mode then use them. */
11050 if ((icode = optab_handler (movmisalign_optab, mode))
11051 != CODE_FOR_nothing)
11053 rtx reg;
11055 op0 = adjust_address (op0, mode, 0);
11056 /* We've already validated the memory, and we're creating a
11057 new pseudo destination. The predicates really can't
11058 fail. */
11059 reg = gen_reg_rtx (mode);
11061 /* Nor can the insn generator. */
11062 rtx_insn *insn = GEN_FCN (icode) (reg, op0);
11063 emit_insn (insn);
11064 return reg;
11066 else if (STRICT_ALIGNMENT)
11068 poly_uint64 mode_size = GET_MODE_SIZE (mode);
11069 poly_uint64 temp_size = mode_size;
11070 if (GET_MODE (op0) != BLKmode)
11071 temp_size = upper_bound (temp_size,
11072 GET_MODE_SIZE (GET_MODE (op0)));
11073 rtx new_rtx
11074 = assign_stack_temp_for_type (mode, temp_size, type);
11075 rtx new_with_op0_mode
11076 = adjust_address (new_rtx, GET_MODE (op0), 0);
11078 gcc_assert (!TREE_ADDRESSABLE (exp));
11080 if (GET_MODE (op0) == BLKmode)
11082 rtx size_rtx = gen_int_mode (mode_size, Pmode);
11083 emit_block_move (new_with_op0_mode, op0, size_rtx,
11084 (modifier == EXPAND_STACK_PARM
11085 ? BLOCK_OP_CALL_PARM
11086 : BLOCK_OP_NORMAL));
11088 else
11089 emit_move_insn (new_with_op0_mode, op0);
11091 op0 = new_rtx;
11095 op0 = adjust_address (op0, mode, 0);
11098 return op0;
11100 case MODIFY_EXPR:
11102 tree lhs = treeop0;
11103 tree rhs = treeop1;
11104 gcc_assert (ignore);
11106 /* Check for |= or &= of a bitfield of size one into another bitfield
11107 of size 1. In this case, (unless we need the result of the
11108 assignment) we can do this more efficiently with a
11109 test followed by an assignment, if necessary.
11111 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11112 things change so we do, this code should be enhanced to
11113 support it. */
11114 if (TREE_CODE (lhs) == COMPONENT_REF
11115 && (TREE_CODE (rhs) == BIT_IOR_EXPR
11116 || TREE_CODE (rhs) == BIT_AND_EXPR)
11117 && TREE_OPERAND (rhs, 0) == lhs
11118 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
11119 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
11120 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
11122 rtx_code_label *label = gen_label_rtx ();
11123 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
11124 do_jump (TREE_OPERAND (rhs, 1),
11125 value ? label : 0,
11126 value ? 0 : label,
11127 profile_probability::uninitialized ());
11128 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
11129 false);
11130 do_pending_stack_adjust ();
11131 emit_label (label);
11132 return const0_rtx;
11135 expand_assignment (lhs, rhs, false);
11136 return const0_rtx;
11139 case ADDR_EXPR:
11140 return expand_expr_addr_expr (exp, target, tmode, modifier);
11142 case REALPART_EXPR:
11143 op0 = expand_normal (treeop0);
11144 return read_complex_part (op0, false);
11146 case IMAGPART_EXPR:
11147 op0 = expand_normal (treeop0);
11148 return read_complex_part (op0, true);
11150 case RETURN_EXPR:
11151 case LABEL_EXPR:
11152 case GOTO_EXPR:
11153 case SWITCH_EXPR:
11154 case ASM_EXPR:
11155 /* Expanded in cfgexpand.c. */
11156 gcc_unreachable ();
11158 case TRY_CATCH_EXPR:
11159 case CATCH_EXPR:
11160 case EH_FILTER_EXPR:
11161 case TRY_FINALLY_EXPR:
11162 /* Lowered by tree-eh.c. */
11163 gcc_unreachable ();
11165 case WITH_CLEANUP_EXPR:
11166 case CLEANUP_POINT_EXPR:
11167 case TARGET_EXPR:
11168 case CASE_LABEL_EXPR:
11169 case VA_ARG_EXPR:
11170 case BIND_EXPR:
11171 case INIT_EXPR:
11172 case CONJ_EXPR:
11173 case COMPOUND_EXPR:
11174 case PREINCREMENT_EXPR:
11175 case PREDECREMENT_EXPR:
11176 case POSTINCREMENT_EXPR:
11177 case POSTDECREMENT_EXPR:
11178 case LOOP_EXPR:
11179 case EXIT_EXPR:
11180 case COMPOUND_LITERAL_EXPR:
11181 /* Lowered by gimplify.c. */
11182 gcc_unreachable ();
11184 case FDESC_EXPR:
11185 /* Function descriptors are not valid except for as
11186 initialization constants, and should not be expanded. */
11187 gcc_unreachable ();
11189 case WITH_SIZE_EXPR:
11190 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11191 have pulled out the size to use in whatever context it needed. */
11192 return expand_expr_real (treeop0, original_target, tmode,
11193 modifier, alt_rtl, inner_reference_p);
11195 default:
11196 return expand_expr_real_2 (&ops, target, tmode, modifier);
11200 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11201 signedness of TYPE), possibly returning the result in TARGET.
11202 TYPE is known to be a partial integer type. */
11203 static rtx
11204 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
11206 HOST_WIDE_INT prec = TYPE_PRECISION (type);
11207 if (target && GET_MODE (target) != GET_MODE (exp))
11208 target = 0;
11209 /* For constant values, reduce using build_int_cst_type. */
11210 poly_int64 const_exp;
11211 if (poly_int_rtx_p (exp, &const_exp))
11213 tree t = build_int_cst_type (type, const_exp);
11214 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
11216 else if (TYPE_UNSIGNED (type))
11218 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11219 rtx mask = immed_wide_int_const
11220 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
11221 return expand_and (mode, exp, mask, target);
11223 else
11225 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11226 int count = GET_MODE_PRECISION (mode) - prec;
11227 exp = expand_shift (LSHIFT_EXPR, mode, exp, count, target, 0);
11228 return expand_shift (RSHIFT_EXPR, mode, exp, count, target, 0);
11232 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11233 when applied to the address of EXP produces an address known to be
11234 aligned more than BIGGEST_ALIGNMENT. */
11236 static int
11237 is_aligning_offset (const_tree offset, const_tree exp)
11239 /* Strip off any conversions. */
11240 while (CONVERT_EXPR_P (offset))
11241 offset = TREE_OPERAND (offset, 0);
11243 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11244 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11245 if (TREE_CODE (offset) != BIT_AND_EXPR
11246 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
11247 || compare_tree_int (TREE_OPERAND (offset, 1),
11248 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
11249 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1))
11250 return 0;
11252 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11253 It must be NEGATE_EXPR. Then strip any more conversions. */
11254 offset = TREE_OPERAND (offset, 0);
11255 while (CONVERT_EXPR_P (offset))
11256 offset = TREE_OPERAND (offset, 0);
11258 if (TREE_CODE (offset) != NEGATE_EXPR)
11259 return 0;
11261 offset = TREE_OPERAND (offset, 0);
11262 while (CONVERT_EXPR_P (offset))
11263 offset = TREE_OPERAND (offset, 0);
11265 /* This must now be the address of EXP. */
11266 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
11269 /* Return the tree node if an ARG corresponds to a string constant or zero
11270 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11271 in bytes within the string that ARG is accessing. The type of the
11272 offset will be `sizetype'. */
11274 tree
11275 string_constant (tree arg, tree *ptr_offset)
11277 tree array, offset, lower_bound;
11278 STRIP_NOPS (arg);
11280 if (TREE_CODE (arg) == ADDR_EXPR)
11282 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
11284 *ptr_offset = size_zero_node;
11285 return TREE_OPERAND (arg, 0);
11287 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
11289 array = TREE_OPERAND (arg, 0);
11290 offset = size_zero_node;
11292 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
11294 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
11295 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
11296 if (TREE_CODE (array) != STRING_CST && !VAR_P (array))
11297 return 0;
11299 /* Check if the array has a nonzero lower bound. */
11300 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
11301 if (!integer_zerop (lower_bound))
11303 /* If the offset and base aren't both constants, return 0. */
11304 if (TREE_CODE (lower_bound) != INTEGER_CST)
11305 return 0;
11306 if (TREE_CODE (offset) != INTEGER_CST)
11307 return 0;
11308 /* Adjust offset by the lower bound. */
11309 offset = size_diffop (fold_convert (sizetype, offset),
11310 fold_convert (sizetype, lower_bound));
11313 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
11315 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
11316 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
11317 if (TREE_CODE (array) != ADDR_EXPR)
11318 return 0;
11319 array = TREE_OPERAND (array, 0);
11320 if (TREE_CODE (array) != STRING_CST && !VAR_P (array))
11321 return 0;
11323 else
11324 return 0;
11326 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
11328 tree arg0 = TREE_OPERAND (arg, 0);
11329 tree arg1 = TREE_OPERAND (arg, 1);
11331 STRIP_NOPS (arg0);
11332 STRIP_NOPS (arg1);
11334 if (TREE_CODE (arg0) == ADDR_EXPR
11335 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
11336 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
11338 array = TREE_OPERAND (arg0, 0);
11339 offset = arg1;
11341 else if (TREE_CODE (arg1) == ADDR_EXPR
11342 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
11343 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
11345 array = TREE_OPERAND (arg1, 0);
11346 offset = arg0;
11348 else
11349 return 0;
11351 else
11352 return 0;
11354 if (TREE_CODE (array) == STRING_CST)
11356 *ptr_offset = fold_convert (sizetype, offset);
11357 return array;
11359 else if (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
11361 int length;
11362 tree init = ctor_for_folding (array);
11364 /* Variables initialized to string literals can be handled too. */
11365 if (init == error_mark_node
11366 || !init
11367 || TREE_CODE (init) != STRING_CST)
11368 return 0;
11370 /* Avoid const char foo[4] = "abcde"; */
11371 if (DECL_SIZE_UNIT (array) == NULL_TREE
11372 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
11373 || (length = TREE_STRING_LENGTH (init)) <= 0
11374 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
11375 return 0;
11377 /* If variable is bigger than the string literal, OFFSET must be constant
11378 and inside of the bounds of the string literal. */
11379 offset = fold_convert (sizetype, offset);
11380 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
11381 && (! tree_fits_uhwi_p (offset)
11382 || compare_tree_int (offset, length) >= 0))
11383 return 0;
11385 *ptr_offset = offset;
11386 return init;
11389 return 0;
11392 /* Generate code to calculate OPS, and exploded expression
11393 using a store-flag instruction and return an rtx for the result.
11394 OPS reflects a comparison.
11396 If TARGET is nonzero, store the result there if convenient.
11398 Return zero if there is no suitable set-flag instruction
11399 available on this machine.
11401 Once expand_expr has been called on the arguments of the comparison,
11402 we are committed to doing the store flag, since it is not safe to
11403 re-evaluate the expression. We emit the store-flag insn by calling
11404 emit_store_flag, but only expand the arguments if we have a reason
11405 to believe that emit_store_flag will be successful. If we think that
11406 it will, but it isn't, we have to simulate the store-flag with a
11407 set/jump/set sequence. */
11409 static rtx
11410 do_store_flag (sepops ops, rtx target, machine_mode mode)
11412 enum rtx_code code;
11413 tree arg0, arg1, type;
11414 machine_mode operand_mode;
11415 int unsignedp;
11416 rtx op0, op1;
11417 rtx subtarget = target;
11418 location_t loc = ops->location;
11420 arg0 = ops->op0;
11421 arg1 = ops->op1;
11423 /* Don't crash if the comparison was erroneous. */
11424 if (arg0 == error_mark_node || arg1 == error_mark_node)
11425 return const0_rtx;
11427 type = TREE_TYPE (arg0);
11428 operand_mode = TYPE_MODE (type);
11429 unsignedp = TYPE_UNSIGNED (type);
11431 /* We won't bother with BLKmode store-flag operations because it would mean
11432 passing a lot of information to emit_store_flag. */
11433 if (operand_mode == BLKmode)
11434 return 0;
11436 /* We won't bother with store-flag operations involving function pointers
11437 when function pointers must be canonicalized before comparisons. */
11438 if (targetm.have_canonicalize_funcptr_for_compare ()
11439 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
11440 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
11441 == FUNCTION_TYPE))
11442 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
11443 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
11444 == FUNCTION_TYPE))))
11445 return 0;
11447 STRIP_NOPS (arg0);
11448 STRIP_NOPS (arg1);
11450 /* For vector typed comparisons emit code to generate the desired
11451 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11452 expander for this. */
11453 if (TREE_CODE (ops->type) == VECTOR_TYPE)
11455 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
11456 if (VECTOR_BOOLEAN_TYPE_P (ops->type)
11457 && expand_vec_cmp_expr_p (TREE_TYPE (arg0), ops->type, ops->code))
11458 return expand_vec_cmp_expr (ops->type, ifexp, target);
11459 else
11461 tree if_true = constant_boolean_node (true, ops->type);
11462 tree if_false = constant_boolean_node (false, ops->type);
11463 return expand_vec_cond_expr (ops->type, ifexp, if_true,
11464 if_false, target);
11468 /* Get the rtx comparison code to use. We know that EXP is a comparison
11469 operation of some type. Some comparisons against 1 and -1 can be
11470 converted to comparisons with zero. Do so here so that the tests
11471 below will be aware that we have a comparison with zero. These
11472 tests will not catch constants in the first operand, but constants
11473 are rarely passed as the first operand. */
11475 switch (ops->code)
11477 case EQ_EXPR:
11478 code = EQ;
11479 break;
11480 case NE_EXPR:
11481 code = NE;
11482 break;
11483 case LT_EXPR:
11484 if (integer_onep (arg1))
11485 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
11486 else
11487 code = unsignedp ? LTU : LT;
11488 break;
11489 case LE_EXPR:
11490 if (! unsignedp && integer_all_onesp (arg1))
11491 arg1 = integer_zero_node, code = LT;
11492 else
11493 code = unsignedp ? LEU : LE;
11494 break;
11495 case GT_EXPR:
11496 if (! unsignedp && integer_all_onesp (arg1))
11497 arg1 = integer_zero_node, code = GE;
11498 else
11499 code = unsignedp ? GTU : GT;
11500 break;
11501 case GE_EXPR:
11502 if (integer_onep (arg1))
11503 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
11504 else
11505 code = unsignedp ? GEU : GE;
11506 break;
11508 case UNORDERED_EXPR:
11509 code = UNORDERED;
11510 break;
11511 case ORDERED_EXPR:
11512 code = ORDERED;
11513 break;
11514 case UNLT_EXPR:
11515 code = UNLT;
11516 break;
11517 case UNLE_EXPR:
11518 code = UNLE;
11519 break;
11520 case UNGT_EXPR:
11521 code = UNGT;
11522 break;
11523 case UNGE_EXPR:
11524 code = UNGE;
11525 break;
11526 case UNEQ_EXPR:
11527 code = UNEQ;
11528 break;
11529 case LTGT_EXPR:
11530 code = LTGT;
11531 break;
11533 default:
11534 gcc_unreachable ();
11537 /* Put a constant second. */
11538 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11539 || TREE_CODE (arg0) == FIXED_CST)
11541 std::swap (arg0, arg1);
11542 code = swap_condition (code);
11545 /* If this is an equality or inequality test of a single bit, we can
11546 do this by shifting the bit being tested to the low-order bit and
11547 masking the result with the constant 1. If the condition was EQ,
11548 we xor it with 1. This does not require an scc insn and is faster
11549 than an scc insn even if we have it.
11551 The code to make this transformation was moved into fold_single_bit_test,
11552 so we just call into the folder and expand its result. */
11554 if ((code == NE || code == EQ)
11555 && integer_zerop (arg1)
11556 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11558 gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11559 if (srcstmt
11560 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11562 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11563 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11564 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11565 gimple_assign_rhs1 (srcstmt),
11566 gimple_assign_rhs2 (srcstmt));
11567 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11568 if (temp)
11569 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11573 if (! get_subtarget (target)
11574 || GET_MODE (subtarget) != operand_mode)
11575 subtarget = 0;
11577 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11579 if (target == 0)
11580 target = gen_reg_rtx (mode);
11582 /* Try a cstore if possible. */
11583 return emit_store_flag_force (target, code, op0, op1,
11584 operand_mode, unsignedp,
11585 (TYPE_PRECISION (ops->type) == 1
11586 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11589 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11590 0 otherwise (i.e. if there is no casesi instruction).
11592 DEFAULT_PROBABILITY is the probability of jumping to the default
11593 label. */
11595 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11596 rtx table_label, rtx default_label, rtx fallback_label,
11597 profile_probability default_probability)
11599 struct expand_operand ops[5];
11600 scalar_int_mode index_mode = SImode;
11601 rtx op1, op2, index;
11603 if (! targetm.have_casesi ())
11604 return 0;
11606 /* The index must be some form of integer. Convert it to SImode. */
11607 scalar_int_mode omode = SCALAR_INT_TYPE_MODE (index_type);
11608 if (GET_MODE_BITSIZE (omode) > GET_MODE_BITSIZE (index_mode))
11610 rtx rangertx = expand_normal (range);
11612 /* We must handle the endpoints in the original mode. */
11613 index_expr = build2 (MINUS_EXPR, index_type,
11614 index_expr, minval);
11615 minval = integer_zero_node;
11616 index = expand_normal (index_expr);
11617 if (default_label)
11618 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11619 omode, 1, default_label,
11620 default_probability);
11621 /* Now we can safely truncate. */
11622 index = convert_to_mode (index_mode, index, 0);
11624 else
11626 if (omode != index_mode)
11628 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11629 index_expr = fold_convert (index_type, index_expr);
11632 index = expand_normal (index_expr);
11635 do_pending_stack_adjust ();
11637 op1 = expand_normal (minval);
11638 op2 = expand_normal (range);
11640 create_input_operand (&ops[0], index, index_mode);
11641 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11642 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11643 create_fixed_operand (&ops[3], table_label);
11644 create_fixed_operand (&ops[4], (default_label
11645 ? default_label
11646 : fallback_label));
11647 expand_jump_insn (targetm.code_for_casesi, 5, ops);
11648 return 1;
11651 /* Attempt to generate a tablejump instruction; same concept. */
11652 /* Subroutine of the next function.
11654 INDEX is the value being switched on, with the lowest value
11655 in the table already subtracted.
11656 MODE is its expected mode (needed if INDEX is constant).
11657 RANGE is the length of the jump table.
11658 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11660 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11661 index value is out of range.
11662 DEFAULT_PROBABILITY is the probability of jumping to
11663 the default label. */
11665 static void
11666 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
11667 rtx default_label, profile_probability default_probability)
11669 rtx temp, vector;
11671 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11672 cfun->cfg->max_jumptable_ents = INTVAL (range);
11674 /* Do an unsigned comparison (in the proper mode) between the index
11675 expression and the value which represents the length of the range.
11676 Since we just finished subtracting the lower bound of the range
11677 from the index expression, this comparison allows us to simultaneously
11678 check that the original index expression value is both greater than
11679 or equal to the minimum value of the range and less than or equal to
11680 the maximum value of the range. */
11682 if (default_label)
11683 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11684 default_label, default_probability);
11686 /* If index is in range, it must fit in Pmode.
11687 Convert to Pmode so we can index with it. */
11688 if (mode != Pmode)
11690 unsigned int width;
11692 /* We know the value of INDEX is between 0 and RANGE. If we have a
11693 sign-extended subreg, and RANGE does not have the sign bit set, then
11694 we have a value that is valid for both sign and zero extension. In
11695 this case, we get better code if we sign extend. */
11696 if (GET_CODE (index) == SUBREG
11697 && SUBREG_PROMOTED_VAR_P (index)
11698 && SUBREG_PROMOTED_SIGNED_P (index)
11699 && ((width = GET_MODE_PRECISION (as_a <scalar_int_mode> (mode)))
11700 <= HOST_BITS_PER_WIDE_INT)
11701 && ! (UINTVAL (range) & (HOST_WIDE_INT_1U << (width - 1))))
11702 index = convert_to_mode (Pmode, index, 0);
11703 else
11704 index = convert_to_mode (Pmode, index, 1);
11707 /* Don't let a MEM slip through, because then INDEX that comes
11708 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11709 and break_out_memory_refs will go to work on it and mess it up. */
11710 #ifdef PIC_CASE_VECTOR_ADDRESS
11711 if (flag_pic && !REG_P (index))
11712 index = copy_to_mode_reg (Pmode, index);
11713 #endif
11715 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11716 GET_MODE_SIZE, because this indicates how large insns are. The other
11717 uses should all be Pmode, because they are addresses. This code
11718 could fail if addresses and insns are not the same size. */
11719 index = simplify_gen_binary (MULT, Pmode, index,
11720 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11721 Pmode));
11722 index = simplify_gen_binary (PLUS, Pmode, index,
11723 gen_rtx_LABEL_REF (Pmode, table_label));
11725 #ifdef PIC_CASE_VECTOR_ADDRESS
11726 if (flag_pic)
11727 index = PIC_CASE_VECTOR_ADDRESS (index);
11728 else
11729 #endif
11730 index = memory_address (CASE_VECTOR_MODE, index);
11731 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11732 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11733 convert_move (temp, vector, 0);
11735 emit_jump_insn (targetm.gen_tablejump (temp, table_label));
11737 /* If we are generating PIC code or if the table is PC-relative, the
11738 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11739 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11740 emit_barrier ();
11744 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11745 rtx table_label, rtx default_label,
11746 profile_probability default_probability)
11748 rtx index;
11750 if (! targetm.have_tablejump ())
11751 return 0;
11753 index_expr = fold_build2 (MINUS_EXPR, index_type,
11754 fold_convert (index_type, index_expr),
11755 fold_convert (index_type, minval));
11756 index = expand_normal (index_expr);
11757 do_pending_stack_adjust ();
11759 do_tablejump (index, TYPE_MODE (index_type),
11760 convert_modes (TYPE_MODE (index_type),
11761 TYPE_MODE (TREE_TYPE (range)),
11762 expand_normal (range),
11763 TYPE_UNSIGNED (TREE_TYPE (range))),
11764 table_label, default_label, default_probability);
11765 return 1;
11768 /* Return a CONST_VECTOR rtx representing vector mask for
11769 a VECTOR_CST of booleans. */
11770 static rtx
11771 const_vector_mask_from_tree (tree exp)
11773 machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
11774 machine_mode inner = GET_MODE_INNER (mode);
11776 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp),
11777 VECTOR_CST_NELTS_PER_PATTERN (exp));
11778 unsigned int count = builder.encoded_nelts ();
11779 for (unsigned int i = 0; i < count; ++i)
11781 tree elt = VECTOR_CST_ELT (exp, i);
11782 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
11783 if (integer_zerop (elt))
11784 builder.quick_push (CONST0_RTX (inner));
11785 else if (integer_onep (elt)
11786 || integer_minus_onep (elt))
11787 builder.quick_push (CONSTM1_RTX (inner));
11788 else
11789 gcc_unreachable ();
11791 return builder.build ();
11794 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11795 Return a constant scalar rtx of mode MODE in which bit X is set if element
11796 X of EXP is nonzero. */
11797 static rtx
11798 const_scalar_mask_from_tree (scalar_int_mode mode, tree exp)
11800 wide_int res = wi::zero (GET_MODE_PRECISION (mode));
11801 tree elt;
11803 /* The result has a fixed number of bits so the input must too. */
11804 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant ();
11805 for (unsigned int i = 0; i < nunits; ++i)
11807 elt = VECTOR_CST_ELT (exp, i);
11808 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
11809 if (integer_all_onesp (elt))
11810 res = wi::set_bit (res, i);
11811 else
11812 gcc_assert (integer_zerop (elt));
11815 return immed_wide_int_const (res, mode);
11818 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11819 static rtx
11820 const_vector_from_tree (tree exp)
11822 machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
11824 if (initializer_zerop (exp))
11825 return CONST0_RTX (mode);
11827 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
11828 return const_vector_mask_from_tree (exp);
11830 machine_mode inner = GET_MODE_INNER (mode);
11832 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp),
11833 VECTOR_CST_NELTS_PER_PATTERN (exp));
11834 unsigned int count = builder.encoded_nelts ();
11835 for (unsigned int i = 0; i < count; ++i)
11837 tree elt = VECTOR_CST_ELT (exp, i);
11838 if (TREE_CODE (elt) == REAL_CST)
11839 builder.quick_push (const_double_from_real_value (TREE_REAL_CST (elt),
11840 inner));
11841 else if (TREE_CODE (elt) == FIXED_CST)
11842 builder.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11843 inner));
11844 else
11845 builder.quick_push (immed_wide_int_const (wi::to_poly_wide (elt),
11846 inner));
11848 return builder.build ();
11851 /* Build a decl for a personality function given a language prefix. */
11853 tree
11854 build_personality_function (const char *lang)
11856 const char *unwind_and_version;
11857 tree decl, type;
11858 char *name;
11860 switch (targetm_common.except_unwind_info (&global_options))
11862 case UI_NONE:
11863 return NULL;
11864 case UI_SJLJ:
11865 unwind_and_version = "_sj0";
11866 break;
11867 case UI_DWARF2:
11868 case UI_TARGET:
11869 unwind_and_version = "_v0";
11870 break;
11871 case UI_SEH:
11872 unwind_and_version = "_seh0";
11873 break;
11874 default:
11875 gcc_unreachable ();
11878 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11880 type = build_function_type_list (integer_type_node, integer_type_node,
11881 long_long_unsigned_type_node,
11882 ptr_type_node, ptr_type_node, NULL_TREE);
11883 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11884 get_identifier (name), type);
11885 DECL_ARTIFICIAL (decl) = 1;
11886 DECL_EXTERNAL (decl) = 1;
11887 TREE_PUBLIC (decl) = 1;
11889 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11890 are the flags assigned by targetm.encode_section_info. */
11891 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11893 return decl;
11896 /* Extracts the personality function of DECL and returns the corresponding
11897 libfunc. */
11900 get_personality_function (tree decl)
11902 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11903 enum eh_personality_kind pk;
11905 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11906 if (pk == eh_personality_none)
11907 return NULL;
11909 if (!personality
11910 && pk == eh_personality_any)
11911 personality = lang_hooks.eh_personality ();
11913 if (pk == eh_personality_lang)
11914 gcc_assert (personality != NULL_TREE);
11916 return XEXP (DECL_RTL (personality), 0);
11919 /* Returns a tree for the size of EXP in bytes. */
11921 static tree
11922 tree_expr_size (const_tree exp)
11924 if (DECL_P (exp)
11925 && DECL_SIZE_UNIT (exp) != 0)
11926 return DECL_SIZE_UNIT (exp);
11927 else
11928 return size_in_bytes (TREE_TYPE (exp));
11931 /* Return an rtx for the size in bytes of the value of EXP. */
11934 expr_size (tree exp)
11936 tree size;
11938 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11939 size = TREE_OPERAND (exp, 1);
11940 else
11942 size = tree_expr_size (exp);
11943 gcc_assert (size);
11944 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
11947 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
11950 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11951 if the size can vary or is larger than an integer. */
11953 static HOST_WIDE_INT
11954 int_expr_size (tree exp)
11956 tree size;
11958 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11959 size = TREE_OPERAND (exp, 1);
11960 else
11962 size = tree_expr_size (exp);
11963 gcc_assert (size);
11966 if (size == 0 || !tree_fits_shwi_p (size))
11967 return -1;
11969 return tree_to_shwi (size);