1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
61 #include "tree-chkp.h"
66 /* If this is nonzero, we do not bother generating VOLATILE
67 around volatile memory references, and we are willing to
68 output indirect addresses. If cse is to follow, we reject
69 indirect addresses so a useful potential cse is generated;
70 if it is used only once, instruction combination will produce
71 the same indirect address eventually. */
74 static bool block_move_libcall_safe_for_call_parm (void);
75 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
76 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
);
78 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
79 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
80 static rtx_insn
*compress_float_constant (rtx
, rtx
);
81 static rtx
get_subtarget (rtx
);
82 static void store_constructor_field (rtx
, unsigned HOST_WIDE_INT
,
83 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
84 unsigned HOST_WIDE_INT
, machine_mode
,
85 tree
, int, alias_set_type
, bool);
86 static void store_constructor (tree
, rtx
, int, HOST_WIDE_INT
, bool);
87 static rtx
store_field (rtx
, HOST_WIDE_INT
, HOST_WIDE_INT
,
88 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
89 machine_mode
, tree
, alias_set_type
, bool, bool);
91 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
93 static int is_aligning_offset (const_tree
, const_tree
);
94 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
95 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
97 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
99 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
100 profile_probability
);
101 static rtx
const_vector_from_tree (tree
);
102 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
103 static tree
tree_expr_size (const_tree
);
104 static HOST_WIDE_INT
int_expr_size (tree
);
105 static void convert_mode_scalar (rtx
, rtx
, int);
108 /* This is run to set up which modes can be used
109 directly in memory and to initialize the block move optab. It is run
110 at the beginning of compilation and when the target is reinitialized. */
113 init_expr_target (void)
120 /* Try indexing by frame ptr and try by stack ptr.
121 It is known that on the Convex the stack ptr isn't a valid index.
122 With luck, one or the other is valid on any machine. */
123 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
124 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
126 /* A scratch register we can modify in-place below to avoid
127 useless RTL allocations. */
128 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
130 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
131 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
132 PATTERN (insn
) = pat
;
134 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
135 mode
= (machine_mode
) ((int) mode
+ 1))
139 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
140 PUT_MODE (mem
, mode
);
141 PUT_MODE (mem1
, mode
);
143 /* See if there is some register that can be used in this mode and
144 directly loaded or stored from memory. */
146 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
147 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
148 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
151 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
154 set_mode_and_regno (reg
, mode
, regno
);
157 SET_DEST (pat
) = reg
;
158 if (recog (pat
, insn
, &num_clobbers
) >= 0)
159 direct_load
[(int) mode
] = 1;
161 SET_SRC (pat
) = mem1
;
162 SET_DEST (pat
) = reg
;
163 if (recog (pat
, insn
, &num_clobbers
) >= 0)
164 direct_load
[(int) mode
] = 1;
167 SET_DEST (pat
) = mem
;
168 if (recog (pat
, insn
, &num_clobbers
) >= 0)
169 direct_store
[(int) mode
] = 1;
172 SET_DEST (pat
) = mem1
;
173 if (recog (pat
, insn
, &num_clobbers
) >= 0)
174 direct_store
[(int) mode
] = 1;
178 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
180 opt_scalar_float_mode mode_iter
;
181 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
183 scalar_float_mode mode
= mode_iter
.require ();
184 scalar_float_mode srcmode
;
185 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
189 ic
= can_extend_p (mode
, srcmode
, 0);
190 if (ic
== CODE_FOR_nothing
)
193 PUT_MODE (mem
, srcmode
);
195 if (insn_operand_matches (ic
, 1, mem
))
196 float_extend_from_mem
[mode
][srcmode
] = true;
201 /* This is run at the start of compiling a function. */
206 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
209 /* Copy data from FROM to TO, where the machine modes are not the same.
210 Both modes may be integer, or both may be floating, or both may be
212 UNSIGNEDP should be nonzero if FROM is an unsigned type.
213 This causes zero-extension instead of sign-extension. */
216 convert_move (rtx to
, rtx from
, int unsignedp
)
218 machine_mode to_mode
= GET_MODE (to
);
219 machine_mode from_mode
= GET_MODE (from
);
221 gcc_assert (to_mode
!= BLKmode
);
222 gcc_assert (from_mode
!= BLKmode
);
224 /* If the source and destination are already the same, then there's
229 /* If FROM is a SUBREG that indicates that we have already done at least
230 the required extension, strip it. We don't handle such SUBREGs as
233 scalar_int_mode to_int_mode
;
234 if (GET_CODE (from
) == SUBREG
235 && SUBREG_PROMOTED_VAR_P (from
)
236 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
237 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
238 >= GET_MODE_PRECISION (to_int_mode
))
239 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
240 from
= gen_lowpart (to_int_mode
, from
), from_mode
= to_int_mode
;
242 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
244 if (to_mode
== from_mode
245 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
247 emit_move_insn (to
, from
);
251 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
253 gcc_assert (GET_MODE_BITSIZE (from_mode
) == GET_MODE_BITSIZE (to_mode
));
255 if (VECTOR_MODE_P (to_mode
))
256 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
258 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
260 emit_move_insn (to
, from
);
264 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
266 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
267 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
271 convert_mode_scalar (to
, from
, unsignedp
);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
281 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
282 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
283 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
287 gcc_assert (to_real
== from_real
);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
291 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
299 gcc_assert ((GET_MODE_PRECISION (from_mode
)
300 != GET_MODE_PRECISION (to_mode
))
301 || (DECIMAL_FLOAT_MODE_P (from_mode
)
302 != DECIMAL_FLOAT_MODE_P (to_mode
)));
304 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
305 /* Conversion between decimal float and binary float, same size. */
306 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
307 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
312 /* Try converting directly if the insn is supported. */
314 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
315 if (code
!= CODE_FOR_nothing
)
317 emit_unop_insn (code
, to
, from
,
318 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
322 /* Otherwise use a libcall. */
323 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall
);
329 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
331 insns
= get_insns ();
333 emit_libcall_block (insns
, to
, value
,
334 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
336 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
352 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
355 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
368 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
369 != CODE_FOR_nothing
);
371 if (full_mode
!= from_mode
)
372 from
= convert_to_mode (full_mode
, from
, unsignedp
);
373 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
377 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
382 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
383 enum insn_code icode
;
385 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
386 gcc_assert (icode
!= CODE_FOR_nothing
);
388 if (to_mode
== full_mode
)
390 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
394 new_from
= gen_reg_rtx (full_mode
);
395 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
397 /* else proceed to integer conversions below. */
398 from_mode
= full_mode
;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
411 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
412 expand_fixed_convert (to
, from
, 0, 0);
414 expand_fixed_convert (to
, from
, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
422 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
429 scalar_mode lowpart_mode
;
430 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
432 /* Try converting directly if the insn is supported. */
433 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
441 from
= force_reg (from_mode
, from
);
442 emit_unop_insn (code
, to
, from
, equiv_code
);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
447 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
448 != CODE_FOR_nothing
))
450 rtx word_to
= gen_reg_rtx (word_mode
);
453 if (reg_overlap_mentioned_p (to
, from
))
454 from
= force_reg (from_mode
, from
);
457 convert_move (word_to
, from
, unsignedp
);
458 emit_unop_insn (code
, to
, word_to
, equiv_code
);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
472 from
= force_reg (from_mode
, from
);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
476 lowpart_mode
= word_mode
;
478 lowpart_mode
= from_mode
;
480 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
482 lowpart
= gen_lowpart (lowpart_mode
, to
);
483 emit_move_insn (lowpart
, lowfrom
);
485 /* Compute the value to put in each remaining word. */
487 fill_value
= const0_rtx
;
489 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
490 LT
, lowfrom
, const0_rtx
,
491 lowpart_mode
, 0, -1);
493 /* Fill the remaining words. */
494 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
496 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
497 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
499 gcc_assert (subword
);
501 if (fill_value
!= subword
)
502 emit_move_insn (subword
, fill_value
);
505 insns
= get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
517 && ! MEM_VOLATILE_P (from
)
518 && direct_load
[(int) to_mode
]
519 && ! mode_dependent_address_p (XEXP (from
, 0),
520 MEM_ADDR_SPACE (from
)))
522 || GET_CODE (from
) == SUBREG
))
523 from
= force_reg (from_mode
, from
);
524 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
536 && ! MEM_VOLATILE_P (from
)
537 && direct_load
[(int) to_mode
]
538 && ! mode_dependent_address_p (XEXP (from
, 0),
539 MEM_ADDR_SPACE (from
)))
541 || GET_CODE (from
) == SUBREG
))
542 from
= force_reg (from_mode
, from
);
543 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
544 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
545 from
= copy_to_reg (from
);
546 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
553 /* Convert directly if that works. */
554 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
557 emit_unop_insn (code
, to
, from
, equiv_code
);
562 scalar_mode intermediate
;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
696 && (!HARD_REGISTER_P (x
)
697 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
698 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
699 return gen_lowpart (int_mode
, x
);
701 /* Converting from integer constant into mode is always equivalent to an
703 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
705 gcc_assert (GET_MODE_BITSIZE (mode
) == GET_MODE_BITSIZE (oldmode
));
706 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
709 temp
= gen_reg_rtx (mode
);
710 convert_move (temp
, x
, unsignedp
);
714 /* Return the largest alignment we can use for doing a move (or store)
715 of MAX_PIECES. ALIGN is the largest alignment we could use. */
718 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
720 scalar_int_mode tmode
721 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
723 if (align
>= GET_MODE_ALIGNMENT (tmode
))
724 align
= GET_MODE_ALIGNMENT (tmode
);
727 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
728 opt_scalar_int_mode mode_iter
;
729 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
731 tmode
= mode_iter
.require ();
732 if (GET_MODE_SIZE (tmode
) > max_pieces
733 || targetm
.slow_unaligned_access (tmode
, align
))
738 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
744 /* Return the widest integer mode that is narrower than SIZE bytes. */
746 static scalar_int_mode
747 widest_int_mode_for_size (unsigned int size
)
749 scalar_int_mode result
= NARROWEST_INT_MODE
;
751 gcc_checking_assert (size
> 1);
753 opt_scalar_int_mode tmode
;
754 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
755 if (GET_MODE_SIZE (tmode
.require ()) < size
)
756 result
= tmode
.require ();
761 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
762 and should be performed piecewise. */
765 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
766 enum by_pieces_operation op
)
768 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
769 optimize_insn_for_speed_p ());
772 /* Determine whether the LEN bytes can be moved by using several move
773 instructions. Return nonzero if a call to move_by_pieces should
777 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
779 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
782 /* Return number of insns required to perform operation OP by pieces
783 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
785 unsigned HOST_WIDE_INT
786 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
787 unsigned int max_size
, by_pieces_operation op
)
789 unsigned HOST_WIDE_INT n_insns
= 0;
791 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
793 while (max_size
> 1 && l
> 0)
795 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
796 enum insn_code icode
;
798 unsigned int modesize
= GET_MODE_SIZE (mode
);
800 icode
= optab_handler (mov_optab
, mode
);
801 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
803 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
811 case COMPARE_BY_PIECES
:
812 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
813 int batch_ops
= 4 * batch
- 1;
814 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
815 n_insns
+= full
* batch_ops
;
816 if (n_pieces
% batch
!= 0)
829 /* Used when performing piecewise block operations, holds information
830 about one of the memory objects involved. The member functions
831 can be used to generate code for loading from the object and
832 updating the address when iterating. */
836 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
839 /* The address of the object. Can differ from that seen in the
840 MEM rtx if we copied the address to a register. */
842 /* Nonzero if the address on the object has an autoincrement already,
843 signifies whether that was an increment or decrement. */
844 signed char m_addr_inc
;
845 /* Nonzero if we intend to use autoinc without the address already
846 having autoinc form. We will insert add insns around each memory
847 reference, expecting later passes to form autoinc addressing modes.
848 The only supported options are predecrement and postincrement. */
849 signed char m_explicit_inc
;
850 /* True if we have either of the two possible cases of using
853 /* True if this is an address to be used for load operations rather
857 /* Optionally, a function to obtain constants for any given offset into
858 the objects, and data associated with it. */
859 by_pieces_constfn m_constfn
;
862 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
863 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
864 void increment_address (HOST_WIDE_INT
);
865 void maybe_predec (HOST_WIDE_INT
);
866 void maybe_postinc (HOST_WIDE_INT
);
867 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
874 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
875 true if the operation to be performed on this object is a load
876 rather than a store. For stores, OBJ can be NULL, in which case we
877 assume the operation is a stack push. For loads, the optional
878 CONSTFN and its associated CFNDATA can be used in place of the
881 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
883 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
889 rtx addr
= XEXP (obj
, 0);
890 rtx_code code
= GET_CODE (addr
);
892 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
893 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
896 m_addr_inc
= dec
? -1 : 1;
898 /* While we have always looked for these codes here, the code
899 implementing the memory operation has never handled them.
900 Support could be added later if necessary or beneficial. */
901 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
909 if (STACK_GROWS_DOWNWARD
)
915 gcc_assert (constfn
!= NULL
);
919 gcc_assert (is_load
);
922 /* Decide whether to use autoinc for an address involved in a memory op.
923 MODE is the mode of the accesses, REVERSE is true if we've decided to
924 perform the operation starting from the end, and LEN is the length of
925 the operation. Don't override an earlier decision to set m_auto. */
928 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
931 if (m_auto
|| m_obj
== NULL_RTX
)
934 bool use_predec
= (m_is_load
935 ? USE_LOAD_PRE_DECREMENT (mode
)
936 : USE_STORE_PRE_DECREMENT (mode
));
937 bool use_postinc
= (m_is_load
938 ? USE_LOAD_POST_INCREMENT (mode
)
939 : USE_STORE_POST_INCREMENT (mode
));
940 machine_mode addr_mode
= get_address_mode (m_obj
);
942 if (use_predec
&& reverse
)
944 m_addr
= copy_to_mode_reg (addr_mode
,
945 plus_constant (addr_mode
,
950 else if (use_postinc
&& !reverse
)
952 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
956 else if (CONSTANT_P (m_addr
))
957 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
960 /* Adjust the address to refer to the data at OFFSET in MODE. If we
961 are using autoincrement for this address, we don't add the offset,
962 but we still modify the MEM's properties. */
965 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
968 return m_constfn (m_cfndata
, offset
, mode
);
969 if (m_obj
== NULL_RTX
)
972 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
974 return adjust_address (m_obj
, mode
, offset
);
977 /* Emit an add instruction to increment the address by SIZE. */
980 pieces_addr::increment_address (HOST_WIDE_INT size
)
982 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
983 emit_insn (gen_add2_insn (m_addr
, amount
));
986 /* If we are supposed to decrement the address after each access, emit code
987 to do so now. Increment by SIZE (which has should have the correct sign
991 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
993 if (m_explicit_inc
>= 0)
995 gcc_assert (HAVE_PRE_DECREMENT
);
996 increment_address (size
);
999 /* If we are supposed to decrement the address after each access, emit code
1000 to do so now. Increment by SIZE. */
1003 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1005 if (m_explicit_inc
<= 0)
1007 gcc_assert (HAVE_POST_INCREMENT
);
1008 increment_address (size
);
1011 /* This structure is used by do_op_by_pieces to describe the operation
1014 class op_by_pieces_d
1017 pieces_addr m_to
, m_from
;
1018 unsigned HOST_WIDE_INT m_len
;
1019 HOST_WIDE_INT m_offset
;
1020 unsigned int m_align
;
1021 unsigned int m_max_size
;
1024 /* Virtual functions, overriden by derived classes for the specific
1026 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1027 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1028 virtual void finish_mode (machine_mode
)
1033 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1034 unsigned HOST_WIDE_INT
, unsigned int);
1038 /* The constructor for an op_by_pieces_d structure. We require two
1039 objects named TO and FROM, which are identified as loads or stores
1040 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1041 and its associated FROM_CFN_DATA can be used to replace loads with
1042 constant values. LEN describes the length of the operation. */
1044 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1045 rtx from
, bool from_load
,
1046 by_pieces_constfn from_cfn
,
1047 void *from_cfn_data
,
1048 unsigned HOST_WIDE_INT len
,
1050 : m_to (to
, to_load
, NULL
, NULL
),
1051 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1052 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1054 int toi
= m_to
.get_addr_inc ();
1055 int fromi
= m_from
.get_addr_inc ();
1056 if (toi
>= 0 && fromi
>= 0)
1058 else if (toi
<= 0 && fromi
<= 0)
1063 m_offset
= m_reverse
? len
: 0;
1064 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1065 from
? MEM_ALIGN (from
) : align
);
1067 /* If copying requires more than two move insns,
1068 copy addresses to registers (to make displacements shorter)
1069 and use post-increment if available. */
1070 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1072 /* Find the mode of the largest comparison. */
1073 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1075 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1076 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1079 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1083 /* This function contains the main loop used for expanding a block
1084 operation. First move what we can in the largest integer mode,
1085 then go to successively smaller modes. For every access, call
1086 GENFUN with the two operands and the EXTRA_DATA. */
1089 op_by_pieces_d::run ()
1091 while (m_max_size
> 1 && m_len
> 0)
1093 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1095 if (prepare_mode (mode
, m_align
))
1097 unsigned int size
= GET_MODE_SIZE (mode
);
1098 rtx to1
= NULL_RTX
, from1
;
1100 while (m_len
>= size
)
1105 to1
= m_to
.adjust (mode
, m_offset
);
1106 from1
= m_from
.adjust (mode
, m_offset
);
1108 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1109 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 generate (to1
, from1
, mode
);
1113 m_to
.maybe_postinc (size
);
1114 m_from
.maybe_postinc (size
);
1125 m_max_size
= GET_MODE_SIZE (mode
);
1128 /* The code above should have handled everything. */
1129 gcc_assert (!m_len
);
1132 /* Derived class from op_by_pieces_d, providing support for block move
1135 class move_by_pieces_d
: public op_by_pieces_d
1137 insn_gen_fn m_gen_fun
;
1138 void generate (rtx
, rtx
, machine_mode
);
1139 bool prepare_mode (machine_mode
, unsigned int);
1142 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1144 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1147 rtx
finish_endp (int);
1150 /* Return true if MODE can be used for a set of copies, given an
1151 alignment ALIGN. Prepare whatever data is necessary for later
1152 calls to generate. */
1155 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1157 insn_code icode
= optab_handler (mov_optab
, mode
);
1158 m_gen_fun
= GEN_FCN (icode
);
1159 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1162 /* A callback used when iterating for a compare_by_pieces_operation.
1163 OP0 and OP1 are the values that have been loaded and should be
1164 compared in MODE. If OP0 is NULL, this means we should generate a
1165 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1166 gen function that should be used to generate the mode. */
1169 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1170 machine_mode mode ATTRIBUTE_UNUSED
)
1172 #ifdef PUSH_ROUNDING
1173 if (op0
== NULL_RTX
)
1175 emit_single_push_insn (mode
, op1
, NULL
);
1179 emit_insn (m_gen_fun (op0
, op1
));
1182 /* Perform the final adjustment at the end of a string to obtain the
1183 correct return value for the block operation. If ENDP is 1 return
1184 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1185 end minus one byte ala stpcpy. */
1188 move_by_pieces_d::finish_endp (int endp
)
1190 gcc_assert (!m_reverse
);
1193 m_to
.maybe_postinc (-1);
1196 return m_to
.adjust (QImode
, m_offset
);
1199 /* Generate several move instructions to copy LEN bytes from block FROM to
1200 block TO. (These are MEM rtx's with BLKmode).
1202 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1203 used to push FROM to the stack.
1205 ALIGN is maximum stack alignment we can assume.
1207 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1208 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1212 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1213 unsigned int align
, int endp
)
1215 #ifndef PUSH_ROUNDING
1220 move_by_pieces_d
data (to
, from
, len
, align
);
1225 return data
.finish_endp (endp
);
1230 /* Derived class from op_by_pieces_d, providing support for block move
1233 class store_by_pieces_d
: public op_by_pieces_d
1235 insn_gen_fn m_gen_fun
;
1236 void generate (rtx
, rtx
, machine_mode
);
1237 bool prepare_mode (machine_mode
, unsigned int);
1240 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1241 unsigned HOST_WIDE_INT len
, unsigned int align
)
1242 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1245 rtx
finish_endp (int);
1248 /* Return true if MODE can be used for a set of stores, given an
1249 alignment ALIGN. Prepare whatever data is necessary for later
1250 calls to generate. */
1253 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1255 insn_code icode
= optab_handler (mov_optab
, mode
);
1256 m_gen_fun
= GEN_FCN (icode
);
1257 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1260 /* A callback used when iterating for a store_by_pieces_operation.
1261 OP0 and OP1 are the values that have been loaded and should be
1262 compared in MODE. If OP0 is NULL, this means we should generate a
1263 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1264 gen function that should be used to generate the mode. */
1267 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1269 emit_insn (m_gen_fun (op0
, op1
));
1272 /* Perform the final adjustment at the end of a string to obtain the
1273 correct return value for the block operation. If ENDP is 1 return
1274 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1275 end minus one byte ala stpcpy. */
1278 store_by_pieces_d::finish_endp (int endp
)
1280 gcc_assert (!m_reverse
);
1283 m_to
.maybe_postinc (-1);
1286 return m_to
.adjust (QImode
, m_offset
);
1289 /* Determine whether the LEN bytes generated by CONSTFUN can be
1290 stored to memory using several move instructions. CONSTFUNDATA is
1291 a pointer which will be passed as argument in every CONSTFUN call.
1292 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1293 a memset operation and false if it's a copy of a constant string.
1294 Return nonzero if a call to store_by_pieces should succeed. */
1297 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1298 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1299 void *constfundata
, unsigned int align
, bool memsetp
)
1301 unsigned HOST_WIDE_INT l
;
1302 unsigned int max_size
;
1303 HOST_WIDE_INT offset
= 0;
1304 enum insn_code icode
;
1306 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1307 rtx cst ATTRIBUTE_UNUSED
;
1312 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1316 optimize_insn_for_speed_p ()))
1319 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1321 /* We would first store what we can in the largest integer mode, then go to
1322 successively smaller modes. */
1325 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1329 max_size
= STORE_MAX_PIECES
+ 1;
1330 while (max_size
> 1 && l
> 0)
1332 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1334 icode
= optab_handler (mov_optab
, mode
);
1335 if (icode
!= CODE_FOR_nothing
1336 && align
>= GET_MODE_ALIGNMENT (mode
))
1338 unsigned int size
= GET_MODE_SIZE (mode
);
1345 cst
= (*constfun
) (constfundata
, offset
, mode
);
1346 if (!targetm
.legitimate_constant_p (mode
, cst
))
1356 max_size
= GET_MODE_SIZE (mode
);
1359 /* The code above should have handled everything. */
1366 /* Generate several move instructions to store LEN bytes generated by
1367 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1368 pointer which will be passed as argument in every CONSTFUN call.
1369 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1370 a memset operation and false if it's a copy of a constant string.
1371 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1372 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1376 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1377 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1378 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1382 gcc_assert (endp
!= 2);
1386 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1388 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1389 optimize_insn_for_speed_p ()));
1391 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1395 return data
.finish_endp (endp
);
1400 /* Callback routine for clear_by_pieces.
1401 Return const0_rtx unconditionally. */
1404 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1409 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1410 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1413 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1418 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1422 /* Context used by compare_by_pieces_genfn. It stores the fail label
1423 to jump to in case of miscomparison, and for branch ratios greater than 1,
1424 it stores an accumulator and the current and maximum counts before
1425 emitting another branch. */
1427 class compare_by_pieces_d
: public op_by_pieces_d
1429 rtx_code_label
*m_fail_label
;
1431 int m_count
, m_batch
;
1433 void generate (rtx
, rtx
, machine_mode
);
1434 bool prepare_mode (machine_mode
, unsigned int);
1435 void finish_mode (machine_mode
);
1437 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1438 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1439 rtx_code_label
*fail_label
)
1440 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1442 m_fail_label
= fail_label
;
1446 /* A callback used when iterating for a compare_by_pieces_operation.
1447 OP0 and OP1 are the values that have been loaded and should be
1448 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1449 context structure. */
1452 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1456 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1457 true, OPTAB_LIB_WIDEN
);
1459 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1460 true, OPTAB_LIB_WIDEN
);
1461 m_accumulator
= temp
;
1463 if (++m_count
< m_batch
)
1467 op0
= m_accumulator
;
1469 m_accumulator
= NULL_RTX
;
1471 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1472 m_fail_label
, profile_probability::uninitialized ());
1475 /* Return true if MODE can be used for a set of moves and comparisons,
1476 given an alignment ALIGN. Prepare whatever data is necessary for
1477 later calls to generate. */
1480 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1482 insn_code icode
= optab_handler (mov_optab
, mode
);
1483 if (icode
== CODE_FOR_nothing
1484 || align
< GET_MODE_ALIGNMENT (mode
)
1485 || !can_compare_p (EQ
, mode
, ccp_jump
))
1487 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1490 m_accumulator
= NULL_RTX
;
1495 /* Called after expanding a series of comparisons in MODE. If we have
1496 accumulated results for which we haven't emitted a branch yet, do
1500 compare_by_pieces_d::finish_mode (machine_mode mode
)
1502 if (m_accumulator
!= NULL_RTX
)
1503 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1504 NULL_RTX
, NULL
, m_fail_label
,
1505 profile_probability::uninitialized ());
1508 /* Generate several move instructions to compare LEN bytes from blocks
1509 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1511 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1512 used to push FROM to the stack.
1514 ALIGN is maximum stack alignment we can assume.
1516 Optionally, the caller can pass a constfn and associated data in A1_CFN
1517 and A1_CFN_DATA. describing that the second operand being compared is a
1518 known constant and how to obtain its data. */
1521 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1522 rtx target
, unsigned int align
,
1523 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1525 rtx_code_label
*fail_label
= gen_label_rtx ();
1526 rtx_code_label
*end_label
= gen_label_rtx ();
1528 if (target
== NULL_RTX
1529 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1530 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1532 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1537 emit_move_insn (target
, const0_rtx
);
1538 emit_jump (end_label
);
1540 emit_label (fail_label
);
1541 emit_move_insn (target
, const1_rtx
);
1542 emit_label (end_label
);
1547 /* Emit code to move a block Y to a block X. This may be done with
1548 string-move instructions, with multiple scalar move instructions,
1549 or with a library call.
1551 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1552 SIZE is an rtx that says how long they are.
1553 ALIGN is the maximum alignment we can assume they have.
1554 METHOD describes what kind of copy this is, and what mechanisms may be used.
1555 MIN_SIZE is the minimal size of block to move
1556 MAX_SIZE is the maximal size of block to move, if it can not be represented
1557 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1559 Return the address of the new block, if memcpy is called and returns it,
1563 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1564 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1565 unsigned HOST_WIDE_INT min_size
,
1566 unsigned HOST_WIDE_INT max_size
,
1567 unsigned HOST_WIDE_INT probable_max_size
)
1574 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1579 case BLOCK_OP_NORMAL
:
1580 case BLOCK_OP_TAILCALL
:
1581 may_use_call
= true;
1584 case BLOCK_OP_CALL_PARM
:
1585 may_use_call
= block_move_libcall_safe_for_call_parm ();
1587 /* Make inhibit_defer_pop nonzero around the library call
1588 to force it to pop the arguments right away. */
1592 case BLOCK_OP_NO_LIBCALL
:
1593 may_use_call
= false;
1600 gcc_assert (MEM_P (x
) && MEM_P (y
));
1601 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1602 gcc_assert (align
>= BITS_PER_UNIT
);
1604 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1605 block copy is more efficient for other large modes, e.g. DCmode. */
1606 x
= adjust_address (x
, BLKmode
, 0);
1607 y
= adjust_address (y
, BLKmode
, 0);
1609 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1610 can be incorrect is coming from __builtin_memcpy. */
1611 if (CONST_INT_P (size
))
1613 x
= shallow_copy_rtx (x
);
1614 y
= shallow_copy_rtx (y
);
1615 set_mem_size (x
, INTVAL (size
));
1616 set_mem_size (y
, INTVAL (size
));
1619 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1620 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1621 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1622 expected_align
, expected_size
,
1623 min_size
, max_size
, probable_max_size
))
1625 else if (may_use_call
1626 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1627 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1629 /* Since x and y are passed to a libcall, mark the corresponding
1630 tree EXPR as addressable. */
1631 tree y_expr
= MEM_EXPR (y
);
1632 tree x_expr
= MEM_EXPR (x
);
1634 mark_addressable (y_expr
);
1636 mark_addressable (x_expr
);
1637 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1638 method
== BLOCK_OP_TAILCALL
);
1642 emit_block_move_via_loop (x
, y
, size
, align
);
1644 if (method
== BLOCK_OP_CALL_PARM
)
1651 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1653 unsigned HOST_WIDE_INT max
, min
= 0;
1654 if (GET_CODE (size
) == CONST_INT
)
1655 min
= max
= UINTVAL (size
);
1657 max
= GET_MODE_MASK (GET_MODE (size
));
1658 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1662 /* A subroutine of emit_block_move. Returns true if calling the
1663 block move libcall will not clobber any parameters which may have
1664 already been placed on the stack. */
1667 block_move_libcall_safe_for_call_parm (void)
1669 #if defined (REG_PARM_STACK_SPACE)
1673 /* If arguments are pushed on the stack, then they're safe. */
1677 /* If registers go on the stack anyway, any argument is sure to clobber
1678 an outgoing argument. */
1679 #if defined (REG_PARM_STACK_SPACE)
1680 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1681 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1682 depend on its argument. */
1684 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1685 && REG_PARM_STACK_SPACE (fn
) != 0)
1689 /* If any argument goes in memory, then it might clobber an outgoing
1692 CUMULATIVE_ARGS args_so_far_v
;
1693 cumulative_args_t args_so_far
;
1696 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1697 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1698 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1700 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1701 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1703 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1704 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1706 if (!tmp
|| !REG_P (tmp
))
1708 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1710 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1717 /* A subroutine of emit_block_move. Expand a movmem pattern;
1718 return true if successful. */
1721 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1722 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1723 unsigned HOST_WIDE_INT min_size
,
1724 unsigned HOST_WIDE_INT max_size
,
1725 unsigned HOST_WIDE_INT probable_max_size
)
1727 int save_volatile_ok
= volatile_ok
;
1729 if (expected_align
< align
)
1730 expected_align
= align
;
1731 if (expected_size
!= -1)
1733 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1734 expected_size
= probable_max_size
;
1735 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1736 expected_size
= min_size
;
1739 /* Since this is a move insn, we don't care about volatility. */
1742 /* Try the most limited insn first, because there's no point
1743 including more than one in the machine description unless
1744 the more limited one has some advantage. */
1746 opt_scalar_int_mode mode_iter
;
1747 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1749 scalar_int_mode mode
= mode_iter
.require ();
1750 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1752 if (code
!= CODE_FOR_nothing
1753 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1754 here because if SIZE is less than the mode mask, as it is
1755 returned by the macro, it will definitely be less than the
1756 actual mode mask. Since SIZE is within the Pmode address
1757 space, we limit MODE to Pmode. */
1758 && ((CONST_INT_P (size
)
1759 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1760 <= (GET_MODE_MASK (mode
) >> 1)))
1761 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1762 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1764 struct expand_operand ops
[9];
1767 /* ??? When called via emit_block_move_for_call, it'd be
1768 nice if there were some way to inform the backend, so
1769 that it doesn't fail the expansion because it thinks
1770 emitting the libcall would be more efficient. */
1771 nops
= insn_data
[(int) code
].n_generator_args
;
1772 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1774 create_fixed_operand (&ops
[0], x
);
1775 create_fixed_operand (&ops
[1], y
);
1776 /* The check above guarantees that this size conversion is valid. */
1777 create_convert_operand_to (&ops
[2], size
, mode
, true);
1778 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1781 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1782 create_integer_operand (&ops
[5], expected_size
);
1786 create_integer_operand (&ops
[6], min_size
);
1787 /* If we can not represent the maximal size,
1788 make parameter NULL. */
1789 if ((HOST_WIDE_INT
) max_size
!= -1)
1790 create_integer_operand (&ops
[7], max_size
);
1792 create_fixed_operand (&ops
[7], NULL
);
1796 /* If we can not represent the maximal size,
1797 make parameter NULL. */
1798 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1799 create_integer_operand (&ops
[8], probable_max_size
);
1801 create_fixed_operand (&ops
[8], NULL
);
1803 if (maybe_expand_insn (code
, nops
, ops
))
1805 volatile_ok
= save_volatile_ok
;
1811 volatile_ok
= save_volatile_ok
;
1815 /* A subroutine of emit_block_move. Copy the data via an explicit
1816 loop. This is used only when libcalls are forbidden. */
1817 /* ??? It'd be nice to copy in hunks larger than QImode. */
1820 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1821 unsigned int align ATTRIBUTE_UNUSED
)
1823 rtx_code_label
*cmp_label
, *top_label
;
1824 rtx iter
, x_addr
, y_addr
, tmp
;
1825 machine_mode x_addr_mode
= get_address_mode (x
);
1826 machine_mode y_addr_mode
= get_address_mode (y
);
1827 machine_mode iter_mode
;
1829 iter_mode
= GET_MODE (size
);
1830 if (iter_mode
== VOIDmode
)
1831 iter_mode
= word_mode
;
1833 top_label
= gen_label_rtx ();
1834 cmp_label
= gen_label_rtx ();
1835 iter
= gen_reg_rtx (iter_mode
);
1837 emit_move_insn (iter
, const0_rtx
);
1839 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1840 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1841 do_pending_stack_adjust ();
1843 emit_jump (cmp_label
);
1844 emit_label (top_label
);
1846 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1847 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1849 if (x_addr_mode
!= y_addr_mode
)
1850 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1851 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1853 x
= change_address (x
, QImode
, x_addr
);
1854 y
= change_address (y
, QImode
, y_addr
);
1856 emit_move_insn (x
, y
);
1858 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1859 true, OPTAB_LIB_WIDEN
);
1861 emit_move_insn (iter
, tmp
);
1863 emit_label (cmp_label
);
1865 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1867 profile_probability::guessed_always ()
1868 .apply_scale (9, 10));
1871 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1872 TAILCALL is true if this is a tail call. */
1875 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1876 rtx size
, bool tailcall
)
1878 rtx dst_addr
, src_addr
;
1879 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1880 machine_mode size_mode
;
1882 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1883 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1884 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1886 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1887 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1888 src_tree
= make_tree (ptr_type_node
, src_addr
);
1890 size_mode
= TYPE_MODE (sizetype
);
1891 size
= convert_to_mode (size_mode
, size
, 1);
1892 size
= copy_to_mode_reg (size_mode
, size
);
1893 size_tree
= make_tree (sizetype
, size
);
1895 /* It is incorrect to use the libcall calling conventions for calls to
1896 memcpy/memmove/memcmp because they can be provided by the user. */
1897 tree fn
= builtin_decl_implicit (fncode
);
1898 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1899 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1901 return expand_call (call_expr
, NULL_RTX
, false);
1904 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1905 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1906 otherwise return null. */
1909 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1910 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1911 HOST_WIDE_INT align
)
1913 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1915 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1918 struct expand_operand ops
[5];
1919 create_output_operand (&ops
[0], target
, insn_mode
);
1920 create_fixed_operand (&ops
[1], arg1_rtx
);
1921 create_fixed_operand (&ops
[2], arg2_rtx
);
1922 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1923 TYPE_UNSIGNED (arg3_type
));
1924 create_integer_operand (&ops
[4], align
);
1925 if (maybe_expand_insn (icode
, 5, ops
))
1926 return ops
[0].value
;
1930 /* Expand a block compare between X and Y with length LEN using the
1931 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1932 of the expression that was used to calculate the length. ALIGN
1933 gives the known minimum common alignment. */
1936 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1939 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1940 implementing memcmp because it will stop if it encounters two
1942 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1944 if (icode
== CODE_FOR_nothing
)
1947 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1950 /* Emit code to compare a block Y to a block X. This may be done with
1951 string-compare instructions, with multiple scalar instructions,
1952 or with a library call.
1954 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1955 they are. LEN_TYPE is the type of the expression that was used to
1958 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1959 value of a normal memcmp call, instead we can just compare for equality.
1960 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1963 Optionally, the caller can pass a constfn and associated data in Y_CFN
1964 and Y_CFN_DATA. describing that the second operand being compared is a
1965 known constant and how to obtain its data.
1966 Return the result of the comparison, or NULL_RTX if we failed to
1967 perform the operation. */
1970 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1971 bool equality_only
, by_pieces_constfn y_cfn
,
1976 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1979 gcc_assert (MEM_P (x
) && MEM_P (y
));
1980 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1981 gcc_assert (align
>= BITS_PER_UNIT
);
1983 x
= adjust_address (x
, BLKmode
, 0);
1984 y
= adjust_address (y
, BLKmode
, 0);
1987 && CONST_INT_P (len
)
1988 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1989 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1992 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
1997 /* Copy all or part of a value X into registers starting at REGNO.
1998 The number of registers to be filled is NREGS. */
2001 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2006 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2007 x
= validize_mem (force_const_mem (mode
, x
));
2009 /* See if the machine can do this with a load multiple insn. */
2010 if (targetm
.have_load_multiple ())
2012 rtx_insn
*last
= get_last_insn ();
2013 rtx first
= gen_rtx_REG (word_mode
, regno
);
2014 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2021 delete_insns_since (last
);
2024 for (int i
= 0; i
< nregs
; i
++)
2025 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2026 operand_subword_force (x
, i
, mode
));
2029 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2030 The number of registers to be filled is NREGS. */
2033 move_block_from_reg (int regno
, rtx x
, int nregs
)
2038 /* See if the machine can do this with a store multiple insn. */
2039 if (targetm
.have_store_multiple ())
2041 rtx_insn
*last
= get_last_insn ();
2042 rtx first
= gen_rtx_REG (word_mode
, regno
);
2043 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2050 delete_insns_since (last
);
2053 for (int i
= 0; i
< nregs
; i
++)
2055 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2059 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2063 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2064 ORIG, where ORIG is a non-consecutive group of registers represented by
2065 a PARALLEL. The clone is identical to the original except in that the
2066 original set of registers is replaced by a new set of pseudo registers.
2067 The new set has the same modes as the original set. */
2070 gen_group_rtx (rtx orig
)
2075 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2077 length
= XVECLEN (orig
, 0);
2078 tmps
= XALLOCAVEC (rtx
, length
);
2080 /* Skip a NULL entry in first slot. */
2081 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2086 for (; i
< length
; i
++)
2088 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2089 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2091 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2094 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2097 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2098 except that values are placed in TMPS[i], and must later be moved
2099 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2102 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
, int ssize
)
2106 machine_mode m
= GET_MODE (orig_src
);
2108 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2111 && !SCALAR_INT_MODE_P (m
)
2112 && !MEM_P (orig_src
)
2113 && GET_CODE (orig_src
) != CONCAT
)
2115 scalar_int_mode imode
;
2116 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2118 src
= gen_reg_rtx (imode
);
2119 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2123 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2124 emit_move_insn (src
, orig_src
);
2126 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2130 /* Check for a NULL entry, used to indicate that the parameter goes
2131 both on the stack and in registers. */
2132 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2137 /* Process the pieces. */
2138 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2140 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2141 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
2142 unsigned int bytelen
= GET_MODE_SIZE (mode
);
2145 /* Handle trailing fragments that run over the size of the struct. */
2146 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2148 /* Arrange to shift the fragment to where it belongs.
2149 extract_bit_field loads to the lsb of the reg. */
2151 #ifdef BLOCK_REG_PADDING
2152 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2153 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2158 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2159 bytelen
= ssize
- bytepos
;
2160 gcc_assert (bytelen
> 0);
2163 /* If we won't be loading directly from memory, protect the real source
2164 from strange tricks we might play; but make sure that the source can
2165 be loaded directly into the destination. */
2167 if (!MEM_P (orig_src
)
2168 && (!CONSTANT_P (orig_src
)
2169 || (GET_MODE (orig_src
) != mode
2170 && GET_MODE (orig_src
) != VOIDmode
)))
2172 if (GET_MODE (orig_src
) == VOIDmode
)
2173 src
= gen_reg_rtx (mode
);
2175 src
= gen_reg_rtx (GET_MODE (orig_src
));
2177 emit_move_insn (src
, orig_src
);
2180 /* Optimize the access just a bit. */
2182 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2183 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2184 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
2185 && bytelen
== GET_MODE_SIZE (mode
))
2187 tmps
[i
] = gen_reg_rtx (mode
);
2188 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2190 else if (COMPLEX_MODE_P (mode
)
2191 && GET_MODE (src
) == mode
2192 && bytelen
== GET_MODE_SIZE (mode
))
2193 /* Let emit_move_complex do the bulk of the work. */
2195 else if (GET_CODE (src
) == CONCAT
)
2197 unsigned int slen
= GET_MODE_SIZE (GET_MODE (src
));
2198 unsigned int slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2199 unsigned int elt
= bytepos
/ slen0
;
2200 unsigned int subpos
= bytepos
% slen0
;
2202 if (subpos
+ bytelen
<= slen0
)
2204 /* The following assumes that the concatenated objects all
2205 have the same size. In this case, a simple calculation
2206 can be used to determine the object and the bit field
2208 tmps
[i
] = XEXP (src
, elt
);
2210 || subpos
+ bytelen
!= slen0
2211 || (!CONSTANT_P (tmps
[i
])
2212 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2213 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2214 subpos
* BITS_PER_UNIT
,
2215 1, NULL_RTX
, mode
, mode
, false,
2222 gcc_assert (!bytepos
);
2223 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2224 emit_move_insn (mem
, src
);
2225 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2226 0, 1, NULL_RTX
, mode
, mode
, false,
2230 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2231 SIMD register, which is currently broken. While we get GCC
2232 to emit proper RTL for these cases, let's dump to memory. */
2233 else if (VECTOR_MODE_P (GET_MODE (dst
))
2236 int slen
= GET_MODE_SIZE (GET_MODE (src
));
2239 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2240 emit_move_insn (mem
, src
);
2241 tmps
[i
] = adjust_address (mem
, mode
, (int) bytepos
);
2243 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2244 && XVECLEN (dst
, 0) > 1)
2245 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2246 else if (CONSTANT_P (src
))
2248 HOST_WIDE_INT len
= (HOST_WIDE_INT
) bytelen
;
2256 /* TODO: const_wide_int can have sizes other than this... */
2257 gcc_assert (2 * len
== ssize
);
2258 split_double (src
, &first
, &second
);
2265 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2268 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2269 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2270 mode
, mode
, false, NULL
);
2273 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2278 /* Emit code to move a block SRC of type TYPE to a block DST,
2279 where DST is non-consecutive registers represented by a PARALLEL.
2280 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2284 emit_group_load (rtx dst
, rtx src
, tree type
, int ssize
)
2289 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2290 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2292 /* Copy the extracted pieces into the proper (probable) hard regs. */
2293 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2295 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2298 emit_move_insn (d
, tmps
[i
]);
2302 /* Similar, but load SRC into new pseudos in a format that looks like
2303 PARALLEL. This can later be fed to emit_group_move to get things
2304 in the right place. */
2307 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, int ssize
)
2312 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2313 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2315 /* Convert the vector to look just like the original PARALLEL, except
2316 with the computed values. */
2317 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2319 rtx e
= XVECEXP (parallel
, 0, i
);
2320 rtx d
= XEXP (e
, 0);
2324 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2325 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2327 RTVEC_ELT (vec
, i
) = e
;
2330 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2333 /* Emit code to move a block SRC to block DST, where SRC and DST are
2334 non-consecutive groups of registers, each represented by a PARALLEL. */
2337 emit_group_move (rtx dst
, rtx src
)
2341 gcc_assert (GET_CODE (src
) == PARALLEL
2342 && GET_CODE (dst
) == PARALLEL
2343 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2345 /* Skip first entry if NULL. */
2346 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2347 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2348 XEXP (XVECEXP (src
, 0, i
), 0));
2351 /* Move a group of registers represented by a PARALLEL into pseudos. */
2354 emit_group_move_into_temps (rtx src
)
2356 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2359 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2361 rtx e
= XVECEXP (src
, 0, i
);
2362 rtx d
= XEXP (e
, 0);
2365 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2366 RTVEC_ELT (vec
, i
) = e
;
2369 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2372 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2373 where SRC is non-consecutive registers represented by a PARALLEL.
2374 SSIZE represents the total size of block ORIG_DST, or -1 if not
2378 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
, int ssize
)
2381 int start
, finish
, i
;
2382 machine_mode m
= GET_MODE (orig_dst
);
2384 gcc_assert (GET_CODE (src
) == PARALLEL
);
2386 if (!SCALAR_INT_MODE_P (m
)
2387 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2389 scalar_int_mode imode
;
2390 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2392 dst
= gen_reg_rtx (imode
);
2393 emit_group_store (dst
, src
, type
, ssize
);
2394 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2398 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2399 emit_group_store (dst
, src
, type
, ssize
);
2401 emit_move_insn (orig_dst
, dst
);
2405 /* Check for a NULL entry, used to indicate that the parameter goes
2406 both on the stack and in registers. */
2407 if (XEXP (XVECEXP (src
, 0, 0), 0))
2411 finish
= XVECLEN (src
, 0);
2413 tmps
= XALLOCAVEC (rtx
, finish
);
2415 /* Copy the (probable) hard regs into pseudos. */
2416 for (i
= start
; i
< finish
; i
++)
2418 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2419 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2421 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2422 emit_move_insn (tmps
[i
], reg
);
2428 /* If we won't be storing directly into memory, protect the real destination
2429 from strange tricks we might play. */
2431 if (GET_CODE (dst
) == PARALLEL
)
2435 /* We can get a PARALLEL dst if there is a conditional expression in
2436 a return statement. In that case, the dst and src are the same,
2437 so no action is necessary. */
2438 if (rtx_equal_p (dst
, src
))
2441 /* It is unclear if we can ever reach here, but we may as well handle
2442 it. Allocate a temporary, and split this into a store/load to/from
2444 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2445 emit_group_store (temp
, src
, type
, ssize
);
2446 emit_group_load (dst
, temp
, type
, ssize
);
2449 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2451 machine_mode outer
= GET_MODE (dst
);
2453 HOST_WIDE_INT bytepos
;
2457 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2458 dst
= gen_reg_rtx (outer
);
2460 /* Make life a bit easier for combine. */
2461 /* If the first element of the vector is the low part
2462 of the destination mode, use a paradoxical subreg to
2463 initialize the destination. */
2466 inner
= GET_MODE (tmps
[start
]);
2467 bytepos
= subreg_lowpart_offset (inner
, outer
);
2468 if (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)) == bytepos
)
2470 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2474 emit_move_insn (dst
, temp
);
2481 /* If the first element wasn't the low part, try the last. */
2483 && start
< finish
- 1)
2485 inner
= GET_MODE (tmps
[finish
- 1]);
2486 bytepos
= subreg_lowpart_offset (inner
, outer
);
2487 if (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)) == bytepos
)
2489 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2493 emit_move_insn (dst
, temp
);
2500 /* Otherwise, simply initialize the result to zero. */
2502 emit_move_insn (dst
, CONST0_RTX (outer
));
2505 /* Process the pieces. */
2506 for (i
= start
; i
< finish
; i
++)
2508 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
2509 machine_mode mode
= GET_MODE (tmps
[i
]);
2510 unsigned int bytelen
= GET_MODE_SIZE (mode
);
2511 unsigned int adj_bytelen
;
2514 /* Handle trailing fragments that run over the size of the struct. */
2515 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2516 adj_bytelen
= ssize
- bytepos
;
2518 adj_bytelen
= bytelen
;
2520 if (GET_CODE (dst
) == CONCAT
)
2522 if (bytepos
+ adj_bytelen
2523 <= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
2524 dest
= XEXP (dst
, 0);
2525 else if (bytepos
>= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
2527 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2528 dest
= XEXP (dst
, 1);
2532 machine_mode dest_mode
= GET_MODE (dest
);
2533 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2535 gcc_assert (bytepos
== 0 && XVECLEN (src
, 0));
2537 if (GET_MODE_ALIGNMENT (dest_mode
)
2538 >= GET_MODE_ALIGNMENT (tmp_mode
))
2540 dest
= assign_stack_temp (dest_mode
,
2541 GET_MODE_SIZE (dest_mode
));
2542 emit_move_insn (adjust_address (dest
,
2550 dest
= assign_stack_temp (tmp_mode
,
2551 GET_MODE_SIZE (tmp_mode
));
2552 emit_move_insn (dest
, tmps
[i
]);
2553 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2559 /* Handle trailing fragments that run over the size of the struct. */
2560 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2562 /* store_bit_field always takes its value from the lsb.
2563 Move the fragment to the lsb if it's not already there. */
2565 #ifdef BLOCK_REG_PADDING
2566 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2567 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2573 int shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2574 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2578 /* Make sure not to write past the end of the struct. */
2579 store_bit_field (dest
,
2580 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2581 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2582 VOIDmode
, tmps
[i
], false);
2585 /* Optimize the access just a bit. */
2586 else if (MEM_P (dest
)
2587 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2588 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2589 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
2590 && bytelen
== GET_MODE_SIZE (mode
))
2591 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2594 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2595 0, 0, mode
, tmps
[i
], false);
2598 /* Copy from the pseudo into the (probable) hard reg. */
2599 if (orig_dst
!= dst
)
2600 emit_move_insn (orig_dst
, dst
);
2603 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2604 of the value stored in X. */
2607 maybe_emit_group_store (rtx x
, tree type
)
2609 machine_mode mode
= TYPE_MODE (type
);
2610 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2611 if (GET_CODE (x
) == PARALLEL
)
2613 rtx result
= gen_reg_rtx (mode
);
2614 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2620 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2622 This is used on targets that return BLKmode values in registers. */
2625 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2627 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2628 rtx src
= NULL
, dst
= NULL
;
2629 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2630 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2631 machine_mode mode
= GET_MODE (srcreg
);
2632 machine_mode tmode
= GET_MODE (target
);
2633 machine_mode copy_mode
;
2635 /* BLKmode registers created in the back-end shouldn't have survived. */
2636 gcc_assert (mode
!= BLKmode
);
2638 /* If the structure doesn't take up a whole number of words, see whether
2639 SRCREG is padded on the left or on the right. If it's on the left,
2640 set PADDING_CORRECTION to the number of bits to skip.
2642 In most ABIs, the structure will be returned at the least end of
2643 the register, which translates to right padding on little-endian
2644 targets and left padding on big-endian targets. The opposite
2645 holds if the structure is returned at the most significant
2646 end of the register. */
2647 if (bytes
% UNITS_PER_WORD
!= 0
2648 && (targetm
.calls
.return_in_msb (type
)
2650 : BYTES_BIG_ENDIAN
))
2652 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2654 /* We can use a single move if we have an exact mode for the size. */
2655 else if (MEM_P (target
)
2656 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2657 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2658 && bytes
== GET_MODE_SIZE (mode
))
2660 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2664 /* And if we additionally have the same mode for a register. */
2665 else if (REG_P (target
)
2666 && GET_MODE (target
) == mode
2667 && bytes
== GET_MODE_SIZE (mode
))
2669 emit_move_insn (target
, srcreg
);
2673 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2674 into a new pseudo which is a full word. */
2675 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2677 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2681 /* Copy the structure BITSIZE bits at a time. If the target lives in
2682 memory, take care of not reading/writing past its end by selecting
2683 a copy mode suited to BITSIZE. This should always be possible given
2686 If the target lives in register, make sure not to select a copy mode
2687 larger than the mode of the register.
2689 We could probably emit more efficient code for machines which do not use
2690 strict alignment, but it doesn't seem worth the effort at the current
2693 copy_mode
= word_mode
;
2696 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2697 if (mem_mode
.exists ())
2698 copy_mode
= mem_mode
.require ();
2700 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2703 for (bitpos
= 0, xbitpos
= padding_correction
;
2704 bitpos
< bytes
* BITS_PER_UNIT
;
2705 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2707 /* We need a new source operand each time xbitpos is on a
2708 word boundary and when xbitpos == padding_correction
2709 (the first time through). */
2710 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2711 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2713 /* We need a new destination operand each time bitpos is on
2715 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2717 else if (bitpos
% BITS_PER_WORD
== 0)
2718 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2720 /* Use xbitpos for the source extraction (right justified) and
2721 bitpos for the destination store (left justified). */
2722 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2723 extract_bit_field (src
, bitsize
,
2724 xbitpos
% BITS_PER_WORD
, 1,
2725 NULL_RTX
, copy_mode
, copy_mode
,
2731 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2732 register if it contains any data, otherwise return null.
2734 This is used on targets that return BLKmode values in registers. */
2737 copy_blkmode_to_reg (machine_mode mode
, tree src
)
2740 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2741 unsigned int bitsize
;
2742 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2743 machine_mode dst_mode
;
2745 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2747 x
= expand_normal (src
);
2749 bytes
= int_size_in_bytes (TREE_TYPE (src
));
2753 /* If the structure doesn't take up a whole number of words, see
2754 whether the register value should be padded on the left or on
2755 the right. Set PADDING_CORRECTION to the number of padding
2756 bits needed on the left side.
2758 In most ABIs, the structure will be returned at the least end of
2759 the register, which translates to right padding on little-endian
2760 targets and left padding on big-endian targets. The opposite
2761 holds if the structure is returned at the most significant
2762 end of the register. */
2763 if (bytes
% UNITS_PER_WORD
!= 0
2764 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2766 : BYTES_BIG_ENDIAN
))
2767 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2770 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2771 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2772 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2774 /* Copy the structure BITSIZE bits at a time. */
2775 for (bitpos
= 0, xbitpos
= padding_correction
;
2776 bitpos
< bytes
* BITS_PER_UNIT
;
2777 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2779 /* We need a new destination pseudo each time xbitpos is
2780 on a word boundary and when xbitpos == padding_correction
2781 (the first time through). */
2782 if (xbitpos
% BITS_PER_WORD
== 0
2783 || xbitpos
== padding_correction
)
2785 /* Generate an appropriate register. */
2786 dst_word
= gen_reg_rtx (word_mode
);
2787 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2789 /* Clear the destination before we move anything into it. */
2790 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2793 /* We need a new source operand each time bitpos is on a word
2795 if (bitpos
% BITS_PER_WORD
== 0)
2796 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2798 /* Use bitpos for the source extraction (left justified) and
2799 xbitpos for the destination store (right justified). */
2800 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2802 extract_bit_field (src_word
, bitsize
,
2803 bitpos
% BITS_PER_WORD
, 1,
2804 NULL_RTX
, word_mode
, word_mode
,
2809 if (mode
== BLKmode
)
2811 /* Find the smallest integer mode large enough to hold the
2812 entire structure. */
2813 opt_scalar_int_mode mode_iter
;
2814 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2815 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2818 /* A suitable mode should have been found. */
2819 mode
= mode_iter
.require ();
2822 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2823 dst_mode
= word_mode
;
2826 dst
= gen_reg_rtx (dst_mode
);
2828 for (i
= 0; i
< n_regs
; i
++)
2829 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2831 if (mode
!= dst_mode
)
2832 dst
= gen_lowpart (mode
, dst
);
2837 /* Add a USE expression for REG to the (possibly empty) list pointed
2838 to by CALL_FUSAGE. REG must denote a hard register. */
2841 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2843 gcc_assert (REG_P (reg
));
2845 if (!HARD_REGISTER_P (reg
))
2849 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2852 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2853 to by CALL_FUSAGE. REG must denote a hard register. */
2856 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2858 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2861 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2864 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2865 starting at REGNO. All of these registers must be hard registers. */
2868 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2872 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2874 for (i
= 0; i
< nregs
; i
++)
2875 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2878 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2879 PARALLEL REGS. This is for calls that pass values in multiple
2880 non-contiguous locations. The Irix 6 ABI has examples of this. */
2883 use_group_regs (rtx
*call_fusage
, rtx regs
)
2887 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2889 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2891 /* A NULL entry means the parameter goes both on the stack and in
2892 registers. This can also be a MEM for targets that pass values
2893 partially on the stack and partially in registers. */
2894 if (reg
!= 0 && REG_P (reg
))
2895 use_reg (call_fusage
, reg
);
2899 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2900 assigment and the code of the expresion on the RHS is CODE. Return
2904 get_def_for_expr (tree name
, enum tree_code code
)
2908 if (TREE_CODE (name
) != SSA_NAME
)
2911 def_stmt
= get_gimple_for_ssa_name (name
);
2913 || gimple_assign_rhs_code (def_stmt
) != code
)
2919 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2920 assigment and the class of the expresion on the RHS is CLASS. Return
2924 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2928 if (TREE_CODE (name
) != SSA_NAME
)
2931 def_stmt
= get_gimple_for_ssa_name (name
);
2933 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2939 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2940 its length in bytes. */
2943 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2944 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2945 unsigned HOST_WIDE_INT min_size
,
2946 unsigned HOST_WIDE_INT max_size
,
2947 unsigned HOST_WIDE_INT probable_max_size
)
2949 machine_mode mode
= GET_MODE (object
);
2952 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2954 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2955 just move a zero. Otherwise, do this a piece at a time. */
2957 && CONST_INT_P (size
)
2958 && INTVAL (size
) == (HOST_WIDE_INT
) GET_MODE_SIZE (mode
))
2960 rtx zero
= CONST0_RTX (mode
);
2963 emit_move_insn (object
, zero
);
2967 if (COMPLEX_MODE_P (mode
))
2969 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2972 write_complex_part (object
, zero
, 0);
2973 write_complex_part (object
, zero
, 1);
2979 if (size
== const0_rtx
)
2982 align
= MEM_ALIGN (object
);
2984 if (CONST_INT_P (size
)
2985 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
2987 optimize_insn_for_speed_p ()))
2988 clear_by_pieces (object
, INTVAL (size
), align
);
2989 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
2990 expected_align
, expected_size
,
2991 min_size
, max_size
, probable_max_size
))
2993 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
2994 return set_storage_via_libcall (object
, size
, const0_rtx
,
2995 method
== BLOCK_OP_TAILCALL
);
3003 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3005 unsigned HOST_WIDE_INT max
, min
= 0;
3006 if (GET_CODE (size
) == CONST_INT
)
3007 min
= max
= UINTVAL (size
);
3009 max
= GET_MODE_MASK (GET_MODE (size
));
3010 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3014 /* A subroutine of clear_storage. Expand a call to memset.
3015 Return the return value of memset, 0 otherwise. */
3018 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3020 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3021 machine_mode size_mode
;
3023 object
= copy_addr_to_reg (XEXP (object
, 0));
3024 object_tree
= make_tree (ptr_type_node
, object
);
3026 if (!CONST_INT_P (val
))
3027 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3028 val_tree
= make_tree (integer_type_node
, val
);
3030 size_mode
= TYPE_MODE (sizetype
);
3031 size
= convert_to_mode (size_mode
, size
, 1);
3032 size
= copy_to_mode_reg (size_mode
, size
);
3033 size_tree
= make_tree (sizetype
, size
);
3035 /* It is incorrect to use the libcall calling conventions for calls to
3036 memset because it can be provided by the user. */
3037 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3038 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3039 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3041 return expand_call (call_expr
, NULL_RTX
, false);
3044 /* Expand a setmem pattern; return true if successful. */
3047 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3048 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3049 unsigned HOST_WIDE_INT min_size
,
3050 unsigned HOST_WIDE_INT max_size
,
3051 unsigned HOST_WIDE_INT probable_max_size
)
3053 /* Try the most limited insn first, because there's no point
3054 including more than one in the machine description unless
3055 the more limited one has some advantage. */
3057 if (expected_align
< align
)
3058 expected_align
= align
;
3059 if (expected_size
!= -1)
3061 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3062 expected_size
= max_size
;
3063 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3064 expected_size
= min_size
;
3067 opt_scalar_int_mode mode_iter
;
3068 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3070 scalar_int_mode mode
= mode_iter
.require ();
3071 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3073 if (code
!= CODE_FOR_nothing
3074 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3075 here because if SIZE is less than the mode mask, as it is
3076 returned by the macro, it will definitely be less than the
3077 actual mode mask. Since SIZE is within the Pmode address
3078 space, we limit MODE to Pmode. */
3079 && ((CONST_INT_P (size
)
3080 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3081 <= (GET_MODE_MASK (mode
) >> 1)))
3082 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3083 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3085 struct expand_operand ops
[9];
3088 nops
= insn_data
[(int) code
].n_generator_args
;
3089 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3091 create_fixed_operand (&ops
[0], object
);
3092 /* The check above guarantees that this size conversion is valid. */
3093 create_convert_operand_to (&ops
[1], size
, mode
, true);
3094 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3095 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3098 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3099 create_integer_operand (&ops
[5], expected_size
);
3103 create_integer_operand (&ops
[6], min_size
);
3104 /* If we can not represent the maximal size,
3105 make parameter NULL. */
3106 if ((HOST_WIDE_INT
) max_size
!= -1)
3107 create_integer_operand (&ops
[7], max_size
);
3109 create_fixed_operand (&ops
[7], NULL
);
3113 /* If we can not represent the maximal size,
3114 make parameter NULL. */
3115 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3116 create_integer_operand (&ops
[8], probable_max_size
);
3118 create_fixed_operand (&ops
[8], NULL
);
3120 if (maybe_expand_insn (code
, nops
, ops
))
3129 /* Write to one of the components of the complex value CPLX. Write VAL to
3130 the real part if IMAG_P is false, and the imaginary part if its true. */
3133 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3139 if (GET_CODE (cplx
) == CONCAT
)
3141 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3145 cmode
= GET_MODE (cplx
);
3146 imode
= GET_MODE_INNER (cmode
);
3147 ibitsize
= GET_MODE_BITSIZE (imode
);
3149 /* For MEMs simplify_gen_subreg may generate an invalid new address
3150 because, e.g., the original address is considered mode-dependent
3151 by the target, which restricts simplify_subreg from invoking
3152 adjust_address_nv. Instead of preparing fallback support for an
3153 invalid address, we call adjust_address_nv directly. */
3156 emit_move_insn (adjust_address_nv (cplx
, imode
,
3157 imag_p
? GET_MODE_SIZE (imode
) : 0),
3162 /* If the sub-object is at least word sized, then we know that subregging
3163 will work. This special case is important, since store_bit_field
3164 wants to operate on integer modes, and there's rarely an OImode to
3165 correspond to TCmode. */
3166 if (ibitsize
>= BITS_PER_WORD
3167 /* For hard regs we have exact predicates. Assume we can split
3168 the original object if it spans an even number of hard regs.
3169 This special case is important for SCmode on 64-bit platforms
3170 where the natural size of floating-point regs is 32-bit. */
3172 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3173 && REG_NREGS (cplx
) % 2 == 0))
3175 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3176 imag_p
? GET_MODE_SIZE (imode
) : 0);
3179 emit_move_insn (part
, val
);
3183 /* simplify_gen_subreg may fail for sub-word MEMs. */
3184 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3187 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3191 /* Extract one of the components of the complex value CPLX. Extract the
3192 real part if IMAG_P is false, and the imaginary part if it's true. */
3195 read_complex_part (rtx cplx
, bool imag_p
)
3201 if (GET_CODE (cplx
) == CONCAT
)
3202 return XEXP (cplx
, imag_p
);
3204 cmode
= GET_MODE (cplx
);
3205 imode
= GET_MODE_INNER (cmode
);
3206 ibitsize
= GET_MODE_BITSIZE (imode
);
3208 /* Special case reads from complex constants that got spilled to memory. */
3209 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3211 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3212 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3214 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3215 if (CONSTANT_CLASS_P (part
))
3216 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3220 /* For MEMs simplify_gen_subreg may generate an invalid new address
3221 because, e.g., the original address is considered mode-dependent
3222 by the target, which restricts simplify_subreg from invoking
3223 adjust_address_nv. Instead of preparing fallback support for an
3224 invalid address, we call adjust_address_nv directly. */
3226 return adjust_address_nv (cplx
, imode
,
3227 imag_p
? GET_MODE_SIZE (imode
) : 0);
3229 /* If the sub-object is at least word sized, then we know that subregging
3230 will work. This special case is important, since extract_bit_field
3231 wants to operate on integer modes, and there's rarely an OImode to
3232 correspond to TCmode. */
3233 if (ibitsize
>= BITS_PER_WORD
3234 /* For hard regs we have exact predicates. Assume we can split
3235 the original object if it spans an even number of hard regs.
3236 This special case is important for SCmode on 64-bit platforms
3237 where the natural size of floating-point regs is 32-bit. */
3239 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3240 && REG_NREGS (cplx
) % 2 == 0))
3242 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3243 imag_p
? GET_MODE_SIZE (imode
) : 0);
3247 /* simplify_gen_subreg may fail for sub-word MEMs. */
3248 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3251 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3252 true, NULL_RTX
, imode
, imode
, false, NULL
);
3255 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3256 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3257 represented in NEW_MODE. If FORCE is true, this will never happen, as
3258 we'll force-create a SUBREG if needed. */
3261 emit_move_change_mode (machine_mode new_mode
,
3262 machine_mode old_mode
, rtx x
, bool force
)
3266 if (push_operand (x
, GET_MODE (x
)))
3268 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3269 MEM_COPY_ATTRIBUTES (ret
, x
);
3273 /* We don't have to worry about changing the address since the
3274 size in bytes is supposed to be the same. */
3275 if (reload_in_progress
)
3277 /* Copy the MEM to change the mode and move any
3278 substitutions from the old MEM to the new one. */
3279 ret
= adjust_address_nv (x
, new_mode
, 0);
3280 copy_replacements (x
, ret
);
3283 ret
= adjust_address (x
, new_mode
, 0);
3287 /* Note that we do want simplify_subreg's behavior of validating
3288 that the new mode is ok for a hard register. If we were to use
3289 simplify_gen_subreg, we would create the subreg, but would
3290 probably run into the target not being able to implement it. */
3291 /* Except, of course, when FORCE is true, when this is exactly what
3292 we want. Which is needed for CCmodes on some targets. */
3294 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3296 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3302 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3303 an integer mode of the same size as MODE. Returns the instruction
3304 emitted, or NULL if such a move could not be generated. */
3307 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3309 scalar_int_mode imode
;
3310 enum insn_code code
;
3312 /* There must exist a mode of the exact size we require. */
3313 if (!int_mode_for_mode (mode
).exists (&imode
))
3316 /* The target must support moves in this mode. */
3317 code
= optab_handler (mov_optab
, imode
);
3318 if (code
== CODE_FOR_nothing
)
3321 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3324 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3327 return emit_insn (GEN_FCN (code
) (x
, y
));
3330 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3331 Return an equivalent MEM that does not use an auto-increment. */
3334 emit_move_resolve_push (machine_mode mode
, rtx x
)
3336 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3337 HOST_WIDE_INT adjust
;
3340 adjust
= GET_MODE_SIZE (mode
);
3341 #ifdef PUSH_ROUNDING
3342 adjust
= PUSH_ROUNDING (adjust
);
3344 if (code
== PRE_DEC
|| code
== POST_DEC
)
3346 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3348 rtx expr
= XEXP (XEXP (x
, 0), 1);
3351 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3352 gcc_assert (CONST_INT_P (XEXP (expr
, 1)));
3353 val
= INTVAL (XEXP (expr
, 1));
3354 if (GET_CODE (expr
) == MINUS
)
3356 gcc_assert (adjust
== val
|| adjust
== -val
);
3360 /* Do not use anti_adjust_stack, since we don't want to update
3361 stack_pointer_delta. */
3362 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3363 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3364 0, OPTAB_LIB_WIDEN
);
3365 if (temp
!= stack_pointer_rtx
)
3366 emit_move_insn (stack_pointer_rtx
, temp
);
3373 temp
= stack_pointer_rtx
;
3378 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3384 return replace_equiv_address (x
, temp
);
3387 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3388 X is known to satisfy push_operand, and MODE is known to be complex.
3389 Returns the last instruction emitted. */
3392 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3394 scalar_mode submode
= GET_MODE_INNER (mode
);
3397 #ifdef PUSH_ROUNDING
3398 unsigned int submodesize
= GET_MODE_SIZE (submode
);
3400 /* In case we output to the stack, but the size is smaller than the
3401 machine can push exactly, we need to use move instructions. */
3402 if (PUSH_ROUNDING (submodesize
) != submodesize
)
3404 x
= emit_move_resolve_push (mode
, x
);
3405 return emit_move_insn (x
, y
);
3409 /* Note that the real part always precedes the imag part in memory
3410 regardless of machine's endianness. */
3411 switch (GET_CODE (XEXP (x
, 0)))
3425 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3426 read_complex_part (y
, imag_first
));
3427 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3428 read_complex_part (y
, !imag_first
));
3431 /* A subroutine of emit_move_complex. Perform the move from Y to X
3432 via two moves of the parts. Returns the last instruction emitted. */
3435 emit_move_complex_parts (rtx x
, rtx y
)
3437 /* Show the output dies here. This is necessary for SUBREGs
3438 of pseudos since we cannot track their lifetimes correctly;
3439 hard regs shouldn't appear here except as return values. */
3440 if (!reload_completed
&& !reload_in_progress
3441 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3444 write_complex_part (x
, read_complex_part (y
, false), false);
3445 write_complex_part (x
, read_complex_part (y
, true), true);
3447 return get_last_insn ();
3450 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3451 MODE is known to be complex. Returns the last instruction emitted. */
3454 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3458 /* Need to take special care for pushes, to maintain proper ordering
3459 of the data, and possibly extra padding. */
3460 if (push_operand (x
, mode
))
3461 return emit_move_complex_push (mode
, x
, y
);
3463 /* See if we can coerce the target into moving both values at once, except
3464 for floating point where we favor moving as parts if this is easy. */
3465 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3466 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3468 && HARD_REGISTER_P (x
)
3469 && REG_NREGS (x
) == 1)
3471 && HARD_REGISTER_P (y
)
3472 && REG_NREGS (y
) == 1))
3474 /* Not possible if the values are inherently not adjacent. */
3475 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3477 /* Is possible if both are registers (or subregs of registers). */
3478 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3480 /* If one of the operands is a memory, and alignment constraints
3481 are friendly enough, we may be able to do combined memory operations.
3482 We do not attempt this if Y is a constant because that combination is
3483 usually better with the by-parts thing below. */
3484 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3485 && (!STRICT_ALIGNMENT
3486 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3495 /* For memory to memory moves, optimal behavior can be had with the
3496 existing block move logic. */
3497 if (MEM_P (x
) && MEM_P (y
))
3499 emit_block_move (x
, y
, GEN_INT (GET_MODE_SIZE (mode
)),
3500 BLOCK_OP_NO_LIBCALL
);
3501 return get_last_insn ();
3504 ret
= emit_move_via_integer (mode
, x
, y
, true);
3509 return emit_move_complex_parts (x
, y
);
3512 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3513 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3516 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3520 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3523 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3524 if (code
!= CODE_FOR_nothing
)
3526 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3527 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3528 return emit_insn (GEN_FCN (code
) (x
, y
));
3532 /* Otherwise, find the MODE_INT mode of the same width. */
3533 ret
= emit_move_via_integer (mode
, x
, y
, false);
3534 gcc_assert (ret
!= NULL
);
3538 /* Return true if word I of OP lies entirely in the
3539 undefined bits of a paradoxical subreg. */
3542 undefined_operand_subword_p (const_rtx op
, int i
)
3544 if (GET_CODE (op
) != SUBREG
)
3546 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3547 HOST_WIDE_INT offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3548 return (offset
>= GET_MODE_SIZE (innermostmode
)
3549 || offset
<= -UNITS_PER_WORD
);
3552 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3553 MODE is any multi-word or full-word mode that lacks a move_insn
3554 pattern. Note that you will get better code if you define such
3555 patterns, even if they must turn into multiple assembler instructions. */
3558 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3560 rtx_insn
*last_insn
= 0;
3566 gcc_assert (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
);
3568 /* If X is a push on the stack, do the push now and replace
3569 X with a reference to the stack pointer. */
3570 if (push_operand (x
, mode
))
3571 x
= emit_move_resolve_push (mode
, x
);
3573 /* If we are in reload, see if either operand is a MEM whose address
3574 is scheduled for replacement. */
3575 if (reload_in_progress
&& MEM_P (x
)
3576 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3577 x
= replace_equiv_address_nv (x
, inner
);
3578 if (reload_in_progress
&& MEM_P (y
)
3579 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3580 y
= replace_equiv_address_nv (y
, inner
);
3584 need_clobber
= false;
3586 i
< (GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
;
3589 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3592 /* Do not generate code for a move if it would come entirely
3593 from the undefined bits of a paradoxical subreg. */
3594 if (undefined_operand_subword_p (y
, i
))
3597 ypart
= operand_subword (y
, i
, 1, mode
);
3599 /* If we can't get a part of Y, put Y into memory if it is a
3600 constant. Otherwise, force it into a register. Then we must
3601 be able to get a part of Y. */
3602 if (ypart
== 0 && CONSTANT_P (y
))
3604 y
= use_anchored_address (force_const_mem (mode
, y
));
3605 ypart
= operand_subword (y
, i
, 1, mode
);
3607 else if (ypart
== 0)
3608 ypart
= operand_subword_force (y
, i
, mode
);
3610 gcc_assert (xpart
&& ypart
);
3612 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3614 last_insn
= emit_move_insn (xpart
, ypart
);
3620 /* Show the output dies here. This is necessary for SUBREGs
3621 of pseudos since we cannot track their lifetimes correctly;
3622 hard regs shouldn't appear here except as return values.
3623 We never want to emit such a clobber after reload. */
3625 && ! (reload_in_progress
|| reload_completed
)
3626 && need_clobber
!= 0)
3634 /* Low level part of emit_move_insn.
3635 Called just like emit_move_insn, but assumes X and Y
3636 are basically valid. */
3639 emit_move_insn_1 (rtx x
, rtx y
)
3641 machine_mode mode
= GET_MODE (x
);
3642 enum insn_code code
;
3644 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3646 code
= optab_handler (mov_optab
, mode
);
3647 if (code
!= CODE_FOR_nothing
)
3648 return emit_insn (GEN_FCN (code
) (x
, y
));
3650 /* Expand complex moves by moving real part and imag part. */
3651 if (COMPLEX_MODE_P (mode
))
3652 return emit_move_complex (mode
, x
, y
);
3654 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3655 || ALL_FIXED_POINT_MODE_P (mode
))
3657 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3659 /* If we can't find an integer mode, use multi words. */
3663 return emit_move_multi_word (mode
, x
, y
);
3666 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3667 return emit_move_ccmode (mode
, x
, y
);
3669 /* Try using a move pattern for the corresponding integer mode. This is
3670 only safe when simplify_subreg can convert MODE constants into integer
3671 constants. At present, it can only do this reliably if the value
3672 fits within a HOST_WIDE_INT. */
3673 if (!CONSTANT_P (y
) || GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3675 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3679 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3684 return emit_move_multi_word (mode
, x
, y
);
3687 /* Generate code to copy Y into X.
3688 Both Y and X must have the same mode, except that
3689 Y can be a constant with VOIDmode.
3690 This mode cannot be BLKmode; use emit_block_move for that.
3692 Return the last instruction emitted. */
3695 emit_move_insn (rtx x
, rtx y
)
3697 machine_mode mode
= GET_MODE (x
);
3698 rtx y_cst
= NULL_RTX
;
3699 rtx_insn
*last_insn
;
3702 gcc_assert (mode
!= BLKmode
3703 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3708 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3709 && (last_insn
= compress_float_constant (x
, y
)))
3714 if (!targetm
.legitimate_constant_p (mode
, y
))
3716 y
= force_const_mem (mode
, y
);
3718 /* If the target's cannot_force_const_mem prevented the spill,
3719 assume that the target's move expanders will also take care
3720 of the non-legitimate constant. */
3724 y
= use_anchored_address (y
);
3728 /* If X or Y are memory references, verify that their addresses are valid
3731 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3733 && ! push_operand (x
, GET_MODE (x
))))
3734 x
= validize_mem (x
);
3737 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3738 MEM_ADDR_SPACE (y
)))
3739 y
= validize_mem (y
);
3741 gcc_assert (mode
!= BLKmode
);
3743 last_insn
= emit_move_insn_1 (x
, y
);
3745 if (y_cst
&& REG_P (x
)
3746 && (set
= single_set (last_insn
)) != NULL_RTX
3747 && SET_DEST (set
) == x
3748 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3749 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3754 /* Generate the body of an instruction to copy Y into X.
3755 It may be a list of insns, if one insn isn't enough. */
3758 gen_move_insn (rtx x
, rtx y
)
3763 emit_move_insn_1 (x
, y
);
3769 /* If Y is representable exactly in a narrower mode, and the target can
3770 perform the extension directly from constant or memory, then emit the
3771 move as an extension. */
3774 compress_float_constant (rtx x
, rtx y
)
3776 machine_mode dstmode
= GET_MODE (x
);
3777 machine_mode orig_srcmode
= GET_MODE (y
);
3778 machine_mode srcmode
;
3779 const REAL_VALUE_TYPE
*r
;
3780 int oldcost
, newcost
;
3781 bool speed
= optimize_insn_for_speed_p ();
3783 r
= CONST_DOUBLE_REAL_VALUE (y
);
3785 if (targetm
.legitimate_constant_p (dstmode
, y
))
3786 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3788 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3790 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3794 rtx_insn
*last_insn
;
3796 /* Skip if the target can't extend this way. */
3797 ic
= can_extend_p (dstmode
, srcmode
, 0);
3798 if (ic
== CODE_FOR_nothing
)
3801 /* Skip if the narrowed value isn't exact. */
3802 if (! exact_real_truncate (srcmode
, r
))
3805 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3807 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3809 /* Skip if the target needs extra instructions to perform
3811 if (!insn_operand_matches (ic
, 1, trunc_y
))
3813 /* This is valid, but may not be cheaper than the original. */
3814 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3816 if (oldcost
< newcost
)
3819 else if (float_extend_from_mem
[dstmode
][srcmode
])
3821 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3822 /* This is valid, but may not be cheaper than the original. */
3823 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3825 if (oldcost
< newcost
)
3827 trunc_y
= validize_mem (trunc_y
);
3832 /* For CSE's benefit, force the compressed constant pool entry
3833 into a new pseudo. This constant may be used in different modes,
3834 and if not, combine will put things back together for us. */
3835 trunc_y
= force_reg (srcmode
, trunc_y
);
3837 /* If x is a hard register, perform the extension into a pseudo,
3838 so that e.g. stack realignment code is aware of it. */
3840 if (REG_P (x
) && HARD_REGISTER_P (x
))
3841 target
= gen_reg_rtx (dstmode
);
3843 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3844 last_insn
= get_last_insn ();
3847 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3850 return emit_move_insn (x
, target
);
3857 /* Pushing data onto the stack. */
3859 /* Push a block of length SIZE (perhaps variable)
3860 and return an rtx to address the beginning of the block.
3861 The value may be virtual_outgoing_args_rtx.
3863 EXTRA is the number of bytes of padding to push in addition to SIZE.
3864 BELOW nonzero means this padding comes at low addresses;
3865 otherwise, the padding comes at high addresses. */
3868 push_block (rtx size
, int extra
, int below
)
3872 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3873 if (CONSTANT_P (size
))
3874 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3875 else if (REG_P (size
) && extra
== 0)
3876 anti_adjust_stack (size
);
3879 temp
= copy_to_mode_reg (Pmode
, size
);
3881 temp
= expand_binop (Pmode
, add_optab
, temp
,
3882 gen_int_mode (extra
, Pmode
),
3883 temp
, 0, OPTAB_LIB_WIDEN
);
3884 anti_adjust_stack (temp
);
3887 if (STACK_GROWS_DOWNWARD
)
3889 temp
= virtual_outgoing_args_rtx
;
3890 if (extra
!= 0 && below
)
3891 temp
= plus_constant (Pmode
, temp
, extra
);
3895 if (CONST_INT_P (size
))
3896 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3897 -INTVAL (size
) - (below
? 0 : extra
));
3898 else if (extra
!= 0 && !below
)
3899 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3900 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3903 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3904 negate_rtx (Pmode
, size
));
3907 return memory_address (NARROWEST_INT_MODE
, temp
);
3910 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3913 mem_autoinc_base (rtx mem
)
3917 rtx addr
= XEXP (mem
, 0);
3918 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3919 return XEXP (addr
, 0);
3924 /* A utility routine used here, in reload, and in try_split. The insns
3925 after PREV up to and including LAST are known to adjust the stack,
3926 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3927 placing notes as appropriate. PREV may be NULL, indicating the
3928 entire insn sequence prior to LAST should be scanned.
3930 The set of allowed stack pointer modifications is small:
3931 (1) One or more auto-inc style memory references (aka pushes),
3932 (2) One or more addition/subtraction with the SP as destination,
3933 (3) A single move insn with the SP as destination,
3934 (4) A call_pop insn,
3935 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3937 Insns in the sequence that do not modify the SP are ignored,
3938 except for noreturn calls.
3940 The return value is the amount of adjustment that can be trivially
3941 verified, via immediate operand or auto-inc. If the adjustment
3942 cannot be trivially extracted, the return value is INT_MIN. */
3945 find_args_size_adjust (rtx_insn
*insn
)
3950 pat
= PATTERN (insn
);
3953 /* Look for a call_pop pattern. */
3956 /* We have to allow non-call_pop patterns for the case
3957 of emit_single_push_insn of a TLS address. */
3958 if (GET_CODE (pat
) != PARALLEL
)
3961 /* All call_pop have a stack pointer adjust in the parallel.
3962 The call itself is always first, and the stack adjust is
3963 usually last, so search from the end. */
3964 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3966 set
= XVECEXP (pat
, 0, i
);
3967 if (GET_CODE (set
) != SET
)
3969 dest
= SET_DEST (set
);
3970 if (dest
== stack_pointer_rtx
)
3973 /* We'd better have found the stack pointer adjust. */
3976 /* Fall through to process the extracted SET and DEST
3977 as if it was a standalone insn. */
3979 else if (GET_CODE (pat
) == SET
)
3981 else if ((set
= single_set (insn
)) != NULL
)
3983 else if (GET_CODE (pat
) == PARALLEL
)
3985 /* ??? Some older ports use a parallel with a stack adjust
3986 and a store for a PUSH_ROUNDING pattern, rather than a
3987 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3988 /* ??? See h8300 and m68k, pushqi1. */
3989 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
3991 set
= XVECEXP (pat
, 0, i
);
3992 if (GET_CODE (set
) != SET
)
3994 dest
= SET_DEST (set
);
3995 if (dest
== stack_pointer_rtx
)
3998 /* We do not expect an auto-inc of the sp in the parallel. */
3999 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4000 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4001 != stack_pointer_rtx
);
4009 dest
= SET_DEST (set
);
4011 /* Look for direct modifications of the stack pointer. */
4012 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4014 /* Look for a trivial adjustment, otherwise assume nothing. */
4015 /* Note that the SPU restore_stack_block pattern refers to
4016 the stack pointer in V4SImode. Consider that non-trivial. */
4017 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4018 && GET_CODE (SET_SRC (set
)) == PLUS
4019 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
4020 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
4021 return INTVAL (XEXP (SET_SRC (set
), 1));
4022 /* ??? Reload can generate no-op moves, which will be cleaned
4023 up later. Recognize it and continue searching. */
4024 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4027 return HOST_WIDE_INT_MIN
;
4033 /* Otherwise only think about autoinc patterns. */
4034 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4037 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4038 != stack_pointer_rtx
);
4040 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4041 mem
= SET_SRC (set
);
4045 addr
= XEXP (mem
, 0);
4046 switch (GET_CODE (addr
))
4050 return GET_MODE_SIZE (GET_MODE (mem
));
4053 return -GET_MODE_SIZE (GET_MODE (mem
));
4056 addr
= XEXP (addr
, 1);
4057 gcc_assert (GET_CODE (addr
) == PLUS
);
4058 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4059 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
4060 return INTVAL (XEXP (addr
, 1));
4068 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
, int end_args_size
)
4070 int args_size
= end_args_size
;
4071 bool saw_unknown
= false;
4074 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4076 HOST_WIDE_INT this_delta
;
4078 if (!NONDEBUG_INSN_P (insn
))
4081 this_delta
= find_args_size_adjust (insn
);
4082 if (this_delta
== 0)
4085 || ACCUMULATE_OUTGOING_ARGS
4086 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4090 gcc_assert (!saw_unknown
);
4091 if (this_delta
== HOST_WIDE_INT_MIN
)
4094 add_reg_note (insn
, REG_ARGS_SIZE
, GEN_INT (args_size
));
4095 if (STACK_GROWS_DOWNWARD
)
4096 this_delta
= -(unsigned HOST_WIDE_INT
) this_delta
;
4098 args_size
-= this_delta
;
4101 return saw_unknown
? INT_MIN
: args_size
;
4104 #ifdef PUSH_ROUNDING
4105 /* Emit single push insn. */
4108 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4111 unsigned rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4113 enum insn_code icode
;
4115 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4116 /* If there is push pattern, use it. Otherwise try old way of throwing
4117 MEM representing push operation to move expander. */
4118 icode
= optab_handler (push_optab
, mode
);
4119 if (icode
!= CODE_FOR_nothing
)
4121 struct expand_operand ops
[1];
4123 create_input_operand (&ops
[0], x
, mode
);
4124 if (maybe_expand_insn (icode
, 1, ops
))
4127 if (GET_MODE_SIZE (mode
) == rounded_size
)
4128 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4129 /* If we are to pad downward, adjust the stack pointer first and
4130 then store X into the stack location using an offset. This is
4131 because emit_move_insn does not know how to pad; it does not have
4133 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4135 unsigned padding_size
= rounded_size
- GET_MODE_SIZE (mode
);
4136 HOST_WIDE_INT offset
;
4138 emit_move_insn (stack_pointer_rtx
,
4139 expand_binop (Pmode
,
4140 STACK_GROWS_DOWNWARD
? sub_optab
4143 gen_int_mode (rounded_size
, Pmode
),
4144 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4146 offset
= (HOST_WIDE_INT
) padding_size
;
4147 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4148 /* We have already decremented the stack pointer, so get the
4150 offset
+= (HOST_WIDE_INT
) rounded_size
;
4152 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4153 /* We have already incremented the stack pointer, so get the
4155 offset
-= (HOST_WIDE_INT
) rounded_size
;
4157 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4158 gen_int_mode (offset
, Pmode
));
4162 if (STACK_GROWS_DOWNWARD
)
4163 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4164 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4165 gen_int_mode (-(HOST_WIDE_INT
) rounded_size
,
4168 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4169 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4170 gen_int_mode (rounded_size
, Pmode
));
4172 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4175 dest
= gen_rtx_MEM (mode
, dest_addr
);
4179 set_mem_attributes (dest
, type
, 1);
4181 if (cfun
->tail_call_marked
)
4182 /* Function incoming arguments may overlap with sibling call
4183 outgoing arguments and we cannot allow reordering of reads
4184 from function arguments with stores to outgoing arguments
4185 of sibling calls. */
4186 set_mem_alias_set (dest
, 0);
4188 emit_move_insn (dest
, x
);
4191 /* Emit and annotate a single push insn. */
4194 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4196 int delta
, old_delta
= stack_pointer_delta
;
4197 rtx_insn
*prev
= get_last_insn ();
4200 emit_single_push_insn_1 (mode
, x
, type
);
4202 last
= get_last_insn ();
4204 /* Notice the common case where we emitted exactly one insn. */
4205 if (PREV_INSN (last
) == prev
)
4207 add_reg_note (last
, REG_ARGS_SIZE
, GEN_INT (stack_pointer_delta
));
4211 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4212 gcc_assert (delta
== INT_MIN
|| delta
== old_delta
);
4216 /* If reading SIZE bytes from X will end up reading from
4217 Y return the number of bytes that overlap. Return -1
4218 if there is no overlap or -2 if we can't determine
4219 (for example when X and Y have different base registers). */
4222 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4224 rtx tmp
= plus_constant (Pmode
, x
, size
);
4225 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4227 if (!CONST_INT_P (sub
))
4230 HOST_WIDE_INT val
= INTVAL (sub
);
4232 return IN_RANGE (val
, 1, size
) ? val
: -1;
4235 /* Generate code to push X onto the stack, assuming it has mode MODE and
4237 MODE is redundant except when X is a CONST_INT (since they don't
4239 SIZE is an rtx for the size of data to be copied (in bytes),
4240 needed only if X is BLKmode.
4241 Return true if successful. May return false if asked to push a
4242 partial argument during a sibcall optimization (as specified by
4243 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4246 ALIGN (in bits) is maximum alignment we can assume.
4248 If PARTIAL and REG are both nonzero, then copy that many of the first
4249 bytes of X into registers starting with REG, and push the rest of X.
4250 The amount of space pushed is decreased by PARTIAL bytes.
4251 REG must be a hard register in this case.
4252 If REG is zero but PARTIAL is not, take any all others actions for an
4253 argument partially in registers, but do not actually load any
4256 EXTRA is the amount in bytes of extra space to leave next to this arg.
4257 This is ignored if an argument block has already been allocated.
4259 On a machine that lacks real push insns, ARGS_ADDR is the address of
4260 the bottom of the argument block for this call. We use indexing off there
4261 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4262 argument block has not been preallocated.
4264 ARGS_SO_FAR is the size of args previously pushed for this call.
4266 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4267 for arguments passed in registers. If nonzero, it will be the number
4268 of bytes required. */
4271 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4272 unsigned int align
, int partial
, rtx reg
, int extra
,
4273 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4274 rtx alignment_pad
, bool sibcall_p
)
4277 pad_direction stack_direction
4278 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4280 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4281 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4282 Default is below for small data on big-endian machines; else above. */
4283 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4285 /* Invert direction if stack is post-decrement.
4287 if (STACK_PUSH_CODE
== POST_DEC
)
4288 if (where_pad
!= PAD_NONE
)
4289 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4293 int nregs
= partial
/ UNITS_PER_WORD
;
4294 rtx
*tmp_regs
= NULL
;
4295 int overlapping
= 0;
4298 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4300 /* Copy a block into the stack, entirely or partially. */
4307 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4308 used
= partial
- offset
;
4310 if (mode
!= BLKmode
)
4312 /* A value is to be stored in an insufficiently aligned
4313 stack slot; copy via a suitably aligned slot if
4315 size
= GEN_INT (GET_MODE_SIZE (mode
));
4316 if (!MEM_P (xinner
))
4318 temp
= assign_temp (type
, 1, 1);
4319 emit_move_insn (temp
, xinner
);
4326 /* USED is now the # of bytes we need not copy to the stack
4327 because registers will take care of them. */
4330 xinner
= adjust_address (xinner
, BLKmode
, used
);
4332 /* If the partial register-part of the arg counts in its stack size,
4333 skip the part of stack space corresponding to the registers.
4334 Otherwise, start copying to the beginning of the stack space,
4335 by setting SKIP to 0. */
4336 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4338 #ifdef PUSH_ROUNDING
4339 /* Do it with several push insns if that doesn't take lots of insns
4340 and if there is no difficulty with push insns that skip bytes
4341 on the stack for alignment purposes. */
4344 && CONST_INT_P (size
)
4346 && MEM_ALIGN (xinner
) >= align
4347 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4348 /* Here we avoid the case of a structure whose weak alignment
4349 forces many pushes of a small amount of data,
4350 and such small pushes do rounding that causes trouble. */
4351 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4352 || align
>= BIGGEST_ALIGNMENT
4353 || (PUSH_ROUNDING (align
/ BITS_PER_UNIT
)
4354 == (align
/ BITS_PER_UNIT
)))
4355 && (HOST_WIDE_INT
) PUSH_ROUNDING (INTVAL (size
)) == INTVAL (size
))
4357 /* Push padding now if padding above and stack grows down,
4358 or if padding below and stack grows up.
4359 But if space already allocated, this has already been done. */
4360 if (extra
&& args_addr
== 0
4361 && where_pad
!= PAD_NONE
&& where_pad
!= stack_direction
)
4362 anti_adjust_stack (GEN_INT (extra
));
4364 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4367 #endif /* PUSH_ROUNDING */
4371 /* Otherwise make space on the stack and copy the data
4372 to the address of that space. */
4374 /* Deduct words put into registers from the size we must copy. */
4377 if (CONST_INT_P (size
))
4378 size
= GEN_INT (INTVAL (size
) - used
);
4380 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4381 gen_int_mode (used
, GET_MODE (size
)),
4382 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4385 /* Get the address of the stack space.
4386 In this case, we do not deal with EXTRA separately.
4387 A single stack adjust will do. */
4390 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4393 else if (CONST_INT_P (args_so_far
))
4394 temp
= memory_address (BLKmode
,
4395 plus_constant (Pmode
, args_addr
,
4396 skip
+ INTVAL (args_so_far
)));
4398 temp
= memory_address (BLKmode
,
4399 plus_constant (Pmode
,
4400 gen_rtx_PLUS (Pmode
,
4405 if (!ACCUMULATE_OUTGOING_ARGS
)
4407 /* If the source is referenced relative to the stack pointer,
4408 copy it to another register to stabilize it. We do not need
4409 to do this if we know that we won't be changing sp. */
4411 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4412 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4413 temp
= copy_to_reg (temp
);
4416 target
= gen_rtx_MEM (BLKmode
, temp
);
4418 /* We do *not* set_mem_attributes here, because incoming arguments
4419 may overlap with sibling call outgoing arguments and we cannot
4420 allow reordering of reads from function arguments with stores
4421 to outgoing arguments of sibling calls. We do, however, want
4422 to record the alignment of the stack slot. */
4423 /* ALIGN may well be better aligned than TYPE, e.g. due to
4424 PARM_BOUNDARY. Assume the caller isn't lying. */
4425 set_mem_align (target
, align
);
4427 /* If part should go in registers and pushing to that part would
4428 overwrite some of the values that need to go into regs, load the
4429 overlapping values into temporary pseudos to be moved into the hard
4430 regs at the end after the stack pushing has completed.
4431 We cannot load them directly into the hard regs here because
4432 they can be clobbered by the block move expansions.
4435 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4436 && GET_CODE (reg
) != PARALLEL
)
4438 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4439 if (overlapping
> 0)
4441 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4442 overlapping
/= UNITS_PER_WORD
;
4444 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4446 for (int i
= 0; i
< overlapping
; i
++)
4447 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4449 for (int i
= 0; i
< overlapping
; i
++)
4450 emit_move_insn (tmp_regs
[i
],
4451 operand_subword_force (target
, i
, mode
));
4453 else if (overlapping
== -1)
4455 /* Could not determine whether there is overlap.
4456 Fail the sibcall. */
4464 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4467 else if (partial
> 0)
4469 /* Scalar partly in registers. */
4471 int size
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
;
4474 /* # bytes of start of argument
4475 that we must make space for but need not store. */
4476 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4477 int args_offset
= INTVAL (args_so_far
);
4480 /* Push padding now if padding above and stack grows down,
4481 or if padding below and stack grows up.
4482 But if space already allocated, this has already been done. */
4483 if (extra
&& args_addr
== 0
4484 && where_pad
!= PAD_NONE
&& where_pad
!= stack_direction
)
4485 anti_adjust_stack (GEN_INT (extra
));
4487 /* If we make space by pushing it, we might as well push
4488 the real data. Otherwise, we can leave OFFSET nonzero
4489 and leave the space uninitialized. */
4493 /* Now NOT_STACK gets the number of words that we don't need to
4494 allocate on the stack. Convert OFFSET to words too. */
4495 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4496 offset
/= UNITS_PER_WORD
;
4498 /* If the partial register-part of the arg counts in its stack size,
4499 skip the part of stack space corresponding to the registers.
4500 Otherwise, start copying to the beginning of the stack space,
4501 by setting SKIP to 0. */
4502 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4504 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4505 x
= validize_mem (force_const_mem (mode
, x
));
4507 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4508 SUBREGs of such registers are not allowed. */
4509 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4510 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4511 x
= copy_to_reg (x
);
4513 /* Loop over all the words allocated on the stack for this arg. */
4514 /* We can do it by words, because any scalar bigger than a word
4515 has a size a multiple of a word. */
4516 for (i
= size
- 1; i
>= not_stack
; i
--)
4517 if (i
>= not_stack
+ offset
)
4518 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4519 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4521 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4523 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4531 /* Push padding now if padding above and stack grows down,
4532 or if padding below and stack grows up.
4533 But if space already allocated, this has already been done. */
4534 if (extra
&& args_addr
== 0
4535 && where_pad
!= PAD_NONE
&& where_pad
!= stack_direction
)
4536 anti_adjust_stack (GEN_INT (extra
));
4538 #ifdef PUSH_ROUNDING
4539 if (args_addr
== 0 && PUSH_ARGS
)
4540 emit_single_push_insn (mode
, x
, type
);
4544 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4545 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4547 /* We do *not* set_mem_attributes here, because incoming arguments
4548 may overlap with sibling call outgoing arguments and we cannot
4549 allow reordering of reads from function arguments with stores
4550 to outgoing arguments of sibling calls. We do, however, want
4551 to record the alignment of the stack slot. */
4552 /* ALIGN may well be better aligned than TYPE, e.g. due to
4553 PARM_BOUNDARY. Assume the caller isn't lying. */
4554 set_mem_align (dest
, align
);
4556 emit_move_insn (dest
, x
);
4560 /* Move the partial arguments into the registers and any overlapping
4561 values that we moved into the pseudos in tmp_regs. */
4562 if (partial
> 0 && reg
!= 0)
4564 /* Handle calls that pass values in multiple non-contiguous locations.
4565 The Irix 6 ABI has examples of this. */
4566 if (GET_CODE (reg
) == PARALLEL
)
4567 emit_group_load (reg
, x
, type
, -1);
4570 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4571 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4573 for (int i
= 0; i
< overlapping
; i
++)
4574 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4575 + nregs
- overlapping
+ i
),
4581 if (extra
&& args_addr
== 0 && where_pad
== stack_direction
)
4582 anti_adjust_stack (GEN_INT (extra
));
4584 if (alignment_pad
&& args_addr
== 0)
4585 anti_adjust_stack (alignment_pad
);
4590 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4594 get_subtarget (rtx x
)
4598 /* Only registers can be subtargets. */
4600 /* Don't use hard regs to avoid extending their life. */
4601 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4605 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4606 FIELD is a bitfield. Returns true if the optimization was successful,
4607 and there's nothing else to do. */
4610 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize
,
4611 unsigned HOST_WIDE_INT bitpos
,
4612 unsigned HOST_WIDE_INT bitregion_start
,
4613 unsigned HOST_WIDE_INT bitregion_end
,
4614 machine_mode mode1
, rtx str_rtx
,
4615 tree to
, tree src
, bool reverse
)
4617 machine_mode str_mode
= GET_MODE (str_rtx
);
4618 unsigned int str_bitsize
= GET_MODE_BITSIZE (str_mode
);
4623 enum tree_code code
;
4625 if (mode1
!= VOIDmode
4626 || bitsize
>= BITS_PER_WORD
4627 || str_bitsize
> BITS_PER_WORD
4628 || TREE_SIDE_EFFECTS (to
)
4629 || TREE_THIS_VOLATILE (to
))
4633 if (TREE_CODE (src
) != SSA_NAME
)
4635 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4638 srcstmt
= get_gimple_for_ssa_name (src
);
4640 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4643 code
= gimple_assign_rhs_code (srcstmt
);
4645 op0
= gimple_assign_rhs1 (srcstmt
);
4647 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4648 to find its initialization. Hopefully the initialization will
4649 be from a bitfield load. */
4650 if (TREE_CODE (op0
) == SSA_NAME
)
4652 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4654 /* We want to eventually have OP0 be the same as TO, which
4655 should be a bitfield. */
4657 || !is_gimple_assign (op0stmt
)
4658 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4660 op0
= gimple_assign_rhs1 (op0stmt
);
4663 op1
= gimple_assign_rhs2 (srcstmt
);
4665 if (!operand_equal_p (to
, op0
, 0))
4668 if (MEM_P (str_rtx
))
4670 unsigned HOST_WIDE_INT offset1
;
4672 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4673 str_bitsize
= BITS_PER_WORD
;
4675 scalar_int_mode best_mode
;
4676 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4677 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4679 str_mode
= best_mode
;
4680 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4683 bitpos
%= str_bitsize
;
4684 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4685 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4687 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4690 gcc_assert (!reverse
);
4692 /* If the bit field covers the whole REG/MEM, store_field
4693 will likely generate better code. */
4694 if (bitsize
>= str_bitsize
)
4697 /* We can't handle fields split across multiple entities. */
4698 if (bitpos
+ bitsize
> str_bitsize
)
4701 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4702 bitpos
= str_bitsize
- bitpos
- bitsize
;
4708 /* For now, just optimize the case of the topmost bitfield
4709 where we don't need to do any masking and also
4710 1 bit bitfields where xor can be used.
4711 We might win by one instruction for the other bitfields
4712 too if insv/extv instructions aren't used, so that
4713 can be added later. */
4714 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4715 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4718 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4719 value
= convert_modes (str_mode
,
4720 TYPE_MODE (TREE_TYPE (op1
)), value
,
4721 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4723 /* We may be accessing data outside the field, which means
4724 we can alias adjacent data. */
4725 if (MEM_P (str_rtx
))
4727 str_rtx
= shallow_copy_rtx (str_rtx
);
4728 set_mem_alias_set (str_rtx
, 0);
4729 set_mem_expr (str_rtx
, 0);
4732 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4734 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4738 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4740 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4742 value
= flip_storage_order (str_mode
, value
);
4743 result
= expand_binop (str_mode
, binop
, str_rtx
,
4744 value
, str_rtx
, 1, OPTAB_WIDEN
);
4745 if (result
!= str_rtx
)
4746 emit_move_insn (str_rtx
, result
);
4751 if (TREE_CODE (op1
) != INTEGER_CST
)
4753 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4754 value
= convert_modes (str_mode
,
4755 TYPE_MODE (TREE_TYPE (op1
)), value
,
4756 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4758 /* We may be accessing data outside the field, which means
4759 we can alias adjacent data. */
4760 if (MEM_P (str_rtx
))
4762 str_rtx
= shallow_copy_rtx (str_rtx
);
4763 set_mem_alias_set (str_rtx
, 0);
4764 set_mem_expr (str_rtx
, 0);
4767 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4768 if (bitpos
+ bitsize
!= str_bitsize
)
4770 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4772 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4774 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4776 value
= flip_storage_order (str_mode
, value
);
4777 result
= expand_binop (str_mode
, binop
, str_rtx
,
4778 value
, str_rtx
, 1, OPTAB_WIDEN
);
4779 if (result
!= str_rtx
)
4780 emit_move_insn (str_rtx
, result
);
4790 /* In the C++ memory model, consecutive bit fields in a structure are
4791 considered one memory location.
4793 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4794 returns the bit range of consecutive bits in which this COMPONENT_REF
4795 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4796 and *OFFSET may be adjusted in the process.
4798 If the access does not need to be restricted, 0 is returned in both
4799 *BITSTART and *BITEND. */
4802 get_bit_range (unsigned HOST_WIDE_INT
*bitstart
,
4803 unsigned HOST_WIDE_INT
*bitend
,
4805 HOST_WIDE_INT
*bitpos
,
4808 HOST_WIDE_INT bitoffset
;
4811 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4813 field
= TREE_OPERAND (exp
, 1);
4814 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4815 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4816 need to limit the range we can access. */
4819 *bitstart
= *bitend
= 0;
4823 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4824 part of a larger bit field, then the representative does not serve any
4825 useful purpose. This can occur in Ada. */
4826 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4829 HOST_WIDE_INT rbitsize
, rbitpos
;
4831 int unsignedp
, reversep
, volatilep
= 0;
4832 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4833 &roffset
, &rmode
, &unsignedp
, &reversep
,
4835 if ((rbitpos
% BITS_PER_UNIT
) != 0)
4837 *bitstart
= *bitend
= 0;
4842 /* Compute the adjustment to bitpos from the offset of the field
4843 relative to the representative. DECL_FIELD_OFFSET of field and
4844 repr are the same by construction if they are not constants,
4845 see finish_bitfield_layout. */
4846 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field
))
4847 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr
)))
4848 bitoffset
= (tree_to_uhwi (DECL_FIELD_OFFSET (field
))
4849 - tree_to_uhwi (DECL_FIELD_OFFSET (repr
))) * BITS_PER_UNIT
;
4852 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4853 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4855 /* If the adjustment is larger than bitpos, we would have a negative bit
4856 position for the lower bound and this may wreak havoc later. Adjust
4857 offset and bitpos to make the lower bound non-negative in that case. */
4858 if (bitoffset
> *bitpos
)
4860 HOST_WIDE_INT adjust
= bitoffset
- *bitpos
;
4861 gcc_assert ((adjust
% BITS_PER_UNIT
) == 0);
4864 if (*offset
== NULL_TREE
)
4865 *offset
= size_int (-adjust
/ BITS_PER_UNIT
);
4868 = size_binop (MINUS_EXPR
, *offset
, size_int (adjust
/ BITS_PER_UNIT
));
4872 *bitstart
= *bitpos
- bitoffset
;
4874 *bitend
= *bitstart
+ tree_to_uhwi (DECL_SIZE (repr
)) - 1;
4877 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4878 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4879 DECL_RTL was not set yet, return NORTL. */
4882 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4884 if (TREE_CODE (addr
) != ADDR_EXPR
)
4887 tree base
= TREE_OPERAND (addr
, 0);
4890 || TREE_ADDRESSABLE (base
)
4891 || DECL_MODE (base
) == BLKmode
)
4894 if (!DECL_RTL_SET_P (base
))
4897 return (!MEM_P (DECL_RTL (base
)));
4900 /* Returns true if the MEM_REF REF refers to an object that does not
4901 reside in memory and has non-BLKmode. */
4904 mem_ref_refers_to_non_mem_p (tree ref
)
4906 tree base
= TREE_OPERAND (ref
, 0);
4907 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4910 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4911 is true, try generating a nontemporal store. */
4914 expand_assignment (tree to
, tree from
, bool nontemporal
)
4920 enum insn_code icode
;
4922 /* Don't crash if the lhs of the assignment was erroneous. */
4923 if (TREE_CODE (to
) == ERROR_MARK
)
4925 expand_normal (from
);
4929 /* Optimize away no-op moves without side-effects. */
4930 if (operand_equal_p (to
, from
, 0))
4933 /* Handle misaligned stores. */
4934 mode
= TYPE_MODE (TREE_TYPE (to
));
4935 if ((TREE_CODE (to
) == MEM_REF
4936 || TREE_CODE (to
) == TARGET_MEM_REF
)
4938 && !mem_ref_refers_to_non_mem_p (to
)
4939 && ((align
= get_object_alignment (to
))
4940 < GET_MODE_ALIGNMENT (mode
))
4941 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4942 != CODE_FOR_nothing
)
4943 || targetm
.slow_unaligned_access (mode
, align
)))
4947 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4948 reg
= force_not_mem (reg
);
4949 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4950 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
4951 reg
= flip_storage_order (mode
, reg
);
4953 if (icode
!= CODE_FOR_nothing
)
4955 struct expand_operand ops
[2];
4957 create_fixed_operand (&ops
[0], mem
);
4958 create_input_operand (&ops
[1], reg
, mode
);
4959 /* The movmisalign<mode> pattern cannot fail, else the assignment
4960 would silently be omitted. */
4961 expand_insn (icode
, 2, ops
);
4964 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
4969 /* Assignment of a structure component needs special treatment
4970 if the structure component's rtx is not simply a MEM.
4971 Assignment of an array element at a constant index, and assignment of
4972 an array element in an unaligned packed structure field, has the same
4973 problem. Same for (partially) storing into a non-memory object. */
4974 if (handled_component_p (to
)
4975 || (TREE_CODE (to
) == MEM_REF
4976 && (REF_REVERSE_STORAGE_ORDER (to
)
4977 || mem_ref_refers_to_non_mem_p (to
)))
4978 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
4981 HOST_WIDE_INT bitsize
, bitpos
;
4982 unsigned HOST_WIDE_INT bitregion_start
= 0;
4983 unsigned HOST_WIDE_INT bitregion_end
= 0;
4985 int unsignedp
, reversep
, volatilep
= 0;
4989 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
4990 &unsignedp
, &reversep
, &volatilep
);
4992 /* Make sure bitpos is not negative, it can wreak havoc later. */
4995 gcc_assert (offset
== NULL_TREE
);
4996 offset
= size_int (bitpos
>> LOG2_BITS_PER_UNIT
);
4997 bitpos
&= BITS_PER_UNIT
- 1;
5000 if (TREE_CODE (to
) == COMPONENT_REF
5001 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5002 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5003 /* The C++ memory model naturally applies to byte-aligned fields.
5004 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5005 BITSIZE are not byte-aligned, there is no need to limit the range
5006 we can access. This can occur with packed structures in Ada. */
5007 else if (bitsize
> 0
5008 && bitsize
% BITS_PER_UNIT
== 0
5009 && bitpos
% BITS_PER_UNIT
== 0)
5011 bitregion_start
= bitpos
;
5012 bitregion_end
= bitpos
+ bitsize
- 1;
5015 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5017 /* If the field has a mode, we want to access it in the
5018 field's mode, not the computed mode.
5019 If a MEM has VOIDmode (external with incomplete type),
5020 use BLKmode for it instead. */
5023 if (mode1
!= VOIDmode
)
5024 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5025 else if (GET_MODE (to_rtx
) == VOIDmode
)
5026 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5031 machine_mode address_mode
;
5034 if (!MEM_P (to_rtx
))
5036 /* We can get constant negative offsets into arrays with broken
5037 user code. Translate this to a trap instead of ICEing. */
5038 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5039 expand_builtin_trap ();
5040 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5043 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5044 address_mode
= get_address_mode (to_rtx
);
5045 if (GET_MODE (offset_rtx
) != address_mode
)
5047 /* We cannot be sure that the RTL in offset_rtx is valid outside
5048 of a memory address context, so force it into a register
5049 before attempting to convert it to the desired mode. */
5050 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5051 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5054 /* If we have an expression in OFFSET_RTX and a non-zero
5055 byte offset in BITPOS, adding the byte offset before the
5056 OFFSET_RTX results in better intermediate code, which makes
5057 later rtl optimization passes perform better.
5059 We prefer intermediate code like this:
5061 r124:DI=r123:DI+0x18
5066 r124:DI=r123:DI+0x10
5067 [r124:DI+0x8]=r121:DI
5069 This is only done for aligned data values, as these can
5070 be expected to result in single move instructions. */
5071 if (mode1
!= VOIDmode
5074 && (bitpos
% bitsize
) == 0
5075 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
5076 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5078 to_rtx
= adjust_address (to_rtx
, mode1
, bitpos
/ BITS_PER_UNIT
);
5079 bitregion_start
= 0;
5080 if (bitregion_end
>= (unsigned HOST_WIDE_INT
) bitpos
)
5081 bitregion_end
-= bitpos
;
5085 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5086 highest_pow2_factor_for_target (to
,
5090 /* No action is needed if the target is not a memory and the field
5091 lies completely outside that target. This can occur if the source
5092 code contains an out-of-bounds access to a small array. */
5094 && GET_MODE (to_rtx
) != BLKmode
5095 && (unsigned HOST_WIDE_INT
) bitpos
5096 >= GET_MODE_PRECISION (GET_MODE (to_rtx
)))
5098 expand_normal (from
);
5101 /* Handle expand_expr of a complex value returning a CONCAT. */
5102 else if (GET_CODE (to_rtx
) == CONCAT
)
5104 unsigned short mode_bitsize
= GET_MODE_BITSIZE (GET_MODE (to_rtx
));
5105 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from
)))
5107 && bitsize
== mode_bitsize
)
5108 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5109 else if (bitsize
== mode_bitsize
/ 2
5110 && (bitpos
== 0 || bitpos
== mode_bitsize
/ 2))
5111 result
= store_expr (from
, XEXP (to_rtx
, bitpos
!= 0), false,
5112 nontemporal
, reversep
);
5113 else if (bitpos
+ bitsize
<= mode_bitsize
/ 2)
5114 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5115 bitregion_start
, bitregion_end
,
5116 mode1
, from
, get_alias_set (to
),
5117 nontemporal
, reversep
);
5118 else if (bitpos
>= mode_bitsize
/ 2)
5119 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5120 bitpos
- mode_bitsize
/ 2,
5121 bitregion_start
, bitregion_end
,
5122 mode1
, from
, get_alias_set (to
),
5123 nontemporal
, reversep
);
5124 else if (bitpos
== 0 && bitsize
== mode_bitsize
)
5127 result
= expand_normal (from
);
5128 from_rtx
= simplify_gen_subreg (GET_MODE (to_rtx
), result
,
5129 TYPE_MODE (TREE_TYPE (from
)), 0);
5130 emit_move_insn (XEXP (to_rtx
, 0),
5131 read_complex_part (from_rtx
, false));
5132 emit_move_insn (XEXP (to_rtx
, 1),
5133 read_complex_part (from_rtx
, true));
5137 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5138 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5139 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5140 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5141 result
= store_field (temp
, bitsize
, bitpos
,
5142 bitregion_start
, bitregion_end
,
5143 mode1
, from
, get_alias_set (to
),
5144 nontemporal
, reversep
);
5145 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5146 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5153 /* If the field is at offset zero, we could have been given the
5154 DECL_RTX of the parent struct. Don't munge it. */
5155 to_rtx
= shallow_copy_rtx (to_rtx
);
5156 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5158 MEM_VOLATILE_P (to_rtx
) = 1;
5161 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5162 bitregion_start
, bitregion_end
,
5163 mode1
, to_rtx
, to
, from
,
5167 result
= store_field (to_rtx
, bitsize
, bitpos
,
5168 bitregion_start
, bitregion_end
,
5169 mode1
, from
, get_alias_set (to
),
5170 nontemporal
, reversep
);
5174 preserve_temp_slots (result
);
5179 /* If the rhs is a function call and its value is not an aggregate,
5180 call the function before we start to compute the lhs.
5181 This is needed for correct code for cases such as
5182 val = setjmp (buf) on machines where reference to val
5183 requires loading up part of an address in a separate insn.
5185 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5186 since it might be a promoted variable where the zero- or sign- extension
5187 needs to be done. Handling this in the normal way is safe because no
5188 computation is done before the call. The same is true for SSA names. */
5189 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5190 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5191 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5193 || TREE_CODE (to
) == PARM_DECL
5194 || TREE_CODE (to
) == RESULT_DECL
)
5195 && REG_P (DECL_RTL (to
)))
5196 || TREE_CODE (to
) == SSA_NAME
))
5202 value
= expand_normal (from
);
5204 /* Split value and bounds to store them separately. */
5205 chkp_split_slot (value
, &value
, &bounds
);
5208 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5210 /* Handle calls that return values in multiple non-contiguous locations.
5211 The Irix 6 ABI has examples of this. */
5212 if (GET_CODE (to_rtx
) == PARALLEL
)
5214 if (GET_CODE (value
) == PARALLEL
)
5215 emit_group_move (to_rtx
, value
);
5217 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5218 int_size_in_bytes (TREE_TYPE (from
)));
5220 else if (GET_CODE (value
) == PARALLEL
)
5221 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5222 int_size_in_bytes (TREE_TYPE (from
)));
5223 else if (GET_MODE (to_rtx
) == BLKmode
)
5225 /* Handle calls that return BLKmode values in registers. */
5227 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5229 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5233 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5234 value
= convert_memory_address_addr_space
5235 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5236 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5238 emit_move_insn (to_rtx
, value
);
5241 /* Store bounds if required. */
5243 && (BOUNDED_P (to
) || chkp_type_has_pointer (TREE_TYPE (to
))))
5245 gcc_assert (MEM_P (to_rtx
));
5246 chkp_emit_bounds_store (bounds
, value
, to_rtx
);
5249 preserve_temp_slots (to_rtx
);
5254 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5255 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5257 /* Don't move directly into a return register. */
5258 if (TREE_CODE (to
) == RESULT_DECL
5259 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5265 /* If the source is itself a return value, it still is in a pseudo at
5266 this point so we can move it back to the return register directly. */
5268 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5269 && TREE_CODE (from
) != CALL_EXPR
)
5270 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5272 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5274 /* Handle calls that return values in multiple non-contiguous locations.
5275 The Irix 6 ABI has examples of this. */
5276 if (GET_CODE (to_rtx
) == PARALLEL
)
5278 if (GET_CODE (temp
) == PARALLEL
)
5279 emit_group_move (to_rtx
, temp
);
5281 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5282 int_size_in_bytes (TREE_TYPE (from
)));
5285 emit_move_insn (to_rtx
, temp
);
5287 preserve_temp_slots (to_rtx
);
5292 /* In case we are returning the contents of an object which overlaps
5293 the place the value is being stored, use a safe function when copying
5294 a value through a pointer into a structure value return block. */
5295 if (TREE_CODE (to
) == RESULT_DECL
5296 && TREE_CODE (from
) == INDIRECT_REF
5297 && ADDR_SPACE_GENERIC_P
5298 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5299 && refs_may_alias_p (to
, from
)
5300 && cfun
->returns_struct
5301 && !cfun
->returns_pcc_struct
)
5306 size
= expr_size (from
);
5307 from_rtx
= expand_normal (from
);
5309 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5311 preserve_temp_slots (to_rtx
);
5316 /* Compute FROM and store the value in the rtx we got. */
5319 result
= store_expr_with_bounds (from
, to_rtx
, 0, nontemporal
, false, to
);
5320 preserve_temp_slots (result
);
5325 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5326 succeeded, false otherwise. */
5329 emit_storent_insn (rtx to
, rtx from
)
5331 struct expand_operand ops
[2];
5332 machine_mode mode
= GET_MODE (to
);
5333 enum insn_code code
= optab_handler (storent_optab
, mode
);
5335 if (code
== CODE_FOR_nothing
)
5338 create_fixed_operand (&ops
[0], to
);
5339 create_input_operand (&ops
[1], from
, mode
);
5340 return maybe_expand_insn (code
, 2, ops
);
5343 /* Generate code for computing expression EXP,
5344 and storing the value into TARGET.
5346 If the mode is BLKmode then we may return TARGET itself.
5347 It turns out that in BLKmode it doesn't cause a problem.
5348 because C has no operators that could combine two different
5349 assignments into the same BLKmode object with different values
5350 with no sequence point. Will other languages need this to
5353 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5354 stack, and block moves may need to be treated specially.
5356 If NONTEMPORAL is true, try using a nontemporal store instruction.
5358 If REVERSE is true, the store is to be done in reverse order.
5360 If BTARGET is not NULL then computed bounds of EXP are
5361 associated with BTARGET. */
5364 store_expr_with_bounds (tree exp
, rtx target
, int call_param_p
,
5365 bool nontemporal
, bool reverse
, tree btarget
)
5368 rtx alt_rtl
= NULL_RTX
;
5369 location_t loc
= curr_insn_location ();
5371 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5373 /* C++ can generate ?: expressions with a throw expression in one
5374 branch and an rvalue in the other. Here, we resolve attempts to
5375 store the throw expression's nonexistent result. */
5376 gcc_assert (!call_param_p
);
5377 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5380 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5382 /* Perform first part of compound expression, then assign from second
5384 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5385 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5386 return store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
,
5387 call_param_p
, nontemporal
, reverse
,
5390 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5392 /* For conditional expression, get safe form of the target. Then
5393 test the condition, doing the appropriate assignment on either
5394 side. This avoids the creation of unnecessary temporaries.
5395 For non-BLKmode, it is more efficient not to do this. */
5397 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5399 do_pending_stack_adjust ();
5401 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5402 profile_probability::uninitialized ());
5403 store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5404 nontemporal
, reverse
, btarget
);
5405 emit_jump_insn (targetm
.gen_jump (lab2
));
5408 store_expr_with_bounds (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5409 nontemporal
, reverse
, btarget
);
5415 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5416 /* If this is a scalar in a register that is stored in a wider mode
5417 than the declared mode, compute the result into its declared mode
5418 and then convert to the wider mode. Our value is the computed
5421 rtx inner_target
= 0;
5422 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5423 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5425 /* We can do the conversion inside EXP, which will often result
5426 in some optimizations. Do the conversion in two steps: first
5427 change the signedness, if needed, then the extend. But don't
5428 do this if the type of EXP is a subtype of something else
5429 since then the conversion might involve more than just
5430 converting modes. */
5431 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5432 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5433 && GET_MODE_PRECISION (outer_mode
)
5434 == TYPE_PRECISION (TREE_TYPE (exp
)))
5436 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5437 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5439 /* Some types, e.g. Fortran's logical*4, won't have a signed
5440 version, so use the mode instead. */
5442 = (signed_or_unsigned_type_for
5443 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5445 ntype
= lang_hooks
.types
.type_for_mode
5446 (TYPE_MODE (TREE_TYPE (exp
)),
5447 SUBREG_PROMOTED_SIGN (target
));
5449 exp
= fold_convert_loc (loc
, ntype
, exp
);
5452 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5453 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5456 inner_target
= SUBREG_REG (target
);
5459 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5460 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5462 /* Handle bounds returned by call. */
5463 if (TREE_CODE (exp
) == CALL_EXPR
)
5466 chkp_split_slot (temp
, &temp
, &bounds
);
5467 if (bounds
&& btarget
)
5469 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5470 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5471 chkp_set_rtl_bounds (btarget
, tmp
);
5475 /* If TEMP is a VOIDmode constant, use convert_modes to make
5476 sure that we properly convert it. */
5477 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5479 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5480 temp
, SUBREG_PROMOTED_SIGN (target
));
5481 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5482 SUBREG_PROMOTED_SIGN (target
));
5485 convert_move (SUBREG_REG (target
), temp
,
5486 SUBREG_PROMOTED_SIGN (target
));
5490 else if ((TREE_CODE (exp
) == STRING_CST
5491 || (TREE_CODE (exp
) == MEM_REF
5492 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5493 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5495 && integer_zerop (TREE_OPERAND (exp
, 1))))
5496 && !nontemporal
&& !call_param_p
5499 /* Optimize initialization of an array with a STRING_CST. */
5500 HOST_WIDE_INT exp_len
, str_copy_len
;
5502 tree str
= TREE_CODE (exp
) == STRING_CST
5503 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5505 exp_len
= int_expr_size (exp
);
5509 if (TREE_STRING_LENGTH (str
) <= 0)
5512 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5513 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5516 str_copy_len
= TREE_STRING_LENGTH (str
);
5517 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5518 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5520 str_copy_len
+= STORE_MAX_PIECES
- 1;
5521 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5523 str_copy_len
= MIN (str_copy_len
, exp_len
);
5524 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5525 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5526 MEM_ALIGN (target
), false))
5531 dest_mem
= store_by_pieces (dest_mem
,
5532 str_copy_len
, builtin_strncpy_read_str
,
5534 TREE_STRING_POINTER (str
)),
5535 MEM_ALIGN (target
), false,
5536 exp_len
> str_copy_len
? 1 : 0);
5537 if (exp_len
> str_copy_len
)
5538 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5539 GEN_INT (exp_len
- str_copy_len
),
5548 /* If we want to use a nontemporal or a reverse order store, force the
5549 value into a register first. */
5550 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5551 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5553 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5556 /* Handle bounds returned by call. */
5557 if (TREE_CODE (exp
) == CALL_EXPR
)
5560 chkp_split_slot (temp
, &temp
, &bounds
);
5561 if (bounds
&& btarget
)
5563 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5564 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5565 chkp_set_rtl_bounds (btarget
, tmp
);
5570 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5571 the same as that of TARGET, adjust the constant. This is needed, for
5572 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5573 only a word-sized value. */
5574 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5575 && TREE_CODE (exp
) != ERROR_MARK
5576 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5577 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5578 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5580 /* If value was not generated in the target, store it there.
5581 Convert the value to TARGET's type first if necessary and emit the
5582 pending incrementations that have been queued when expanding EXP.
5583 Note that we cannot emit the whole queue blindly because this will
5584 effectively disable the POST_INC optimization later.
5586 If TEMP and TARGET compare equal according to rtx_equal_p, but
5587 one or both of them are volatile memory refs, we have to distinguish
5589 - expand_expr has used TARGET. In this case, we must not generate
5590 another copy. This can be detected by TARGET being equal according
5592 - expand_expr has not used TARGET - that means that the source just
5593 happens to have the same RTX form. Since temp will have been created
5594 by expand_expr, it will compare unequal according to == .
5595 We must generate a copy in this case, to reach the correct number
5596 of volatile memory references. */
5598 if ((! rtx_equal_p (temp
, target
)
5599 || (temp
!= target
&& (side_effects_p (temp
)
5600 || side_effects_p (target
))))
5601 && TREE_CODE (exp
) != ERROR_MARK
5602 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5603 but TARGET is not valid memory reference, TEMP will differ
5604 from TARGET although it is really the same location. */
5606 && rtx_equal_p (alt_rtl
, target
)
5607 && !side_effects_p (alt_rtl
)
5608 && !side_effects_p (target
))
5609 /* If there's nothing to copy, don't bother. Don't call
5610 expr_size unless necessary, because some front-ends (C++)
5611 expr_size-hook must not be given objects that are not
5612 supposed to be bit-copied or bit-initialized. */
5613 && expr_size (exp
) != const0_rtx
)
5615 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5617 if (GET_MODE (target
) == BLKmode
)
5619 /* Handle calls that return BLKmode values in registers. */
5620 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5621 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5623 store_bit_field (target
,
5624 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5625 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5628 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5631 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5633 /* Handle copying a string constant into an array. The string
5634 constant may be shorter than the array. So copy just the string's
5635 actual length, and clear the rest. First get the size of the data
5636 type of the string, which is actually the size of the target. */
5637 rtx size
= expr_size (exp
);
5639 if (CONST_INT_P (size
)
5640 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5641 emit_block_move (target
, temp
, size
,
5643 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5646 machine_mode pointer_mode
5647 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5648 machine_mode address_mode
= get_address_mode (target
);
5650 /* Compute the size of the data to copy from the string. */
5652 = size_binop_loc (loc
, MIN_EXPR
,
5653 make_tree (sizetype
, size
),
5654 size_int (TREE_STRING_LENGTH (exp
)));
5656 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5658 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5659 rtx_code_label
*label
= 0;
5661 /* Copy that much. */
5662 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5663 TYPE_UNSIGNED (sizetype
));
5664 emit_block_move (target
, temp
, copy_size_rtx
,
5666 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5668 /* Figure out how much is left in TARGET that we have to clear.
5669 Do all calculations in pointer_mode. */
5670 if (CONST_INT_P (copy_size_rtx
))
5672 size
= plus_constant (address_mode
, size
,
5673 -INTVAL (copy_size_rtx
));
5674 target
= adjust_address (target
, BLKmode
,
5675 INTVAL (copy_size_rtx
));
5679 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5680 copy_size_rtx
, NULL_RTX
, 0,
5683 if (GET_MODE (copy_size_rtx
) != address_mode
)
5684 copy_size_rtx
= convert_to_mode (address_mode
,
5686 TYPE_UNSIGNED (sizetype
));
5688 target
= offset_address (target
, copy_size_rtx
,
5689 highest_pow2_factor (copy_size
));
5690 label
= gen_label_rtx ();
5691 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5692 GET_MODE (size
), 0, label
);
5695 if (size
!= const0_rtx
)
5696 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5702 /* Handle calls that return values in multiple non-contiguous locations.
5703 The Irix 6 ABI has examples of this. */
5704 else if (GET_CODE (target
) == PARALLEL
)
5706 if (GET_CODE (temp
) == PARALLEL
)
5707 emit_group_move (target
, temp
);
5709 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5710 int_size_in_bytes (TREE_TYPE (exp
)));
5712 else if (GET_CODE (temp
) == PARALLEL
)
5713 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5714 int_size_in_bytes (TREE_TYPE (exp
)));
5715 else if (GET_MODE (temp
) == BLKmode
)
5716 emit_block_move (target
, temp
, expr_size (exp
),
5718 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5719 /* If we emit a nontemporal store, there is nothing else to do. */
5720 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5725 temp
= flip_storage_order (GET_MODE (target
), temp
);
5726 temp
= force_operand (temp
, target
);
5728 emit_move_insn (target
, temp
);
5735 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5737 store_expr (tree exp
, rtx target
, int call_param_p
, bool nontemporal
,
5740 return store_expr_with_bounds (exp
, target
, call_param_p
, nontemporal
,
5744 /* Return true if field F of structure TYPE is a flexible array. */
5747 flexible_array_member_p (const_tree f
, const_tree type
)
5752 return (DECL_CHAIN (f
) == NULL
5753 && TREE_CODE (tf
) == ARRAY_TYPE
5755 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5756 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5757 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5758 && int_size_in_bytes (type
) >= 0);
5761 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5762 must have in order for it to completely initialize a value of type TYPE.
5763 Return -1 if the number isn't known.
5765 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5767 static HOST_WIDE_INT
5768 count_type_elements (const_tree type
, bool for_ctor_p
)
5770 switch (TREE_CODE (type
))
5776 nelts
= array_type_nelts (type
);
5777 if (nelts
&& tree_fits_uhwi_p (nelts
))
5779 unsigned HOST_WIDE_INT n
;
5781 n
= tree_to_uhwi (nelts
) + 1;
5782 if (n
== 0 || for_ctor_p
)
5785 return n
* count_type_elements (TREE_TYPE (type
), false);
5787 return for_ctor_p
? -1 : 1;
5792 unsigned HOST_WIDE_INT n
;
5796 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5797 if (TREE_CODE (f
) == FIELD_DECL
)
5800 n
+= count_type_elements (TREE_TYPE (f
), false);
5801 else if (!flexible_array_member_p (f
, type
))
5802 /* Don't count flexible arrays, which are not supposed
5803 to be initialized. */
5811 case QUAL_UNION_TYPE
:
5816 gcc_assert (!for_ctor_p
);
5817 /* Estimate the number of scalars in each field and pick the
5818 maximum. Other estimates would do instead; the idea is simply
5819 to make sure that the estimate is not sensitive to the ordering
5822 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5823 if (TREE_CODE (f
) == FIELD_DECL
)
5825 m
= count_type_elements (TREE_TYPE (f
), false);
5826 /* If the field doesn't span the whole union, add an extra
5827 scalar for the rest. */
5828 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5829 TYPE_SIZE (type
)) != 1)
5841 return TYPE_VECTOR_SUBPARTS (type
);
5845 case FIXED_POINT_TYPE
:
5850 case REFERENCE_TYPE
:
5866 /* Helper for categorize_ctor_elements. Identical interface. */
5869 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5870 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5872 unsigned HOST_WIDE_INT idx
;
5873 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5874 tree value
, purpose
, elt_type
;
5876 /* Whether CTOR is a valid constant initializer, in accordance with what
5877 initializer_constant_valid_p does. If inferred from the constructor
5878 elements, true until proven otherwise. */
5879 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5880 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5885 elt_type
= NULL_TREE
;
5887 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5889 HOST_WIDE_INT mult
= 1;
5891 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5893 tree lo_index
= TREE_OPERAND (purpose
, 0);
5894 tree hi_index
= TREE_OPERAND (purpose
, 1);
5896 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5897 mult
= (tree_to_uhwi (hi_index
)
5898 - tree_to_uhwi (lo_index
) + 1);
5901 elt_type
= TREE_TYPE (value
);
5903 switch (TREE_CODE (value
))
5907 HOST_WIDE_INT nz
= 0, ic
= 0;
5909 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
5912 nz_elts
+= mult
* nz
;
5913 init_elts
+= mult
* ic
;
5915 if (const_from_elts_p
&& const_p
)
5916 const_p
= const_elt_p
;
5923 if (!initializer_zerop (value
))
5929 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
5930 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
5934 if (!initializer_zerop (TREE_REALPART (value
)))
5936 if (!initializer_zerop (TREE_IMAGPART (value
)))
5944 for (i
= 0; i
< VECTOR_CST_NELTS (value
); ++i
)
5946 tree v
= VECTOR_CST_ELT (value
, i
);
5947 if (!initializer_zerop (v
))
5956 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
5957 nz_elts
+= mult
* tc
;
5958 init_elts
+= mult
* tc
;
5960 if (const_from_elts_p
&& const_p
)
5962 = initializer_constant_valid_p (value
,
5964 TYPE_REVERSE_STORAGE_ORDER
5972 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
5973 num_fields
, elt_type
))
5974 *p_complete
= false;
5976 *p_nz_elts
+= nz_elts
;
5977 *p_init_elts
+= init_elts
;
5982 /* Examine CTOR to discover:
5983 * how many scalar fields are set to nonzero values,
5984 and place it in *P_NZ_ELTS;
5985 * how many scalar fields in total are in CTOR,
5986 and place it in *P_ELT_COUNT.
5987 * whether the constructor is complete -- in the sense that every
5988 meaningful byte is explicitly given a value --
5989 and place it in *P_COMPLETE.
5991 Return whether or not CTOR is a valid static constant initializer, the same
5992 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5995 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5996 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6002 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6005 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6006 of which had type LAST_TYPE. Each element was itself a complete
6007 initializer, in the sense that every meaningful byte was explicitly
6008 given a value. Return true if the same is true for the constructor
6012 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6013 const_tree last_type
)
6015 if (TREE_CODE (type
) == UNION_TYPE
6016 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6021 gcc_assert (num_elts
== 1 && last_type
);
6023 /* ??? We could look at each element of the union, and find the
6024 largest element. Which would avoid comparing the size of the
6025 initialized element against any tail padding in the union.
6026 Doesn't seem worth the effort... */
6027 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6030 return count_type_elements (type
, true) == num_elts
;
6033 /* Return 1 if EXP contains mostly (3/4) zeros. */
6036 mostly_zeros_p (const_tree exp
)
6038 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6040 HOST_WIDE_INT nz_elts
, init_elts
;
6043 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6044 return !complete_p
|| nz_elts
< init_elts
/ 4;
6047 return initializer_zerop (exp
);
6050 /* Return 1 if EXP contains all zeros. */
6053 all_zeros_p (const_tree exp
)
6055 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6057 HOST_WIDE_INT nz_elts
, init_elts
;
6060 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6061 return nz_elts
== 0;
6064 return initializer_zerop (exp
);
6067 /* Helper function for store_constructor.
6068 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6069 CLEARED is as for store_constructor.
6070 ALIAS_SET is the alias set to use for any stores.
6071 If REVERSE is true, the store is to be done in reverse order.
6073 This provides a recursive shortcut back to store_constructor when it isn't
6074 necessary to go through store_field. This is so that we can pass through
6075 the cleared field to let store_constructor know that we may not have to
6076 clear a substructure if the outer structure has already been cleared. */
6079 store_constructor_field (rtx target
, unsigned HOST_WIDE_INT bitsize
,
6080 HOST_WIDE_INT bitpos
,
6081 unsigned HOST_WIDE_INT bitregion_start
,
6082 unsigned HOST_WIDE_INT bitregion_end
,
6084 tree exp
, int cleared
,
6085 alias_set_type alias_set
, bool reverse
)
6087 if (TREE_CODE (exp
) == CONSTRUCTOR
6088 /* We can only call store_constructor recursively if the size and
6089 bit position are on a byte boundary. */
6090 && bitpos
% BITS_PER_UNIT
== 0
6091 && (bitsize
> 0 && bitsize
% BITS_PER_UNIT
== 0)
6092 /* If we have a nonzero bitpos for a register target, then we just
6093 let store_field do the bitfield handling. This is unlikely to
6094 generate unnecessary clear instructions anyways. */
6095 && (bitpos
== 0 || MEM_P (target
)))
6099 = adjust_address (target
,
6100 GET_MODE (target
) == BLKmode
6102 % GET_MODE_ALIGNMENT (GET_MODE (target
)))
6103 ? BLKmode
: VOIDmode
, bitpos
/ BITS_PER_UNIT
);
6106 /* Update the alias set, if required. */
6107 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6108 && MEM_ALIAS_SET (target
) != 0)
6110 target
= copy_rtx (target
);
6111 set_mem_alias_set (target
, alias_set
);
6114 store_constructor (exp
, target
, cleared
, bitsize
/ BITS_PER_UNIT
,
6118 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6119 exp
, alias_set
, false, reverse
);
6123 /* Returns the number of FIELD_DECLs in TYPE. */
6126 fields_length (const_tree type
)
6128 tree t
= TYPE_FIELDS (type
);
6131 for (; t
; t
= DECL_CHAIN (t
))
6132 if (TREE_CODE (t
) == FIELD_DECL
)
6139 /* Store the value of constructor EXP into the rtx TARGET.
6140 TARGET is either a REG or a MEM; we know it cannot conflict, since
6141 safe_from_p has been called.
6142 CLEARED is true if TARGET is known to have been zero'd.
6143 SIZE is the number of bytes of TARGET we are allowed to modify: this
6144 may not be the same as the size of EXP if we are assigning to a field
6145 which has been packed to exclude padding bits.
6146 If REVERSE is true, the store is to be done in reverse order. */
6149 store_constructor (tree exp
, rtx target
, int cleared
, HOST_WIDE_INT size
,
6152 tree type
= TREE_TYPE (exp
);
6153 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6154 HOST_WIDE_INT bitregion_end
= size
> 0 ? size
* BITS_PER_UNIT
- 1 : 0;
6156 switch (TREE_CODE (type
))
6160 case QUAL_UNION_TYPE
:
6162 unsigned HOST_WIDE_INT idx
;
6165 /* The storage order is specified for every aggregate type. */
6166 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6168 /* If size is zero or the target is already cleared, do nothing. */
6169 if (size
== 0 || cleared
)
6171 /* We either clear the aggregate or indicate the value is dead. */
6172 else if ((TREE_CODE (type
) == UNION_TYPE
6173 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6174 && ! CONSTRUCTOR_ELTS (exp
))
6175 /* If the constructor is empty, clear the union. */
6177 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6181 /* If we are building a static constructor into a register,
6182 set the initial value as zero so we can fold the value into
6183 a constant. But if more than one register is involved,
6184 this probably loses. */
6185 else if (REG_P (target
) && TREE_STATIC (exp
)
6186 && GET_MODE_SIZE (GET_MODE (target
)) <= UNITS_PER_WORD
)
6188 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6192 /* If the constructor has fewer fields than the structure or
6193 if we are initializing the structure to mostly zeros, clear
6194 the whole structure first. Don't do this if TARGET is a
6195 register whose mode size isn't equal to SIZE since
6196 clear_storage can't handle this case. */
6198 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6199 || mostly_zeros_p (exp
))
6201 || ((HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (target
))
6204 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6208 if (REG_P (target
) && !cleared
)
6209 emit_clobber (target
);
6211 /* Store each element of the constructor into the
6212 corresponding field of TARGET. */
6213 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6216 HOST_WIDE_INT bitsize
;
6217 HOST_WIDE_INT bitpos
= 0;
6219 rtx to_rtx
= target
;
6221 /* Just ignore missing fields. We cleared the whole
6222 structure, above, if any fields are missing. */
6226 if (cleared
&& initializer_zerop (value
))
6229 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6230 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6234 mode
= DECL_MODE (field
);
6235 if (DECL_BIT_FIELD (field
))
6238 offset
= DECL_FIELD_OFFSET (field
);
6239 if (tree_fits_shwi_p (offset
)
6240 && tree_fits_shwi_p (bit_position (field
)))
6242 bitpos
= int_bit_position (field
);
6248 /* If this initializes a field that is smaller than a
6249 word, at the start of a word, try to widen it to a full
6250 word. This special case allows us to output C++ member
6251 function initializations in a form that the optimizers
6253 if (WORD_REGISTER_OPERATIONS
6255 && bitsize
< BITS_PER_WORD
6256 && bitpos
% BITS_PER_WORD
== 0
6257 && GET_MODE_CLASS (mode
) == MODE_INT
6258 && TREE_CODE (value
) == INTEGER_CST
6260 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6262 tree type
= TREE_TYPE (value
);
6264 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6266 type
= lang_hooks
.types
.type_for_mode
6267 (word_mode
, TYPE_UNSIGNED (type
));
6268 value
= fold_convert (type
, value
);
6269 /* Make sure the bits beyond the original bitsize are zero
6270 so that we can correctly avoid extra zeroing stores in
6271 later constructor elements. */
6273 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6275 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6278 if (BYTES_BIG_ENDIAN
)
6280 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6281 build_int_cst (type
,
6282 BITS_PER_WORD
- bitsize
));
6283 bitsize
= BITS_PER_WORD
;
6287 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6288 && DECL_NONADDRESSABLE_P (field
))
6290 to_rtx
= copy_rtx (to_rtx
);
6291 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6294 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6295 0, bitregion_end
, mode
,
6297 get_alias_set (TREE_TYPE (field
)),
6305 unsigned HOST_WIDE_INT i
;
6308 tree elttype
= TREE_TYPE (type
);
6310 HOST_WIDE_INT minelt
= 0;
6311 HOST_WIDE_INT maxelt
= 0;
6313 /* The storage order is specified for every aggregate type. */
6314 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6316 domain
= TYPE_DOMAIN (type
);
6317 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6318 && TYPE_MAX_VALUE (domain
)
6319 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6320 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6322 /* If we have constant bounds for the range of the type, get them. */
6325 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6326 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6329 /* If the constructor has fewer elements than the array, clear
6330 the whole array first. Similarly if this is static
6331 constructor of a non-BLKmode object. */
6334 else if (REG_P (target
) && TREE_STATIC (exp
))
6338 unsigned HOST_WIDE_INT idx
;
6340 HOST_WIDE_INT count
= 0, zero_count
= 0;
6341 need_to_clear
= ! const_bounds_p
;
6343 /* This loop is a more accurate version of the loop in
6344 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6345 is also needed to check for missing elements. */
6346 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6348 HOST_WIDE_INT this_node_count
;
6353 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6355 tree lo_index
= TREE_OPERAND (index
, 0);
6356 tree hi_index
= TREE_OPERAND (index
, 1);
6358 if (! tree_fits_uhwi_p (lo_index
)
6359 || ! tree_fits_uhwi_p (hi_index
))
6365 this_node_count
= (tree_to_uhwi (hi_index
)
6366 - tree_to_uhwi (lo_index
) + 1);
6369 this_node_count
= 1;
6371 count
+= this_node_count
;
6372 if (mostly_zeros_p (value
))
6373 zero_count
+= this_node_count
;
6376 /* Clear the entire array first if there are any missing
6377 elements, or if the incidence of zero elements is >=
6380 && (count
< maxelt
- minelt
+ 1
6381 || 4 * zero_count
>= 3 * count
))
6385 if (need_to_clear
&& size
> 0)
6388 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6390 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6394 if (!cleared
&& REG_P (target
))
6395 /* Inform later passes that the old value is dead. */
6396 emit_clobber (target
);
6398 /* Store each element of the constructor into the
6399 corresponding element of TARGET, determined by counting the
6401 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6404 HOST_WIDE_INT bitsize
;
6405 HOST_WIDE_INT bitpos
;
6406 rtx xtarget
= target
;
6408 if (cleared
&& initializer_zerop (value
))
6411 mode
= TYPE_MODE (elttype
);
6412 if (mode
== BLKmode
)
6413 bitsize
= (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6414 ? tree_to_uhwi (TYPE_SIZE (elttype
))
6417 bitsize
= GET_MODE_BITSIZE (mode
);
6419 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6421 tree lo_index
= TREE_OPERAND (index
, 0);
6422 tree hi_index
= TREE_OPERAND (index
, 1);
6423 rtx index_r
, pos_rtx
;
6424 HOST_WIDE_INT lo
, hi
, count
;
6427 /* If the range is constant and "small", unroll the loop. */
6429 && tree_fits_shwi_p (lo_index
)
6430 && tree_fits_shwi_p (hi_index
)
6431 && (lo
= tree_to_shwi (lo_index
),
6432 hi
= tree_to_shwi (hi_index
),
6433 count
= hi
- lo
+ 1,
6436 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6437 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6440 lo
-= minelt
; hi
-= minelt
;
6441 for (; lo
<= hi
; lo
++)
6443 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6446 && !MEM_KEEP_ALIAS_SET_P (target
)
6447 && TREE_CODE (type
) == ARRAY_TYPE
6448 && TYPE_NONALIASED_COMPONENT (type
))
6450 target
= copy_rtx (target
);
6451 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6454 store_constructor_field
6455 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6456 mode
, value
, cleared
,
6457 get_alias_set (elttype
), reverse
);
6462 rtx_code_label
*loop_start
= gen_label_rtx ();
6463 rtx_code_label
*loop_end
= gen_label_rtx ();
6466 expand_normal (hi_index
);
6468 index
= build_decl (EXPR_LOCATION (exp
),
6469 VAR_DECL
, NULL_TREE
, domain
);
6470 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6471 SET_DECL_RTL (index
, index_r
);
6472 store_expr (lo_index
, index_r
, 0, false, reverse
);
6474 /* Build the head of the loop. */
6475 do_pending_stack_adjust ();
6476 emit_label (loop_start
);
6478 /* Assign value to element index. */
6480 fold_convert (ssizetype
,
6481 fold_build2 (MINUS_EXPR
,
6484 TYPE_MIN_VALUE (domain
)));
6487 size_binop (MULT_EXPR
, position
,
6488 fold_convert (ssizetype
,
6489 TYPE_SIZE_UNIT (elttype
)));
6491 pos_rtx
= expand_normal (position
);
6492 xtarget
= offset_address (target
, pos_rtx
,
6493 highest_pow2_factor (position
));
6494 xtarget
= adjust_address (xtarget
, mode
, 0);
6495 if (TREE_CODE (value
) == CONSTRUCTOR
)
6496 store_constructor (value
, xtarget
, cleared
,
6497 bitsize
/ BITS_PER_UNIT
, reverse
);
6499 store_expr (value
, xtarget
, 0, false, reverse
);
6501 /* Generate a conditional jump to exit the loop. */
6502 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6504 jumpif (exit_cond
, loop_end
,
6505 profile_probability::uninitialized ());
6507 /* Update the loop counter, and jump to the head of
6509 expand_assignment (index
,
6510 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6511 index
, integer_one_node
),
6514 emit_jump (loop_start
);
6516 /* Build the end of the loop. */
6517 emit_label (loop_end
);
6520 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6521 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6526 index
= ssize_int (1);
6529 index
= fold_convert (ssizetype
,
6530 fold_build2 (MINUS_EXPR
,
6533 TYPE_MIN_VALUE (domain
)));
6536 size_binop (MULT_EXPR
, index
,
6537 fold_convert (ssizetype
,
6538 TYPE_SIZE_UNIT (elttype
)));
6539 xtarget
= offset_address (target
,
6540 expand_normal (position
),
6541 highest_pow2_factor (position
));
6542 xtarget
= adjust_address (xtarget
, mode
, 0);
6543 store_expr (value
, xtarget
, 0, false, reverse
);
6548 bitpos
= ((tree_to_shwi (index
) - minelt
)
6549 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6551 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6553 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6554 && TREE_CODE (type
) == ARRAY_TYPE
6555 && TYPE_NONALIASED_COMPONENT (type
))
6557 target
= copy_rtx (target
);
6558 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6560 store_constructor_field (target
, bitsize
, bitpos
, 0,
6561 bitregion_end
, mode
, value
,
6562 cleared
, get_alias_set (elttype
),
6571 unsigned HOST_WIDE_INT idx
;
6572 constructor_elt
*ce
;
6575 int icode
= CODE_FOR_nothing
;
6576 tree elttype
= TREE_TYPE (type
);
6577 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6578 machine_mode eltmode
= TYPE_MODE (elttype
);
6579 HOST_WIDE_INT bitsize
;
6580 HOST_WIDE_INT bitpos
;
6581 rtvec vector
= NULL
;
6583 alias_set_type alias
;
6584 bool vec_vec_init_p
= false;
6586 gcc_assert (eltmode
!= BLKmode
);
6588 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6589 if (REG_P (target
) && VECTOR_MODE_P (GET_MODE (target
)))
6591 machine_mode mode
= GET_MODE (target
);
6592 machine_mode emode
= eltmode
;
6594 if (CONSTRUCTOR_NELTS (exp
)
6595 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6598 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6599 gcc_assert (CONSTRUCTOR_NELTS (exp
) * TYPE_VECTOR_SUBPARTS (etype
)
6601 emode
= TYPE_MODE (etype
);
6603 icode
= (int) convert_optab_handler (vec_init_optab
, mode
, emode
);
6604 if (icode
!= CODE_FOR_nothing
)
6606 unsigned int i
, n
= n_elts
;
6608 if (emode
!= eltmode
)
6610 n
= CONSTRUCTOR_NELTS (exp
);
6611 vec_vec_init_p
= true;
6613 vector
= rtvec_alloc (n
);
6614 for (i
= 0; i
< n
; i
++)
6615 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6619 /* If the constructor has fewer elements than the vector,
6620 clear the whole array first. Similarly if this is static
6621 constructor of a non-BLKmode object. */
6624 else if (REG_P (target
) && TREE_STATIC (exp
))
6628 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6631 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6633 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6635 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6636 TYPE_SIZE (elttype
)));
6638 count
+= n_elts_here
;
6639 if (mostly_zeros_p (value
))
6640 zero_count
+= n_elts_here
;
6643 /* Clear the entire vector first if there are any missing elements,
6644 or if the incidence of zero elements is >= 75%. */
6645 need_to_clear
= (count
< n_elts
|| 4 * zero_count
>= 3 * count
);
6648 if (need_to_clear
&& size
> 0 && !vector
)
6651 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6653 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6657 /* Inform later passes that the old value is dead. */
6658 if (!cleared
&& !vector
&& REG_P (target
))
6659 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6662 alias
= MEM_ALIAS_SET (target
);
6664 alias
= get_alias_set (elttype
);
6666 /* Store each element of the constructor into the corresponding
6667 element of TARGET, determined by counting the elements. */
6668 for (idx
= 0, i
= 0;
6669 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6670 idx
++, i
+= bitsize
/ elt_size
)
6672 HOST_WIDE_INT eltpos
;
6673 tree value
= ce
->value
;
6675 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6676 if (cleared
&& initializer_zerop (value
))
6680 eltpos
= tree_to_uhwi (ce
->index
);
6688 gcc_assert (ce
->index
== NULL_TREE
);
6689 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6693 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6694 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6698 machine_mode value_mode
6699 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6700 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6701 bitpos
= eltpos
* elt_size
;
6702 store_constructor_field (target
, bitsize
, bitpos
, 0,
6703 bitregion_end
, value_mode
,
6704 value
, cleared
, alias
, reverse
);
6709 emit_insn (GEN_FCN (icode
) (target
,
6710 gen_rtx_PARALLEL (GET_MODE (target
),
6720 /* Store the value of EXP (an expression tree)
6721 into a subfield of TARGET which has mode MODE and occupies
6722 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6723 If MODE is VOIDmode, it means that we are storing into a bit-field.
6725 BITREGION_START is bitpos of the first bitfield in this region.
6726 BITREGION_END is the bitpos of the ending bitfield in this region.
6727 These two fields are 0, if the C++ memory model does not apply,
6728 or we are not interested in keeping track of bitfield regions.
6730 Always return const0_rtx unless we have something particular to
6733 ALIAS_SET is the alias set for the destination. This value will
6734 (in general) be different from that for TARGET, since TARGET is a
6735 reference to the containing structure.
6737 If NONTEMPORAL is true, try generating a nontemporal store.
6739 If REVERSE is true, the store is to be done in reverse order. */
6742 store_field (rtx target
, HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitpos
,
6743 unsigned HOST_WIDE_INT bitregion_start
,
6744 unsigned HOST_WIDE_INT bitregion_end
,
6745 machine_mode mode
, tree exp
,
6746 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6748 if (TREE_CODE (exp
) == ERROR_MARK
)
6751 /* If we have nothing to store, do nothing unless the expression has
6754 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6756 if (GET_CODE (target
) == CONCAT
)
6758 /* We're storing into a struct containing a single __complex. */
6760 gcc_assert (!bitpos
);
6761 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6764 /* If the structure is in a register or if the component
6765 is a bit field, we cannot use addressing to access it.
6766 Use bit-field techniques or SUBREG to store in it. */
6768 if (mode
== VOIDmode
6769 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6770 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6771 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6773 || GET_CODE (target
) == SUBREG
6774 /* If the field isn't aligned enough to store as an ordinary memref,
6775 store it as a bit field. */
6777 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6778 || bitpos
% GET_MODE_ALIGNMENT (mode
))
6779 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6780 || (bitpos
% BITS_PER_UNIT
!= 0)))
6781 || (bitsize
>= 0 && mode
!= BLKmode
6782 && GET_MODE_BITSIZE (mode
) > bitsize
)
6783 /* If the RHS and field are a constant size and the size of the
6784 RHS isn't the same size as the bitfield, we must use bitfield
6787 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
6788 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)), bitsize
) != 0
6789 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6790 we will handle specially below. */
6791 && !(TREE_CODE (exp
) == CONSTRUCTOR
6792 && bitsize
% BITS_PER_UNIT
== 0)
6793 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6794 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6795 includes some extra padding. store_expr / expand_expr will in
6796 that case call get_inner_reference that will have the bitsize
6797 we check here and thus the block move will not clobber the
6798 padding that shouldn't be clobbered. In the future we could
6799 replace the TREE_ADDRESSABLE check with a check that
6800 get_base_address needs to live in memory. */
6801 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6802 || TREE_CODE (exp
) != COMPONENT_REF
6803 || TREE_CODE (DECL_SIZE (TREE_OPERAND (exp
, 1))) != INTEGER_CST
6804 || (bitsize
% BITS_PER_UNIT
!= 0)
6805 || (bitpos
% BITS_PER_UNIT
!= 0)
6806 || (compare_tree_int (DECL_SIZE (TREE_OPERAND (exp
, 1)), bitsize
)
6808 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6809 decl we must use bitfield operations. */
6811 && TREE_CODE (exp
) == MEM_REF
6812 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6813 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6814 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6815 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6820 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6821 implies a mask operation. If the precision is the same size as
6822 the field we're storing into, that mask is redundant. This is
6823 particularly common with bit field assignments generated by the
6825 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6828 tree type
= TREE_TYPE (exp
);
6829 if (INTEGRAL_TYPE_P (type
)
6830 && TYPE_PRECISION (type
) < GET_MODE_BITSIZE (TYPE_MODE (type
))
6831 && bitsize
== TYPE_PRECISION (type
))
6833 tree op
= gimple_assign_rhs1 (nop_def
);
6834 type
= TREE_TYPE (op
);
6835 if (INTEGRAL_TYPE_P (type
) && TYPE_PRECISION (type
) >= bitsize
)
6840 temp
= expand_normal (exp
);
6842 /* Handle calls that return values in multiple non-contiguous locations.
6843 The Irix 6 ABI has examples of this. */
6844 if (GET_CODE (temp
) == PARALLEL
)
6846 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6847 scalar_int_mode temp_mode
6848 = smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6849 rtx temp_target
= gen_reg_rtx (temp_mode
);
6850 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6854 /* Handle calls that return BLKmode values in registers. */
6855 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6857 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6858 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6862 /* If the value has aggregate type and an integral mode then, if BITSIZE
6863 is narrower than this mode and this is for big-endian data, we first
6864 need to put the value into the low-order bits for store_bit_field,
6865 except when MODE is BLKmode and BITSIZE larger than the word size
6866 (see the handling of fields larger than a word in store_bit_field).
6867 Moreover, the field may be not aligned on a byte boundary; in this
6868 case, if it has reverse storage order, it needs to be accessed as a
6869 scalar field with reverse storage order and we must first put the
6870 value into target order. */
6871 scalar_int_mode temp_mode
;
6872 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
6873 && is_int_mode (GET_MODE (temp
), &temp_mode
))
6875 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
6877 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
6880 temp
= flip_storage_order (temp_mode
, temp
);
6883 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
6884 && !(mode
== BLKmode
&& bitsize
> BITS_PER_WORD
))
6885 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
6886 size
- bitsize
, NULL_RTX
, 1);
6889 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6890 if (mode
!= VOIDmode
&& mode
!= BLKmode
6891 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
6892 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
6894 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
6895 and BITPOS must be aligned on a byte boundary. If so, we simply do
6896 a block copy. Likewise for a BLKmode-like TARGET. */
6897 if (GET_MODE (temp
) == BLKmode
6898 && (GET_MODE (target
) == BLKmode
6900 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
6901 && (bitpos
% BITS_PER_UNIT
) == 0
6902 && (bitsize
% BITS_PER_UNIT
) == 0)))
6904 gcc_assert (MEM_P (target
) && MEM_P (temp
)
6905 && (bitpos
% BITS_PER_UNIT
) == 0);
6907 target
= adjust_address (target
, VOIDmode
, bitpos
/ BITS_PER_UNIT
);
6908 emit_block_move (target
, temp
,
6909 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
6916 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
6917 word size, we need to load the value (see again store_bit_field). */
6918 if (GET_MODE (temp
) == BLKmode
&& bitsize
<= BITS_PER_WORD
)
6920 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
6921 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
6922 temp_mode
, false, NULL
);
6925 /* Store the value in the bitfield. */
6926 store_bit_field (target
, bitsize
, bitpos
,
6927 bitregion_start
, bitregion_end
,
6928 mode
, temp
, reverse
);
6934 /* Now build a reference to just the desired component. */
6935 rtx to_rtx
= adjust_address (target
, mode
, bitpos
/ BITS_PER_UNIT
);
6937 if (to_rtx
== target
)
6938 to_rtx
= copy_rtx (to_rtx
);
6940 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
6941 set_mem_alias_set (to_rtx
, alias_set
);
6943 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
6944 into a target smaller than its type; handle that case now. */
6945 if (TREE_CODE (exp
) == CONSTRUCTOR
&& bitsize
>= 0)
6947 gcc_assert (bitsize
% BITS_PER_UNIT
== 0);
6948 store_constructor (exp
, to_rtx
, 0, bitsize
/ BITS_PER_UNIT
, reverse
);
6952 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
6956 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6957 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6958 codes and find the ultimate containing object, which we return.
6960 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6961 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
6962 storage order of the field.
6963 If the position of the field is variable, we store a tree
6964 giving the variable offset (in units) in *POFFSET.
6965 This offset is in addition to the bit position.
6966 If the position is not variable, we store 0 in *POFFSET.
6968 If any of the extraction expressions is volatile,
6969 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6971 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6972 Otherwise, it is a mode that can be used to access the field.
6974 If the field describes a variable-sized object, *PMODE is set to
6975 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6976 this case, but the address of the object can be found. */
6979 get_inner_reference (tree exp
, HOST_WIDE_INT
*pbitsize
,
6980 HOST_WIDE_INT
*pbitpos
, tree
*poffset
,
6981 machine_mode
*pmode
, int *punsignedp
,
6982 int *preversep
, int *pvolatilep
)
6985 machine_mode mode
= VOIDmode
;
6986 bool blkmode_bitfield
= false;
6987 tree offset
= size_zero_node
;
6988 offset_int bit_offset
= 0;
6990 /* First get the mode, signedness, storage order and size. We do this from
6991 just the outermost expression. */
6993 if (TREE_CODE (exp
) == COMPONENT_REF
)
6995 tree field
= TREE_OPERAND (exp
, 1);
6996 size_tree
= DECL_SIZE (field
);
6997 if (flag_strict_volatile_bitfields
> 0
6998 && TREE_THIS_VOLATILE (exp
)
6999 && DECL_BIT_FIELD_TYPE (field
)
7000 && DECL_MODE (field
) != BLKmode
)
7001 /* Volatile bitfields should be accessed in the mode of the
7002 field's type, not the mode computed based on the bit
7004 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7005 else if (!DECL_BIT_FIELD (field
))
7006 mode
= DECL_MODE (field
);
7007 else if (DECL_MODE (field
) == BLKmode
)
7008 blkmode_bitfield
= true;
7010 *punsignedp
= DECL_UNSIGNED (field
);
7012 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7014 size_tree
= TREE_OPERAND (exp
, 1);
7015 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7016 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7018 /* For vector types, with the correct size of access, use the mode of
7020 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7021 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7022 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7023 mode
= TYPE_MODE (TREE_TYPE (exp
));
7027 mode
= TYPE_MODE (TREE_TYPE (exp
));
7028 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7030 if (mode
== BLKmode
)
7031 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7033 *pbitsize
= GET_MODE_BITSIZE (mode
);
7038 if (! tree_fits_uhwi_p (size_tree
))
7039 mode
= BLKmode
, *pbitsize
= -1;
7041 *pbitsize
= tree_to_uhwi (size_tree
);
7044 *preversep
= reverse_storage_order_for_component_p (exp
);
7046 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7047 and find the ultimate containing object. */
7050 switch (TREE_CODE (exp
))
7053 bit_offset
+= wi::to_offset (TREE_OPERAND (exp
, 2));
7058 tree field
= TREE_OPERAND (exp
, 1);
7059 tree this_offset
= component_ref_field_offset (exp
);
7061 /* If this field hasn't been filled in yet, don't go past it.
7062 This should only happen when folding expressions made during
7063 type construction. */
7064 if (this_offset
== 0)
7067 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7068 bit_offset
+= wi::to_offset (DECL_FIELD_BIT_OFFSET (field
));
7070 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7075 case ARRAY_RANGE_REF
:
7077 tree index
= TREE_OPERAND (exp
, 1);
7078 tree low_bound
= array_ref_low_bound (exp
);
7079 tree unit_size
= array_ref_element_size (exp
);
7081 /* We assume all arrays have sizes that are a multiple of a byte.
7082 First subtract the lower bound, if any, in the type of the
7083 index, then convert to sizetype and multiply by the size of
7084 the array element. */
7085 if (! integer_zerop (low_bound
))
7086 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7089 offset
= size_binop (PLUS_EXPR
, offset
,
7090 size_binop (MULT_EXPR
,
7091 fold_convert (sizetype
, index
),
7100 bit_offset
+= *pbitsize
;
7103 case VIEW_CONVERT_EXPR
:
7107 /* Hand back the decl for MEM[&decl, off]. */
7108 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7110 tree off
= TREE_OPERAND (exp
, 1);
7111 if (!integer_zerop (off
))
7113 offset_int boff
, coff
= mem_ref_offset (exp
);
7114 boff
= coff
<< LOG2_BITS_PER_UNIT
;
7117 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7125 /* If any reference in the chain is volatile, the effect is volatile. */
7126 if (TREE_THIS_VOLATILE (exp
))
7129 exp
= TREE_OPERAND (exp
, 0);
7133 /* If OFFSET is constant, see if we can return the whole thing as a
7134 constant bit position. Make sure to handle overflow during
7136 if (TREE_CODE (offset
) == INTEGER_CST
)
7138 offset_int tem
= wi::sext (wi::to_offset (offset
),
7139 TYPE_PRECISION (sizetype
));
7140 tem
<<= LOG2_BITS_PER_UNIT
;
7142 if (wi::fits_shwi_p (tem
))
7144 *pbitpos
= tem
.to_shwi ();
7145 *poffset
= offset
= NULL_TREE
;
7149 /* Otherwise, split it up. */
7152 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7153 if (wi::neg_p (bit_offset
) || !wi::fits_shwi_p (bit_offset
))
7155 offset_int mask
= wi::mask
<offset_int
> (LOG2_BITS_PER_UNIT
, false);
7156 offset_int tem
= wi::bit_and_not (bit_offset
, mask
);
7157 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
7158 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
7160 tem
>>= LOG2_BITS_PER_UNIT
;
7161 offset
= size_binop (PLUS_EXPR
, offset
,
7162 wide_int_to_tree (sizetype
, tem
));
7165 *pbitpos
= bit_offset
.to_shwi ();
7169 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7170 if (mode
== VOIDmode
7172 && (*pbitpos
% BITS_PER_UNIT
) == 0
7173 && (*pbitsize
% BITS_PER_UNIT
) == 0)
7181 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7183 static unsigned HOST_WIDE_INT
7184 target_align (const_tree target
)
7186 /* We might have a chain of nested references with intermediate misaligning
7187 bitfields components, so need to recurse to find out. */
7189 unsigned HOST_WIDE_INT this_align
, outer_align
;
7191 switch (TREE_CODE (target
))
7197 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7198 outer_align
= target_align (TREE_OPERAND (target
, 0));
7199 return MIN (this_align
, outer_align
);
7202 case ARRAY_RANGE_REF
:
7203 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7204 outer_align
= target_align (TREE_OPERAND (target
, 0));
7205 return MIN (this_align
, outer_align
);
7208 case NON_LVALUE_EXPR
:
7209 case VIEW_CONVERT_EXPR
:
7210 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7211 outer_align
= target_align (TREE_OPERAND (target
, 0));
7212 return MAX (this_align
, outer_align
);
7215 return TYPE_ALIGN (TREE_TYPE (target
));
7220 /* Given an rtx VALUE that may contain additions and multiplications, return
7221 an equivalent value that just refers to a register, memory, or constant.
7222 This is done by generating instructions to perform the arithmetic and
7223 returning a pseudo-register containing the value.
7225 The returned value may be a REG, SUBREG, MEM or constant. */
7228 force_operand (rtx value
, rtx target
)
7231 /* Use subtarget as the target for operand 0 of a binary operation. */
7232 rtx subtarget
= get_subtarget (target
);
7233 enum rtx_code code
= GET_CODE (value
);
7235 /* Check for subreg applied to an expression produced by loop optimizer. */
7237 && !REG_P (SUBREG_REG (value
))
7238 && !MEM_P (SUBREG_REG (value
)))
7241 = simplify_gen_subreg (GET_MODE (value
),
7242 force_reg (GET_MODE (SUBREG_REG (value
)),
7243 force_operand (SUBREG_REG (value
),
7245 GET_MODE (SUBREG_REG (value
)),
7246 SUBREG_BYTE (value
));
7247 code
= GET_CODE (value
);
7250 /* Check for a PIC address load. */
7251 if ((code
== PLUS
|| code
== MINUS
)
7252 && XEXP (value
, 0) == pic_offset_table_rtx
7253 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7254 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7255 || GET_CODE (XEXP (value
, 1)) == CONST
))
7258 subtarget
= gen_reg_rtx (GET_MODE (value
));
7259 emit_move_insn (subtarget
, value
);
7263 if (ARITHMETIC_P (value
))
7265 op2
= XEXP (value
, 1);
7266 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7268 if (code
== MINUS
&& CONST_INT_P (op2
))
7271 op2
= negate_rtx (GET_MODE (value
), op2
);
7274 /* Check for an addition with OP2 a constant integer and our first
7275 operand a PLUS of a virtual register and something else. In that
7276 case, we want to emit the sum of the virtual register and the
7277 constant first and then add the other value. This allows virtual
7278 register instantiation to simply modify the constant rather than
7279 creating another one around this addition. */
7280 if (code
== PLUS
&& CONST_INT_P (op2
)
7281 && GET_CODE (XEXP (value
, 0)) == PLUS
7282 && REG_P (XEXP (XEXP (value
, 0), 0))
7283 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7284 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7286 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7287 XEXP (XEXP (value
, 0), 0), op2
,
7288 subtarget
, 0, OPTAB_LIB_WIDEN
);
7289 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7290 force_operand (XEXP (XEXP (value
,
7292 target
, 0, OPTAB_LIB_WIDEN
);
7295 op1
= force_operand (XEXP (value
, 0), subtarget
);
7296 op2
= force_operand (op2
, NULL_RTX
);
7300 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7302 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7303 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7304 target
, 1, OPTAB_LIB_WIDEN
);
7306 return expand_divmod (0,
7307 FLOAT_MODE_P (GET_MODE (value
))
7308 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7309 GET_MODE (value
), op1
, op2
, target
, 0);
7311 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7314 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7317 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7320 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7321 target
, 0, OPTAB_LIB_WIDEN
);
7323 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7324 target
, 1, OPTAB_LIB_WIDEN
);
7327 if (UNARY_P (value
))
7330 target
= gen_reg_rtx (GET_MODE (value
));
7331 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7338 case FLOAT_TRUNCATE
:
7339 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7344 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7348 case UNSIGNED_FLOAT
:
7349 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7353 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7357 #ifdef INSN_SCHEDULING
7358 /* On machines that have insn scheduling, we want all memory reference to be
7359 explicit, so we need to deal with such paradoxical SUBREGs. */
7360 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7362 = simplify_gen_subreg (GET_MODE (value
),
7363 force_reg (GET_MODE (SUBREG_REG (value
)),
7364 force_operand (SUBREG_REG (value
),
7366 GET_MODE (SUBREG_REG (value
)),
7367 SUBREG_BYTE (value
));
7373 /* Subroutine of expand_expr: return nonzero iff there is no way that
7374 EXP can reference X, which is being modified. TOP_P is nonzero if this
7375 call is going to be used to determine whether we need a temporary
7376 for EXP, as opposed to a recursive call to this function.
7378 It is always safe for this routine to return zero since it merely
7379 searches for optimization opportunities. */
7382 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7388 /* If EXP has varying size, we MUST use a target since we currently
7389 have no way of allocating temporaries of variable size
7390 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7391 So we assume here that something at a higher level has prevented a
7392 clash. This is somewhat bogus, but the best we can do. Only
7393 do this when X is BLKmode and when we are at the top level. */
7394 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7395 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7396 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7397 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7398 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7400 && GET_MODE (x
) == BLKmode
)
7401 /* If X is in the outgoing argument area, it is always safe. */
7403 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7404 || (GET_CODE (XEXP (x
, 0)) == PLUS
7405 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7408 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7409 find the underlying pseudo. */
7410 if (GET_CODE (x
) == SUBREG
)
7413 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7417 /* Now look at our tree code and possibly recurse. */
7418 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7420 case tcc_declaration
:
7421 exp_rtl
= DECL_RTL_IF_SET (exp
);
7427 case tcc_exceptional
:
7428 if (TREE_CODE (exp
) == TREE_LIST
)
7432 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7434 exp
= TREE_CHAIN (exp
);
7437 if (TREE_CODE (exp
) != TREE_LIST
)
7438 return safe_from_p (x
, exp
, 0);
7441 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7443 constructor_elt
*ce
;
7444 unsigned HOST_WIDE_INT idx
;
7446 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7447 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7448 || !safe_from_p (x
, ce
->value
, 0))
7452 else if (TREE_CODE (exp
) == ERROR_MARK
)
7453 return 1; /* An already-visited SAVE_EXPR? */
7458 /* The only case we look at here is the DECL_INITIAL inside a
7460 return (TREE_CODE (exp
) != DECL_EXPR
7461 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7462 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7463 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7466 case tcc_comparison
:
7467 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7472 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7474 case tcc_expression
:
7477 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7478 the expression. If it is set, we conflict iff we are that rtx or
7479 both are in memory. Otherwise, we check all operands of the
7480 expression recursively. */
7482 switch (TREE_CODE (exp
))
7485 /* If the operand is static or we are static, we can't conflict.
7486 Likewise if we don't conflict with the operand at all. */
7487 if (staticp (TREE_OPERAND (exp
, 0))
7488 || TREE_STATIC (exp
)
7489 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7492 /* Otherwise, the only way this can conflict is if we are taking
7493 the address of a DECL a that address if part of X, which is
7495 exp
= TREE_OPERAND (exp
, 0);
7498 if (!DECL_RTL_SET_P (exp
)
7499 || !MEM_P (DECL_RTL (exp
)))
7502 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7508 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7509 get_alias_set (exp
)))
7514 /* Assume that the call will clobber all hard registers and
7516 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7521 case WITH_CLEANUP_EXPR
:
7522 case CLEANUP_POINT_EXPR
:
7523 /* Lowered by gimplify.c. */
7527 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7533 /* If we have an rtx, we do not need to scan our operands. */
7537 nops
= TREE_OPERAND_LENGTH (exp
);
7538 for (i
= 0; i
< nops
; i
++)
7539 if (TREE_OPERAND (exp
, i
) != 0
7540 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7546 /* Should never get a type here. */
7550 /* If we have an rtl, find any enclosed object. Then see if we conflict
7554 if (GET_CODE (exp_rtl
) == SUBREG
)
7556 exp_rtl
= SUBREG_REG (exp_rtl
);
7558 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7562 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7563 are memory and they conflict. */
7564 return ! (rtx_equal_p (x
, exp_rtl
)
7565 || (MEM_P (x
) && MEM_P (exp_rtl
)
7566 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7569 /* If we reach here, it is safe. */
7574 /* Return the highest power of two that EXP is known to be a multiple of.
7575 This is used in updating alignment of MEMs in array references. */
7577 unsigned HOST_WIDE_INT
7578 highest_pow2_factor (const_tree exp
)
7580 unsigned HOST_WIDE_INT ret
;
7581 int trailing_zeros
= tree_ctz (exp
);
7582 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7583 return BIGGEST_ALIGNMENT
;
7584 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7585 if (ret
> BIGGEST_ALIGNMENT
)
7586 return BIGGEST_ALIGNMENT
;
7590 /* Similar, except that the alignment requirements of TARGET are
7591 taken into account. Assume it is at least as aligned as its
7592 type, unless it is a COMPONENT_REF in which case the layout of
7593 the structure gives the alignment. */
7595 static unsigned HOST_WIDE_INT
7596 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7598 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7599 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7601 return MAX (factor
, talign
);
7604 /* Convert the tree comparison code TCODE to the rtl one where the
7605 signedness is UNSIGNEDP. */
7607 static enum rtx_code
7608 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7620 code
= unsignedp
? LTU
: LT
;
7623 code
= unsignedp
? LEU
: LE
;
7626 code
= unsignedp
? GTU
: GT
;
7629 code
= unsignedp
? GEU
: GE
;
7631 case UNORDERED_EXPR
:
7662 /* Subroutine of expand_expr. Expand the two operands of a binary
7663 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7664 The value may be stored in TARGET if TARGET is nonzero. The
7665 MODIFIER argument is as documented by expand_expr. */
7668 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7669 enum expand_modifier modifier
)
7671 if (! safe_from_p (target
, exp1
, 1))
7673 if (operand_equal_p (exp0
, exp1
, 0))
7675 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7676 *op1
= copy_rtx (*op0
);
7680 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7681 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7686 /* Return a MEM that contains constant EXP. DEFER is as for
7687 output_constant_def and MODIFIER is as for expand_expr. */
7690 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7694 mem
= output_constant_def (exp
, defer
);
7695 if (modifier
!= EXPAND_INITIALIZER
)
7696 mem
= use_anchored_address (mem
);
7700 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7701 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7704 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7705 enum expand_modifier modifier
, addr_space_t as
)
7707 rtx result
, subtarget
;
7709 HOST_WIDE_INT bitsize
, bitpos
;
7710 int unsignedp
, reversep
, volatilep
= 0;
7713 /* If we are taking the address of a constant and are at the top level,
7714 we have to use output_constant_def since we can't call force_const_mem
7716 /* ??? This should be considered a front-end bug. We should not be
7717 generating ADDR_EXPR of something that isn't an LVALUE. The only
7718 exception here is STRING_CST. */
7719 if (CONSTANT_CLASS_P (exp
))
7721 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7722 if (modifier
< EXPAND_SUM
)
7723 result
= force_operand (result
, target
);
7727 /* Everything must be something allowed by is_gimple_addressable. */
7728 switch (TREE_CODE (exp
))
7731 /* This case will happen via recursion for &a->b. */
7732 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7736 tree tem
= TREE_OPERAND (exp
, 0);
7737 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7738 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7739 return expand_expr (tem
, target
, tmode
, modifier
);
7743 /* Expand the initializer like constants above. */
7744 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7746 if (modifier
< EXPAND_SUM
)
7747 result
= force_operand (result
, target
);
7751 /* The real part of the complex number is always first, therefore
7752 the address is the same as the address of the parent object. */
7755 inner
= TREE_OPERAND (exp
, 0);
7759 /* The imaginary part of the complex number is always second.
7760 The expression is therefore always offset by the size of the
7763 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7764 inner
= TREE_OPERAND (exp
, 0);
7767 case COMPOUND_LITERAL_EXPR
:
7768 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7769 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7770 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7771 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7772 the initializers aren't gimplified. */
7773 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7774 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7775 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7776 target
, tmode
, modifier
, as
);
7779 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7780 expand_expr, as that can have various side effects; LABEL_DECLs for
7781 example, may not have their DECL_RTL set yet. Expand the rtl of
7782 CONSTRUCTORs too, which should yield a memory reference for the
7783 constructor's contents. Assume language specific tree nodes can
7784 be expanded in some interesting way. */
7785 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7787 || TREE_CODE (exp
) == CONSTRUCTOR
7788 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7790 result
= expand_expr (exp
, target
, tmode
,
7791 modifier
== EXPAND_INITIALIZER
7792 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7794 /* If the DECL isn't in memory, then the DECL wasn't properly
7795 marked TREE_ADDRESSABLE, which will be either a front-end
7796 or a tree optimizer bug. */
7798 gcc_assert (MEM_P (result
));
7799 result
= XEXP (result
, 0);
7801 /* ??? Is this needed anymore? */
7803 TREE_USED (exp
) = 1;
7805 if (modifier
!= EXPAND_INITIALIZER
7806 && modifier
!= EXPAND_CONST_ADDRESS
7807 && modifier
!= EXPAND_SUM
)
7808 result
= force_operand (result
, target
);
7812 /* Pass FALSE as the last argument to get_inner_reference although
7813 we are expanding to RTL. The rationale is that we know how to
7814 handle "aligning nodes" here: we can just bypass them because
7815 they won't change the final object whose address will be returned
7816 (they actually exist only for that purpose). */
7817 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7818 &unsignedp
, &reversep
, &volatilep
);
7822 /* We must have made progress. */
7823 gcc_assert (inner
!= exp
);
7825 subtarget
= offset
|| bitpos
? NULL_RTX
: target
;
7826 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7827 inner alignment, force the inner to be sufficiently aligned. */
7828 if (CONSTANT_CLASS_P (inner
)
7829 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7831 inner
= copy_node (inner
);
7832 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7833 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7834 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7836 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7842 if (modifier
!= EXPAND_NORMAL
)
7843 result
= force_operand (result
, NULL
);
7844 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7845 modifier
== EXPAND_INITIALIZER
7846 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7848 /* expand_expr is allowed to return an object in a mode other
7849 than TMODE. If it did, we need to convert. */
7850 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
7851 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
7852 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
7853 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7854 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7856 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7857 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7860 subtarget
= bitpos
? NULL_RTX
: target
;
7861 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7862 1, OPTAB_LIB_WIDEN
);
7868 /* Someone beforehand should have rejected taking the address
7869 of such an object. */
7870 gcc_assert ((bitpos
% BITS_PER_UNIT
) == 0);
7872 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7873 result
= plus_constant (tmode
, result
, bitpos
/ BITS_PER_UNIT
);
7874 if (modifier
< EXPAND_SUM
)
7875 result
= force_operand (result
, target
);
7881 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7882 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7885 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
7886 enum expand_modifier modifier
)
7888 addr_space_t as
= ADDR_SPACE_GENERIC
;
7889 scalar_int_mode address_mode
= Pmode
;
7890 scalar_int_mode pointer_mode
= ptr_mode
;
7894 /* Target mode of VOIDmode says "whatever's natural". */
7895 if (tmode
== VOIDmode
)
7896 tmode
= TYPE_MODE (TREE_TYPE (exp
));
7898 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
7900 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
7901 address_mode
= targetm
.addr_space
.address_mode (as
);
7902 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
7905 /* We can get called with some Weird Things if the user does silliness
7906 like "(short) &a". In that case, convert_memory_address won't do
7907 the right thing, so ignore the given target mode. */
7908 scalar_int_mode new_tmode
= (tmode
== pointer_mode
7912 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
7913 new_tmode
, modifier
, as
);
7915 /* Despite expand_expr claims concerning ignoring TMODE when not
7916 strictly convenient, stuff breaks if we don't honor it. Note
7917 that combined with the above, we only do this for pointer modes. */
7918 rmode
= GET_MODE (result
);
7919 if (rmode
== VOIDmode
)
7921 if (rmode
!= new_tmode
)
7922 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
7927 /* Generate code for computing CONSTRUCTOR EXP.
7928 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7929 is TRUE, instead of creating a temporary variable in memory
7930 NULL is returned and the caller needs to handle it differently. */
7933 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
7934 bool avoid_temp_mem
)
7936 tree type
= TREE_TYPE (exp
);
7937 machine_mode mode
= TYPE_MODE (type
);
7939 /* Try to avoid creating a temporary at all. This is possible
7940 if all of the initializer is zero.
7941 FIXME: try to handle all [0..255] initializers we can handle
7943 if (TREE_STATIC (exp
)
7944 && !TREE_ADDRESSABLE (exp
)
7945 && target
!= 0 && mode
== BLKmode
7946 && all_zeros_p (exp
))
7948 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
7952 /* All elts simple constants => refer to a constant in memory. But
7953 if this is a non-BLKmode mode, let it store a field at a time
7954 since that should make a CONST_INT, CONST_WIDE_INT or
7955 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7956 use, it is best to store directly into the target unless the type
7957 is large enough that memcpy will be used. If we are making an
7958 initializer and all operands are constant, put it in memory as
7961 FIXME: Avoid trying to fill vector constructors piece-meal.
7962 Output them with output_constant_def below unless we're sure
7963 they're zeros. This should go away when vector initializers
7964 are treated like VECTOR_CST instead of arrays. */
7965 if ((TREE_STATIC (exp
)
7966 && ((mode
== BLKmode
7967 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
7968 || TREE_ADDRESSABLE (exp
)
7969 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
7970 && (! can_move_by_pieces
7971 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
7973 && ! mostly_zeros_p (exp
))))
7974 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
7975 && TREE_CONSTANT (exp
)))
7982 constructor
= expand_expr_constant (exp
, 1, modifier
);
7984 if (modifier
!= EXPAND_CONST_ADDRESS
7985 && modifier
!= EXPAND_INITIALIZER
7986 && modifier
!= EXPAND_SUM
)
7987 constructor
= validize_mem (constructor
);
7992 /* Handle calls that pass values in multiple non-contiguous
7993 locations. The Irix 6 ABI has examples of this. */
7994 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
7995 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8000 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8003 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8008 /* expand_expr: generate code for computing expression EXP.
8009 An rtx for the computed value is returned. The value is never null.
8010 In the case of a void EXP, const0_rtx is returned.
8012 The value may be stored in TARGET if TARGET is nonzero.
8013 TARGET is just a suggestion; callers must assume that
8014 the rtx returned may not be the same as TARGET.
8016 If TARGET is CONST0_RTX, it means that the value will be ignored.
8018 If TMODE is not VOIDmode, it suggests generating the
8019 result in mode TMODE. But this is done only when convenient.
8020 Otherwise, TMODE is ignored and the value generated in its natural mode.
8021 TMODE is just a suggestion; callers must assume that
8022 the rtx returned may not have mode TMODE.
8024 Note that TARGET may have neither TMODE nor MODE. In that case, it
8025 probably will not be used.
8027 If MODIFIER is EXPAND_SUM then when EXP is an addition
8028 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8029 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8030 products as above, or REG or MEM, or constant.
8031 Ordinarily in such cases we would output mul or add instructions
8032 and then return a pseudo reg containing the sum.
8034 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8035 it also marks a label as absolutely required (it can't be dead).
8036 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8037 This is used for outputting expressions used in initializers.
8039 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8040 with a constant address even if that address is not normally legitimate.
8041 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8043 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8044 a call parameter. Such targets require special care as we haven't yet
8045 marked TARGET so that it's safe from being trashed by libcalls. We
8046 don't want to use TARGET for anything but the final result;
8047 Intermediate values must go elsewhere. Additionally, calls to
8048 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8050 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8051 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8052 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8053 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8056 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8057 In this case, we don't adjust a returned MEM rtx that wouldn't be
8058 sufficiently aligned for its mode; instead, it's up to the caller
8059 to deal with it afterwards. This is used to make sure that unaligned
8060 base objects for which out-of-bounds accesses are supported, for
8061 example record types with trailing arrays, aren't realigned behind
8062 the back of the caller.
8063 The normal operating mode is to pass FALSE for this parameter. */
8066 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8067 enum expand_modifier modifier
, rtx
*alt_rtl
,
8068 bool inner_reference_p
)
8072 /* Handle ERROR_MARK before anybody tries to access its type. */
8073 if (TREE_CODE (exp
) == ERROR_MARK
8074 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8076 ret
= CONST0_RTX (tmode
);
8077 return ret
? ret
: const0_rtx
;
8080 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8085 /* Try to expand the conditional expression which is represented by
8086 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8087 return the rtl reg which represents the result. Otherwise return
8091 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8092 tree treeop1 ATTRIBUTE_UNUSED
,
8093 tree treeop2 ATTRIBUTE_UNUSED
)
8096 rtx op00
, op01
, op1
, op2
;
8097 enum rtx_code comparison_code
;
8098 machine_mode comparison_mode
;
8101 tree type
= TREE_TYPE (treeop1
);
8102 int unsignedp
= TYPE_UNSIGNED (type
);
8103 machine_mode mode
= TYPE_MODE (type
);
8104 machine_mode orig_mode
= mode
;
8105 static bool expanding_cond_expr_using_cmove
= false;
8107 /* Conditional move expansion can end up TERing two operands which,
8108 when recursively hitting conditional expressions can result in
8109 exponential behavior if the cmove expansion ultimatively fails.
8110 It's hardly profitable to TER a cmove into a cmove so avoid doing
8111 that by failing early if we end up recursing. */
8112 if (expanding_cond_expr_using_cmove
)
8115 /* If we cannot do a conditional move on the mode, try doing it
8116 with the promoted mode. */
8117 if (!can_conditionally_move_p (mode
))
8119 mode
= promote_mode (type
, mode
, &unsignedp
);
8120 if (!can_conditionally_move_p (mode
))
8122 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8125 temp
= assign_temp (type
, 0, 1);
8127 expanding_cond_expr_using_cmove
= true;
8129 expand_operands (treeop1
, treeop2
,
8130 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8132 if (TREE_CODE (treeop0
) == SSA_NAME
8133 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8135 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8136 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8137 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8138 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8139 comparison_mode
= TYPE_MODE (type
);
8140 unsignedp
= TYPE_UNSIGNED (type
);
8141 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8143 else if (COMPARISON_CLASS_P (treeop0
))
8145 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8146 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8147 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8148 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8149 unsignedp
= TYPE_UNSIGNED (type
);
8150 comparison_mode
= TYPE_MODE (type
);
8151 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8155 op00
= expand_normal (treeop0
);
8157 comparison_code
= NE
;
8158 comparison_mode
= GET_MODE (op00
);
8159 if (comparison_mode
== VOIDmode
)
8160 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8162 expanding_cond_expr_using_cmove
= false;
8164 if (GET_MODE (op1
) != mode
)
8165 op1
= gen_lowpart (mode
, op1
);
8167 if (GET_MODE (op2
) != mode
)
8168 op2
= gen_lowpart (mode
, op2
);
8170 /* Try to emit the conditional move. */
8171 insn
= emit_conditional_move (temp
, comparison_code
,
8172 op00
, op01
, comparison_mode
,
8176 /* If we could do the conditional move, emit the sequence,
8180 rtx_insn
*seq
= get_insns ();
8183 return convert_modes (orig_mode
, mode
, temp
, 0);
8186 /* Otherwise discard the sequence and fall back to code with
8193 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8194 enum expand_modifier modifier
)
8196 rtx op0
, op1
, op2
, temp
;
8197 rtx_code_label
*lab
;
8201 scalar_int_mode int_mode
;
8202 enum tree_code code
= ops
->code
;
8204 rtx subtarget
, original_target
;
8206 bool reduce_bit_field
;
8207 location_t loc
= ops
->location
;
8208 tree treeop0
, treeop1
, treeop2
;
8209 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8210 ? reduce_to_bit_field_precision ((expr), \
8216 mode
= TYPE_MODE (type
);
8217 unsignedp
= TYPE_UNSIGNED (type
);
8223 /* We should be called only on simple (binary or unary) expressions,
8224 exactly those that are valid in gimple expressions that aren't
8225 GIMPLE_SINGLE_RHS (or invalid). */
8226 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8227 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8228 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8230 ignore
= (target
== const0_rtx
8231 || ((CONVERT_EXPR_CODE_P (code
)
8232 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8233 && TREE_CODE (type
) == VOID_TYPE
));
8235 /* We should be called only if we need the result. */
8236 gcc_assert (!ignore
);
8238 /* An operation in what may be a bit-field type needs the
8239 result to be reduced to the precision of the bit-field type,
8240 which is narrower than that of the type's mode. */
8241 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8242 && !type_has_mode_precision_p (type
));
8244 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8247 /* Use subtarget as the target for operand 0 of a binary operation. */
8248 subtarget
= get_subtarget (target
);
8249 original_target
= target
;
8253 case NON_LVALUE_EXPR
:
8256 if (treeop0
== error_mark_node
)
8259 if (TREE_CODE (type
) == UNION_TYPE
)
8261 tree valtype
= TREE_TYPE (treeop0
);
8263 /* If both input and output are BLKmode, this conversion isn't doing
8264 anything except possibly changing memory attribute. */
8265 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8267 rtx result
= expand_expr (treeop0
, target
, tmode
,
8270 result
= copy_rtx (result
);
8271 set_mem_attributes (result
, type
, 0);
8277 if (TYPE_MODE (type
) != BLKmode
)
8278 target
= gen_reg_rtx (TYPE_MODE (type
));
8280 target
= assign_temp (type
, 1, 1);
8284 /* Store data into beginning of memory target. */
8285 store_expr (treeop0
,
8286 adjust_address (target
, TYPE_MODE (valtype
), 0),
8287 modifier
== EXPAND_STACK_PARM
,
8288 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8292 gcc_assert (REG_P (target
)
8293 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8295 /* Store this field into a union of the proper type. */
8296 store_field (target
,
8297 MIN ((int_size_in_bytes (TREE_TYPE
8300 (HOST_WIDE_INT
) GET_MODE_BITSIZE (mode
)),
8301 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8305 /* Return the entire union. */
8309 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8311 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8314 /* If the signedness of the conversion differs and OP0 is
8315 a promoted SUBREG, clear that indication since we now
8316 have to do the proper extension. */
8317 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8318 && GET_CODE (op0
) == SUBREG
)
8319 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8321 return REDUCE_BIT_FIELD (op0
);
8324 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8325 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8326 if (GET_MODE (op0
) == mode
)
8329 /* If OP0 is a constant, just convert it into the proper mode. */
8330 else if (CONSTANT_P (op0
))
8332 tree inner_type
= TREE_TYPE (treeop0
);
8333 machine_mode inner_mode
= GET_MODE (op0
);
8335 if (inner_mode
== VOIDmode
)
8336 inner_mode
= TYPE_MODE (inner_type
);
8338 if (modifier
== EXPAND_INITIALIZER
)
8339 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8341 op0
= convert_modes (mode
, inner_mode
, op0
,
8342 TYPE_UNSIGNED (inner_type
));
8345 else if (modifier
== EXPAND_INITIALIZER
)
8346 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8347 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8349 else if (target
== 0)
8350 op0
= convert_to_mode (mode
, op0
,
8351 TYPE_UNSIGNED (TREE_TYPE
8355 convert_move (target
, op0
,
8356 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8360 return REDUCE_BIT_FIELD (op0
);
8362 case ADDR_SPACE_CONVERT_EXPR
:
8364 tree treeop0_type
= TREE_TYPE (treeop0
);
8366 gcc_assert (POINTER_TYPE_P (type
));
8367 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8369 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8370 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8372 /* Conversions between pointers to the same address space should
8373 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8374 gcc_assert (as_to
!= as_from
);
8376 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8378 /* Ask target code to handle conversion between pointers
8379 to overlapping address spaces. */
8380 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8381 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8383 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8387 /* For disjoint address spaces, converting anything but a null
8388 pointer invokes undefined behavior. We truncate or extend the
8389 value as if we'd converted via integers, which handles 0 as
8390 required, and all others as the programmer likely expects. */
8391 #ifndef POINTERS_EXTEND_UNSIGNED
8392 const int POINTERS_EXTEND_UNSIGNED
= 1;
8394 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8395 op0
, POINTERS_EXTEND_UNSIGNED
);
8401 case POINTER_PLUS_EXPR
:
8402 /* Even though the sizetype mode and the pointer's mode can be different
8403 expand is able to handle this correctly and get the correct result out
8404 of the PLUS_EXPR code. */
8405 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8406 if sizetype precision is smaller than pointer precision. */
8407 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8408 treeop1
= fold_convert_loc (loc
, type
,
8409 fold_convert_loc (loc
, ssizetype
,
8411 /* If sizetype precision is larger than pointer precision, truncate the
8412 offset to have matching modes. */
8413 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8414 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8418 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8419 something else, make sure we add the register to the constant and
8420 then to the other thing. This case can occur during strength
8421 reduction and doing it this way will produce better code if the
8422 frame pointer or argument pointer is eliminated.
8424 fold-const.c will ensure that the constant is always in the inner
8425 PLUS_EXPR, so the only case we need to do anything about is if
8426 sp, ap, or fp is our second argument, in which case we must swap
8427 the innermost first argument and our second argument. */
8429 if (TREE_CODE (treeop0
) == PLUS_EXPR
8430 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8432 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8433 || DECL_RTL (treeop1
) == stack_pointer_rtx
8434 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8439 /* If the result is to be ptr_mode and we are adding an integer to
8440 something, we might be forming a constant. So try to use
8441 plus_constant. If it produces a sum and we can't accept it,
8442 use force_operand. This allows P = &ARR[const] to generate
8443 efficient code on machines where a SYMBOL_REF is not a valid
8446 If this is an EXPAND_SUM call, always return the sum. */
8447 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8448 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8450 if (modifier
== EXPAND_STACK_PARM
)
8452 if (TREE_CODE (treeop0
) == INTEGER_CST
8453 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
8454 && TREE_CONSTANT (treeop1
))
8458 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8460 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8462 /* Use wi::shwi to ensure that the constant is
8463 truncated according to the mode of OP1, then sign extended
8464 to a HOST_WIDE_INT. Using the constant directly can result
8465 in non-canonical RTL in a 64x32 cross compile. */
8466 wc
= TREE_INT_CST_LOW (treeop0
);
8468 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8469 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8470 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8471 op1
= force_operand (op1
, target
);
8472 return REDUCE_BIT_FIELD (op1
);
8475 else if (TREE_CODE (treeop1
) == INTEGER_CST
8476 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
8477 && TREE_CONSTANT (treeop0
))
8481 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8483 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8484 (modifier
== EXPAND_INITIALIZER
8485 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8486 if (! CONSTANT_P (op0
))
8488 op1
= expand_expr (treeop1
, NULL_RTX
,
8489 VOIDmode
, modifier
);
8490 /* Return a PLUS if modifier says it's OK. */
8491 if (modifier
== EXPAND_SUM
8492 || modifier
== EXPAND_INITIALIZER
)
8493 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8496 /* Use wi::shwi to ensure that the constant is
8497 truncated according to the mode of OP1, then sign extended
8498 to a HOST_WIDE_INT. Using the constant directly can result
8499 in non-canonical RTL in a 64x32 cross compile. */
8500 wc
= TREE_INT_CST_LOW (treeop1
);
8502 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8503 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8504 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8505 op0
= force_operand (op0
, target
);
8506 return REDUCE_BIT_FIELD (op0
);
8510 /* Use TER to expand pointer addition of a negated value
8511 as pointer subtraction. */
8512 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8513 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8514 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8515 && TREE_CODE (treeop1
) == SSA_NAME
8516 && TYPE_MODE (TREE_TYPE (treeop0
))
8517 == TYPE_MODE (TREE_TYPE (treeop1
)))
8519 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8522 treeop1
= gimple_assign_rhs1 (def
);
8528 /* No sense saving up arithmetic to be done
8529 if it's all in the wrong mode to form part of an address.
8530 And force_operand won't know whether to sign-extend or
8532 if (modifier
!= EXPAND_INITIALIZER
8533 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8535 expand_operands (treeop0
, treeop1
,
8536 subtarget
, &op0
, &op1
, modifier
);
8537 if (op0
== const0_rtx
)
8539 if (op1
== const0_rtx
)
8544 expand_operands (treeop0
, treeop1
,
8545 subtarget
, &op0
, &op1
, modifier
);
8546 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8550 /* For initializers, we are allowed to return a MINUS of two
8551 symbolic constants. Here we handle all cases when both operands
8553 /* Handle difference of two symbolic constants,
8554 for the sake of an initializer. */
8555 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8556 && really_constant_p (treeop0
)
8557 && really_constant_p (treeop1
))
8559 expand_operands (treeop0
, treeop1
,
8560 NULL_RTX
, &op0
, &op1
, modifier
);
8561 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8564 /* No sense saving up arithmetic to be done
8565 if it's all in the wrong mode to form part of an address.
8566 And force_operand won't know whether to sign-extend or
8568 if (modifier
!= EXPAND_INITIALIZER
8569 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8572 expand_operands (treeop0
, treeop1
,
8573 subtarget
, &op0
, &op1
, modifier
);
8575 /* Convert A - const to A + (-const). */
8576 if (CONST_INT_P (op1
))
8578 op1
= negate_rtx (mode
, op1
);
8579 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8584 case WIDEN_MULT_PLUS_EXPR
:
8585 case WIDEN_MULT_MINUS_EXPR
:
8586 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8587 op2
= expand_normal (treeop2
);
8588 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8592 case WIDEN_MULT_EXPR
:
8593 /* If first operand is constant, swap them.
8594 Thus the following special case checks need only
8595 check the second operand. */
8596 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8597 std::swap (treeop0
, treeop1
);
8599 /* First, check if we have a multiplication of one signed and one
8600 unsigned operand. */
8601 if (TREE_CODE (treeop1
) != INTEGER_CST
8602 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8603 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8605 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8606 this_optab
= usmul_widen_optab
;
8607 if (find_widening_optab_handler (this_optab
, mode
, innermode
, 0)
8608 != CODE_FOR_nothing
)
8610 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8611 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8614 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8616 /* op0 and op1 might still be constant, despite the above
8617 != INTEGER_CST check. Handle it. */
8618 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8620 op0
= convert_modes (innermode
, mode
, op0
, true);
8621 op1
= convert_modes (innermode
, mode
, op1
, false);
8622 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8623 target
, unsignedp
));
8628 /* Check for a multiplication with matching signedness. */
8629 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8630 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8631 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8632 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8634 tree op0type
= TREE_TYPE (treeop0
);
8635 machine_mode innermode
= TYPE_MODE (op0type
);
8636 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8637 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8638 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8640 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8642 if (find_widening_optab_handler (this_optab
, mode
, innermode
, 0)
8643 != CODE_FOR_nothing
)
8645 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8647 /* op0 and op1 might still be constant, despite the above
8648 != INTEGER_CST check. Handle it. */
8649 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8652 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8654 = convert_modes (innermode
, mode
, op1
,
8655 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8656 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8660 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8661 unsignedp
, this_optab
);
8662 return REDUCE_BIT_FIELD (temp
);
8664 if (find_widening_optab_handler (other_optab
, mode
, innermode
, 0)
8666 && innermode
== word_mode
)
8669 op0
= expand_normal (treeop0
);
8670 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8671 op1
= convert_modes (word_mode
, mode
,
8672 expand_normal (treeop1
),
8673 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8675 op1
= expand_normal (treeop1
);
8676 /* op0 and op1 might still be constant, despite the above
8677 != INTEGER_CST check. Handle it. */
8678 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8679 goto widen_mult_const
;
8680 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8681 unsignedp
, OPTAB_LIB_WIDEN
);
8682 hipart
= gen_highpart (word_mode
, temp
);
8683 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8687 emit_move_insn (hipart
, htem
);
8688 return REDUCE_BIT_FIELD (temp
);
8692 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8693 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8694 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8695 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8699 optab opt
= fma_optab
;
8700 gimple
*def0
, *def2
;
8702 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8704 if (optab_handler (fma_optab
, mode
) == CODE_FOR_nothing
)
8706 tree fn
= mathfn_built_in (TREE_TYPE (treeop0
), BUILT_IN_FMA
);
8709 gcc_assert (fn
!= NULL_TREE
);
8710 call_expr
= build_call_expr (fn
, 3, treeop0
, treeop1
, treeop2
);
8711 return expand_builtin (call_expr
, target
, subtarget
, mode
, false);
8714 def0
= get_def_for_expr (treeop0
, NEGATE_EXPR
);
8715 /* The multiplication is commutative - look at its 2nd operand
8716 if the first isn't fed by a negate. */
8719 def0
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8720 /* Swap operands if the 2nd operand is fed by a negate. */
8722 std::swap (treeop0
, treeop1
);
8724 def2
= get_def_for_expr (treeop2
, NEGATE_EXPR
);
8729 && optab_handler (fnms_optab
, mode
) != CODE_FOR_nothing
)
8732 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8733 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8736 && optab_handler (fnma_optab
, mode
) != CODE_FOR_nothing
)
8739 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8742 && optab_handler (fms_optab
, mode
) != CODE_FOR_nothing
)
8745 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8749 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
, EXPAND_NORMAL
);
8751 op2
= expand_normal (treeop2
);
8752 op1
= expand_normal (treeop1
);
8754 return expand_ternary_op (TYPE_MODE (type
), opt
,
8755 op0
, op1
, op2
, target
, 0);
8759 /* If this is a fixed-point operation, then we cannot use the code
8760 below because "expand_mult" doesn't support sat/no-sat fixed-point
8762 if (ALL_FIXED_POINT_MODE_P (mode
))
8765 /* If first operand is constant, swap them.
8766 Thus the following special case checks need only
8767 check the second operand. */
8768 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8769 std::swap (treeop0
, treeop1
);
8771 /* Attempt to return something suitable for generating an
8772 indexed address, for machines that support that. */
8774 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8775 && tree_fits_shwi_p (treeop1
))
8777 tree exp1
= treeop1
;
8779 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8783 op0
= force_operand (op0
, NULL_RTX
);
8785 op0
= copy_to_mode_reg (mode
, op0
);
8787 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8788 gen_int_mode (tree_to_shwi (exp1
),
8789 TYPE_MODE (TREE_TYPE (exp1
)))));
8792 if (modifier
== EXPAND_STACK_PARM
)
8795 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8796 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8798 case TRUNC_MOD_EXPR
:
8799 case FLOOR_MOD_EXPR
:
8801 case ROUND_MOD_EXPR
:
8803 case TRUNC_DIV_EXPR
:
8804 case FLOOR_DIV_EXPR
:
8806 case ROUND_DIV_EXPR
:
8807 case EXACT_DIV_EXPR
:
8809 /* If this is a fixed-point operation, then we cannot use the code
8810 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8812 if (ALL_FIXED_POINT_MODE_P (mode
))
8815 if (modifier
== EXPAND_STACK_PARM
)
8817 /* Possible optimization: compute the dividend with EXPAND_SUM
8818 then if the divisor is constant can optimize the case
8819 where some terms of the dividend have coeffs divisible by it. */
8820 expand_operands (treeop0
, treeop1
,
8821 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8822 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8823 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8824 if (SCALAR_INT_MODE_P (mode
)
8826 && get_range_pos_neg (treeop0
) == 1
8827 && get_range_pos_neg (treeop1
) == 1)
8829 /* If both arguments are known to be positive when interpreted
8830 as signed, we can expand it as both signed and unsigned
8831 division or modulo. Choose the cheaper sequence in that case. */
8832 bool speed_p
= optimize_insn_for_speed_p ();
8833 do_pending_stack_adjust ();
8835 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8836 rtx_insn
*uns_insns
= get_insns ();
8839 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8840 rtx_insn
*sgn_insns
= get_insns ();
8842 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8843 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8845 /* If costs are the same then use as tie breaker the other
8847 if (uns_cost
== sgn_cost
)
8849 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8850 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8853 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8855 emit_insn (uns_insns
);
8858 emit_insn (sgn_insns
);
8861 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
8866 case MULT_HIGHPART_EXPR
:
8867 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8868 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
8872 case FIXED_CONVERT_EXPR
:
8873 op0
= expand_normal (treeop0
);
8874 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8875 target
= gen_reg_rtx (mode
);
8877 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
8878 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8879 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
8880 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
8882 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
8885 case FIX_TRUNC_EXPR
:
8886 op0
= expand_normal (treeop0
);
8887 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8888 target
= gen_reg_rtx (mode
);
8889 expand_fix (target
, op0
, unsignedp
);
8893 op0
= expand_normal (treeop0
);
8894 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8895 target
= gen_reg_rtx (mode
);
8896 /* expand_float can't figure out what to do if FROM has VOIDmode.
8897 So give it the correct mode. With -O, cse will optimize this. */
8898 if (GET_MODE (op0
) == VOIDmode
)
8899 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
8901 expand_float (target
, op0
,
8902 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8906 op0
= expand_expr (treeop0
, subtarget
,
8907 VOIDmode
, EXPAND_NORMAL
);
8908 if (modifier
== EXPAND_STACK_PARM
)
8910 temp
= expand_unop (mode
,
8911 optab_for_tree_code (NEGATE_EXPR
, type
,
8915 return REDUCE_BIT_FIELD (temp
);
8918 op0
= expand_expr (treeop0
, subtarget
,
8919 VOIDmode
, EXPAND_NORMAL
);
8920 if (modifier
== EXPAND_STACK_PARM
)
8923 /* ABS_EXPR is not valid for complex arguments. */
8924 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8925 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
8927 /* Unsigned abs is simply the operand. Testing here means we don't
8928 risk generating incorrect code below. */
8929 if (TYPE_UNSIGNED (type
))
8932 return expand_abs (mode
, op0
, target
, unsignedp
,
8933 safe_from_p (target
, treeop0
, 1));
8937 target
= original_target
;
8939 || modifier
== EXPAND_STACK_PARM
8940 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
8941 || GET_MODE (target
) != mode
8943 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
8944 target
= gen_reg_rtx (mode
);
8945 expand_operands (treeop0
, treeop1
,
8946 target
, &op0
, &op1
, EXPAND_NORMAL
);
8948 /* First try to do it with a special MIN or MAX instruction.
8949 If that does not win, use a conditional jump to select the proper
8951 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
8952 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
8957 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
8958 and similarly for MAX <x, y>. */
8959 if (VECTOR_TYPE_P (type
))
8961 tree t0
= make_tree (type
, op0
);
8962 tree t1
= make_tree (type
, op1
);
8963 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
8965 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
8969 /* At this point, a MEM target is no longer useful; we will get better
8972 if (! REG_P (target
))
8973 target
= gen_reg_rtx (mode
);
8975 /* If op1 was placed in target, swap op0 and op1. */
8976 if (target
!= op0
&& target
== op1
)
8977 std::swap (op0
, op1
);
8979 /* We generate better code and avoid problems with op1 mentioning
8980 target by forcing op1 into a pseudo if it isn't a constant. */
8981 if (! CONSTANT_P (op1
))
8982 op1
= force_reg (mode
, op1
);
8985 enum rtx_code comparison_code
;
8988 if (code
== MAX_EXPR
)
8989 comparison_code
= unsignedp
? GEU
: GE
;
8991 comparison_code
= unsignedp
? LEU
: LE
;
8993 /* Canonicalize to comparisons against 0. */
8994 if (op1
== const1_rtx
)
8996 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8997 or (a != 0 ? a : 1) for unsigned.
8998 For MIN we are safe converting (a <= 1 ? a : 1)
8999 into (a <= 0 ? a : 1) */
9000 cmpop1
= const0_rtx
;
9001 if (code
== MAX_EXPR
)
9002 comparison_code
= unsignedp
? NE
: GT
;
9004 if (op1
== constm1_rtx
&& !unsignedp
)
9006 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9007 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9008 cmpop1
= const0_rtx
;
9009 if (code
== MIN_EXPR
)
9010 comparison_code
= LT
;
9013 /* Use a conditional move if possible. */
9014 if (can_conditionally_move_p (mode
))
9020 /* Try to emit the conditional move. */
9021 insn
= emit_conditional_move (target
, comparison_code
,
9026 /* If we could do the conditional move, emit the sequence,
9030 rtx_insn
*seq
= get_insns ();
9036 /* Otherwise discard the sequence and fall back to code with
9042 emit_move_insn (target
, op0
);
9044 lab
= gen_label_rtx ();
9045 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9046 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9047 profile_probability::uninitialized ());
9049 emit_move_insn (target
, op1
);
9054 op0
= expand_expr (treeop0
, subtarget
,
9055 VOIDmode
, EXPAND_NORMAL
);
9056 if (modifier
== EXPAND_STACK_PARM
)
9058 /* In case we have to reduce the result to bitfield precision
9059 for unsigned bitfield expand this as XOR with a proper constant
9061 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9063 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9064 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9065 false, GET_MODE_PRECISION (int_mode
));
9067 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9068 immed_wide_int_const (mask
, int_mode
),
9069 target
, 1, OPTAB_LIB_WIDEN
);
9072 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9076 /* ??? Can optimize bitwise operations with one arg constant.
9077 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9078 and (a bitwise1 b) bitwise2 b (etc)
9079 but that is probably not worth while. */
9088 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9089 || type_has_mode_precision_p (type
));
9095 /* If this is a fixed-point operation, then we cannot use the code
9096 below because "expand_shift" doesn't support sat/no-sat fixed-point
9098 if (ALL_FIXED_POINT_MODE_P (mode
))
9101 if (! safe_from_p (subtarget
, treeop1
, 1))
9103 if (modifier
== EXPAND_STACK_PARM
)
9105 op0
= expand_expr (treeop0
, subtarget
,
9106 VOIDmode
, EXPAND_NORMAL
);
9108 /* Left shift optimization when shifting across word_size boundary.
9110 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9111 there isn't native instruction to support this wide mode
9112 left shift. Given below scenario:
9114 Type A = (Type) B << C
9117 | dest_high | dest_low |
9121 If the shift amount C caused we shift B to across the word
9122 size boundary, i.e part of B shifted into high half of
9123 destination register, and part of B remains in the low
9124 half, then GCC will use the following left shift expand
9127 1. Initialize dest_low to B.
9128 2. Initialize every bit of dest_high to the sign bit of B.
9129 3. Logic left shift dest_low by C bit to finalize dest_low.
9130 The value of dest_low before this shift is kept in a temp D.
9131 4. Logic left shift dest_high by C.
9132 5. Logic right shift D by (word_size - C).
9133 6. Or the result of 4 and 5 to finalize dest_high.
9135 While, by checking gimple statements, if operand B is
9136 coming from signed extension, then we can simplify above
9139 1. dest_high = src_low >> (word_size - C).
9140 2. dest_low = src_low << C.
9142 We can use one arithmetic right shift to finish all the
9143 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9144 needed from 6 into 2.
9146 The case is similar for zero extension, except that we
9147 initialize dest_high to zero rather than copies of the sign
9148 bit from B. Furthermore, we need to use a logical right shift
9151 The choice of sign-extension versus zero-extension is
9152 determined entirely by whether or not B is signed and is
9153 independent of the current setting of unsignedp. */
9156 if (code
== LSHIFT_EXPR
9159 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9161 && TREE_CONSTANT (treeop1
)
9162 && TREE_CODE (treeop0
) == SSA_NAME
)
9164 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9165 if (is_gimple_assign (def
)
9166 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9168 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9169 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9171 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9172 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9173 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9174 >= GET_MODE_BITSIZE (word_mode
)))
9176 rtx_insn
*seq
, *seq_old
;
9177 unsigned int high_off
= subreg_highpart_offset (word_mode
,
9179 bool extend_unsigned
9180 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9181 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9182 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9183 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9184 int_mode
, high_off
);
9185 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9186 - TREE_INT_CST_LOW (treeop1
));
9187 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9190 /* dest_high = src_low >> (word_size - C). */
9191 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9194 if (temp
!= dest_high
)
9195 emit_move_insn (dest_high
, temp
);
9197 /* dest_low = src_low << C. */
9198 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9199 treeop1
, dest_low
, unsignedp
);
9200 if (temp
!= dest_low
)
9201 emit_move_insn (dest_low
, temp
);
9207 if (have_insn_for (ASHIFT
, int_mode
))
9209 bool speed_p
= optimize_insn_for_speed_p ();
9211 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9216 seq_old
= get_insns ();
9218 if (seq_cost (seq
, speed_p
)
9219 >= seq_cost (seq_old
, speed_p
))
9230 if (temp
== NULL_RTX
)
9231 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9233 if (code
== LSHIFT_EXPR
)
9234 temp
= REDUCE_BIT_FIELD (temp
);
9238 /* Could determine the answer when only additive constants differ. Also,
9239 the addition of one can be handled by changing the condition. */
9246 case UNORDERED_EXPR
:
9255 temp
= do_store_flag (ops
,
9256 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9257 tmode
!= VOIDmode
? tmode
: mode
);
9261 /* Use a compare and a jump for BLKmode comparisons, or for function
9262 type comparisons is have_canonicalize_funcptr_for_compare. */
9265 || modifier
== EXPAND_STACK_PARM
9266 || ! safe_from_p (target
, treeop0
, 1)
9267 || ! safe_from_p (target
, treeop1
, 1)
9268 /* Make sure we don't have a hard reg (such as function's return
9269 value) live across basic blocks, if not optimizing. */
9270 || (!optimize
&& REG_P (target
)
9271 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9272 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9274 emit_move_insn (target
, const0_rtx
);
9276 rtx_code_label
*lab1
= gen_label_rtx ();
9277 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9278 profile_probability::uninitialized ());
9280 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9281 emit_move_insn (target
, constm1_rtx
);
9283 emit_move_insn (target
, const1_rtx
);
9289 /* Get the rtx code of the operands. */
9290 op0
= expand_normal (treeop0
);
9291 op1
= expand_normal (treeop1
);
9294 target
= gen_reg_rtx (TYPE_MODE (type
));
9296 /* If target overlaps with op1, then either we need to force
9297 op1 into a pseudo (if target also overlaps with op0),
9298 or write the complex parts in reverse order. */
9299 switch (GET_CODE (target
))
9302 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9304 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9306 complex_expr_force_op1
:
9307 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9308 emit_move_insn (temp
, op1
);
9312 complex_expr_swap_order
:
9313 /* Move the imaginary (op1) and real (op0) parts to their
9315 write_complex_part (target
, op1
, true);
9316 write_complex_part (target
, op0
, false);
9322 temp
= adjust_address_nv (target
,
9323 GET_MODE_INNER (GET_MODE (target
)), 0);
9324 if (reg_overlap_mentioned_p (temp
, op1
))
9326 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9327 temp
= adjust_address_nv (target
, imode
,
9328 GET_MODE_SIZE (imode
));
9329 if (reg_overlap_mentioned_p (temp
, op0
))
9330 goto complex_expr_force_op1
;
9331 goto complex_expr_swap_order
;
9335 if (reg_overlap_mentioned_p (target
, op1
))
9337 if (reg_overlap_mentioned_p (target
, op0
))
9338 goto complex_expr_force_op1
;
9339 goto complex_expr_swap_order
;
9344 /* Move the real (op0) and imaginary (op1) parts to their location. */
9345 write_complex_part (target
, op0
, false);
9346 write_complex_part (target
, op1
, true);
9350 case WIDEN_SUM_EXPR
:
9352 tree oprnd0
= treeop0
;
9353 tree oprnd1
= treeop1
;
9355 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9356 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9361 case REDUC_MAX_EXPR
:
9362 case REDUC_MIN_EXPR
:
9363 case REDUC_PLUS_EXPR
:
9365 op0
= expand_normal (treeop0
);
9366 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9367 machine_mode vec_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9369 struct expand_operand ops
[2];
9370 enum insn_code icode
= optab_handler (this_optab
, vec_mode
);
9372 create_output_operand (&ops
[0], target
, mode
);
9373 create_input_operand (&ops
[1], op0
, vec_mode
);
9374 expand_insn (icode
, 2, ops
);
9375 target
= ops
[0].value
;
9376 if (GET_MODE (target
) != mode
)
9377 return gen_lowpart (tmode
, target
);
9381 case VEC_UNPACK_HI_EXPR
:
9382 case VEC_UNPACK_LO_EXPR
:
9384 op0
= expand_normal (treeop0
);
9385 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9391 case VEC_UNPACK_FLOAT_HI_EXPR
:
9392 case VEC_UNPACK_FLOAT_LO_EXPR
:
9394 op0
= expand_normal (treeop0
);
9395 /* The signedness is determined from input operand. */
9396 temp
= expand_widen_pattern_expr
9397 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9398 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9404 case VEC_WIDEN_MULT_HI_EXPR
:
9405 case VEC_WIDEN_MULT_LO_EXPR
:
9406 case VEC_WIDEN_MULT_EVEN_EXPR
:
9407 case VEC_WIDEN_MULT_ODD_EXPR
:
9408 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9409 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9410 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9411 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9413 gcc_assert (target
);
9416 case VEC_PACK_TRUNC_EXPR
:
9417 case VEC_PACK_SAT_EXPR
:
9418 case VEC_PACK_FIX_TRUNC_EXPR
:
9419 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9423 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9424 op2
= expand_normal (treeop2
);
9426 /* Careful here: if the target doesn't support integral vector modes,
9427 a constant selection vector could wind up smooshed into a normal
9428 integral constant. */
9429 if (CONSTANT_P (op2
) && GET_CODE (op2
) != CONST_VECTOR
)
9431 tree sel_type
= TREE_TYPE (treeop2
);
9433 = mode_for_vector (SCALAR_TYPE_MODE (TREE_TYPE (sel_type
)),
9434 TYPE_VECTOR_SUBPARTS (sel_type
)).require ();
9435 gcc_assert (GET_MODE_CLASS (vmode
) == MODE_VECTOR_INT
);
9436 op2
= simplify_subreg (vmode
, op2
, TYPE_MODE (sel_type
), 0);
9437 gcc_assert (op2
&& GET_CODE (op2
) == CONST_VECTOR
);
9440 gcc_assert (GET_MODE_CLASS (GET_MODE (op2
)) == MODE_VECTOR_INT
);
9442 temp
= expand_vec_perm (mode
, op0
, op1
, op2
, target
);
9448 tree oprnd0
= treeop0
;
9449 tree oprnd1
= treeop1
;
9450 tree oprnd2
= treeop2
;
9453 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9454 op2
= expand_normal (oprnd2
);
9455 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9462 tree oprnd0
= treeop0
;
9463 tree oprnd1
= treeop1
;
9464 tree oprnd2
= treeop2
;
9467 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9468 op2
= expand_normal (oprnd2
);
9469 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9474 case REALIGN_LOAD_EXPR
:
9476 tree oprnd0
= treeop0
;
9477 tree oprnd1
= treeop1
;
9478 tree oprnd2
= treeop2
;
9481 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9482 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9483 op2
= expand_normal (oprnd2
);
9484 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9492 /* A COND_EXPR with its type being VOID_TYPE represents a
9493 conditional jump and is handled in
9494 expand_gimple_cond_expr. */
9495 gcc_assert (!VOID_TYPE_P (type
));
9497 /* Note that COND_EXPRs whose type is a structure or union
9498 are required to be constructed to contain assignments of
9499 a temporary variable, so that we can evaluate them here
9500 for side effect only. If type is void, we must do likewise. */
9502 gcc_assert (!TREE_ADDRESSABLE (type
)
9504 && TREE_TYPE (treeop1
) != void_type_node
9505 && TREE_TYPE (treeop2
) != void_type_node
);
9507 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9511 /* If we are not to produce a result, we have no target. Otherwise,
9512 if a target was specified use it; it will not be used as an
9513 intermediate target unless it is safe. If no target, use a
9516 if (modifier
!= EXPAND_STACK_PARM
9518 && safe_from_p (original_target
, treeop0
, 1)
9519 && GET_MODE (original_target
) == mode
9520 && !MEM_P (original_target
))
9521 temp
= original_target
;
9523 temp
= assign_temp (type
, 0, 1);
9525 do_pending_stack_adjust ();
9527 rtx_code_label
*lab0
= gen_label_rtx ();
9528 rtx_code_label
*lab1
= gen_label_rtx ();
9529 jumpifnot (treeop0
, lab0
,
9530 profile_probability::uninitialized ());
9531 store_expr (treeop1
, temp
,
9532 modifier
== EXPAND_STACK_PARM
,
9535 emit_jump_insn (targetm
.gen_jump (lab1
));
9538 store_expr (treeop2
, temp
,
9539 modifier
== EXPAND_STACK_PARM
,
9548 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9551 case BIT_INSERT_EXPR
:
9553 unsigned bitpos
= tree_to_uhwi (treeop2
);
9555 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9556 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9558 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9559 rtx op0
= expand_normal (treeop0
);
9560 rtx op1
= expand_normal (treeop1
);
9561 rtx dst
= gen_reg_rtx (mode
);
9562 emit_move_insn (dst
, op0
);
9563 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9564 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9572 /* Here to do an ordinary binary operator. */
9574 expand_operands (treeop0
, treeop1
,
9575 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9577 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9579 if (modifier
== EXPAND_STACK_PARM
)
9581 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9582 unsignedp
, OPTAB_LIB_WIDEN
);
9584 /* Bitwise operations do not need bitfield reduction as we expect their
9585 operands being properly truncated. */
9586 if (code
== BIT_XOR_EXPR
9587 || code
== BIT_AND_EXPR
9588 || code
== BIT_IOR_EXPR
)
9590 return REDUCE_BIT_FIELD (temp
);
9592 #undef REDUCE_BIT_FIELD
9595 /* Return TRUE if expression STMT is suitable for replacement.
9596 Never consider memory loads as replaceable, because those don't ever lead
9597 into constant expressions. */
9600 stmt_is_replaceable_p (gimple
*stmt
)
9602 if (ssa_is_replaceable_p (stmt
))
9604 /* Don't move around loads. */
9605 if (!gimple_assign_single_p (stmt
)
9606 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9613 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9614 enum expand_modifier modifier
, rtx
*alt_rtl
,
9615 bool inner_reference_p
)
9617 rtx op0
, op1
, temp
, decl_rtl
;
9620 machine_mode mode
, dmode
;
9621 enum tree_code code
= TREE_CODE (exp
);
9622 rtx subtarget
, original_target
;
9625 bool reduce_bit_field
;
9626 location_t loc
= EXPR_LOCATION (exp
);
9627 struct separate_ops ops
;
9628 tree treeop0
, treeop1
, treeop2
;
9629 tree ssa_name
= NULL_TREE
;
9632 type
= TREE_TYPE (exp
);
9633 mode
= TYPE_MODE (type
);
9634 unsignedp
= TYPE_UNSIGNED (type
);
9636 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9637 if (!VL_EXP_CLASS_P (exp
))
9638 switch (TREE_CODE_LENGTH (code
))
9641 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9642 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9643 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9653 ignore
= (target
== const0_rtx
9654 || ((CONVERT_EXPR_CODE_P (code
)
9655 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9656 && TREE_CODE (type
) == VOID_TYPE
));
9658 /* An operation in what may be a bit-field type needs the
9659 result to be reduced to the precision of the bit-field type,
9660 which is narrower than that of the type's mode. */
9661 reduce_bit_field
= (!ignore
9662 && INTEGRAL_TYPE_P (type
)
9663 && !type_has_mode_precision_p (type
));
9665 /* If we are going to ignore this result, we need only do something
9666 if there is a side-effect somewhere in the expression. If there
9667 is, short-circuit the most common cases here. Note that we must
9668 not call expand_expr with anything but const0_rtx in case this
9669 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9673 if (! TREE_SIDE_EFFECTS (exp
))
9676 /* Ensure we reference a volatile object even if value is ignored, but
9677 don't do this if all we are doing is taking its address. */
9678 if (TREE_THIS_VOLATILE (exp
)
9679 && TREE_CODE (exp
) != FUNCTION_DECL
9680 && mode
!= VOIDmode
&& mode
!= BLKmode
9681 && modifier
!= EXPAND_CONST_ADDRESS
)
9683 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9689 if (TREE_CODE_CLASS (code
) == tcc_unary
9690 || code
== BIT_FIELD_REF
9691 || code
== COMPONENT_REF
9692 || code
== INDIRECT_REF
)
9693 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9696 else if (TREE_CODE_CLASS (code
) == tcc_binary
9697 || TREE_CODE_CLASS (code
) == tcc_comparison
9698 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9700 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9701 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9708 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9711 /* Use subtarget as the target for operand 0 of a binary operation. */
9712 subtarget
= get_subtarget (target
);
9713 original_target
= target
;
9719 tree function
= decl_function_context (exp
);
9721 temp
= label_rtx (exp
);
9722 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9724 if (function
!= current_function_decl
9726 LABEL_REF_NONLOCAL_P (temp
) = 1;
9728 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9733 /* ??? ivopts calls expander, without any preparation from
9734 out-of-ssa. So fake instructions as if this was an access to the
9735 base variable. This unnecessarily allocates a pseudo, see how we can
9736 reuse it, if partition base vars have it set already. */
9737 if (!currently_expanding_to_rtl
)
9739 tree var
= SSA_NAME_VAR (exp
);
9740 if (var
&& DECL_RTL_SET_P (var
))
9741 return DECL_RTL (var
);
9742 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9743 LAST_VIRTUAL_REGISTER
+ 1);
9746 g
= get_gimple_for_ssa_name (exp
);
9747 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9749 && modifier
== EXPAND_INITIALIZER
9750 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9751 && (optimize
|| !SSA_NAME_VAR (exp
)
9752 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9753 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9754 g
= SSA_NAME_DEF_STMT (exp
);
9758 location_t saved_loc
= curr_insn_location ();
9759 location_t loc
= gimple_location (g
);
9760 if (loc
!= UNKNOWN_LOCATION
)
9761 set_curr_insn_location (loc
);
9762 ops
.code
= gimple_assign_rhs_code (g
);
9763 switch (get_gimple_rhs_class (ops
.code
))
9765 case GIMPLE_TERNARY_RHS
:
9766 ops
.op2
= gimple_assign_rhs3 (g
);
9768 case GIMPLE_BINARY_RHS
:
9769 ops
.op1
= gimple_assign_rhs2 (g
);
9771 /* Try to expand conditonal compare. */
9772 if (targetm
.gen_ccmp_first
)
9774 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9775 r
= expand_ccmp_expr (g
, mode
);
9780 case GIMPLE_UNARY_RHS
:
9781 ops
.op0
= gimple_assign_rhs1 (g
);
9782 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9784 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9786 case GIMPLE_SINGLE_RHS
:
9788 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9789 tmode
, modifier
, alt_rtl
,
9796 set_curr_insn_location (saved_loc
);
9797 if (REG_P (r
) && !REG_EXPR (r
))
9798 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9803 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9804 exp
= SSA_NAME_VAR (ssa_name
);
9805 goto expand_decl_rtl
;
9809 /* If a static var's type was incomplete when the decl was written,
9810 but the type is complete now, lay out the decl now. */
9811 if (DECL_SIZE (exp
) == 0
9812 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9813 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9814 layout_decl (exp
, 0);
9820 decl_rtl
= DECL_RTL (exp
);
9822 gcc_assert (decl_rtl
);
9824 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9825 settings for VECTOR_TYPE_P that might switch for the function. */
9826 if (currently_expanding_to_rtl
9827 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9828 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9829 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9831 decl_rtl
= copy_rtx (decl_rtl
);
9833 /* Record writes to register variables. */
9834 if (modifier
== EXPAND_WRITE
9836 && HARD_REGISTER_P (decl_rtl
))
9837 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9838 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9840 /* Ensure variable marked as used even if it doesn't go through
9841 a parser. If it hasn't be used yet, write out an external
9844 TREE_USED (exp
) = 1;
9846 /* Show we haven't gotten RTL for this yet. */
9849 /* Variables inherited from containing functions should have
9850 been lowered by this point. */
9852 context
= decl_function_context (exp
);
9854 || SCOPE_FILE_SCOPE_P (context
)
9855 || context
== current_function_decl
9856 || TREE_STATIC (exp
)
9857 || DECL_EXTERNAL (exp
)
9858 /* ??? C++ creates functions that are not TREE_STATIC. */
9859 || TREE_CODE (exp
) == FUNCTION_DECL
);
9861 /* This is the case of an array whose size is to be determined
9862 from its initializer, while the initializer is still being parsed.
9863 ??? We aren't parsing while expanding anymore. */
9865 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9866 temp
= validize_mem (decl_rtl
);
9868 /* If DECL_RTL is memory, we are in the normal case and the
9869 address is not valid, get the address into a register. */
9871 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9874 *alt_rtl
= decl_rtl
;
9875 decl_rtl
= use_anchored_address (decl_rtl
);
9876 if (modifier
!= EXPAND_CONST_ADDRESS
9877 && modifier
!= EXPAND_SUM
9878 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
9879 : GET_MODE (decl_rtl
),
9881 MEM_ADDR_SPACE (decl_rtl
)))
9882 temp
= replace_equiv_address (decl_rtl
,
9883 copy_rtx (XEXP (decl_rtl
, 0)));
9886 /* If we got something, return it. But first, set the alignment
9887 if the address is a register. */
9890 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
9891 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
9897 dmode
= DECL_MODE (exp
);
9899 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
9901 /* If the mode of DECL_RTL does not match that of the decl,
9902 there are two cases: we are dealing with a BLKmode value
9903 that is returned in a register, or we are dealing with
9904 a promoted value. In the latter case, return a SUBREG
9905 of the wanted mode, but mark it so that we know that it
9906 was already extended. */
9907 if (REG_P (decl_rtl
)
9909 && GET_MODE (decl_rtl
) != dmode
)
9912 bool always_initialized_rtx
;
9914 /* Get the signedness to be used for this variable. Ensure we get
9915 the same mode we got when the variable was declared. */
9916 if (code
!= SSA_NAME
)
9918 pmode
= promote_decl_mode (exp
, &unsignedp
);
9919 always_initialized_rtx
= true;
9921 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
9922 && gimple_code (g
) == GIMPLE_CALL
9923 && !gimple_call_internal_p (g
))
9925 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
9926 gimple_call_fntype (g
), 2);
9927 always_initialized_rtx
9928 = always_initialized_rtx_for_ssa_name_p (ssa_name
);
9932 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
9933 always_initialized_rtx
9934 = always_initialized_rtx_for_ssa_name_p (ssa_name
);
9937 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
9939 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
9941 /* We cannot assume anything about an existing extension if the
9942 register may contain uninitialized bits. */
9943 if (always_initialized_rtx
)
9945 SUBREG_PROMOTED_VAR_P (temp
) = 1;
9946 SUBREG_PROMOTED_SET (temp
, unsignedp
);
9956 /* Given that TYPE_PRECISION (type) is not always equal to
9957 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9958 the former to the latter according to the signedness of the
9960 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
9961 temp
= immed_wide_int_const
9962 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
9968 tree tmp
= NULL_TREE
;
9969 if (GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
9970 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
9971 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FRACT
9972 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UFRACT
9973 || GET_MODE_CLASS (mode
) == MODE_VECTOR_ACCUM
9974 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UACCUM
)
9975 return const_vector_from_tree (exp
);
9976 scalar_int_mode int_mode
;
9977 if (is_int_mode (mode
, &int_mode
))
9979 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
9980 return const_scalar_mask_from_tree (int_mode
, exp
);
9984 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
9986 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
9987 type_for_mode
, exp
);
9992 vec
<constructor_elt
, va_gc
> *v
;
9994 vec_alloc (v
, VECTOR_CST_NELTS (exp
));
9995 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
9996 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
9997 tmp
= build_constructor (type
, v
);
9999 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10004 if (modifier
== EXPAND_WRITE
)
10006 /* Writing into CONST_DECL is always invalid, but handle it
10008 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10009 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10010 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10011 EXPAND_NORMAL
, as
);
10012 op0
= memory_address_addr_space (mode
, op0
, as
);
10013 temp
= gen_rtx_MEM (mode
, op0
);
10014 set_mem_addr_space (temp
, as
);
10017 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10020 /* If optimized, generate immediate CONST_DOUBLE
10021 which will be turned into memory by reload if necessary.
10023 We used to force a register so that loop.c could see it. But
10024 this does not allow gen_* patterns to perform optimizations with
10025 the constants. It also produces two insns in cases like "x = 1.0;".
10026 On most machines, floating-point constants are not permitted in
10027 many insns, so we'd end up copying it to a register in any case.
10029 Now, we do the copying in expand_binop, if appropriate. */
10030 return const_double_from_real_value (TREE_REAL_CST (exp
),
10031 TYPE_MODE (TREE_TYPE (exp
)));
10034 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10035 TYPE_MODE (TREE_TYPE (exp
)));
10038 /* Handle evaluating a complex constant in a CONCAT target. */
10039 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10041 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10044 rtarg
= XEXP (original_target
, 0);
10045 itarg
= XEXP (original_target
, 1);
10047 /* Move the real and imaginary parts separately. */
10048 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10049 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10052 emit_move_insn (rtarg
, op0
);
10054 emit_move_insn (itarg
, op1
);
10056 return original_target
;
10062 temp
= expand_expr_constant (exp
, 1, modifier
);
10064 /* temp contains a constant address.
10065 On RISC machines where a constant address isn't valid,
10066 make some insns to get that address into a register. */
10067 if (modifier
!= EXPAND_CONST_ADDRESS
10068 && modifier
!= EXPAND_INITIALIZER
10069 && modifier
!= EXPAND_SUM
10070 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10071 MEM_ADDR_SPACE (temp
)))
10072 return replace_equiv_address (temp
,
10073 copy_rtx (XEXP (temp
, 0)));
10078 tree val
= treeop0
;
10079 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10080 inner_reference_p
);
10082 if (!SAVE_EXPR_RESOLVED_P (exp
))
10084 /* We can indeed still hit this case, typically via builtin
10085 expanders calling save_expr immediately before expanding
10086 something. Assume this means that we only have to deal
10087 with non-BLKmode values. */
10088 gcc_assert (GET_MODE (ret
) != BLKmode
);
10090 val
= build_decl (curr_insn_location (),
10091 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10092 DECL_ARTIFICIAL (val
) = 1;
10093 DECL_IGNORED_P (val
) = 1;
10095 TREE_OPERAND (exp
, 0) = treeop0
;
10096 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10098 if (!CONSTANT_P (ret
))
10099 ret
= copy_to_reg (ret
);
10100 SET_DECL_RTL (val
, ret
);
10108 /* If we don't need the result, just ensure we evaluate any
10112 unsigned HOST_WIDE_INT idx
;
10115 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10116 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10121 return expand_constructor (exp
, target
, modifier
, false);
10123 case TARGET_MEM_REF
:
10126 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10127 enum insn_code icode
;
10128 unsigned int align
;
10130 op0
= addr_for_mem_ref (exp
, as
, true);
10131 op0
= memory_address_addr_space (mode
, op0
, as
);
10132 temp
= gen_rtx_MEM (mode
, op0
);
10133 set_mem_attributes (temp
, exp
, 0);
10134 set_mem_addr_space (temp
, as
);
10135 align
= get_object_alignment (exp
);
10136 if (modifier
!= EXPAND_WRITE
10137 && modifier
!= EXPAND_MEMORY
10139 && align
< GET_MODE_ALIGNMENT (mode
)
10140 /* If the target does not have special handling for unaligned
10141 loads of mode then it can use regular moves for them. */
10142 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10143 != CODE_FOR_nothing
))
10145 struct expand_operand ops
[2];
10147 /* We've already validated the memory, and we're creating a
10148 new pseudo destination. The predicates really can't fail,
10149 nor can the generator. */
10150 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10151 create_fixed_operand (&ops
[1], temp
);
10152 expand_insn (icode
, 2, ops
);
10153 temp
= ops
[0].value
;
10160 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10162 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10163 machine_mode address_mode
;
10164 tree base
= TREE_OPERAND (exp
, 0);
10166 enum insn_code icode
;
10168 /* Handle expansion of non-aliased memory with non-BLKmode. That
10169 might end up in a register. */
10170 if (mem_ref_refers_to_non_mem_p (exp
))
10172 HOST_WIDE_INT offset
= mem_ref_offset (exp
).to_short_addr ();
10173 base
= TREE_OPERAND (base
, 0);
10176 && tree_fits_uhwi_p (TYPE_SIZE (type
))
10177 && (GET_MODE_BITSIZE (DECL_MODE (base
))
10178 == tree_to_uhwi (TYPE_SIZE (type
))))
10179 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10180 target
, tmode
, modifier
);
10181 if (TYPE_MODE (type
) == BLKmode
)
10183 temp
= assign_stack_temp (DECL_MODE (base
),
10184 GET_MODE_SIZE (DECL_MODE (base
)));
10185 store_expr (base
, temp
, 0, false, false);
10186 temp
= adjust_address (temp
, BLKmode
, offset
);
10187 set_mem_size (temp
, int_size_in_bytes (type
));
10190 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10191 bitsize_int (offset
* BITS_PER_UNIT
));
10192 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10193 return expand_expr (exp
, target
, tmode
, modifier
);
10195 address_mode
= targetm
.addr_space
.address_mode (as
);
10196 base
= TREE_OPERAND (exp
, 0);
10197 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10199 tree mask
= gimple_assign_rhs2 (def_stmt
);
10200 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10201 gimple_assign_rhs1 (def_stmt
), mask
);
10202 TREE_OPERAND (exp
, 0) = base
;
10204 align
= get_object_alignment (exp
);
10205 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10206 op0
= memory_address_addr_space (mode
, op0
, as
);
10207 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10209 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10210 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10211 op0
= memory_address_addr_space (mode
, op0
, as
);
10213 temp
= gen_rtx_MEM (mode
, op0
);
10214 set_mem_attributes (temp
, exp
, 0);
10215 set_mem_addr_space (temp
, as
);
10216 if (TREE_THIS_VOLATILE (exp
))
10217 MEM_VOLATILE_P (temp
) = 1;
10218 if (modifier
!= EXPAND_WRITE
10219 && modifier
!= EXPAND_MEMORY
10220 && !inner_reference_p
10222 && align
< GET_MODE_ALIGNMENT (mode
))
10224 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10225 != CODE_FOR_nothing
)
10227 struct expand_operand ops
[2];
10229 /* We've already validated the memory, and we're creating a
10230 new pseudo destination. The predicates really can't fail,
10231 nor can the generator. */
10232 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10233 create_fixed_operand (&ops
[1], temp
);
10234 expand_insn (icode
, 2, ops
);
10235 temp
= ops
[0].value
;
10237 else if (targetm
.slow_unaligned_access (mode
, align
))
10238 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10239 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10240 (modifier
== EXPAND_STACK_PARM
10241 ? NULL_RTX
: target
),
10242 mode
, mode
, false, alt_rtl
);
10245 && modifier
!= EXPAND_MEMORY
10246 && modifier
!= EXPAND_WRITE
)
10247 temp
= flip_storage_order (mode
, temp
);
10254 tree array
= treeop0
;
10255 tree index
= treeop1
;
10258 /* Fold an expression like: "foo"[2].
10259 This is not done in fold so it won't happen inside &.
10260 Don't fold if this is for wide characters since it's too
10261 difficult to do correctly and this is a very rare case. */
10263 if (modifier
!= EXPAND_CONST_ADDRESS
10264 && modifier
!= EXPAND_INITIALIZER
10265 && modifier
!= EXPAND_MEMORY
)
10267 tree t
= fold_read_from_constant_string (exp
);
10270 return expand_expr (t
, target
, tmode
, modifier
);
10273 /* If this is a constant index into a constant array,
10274 just get the value from the array. Handle both the cases when
10275 we have an explicit constructor and when our operand is a variable
10276 that was declared const. */
10278 if (modifier
!= EXPAND_CONST_ADDRESS
10279 && modifier
!= EXPAND_INITIALIZER
10280 && modifier
!= EXPAND_MEMORY
10281 && TREE_CODE (array
) == CONSTRUCTOR
10282 && ! TREE_SIDE_EFFECTS (array
)
10283 && TREE_CODE (index
) == INTEGER_CST
)
10285 unsigned HOST_WIDE_INT ix
;
10288 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10290 if (tree_int_cst_equal (field
, index
))
10292 if (!TREE_SIDE_EFFECTS (value
))
10293 return expand_expr (fold (value
), target
, tmode
, modifier
);
10298 else if (optimize
>= 1
10299 && modifier
!= EXPAND_CONST_ADDRESS
10300 && modifier
!= EXPAND_INITIALIZER
10301 && modifier
!= EXPAND_MEMORY
10302 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10303 && TREE_CODE (index
) == INTEGER_CST
10304 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10305 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10307 if (init
== NULL_TREE
)
10309 tree value
= build_zero_cst (type
);
10310 if (TREE_CODE (value
) == CONSTRUCTOR
)
10312 /* If VALUE is a CONSTRUCTOR, this optimization is only
10313 useful if this doesn't store the CONSTRUCTOR into
10314 memory. If it does, it is more efficient to just
10315 load the data from the array directly. */
10316 rtx ret
= expand_constructor (value
, target
,
10318 if (ret
== NULL_RTX
)
10323 return expand_expr (value
, target
, tmode
, modifier
);
10325 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10327 unsigned HOST_WIDE_INT ix
;
10330 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10332 if (tree_int_cst_equal (field
, index
))
10334 if (TREE_SIDE_EFFECTS (value
))
10337 if (TREE_CODE (value
) == CONSTRUCTOR
)
10339 /* If VALUE is a CONSTRUCTOR, this
10340 optimization is only useful if
10341 this doesn't store the CONSTRUCTOR
10342 into memory. If it does, it is more
10343 efficient to just load the data from
10344 the array directly. */
10345 rtx ret
= expand_constructor (value
, target
,
10347 if (ret
== NULL_RTX
)
10352 expand_expr (fold (value
), target
, tmode
, modifier
);
10355 else if (TREE_CODE (init
) == STRING_CST
)
10357 tree low_bound
= array_ref_low_bound (exp
);
10358 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10360 /* Optimize the special case of a zero lower bound.
10362 We convert the lower bound to sizetype to avoid problems
10363 with constant folding. E.g. suppose the lower bound is
10364 1 and its mode is QI. Without the conversion
10365 (ARRAY + (INDEX - (unsigned char)1))
10367 (ARRAY + (-(unsigned char)1) + INDEX)
10369 (ARRAY + 255 + INDEX). Oops! */
10370 if (!integer_zerop (low_bound
))
10371 index1
= size_diffop_loc (loc
, index1
,
10372 fold_convert_loc (loc
, sizetype
,
10375 if (tree_fits_uhwi_p (index1
)
10376 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10378 tree type
= TREE_TYPE (TREE_TYPE (init
));
10379 scalar_int_mode mode
;
10381 if (is_int_mode (TYPE_MODE (type
), &mode
)
10382 && GET_MODE_SIZE (mode
) == 1)
10383 return gen_int_mode (TREE_STRING_POINTER (init
)
10384 [TREE_INT_CST_LOW (index1
)],
10390 goto normal_inner_ref
;
10392 case COMPONENT_REF
:
10393 /* If the operand is a CONSTRUCTOR, we can just extract the
10394 appropriate field if it is present. */
10395 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10397 unsigned HOST_WIDE_INT idx
;
10399 scalar_int_mode field_mode
;
10401 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10403 if (field
== treeop1
10404 /* We can normally use the value of the field in the
10405 CONSTRUCTOR. However, if this is a bitfield in
10406 an integral mode that we can fit in a HOST_WIDE_INT,
10407 we must mask only the number of bits in the bitfield,
10408 since this is done implicitly by the constructor. If
10409 the bitfield does not meet either of those conditions,
10410 we can't do this optimization. */
10411 && (! DECL_BIT_FIELD (field
)
10412 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10413 && (GET_MODE_PRECISION (field_mode
)
10414 <= HOST_BITS_PER_WIDE_INT
))))
10416 if (DECL_BIT_FIELD (field
)
10417 && modifier
== EXPAND_STACK_PARM
)
10419 op0
= expand_expr (value
, target
, tmode
, modifier
);
10420 if (DECL_BIT_FIELD (field
))
10422 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10423 scalar_int_mode imode
10424 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10426 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10428 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10430 op0
= expand_and (imode
, op0
, op1
, target
);
10434 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10436 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10438 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10446 goto normal_inner_ref
;
10448 case BIT_FIELD_REF
:
10449 case ARRAY_RANGE_REF
:
10452 machine_mode mode1
, mode2
;
10453 HOST_WIDE_INT bitsize
, bitpos
;
10455 int reversep
, volatilep
= 0, must_force_mem
;
10457 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10458 &unsignedp
, &reversep
, &volatilep
);
10459 rtx orig_op0
, memloc
;
10460 bool clear_mem_expr
= false;
10462 /* If we got back the original object, something is wrong. Perhaps
10463 we are evaluating an expression too early. In any event, don't
10464 infinitely recurse. */
10465 gcc_assert (tem
!= exp
);
10467 /* If TEM's type is a union of variable size, pass TARGET to the inner
10468 computation, since it will need a temporary and TARGET is known
10469 to have to do. This occurs in unchecked conversion in Ada. */
10471 = expand_expr_real (tem
,
10472 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10473 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10474 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10476 && modifier
!= EXPAND_STACK_PARM
10477 ? target
: NULL_RTX
),
10479 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10482 /* If the field has a mode, we want to access it in the
10483 field's mode, not the computed mode.
10484 If a MEM has VOIDmode (external with incomplete type),
10485 use BLKmode for it instead. */
10488 if (mode1
!= VOIDmode
)
10489 op0
= adjust_address (op0
, mode1
, 0);
10490 else if (GET_MODE (op0
) == VOIDmode
)
10491 op0
= adjust_address (op0
, BLKmode
, 0);
10495 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10497 /* If we have either an offset, a BLKmode result, or a reference
10498 outside the underlying object, we must force it to memory.
10499 Such a case can occur in Ada if we have unchecked conversion
10500 of an expression from a scalar type to an aggregate type or
10501 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10502 passed a partially uninitialized object or a view-conversion
10503 to a larger size. */
10504 must_force_mem
= (offset
10505 || mode1
== BLKmode
10506 || bitpos
+ bitsize
> GET_MODE_BITSIZE (mode2
));
10508 /* Handle CONCAT first. */
10509 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10512 && bitsize
== GET_MODE_BITSIZE (GET_MODE (op0
))
10513 && COMPLEX_MODE_P (mode1
)
10514 && COMPLEX_MODE_P (GET_MODE (op0
))
10515 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10516 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10519 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10520 if (mode1
!= GET_MODE (op0
))
10523 for (int i
= 0; i
< 2; i
++)
10525 rtx op
= read_complex_part (op0
, i
!= 0);
10526 if (GET_CODE (op
) == SUBREG
)
10527 op
= force_reg (GET_MODE (op
), op
);
10528 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10534 if (!REG_P (op
) && !MEM_P (op
))
10535 op
= force_reg (GET_MODE (op
), op
);
10536 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10540 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10545 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
10548 op0
= XEXP (op0
, 0);
10549 mode2
= GET_MODE (op0
);
10551 else if (bitpos
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
10552 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1)))
10556 op0
= XEXP (op0
, 1);
10558 mode2
= GET_MODE (op0
);
10561 /* Otherwise force into memory. */
10562 must_force_mem
= 1;
10565 /* If this is a constant, put it in a register if it is a legitimate
10566 constant and we don't need a memory reference. */
10567 if (CONSTANT_P (op0
)
10568 && mode2
!= BLKmode
10569 && targetm
.legitimate_constant_p (mode2
, op0
)
10570 && !must_force_mem
)
10571 op0
= force_reg (mode2
, op0
);
10573 /* Otherwise, if this is a constant, try to force it to the constant
10574 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10575 is a legitimate constant. */
10576 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10577 op0
= validize_mem (memloc
);
10579 /* Otherwise, if this is a constant or the object is not in memory
10580 and need be, put it there. */
10581 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10583 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10584 emit_move_insn (memloc
, op0
);
10586 clear_mem_expr
= true;
10591 machine_mode address_mode
;
10592 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10595 gcc_assert (MEM_P (op0
));
10597 address_mode
= get_address_mode (op0
);
10598 if (GET_MODE (offset_rtx
) != address_mode
)
10600 /* We cannot be sure that the RTL in offset_rtx is valid outside
10601 of a memory address context, so force it into a register
10602 before attempting to convert it to the desired mode. */
10603 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10604 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10607 /* See the comment in expand_assignment for the rationale. */
10608 if (mode1
!= VOIDmode
10611 && (bitpos
% bitsize
) == 0
10612 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
10613 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10615 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10619 op0
= offset_address (op0
, offset_rtx
,
10620 highest_pow2_factor (offset
));
10623 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10624 record its alignment as BIGGEST_ALIGNMENT. */
10625 if (MEM_P (op0
) && bitpos
== 0 && offset
!= 0
10626 && is_aligning_offset (offset
, tem
))
10627 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10629 /* Don't forget about volatility even if this is a bitfield. */
10630 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10632 if (op0
== orig_op0
)
10633 op0
= copy_rtx (op0
);
10635 MEM_VOLATILE_P (op0
) = 1;
10638 /* In cases where an aligned union has an unaligned object
10639 as a field, we might be extracting a BLKmode value from
10640 an integer-mode (e.g., SImode) object. Handle this case
10641 by doing the extract into an object as wide as the field
10642 (which we know to be the width of a basic mode), then
10643 storing into memory, and changing the mode to BLKmode. */
10644 if (mode1
== VOIDmode
10645 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10646 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10647 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10648 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10649 && modifier
!= EXPAND_CONST_ADDRESS
10650 && modifier
!= EXPAND_INITIALIZER
10651 && modifier
!= EXPAND_MEMORY
)
10652 /* If the bitfield is volatile and the bitsize
10653 is narrower than the access size of the bitfield,
10654 we need to extract bitfields from the access. */
10655 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10656 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10657 && mode1
!= BLKmode
10658 && bitsize
< GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
)
10659 /* If the field isn't aligned enough to fetch as a memref,
10660 fetch it as a bit field. */
10661 || (mode1
!= BLKmode
10663 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10664 || (bitpos
% GET_MODE_ALIGNMENT (mode1
) != 0)
10665 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10666 || (bitpos
% GET_MODE_ALIGNMENT (mode
) != 0))
10667 && modifier
!= EXPAND_MEMORY
10668 && ((modifier
== EXPAND_CONST_ADDRESS
10669 || modifier
== EXPAND_INITIALIZER
)
10671 : targetm
.slow_unaligned_access (mode1
,
10673 || (bitpos
% BITS_PER_UNIT
!= 0)))
10674 /* If the type and the field are a constant size and the
10675 size of the type isn't the same size as the bitfield,
10676 we must use bitfield operations. */
10678 && TYPE_SIZE (TREE_TYPE (exp
))
10679 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
10680 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)),
10683 machine_mode ext_mode
= mode
;
10685 if (ext_mode
== BLKmode
10686 && ! (target
!= 0 && MEM_P (op0
)
10688 && bitpos
% BITS_PER_UNIT
== 0))
10689 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10691 if (ext_mode
== BLKmode
)
10694 target
= assign_temp (type
, 1, 1);
10696 /* ??? Unlike the similar test a few lines below, this one is
10697 very likely obsolete. */
10701 /* In this case, BITPOS must start at a byte boundary and
10702 TARGET, if specified, must be a MEM. */
10703 gcc_assert (MEM_P (op0
)
10704 && (!target
|| MEM_P (target
))
10705 && !(bitpos
% BITS_PER_UNIT
));
10707 emit_block_move (target
,
10708 adjust_address (op0
, VOIDmode
,
10709 bitpos
/ BITS_PER_UNIT
),
10710 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
10712 (modifier
== EXPAND_STACK_PARM
10713 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10718 /* If we have nothing to extract, the result will be 0 for targets
10719 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10720 return 0 for the sake of consistency, as reading a zero-sized
10721 bitfield is valid in Ada and the value is fully specified. */
10725 op0
= validize_mem (op0
);
10727 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10728 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10730 /* If the result has a record type and the extraction is done in
10731 an integral mode, then the field may be not aligned on a byte
10732 boundary; in this case, if it has reverse storage order, it
10733 needs to be extracted as a scalar field with reverse storage
10734 order and put back into memory order afterwards. */
10735 if (TREE_CODE (type
) == RECORD_TYPE
10736 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10737 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10739 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10740 (modifier
== EXPAND_STACK_PARM
10741 ? NULL_RTX
: target
),
10742 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10744 /* If the result has a record type and the mode of OP0 is an
10745 integral mode then, if BITSIZE is narrower than this mode
10746 and this is for big-endian data, we must put the field
10747 into the high-order bits. And we must also put it back
10748 into memory order if it has been previously reversed. */
10749 scalar_int_mode op0_mode
;
10750 if (TREE_CODE (type
) == RECORD_TYPE
10751 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10753 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10756 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10757 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10758 size
- bitsize
, op0
, 1);
10761 op0
= flip_storage_order (op0_mode
, op0
);
10764 /* If the result type is BLKmode, store the data into a temporary
10765 of the appropriate type, but with the mode corresponding to the
10766 mode for the data we have (op0's mode). */
10767 if (mode
== BLKmode
)
10770 = assign_stack_temp_for_type (ext_mode
,
10771 GET_MODE_BITSIZE (ext_mode
),
10773 emit_move_insn (new_rtx
, op0
);
10774 op0
= copy_rtx (new_rtx
);
10775 PUT_MODE (op0
, BLKmode
);
10781 /* If the result is BLKmode, use that to access the object
10783 if (mode
== BLKmode
)
10786 /* Get a reference to just this component. */
10787 if (modifier
== EXPAND_CONST_ADDRESS
10788 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10789 op0
= adjust_address_nv (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10791 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10793 if (op0
== orig_op0
)
10794 op0
= copy_rtx (op0
);
10796 /* Don't set memory attributes if the base expression is
10797 SSA_NAME that got expanded as a MEM. In that case, we should
10798 just honor its original memory attributes. */
10799 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10800 set_mem_attributes (op0
, exp
, 0);
10802 if (REG_P (XEXP (op0
, 0)))
10803 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10805 /* If op0 is a temporary because the original expressions was forced
10806 to memory, clear MEM_EXPR so that the original expression cannot
10807 be marked as addressable through MEM_EXPR of the temporary. */
10808 if (clear_mem_expr
)
10809 set_mem_expr (op0
, NULL_TREE
);
10811 MEM_VOLATILE_P (op0
) |= volatilep
;
10814 && modifier
!= EXPAND_MEMORY
10815 && modifier
!= EXPAND_WRITE
)
10816 op0
= flip_storage_order (mode1
, op0
);
10818 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10819 || modifier
== EXPAND_CONST_ADDRESS
10820 || modifier
== EXPAND_INITIALIZER
)
10824 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10826 convert_move (target
, op0
, unsignedp
);
10831 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10834 /* All valid uses of __builtin_va_arg_pack () are removed during
10836 if (CALL_EXPR_VA_ARG_PACK (exp
))
10837 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10839 tree fndecl
= get_callee_fndecl (exp
), attr
;
10842 && (attr
= lookup_attribute ("error",
10843 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10844 error ("%Kcall to %qs declared with attribute error: %s",
10845 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10846 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10848 && (attr
= lookup_attribute ("warning",
10849 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10850 warning_at (tree_nonartificial_location (exp
),
10851 0, "%Kcall to %qs declared with attribute warning: %s",
10852 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10853 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10855 /* Check for a built-in function. */
10856 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10858 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10859 if (CALL_WITH_BOUNDS_P (exp
))
10860 return expand_builtin_with_bounds (exp
, target
, subtarget
,
10863 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10866 return expand_call (exp
, target
, ignore
);
10868 case VIEW_CONVERT_EXPR
:
10871 /* If we are converting to BLKmode, try to avoid an intermediate
10872 temporary by fetching an inner memory reference. */
10873 if (mode
== BLKmode
10874 && TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
10875 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10876 && handled_component_p (treeop0
))
10878 machine_mode mode1
;
10879 HOST_WIDE_INT bitsize
, bitpos
;
10881 int unsignedp
, reversep
, volatilep
= 0;
10883 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
10884 &unsignedp
, &reversep
, &volatilep
);
10887 /* ??? We should work harder and deal with non-zero offsets. */
10889 && (bitpos
% BITS_PER_UNIT
) == 0
10892 && compare_tree_int (TYPE_SIZE (type
), bitsize
) == 0)
10894 /* See the normal_inner_ref case for the rationale. */
10896 = expand_expr_real (tem
,
10897 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10898 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10900 && modifier
!= EXPAND_STACK_PARM
10901 ? target
: NULL_RTX
),
10903 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10906 if (MEM_P (orig_op0
))
10910 /* Get a reference to just this component. */
10911 if (modifier
== EXPAND_CONST_ADDRESS
10912 || modifier
== EXPAND_SUM
10913 || modifier
== EXPAND_INITIALIZER
)
10914 op0
= adjust_address_nv (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10916 op0
= adjust_address (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10918 if (op0
== orig_op0
)
10919 op0
= copy_rtx (op0
);
10921 set_mem_attributes (op0
, treeop0
, 0);
10922 if (REG_P (XEXP (op0
, 0)))
10923 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10925 MEM_VOLATILE_P (op0
) |= volatilep
;
10931 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
10932 NULL
, inner_reference_p
);
10934 /* If the input and output modes are both the same, we are done. */
10935 if (mode
== GET_MODE (op0
))
10937 /* If neither mode is BLKmode, and both modes are the same size
10938 then we can use gen_lowpart. */
10939 else if (mode
!= BLKmode
&& GET_MODE (op0
) != BLKmode
10940 && (GET_MODE_PRECISION (mode
)
10941 == GET_MODE_PRECISION (GET_MODE (op0
)))
10942 && !COMPLEX_MODE_P (GET_MODE (op0
)))
10944 if (GET_CODE (op0
) == SUBREG
)
10945 op0
= force_reg (GET_MODE (op0
), op0
);
10946 temp
= gen_lowpart_common (mode
, op0
);
10951 if (!REG_P (op0
) && !MEM_P (op0
))
10952 op0
= force_reg (GET_MODE (op0
), op0
);
10953 op0
= gen_lowpart (mode
, op0
);
10956 /* If both types are integral, convert from one mode to the other. */
10957 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
10958 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
10959 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
10960 /* If the output type is a bit-field type, do an extraction. */
10961 else if (reduce_bit_field
)
10962 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
10963 TYPE_UNSIGNED (type
), NULL_RTX
,
10964 mode
, mode
, false, NULL
);
10965 /* As a last resort, spill op0 to memory, and reload it in a
10967 else if (!MEM_P (op0
))
10969 /* If the operand is not a MEM, force it into memory. Since we
10970 are going to be changing the mode of the MEM, don't call
10971 force_const_mem for constants because we don't allow pool
10972 constants to change mode. */
10973 tree inner_type
= TREE_TYPE (treeop0
);
10975 gcc_assert (!TREE_ADDRESSABLE (exp
));
10977 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
10979 = assign_stack_temp_for_type
10980 (TYPE_MODE (inner_type
),
10981 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
10983 emit_move_insn (target
, op0
);
10987 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10988 output type is such that the operand is known to be aligned, indicate
10989 that it is. Otherwise, we need only be concerned about alignment for
10990 non-BLKmode results. */
10993 enum insn_code icode
;
10995 if (modifier
!= EXPAND_WRITE
10996 && modifier
!= EXPAND_MEMORY
10997 && !inner_reference_p
10999 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11001 /* If the target does have special handling for unaligned
11002 loads of mode then use them. */
11003 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11004 != CODE_FOR_nothing
)
11008 op0
= adjust_address (op0
, mode
, 0);
11009 /* We've already validated the memory, and we're creating a
11010 new pseudo destination. The predicates really can't
11012 reg
= gen_reg_rtx (mode
);
11014 /* Nor can the insn generator. */
11015 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11019 else if (STRICT_ALIGNMENT
)
11021 tree inner_type
= TREE_TYPE (treeop0
);
11022 HOST_WIDE_INT temp_size
11023 = MAX (int_size_in_bytes (inner_type
),
11024 (HOST_WIDE_INT
) GET_MODE_SIZE (mode
));
11026 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11027 rtx new_with_op0_mode
11028 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11030 gcc_assert (!TREE_ADDRESSABLE (exp
));
11032 if (GET_MODE (op0
) == BLKmode
)
11033 emit_block_move (new_with_op0_mode
, op0
,
11034 GEN_INT (GET_MODE_SIZE (mode
)),
11035 (modifier
== EXPAND_STACK_PARM
11036 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11038 emit_move_insn (new_with_op0_mode
, op0
);
11044 op0
= adjust_address (op0
, mode
, 0);
11051 tree lhs
= treeop0
;
11052 tree rhs
= treeop1
;
11053 gcc_assert (ignore
);
11055 /* Check for |= or &= of a bitfield of size one into another bitfield
11056 of size 1. In this case, (unless we need the result of the
11057 assignment) we can do this more efficiently with a
11058 test followed by an assignment, if necessary.
11060 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11061 things change so we do, this code should be enhanced to
11063 if (TREE_CODE (lhs
) == COMPONENT_REF
11064 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11065 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11066 && TREE_OPERAND (rhs
, 0) == lhs
11067 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11068 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11069 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11071 rtx_code_label
*label
= gen_label_rtx ();
11072 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11073 do_jump (TREE_OPERAND (rhs
, 1),
11076 profile_probability::uninitialized ());
11077 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11079 do_pending_stack_adjust ();
11080 emit_label (label
);
11084 expand_assignment (lhs
, rhs
, false);
11089 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11091 case REALPART_EXPR
:
11092 op0
= expand_normal (treeop0
);
11093 return read_complex_part (op0
, false);
11095 case IMAGPART_EXPR
:
11096 op0
= expand_normal (treeop0
);
11097 return read_complex_part (op0
, true);
11104 /* Expanded in cfgexpand.c. */
11105 gcc_unreachable ();
11107 case TRY_CATCH_EXPR
:
11109 case EH_FILTER_EXPR
:
11110 case TRY_FINALLY_EXPR
:
11111 /* Lowered by tree-eh.c. */
11112 gcc_unreachable ();
11114 case WITH_CLEANUP_EXPR
:
11115 case CLEANUP_POINT_EXPR
:
11117 case CASE_LABEL_EXPR
:
11122 case COMPOUND_EXPR
:
11123 case PREINCREMENT_EXPR
:
11124 case PREDECREMENT_EXPR
:
11125 case POSTINCREMENT_EXPR
:
11126 case POSTDECREMENT_EXPR
:
11129 case COMPOUND_LITERAL_EXPR
:
11130 /* Lowered by gimplify.c. */
11131 gcc_unreachable ();
11134 /* Function descriptors are not valid except for as
11135 initialization constants, and should not be expanded. */
11136 gcc_unreachable ();
11138 case WITH_SIZE_EXPR
:
11139 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11140 have pulled out the size to use in whatever context it needed. */
11141 return expand_expr_real (treeop0
, original_target
, tmode
,
11142 modifier
, alt_rtl
, inner_reference_p
);
11145 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11149 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11150 signedness of TYPE), possibly returning the result in TARGET.
11151 TYPE is known to be a partial integer type. */
11153 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11155 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11156 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11158 /* For constant values, reduce using build_int_cst_type. */
11159 if (CONST_INT_P (exp
))
11161 HOST_WIDE_INT value
= INTVAL (exp
);
11162 tree t
= build_int_cst_type (type
, value
);
11163 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11165 else if (TYPE_UNSIGNED (type
))
11167 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11168 rtx mask
= immed_wide_int_const
11169 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11170 return expand_and (mode
, exp
, mask
, target
);
11174 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11175 int count
= GET_MODE_PRECISION (mode
) - prec
;
11176 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11177 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11181 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11182 when applied to the address of EXP produces an address known to be
11183 aligned more than BIGGEST_ALIGNMENT. */
11186 is_aligning_offset (const_tree offset
, const_tree exp
)
11188 /* Strip off any conversions. */
11189 while (CONVERT_EXPR_P (offset
))
11190 offset
= TREE_OPERAND (offset
, 0);
11192 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11193 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11194 if (TREE_CODE (offset
) != BIT_AND_EXPR
11195 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11196 || compare_tree_int (TREE_OPERAND (offset
, 1),
11197 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11198 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11201 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11202 It must be NEGATE_EXPR. Then strip any more conversions. */
11203 offset
= TREE_OPERAND (offset
, 0);
11204 while (CONVERT_EXPR_P (offset
))
11205 offset
= TREE_OPERAND (offset
, 0);
11207 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11210 offset
= TREE_OPERAND (offset
, 0);
11211 while (CONVERT_EXPR_P (offset
))
11212 offset
= TREE_OPERAND (offset
, 0);
11214 /* This must now be the address of EXP. */
11215 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11218 /* Return the tree node if an ARG corresponds to a string constant or zero
11219 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11220 in bytes within the string that ARG is accessing. The type of the
11221 offset will be `sizetype'. */
11224 string_constant (tree arg
, tree
*ptr_offset
)
11226 tree array
, offset
, lower_bound
;
11229 if (TREE_CODE (arg
) == ADDR_EXPR
)
11231 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
11233 *ptr_offset
= size_zero_node
;
11234 return TREE_OPERAND (arg
, 0);
11236 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
11238 array
= TREE_OPERAND (arg
, 0);
11239 offset
= size_zero_node
;
11241 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
11243 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11244 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11245 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11248 /* Check if the array has a nonzero lower bound. */
11249 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
11250 if (!integer_zerop (lower_bound
))
11252 /* If the offset and base aren't both constants, return 0. */
11253 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
11255 if (TREE_CODE (offset
) != INTEGER_CST
)
11257 /* Adjust offset by the lower bound. */
11258 offset
= size_diffop (fold_convert (sizetype
, offset
),
11259 fold_convert (sizetype
, lower_bound
));
11262 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
11264 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11265 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11266 if (TREE_CODE (array
) != ADDR_EXPR
)
11268 array
= TREE_OPERAND (array
, 0);
11269 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11275 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11277 tree arg0
= TREE_OPERAND (arg
, 0);
11278 tree arg1
= TREE_OPERAND (arg
, 1);
11283 if (TREE_CODE (arg0
) == ADDR_EXPR
11284 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
11285 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
11287 array
= TREE_OPERAND (arg0
, 0);
11290 else if (TREE_CODE (arg1
) == ADDR_EXPR
11291 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
11292 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
11294 array
= TREE_OPERAND (arg1
, 0);
11303 if (TREE_CODE (array
) == STRING_CST
)
11305 *ptr_offset
= fold_convert (sizetype
, offset
);
11308 else if (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11311 tree init
= ctor_for_folding (array
);
11313 /* Variables initialized to string literals can be handled too. */
11314 if (init
== error_mark_node
11316 || TREE_CODE (init
) != STRING_CST
)
11319 /* Avoid const char foo[4] = "abcde"; */
11320 if (DECL_SIZE_UNIT (array
) == NULL_TREE
11321 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
11322 || (length
= TREE_STRING_LENGTH (init
)) <= 0
11323 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
11326 /* If variable is bigger than the string literal, OFFSET must be constant
11327 and inside of the bounds of the string literal. */
11328 offset
= fold_convert (sizetype
, offset
);
11329 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
11330 && (! tree_fits_uhwi_p (offset
)
11331 || compare_tree_int (offset
, length
) >= 0))
11334 *ptr_offset
= offset
;
11341 /* Generate code to calculate OPS, and exploded expression
11342 using a store-flag instruction and return an rtx for the result.
11343 OPS reflects a comparison.
11345 If TARGET is nonzero, store the result there if convenient.
11347 Return zero if there is no suitable set-flag instruction
11348 available on this machine.
11350 Once expand_expr has been called on the arguments of the comparison,
11351 we are committed to doing the store flag, since it is not safe to
11352 re-evaluate the expression. We emit the store-flag insn by calling
11353 emit_store_flag, but only expand the arguments if we have a reason
11354 to believe that emit_store_flag will be successful. If we think that
11355 it will, but it isn't, we have to simulate the store-flag with a
11356 set/jump/set sequence. */
11359 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11361 enum rtx_code code
;
11362 tree arg0
, arg1
, type
;
11363 machine_mode operand_mode
;
11366 rtx subtarget
= target
;
11367 location_t loc
= ops
->location
;
11372 /* Don't crash if the comparison was erroneous. */
11373 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11376 type
= TREE_TYPE (arg0
);
11377 operand_mode
= TYPE_MODE (type
);
11378 unsignedp
= TYPE_UNSIGNED (type
);
11380 /* We won't bother with BLKmode store-flag operations because it would mean
11381 passing a lot of information to emit_store_flag. */
11382 if (operand_mode
== BLKmode
)
11385 /* We won't bother with store-flag operations involving function pointers
11386 when function pointers must be canonicalized before comparisons. */
11387 if (targetm
.have_canonicalize_funcptr_for_compare ()
11388 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11389 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11391 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11392 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11393 == FUNCTION_TYPE
))))
11399 /* For vector typed comparisons emit code to generate the desired
11400 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11401 expander for this. */
11402 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11404 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11405 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11406 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11407 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11410 tree if_true
= constant_boolean_node (true, ops
->type
);
11411 tree if_false
= constant_boolean_node (false, ops
->type
);
11412 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11417 /* Get the rtx comparison code to use. We know that EXP is a comparison
11418 operation of some type. Some comparisons against 1 and -1 can be
11419 converted to comparisons with zero. Do so here so that the tests
11420 below will be aware that we have a comparison with zero. These
11421 tests will not catch constants in the first operand, but constants
11422 are rarely passed as the first operand. */
11433 if (integer_onep (arg1
))
11434 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11436 code
= unsignedp
? LTU
: LT
;
11439 if (! unsignedp
&& integer_all_onesp (arg1
))
11440 arg1
= integer_zero_node
, code
= LT
;
11442 code
= unsignedp
? LEU
: LE
;
11445 if (! unsignedp
&& integer_all_onesp (arg1
))
11446 arg1
= integer_zero_node
, code
= GE
;
11448 code
= unsignedp
? GTU
: GT
;
11451 if (integer_onep (arg1
))
11452 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11454 code
= unsignedp
? GEU
: GE
;
11457 case UNORDERED_EXPR
:
11483 gcc_unreachable ();
11486 /* Put a constant second. */
11487 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11488 || TREE_CODE (arg0
) == FIXED_CST
)
11490 std::swap (arg0
, arg1
);
11491 code
= swap_condition (code
);
11494 /* If this is an equality or inequality test of a single bit, we can
11495 do this by shifting the bit being tested to the low-order bit and
11496 masking the result with the constant 1. If the condition was EQ,
11497 we xor it with 1. This does not require an scc insn and is faster
11498 than an scc insn even if we have it.
11500 The code to make this transformation was moved into fold_single_bit_test,
11501 so we just call into the folder and expand its result. */
11503 if ((code
== NE
|| code
== EQ
)
11504 && integer_zerop (arg1
)
11505 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11507 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11509 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11511 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11512 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11513 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11514 gimple_assign_rhs1 (srcstmt
),
11515 gimple_assign_rhs2 (srcstmt
));
11516 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11518 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11522 if (! get_subtarget (target
)
11523 || GET_MODE (subtarget
) != operand_mode
)
11526 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11529 target
= gen_reg_rtx (mode
);
11531 /* Try a cstore if possible. */
11532 return emit_store_flag_force (target
, code
, op0
, op1
,
11533 operand_mode
, unsignedp
,
11534 (TYPE_PRECISION (ops
->type
) == 1
11535 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11538 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11539 0 otherwise (i.e. if there is no casesi instruction).
11541 DEFAULT_PROBABILITY is the probability of jumping to the default
11544 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11545 rtx table_label
, rtx default_label
, rtx fallback_label
,
11546 profile_probability default_probability
)
11548 struct expand_operand ops
[5];
11549 scalar_int_mode index_mode
= SImode
;
11550 rtx op1
, op2
, index
;
11552 if (! targetm
.have_casesi ())
11555 /* The index must be some form of integer. Convert it to SImode. */
11556 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
11557 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
11559 rtx rangertx
= expand_normal (range
);
11561 /* We must handle the endpoints in the original mode. */
11562 index_expr
= build2 (MINUS_EXPR
, index_type
,
11563 index_expr
, minval
);
11564 minval
= integer_zero_node
;
11565 index
= expand_normal (index_expr
);
11567 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11568 omode
, 1, default_label
,
11569 default_probability
);
11570 /* Now we can safely truncate. */
11571 index
= convert_to_mode (index_mode
, index
, 0);
11575 if (omode
!= index_mode
)
11577 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11578 index_expr
= fold_convert (index_type
, index_expr
);
11581 index
= expand_normal (index_expr
);
11584 do_pending_stack_adjust ();
11586 op1
= expand_normal (minval
);
11587 op2
= expand_normal (range
);
11589 create_input_operand (&ops
[0], index
, index_mode
);
11590 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11591 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11592 create_fixed_operand (&ops
[3], table_label
);
11593 create_fixed_operand (&ops
[4], (default_label
11595 : fallback_label
));
11596 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11600 /* Attempt to generate a tablejump instruction; same concept. */
11601 /* Subroutine of the next function.
11603 INDEX is the value being switched on, with the lowest value
11604 in the table already subtracted.
11605 MODE is its expected mode (needed if INDEX is constant).
11606 RANGE is the length of the jump table.
11607 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11609 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11610 index value is out of range.
11611 DEFAULT_PROBABILITY is the probability of jumping to
11612 the default label. */
11615 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11616 rtx default_label
, profile_probability default_probability
)
11620 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11621 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11623 /* Do an unsigned comparison (in the proper mode) between the index
11624 expression and the value which represents the length of the range.
11625 Since we just finished subtracting the lower bound of the range
11626 from the index expression, this comparison allows us to simultaneously
11627 check that the original index expression value is both greater than
11628 or equal to the minimum value of the range and less than or equal to
11629 the maximum value of the range. */
11632 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11633 default_label
, default_probability
);
11636 /* If index is in range, it must fit in Pmode.
11637 Convert to Pmode so we can index with it. */
11639 index
= convert_to_mode (Pmode
, index
, 1);
11641 /* Don't let a MEM slip through, because then INDEX that comes
11642 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11643 and break_out_memory_refs will go to work on it and mess it up. */
11644 #ifdef PIC_CASE_VECTOR_ADDRESS
11645 if (flag_pic
&& !REG_P (index
))
11646 index
= copy_to_mode_reg (Pmode
, index
);
11649 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11650 GET_MODE_SIZE, because this indicates how large insns are. The other
11651 uses should all be Pmode, because they are addresses. This code
11652 could fail if addresses and insns are not the same size. */
11653 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11654 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11656 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11657 gen_rtx_LABEL_REF (Pmode
, table_label
));
11659 #ifdef PIC_CASE_VECTOR_ADDRESS
11661 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11664 index
= memory_address (CASE_VECTOR_MODE
, index
);
11665 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11666 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11667 convert_move (temp
, vector
, 0);
11669 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11671 /* If we are generating PIC code or if the table is PC-relative, the
11672 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11673 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11678 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11679 rtx table_label
, rtx default_label
,
11680 profile_probability default_probability
)
11684 if (! targetm
.have_tablejump ())
11687 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11688 fold_convert (index_type
, index_expr
),
11689 fold_convert (index_type
, minval
));
11690 index
= expand_normal (index_expr
);
11691 do_pending_stack_adjust ();
11693 do_tablejump (index
, TYPE_MODE (index_type
),
11694 convert_modes (TYPE_MODE (index_type
),
11695 TYPE_MODE (TREE_TYPE (range
)),
11696 expand_normal (range
),
11697 TYPE_UNSIGNED (TREE_TYPE (range
))),
11698 table_label
, default_label
, default_probability
);
11702 /* Return a CONST_VECTOR rtx representing vector mask for
11703 a VECTOR_CST of booleans. */
11705 const_vector_mask_from_tree (tree exp
)
11710 machine_mode inner
, mode
;
11712 mode
= TYPE_MODE (TREE_TYPE (exp
));
11713 units
= VECTOR_CST_NELTS (exp
);
11714 inner
= GET_MODE_INNER (mode
);
11716 v
= rtvec_alloc (units
);
11718 for (i
= 0; i
< units
; ++i
)
11720 elt
= VECTOR_CST_ELT (exp
, i
);
11722 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11723 if (integer_zerop (elt
))
11724 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
11725 else if (integer_onep (elt
)
11726 || integer_minus_onep (elt
))
11727 RTVEC_ELT (v
, i
) = CONSTM1_RTX (inner
);
11729 gcc_unreachable ();
11732 return gen_rtx_CONST_VECTOR (mode
, v
);
11735 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11736 Return a constant scalar rtx of mode MODE in which bit X is set if element
11737 X of EXP is nonzero. */
11739 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
11741 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11745 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11747 elt
= VECTOR_CST_ELT (exp
, i
);
11748 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11749 if (integer_all_onesp (elt
))
11750 res
= wi::set_bit (res
, i
);
11752 gcc_assert (integer_zerop (elt
));
11755 return immed_wide_int_const (res
, mode
);
11758 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11760 const_vector_from_tree (tree exp
)
11765 machine_mode inner
, mode
;
11767 mode
= TYPE_MODE (TREE_TYPE (exp
));
11769 if (initializer_zerop (exp
))
11770 return CONST0_RTX (mode
);
11772 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11773 return const_vector_mask_from_tree (exp
);
11775 units
= VECTOR_CST_NELTS (exp
);
11776 inner
= GET_MODE_INNER (mode
);
11778 v
= rtvec_alloc (units
);
11780 for (i
= 0; i
< units
; ++i
)
11782 elt
= VECTOR_CST_ELT (exp
, i
);
11784 if (TREE_CODE (elt
) == REAL_CST
)
11785 RTVEC_ELT (v
, i
) = const_double_from_real_value (TREE_REAL_CST (elt
),
11787 else if (TREE_CODE (elt
) == FIXED_CST
)
11788 RTVEC_ELT (v
, i
) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11791 RTVEC_ELT (v
, i
) = immed_wide_int_const (elt
, inner
);
11794 return gen_rtx_CONST_VECTOR (mode
, v
);
11797 /* Build a decl for a personality function given a language prefix. */
11800 build_personality_function (const char *lang
)
11802 const char *unwind_and_version
;
11806 switch (targetm_common
.except_unwind_info (&global_options
))
11811 unwind_and_version
= "_sj0";
11815 unwind_and_version
= "_v0";
11818 unwind_and_version
= "_seh0";
11821 gcc_unreachable ();
11824 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11826 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11827 long_long_unsigned_type_node
,
11828 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11829 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11830 get_identifier (name
), type
);
11831 DECL_ARTIFICIAL (decl
) = 1;
11832 DECL_EXTERNAL (decl
) = 1;
11833 TREE_PUBLIC (decl
) = 1;
11835 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11836 are the flags assigned by targetm.encode_section_info. */
11837 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11842 /* Extracts the personality function of DECL and returns the corresponding
11846 get_personality_function (tree decl
)
11848 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11849 enum eh_personality_kind pk
;
11851 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11852 if (pk
== eh_personality_none
)
11856 && pk
== eh_personality_any
)
11857 personality
= lang_hooks
.eh_personality ();
11859 if (pk
== eh_personality_lang
)
11860 gcc_assert (personality
!= NULL_TREE
);
11862 return XEXP (DECL_RTL (personality
), 0);
11865 /* Returns a tree for the size of EXP in bytes. */
11868 tree_expr_size (const_tree exp
)
11871 && DECL_SIZE_UNIT (exp
) != 0)
11872 return DECL_SIZE_UNIT (exp
);
11874 return size_in_bytes (TREE_TYPE (exp
));
11877 /* Return an rtx for the size in bytes of the value of EXP. */
11880 expr_size (tree exp
)
11884 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11885 size
= TREE_OPERAND (exp
, 1);
11888 size
= tree_expr_size (exp
);
11890 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
11893 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
11896 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11897 if the size can vary or is larger than an integer. */
11899 static HOST_WIDE_INT
11900 int_expr_size (tree exp
)
11904 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11905 size
= TREE_OPERAND (exp
, 1);
11908 size
= tree_expr_size (exp
);
11912 if (size
== 0 || !tree_fits_shwi_p (size
))
11915 return tree_to_shwi (size
);