gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O2 -dp" } */
   3
   4 #include <arm_neon.h>
   5
   6 /* Used to force a variable to a SIMD register.  */
   7 #define force_simd(V1)   asm volatile ("mov %d0, %1.d[0]"       \
   8            : "=w"(V1)                                           \
   9            : "w"(V1)                                            \
  10            : /* No clobbers */);
  11
  12 /* { dg-final { scan-assembler-times "\\tadd\\tx\[0-9\]+" 2 } } */
  13
  14 uint64_t
  15 test_vaddd_u64 (uint64_t a, uint64_t b)
  16 {
  17   return vaddd_u64 (a, b);
  18 }
  19
  20 int64_t
  21 test_vaddd_s64 (int64_t a, int64_t b)
  22 {
  23   return vaddd_s64 (a, b);
  24 }
  25
  26 /* { dg-final { scan-assembler-times "\\tadd\\td\[0-9\]+" 1 } } */
  27
  28 int64_t
  29 test_vaddd_s64_2 (int64_t a, int64_t b)
  30 {
  31   int64_t res;
  32   force_simd (a);
  33   force_simd (b);
  34   res = vaddd_s64 (a, b);
  35   force_simd (res);
  36   return res;
  37 }
  38
  39 /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
  40
  41 uint64_t
  42 test_vceqd_s64 (int64_t a, int64_t b)
  43 {
  44   uint64_t res;
  45   force_simd (a);
  46   force_simd (b);
  47   res = vceqd_s64 (a, b);
  48   force_simd (res);
  49   return res;
  50 }
  51
  52 /* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
  53
  54 uint64_t
  55 test_vceqzd_s64 (int64_t a)
  56 {
  57   uint64_t res;
  58   force_simd (a);
  59   res = vceqzd_s64 (a);
  60   force_simd (res);
  61   return res;
  62 }
  63
  64 /* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
  65
  66 uint64_t
  67 test_vcged_s64 (int64_t a, int64_t b)
  68 {
  69   uint64_t res;
  70   force_simd (a);
  71   force_simd (b);
  72   res = vcged_s64 (a, b);
  73   force_simd (res);
  74   return res;
  75 }
  76
  77 uint64_t
  78 test_vcled_s64 (int64_t a, int64_t b)
  79 {
  80   uint64_t res;
  81   force_simd (a);
  82   force_simd (b);
  83   res = vcled_s64 (a, b);
  84   force_simd (res);
  85   return res;
  86 }
  87
  88 /* Idiom recognition will cause this testcase not to generate
  89    the expected cmge instruction, so do not check for it.  */
  90
  91 uint64_t
  92 test_vcgezd_s64 (int64_t a)
  93 {
  94   uint64_t res;
  95   force_simd (a);
  96   res = vcgezd_s64 (a);
  97   force_simd (res);
  98   return res;
  99 }
 100
 101 /* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
 102
 103 uint64_t
 104 test_vcged_u64 (uint64_t a, uint64_t b)
 105 {
 106   uint64_t res;
 107   force_simd (a);
 108   force_simd (b);
 109   res = vcged_u64 (a, b);
 110   force_simd (res);
 111   return res;
 112 }
 113
 114 /* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
 115
 116 uint64_t
 117 test_vcgtd_s64 (int64_t a, int64_t b)
 118 {
 119   uint64_t res;
 120   force_simd (a);
 121   force_simd (b);
 122   res = vcgtd_s64 (a, b);
 123   force_simd (res);
 124   return res;
 125 }
 126
 127 uint64_t
 128 test_vcltd_s64 (int64_t a, int64_t b)
 129 {
 130   uint64_t res;
 131   force_simd (a);
 132   force_simd (b);
 133   res = vcltd_s64 (a, b);
 134   force_simd (res);
 135   return res;
 136 }
 137
 138 /* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
 139
 140 uint64_t
 141 test_vcgtzd_s64 (int64_t a)
 142 {
 143   uint64_t res;
 144   force_simd (a);
 145   res = vcgtzd_s64 (a);
 146   force_simd (res);
 147   return res;
 148 }
 149
 150 /* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
 151
 152 uint64_t
 153 test_vcgtd_u64 (uint64_t a, uint64_t b)
 154 {
 155   uint64_t res;
 156   force_simd (a);
 157   force_simd (b);
 158   res = vcgtd_u64 (a, b);
 159   force_simd (res);
 160   return res;
 161 }
 162
 163 /* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */
 164
 165 uint64_t
 166 test_vclezd_s64 (int64_t a)
 167 {
 168   uint64_t res;
 169   force_simd (a);
 170   res = vclezd_s64 (a);
 171   force_simd (res);
 172   return res;
 173 }
 174
 175 /* Idiom recognition will cause this testcase not to generate
 176    the expected cmlt instruction, so do not check for it.  */
 177
 178 uint64_t
 179 test_vcltzd_s64 (int64_t a)
 180 {
 181   uint64_t res;
 182   force_simd (a);
 183   res = vcltzd_s64 (a);
 184   force_simd (res);
 185   return res;
 186 }
 187
 188 /* { dg-final { scan-assembler-times "aarch64_get_lanev16qi" 2 } } */
 189
 190 int8x1_t
 191 test_vdupb_lane_s8 (int8x16_t a)
 192 {
 193   int8x1_t res;
 194   force_simd (a);
 195   res = vdupb_laneq_s8 (a, 2);
 196   force_simd (res);
 197   return res;
 198 }
 199
 200 uint8x1_t
 201 test_vdupb_lane_u8 (uint8x16_t a)
 202 {
 203   uint8x1_t res;
 204   force_simd (a);
 205   res = vdupb_laneq_u8 (a, 2);
 206   force_simd (res);
 207   return res;
 208 }
 209
 210 /* { dg-final { scan-assembler-times "aarch64_get_lanev8hi" 2 } } */
 211
 212 int16x1_t
 213 test_vduph_lane_s16 (int16x8_t a)
 214 {
 215   int16x1_t res;
 216   force_simd (a);
 217   res = vduph_laneq_s16 (a, 2);
 218   force_simd (res);
 219   return res;
 220 }
 221
 222 uint16x1_t
 223 test_vduph_lane_u16 (uint16x8_t a)
 224 {
 225   uint16x1_t res;
 226   force_simd (a);
 227   res = vduph_laneq_u16 (a, 2);
 228   force_simd (res);
 229   return res;
 230 }
 231
 232 /* { dg-final { scan-assembler-times "aarch64_get_lanev4si" 2 } } */
 233
 234 int32x1_t
 235 test_vdups_lane_s32 (int32x4_t a)
 236 {
 237   int32x1_t res;
 238   force_simd (a);
 239   res = vdups_laneq_s32 (a, 2);
 240   force_simd (res);
 241   return res;
 242 }
 243
 244 uint32x1_t
 245 test_vdups_lane_u32 (uint32x4_t a)
 246 {
 247   uint32x1_t res;
 248   force_simd (a);
 249   res = vdups_laneq_u32 (a, 2);
 250   force_simd (res);
 251   return res;
 252 }
 253
 254 /* { dg-final { scan-assembler-times "aarch64_get_lanev2di" 2 } } */
 255
 256 int64_t
 257 test_vdupd_laneq_s64 (int64x2_t a)
 258 {
 259   int64_t res = vdupd_laneq_s64 (a, 1);
 260   force_simd (res);
 261   return res;
 262 }
 263
 264 uint64_t
 265 test_vdupd_laneq_u64 (uint64x2_t a)
 266 {
 267   uint64_t res = vdupd_laneq_u64 (a, 1);
 268   force_simd (res);
 269   return res;
 270 }
 271
 272 /* { dg-final { scan-assembler-times "\\tcmtst\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */
 273
 274 uint64_t
 275 test_vtstd_s64 (int64_t a, int64_t b)
 276 {
 277   uint64_t res;
 278   force_simd (a);
 279   force_simd (b);
 280   res = vtstd_s64 (a, b);
 281   force_simd (res);
 282   return res;
 283 }
 284
 285 uint64_t
 286 test_vtstd_u64 (uint64_t a, uint64_t b)
 287 {
 288   uint64_t res;
 289   force_simd (a);
 290   force_simd (b);
 291   res = vtstd_u64 (a, b);
 292   force_simd (res);
 293   return res;
 294 }
 295
 296 /* { dg-final { scan-assembler-times "\\tfaddp\\td\[0-9\]+, v\[0-9\]+\.2d" 1 } } */
 297
 298 float64_t
 299 test_vpaddd_f64 (float64x2_t a)
 300 {
 301   return vpaddd_f64 (a);
 302 }
 303
 304 /* { dg-final { scan-assembler-times "\\taddp\\td\[0-9\]+, v\[0-9\]+\.2d" 2 } } */
 305
 306 int64_t
 307 test_vpaddd_s64 (int64x2_t a)
 308 {
 309   return vpaddd_s64 (a);
 310 }
 311
 312 uint64_t
 313 test_vpaddd_u64 (uint64x2_t a)
 314 {
 315   return vpaddd_u64 (a);
 316 }
 317
 318 /* { dg-final { scan-assembler-times "\\tuqadd\\td\[0-9\]+" 1 } } */
 319
 320 uint64_t
 321 test_vqaddd_u64 (uint64_t a, uint64_t b)
 322 {
 323   return vqaddd_u64 (a, b);
 324 }
 325
 326 /* { dg-final { scan-assembler-times "\\tuqadd\\ts\[0-9\]+" 1 } } */
 327
 328 uint32x1_t
 329 test_vqadds_u32 (uint32x1_t a, uint32x1_t b)
 330 {
 331   return vqadds_u32 (a, b);
 332 }
 333
 334 /* { dg-final { scan-assembler-times "\\tuqadd\\th\[0-9\]+" 1 } } */
 335
 336 uint16x1_t
 337 test_vqaddh_u16 (uint16x1_t a, uint16x1_t b)
 338 {
 339   return vqaddh_u16 (a, b);
 340 }
 341
 342 /* { dg-final { scan-assembler-times "\\tuqadd\\tb\[0-9\]+" 1 } } */
 343
 344 uint8x1_t
 345 test_vqaddb_u8 (uint8x1_t a, uint8x1_t b)
 346 {
 347   return vqaddb_u8 (a, b);
 348 }
 349
 350 /* { dg-final { scan-assembler-times "\\tsqadd\\td\[0-9\]+" 1 } } */
 351
 352 int64_t
 353 test_vqaddd_s64 (int64_t a, int64_t b)
 354 {
 355   return vqaddd_s64 (a, b);
 356 }
 357
 358 /* { dg-final { scan-assembler-times "\\tsqadd\\ts\[0-9\]+, s\[0-9\]+" 1 } } */
 359
 360 int32x1_t
 361 test_vqadds_s32 (int32x1_t a, int32x1_t b)
 362 {
 363   return vqadds_s32 (a, b);
 364 }
 365
 366 /* { dg-final { scan-assembler-times "\\tsqadd\\th\[0-9\]+, h\[0-9\]+" 1 } } */
 367
 368 int16x1_t
 369 test_vqaddh_s16 (int16x1_t a, int16x1_t b)
 370 {
 371   return vqaddh_s16 (a, b);
 372 }
 373
 374 /* { dg-final { scan-assembler-times "\\tsqadd\\tb\[0-9\]+, b\[0-9\]+" 1 } } */
 375
 376 int8x1_t
 377 test_vqaddb_s8 (int8x1_t a, int8x1_t b)
 378 {
 379   return vqaddb_s8 (a, b);
 380 }
 381
 382 /* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 383
 384 int32x1_t
 385 test_vqdmlalh_s16 (int32x1_t a, int16x1_t b, int16x1_t c)
 386 {
 387   return vqdmlalh_s16 (a, b, c);
 388 }
 389
 390 /* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 391
 392 int32x1_t
 393 test_vqdmlalh_lane_s16 (int32x1_t a, int16x1_t b, int16x4_t c)
 394 {
 395   return vqdmlalh_lane_s16 (a, b, c, 3);
 396 }
 397
 398 /* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 399
 400 int64_t
 401 test_vqdmlals_s32 (int64_t a, int32x1_t b, int32x1_t c)
 402 {
 403   return vqdmlals_s32 (a, b, c);
 404 }
 405
 406 /* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 407
 408 int64_t
 409 test_vqdmlals_lane_s32 (int64_t a, int32_t b, int32x2_t c)
 410 {
 411   return vqdmlals_lane_s32 (a, b, c, 1);
 412 }
 413
 414 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 415
 416 int32x1_t
 417 test_vqdmlslh_s16 (int32x1_t a, int16x1_t b, int16x1_t c)
 418 {
 419   return vqdmlslh_s16 (a, b, c);
 420 }
 421
 422 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 423
 424 int32x1_t
 425 test_vqdmlslh_lane_s16 (int32x1_t a, int16x1_t b, int16x4_t c)
 426 {
 427   return vqdmlslh_lane_s16 (a, b, c, 3);
 428 }
 429
 430 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 431
 432 int64_t
 433 test_vqdmlsls_s32 (int64_t a, int32x1_t b, int32x1_t c)
 434 {
 435   return vqdmlsls_s32 (a, b, c);
 436 }
 437
 438 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 439
 440 int64_t
 441 test_vqdmlsls_lane_s32 (int64_t a, int32_t b, int32x2_t c)
 442 {
 443   return vqdmlsls_lane_s32 (a, b, c, 1);
 444 }
 445
 446 /* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 447
 448 int16x1_t
 449 test_vqdmulhh_s16 (int16x1_t a, int16x1_t b)
 450 {
 451   return vqdmulhh_s16 (a, b);
 452 }
 453
 454 /* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */
 455
 456 int16x1_t
 457 test_vqdmulhh_lane_s16 (int16x1_t a, int16x4_t b)
 458 {
 459   return vqdmulhh_lane_s16 (a, b, 3);
 460 }
 461
 462 /* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 463
 464 int32x1_t
 465 test_vqdmulhs_s32 (int32x1_t a, int32x1_t b)
 466 {
 467   return vqdmulhs_s32 (a, b);
 468 }
 469
 470 /* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */
 471
 472 int32x1_t
 473 test_vqdmulhs_lane_s32 (int32x1_t a, int32x2_t b)
 474 {
 475   return vqdmulhs_lane_s32 (a, b, 1);
 476 }
 477
 478 /* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 479
 480 int32x1_t
 481 test_vqdmullh_s16 (int16x1_t a, int16x1_t b)
 482 {
 483   return vqdmullh_s16 (a, b);
 484 }
 485
 486 /* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 487
 488 int32x1_t
 489 test_vqdmullh_lane_s16 (int16x1_t a, int16x4_t b)
 490 {
 491   return vqdmullh_lane_s16 (a, b, 3);
 492 }
 493
 494 /* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 495
 496 int64_t
 497 test_vqdmulls_s32 (int32x1_t a, int32x1_t b)
 498 {
 499   return vqdmulls_s32 (a, b);
 500 }
 501
 502 /* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 503
 504 int64x1_t
 505 test_vqdmulls_lane_s32 (int32x1_t a, int32x2_t b)
 506 {
 507   return vqdmulls_lane_s32 (a, b, 1);
 508 }
 509
 510 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 511
 512 int16x1_t
 513 test_vqrdmulhh_s16 (int16x1_t a, int16x1_t b)
 514 {
 515   return vqrdmulhh_s16 (a, b);
 516 }
 517
 518 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */
 519
 520 int16x1_t
 521 test_vqrdmulhh_lane_s16 (int16x1_t a, int16x4_t b)
 522 {
 523   return vqrdmulhh_lane_s16 (a, b, 3);
 524 }
 525
 526 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 527
 528 int32x1_t
 529 test_vqrdmulhs_s32 (int32x1_t a, int32x1_t b)
 530 {
 531   return vqrdmulhs_s32 (a, b);
 532 }
 533
 534 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */
 535
 536 int32x1_t
 537 test_vqrdmulhs_lane_s32 (int32x1_t a, int32x2_t b)
 538 {
 539   return vqrdmulhs_lane_s32 (a, b, 1);
 540 }
 541
 542 /* { dg-final { scan-assembler-times "\\tsuqadd\\tb\[0-9\]+" 1 } } */
 543
 544 int8x1_t
 545 test_vuqaddb_s8 (int8x1_t a, int8x1_t b)
 546 {
 547   return vuqaddb_s8 (a, b);
 548 }
 549
 550 /* { dg-final { scan-assembler-times "\\tsuqadd\\th\[0-9\]+" 1 } } */
 551
 552 int16x1_t
 553 test_vuqaddh_s16 (int16x1_t a, int8x1_t b)
 554 {
 555   return vuqaddh_s16 (a, b);
 556 }
 557
 558 /* { dg-final { scan-assembler-times "\\tsuqadd\\ts\[0-9\]+" 1 } } */
 559
 560 int32x1_t
 561 test_vuqadds_s32 (int32x1_t a, int8x1_t b)
 562 {
 563   return vuqadds_s32 (a, b);
 564 }
 565
 566 /* { dg-final { scan-assembler-times "\\tsuqadd\\td\[0-9\]+" 1 } } */
 567
 568 int64_t
 569 test_vuqaddd_s64 (int64_t a, uint64_t b)
 570 {
 571   return vuqaddd_s64 (a, b);
 572 }
 573
 574 /* { dg-final { scan-assembler-times "\\tusqadd\\tb\[0-9\]+" 1 } } */
 575
 576 uint8x1_t
 577 test_vsqaddb_u8 (uint8x1_t a, int8x1_t b)
 578 {
 579   return vsqaddb_u8 (a, b);
 580 }
 581
 582 /* { dg-final { scan-assembler-times "\\tusqadd\\th\[0-9\]+" 1 } } */
 583
 584 uint16x1_t
 585 test_vsqaddh_u16 (uint16x1_t a, int8x1_t b)
 586 {
 587   return vsqaddh_u16 (a, b);
 588 }
 589
 590 /* { dg-final { scan-assembler-times "\\tusqadd\\ts\[0-9\]+" 1 } } */
 591
 592 uint32x1_t
 593 test_vsqadds_u32 (uint32x1_t a, int8x1_t b)
 594 {
 595   return vsqadds_u32 (a, b);
 596 }
 597
 598 /* { dg-final { scan-assembler-times "\\tusqadd\\td\[0-9\]+" 1 } } */
 599
 600 uint64_t
 601 test_vsqaddd_u64 (uint64_t a, int64_t b)
 602 {
 603   return vsqaddd_u64 (a, b);
 604 }
 605
 606 /* { dg-final { scan-assembler-times "\\tsqabs\\tb\[0-9\]+" 1 } } */
 607
 608 int8x1_t
 609 test_vqabsb_s8 (int8x1_t a)
 610 {
 611   return vqabsb_s8 (a);
 612 }
 613
 614 /* { dg-final { scan-assembler-times "\\tsqabs\\th\[0-9\]+" 1 } } */
 615
 616 int16x1_t
 617 test_vqabsh_s16 (int16x1_t a)
 618 {
 619   return vqabsh_s16 (a);
 620 }
 621
 622 /* { dg-final { scan-assembler-times "\\tsqabs\\ts\[0-9\]+" 1 } } */
 623
 624 int32x1_t
 625 test_vqabss_s32 (int32x1_t a)
 626 {
 627   return vqabss_s32 (a);
 628 }
 629
 630 /* { dg-final { scan-assembler-times "\\tsqneg\\tb\[0-9\]+" 1 } } */
 631
 632 int8x1_t
 633 test_vqnegb_s8 (int8x1_t a)
 634 {
 635   return vqnegb_s8 (a);
 636 }
 637
 638 /* { dg-final { scan-assembler-times "\\tsqneg\\th\[0-9\]+" 1 } } */
 639
 640 int16x1_t
 641 test_vqnegh_s16 (int16x1_t a)
 642 {
 643   return vqnegh_s16 (a);
 644 }
 645
 646 /* { dg-final { scan-assembler-times "\\tsqneg\\ts\[0-9\]+" 1 } } */
 647
 648 int32x1_t
 649 test_vqnegs_s32 (int32x1_t a)
 650 {
 651   return vqnegs_s32 (a);
 652 }
 653
 654 /* { dg-final { scan-assembler-times "\\tsqxtun\\tb\[0-9\]+" 1 } } */
 655
 656 int8x1_t
 657 test_vqmovunh_s16 (int16x1_t a)
 658 {
 659   return vqmovunh_s16 (a);
 660 }
 661
 662 /* { dg-final { scan-assembler-times "\\tsqxtun\\th\[0-9\]+" 1 } } */
 663
 664 int16x1_t
 665 test_vqmovuns_s32 (int32x1_t a)
 666 {
 667   return vqmovuns_s32 (a);
 668 }
 669
 670 /* { dg-final { scan-assembler-times "\\tsqxtun\\ts\[0-9\]+" 1 } } */
 671
 672 int32x1_t
 673 test_vqmovund_s64 (int64_t a)
 674 {
 675   return vqmovund_s64 (a);
 676 }
 677
 678 /* { dg-final { scan-assembler-times "\\tsqxtn\\tb\[0-9\]+" 1 } } */
 679
 680 int8x1_t
 681 test_vqmovnh_s16 (int16x1_t a)
 682 {
 683   return vqmovnh_s16 (a);
 684 }
 685
 686 /* { dg-final { scan-assembler-times "\\tsqxtn\\th\[0-9\]+" 1 } } */
 687
 688 int16x1_t
 689 test_vqmovns_s32 (int32x1_t a)
 690 {
 691   return vqmovns_s32 (a);
 692 }
 693
 694 /* { dg-final { scan-assembler-times "\\tsqxtn\\ts\[0-9\]+" 1 } } */
 695
 696 int32x1_t
 697 test_vqmovnd_s64 (int64_t a)
 698 {
 699   return vqmovnd_s64 (a);
 700 }
 701
 702 /* { dg-final { scan-assembler-times "\\tuqxtn\\tb\[0-9\]+" 1 } } */
 703
 704 uint8x1_t
 705 test_vqmovnh_u16 (uint16x1_t a)
 706 {
 707   return vqmovnh_u16 (a);
 708 }
 709
 710 /* { dg-final { scan-assembler-times "\\tuqxtn\\th\[0-9\]+" 1 } } */
 711
 712 uint16x1_t
 713 test_vqmovns_u32 (uint32x1_t a)
 714 {
 715   return vqmovns_u32 (a);
 716 }
 717
 718 /* { dg-final { scan-assembler-times "\\tuqxtn\\ts\[0-9\]+" 1 } } */
 719
 720 uint32x1_t
 721 test_vqmovnd_u64 (uint64_t a)
 722 {
 723   return vqmovnd_u64 (a);
 724 }
 725
 726 /* { dg-final { scan-assembler-times "\\tsub\\tx\[0-9\]+" 2 } } */
 727
 728 uint64_t
 729 test_vsubd_u64 (uint64_t a, uint64_t b)
 730 {
 731   return vsubd_u64 (a, b);
 732 }
 733
 734 int64_t
 735 test_vsubd_s64 (int64_t a, int64_t b)
 736 {
 737   return vsubd_s64 (a, b);
 738 }
 739
 740 /* { dg-final { scan-assembler-times "\\tsub\\td\[0-9\]+" 1 } } */
 741
 742 int64_t
 743 test_vsubd_s64_2 (int64_t a, int64_t b)
 744 {
 745   int64_t res;
 746   force_simd (a);
 747   force_simd (b);
 748   res = vsubd_s64 (a, b);
 749   force_simd (res);
 750   return res;
 751 }
 752
 753 /* { dg-final { scan-assembler-times "\\tuqsub\\td\[0-9\]+" 1 } } */
 754
 755 uint64_t
 756 test_vqsubd_u64 (uint64_t a, uint64_t b)
 757 {
 758   return vqsubd_u64 (a, b);
 759 }
 760
 761 /* { dg-final { scan-assembler-times "\\tuqsub\\ts\[0-9\]+" 1 } } */
 762
 763 uint32x1_t
 764 test_vqsubs_u32 (uint32x1_t a, uint32x1_t b)
 765 {
 766   return vqsubs_u32 (a, b);
 767 }
 768
 769 /* { dg-final { scan-assembler-times "\\tuqsub\\th\[0-9\]+" 1 } } */
 770
 771 uint16x1_t
 772 test_vqsubh_u16 (uint16x1_t a, uint16x1_t b)
 773 {
 774   return vqsubh_u16 (a, b);
 775 }
 776
 777 /* { dg-final { scan-assembler-times "\\tuqsub\\tb\[0-9\]+" 1 } } */
 778
 779 uint8x1_t
 780 test_vqsubb_u8 (uint8x1_t a, uint8x1_t b)
 781 {
 782   return vqsubb_u8 (a, b);
 783 }
 784
 785 /* { dg-final { scan-assembler-times "\\tsqsub\\td\[0-9\]+" 1 } } */
 786
 787 int64_t
 788 test_vqsubd_s64 (int64_t a, int64_t b)
 789 {
 790   return vqsubd_s64 (a, b);
 791 }
 792
 793 /* { dg-final { scan-assembler-times "\\tsqsub\\ts\[0-9\]+" 1 } } */
 794
 795 int32x1_t
 796 test_vqsubs_s32 (int32x1_t a, int32x1_t b)
 797 {
 798   return vqsubs_s32 (a, b);
 799 }
 800
 801 /* { dg-final { scan-assembler-times "\\tsqsub\\th\[0-9\]+" 1 } } */
 802
 803 int16x1_t
 804 test_vqsubh_s16 (int16x1_t a, int16x1_t b)
 805 {
 806   return vqsubh_s16 (a, b);
 807 }
 808
 809 /* { dg-final { scan-assembler-times "\\tsqsub\\tb\[0-9\]+" 1 } } */
 810
 811 int8x1_t
 812 test_vqsubb_s8 (int8x1_t a, int8x1_t b)
 813 {
 814   return vqsubb_s8 (a, b);
 815 }
 816
 817 /* { dg-final { scan-assembler-times "\\tsshl\\td\[0-9\]+" 1 } } */
 818
 819 int64_t
 820 test_vshld_s64 (int64_t a, int64_t b)
 821 {
 822   return vshld_s64 (a, b);
 823 }
 824
 825 /* { dg-final { scan-assembler-times "\\tushl\\td\[0-9\]+" 1 } } */
 826
 827 uint64_t
 828 test_vshld_u64 (uint64_t a, uint64_t b)
 829 {
 830   return vshld_u64 (a, b);
 831 }
 832
 833 /* { dg-final { scan-assembler-times "\\tsrshl\\td\[0-9\]+" 1 } } */
 834
 835 int64_t
 836 test_vrshld_s64 (int64_t a, int64_t b)
 837 {
 838   return vrshld_s64 (a, b);
 839 }
 840
 841 /* { dg-final { scan-assembler-times "\\turshl\\td\[0-9\]+" 1 } } */
 842
 843 uint64_t
 844 test_vrshld_u64 (uint64_t a, int64_t b)
 845 {
 846   return vrshld_u64 (a, b);
 847 }
 848
 849 /* Other intrinsics can generate an asr instruction (vcltzd, vcgezd),
 850    so we cannot check scan-assembler-times.  */
 851
 852 /* { dg-final { scan-assembler "\\tasr\\tx\[0-9\]+" } } */
 853
 854 int64_t
 855 test_vshrd_n_s64 (int64_t a)
 856 {
 857   return vshrd_n_s64 (a, 5);
 858 }
 859
 860 /* { dg-final { scan-assembler-times "\\tlsr\\tx\[0-9\]+" 1 } } */
 861
 862 uint64_t
 863 test_vshrd_n_u64 (uint64_t a)
 864 {
 865   return vshrd_n_u64 (a, 3);
 866 }
 867
 868 /* { dg-final { scan-assembler-times "\\tssra\\td\[0-9\]+" 1 } } */
 869
 870 int64_t
 871 test_vsrad_n_s64 (int64_t a, int64_t b)
 872 {
 873   return vsrad_n_s64 (a, b, 2);
 874 }
 875
 876 /* { dg-final { scan-assembler-times "\\tusra\\td\[0-9\]+" 1 } } */
 877
 878 uint64_t
 879 test_vsrad_n_u64 (uint64_t a, uint64_t b)
 880 {
 881   return vsrad_n_u64 (a, b, 5);
 882 }
 883
 884 /* { dg-final { scan-assembler-times "\\tsrshr\\td\[0-9\]+" 1 } } */
 885
 886 int64_t
 887 test_vrshrd_n_s64 (int64_t a)
 888 {
 889   return vrshrd_n_s64 (a, 5);
 890 }
 891
 892 /* { dg-final { scan-assembler-times "\\turshr\\td\[0-9\]+" 1 } } */
 893
 894 uint64_t
 895 test_vrshrd_n_u64 (uint64_t a)
 896 {
 897   return vrshrd_n_u64 (a, 3);
 898 }
 899
 900 /* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */
 901
 902 int64_t
 903 test_vrsrad_n_s64 (int64_t a, int64_t b)
 904 {
 905   return vrsrad_n_s64 (a, b, 3);
 906 }
 907
 908 /* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */
 909
 910 uint64_t
 911 test_vrsrad_n_u64 (uint64_t a, uint64_t b)
 912 {
 913   return vrsrad_n_u64 (a, b, 4);
 914 }
 915
 916 /* { dg-final { scan-assembler-times "\\tsqrshl\\tb\[0-9\]+" 1 } } */
 917
 918 int8x1_t
 919 test_vqrshlb_s8 (int8x1_t a, int8x1_t b)
 920 {
 921   return vqrshlb_s8 (a, b);
 922 }
 923
 924 /* { dg-final { scan-assembler-times "\\tsqrshl\\th\[0-9\]+" 1 } } */
 925
 926 int16x1_t
 927 test_vqrshlh_s16 (int16x1_t a, int16x1_t b)
 928 {
 929   return vqrshlh_s16 (a, b);
 930 }
 931
 932 /* { dg-final { scan-assembler-times "\\tsqrshl\\ts\[0-9\]+" 1 } } */
 933
 934 int32x1_t
 935 test_vqrshls_s32 (int32x1_t a, int32x1_t b)
 936 {
 937   return vqrshls_s32 (a, b);
 938 }
 939
 940 /* { dg-final { scan-assembler-times "\\tsqrshl\\td\[0-9\]+" 1 } } */
 941
 942 int64_t
 943 test_vqrshld_s64 (int64_t a, int64_t b)
 944 {
 945   return vqrshld_s64 (a, b);
 946 }
 947
 948 /* { dg-final { scan-assembler-times "\\tuqrshl\\tb\[0-9\]+" 1 } } */
 949
 950 uint8x1_t
 951 test_vqrshlb_u8 (uint8x1_t a, uint8x1_t b)
 952 {
 953   return vqrshlb_u8 (a, b);
 954 }
 955
 956 /* { dg-final { scan-assembler-times "\\tuqrshl\\th\[0-9\]+" 1 } } */
 957
 958 uint16x1_t
 959 test_vqrshlh_u16 (uint16x1_t a, uint16x1_t b)
 960 {
 961   return vqrshlh_u16 (a, b);
 962 }
 963
 964 /* { dg-final { scan-assembler-times "\\tuqrshl\\ts\[0-9\]+" 1 } } */
 965
 966 uint32x1_t
 967 test_vqrshls_u32 (uint32x1_t a, uint32x1_t b)
 968 {
 969   return vqrshls_u32 (a, b);
 970 }
 971
 972 /* { dg-final { scan-assembler-times "\\tuqrshl\\td\[0-9\]+" 1 } } */
 973
 974 uint64_t
 975 test_vqrshld_u64 (uint64_t a, uint64_t b)
 976 {
 977   return vqrshld_u64 (a, b);
 978 }
 979
 980 /* { dg-final { scan-assembler-times "\\tsqshlu\\tb\[0-9\]+" 1 } } */
 981
 982 int8x1_t
 983 test_vqshlub_n_s8 (int8x1_t a)
 984 {
 985   return vqshlub_n_s8 (a, 3);
 986 }
 987
 988 /* { dg-final { scan-assembler-times "\\tsqshlu\\th\[0-9\]+" 1 } } */
 989
 990 int16x1_t
 991 test_vqshluh_n_s16 (int16x1_t a)
 992 {
 993   return vqshluh_n_s16 (a, 4);
 994 }
 995
 996 /* { dg-final { scan-assembler-times "\\tsqshlu\\ts\[0-9\]+" 1 } } */
 997
 998 int32x1_t
 999 test_vqshlus_n_s32 (int32x1_t a)
1000 {
1001   return vqshlus_n_s32 (a, 5);
1002 }
1003
1004 /* { dg-final { scan-assembler-times "\\tsqshlu\\td\[0-9\]+" 1 } } */
1005
1006 int64_t
1007 test_vqshlud_n_s64 (int64_t a)
1008 {
1009   return vqshlud_n_s64 (a, 6);
1010 }
1011
1012 /* { dg-final { scan-assembler-times "\\tsqshl\\tb\[0-9\]+" 2 } } */
1013
1014 int8x1_t
1015 test_vqshlb_s8 (int8x1_t a, int8x1_t b)
1016 {
1017   return vqshlb_s8 (a, b);
1018 }
1019
1020 int8x1_t
1021 test_vqshlb_n_s8 (int8x1_t a)
1022 {
1023   return vqshlb_n_s8 (a, 2);
1024 }
1025
1026 /* { dg-final { scan-assembler-times "\\tsqshl\\th\[0-9\]+" 2 } } */
1027
1028 int16x1_t
1029 test_vqshlh_s16 (int16x1_t a, int16x1_t b)
1030 {
1031   return vqshlh_s16 (a, b);
1032 }
1033
1034 int16x1_t
1035 test_vqshlh_n_s16 (int16x1_t a)
1036 {
1037   return vqshlh_n_s16 (a, 3);
1038 }
1039
1040 /* { dg-final { scan-assembler-times "\\tsqshl\\ts\[0-9\]+" 2 } } */
1041
1042 int32x1_t
1043 test_vqshls_s32 (int32x1_t a, int32x1_t b)
1044 {
1045   return vqshls_s32 (a, b);
1046 }
1047
1048 int32x1_t
1049 test_vqshls_n_s32 (int32x1_t a)
1050 {
1051   return vqshls_n_s32 (a, 4);
1052 }
1053
1054 /* { dg-final { scan-assembler-times "\\tsqshl\\td\[0-9\]+" 2 } } */
1055
1056 int64_t
1057 test_vqshld_s64 (int64_t a, int64_t b)
1058 {
1059   return vqshld_s64 (a, b);
1060 }
1061
1062 int64_t
1063 test_vqshld_n_s64 (int64_t a)
1064 {
1065   return vqshld_n_s64 (a, 5);
1066 }
1067
1068 /* { dg-final { scan-assembler-times "\\tuqshl\\tb\[0-9\]+" 2 } } */
1069
1070 uint8x1_t
1071 test_vqshlb_u8 (uint8x1_t a, uint8x1_t b)
1072 {
1073   return vqshlb_u8 (a, b);
1074 }
1075
1076 uint8x1_t
1077 test_vqshlb_n_u8 (uint8x1_t a)
1078 {
1079   return vqshlb_n_u8 (a, 2);
1080 }
1081
1082 /* { dg-final { scan-assembler-times "\\tuqshl\\th\[0-9\]+" 2 } } */
1083
1084 uint16x1_t
1085 test_vqshlh_u16 (uint16x1_t a, uint16x1_t b)
1086 {
1087   return vqshlh_u16 (a, b);
1088 }
1089
1090 uint16x1_t
1091 test_vqshlh_n_u16 (uint16x1_t a)
1092 {
1093   return vqshlh_n_u16 (a, 3);
1094 }
1095
1096 /* { dg-final { scan-assembler-times "\\tuqshl\\ts\[0-9\]+" 2 } } */
1097
1098 uint32x1_t
1099 test_vqshls_u32 (uint32x1_t a, uint32x1_t b)
1100 {
1101   return vqshls_u32 (a, b);
1102 }
1103
1104 uint32x1_t
1105 test_vqshls_n_u32 (uint32x1_t a)
1106 {
1107   return vqshls_n_u32 (a, 4);
1108 }
1109
1110 /* { dg-final { scan-assembler-times "\\tuqshl\\td\[0-9\]+" 2 } } */
1111
1112 uint64_t
1113 test_vqshld_u64 (uint64_t a, int64_t b)
1114 {
1115   return vqshld_u64 (a, b);
1116 }
1117
1118 uint64_t
1119 test_vqshld_n_u64 (uint64_t a)
1120 {
1121   return vqshld_n_u64 (a, 5);
1122 }
1123
1124 /* { dg-final { scan-assembler-times "\\tsqshrun\\tb\[0-9\]+" 1 } } */
1125
1126 int8x1_t
1127 test_vqshrunh_n_s16 (int16x1_t a)
1128 {
1129   return vqshrunh_n_s16 (a, 2);
1130 }
1131
1132 /* { dg-final { scan-assembler-times "\\tsqshrun\\th\[0-9\]+" 1 } } */
1133
1134 int16x1_t
1135 test_vqshruns_n_s32 (int32x1_t a)
1136 {
1137   return vqshruns_n_s32 (a, 3);
1138 }
1139
1140 /* { dg-final { scan-assembler-times "\\tsqshrun\\ts\[0-9\]+" 1 } } */
1141
1142 int32x1_t
1143 test_vqshrund_n_s64 (int64_t a)
1144 {
1145   return vqshrund_n_s64 (a, 4);
1146 }
1147
1148 /* { dg-final { scan-assembler-times "\\tsqrshrun\\tb\[0-9\]+" 1 } } */
1149
1150 int8x1_t
1151 test_vqrshrunh_n_s16 (int16x1_t a)
1152 {
1153   return vqrshrunh_n_s16 (a, 2);
1154 }
1155
1156 /* { dg-final { scan-assembler-times "\\tsqrshrun\\th\[0-9\]+" 1 } } */
1157
1158 int16x1_t
1159 test_vqrshruns_n_s32 (int32x1_t a)
1160 {
1161   return vqrshruns_n_s32 (a, 3);
1162 }
1163
1164 /* { dg-final { scan-assembler-times "\\tsqrshrun\\ts\[0-9\]+" 1 } } */
1165
1166 int32x1_t
1167 test_vqrshrund_n_s64 (int64_t a)
1168 {
1169   return vqrshrund_n_s64 (a, 4);
1170 }
1171
1172 /* { dg-final { scan-assembler-times "\\tsqshrn\\tb\[0-9\]+" 1 } } */
1173
1174 int8x1_t
1175 test_vqshrnh_n_s16 (int16x1_t a)
1176 {
1177   return vqshrnh_n_s16 (a, 2);
1178 }
1179
1180 /* { dg-final { scan-assembler-times "\\tsqshrn\\th\[0-9\]+" 1 } } */
1181
1182 int16x1_t
1183 test_vqshrns_n_s32 (int32x1_t a)
1184 {
1185   return vqshrns_n_s32 (a, 3);
1186 }
1187
1188 /* { dg-final { scan-assembler-times "\\tsqshrn\\ts\[0-9\]+" 1 } } */
1189
1190 int32x1_t
1191 test_vqshrnd_n_s64 (int64_t a)
1192 {
1193   return vqshrnd_n_s64 (a, 4);
1194 }
1195
1196 /* { dg-final { scan-assembler-times "\\tuqshrn\\tb\[0-9\]+" 1 } } */
1197
1198 uint8x1_t
1199 test_vqshrnh_n_u16 (uint16x1_t a)
1200 {
1201   return vqshrnh_n_u16 (a, 2);
1202 }
1203
1204 /* { dg-final { scan-assembler-times "\\tuqshrn\\th\[0-9\]+" 1 } } */
1205
1206 uint16x1_t
1207 test_vqshrns_n_u32 (uint32x1_t a)
1208 {
1209   return vqshrns_n_u32 (a, 3);
1210 }
1211
1212 /* { dg-final { scan-assembler-times "\\tuqshrn\\ts\[0-9\]+" 1 } } */
1213
1214 uint32x1_t
1215 test_vqshrnd_n_u64 (uint64_t a)
1216 {
1217   return vqshrnd_n_u64 (a, 4);
1218 }
1219
1220 /* { dg-final { scan-assembler-times "\\tsqrshrn\\tb\[0-9\]+" 1 } } */
1221
1222 int8x1_t
1223 test_vqrshrnh_n_s16 (int16x1_t a)
1224 {
1225   return vqrshrnh_n_s16 (a, 2);
1226 }
1227
1228 /* { dg-final { scan-assembler-times "\\tsqrshrn\\th\[0-9\]+" 1 } } */
1229
1230 int16x1_t
1231 test_vqrshrns_n_s32 (int32x1_t a)
1232 {
1233   return vqrshrns_n_s32 (a, 3);
1234 }
1235
1236 /* { dg-final { scan-assembler-times "\\tsqrshrn\\ts\[0-9\]+" 1 } } */
1237
1238 int32x1_t
1239 test_vqrshrnd_n_s64 (int64_t a)
1240 {
1241   return vqrshrnd_n_s64 (a, 4);
1242 }
1243
1244 /* { dg-final { scan-assembler-times "\\tuqrshrn\\tb\[0-9\]+" 1 } } */
1245
1246 uint8x1_t
1247 test_vqrshrnh_n_u16 (uint16x1_t a)
1248 {
1249   return vqrshrnh_n_u16 (a, 2);
1250 }
1251
1252 /* { dg-final { scan-assembler-times "\\tuqrshrn\\th\[0-9\]+" 1 } } */
1253
1254 uint16x1_t
1255 test_vqrshrns_n_u32 (uint32x1_t a)
1256 {
1257   return vqrshrns_n_u32 (a, 3);
1258 }
1259
1260 /* { dg-final { scan-assembler-times "\\tuqrshrn\\ts\[0-9\]+" 1 } } */
1261
1262 uint32x1_t
1263 test_vqrshrnd_n_u64 (uint64_t a)
1264 {
1265   return vqrshrnd_n_u64 (a, 4);
1266 }
1267
1268 /* { dg-final { scan-assembler-times "\\tlsl\\tx\[0-9\]+" 2 } } */
1269
1270 int64_t
1271 test_vshld_n_s64 (int64_t a)
1272 {
1273   return vshld_n_s64 (a, 9);
1274 }
1275
1276 uint64_t
1277 test_vshdl_n_u64 (uint64_t a)
1278 {
1279   return vshld_n_u64 (a, 9);
1280 }
1281
1282 /* { dg-final { scan-assembler-times "\\tsli\\td\[0-9\]+" 2 } } */
1283
1284 int64_t
1285 test_vslid_n_s64 (int64_t a, int64_t b)
1286 {
1287   return vslid_n_s64 (a, b, 9);
1288 }
1289
1290 uint64_t
1291 test_vslid_n_u64 (uint64_t a, uint64_t b)
1292 {
1293   return vslid_n_u64 (a, b, 9);
1294 }
1295
1296 /* { dg-final { scan-assembler-times "\\tsri\\td\[0-9\]+" 2 } } */
1297
1298 int64_t
1299 test_vsrid_n_s64 (int64_t a, int64_t b)
1300 {
1301   return vsrid_n_s64 (a, b, 9);
1302 }
1303
1304 uint64_t
1305 test_vsrid_n_u64 (uint64_t a, uint64_t b)
1306 {
1307   return vsrid_n_u64 (a, b, 9);
1308 }