| blob | 9cf937b2714b867bf5c8ff9e00c0ff738210f993 |
1 2018-01-16 Jakub Jelinek <jakub@redhat.com>
3 PR rtl-optimization/86620
4 * params.def (max-sched-ready-insns): Bump minimum value to 1.
6 PR rtl-optimization/83213
7 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
8 to last if both are JUMP_INSNs.
10 PR tree-optimization/83843
11 * gimple-ssa-store-merging.c
12 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
13 store_immediate_info for bswap/nop orig_stores.
15 2018-01-15 Andrew Waterman <andrew@sifive.com>
17 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
18 !TARGET_MUL.
19 <UDIV>: Increase cost if !TARGET_DIV.
21 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
23 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
24 (define_attr "cr_logical_3op"): New.
25 (cceq_ior_compare): Adjust.
26 (cceq_ior_compare_complement): Adjust.
27 (*cceq_rev_compare): Adjust.
28 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
29 (is_cracked_insn): Adjust.
30 (insn_must_be_first_in_group): Adjust.
31 * config/rs6000/40x.md: Adjust.
32 * config/rs6000/440.md: Adjust.
33 * config/rs6000/476.md: Adjust.
34 * config/rs6000/601.md: Adjust.
35 * config/rs6000/603.md: Adjust.
36 * config/rs6000/6xx.md: Adjust.
37 * config/rs6000/7450.md: Adjust.
38 * config/rs6000/7xx.md: Adjust.
39 * config/rs6000/8540.md: Adjust.
40 * config/rs6000/cell.md: Adjust.
41 * config/rs6000/e300c2c3.md: Adjust.
42 * config/rs6000/e500mc.md: Adjust.
43 * config/rs6000/e500mc64.md: Adjust.
44 * config/rs6000/e5500.md: Adjust.
45 * config/rs6000/e6500.md: Adjust.
46 * config/rs6000/mpc.md: Adjust.
47 * config/rs6000/power4.md: Adjust.
48 * config/rs6000/power5.md: Adjust.
49 * config/rs6000/power6.md: Adjust.
50 * config/rs6000/power7.md: Adjust.
51 * config/rs6000/power8.md: Adjust.
52 * config/rs6000/power9.md: Adjust.
53 * config/rs6000/rs64.md: Adjust.
54 * config/rs6000/titan.md: Adjust.
56 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
58 * config/i386/predicates.md (indirect_branch_operand): Rewrite
59 ix86_indirect_branch_register logic.
61 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
63 * config/i386/constraints.md (Bs): Update
64 ix86_indirect_branch_register check. Don't check
65 ix86_indirect_branch_register with GOT_memory_operand.
66 (Bw): Likewise.
67 * config/i386/predicates.md (GOT_memory_operand): Don't check
68 ix86_indirect_branch_register here.
69 (GOT32_symbol_operand): Likewise.
71 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
73 * config/i386/predicates.md (constant_call_address_operand):
74 Rewrite ix86_indirect_branch_register logic.
75 (sibcall_insn_operand): Likewise.
77 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
79 * config/i386/constraints.md (Bs): Replace
80 ix86_indirect_branch_thunk_register with
81 ix86_indirect_branch_register.
82 (Bw): Likewise.
83 * config/i386/i386.md (indirect_jump): Likewise.
84 (tablejump): Likewise.
85 (*sibcall_memory): Likewise.
86 (*sibcall_value_memory): Likewise.
87 Peepholes of indirect call and jump via memory: Likewise.
88 * config/i386/i386.opt: Likewise.
89 * config/i386/predicates.md (indirect_branch_operand): Likewise.
90 (GOT_memory_operand): Likewise.
91 (call_insn_operand): Likewise.
92 (sibcall_insn_operand): Likewise.
93 (GOT32_symbol_operand): Likewise.
95 2018-01-15 Jakub Jelinek <jakub@redhat.com>
97 PR middle-end/83837
98 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
99 type rather than type addr's type points to.
100 (expand_omp_atomic_mutex): Likewise.
101 (expand_omp_atomic): Likewise.
103 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
105 PR target/83839
106 * config/i386/i386.c (output_indirect_thunk_function): Use
107 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
108 for __x86_return_thunk.
110 2018-01-15 Richard Biener <rguenther@suse.de>
112 PR middle-end/83850
113 * expmed.c (extract_bit_field_1): Fix typo.
115 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
117 PR target/83687
118 * config/arm/iterators.md (VF): New mode iterator.
119 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
120 Remove integer-related logic from pattern.
121 (neon_vabd<mode>_3): Likewise.
123 2018-01-15 Jakub Jelinek <jakub@redhat.com>
125 PR middle-end/82694
126 * common.opt (fstrict-overflow): No longer an alias.
127 (fwrapv-pointer): New option.
128 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
129 also for pointer types based on flag_wrapv_pointer.
130 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
131 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
132 opts->x_flag_wrapv got set.
133 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
134 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
135 POINTER_TYPE_OVERFLOW_UNDEFINED.
136 * match.pd: Likewise in address comparison pattern.
137 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
139 2018-01-15 Richard Biener <rguenther@suse.de>
141 PR lto/83804
142 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
143 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
144 Reset type names to their identifier if their TYPE_DECL doesn't
145 have linkage (and thus is used for ODR and devirt).
146 (save_debug_info_for_decl): Remove.
147 (save_debug_info_for_type): Likewise.
148 (add_tree_to_fld_list): Adjust.
149 * tree-pretty-print.c (dump_generic_node): Make dumping of
150 type names more robust.
152 2018-01-15 Richard Biener <rguenther@suse.de>
154 * BASE-VER: Bump to 8.0.1.
156 2018-01-14 Martin Sebor <msebor@redhat.com>
158 PR other/83508
159 * builtins.c (check_access): Avoid warning when the no-warning bit
160 is set.
162 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
164 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
165 * ira-color (allocno_hard_regs_compare): Likewise.
167 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
169 PR target/83013
170 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
171 Use .pushsection/.popsection.
173 2018-01-14 Martin Sebor <msebor@redhat.com>
175 PR c++/81327
176 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
178 2018-01-14 Jakub Jelinek <jakub@redhat.com>
180 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
181 entry from extra_headers.
182 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
183 extra_headers, make the list bitwise identical to the i?86-*-* one.
185 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
187 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
188 -mcmodel=large with -mindirect-branch=thunk,
189 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
190 -mfunction-return=thunk-extern.
191 * doc/invoke.texi: Document -mcmodel=large is incompatible with
192 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
193 -mfunction-return=thunk and -mfunction-return=thunk-extern.
195 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
197 * config/i386/i386.c (print_reg): Print the name of the full
198 integer register without '%'.
199 (ix86_print_operand): Handle 'V'.
200 * doc/extend.texi: Document 'V' modifier.
202 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
204 * config/i386/constraints.md (Bs): Disallow memory operand for
205 -mindirect-branch-register.
206 (Bw): Likewise.
207 * config/i386/predicates.md (indirect_branch_operand): Likewise.
208 (GOT_memory_operand): Likewise.
209 (call_insn_operand): Likewise.
210 (sibcall_insn_operand): Likewise.
211 (GOT32_symbol_operand): Likewise.
212 * config/i386/i386.md (indirect_jump): Call convert_memory_address
213 for -mindirect-branch-register.
214 (tablejump): Likewise.
215 (*sibcall_memory): Likewise.
216 (*sibcall_value_memory): Likewise.
217 Disallow peepholes of indirect call and jump via memory for
218 -mindirect-branch-register.
219 (*call_pop): Replace m with Bw.
220 (*call_value_pop): Likewise.
221 (*sibcall_pop_memory): Replace m with Bs.
222 * config/i386/i386.opt (mindirect-branch-register): New option.
223 * doc/invoke.texi: Document -mindirect-branch-register option.
225 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
227 * config/i386/i386-protos.h (ix86_output_function_return): New.
228 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
229 set function_return_type.
230 (indirect_thunk_name): Add ret_p to indicate thunk for function
231 return.
232 (output_indirect_thunk_function): Pass false to
233 indirect_thunk_name.
234 (ix86_output_indirect_branch_via_reg): Likewise.
235 (ix86_output_indirect_branch_via_push): Likewise.
236 (output_indirect_thunk_function): Create alias for function
237 return thunk if regno < 0.
238 (ix86_output_function_return): New function.
239 (ix86_handle_fndecl_attribute): Handle function_return.
240 (ix86_attribute_table): Add function_return.
241 * config/i386/i386.h (machine_function): Add
242 function_return_type.
243 * config/i386/i386.md (simple_return_internal): Use
244 ix86_output_function_return.
245 (simple_return_internal_long): Likewise.
246 * config/i386/i386.opt (mfunction-return=): New option.
247 (indirect_branch): Mention -mfunction-return=.
248 * doc/extend.texi: Document function_return function attribute.
249 * doc/invoke.texi: Document -mfunction-return= option.
251 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
253 * config/i386/i386-opts.h (indirect_branch): New.
254 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
255 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
256 with local indirect jump when converting indirect call and jump.
257 (ix86_set_indirect_branch_type): New.
258 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
259 (indirectlabelno): New.
260 (indirect_thunk_needed): Likewise.
261 (indirect_thunk_bnd_needed): Likewise.
262 (indirect_thunks_used): Likewise.
263 (indirect_thunks_bnd_used): Likewise.
264 (INDIRECT_LABEL): Likewise.
265 (indirect_thunk_name): Likewise.
266 (output_indirect_thunk): Likewise.
267 (output_indirect_thunk_function): Likewise.
268 (ix86_output_indirect_branch_via_reg): Likewise.
269 (ix86_output_indirect_branch_via_push): Likewise.
270 (ix86_output_indirect_branch): Likewise.
271 (ix86_output_indirect_jmp): Likewise.
272 (ix86_code_end): Call output_indirect_thunk_function if needed.
273 (ix86_output_call_insn): Call ix86_output_indirect_branch if
274 needed.
275 (ix86_handle_fndecl_attribute): Handle indirect_branch.
276 (ix86_attribute_table): Add indirect_branch.
277 * config/i386/i386.h (machine_function): Add indirect_branch_type
278 and has_local_indirect_jump.
279 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
280 to true.
281 (tablejump): Likewise.
282 (*indirect_jump): Use ix86_output_indirect_jmp.
283 (*tablejump_1): Likewise.
284 (simple_return_indirect_internal): Likewise.
285 * config/i386/i386.opt (mindirect-branch=): New option.
286 (indirect_branch): New.
287 (keep): Likewise.
288 (thunk): Likewise.
289 (thunk-inline): Likewise.
290 (thunk-extern): Likewise.
291 * doc/extend.texi: Document indirect_branch function attribute.
292 * doc/invoke.texi: Document -mindirect-branch= option.
294 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
296 PR ipa/83051
297 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
299 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
301 * ipa-inline.c (want_inline_small_function_p): Return false if
302 inlining has already failed with CIF_FINAL_ERROR.
303 (update_caller_keys): Call want_inline_small_function_p before
304 can_inline_edge_p.
305 (update_callee_keys): Likewise.
307 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
309 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
310 New function.
311 (rs6000_quadword_masked_address_p): Likewise.
312 (quad_aligned_load_p): Likewise.
313 (quad_aligned_store_p): Likewise.
314 (const_load_sequence_p): Add comment to describe the outer-most loop.
315 (mimic_memory_attributes_and_flags): New function.
316 (rs6000_gen_stvx): Likewise.
317 (replace_swapped_aligned_store): Likewise.
318 (rs6000_gen_lvx): Likewise.
319 (replace_swapped_aligned_load): Likewise.
320 (replace_swapped_load_constant): Capitalize argument name in
321 comment describing this function.
322 (rs6000_analyze_swaps): Add a third pass to search for vector loads
323 and stores that access quad-word aligned addresses and replace
324 with stvx or lvx instructions when appropriate.
325 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
326 New function prototype.
327 (rs6000_quadword_masked_address_p): Likewise.
328 (rs6000_gen_lvx): Likewise.
329 (rs6000_gen_stvx): Likewise.
330 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
331 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
332 when memory address is aligned.
333 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
334 this split to select lvx instruction when memory address is aligned.
335 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
336 instruction when memory address is aligned.
337 (*vsx_le_perm_load_v16qi): Likewise.
338 (four unnamed splitters): Modify to select the stvx instruction
339 when memory is aligned.
341 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
343 * predict.c (determine_unlikely_bbs): Handle correctly BBs
344 which appears in the queue multiple times.
346 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
347 Alan Hayward <alan.hayward@arm.com>
348 David Sherwood <david.sherwood@arm.com>
350 * tree-vectorizer.h (vec_lower_bound): New structure.
351 (_loop_vec_info): Add check_nonzero and lower_bounds.
352 (LOOP_VINFO_CHECK_NONZERO): New macro.
353 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
354 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
355 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
356 fields. Make seg_len the distance travelled, not including the
357 access size.
358 (dr_direction_indicator): Declare.
359 (dr_zero_step_indicator): Likewise.
360 (dr_known_forward_stride_p): Likewise.
361 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
362 tree-ssanames.h.
363 (runtime_alias_check_p): Allow runtime alias checks with
364 variable strides.
365 (operator ==): Compare access_size and align.
366 (prune_runtime_alias_test_list): Rework for new distinction between
367 the access_size and seg_len.
368 (create_intersect_range_checks_index): Likewise. Cope with polynomial
369 segment lengths.
370 (get_segment_min_max): New function.
371 (create_intersect_range_checks): Use it.
372 (dr_step_indicator): New function.
373 (dr_direction_indicator): Likewise.
374 (dr_zero_step_indicator): Likewise.
375 (dr_known_forward_stride_p): Likewise.
376 * tree-loop-distribution.c (data_ref_segment_size): Return
377 DR_STEP * (niters - 1).
378 (compute_alias_check_pairs): Update call to the dr_with_seg_len
379 constructor.
380 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
381 (vect_preserves_scalar_order_p): New function, split out from...
382 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
383 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
384 (vect_vfa_access_size): New function.
385 (vect_vfa_align): Likewise.
386 (vect_compile_time_alias): Take access_size_a and access_b arguments.
387 (dump_lower_bound): New function.
388 (vect_check_lower_bound): Likewise.
389 (vect_small_gap_p): Likewise.
390 (vectorizable_with_step_bound_p): Likewise.
391 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
392 depencies if the vectorization factor is 1. Convert the checks
393 for nonzero steps into checks on the bounds of DR_STEP. Try using
394 a bunds check for variable steps if the minimum required step is
395 relatively small. Update calls to the dr_with_seg_len
396 constructor and to vect_compile_time_alias.
397 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
398 function.
399 (vect_loop_versioning): Call it.
400 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
401 when retrying.
402 (vect_estimate_min_profitable_iters): Account for any bounds checks.
404 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
405 Alan Hayward <alan.hayward@arm.com>
406 David Sherwood <david.sherwood@arm.com>
408 * doc/sourcebuild.texi (vect_scatter_store): Document.
409 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
410 optabs.
411 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
412 Document.
413 * genopinit.c (main): Add supports_vec_scatter_store and
414 supports_vec_scatter_store_cached to target_optabs.
415 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
416 IFN_MASK_SCATTER_STORE.
417 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
418 functions.
419 * internal-fn.h (internal_store_fn_p): Declare.
420 (internal_fn_stored_value_index): Likewise.
421 * internal-fn.c (scatter_store_direct): New macro.
422 (expand_scatter_store_optab_fn): New function.
423 (direct_scatter_store_optab_supported_p): New macro.
424 (internal_store_fn_p): New function.
425 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
426 IFN_MASK_SCATTER_STORE.
427 (internal_fn_mask_index): Likewise.
428 (internal_fn_stored_value_index): New function.
429 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
430 for scatter stores.
431 * optabs-query.h (supports_vec_scatter_store_p): Declare.
432 * optabs-query.c (supports_vec_scatter_store_p): New function.
433 * tree-vectorizer.h (vect_get_store_rhs): Declare.
434 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
435 true for scatter stores.
436 (vect_gather_scatter_fn_p): Handle scatter stores too.
437 (vect_check_gather_scatter): Consider using scatter stores if
438 supports_vec_scatter_store_p.
439 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
440 scatter stores too.
441 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
442 internal_fn_stored_value_index.
443 (check_load_store_masking): Handle scatter stores too.
444 (vect_get_store_rhs): Make public.
445 (vectorizable_call): Use internal_store_fn_p.
446 (vectorizable_store): Handle scatter store internal functions.
447 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
448 when deciding whether the end of the group has been reached.
449 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
450 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
451 (mask_scatter_store<mode>): New insns.
453 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
454 Alan Hayward <alan.hayward@arm.com>
455 David Sherwood <david.sherwood@arm.com>
457 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
458 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
459 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
460 function.
461 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
462 Use vect_truncate_gather_scatter_offset if we can't treat the
463 operation as a normal gather load or scatter store.
464 (get_group_load_store_type): Take the gather_scatter_info
465 as argument. Try using a gather load or scatter store for
466 single-element groups.
467 (get_load_store_type): Update calls to get_group_load_store_type
468 and vect_use_strided_gather_scatters_p.
470 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
471 Alan Hayward <alan.hayward@arm.com>
472 David Sherwood <david.sherwood@arm.com>
474 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
475 optional tree argument.
476 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
477 null target hooks.
478 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
479 but continue to use the current value as a fallback.
480 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
481 to compare the updates.
482 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
483 (get_load_store_type): Use it when handling a strided access.
484 (vect_get_strided_load_store_ops): New function.
485 (vect_get_data_ptr_increment): Likewise.
486 (vectorizable_load): Handle strided gather loads. Always pass
487 a step to vect_create_data_ref_ptr and bump_vector_ptr.
489 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
490 Alan Hayward <alan.hayward@arm.com>
491 David Sherwood <david.sherwood@arm.com>
493 * doc/md.texi (gather_load@var{m}): Document.
494 (mask_gather_load@var{m}): Likewise.
495 * genopinit.c (main): Add supports_vec_gather_load and
496 supports_vec_gather_load_cached to target_optabs.
497 * optabs-tree.c (init_tree_optimization_optabs): Use
498 ggc_cleared_alloc to allocate target_optabs.
499 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
500 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
501 functions.
502 * internal-fn.h (internal_load_fn_p): Declare.
503 (internal_gather_scatter_fn_p): Likewise.
504 (internal_fn_mask_index): Likewise.
505 (internal_gather_scatter_fn_supported_p): Likewise.
506 * internal-fn.c (gather_load_direct): New macro.
507 (expand_gather_load_optab_fn): New function.
508 (direct_gather_load_optab_supported_p): New macro.
509 (direct_internal_fn_optab): New function.
510 (internal_load_fn_p): Likewise.
511 (internal_gather_scatter_fn_p): Likewise.
512 (internal_fn_mask_index): Likewise.
513 (internal_gather_scatter_fn_supported_p): Likewise.
514 * optabs-query.c (supports_at_least_one_mode_p): New function.
515 (supports_vec_gather_load_p): Likewise.
516 * optabs-query.h (supports_vec_gather_load_p): Declare.
517 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
518 and memory_type field.
519 (NUM_PATTERNS): Bump to 15.
520 * tree-vect-data-refs.c: Include internal-fn.h.
521 (vect_gather_scatter_fn_p): New function.
522 (vect_describe_gather_scatter_call): Likewise.
523 (vect_check_gather_scatter): Try using internal functions for
524 gather loads. Recognize existing calls to a gather load function.
525 (vect_analyze_data_refs): Consider using gather loads if
526 supports_vec_gather_load_p.
527 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
528 (vect_get_gather_scatter_offset_type): Likewise.
529 (vect_convert_mask_for_vectype): Likewise.
530 (vect_add_conversion_to_patterm): Likewise.
531 (vect_try_gather_scatter_pattern): Likewise.
532 (vect_recog_gather_scatter_pattern): New pattern recognizer.
533 (vect_vect_recog_func_ptrs): Add it.
534 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
535 internal_fn_mask_index and internal_gather_scatter_fn_p.
536 (check_load_store_masking): Take the gather_scatter_info as an
537 argument and handle gather loads.
538 (vect_get_gather_scatter_ops): New function.
539 (vectorizable_call): Check internal_load_fn_p.
540 (vectorizable_load): Likewise. Handle gather load internal
541 functions.
542 (vectorizable_store): Update call to check_load_store_masking.
543 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
544 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
545 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
546 (aarch64_gather_scale_operand_d): New predicates.
547 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
548 (mask_gather_load<mode>): New insns.
550 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
551 Alan Hayward <alan.hayward@arm.com>
552 David Sherwood <david.sherwood@arm.com>
554 * optabs.def (fold_left_plus_optab): New optab.
555 * doc/md.texi (fold_left_plus_@var{m}): Document.
556 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
557 * internal-fn.c (fold_left_direct): Define.
558 (expand_fold_left_optab_fn): Likewise.
559 (direct_fold_left_optab_supported_p): Likewise.
560 * fold-const-call.c (fold_const_fold_left): New function.
561 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
562 * tree-parloops.c (valid_reduction_p): New function.
563 (gather_scalar_reductions): Use it.
564 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
565 (vect_finish_replace_stmt): Declare.
566 * tree-vect-loop.c (fold_left_reduction_fn): New function.
567 (needs_fold_left_reduction_p): New function, split out from...
568 (vect_is_simple_reduction): ...here. Accept reductions that
569 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
570 (vect_force_simple_reduction): Also store the reduction type in
571 the assignment's STMT_VINFO_REDUC_TYPE.
572 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
573 (merge_with_identity): New function.
574 (vect_expand_fold_left): Likewise.
575 (vectorize_fold_left_reduction): Likewise.
576 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
577 scalar phi in place for it. Check for target support and reject
578 cases that would reassociate the operation. Defer the transform
579 phase to vectorize_fold_left_reduction.
580 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
581 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
582 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
584 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
586 * tree-if-conv.c (predicate_mem_writes): Remove redundant
587 call to ifc_temp_var.
589 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
590 Alan Hayward <alan.hayward@arm.com>
591 David Sherwood <david.sherwood@arm.com>
593 * target.def (legitimize_address_displacement): Take the original
594 offset as a poly_int.
595 * targhooks.h (default_legitimize_address_displacement): Update
596 accordingly.
597 * targhooks.c (default_legitimize_address_displacement): Likewise.
598 * doc/tm.texi: Regenerate.
599 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
600 as an argument, moving assert of ad->disp == ad->disp_term to...
601 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
602 Try calling targetm.legitimize_address_displacement before expanding
603 the address rather than afterwards, and adjust for the new interface.
604 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
605 Match the new hook interface. Handle SVE addresses.
606 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
607 new hook interface.
609 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
611 * Makefile.in (OBJS): Add early-remat.o.
612 * target.def (select_early_remat_modes): New hook.
613 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
614 * doc/tm.texi: Regenerate.
615 * targhooks.h (default_select_early_remat_modes): Declare.
616 * targhooks.c (default_select_early_remat_modes): New function.
617 * timevar.def (TV_EARLY_REMAT): New timevar.
618 * passes.def (pass_early_remat): New pass.
619 * tree-pass.h (make_pass_early_remat): Declare.
620 * early-remat.c: New file.
621 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
622 function.
623 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
625 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
626 Alan Hayward <alan.hayward@arm.com>
627 David Sherwood <david.sherwood@arm.com>
629 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
630 vfm1 with a bound_epilog parameter.
631 (vect_do_peeling): Update calls accordingly, and move the prologue
632 call earlier in the function. Treat the base bound_epilog as 0 for
633 fully-masked loops and retain vf - 1 for other loops. Add 1 to
634 this base when peeling for gaps.
635 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
636 with fully-masked loops.
637 (vect_estimate_min_profitable_iters): Handle the single peeled
638 iteration in that case.
640 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
641 Alan Hayward <alan.hayward@arm.com>
642 David Sherwood <david.sherwood@arm.com>
644 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
645 single-element interleaving even if the size is not a power of 2.
646 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
647 accesses for single-element interleaving if the group size is
648 not a power of 2.
650 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
651 Alan Hayward <alan.hayward@arm.com>
652 David Sherwood <david.sherwood@arm.com>
654 * doc/md.texi (fold_extract_last_@var{m}): Document.
655 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
656 * optabs.def (fold_extract_last_optab): New optab.
657 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
658 * internal-fn.c (fold_extract_direct): New macro.
659 (expand_fold_extract_optab_fn): Likewise.
660 (direct_fold_extract_optab_supported_p): Likewise.
661 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
662 * tree-vect-loop.c (vect_model_reduction_cost): Handle
663 EXTRACT_LAST_REDUCTION.
664 (get_initial_def_for_reduction): Do not create an initial vector
665 for EXTRACT_LAST_REDUCTION reductions.
666 (vectorizable_reduction): Leave the scalar phi in place for
667 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
668 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
669 epilogue code for EXTRACT_LAST_REDUCTION and defer the
670 transform phase to vectorizable_condition.
671 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
672 split out from...
673 (vect_finish_stmt_generation): ...here.
674 (vect_finish_replace_stmt): New function.
675 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
676 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
677 pattern.
678 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
680 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
681 Alan Hayward <alan.hayward@arm.com>
682 David Sherwood <david.sherwood@arm.com>
684 * doc/md.texi (extract_last_@var{m}): Document.
685 * optabs.def (extract_last_optab): New optab.
686 * internal-fn.def (EXTRACT_LAST): New internal function.
687 * internal-fn.c (cond_unary_direct): New macro.
688 (expand_cond_unary_optab_fn): Likewise.
689 (direct_cond_unary_optab_supported_p): Likewise.
690 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
691 loops using EXTRACT_LAST.
692 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
693 (extract_last_<mode>): ...this optab.
694 (vec_extract<mode><Vel>): Update accordingly.
696 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
697 Alan Hayward <alan.hayward@arm.com>
698 David Sherwood <david.sherwood@arm.com>
700 * target.def (empty_mask_is_expensive): New hook.
701 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
702 * doc/tm.texi: Regenerate.
703 * targhooks.h (default_empty_mask_is_expensive): Declare.
704 * targhooks.c (default_empty_mask_is_expensive): New function.
705 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
706 if the target says that empty masks are expensive.
707 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
708 New function.
709 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
711 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
712 Alan Hayward <alan.hayward@arm.com>
713 David Sherwood <david.sherwood@arm.com>
715 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
716 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
717 (vect_use_loop_mask_for_alignment_p): New function.
718 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
719 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
720 niters_skip argument. Make sure that the first niters_skip elements
721 of the first iteration are inactive.
722 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
723 Update call to vect_set_loop_masks_directly.
724 (get_misalign_in_elems): New function, split out from...
725 (vect_gen_prolog_loop_niters): ...here.
726 (vect_update_init_of_dr): Take a code argument that specifies whether
727 the adjustment should be added or subtracted.
728 (vect_update_init_of_drs): Likewise.
729 (vect_prepare_for_masked_peels): New function.
730 (vect_do_peeling): Skip prologue peeling if we're using a mask
731 instead. Update call to vect_update_inits_of_drs.
732 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
733 mask_skip_niters.
734 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
735 alignment. Do not include the number of peeled iterations in
736 the minimum threshold in that case.
737 (vectorizable_induction): Adjust the start value down by
738 LOOP_VINFO_MASK_SKIP_NITERS iterations.
739 (vect_transform_loop): Call vect_prepare_for_masked_peels.
740 Take the number of skipped iterations into account when calculating
741 the loop bounds.
742 * tree-vect-stmts.c (vect_gen_while_not): New function.
744 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
745 Alan Hayward <alan.hayward@arm.com>
746 David Sherwood <david.sherwood@arm.com>
748 * doc/sourcebuild.texi (vect_fully_masked): Document.
749 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
750 default value to 0.
751 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
752 split out from...
753 (vect_analyze_loop_2): ...here. Don't check the vectorization
754 factor against the number of loop iterations if the loop is
755 fully-masked.
757 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
758 Alan Hayward <alan.hayward@arm.com>
759 David Sherwood <david.sherwood@arm.com>
761 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
762 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
763 (dump_groups): Update accordingly.
764 (iv_use::mem_type): New member variable.
765 (address_p): New function.
766 (record_use): Add a mem_type argument and initialize the new
767 mem_type field.
768 (record_group_use): Add a mem_type argument. Use address_p.
769 Remove obsolete null checks of base_object. Update call to record_use.
770 (find_interesting_uses_op): Update call to record_group_use.
771 (find_interesting_uses_cond): Likewise.
772 (find_interesting_uses_address): Likewise.
773 (get_mem_type_for_internal_fn): New function.
774 (find_address_like_use): Likewise.
775 (find_interesting_uses_stmt): Try find_address_like_use before
776 calling find_interesting_uses_op.
777 (addr_offset_valid_p): Use the iv mem_type field as the type
778 of the addressed memory.
779 (add_autoinc_candidates): Likewise.
780 (get_address_cost): Likewise.
781 (split_small_address_groups_p): Use address_p.
782 (split_address_groups): Likewise.
783 (add_iv_candidate_for_use): Likewise.
784 (autoinc_possible_for_pair): Likewise.
785 (rewrite_groups): Likewise.
786 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
787 (determine_group_iv_cost): Update after split of USE_ADDRESS.
788 (get_alias_ptr_type_for_ptr_address): New function.
789 (rewrite_use_address): Rewrite address uses in calls that were
790 identified by find_address_like_use.
792 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
793 Alan Hayward <alan.hayward@arm.com>
794 David Sherwood <david.sherwood@arm.com>
796 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
797 TARGET_MEM_REFs.
798 * gimple-expr.h (is_gimple_addressable: Likewise.
799 * gimple-expr.c (is_gimple_address): Likewise.
800 * internal-fn.c (expand_call_mem_ref): New function.
801 (expand_mask_load_optab_fn): Use it.
802 (expand_mask_store_optab_fn): Likewise.
804 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
805 Alan Hayward <alan.hayward@arm.com>
806 David Sherwood <david.sherwood@arm.com>
808 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
809 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
810 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
811 (cond_umax@var{mode}): Document.
812 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
813 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
814 (cond_umin_optab, cond_umax_optab): New optabs.
815 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
816 (COND_IOR, COND_XOR): New internal functions.
817 * internal-fn.h (get_conditional_internal_fn): Declare.
818 * internal-fn.c (cond_binary_direct): New macro.
819 (expand_cond_binary_optab_fn): Likewise.
820 (direct_cond_binary_optab_supported_p): Likewise.
821 (get_conditional_internal_fn): New function.
822 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
823 Cope with reduction statements that are vectorized as calls rather
824 than assignments.
825 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
826 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
827 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
828 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
829 (UNSPEC_COND_EOR): New unspecs.
830 (optab): Add mappings for them.
831 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
832 (sve_int_op, sve_fp_op): New int attributes.
834 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
835 Alan Hayward <alan.hayward@arm.com>
836 David Sherwood <david.sherwood@arm.com>
838 * optabs.def (while_ult_optab): New optab.
839 * doc/md.texi (while_ult@var{m}@var{n}): Document.
840 * internal-fn.def (WHILE_ULT): New internal function.
841 * internal-fn.h (direct_internal_fn_supported_p): New override
842 that takes two types as argument.
843 * internal-fn.c (while_direct): New macro.
844 (expand_while_optab_fn): New function.
845 (convert_optab_supported_p): Likewise.
846 (direct_while_optab_supported_p): New macro.
847 * wide-int.h (wi::udiv_ceil): New function.
848 * tree-vectorizer.h (rgroup_masks): New structure.
849 (vec_loop_masks): New typedef.
850 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
851 and fully_masked_p.
852 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
853 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
854 (vect_max_vf): New function.
855 (slpeel_make_loop_iterate_ntimes): Delete.
856 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
857 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
858 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
859 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
860 internal-fn.h, stor-layout.h and optabs-query.h.
861 (vect_set_loop_mask): New function.
862 (add_preheader_seq): Likewise.
863 (add_header_seq): Likewise.
864 (interleave_supported_p): Likewise.
865 (vect_maybe_permute_loop_masks): Likewise.
866 (vect_set_loop_masks_directly): Likewise.
867 (vect_set_loop_condition_masked): Likewise.
868 (vect_set_loop_condition_unmasked): New function, split out from
869 slpeel_make_loop_iterate_ntimes.
870 (slpeel_make_loop_iterate_ntimes): Rename to..
871 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
872 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
873 (vect_do_peeling): Update call accordingly.
874 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
875 loops.
876 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
877 mask_compare_type, can_fully_mask_p and fully_masked_p.
878 (release_vec_loop_masks): New function.
879 (_loop_vec_info): Use it to free the loop masks.
880 (can_produce_all_loop_masks_p): New function.
881 (vect_get_max_nscalars_per_iter): Likewise.
882 (vect_verify_full_masking): Likewise.
883 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
884 retries, and free the mask rgroups before retrying. Check loop-wide
885 reasons for disallowing fully-masked loops. Make the final decision
886 about whether use a fully-masked loop or not.
887 (vect_estimate_min_profitable_iters): Do not assume that peeling
888 for the number of iterations will be needed for fully-masked loops.
889 (vectorizable_reduction): Disable fully-masked loops.
890 (vectorizable_live_operation): Likewise.
891 (vect_halve_mask_nunits): New function.
892 (vect_double_mask_nunits): Likewise.
893 (vect_record_loop_mask): Likewise.
894 (vect_get_loop_mask): Likewise.
895 (vect_transform_loop): Handle the case in which the final loop
896 iteration might handle a partial vector. Call vect_set_loop_condition
897 instead of slpeel_make_loop_iterate_ntimes.
898 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
899 (check_load_store_masking): New function.
900 (prepare_load_store_mask): Likewise.
901 (vectorizable_store): Handle fully-masked loops.
902 (vectorizable_load): Likewise.
903 (supportable_widening_operation): Use vect_halve_mask_nunits for
904 booleans.
905 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
906 (vect_gen_while): New function.
907 * config/aarch64/aarch64.md (umax<mode>3): New expander.
908 (aarch64_uqdec<mode>): New insn.
910 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
911 Alan Hayward <alan.hayward@arm.com>
912 David Sherwood <david.sherwood@arm.com>
914 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
915 (reduc_xor_scal_optab): New optabs.
916 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
917 (reduc_xor_scal_@var{m}): Document.
918 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
919 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
920 internal functions.
921 * fold-const-call.c (fold_const_call): Handle them.
922 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
923 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
924 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
925 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
926 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
927 (UNSPEC_XORV): New unspecs.
928 (optab): Add entries for them.
929 (BITWISEV): New int iterator.
930 (bit_reduc_op): New int attributes.
932 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
933 Alan Hayward <alan.hayward@arm.com>
934 David Sherwood <david.sherwood@arm.com>
936 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
937 * internal-fn.def (VEC_SHL_INSERT): New internal function.
938 * optabs.def (vec_shl_insert_optab): New optab.
939 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
940 (duplicate_and_interleave): Likewise.
941 * tree-vect-loop.c: Include internal-fn.h.
942 (neutral_op_for_slp_reduction): New function, split out from
943 get_initial_defs_for_reduction.
944 (get_initial_def_for_reduction): Handle option 2 for variable-length
945 vectors by loading the neutral value into a vector and then shifting
946 the initial value into element 0.
947 (get_initial_defs_for_reduction): Replace the code argument with
948 the neutral value calculated by neutral_op_for_slp_reduction.
949 Use gimple_build_vector for constant-length vectors.
950 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
951 but the first group_size elements have a neutral value.
952 Use duplicate_and_interleave otherwise.
953 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
954 Update call to get_initial_defs_for_reduction. Handle SLP
955 reductions for variable-length vectors by creating one vector
956 result for each scalar result, with the elements associated
957 with other scalar results stubbed out with the neutral value.
958 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
959 Require IFN_VEC_SHL_INSERT for double reductions on
960 variable-length vectors, or SLP reductions that have
961 a neutral value. Require can_duplicate_and_interleave_p
962 support for variable-length unchained SLP reductions if there
963 is no neutral value, such as for MIN/MAX reductions. Also require
964 the number of vector elements to be a multiple of the number of
965 SLP statements when doing variable-length unchained SLP reductions.
966 Update call to vect_create_epilog_for_reduction.
967 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
968 and remove initial values.
969 (duplicate_and_interleave): Make public.
970 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
971 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
973 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
974 Alan Hayward <alan.hayward@arm.com>
975 David Sherwood <david.sherwood@arm.com>
977 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
978 (can_duplicate_and_interleave_p): New function.
979 (vect_get_and_check_slp_defs): Take the vector of statements
980 rather than just the current one. Remove excess parentheses.
981 Restriction rejectinon of vect_constant_def and vect_external_def
982 for variable-length vectors to boolean types, or types for which
983 can_duplicate_and_interleave_p is false.
984 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
985 (duplicate_and_interleave): New function.
986 (vect_get_constant_vectors): Use gimple_build_vector for
987 constant-length vectors and suitable variable-length constant
988 vectors. Use duplicate_and_interleave for other variable-length
989 vectors. Don't defer the update when inserting new statements.
991 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
992 Alan Hayward <alan.hayward@arm.com>
993 David Sherwood <david.sherwood@arm.com>
995 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
996 min_profitable_iters doesn't go negative.
998 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
999 Alan Hayward <alan.hayward@arm.com>
1000 David Sherwood <david.sherwood@arm.com>
1002 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1003 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1004 * optabs.def (vec_mask_load_lanes_optab): New optab.
1005 (vec_mask_store_lanes_optab): Likewise.
1006 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1007 (MASK_STORE_LANES): Likewise.
1008 * internal-fn.c (mask_load_lanes_direct): New macro.
1009 (mask_store_lanes_direct): Likewise.
1010 (expand_mask_load_optab_fn): Handle masked operations.
1011 (expand_mask_load_lanes_optab_fn): New macro.
1012 (expand_mask_store_optab_fn): Handle masked operations.
1013 (expand_mask_store_lanes_optab_fn): New macro.
1014 (direct_mask_load_lanes_optab_supported_p): Likewise.
1015 (direct_mask_store_lanes_optab_supported_p): Likewise.
1016 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1017 parameter.
1018 (vect_load_lanes_supported): Likewise.
1019 * tree-vect-data-refs.c (strip_conversion): New function.
1020 (can_group_stmts_p): Likewise.
1021 (vect_analyze_data_ref_accesses): Use it instead of checking
1022 for a pair of assignments.
1023 (vect_store_lanes_supported): Take a masked_p parameter.
1024 (vect_load_lanes_supported): Likewise.
1025 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1026 vect_store_lanes_supported and vect_load_lanes_supported.
1027 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1028 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1029 parameter. Don't allow gaps for masked accesses.
1030 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1031 and vect_load_lanes_supported.
1032 (get_load_store_type): Take a masked_p parameter and update
1033 call to get_group_load_store_type.
1034 (vectorizable_store): Update call to get_load_store_type.
1035 Handle IFN_MASK_STORE_LANES.
1036 (vectorizable_load): Update call to get_load_store_type.
1037 Handle IFN_MASK_LOAD_LANES.
1039 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1040 Alan Hayward <alan.hayward@arm.com>
1041 David Sherwood <david.sherwood@arm.com>
1043 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1044 modes for SVE.
1045 * config/aarch64/aarch64-protos.h
1046 (aarch64_sve_struct_memory_operand_p): Declare.
1047 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1048 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1049 (VPRED, vpred): Handle SVE structure modes.
1050 * config/aarch64/constraints.md (Utx): New constraint.
1051 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1052 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1053 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1054 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1055 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1056 structure modes. Split into pieces after RA.
1057 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1058 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1059 New patterns.
1060 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1061 SVE structure modes.
1062 (aarch64_classify_address): Likewise.
1063 (sizetochar): Move earlier in file.
1064 (aarch64_print_operand): Handle SVE register lists.
1065 (aarch64_array_mode): New function.
1066 (aarch64_sve_struct_memory_operand_p): Likewise.
1067 (TARGET_ARRAY_MODE): Redefine.
1069 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1070 Alan Hayward <alan.hayward@arm.com>
1071 David Sherwood <david.sherwood@arm.com>
1073 * target.def (array_mode): New target hook.
1074 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1075 * doc/tm.texi: Regenerate.
1076 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1077 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1078 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1079 targetm.array_mode.
1080 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1081 type sizes.
1083 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1084 Alan Hayward <alan.hayward@arm.com>
1085 David Sherwood <david.sherwood@arm.com>
1087 * fold-const.c (fold_binary_loc): Check the argument types
1088 rather than the result type when testing for a vector operation.
1090 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1092 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1093 * doc/tm.texi: Regenerate.
1095 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1096 Alan Hayward <alan.hayward@arm.com>
1097 David Sherwood <david.sherwood@arm.com>
1099 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1100 (sve): Document new AArch64 extension.
1101 * doc/md.texi (w): Extend the description of the AArch64
1102 constraint to include SVE vectors.
1103 (Upl, Upa): Document new AArch64 predicate constraints.
1104 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1105 enum.
1106 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1107 (msve-vector-bits=): New option.
1108 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1109 SVE when these are disabled.
1110 (sve): New extension.
1111 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1112 modes. Adjust their number of units based on aarch64_sve_vg.
1113 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1114 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1115 aarch64_addr_query_type.
1116 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1117 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1118 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1119 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1120 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1121 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1122 (aarch64_simd_imm_zero_p): Delete.
1123 (aarch64_check_zero_based_sve_index_immediate): Declare.
1124 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1125 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1126 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1127 (aarch64_sve_float_mul_immediate_p): Likewise.
1128 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1129 rather than an rtx.
1130 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1131 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1132 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1133 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1134 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1135 (aarch64_regmode_natural_size): Likewise.
1136 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1137 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1138 left one place.
1139 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1140 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1141 for VG and the SVE predicate registers.
1142 (V_ALIASES): Add a "z"-prefixed alias.
1143 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1144 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1145 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1146 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1147 (REG_CLASS_NAMES): Add entries for them.
1148 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1149 and the predicate registers.
1150 (aarch64_sve_vg): Declare.
1151 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1152 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1153 (REGMODE_NATURAL_SIZE): Define.
1154 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1155 SVE macros.
1156 * config/aarch64/aarch64.c: Include cfgrtl.h.
1157 (simd_immediate_info): Add a constructor for series vectors,
1158 and an associated step field.
1159 (aarch64_sve_vg): New variable.
1160 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1161 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1162 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1163 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1164 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1165 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1166 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1167 (aarch64_get_mask_mode): New functions.
1168 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1169 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1170 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1171 predicate modes and predicate registers. Explicitly restrict
1172 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1173 to store a vector mode if it is recognized by
1174 aarch64_classify_vector_mode.
1175 (aarch64_regmode_natural_size): New function.
1176 (aarch64_hard_regno_caller_save_mode): Return the original mode
1177 for predicates.
1178 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1179 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1180 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1181 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1182 functions.
1183 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1184 does not overlap dest if the function is frame-related. Handle
1185 SVE constants.
1186 (aarch64_split_add_offset): New function.
1187 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1188 them aarch64_add_offset.
1189 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1190 and update call to aarch64_sub_sp.
1191 (aarch64_add_cfa_expression): New function.
1192 (aarch64_expand_prologue): Pass extra temporary registers to the
1193 functions above. Handle the case in which we need to emit new
1194 DW_CFA_expressions for registers that were originally saved
1195 relative to the stack pointer, but now have to be expressed
1196 relative to the frame pointer.
1197 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1198 functions above.
1199 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1200 IP0 and IP1 values for SVE frames.
1201 (aarch64_expand_vec_series): New function.
1202 (aarch64_expand_sve_widened_duplicate): Likewise.
1203 (aarch64_expand_sve_const_vector): Likewise.
1204 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1205 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1206 into the register, rather than emitting a SET directly.
1207 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1208 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1209 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1210 (offset_9bit_signed_scaled_p): New functions.
1211 (aarch64_replicate_bitmask_imm): New function.
1212 (aarch64_bitmask_imm): Use it.
1213 (aarch64_cannot_force_const_mem): Reject expressions involving
1214 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1215 (aarch64_classify_index): Handle SVE indices, by requiring
1216 a plain register index with a scale that matches the element size.
1217 (aarch64_classify_address): Handle SVE addresses. Assert that
1218 the mode of the address is VOIDmode or an integer mode.
1219 Update call to aarch64_classify_symbol.
1220 (aarch64_classify_symbolic_expression): Update call to
1221 aarch64_classify_symbol.
1222 (aarch64_const_vec_all_in_range_p): New function.
1223 (aarch64_print_vector_float_operand): Likewise.
1224 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1225 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1226 and the FP immediates 1.0 and 0.5.
1227 (aarch64_print_address_internal): Handle SVE addresses.
1228 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1229 (aarch64_regno_regclass): Handle predicate registers.
1230 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1231 data modes.
1232 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1233 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1234 (aarch64_convert_sve_vector_bits): New function.
1235 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1236 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1237 rather than an rtx.
1238 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1239 Handle SVE vector and predicate modes. Accept VL-based constants
1240 that need only one temporary register, and VL offsets that require
1241 no temporary registers.
1242 (aarch64_conditional_register_usage): Mark the predicate registers
1243 as fixed if SVE isn't available.
1244 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1245 Return true for SVE vector and predicate modes.
1246 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1247 rather than an unsigned int. Handle SVE modes.
1248 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1249 SVE modes.
1250 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1251 if SVE is enabled.
1252 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1253 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1254 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1255 (aarch64_sve_float_mul_immediate_p): New functions.
1256 (aarch64_sve_valid_immediate): New function.
1257 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1258 Explicitly reject structure modes. Check for INDEX constants.
1259 Handle PTRUE and PFALSE constants.
1260 (aarch64_check_zero_based_sve_index_immediate): New function.
1261 (aarch64_simd_imm_zero_p): Delete.
1262 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1263 vector modes. Accept constants in the range of CNT[BHWD].
1264 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1265 ask for an Advanced SIMD mode.
1266 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1267 (aarch64_simd_vector_alignment): Handle SVE predicates.
1268 (aarch64_vectorize_preferred_vector_alignment): New function.
1269 (aarch64_simd_vector_alignment_reachable): Use it instead of
1270 the vector size.
1271 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1272 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1273 functions.
1274 (MAX_VECT_LEN): Delete.
1275 (expand_vec_perm_d): Add a vec_flags field.
1276 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1277 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1278 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1279 for SVE modes.
1280 (aarch64_evpc_rev): Rename to...
1281 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1282 (aarch64_evpc_rev_global): New function.
1283 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1284 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1285 MAX_VECT_LEN.
1286 (aarch64_evpc_sve_tbl): New function.
1287 (aarch64_expand_vec_perm_const_1): Update after rename of
1288 aarch64_evpc_rev. Handle SVE permutes too, trying
1289 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1290 than aarch64_evpc_tbl.
1291 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1292 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1293 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1294 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1295 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1296 (aarch64_expand_sve_vcond): New functions.
1297 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1298 of aarch64_vector_mode_p.
1299 (aarch64_dwarf_poly_indeterminate_value): New function.
1300 (aarch64_compute_pressure_classes): Likewise.
1301 (aarch64_can_change_mode_class): Likewise.
1302 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1303 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1304 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1305 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1306 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1307 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1308 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1309 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1310 constraints.
1311 (Dn, Dl, Dr): Accept const as well as const_vector.
1312 (Dz): Likewise. Compare against CONST0_RTX.
1313 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1314 of "vector" where appropriate.
1315 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1316 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1317 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1318 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1319 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1320 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1321 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1322 (v_int_equiv): Extend to SVE modes.
1323 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1324 mode attributes.
1325 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1326 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1327 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1328 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1329 (SVE_COND_FP_CMP): New int iterators.
1330 (perm_hilo): Handle the new unpack unspecs.
1331 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1332 attributes.
1333 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1334 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1335 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1336 (aarch64_equality_operator, aarch64_constant_vector_operand)
1337 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1338 (aarch64_sve_nonimmediate_operand): Likewise.
1339 (aarch64_sve_general_operand): Likewise.
1340 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1341 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1342 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1343 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1344 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1345 (aarch64_sve_float_arith_immediate): Likewise.
1346 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1347 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1348 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1349 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1350 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1351 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1352 (aarch64_sve_float_arith_operand): Likewise.
1353 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1354 (aarch64_sve_float_mul_operand): Likewise.
1355 (aarch64_sve_vec_perm_operand): Likewise.
1356 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1357 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1358 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1359 as well as const_vector.
1360 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1361 in file. Use CONST0_RTX and CONSTM1_RTX.
1362 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1363 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1364 Use aarch64_simd_imm_zero.
1365 * config/aarch64/aarch64-sve.md: New file.
1366 * config/aarch64/aarch64.md: Include it.
1367 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1368 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1369 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1370 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1371 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1372 (sve): New attribute.
1373 (enabled): Disable instructions with the sve attribute unless
1374 TARGET_SVE.
1375 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1376 aarch64_expand_mov_immediate.
1377 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1378 CNT[BHSD] immediates.
1379 (movti): Split CONST_POLY_INT moves into two halves.
1380 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1381 Split additions that need a temporary here if the destination
1382 is the stack pointer.
1383 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1384 (*add<mode>3_poly_1): New instruction.
1385 (set_clobber_cc): New expander.
1387 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1389 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1390 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1391 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1392 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1393 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1394 Change innermode from fixed_mode_size to machine_mode.
1395 (simplify_subreg): Update call accordingly. Handle a constant-sized
1396 subreg of a variable-length CONST_VECTOR.
1398 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1399 Alan Hayward <alan.hayward@arm.com>
1400 David Sherwood <david.sherwood@arm.com>
1402 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1403 (add_offset_to_base): New function, split out from...
1404 (create_mem_ref): ...here. When handling a scale other than 1,
1405 check first whether the address is valid without the offset.
1406 Add it into the base if so, leaving the index and scale as-is.
1408 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1410 PR c++/83778
1411 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1412 fold_for_warn before checking if arg2 is INTEGER_CST.
1414 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1416 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1417 (store_multiple_operation): Delete.
1418 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1419 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1420 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1421 guarded by TARGET_STRING.
1422 (rs6000_output_load_multiple): Delete.
1423 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1424 OPTION_MASK_STRING / TARGET_STRING handling.
1425 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1426 (const rs6000_opt_masks) <"string">: Change mask to 0.
1427 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1428 (MASK_STRING): Delete.
1429 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1430 parts. Simplify.
1431 (load_multiple): Delete.
1432 (*ldmsi8): Delete.
1433 (*ldmsi7): Delete.
1434 (*ldmsi6): Delete.
1435 (*ldmsi5): Delete.
1436 (*ldmsi4): Delete.
1437 (*ldmsi3): Delete.
1438 (store_multiple): Delete.
1439 (*stmsi8): Delete.
1440 (*stmsi7): Delete.
1441 (*stmsi6): Delete.
1442 (*stmsi5): Delete.
1443 (*stmsi4): Delete.
1444 (*stmsi3): Delete.
1445 (movmemsi_8reg): Delete.
1446 (corresponding unnamed define_insn): Delete.
1447 (movmemsi_6reg): Delete.
1448 (corresponding unnamed define_insn): Delete.
1449 (movmemsi_4reg): Delete.
1450 (corresponding unnamed define_insn): Delete.
1451 (movmemsi_2reg): Delete.
1452 (corresponding unnamed define_insn): Delete.
1453 (movmemsi_1reg): Delete.
1454 (corresponding unnamed define_insn): Delete.
1455 * config/rs6000/rs6000.opt (mno-string): New.
1456 (mstring): Replace by deprecation warning stub.
1457 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1459 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1461 * regrename.c (regrename_do_replace): If replacing the same
1462 reg multiple times, try to reuse last created gen_raw_REG.
1464 PR debug/81155
1465 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1466 main to workaround a bug in GDB.
1468 2018-01-12 Tom de Vries <tom@codesourcery.com>
1470 PR target/83737
1471 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1473 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1475 PR rtl-optimization/80481
1476 * ira-color.c (get_cap_member): New function.
1477 (allocnos_conflict_by_live_ranges_p): Use it.
1478 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1479 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1481 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1483 PR target/83628
1484 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1485 (*saddl_se_1): Ditto.
1486 (*ssubsi_1): Ditto.
1487 (*saddl_se_1): Ditto.
1489 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1491 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1492 rather than wi::to_widest for DR_INITs.
1493 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1494 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1495 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1496 INTEGER_CSTs.
1497 (vect_analyze_group_access_1): Note that here.
1499 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1501 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1502 polynomial type sizes.
1504 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1506 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1507 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1508 (gimple_add_tmp_var): Likewise.
1510 2018-01-12 Martin Liska <mliska@suse.cz>
1512 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1513 (gimple_alloc_sizes): Likewise.
1514 (dump_gimple_statistics): Use PRIu64 in printf format.
1515 * gimple.h: Change uint64_t to int.
1517 2018-01-12 Martin Liska <mliska@suse.cz>
1519 * tree-core.h: Use uint64_t instead of int.
1520 * tree.c (tree_node_counts): Likewise.
1521 (tree_node_sizes): Likewise.
1522 (dump_tree_statistics): Use PRIu64 in printf format.
1524 2018-01-12 Martin Liska <mliska@suse.cz>
1526 * Makefile.in: As qsort_chk is implemented in vec.c, add
1527 vec.o to linkage of gencfn-macros.
1528 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1529 passing the info to record_node_allocation_statistics.
1530 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1531 and pass the info.
1532 * ggc-common.c (struct ggc_usage): Add operator== and use
1533 it in operator< and compare function.
1534 * mem-stats.h (struct mem_usage): Likewise.
1535 * vec.c (struct vec_usage): Remove operator< and compare
1536 function. Can be simply inherited.
1538 2018-01-12 Martin Jambor <mjambor@suse.cz>
1540 PR target/81616
1541 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1542 * tree-ssa-math-opts.c: Include domwalk.h.
1543 (convert_mult_to_fma_1): New function.
1544 (fma_transformation_info): New type.
1545 (fma_deferring_state): Likewise.
1546 (cancel_fma_deferring): New function.
1547 (result_of_phi): Likewise.
1548 (last_fma_candidate_feeds_initial_phi): Likewise.
1549 (convert_mult_to_fma): Added deferring logic, split actual
1550 transformation to convert_mult_to_fma_1.
1551 (math_opts_dom_walker): New type.
1552 (math_opts_dom_walker::after_dom_children): New method, body moved
1553 here from pass_optimize_widening_mul::execute, added deferring logic
1554 bits.
1555 (pass_optimize_widening_mul::execute): Moved most of code to
1556 math_opts_dom_walker::after_dom_children.
1557 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1558 * config/i386/i386.c (ix86_option_override_internal): Added
1559 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1561 2018-01-12 Richard Biener <rguenther@suse.de>
1563 PR debug/83157
1564 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1565 inline instance vars.
1567 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1569 PR target/81819
1570 * config/rx/rx.c (rx_is_restricted_memory_address):
1571 Handle SUBREG case.
1573 2018-01-12 Richard Biener <rguenther@suse.de>
1575 PR tree-optimization/80846
1576 * target.def (split_reduction): New target hook.
1577 * targhooks.c (default_split_reduction): New function.
1578 * targhooks.h (default_split_reduction): Declare.
1579 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1580 target requests first reduce vectors by combining low and high
1581 parts.
1582 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1583 (get_vectype_for_scalar_type_and_size): Export.
1584 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1585 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1586 * doc/tm.texi: Regenerate.
1587 * config/i386/i386.c (ix86_split_reduction): Implement
1588 TARGET_VECTORIZE_SPLIT_REDUCTION.
1590 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1592 PR target/83368
1593 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1594 in PIC mode except for TARGET_VXWORKS_RTP.
1595 * config/sparc/sparc.c: Include cfgrtl.h.
1596 (TARGET_INIT_PIC_REG): Define.
1597 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1598 (sparc_pic_register_p): New predicate.
1599 (sparc_legitimate_address_p): Use it.
1600 (sparc_legitimize_pic_address): Likewise.
1601 (sparc_delegitimize_address): Likewise.
1602 (sparc_mode_dependent_address_p): Likewise.
1603 (gen_load_pcrel_sym): Remove 4th parameter.
1604 (load_got_register): Adjust call to above. Remove obsolete stuff.
1605 (sparc_expand_prologue): Do not call load_got_register here.
1606 (sparc_flat_expand_prologue): Likewise.
1607 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1608 (sparc_use_pseudo_pic_reg): New function.
1609 (sparc_init_pic_reg): Likewise.
1610 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1611 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1613 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1615 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1616 Add item for branch_cost.
1618 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1620 PR rtl-optimization/83565
1621 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1622 not extend the result to a larger mode for rotate operations.
1623 (num_sign_bit_copies1): Likewise.
1625 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1627 PR target/40411
1628 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1629 -symbolic.
1630 Use values-Xc.o for -pedantic.
1631 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1633 2018-01-12 Martin Liska <mliska@suse.cz>
1635 PR ipa/83054
1636 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1637 New function.
1638 (possible_polymorphic_call_targets): Use it.
1639 (ipa_devirt): Likewise.
1641 2018-01-12 Martin Liska <mliska@suse.cz>
1643 * profile-count.h (enum profile_quality): Use 0 as invalid
1644 enum value of profile_quality.
1646 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1648 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1649 -mext-string options.
1651 2018-01-12 Richard Biener <rguenther@suse.de>
1653 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1654 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1655 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1656 Likewise.
1657 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1659 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1661 * configure.ac (--with-long-double-format): Add support for the
1662 configuration option to change the default long double format on
1663 PowerPC systems.
1664 * config.gcc (powerpc*-linux*-*): Likewise.
1665 * configure: Regenerate.
1666 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1667 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1668 used without modification.
1670 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1672 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1673 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1674 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1675 MISC_BUILTIN_SPEC_BARRIER.
1676 (rs6000_init_builtins): Likewise.
1677 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1678 enum value.
1679 (speculation_barrier): New define_insn.
1680 * doc/extend.texi: Document __builtin_speculation_barrier.
1682 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1684 PR target/83203
1685 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1686 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1687 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1688 iterators.
1689 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1690 integral modes instead of "ss" and "sd".
1691 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1692 vectors with 32-bit and 64-bit elements.
1693 (vecdupssescalarmodesuffix): New mode attribute.
1694 (vec_dup<mode>): Use it.
1696 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1698 PR target/83330
1699 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1700 frame if argument is passed on stack.
1702 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1704 PR target/82682
1705 * ree.c (combine_reaching_defs): Optimize also
1706 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1707 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1709 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1711 PR middle-end/83189
1712 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1714 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1716 PR middle-end/83718
1717 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1718 after they are computed.
1720 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1722 PR tree-optimization/83695
1723 * gimple-loop-linterchange.cc
1724 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1725 reset cached scev information after interchange.
1726 (pass_linterchange::execute): Remove call to scev_reset_htab.
1728 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1730 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1731 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1732 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1733 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1734 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1735 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1736 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1737 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1738 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1739 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1740 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1741 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1742 (V_lane_reg): Likewise.
1743 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1744 New define_expand.
1745 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1746 (vfmal_lane_low<mode>_intrinsic,
1747 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1748 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1749 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1750 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1751 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1752 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1754 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1756 * config/arm/arm-cpus.in (fp16fml): New feature.
1757 (ALL_SIMD): Add fp16fml.
1758 (armv8.2-a): Add fp16fml as an option.
1759 (armv8.3-a): Likewise.
1760 (armv8.4-a): Add fp16fml as part of fp16.
1761 * config/arm/arm.h (TARGET_FP16FML): Define.
1762 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1763 when appropriate.
1764 * config/arm/arm-modes.def (V2HF): Define.
1765 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1766 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1767 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1768 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1769 vfmsl_low, vfmsl_high): New set of builtins.
1770 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1771 (vfml_op): New code attribute.
1772 (VFMLHALVES): New int iterator.
1773 (VFML, VFMLSEL): New mode attributes.
1774 (V_reg): Define mapping for V2HF.
1775 (V_hi, V_lo): New mode attributes.
1776 (VF_constraint): Likewise.
1777 (vfml_half, vfml_half_selector): New int attributes.
1778 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1779 define_expand.
1780 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1781 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1782 New define_insn.
1783 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1784 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1785 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1786 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1787 documentation.
1788 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1789 Document new effective target and option set.
1791 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1793 * config/arm/arm-cpus.in (armv8_4): New feature.
1794 (ARMv8_4a): New fgroup.
1795 (armv8.4-a): New arch.
1796 * config/arm/arm-tables.opt: Regenerate.
1797 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1798 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1799 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1800 Add matching rules for -march=armv8.4-a and extensions.
1801 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1803 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1805 PR target/81821
1806 * config/rx/rx.md (BW): New mode attribute.
1807 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1809 2018-01-11 Richard Biener <rguenther@suse.de>
1811 PR tree-optimization/83435
1812 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1813 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1814 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1816 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1817 Alan Hayward <alan.hayward@arm.com>
1818 David Sherwood <david.sherwood@arm.com>
1820 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1821 field.
1822 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1823 (aarch64_print_address_internal): Use it to check for a zero offset.
1825 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1826 Alan Hayward <alan.hayward@arm.com>
1827 David Sherwood <david.sherwood@arm.com>
1829 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1830 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1831 Return a poly_int64 rather than a HOST_WIDE_INT.
1832 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1833 rather than a HOST_WIDE_INT.
1834 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1835 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1836 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1837 final_offset from HOST_WIDE_INT to poly_int64.
1838 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1839 to_constant when getting the number of units in an Advanced SIMD
1840 mode.
1841 (aarch64_builtin_vectorized_function): Check for a constant number
1842 of units.
1843 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1844 GET_MODE_SIZE.
1845 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1846 attribute instead of GET_MODE_NUNITS.
1847 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1848 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1849 GET_MODE_SIZE for fixed-size registers.
1850 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1851 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1852 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1853 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1854 (aarch64_print_operand, aarch64_print_address_internal)
1855 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1856 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1857 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1858 Handle polynomial GET_MODE_SIZE.
1859 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1860 wider than SImode without modification.
1861 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1862 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1863 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1864 passing and returning SVE modes.
1865 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1866 rather than GEN_INT.
1867 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1868 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1869 (aarch64_allocate_and_probe_stack_space): Likewise.
1870 (aarch64_layout_frame): Cope with polynomial offsets.
1871 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1872 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1873 polynomial offsets.
1874 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1875 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1876 poly_int64 rather than a HOST_WIDE_INT.
1877 (aarch64_get_separate_components, aarch64_process_components)
1878 (aarch64_expand_prologue, aarch64_expand_epilogue)
1879 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1880 (aarch64_anchor_offset): New function, split out from...
1881 (aarch64_legitimize_address): ...here.
1882 (aarch64_builtin_vectorization_cost): Handle polynomial
1883 TYPE_VECTOR_SUBPARTS.
1884 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1885 GET_MODE_NUNITS.
1886 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1887 number of elements from the PARALLEL rather than the mode.
1888 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1889 rather than GET_MODE_BITSIZE.
1890 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1891 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
1892 (aarch64_expand_vec_perm_const_1): Handle polynomial
1893 d->perm.length () and d->perm elements.
1894 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
1895 Apply to_constant to d->perm elements.
1896 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
1897 polynomial CONST_VECTOR_NUNITS.
1898 (aarch64_move_pointer): Take amount as a poly_int64 rather
1899 than an int.
1900 (aarch64_progress_pointer): Avoid temporary variable.
1901 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
1902 the mode attribute instead of GET_MODE.
1904 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1905 Alan Hayward <alan.hayward@arm.com>
1906 David Sherwood <david.sherwood@arm.com>
1908 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
1909 x exists before using it.
1910 (aarch64_add_constant_internal): Rename to...
1911 (aarch64_add_offset_1): ...this. Replace regnum with separate
1912 src and dest rtxes. Handle the case in which they're different,
1913 including when the offset is zero. Replace scratchreg with an rtx.
1914 Use 2 additions if there is no spare register into which we can
1915 move a 16-bit constant.
1916 (aarch64_add_constant): Delete.
1917 (aarch64_add_offset): Replace reg with separate src and dest
1918 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
1919 Use aarch64_add_offset_1.
1920 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
1921 an rtx rather than an int. Take the delta as a poly_int64
1922 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
1923 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
1924 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
1925 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
1926 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
1927 and aarch64_add_sp.
1928 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
1929 aarch64_add_constant.
1931 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1933 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
1934 Use scalar_float_mode.
1936 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1938 * config/aarch64/aarch64-simd.md
1939 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
1940 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
1941 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
1942 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
1943 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
1944 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
1945 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
1946 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
1947 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
1948 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
1950 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1952 PR target/83514
1953 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
1954 targ_options->x_arm_arch_string is non NULL.
1956 2018-01-11 Tamar Christina <tamar.christina@arm.com>
1958 * config/aarch64/aarch64.h
1959 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
1961 2018-01-11 Sudakshina Das <sudi.das@arm.com>
1963 PR target/82096
1964 * expmed.c (emit_store_flag_force): Swap if const op0
1965 and change VOIDmode to mode of op0.
1967 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1969 PR rtl-optimization/83761
1970 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
1971 than bytes to mode_for_size.
1973 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1975 PR middle-end/83189
1976 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
1977 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
1978 profile.
1980 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1982 PR middle-end/83575
1983 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
1984 when in layout mode.
1985 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
1986 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
1987 partition fixup.
1989 2018-01-10 Michael Collison <michael.collison@arm.com>
1991 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
1992 * config/aarch64/aarch64-option-extension.def: Add
1993 AARCH64_OPT_EXTENSION of 'fp16fml'.
1994 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1995 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
1996 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
1997 * config/aarch64/constraints.md (Ui7): New constraint.
1998 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
1999 (VFMLA_SEL_W): Ditto.
2000 (f16quad): Ditto.
2001 (f16mac1): Ditto.
2002 (VFMLA16_LOW): New int iterator.
2003 (VFMLA16_HIGH): Ditto.
2004 (UNSPEC_FMLAL): New unspec.
2005 (UNSPEC_FMLSL): Ditto.
2006 (UNSPEC_FMLAL2): Ditto.
2007 (UNSPEC_FMLSL2): Ditto.
2008 (f16mac): New code attribute.
2009 * config/aarch64/aarch64-simd-builtins.def
2010 (aarch64_fmlal_lowv2sf): Ditto.
2011 (aarch64_fmlsl_lowv2sf): Ditto.
2012 (aarch64_fmlalq_lowv4sf): Ditto.
2013 (aarch64_fmlslq_lowv4sf): Ditto.
2014 (aarch64_fmlal_highv2sf): Ditto.
2015 (aarch64_fmlsl_highv2sf): Ditto.
2016 (aarch64_fmlalq_highv4sf): Ditto.
2017 (aarch64_fmlslq_highv4sf): Ditto.
2018 (aarch64_fmlal_lane_lowv2sf): Ditto.
2019 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2020 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2021 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2022 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2023 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2024 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2025 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2026 (aarch64_fmlal_lane_highv2sf): Ditto.
2027 (aarch64_fmlsl_lane_highv2sf): Ditto.
2028 (aarch64_fmlal_laneq_highv2sf): Ditto.
2029 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2030 (aarch64_fmlalq_lane_highv4sf): Ditto.
2031 (aarch64_fmlsl_lane_highv4sf): Ditto.
2032 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2033 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2034 * config/aarch64/aarch64-simd.md:
2035 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2036 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2037 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2038 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2039 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2040 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2041 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2042 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2043 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2044 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2045 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2046 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2047 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2048 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2049 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2050 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2051 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2052 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2053 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2054 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2055 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2056 (vfmlsl_low_u32): Ditto.
2057 (vfmlalq_low_u32): Ditto.
2058 (vfmlslq_low_u32): Ditto.
2059 (vfmlal_high_u32): Ditto.
2060 (vfmlsl_high_u32): Ditto.
2061 (vfmlalq_high_u32): Ditto.
2062 (vfmlslq_high_u32): Ditto.
2063 (vfmlal_lane_low_u32): Ditto.
2064 (vfmlsl_lane_low_u32): Ditto.
2065 (vfmlal_laneq_low_u32): Ditto.
2066 (vfmlsl_laneq_low_u32): Ditto.
2067 (vfmlalq_lane_low_u32): Ditto.
2068 (vfmlslq_lane_low_u32): Ditto.
2069 (vfmlalq_laneq_low_u32): Ditto.
2070 (vfmlslq_laneq_low_u32): Ditto.
2071 (vfmlal_lane_high_u32): Ditto.
2072 (vfmlsl_lane_high_u32): Ditto.
2073 (vfmlal_laneq_high_u32): Ditto.
2074 (vfmlsl_laneq_high_u32): Ditto.
2075 (vfmlalq_lane_high_u32): Ditto.
2076 (vfmlslq_lane_high_u32): Ditto.
2077 (vfmlalq_laneq_high_u32): Ditto.
2078 (vfmlslq_laneq_high_u32): Ditto.
2079 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2080 (AARCH64_FL_FOR_ARCH8_4): New.
2081 (AARCH64_ISA_F16FML): New ISA flag.
2082 (TARGET_F16FML): New feature flag for fp16fml.
2083 (doc/invoke.texi): Document new fp16fml option.
2085 2018-01-10 Michael Collison <michael.collison@arm.com>
2087 * config/aarch64/aarch64-builtins.c:
2088 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2089 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2090 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2091 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2092 (AARCH64_ISA_SHA3): New ISA flag.
2093 (TARGET_SHA3): New feature flag for sha3.
2094 * config/aarch64/iterators.md (sha512_op): New int attribute.
2095 (CRYPTO_SHA512): New int iterator.
2096 (UNSPEC_SHA512H): New unspec.
2097 (UNSPEC_SHA512H2): Ditto.
2098 (UNSPEC_SHA512SU0): Ditto.
2099 (UNSPEC_SHA512SU1): Ditto.
2100 * config/aarch64/aarch64-simd-builtins.def
2101 (aarch64_crypto_sha512hqv2di): New builtin.
2102 (aarch64_crypto_sha512h2qv2di): Ditto.
2103 (aarch64_crypto_sha512su0qv2di): Ditto.
2104 (aarch64_crypto_sha512su1qv2di): Ditto.
2105 (aarch64_eor3qv8hi): Ditto.
2106 (aarch64_rax1qv2di): Ditto.
2107 (aarch64_xarqv2di): Ditto.
2108 (aarch64_bcaxqv8hi): Ditto.
2109 * config/aarch64/aarch64-simd.md:
2110 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2111 (aarch64_crypto_sha512su0qv2di): Ditto.
2112 (aarch64_crypto_sha512su1qv2di): Ditto.
2113 (aarch64_eor3qv8hi): Ditto.
2114 (aarch64_rax1qv2di): Ditto.
2115 (aarch64_xarqv2di): Ditto.
2116 (aarch64_bcaxqv8hi): Ditto.
2117 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2118 (vsha512h2q_u64): Ditto.
2119 (vsha512su0q_u64): Ditto.
2120 (vsha512su1q_u64): Ditto.
2121 (veor3q_u16): Ditto.
2122 (vrax1q_u64): Ditto.
2123 (vxarq_u64): Ditto.
2124 (vbcaxq_u16): Ditto.
2125 * config/arm/types.md (crypto_sha512): New type attribute.
2126 (crypto_sha3): Ditto.
2127 (doc/invoke.texi): Document new sha3 option.
2129 2018-01-10 Michael Collison <michael.collison@arm.com>
2131 * config/aarch64/aarch64-builtins.c:
2132 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2133 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2134 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2135 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2136 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2137 (AARCH64_ISA_SM4): New ISA flag.
2138 (TARGET_SM4): New feature flag for sm4.
2139 * config/aarch64/aarch64-simd-builtins.def
2140 (aarch64_sm3ss1qv4si): Ditto.
2141 (aarch64_sm3tt1aq4si): Ditto.
2142 (aarch64_sm3tt1bq4si): Ditto.
2143 (aarch64_sm3tt2aq4si): Ditto.
2144 (aarch64_sm3tt2bq4si): Ditto.
2145 (aarch64_sm3partw1qv4si): Ditto.
2146 (aarch64_sm3partw2qv4si): Ditto.
2147 (aarch64_sm4eqv4si): Ditto.
2148 (aarch64_sm4ekeyqv4si): Ditto.
2149 * config/aarch64/aarch64-simd.md:
2150 (aarch64_sm3ss1qv4si): Ditto.
2151 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2152 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2153 (aarch64_sm4eqv4si): Ditto.
2154 (aarch64_sm4ekeyqv4si): Ditto.
2155 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2156 (sm3part_op): Ditto.
2157 (CRYPTO_SM3TT): Ditto.
2158 (CRYPTO_SM3PART): Ditto.
2159 (UNSPEC_SM3SS1): New unspec.
2160 (UNSPEC_SM3TT1A): Ditto.
2161 (UNSPEC_SM3TT1B): Ditto.
2162 (UNSPEC_SM3TT2A): Ditto.
2163 (UNSPEC_SM3TT2B): Ditto.
2164 (UNSPEC_SM3PARTW1): Ditto.
2165 (UNSPEC_SM3PARTW2): Ditto.
2166 (UNSPEC_SM4E): Ditto.
2167 (UNSPEC_SM4EKEY): Ditto.
2168 * config/aarch64/constraints.md (Ui2): New constraint.
2169 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2170 * config/arm/types.md (crypto_sm3): New type attribute.
2171 (crypto_sm4): Ditto.
2172 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2173 (vsm3tt1aq_u32): Ditto.
2174 (vsm3tt1bq_u32): Ditto.
2175 (vsm3tt2aq_u32): Ditto.
2176 (vsm3tt2bq_u32): Ditto.
2177 (vsm3partw1q_u32): Ditto.
2178 (vsm3partw2q_u32): Ditto.
2179 (vsm4eq_u32): Ditto.
2180 (vsm4ekeyq_u32): Ditto.
2181 (doc/invoke.texi): Document new sm4 option.
2183 2018-01-10 Michael Collison <michael.collison@arm.com>
2185 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2186 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2187 (AARCH64_FL_FOR_ARCH8_4): New.
2188 (AARCH64_FL_V8_4): New flag.
2189 (doc/invoke.texi): Document new armv8.4-a option.
2191 2018-01-10 Michael Collison <michael.collison@arm.com>
2193 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2194 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2195 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2196 * config/aarch64/aarch64-option-extension.def: Add
2197 AARCH64_OPT_EXTENSION of 'sha2'.
2198 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2199 (crypto): Disable sha2 and aes if crypto disabled.
2200 (crypto): Enable aes and sha2 if enabled.
2201 (simd): Disable sha2 and aes if simd disabled.
2202 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2203 New flags.
2204 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2205 (TARGET_SHA2): New feature flag for sha2.
2206 (TARGET_AES): New feature flag for aes.
2207 * config/aarch64/aarch64-simd.md:
2208 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2209 conditional on TARGET_AES.
2210 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2211 (aarch64_crypto_sha1hsi): Make pattern conditional
2212 on TARGET_SHA2.
2213 (aarch64_crypto_sha1hv4si): Ditto.
2214 (aarch64_be_crypto_sha1hv4si): Ditto.
2215 (aarch64_crypto_sha1su1v4si): Ditto.
2216 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2217 (aarch64_crypto_sha1su0v4si): Ditto.
2218 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2219 (aarch64_crypto_sha256su0v4si): Ditto.
2220 (aarch64_crypto_sha256su1v4si): Ditto.
2221 (doc/invoke.texi): Document new aes and sha2 options.
2223 2018-01-10 Martin Sebor <msebor@redhat.com>
2225 PR tree-optimization/83781
2226 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2227 as string arrays.
2229 2018-01-11 Martin Sebor <msebor@gmail.com>
2230 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2232 PR tree-optimization/83501
2233 PR tree-optimization/81703
2235 * tree-ssa-strlen.c (get_string_cst): Rename...
2236 (get_string_len): ...to this. Handle global constants.
2237 (handle_char_store): Adjust.
2239 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2240 Jim Wilson <jimw@sifive.com>
2242 * config/riscv/riscv-protos.h (riscv_output_return): New.
2243 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2244 (riscv_attribute_table, riscv_output_return),
2245 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2246 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2247 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2248 function.
2249 (riscv_expand_prologue): Add early return for naked function.
2250 (riscv_expand_epilogue): Likewise.
2251 (riscv_function_ok_for_sibcall): Return false for naked function.
2252 (riscv_set_current_function): New.
2253 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2254 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2255 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2256 * doc/extend.texi (RISC-V Function Attributes): New.
2258 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2260 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2261 check for 128-bit long double before checking TCmode.
2262 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2263 128-bit long doubles before checking TFmode or TCmode.
2264 (FLOAT128_IBM_P): Likewise.
2266 2018-01-10 Martin Sebor <msebor@redhat.com>
2268 PR tree-optimization/83671
2269 * builtins.c (c_strlen): Unconditionally return zero for the empty
2270 string.
2271 Use -Warray-bounds for warnings.
2272 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2273 for non-constant array indices with COMPONENT_REF, arrays of
2274 arrays, and pointers to arrays.
2275 (gimple_fold_builtin_strlen): Determine and set length range for
2276 non-constant character arrays.
2278 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2280 PR middle-end/81897
2281 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2282 empty blocks.
2284 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2286 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2288 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2290 PR target/83399
2291 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2292 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2293 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2294 indexed_or_indirect_operand predicate.
2295 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2296 (*vsx_le_perm_load_v8hi): Likewise.
2297 (*vsx_le_perm_load_v16qi): Likewise.
2298 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2299 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2300 (*vsx_le_perm_store_v8hi): Likewise.
2301 (*vsx_le_perm_store_v16qi): Likewise.
2302 (eight unnamed splitters): Likewise.
2304 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2306 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2307 * config/rs6000/emmintrin.h: Likewise.
2308 * config/rs6000/mmintrin.h: Likewise.
2309 * config/rs6000/xmmintrin.h: Likewise.
2311 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2313 PR c++/43486
2314 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2315 "public_flag".
2316 * tree.c (tree_nop_conversion): Return true for location wrapper
2317 nodes.
2318 (maybe_wrap_with_location): New function.
2319 (selftest::check_strip_nops): New function.
2320 (selftest::test_location_wrappers): New function.
2321 (selftest::tree_c_tests): Call it.
2322 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2323 (maybe_wrap_with_location): New decl.
2324 (EXPR_LOCATION_WRAPPER_P): New macro.
2325 (location_wrapper_p): New inline function.
2326 (tree_strip_any_location_wrapper): New inline function.
2328 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2330 PR target/83735
2331 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2332 stack_realign_offset for the largest alignment of stack slot
2333 actually used.
2334 (ix86_find_max_used_stack_alignment): New function.
2335 (ix86_finalize_stack_frame_flags): Use it. Set
2336 max_used_stack_alignment if we don't realign stack.
2337 * config/i386/i386.h (machine_function): Add
2338 max_used_stack_alignment.
2340 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2342 * config/arm/arm.opt (-mbranch-cost): New option.
2343 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2344 account.
2346 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2348 PR target/83629
2349 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2350 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2352 2018-01-10 Richard Biener <rguenther@suse.de>
2354 PR debug/83765
2355 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2356 early out so it also covers the case where we have a non-NULL
2357 origin.
2359 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2361 PR tree-optimization/83753
2362 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2363 for non-strided grouped accesses if the number of elements is 1.
2365 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2367 PR target/81616
2368 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2369 * i386.h (TARGET_USE_GATHER): Define.
2370 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2372 2018-01-10 Martin Liska <mliska@suse.cz>
2374 PR bootstrap/82831
2375 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2376 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2377 partitioning.
2378 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2379 CLEANUP_NO_PARTITIONING is not set.
2381 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2383 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2384 for vectors, as a partial revert of r254296.
2385 * rtl.h (const_vec_p): Delete.
2386 (const_vec_duplicate_p): Don't test for vector CONSTs.
2387 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2388 * expmed.c (make_tree): Likewise.
2390 Revert:
2391 * common.md (E, F): Use CONSTANT_P instead of checking for
2392 CONST_VECTOR.
2393 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2394 checking for CONST_VECTOR.
2396 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2398 PR middle-end/83575
2399 * predict.c (force_edge_cold): Handle in more sane way edges
2400 with no prediction.
2402 2018-01-09 Carl Love <cel@us.ibm.com>
2404 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2405 V4SI, V4SF types.
2406 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2407 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2408 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2409 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2410 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2411 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2412 * config/rs6000/rs6000-protos.h: Add extern defition for
2413 rs6000_generate_float2_double_code.
2414 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2415 function.
2416 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2417 (float2_v2df): Add define_expand.
2419 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2421 PR target/83628
2422 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2423 op_mode in the force_to_mode call.
2425 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2427 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2428 instead of checking each element individually.
2429 (aarch64_evpc_uzp): Likewise.
2430 (aarch64_evpc_zip): Likewise.
2431 (aarch64_evpc_ext): Likewise.
2432 (aarch64_evpc_rev): Likewise.
2433 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2434 instead of checking each element individually. Return true without
2435 generating rtl if
2436 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2437 whether all selected elements come from the same input, instead of
2438 checking each element individually. Remove calls to gen_rtx_REG,
2439 start_sequence and end_sequence and instead assert that no rtl is
2440 generated.
2442 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2444 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2445 order of HIGH and CONST checks.
2447 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2449 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2450 if the destination isn't an SSA_NAME.
2452 2018-01-09 Richard Biener <rguenther@suse.de>
2454 PR tree-optimization/83668
2455 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2456 move prologue...
2457 (canonicalize_loop_form): ... here, renamed from ...
2458 (canonicalize_loop_closed_ssa_form): ... this and amended to
2459 swap successor edges for loop exit blocks to make us use
2460 the RPO order we need for initial schedule generation.
2462 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2464 PR tree-optimization/64811
2465 * match.pd: When optimizing comparisons with Inf, avoid
2466 introducing or losing exceptions from comparisons with NaN.
2468 2018-01-09 Martin Liska <mliska@suse.cz>
2470 PR sanitizer/82517
2471 * asan.c (shadow_mem_size): Add gcc_assert.
2473 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2475 Don't save registers in main().
2477 PR target/83738
2478 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2479 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2480 * config/avr/avr.c (avr_set_current_function): Don't error if
2481 naked, OS_task or OS_main are specified at the same time.
2482 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2483 OS_main.
2484 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2485 attribute.
2486 * common/config/avr/avr-common.c (avr_option_optimization_table):
2487 Switch on -mmain-is-OS_task for optimizing compilations.
2489 2018-01-09 Richard Biener <rguenther@suse.de>
2491 PR tree-optimization/83572
2492 * graphite.c: Include cfganal.h.
2493 (graphite_transform_loops): Connect infinite loops to exit
2494 and remove fake edges at the end.
2496 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2498 * ipa-inline.c (edge_badness): Revert accidental checkin.
2500 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2502 PR ipa/80763
2503 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2504 symbols; not inline clones.
2506 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2508 PR target/83507
2509 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2510 hard registers. Formatting fixes.
2512 PR preprocessor/83722
2513 * gcc.c (try_generate_repro): Pass
2514 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2515 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2516 do_report_bug.
2518 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2519 Kito Cheng <kito.cheng@gmail.com>
2521 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2522 (riscv_leaf_function_p): Delete.
2523 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2525 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2527 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2528 function.
2529 (do_ifelse): New function.
2530 (do_isel): New function.
2531 (do_sub3): New function.
2532 (do_add3): New function.
2533 (do_load_mask_compare): New function.
2534 (do_overlap_load_compare): New function.
2535 (expand_compare_loop): New function.
2536 (expand_block_compare): Call expand_compare_loop() when appropriate.
2537 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2538 option description.
2539 (-mblock-compare-inline-loop-limit): New option.
2541 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2543 PR target/83677
2544 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2545 Reverse order of second and third operands in first alternative.
2546 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2547 of first and second elements in UNSPEC_VPERMR vector.
2548 (altivec_expand_vec_perm_le): Likewise.
2550 2017-01-08 Jeff Law <law@redhat.com>
2552 PR rtl-optimizatin/81308
2553 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2554 (process_switch): If group_case_labels makes a change, then set
2555 cfg_altered.
2556 (pass_convert_switch::execute): If a switch is converted, then
2557 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2559 PR rtl-optimization/81308
2560 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2561 splitting insns.
2563 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2565 PR target/83663 - Revert r255946
2566 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2567 generation for cases where splatting a value is not useful.
2568 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2569 across a vec_duplicate and a paradoxical subreg forming a vector
2570 mode to a vec_concat.
2572 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2574 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2575 -march=armv8.3-a variants.
2576 * config/arm/t-multilib: Likewise.
2577 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2579 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2581 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2582 to generate rtl.
2583 (cceq_ior_compare_complement): Give it a name so I can use it, and
2584 change boolean_or_operator predicate to boolean_operator so it can
2585 be used to generate a crand.
2586 (eqne): New code iterator.
2587 (bd/bd_neg): New code_attrs.
2588 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2589 a single define_insn.
2590 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2591 decrement (bdnzt/bdnzf/bdzt/bdzf).
2592 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2593 with the new names of the branch decrement patterns, and added the
2594 names of the branch decrement conditional patterns.
2596 2018-01-08 Richard Biener <rguenther@suse.de>
2598 PR tree-optimization/83563
2599 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2600 cache.
2602 2018-01-08 Richard Biener <rguenther@suse.de>
2604 PR middle-end/83713
2605 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2607 2018-01-08 Richard Biener <rguenther@suse.de>
2609 PR tree-optimization/83685
2610 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2611 references to abnormals.
2613 2018-01-08 Richard Biener <rguenther@suse.de>
2615 PR lto/83719
2616 * dwarf2out.c (output_indirect_strings): Handle empty
2617 skeleton_debug_str_hash.
2618 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2620 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2622 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2623 (emit_store_direct): Likewise.
2624 (arc_trampoline_adjust_address): Likewise.
2625 (arc_asm_trampoline_template): New function.
2626 (arc_initialize_trampoline): Use asm_trampoline_template.
2627 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2628 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2629 * config/arc/arc.md (flush_icache): Delete pattern.
2631 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2633 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2634 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2635 munaligned-access.
2637 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2639 PR target/83681
2640 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2641 by not USED_FOR_TARGET.
2642 (make_pass_resolve_sw_modes): Likewise.
2644 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2646 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2647 USED_FOR_TARGET.
2649 2018-01-08 Richard Biener <rguenther@suse.de>
2651 PR middle-end/83580
2652 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2654 2018-01-08 Richard Biener <rguenther@suse.de>
2656 PR middle-end/83517
2657 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2659 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2661 PR middle-end/81897
2662 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2663 basic blocks with a small number of successors.
2664 (convert_control_dep_chain_into_preds): Improve handling of
2665 forwarder blocks.
2666 (dump_predicates): Split apart into...
2667 (dump_pred_chain): ...here...
2668 (dump_pred_info): ...and here.
2669 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2670 (can_chain_union_be_invalidated_p): Improve check for invalidation
2671 of paths.
2672 (uninit_uses_cannot_happen): Avoid unnecessary if
2673 convert_control_dep_chain_into_preds yielded nothing.
2675 2018-01-06 Martin Sebor <msebor@redhat.com>
2677 PR tree-optimization/83640
2678 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2679 subtracting negative offset from size.
2680 (builtin_access::overlap): Adjust offset bounds of the access to fall
2681 within the size of the object if possible.
2683 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2685 PR rtl-optimization/83699
2686 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2687 extract_bit_field_as_subreg to cases in which the extracted
2688 value is also a vector.
2690 * lra-constraints.c (process_alt_operands): Test for the equivalence
2691 substitutions when detecting a possible reload cycle.
2693 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2695 PR debug/83480
2696 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2697 by default if flag_selective_schedling{,2}. Formatting fixes.
2699 PR rtl-optimization/83682
2700 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2701 if it has non-VECTOR_MODE element mode.
2702 (vec_duplicate_p): Likewise.
2704 PR middle-end/83694
2705 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2706 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2708 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2710 PR target/83604
2711 * config/i386/i386-builtin.def
2712 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2713 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2714 Require also OPTION_MASK_ISA_AVX512F in addition to
2715 OPTION_MASK_ISA_GFNI.
2716 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2717 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2718 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2719 to OPTION_MASK_ISA_GFNI.
2720 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2721 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2722 OPTION_MASK_ISA_AVX512BW.
2723 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2724 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2725 addition to OPTION_MASK_ISA_GFNI.
2726 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2727 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2728 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2729 to OPTION_MASK_ISA_GFNI.
2730 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2731 a requirement for all ISAs rather than any of them with a few
2732 exceptions.
2733 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2734 processing.
2735 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2736 bitmasks to be enabled with 3 exceptions, instead of requiring any
2737 enabled ISA with lots of exceptions.
2738 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2739 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2740 Change avx512bw in isa attribute to avx512f.
2741 * config/i386/sgxintrin.h: Add license boilerplate.
2742 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2743 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2744 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2745 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2746 defined.
2747 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2748 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2749 temporarily sse2 rather than sse if not enabled already.
2751 PR target/83604
2752 * config/i386/sse.md (VI248_VLBW): Rename to ...
2753 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2754 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2755 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2756 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2757 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2758 mode iterator instead of VI248_VLBW.
2760 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2762 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2763 (record_modified): Skip clobbers; add debug output.
2764 (param_change_prob): Use sreal frequencies.
2766 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2768 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2769 punt for user-aligned variables.
2771 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2773 * tree-chrec.c (chrec_contains_symbols): Return true for
2774 POLY_INT_CST.
2776 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2778 PR target/82439
2779 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2780 of (x|y) == x for BICS pattern.
2782 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2784 PR tree-optimization/83605
2785 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2786 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2787 can throw.
2789 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2791 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2792 * config/epiphany/rtems.h: New file.
2794 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2795 Uros Bizjak <ubizjak@gmail.com>
2797 PR target/83554
2798 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2799 QIreg_operand instead of register_operand predicate.
2800 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2801 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2802 comments instead of -fmitigate[-_]rop.
2804 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2806 PR bootstrap/81926
2807 * cgraphunit.c (symbol_table::compile): Switch to text_section
2808 before calling assembly_start debug hook.
2809 * run-rtl-passes.c (run_rtl_passes): Likewise.
2810 Include output.h.
2812 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2814 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2815 range_int_cst_p rather than !symbolic_range_p before calling
2816 extract_range_from_multiplicative_op_1.
2818 2017-01-04 Jeff Law <law@redhat.com>
2820 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2821 redundant test in assertion.
2823 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2825 * doc/rtl.texi: Document machine_mode wrapper classes.
2827 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2829 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2830 using tree_to_uhwi.
2832 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2834 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2835 the VEC_PERM_EXPR fold to fail.
2837 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2839 PR debug/83585
2840 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2841 to switched_sections.
2843 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2845 PR target/83680
2846 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2847 test for d.testing.
2849 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2851 PR target/83387
2852 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2853 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2855 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2857 PR debug/83666
2858 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2859 is BLKmode and bitpos not zero or mode change is needed.
2861 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2863 PR target/83675
2864 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2865 TARGET_VIS2.
2867 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2869 PR target/83628
2870 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2871 instead of MULT rtx. Update all corresponding splitters.
2872 (*saddl_se): Ditto.
2873 (*ssub<modesuffix>): Ditto.
2874 (*ssubl_se): Ditto.
2875 (*cmp_sadd_di): Update split patterns.
2876 (*cmp_sadd_si): Ditto.
2877 (*cmp_sadd_sidi): Ditto.
2878 (*cmp_ssub_di): Ditto.
2879 (*cmp_ssub_si): Ditto.
2880 (*cmp_ssub_sidi): Ditto.
2881 * config/alpha/predicates.md (const23_operand): New predicate.
2882 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2883 Look for ASHIFT, not MULT inner operand.
2884 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2886 2018-01-04 Martin Liska <mliska@suse.cz>
2888 PR gcov-profile/83669
2889 * gcov.c (output_intermediate_file): Add version to intermediate
2890 gcov file.
2891 * doc/gcov.texi: Document new field 'version' in intermediate
2892 file format. Fix location of '-k' option of gcov command.
2894 2018-01-04 Martin Liska <mliska@suse.cz>
2896 PR ipa/82352
2897 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
2899 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2901 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
2903 2018-01-03 Martin Sebor <msebor@redhat.com>
2905 PR tree-optimization/83655
2906 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
2907 checking calls with invalid arguments.
2909 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2911 * tree-vect-stmts.c (vect_get_store_rhs): New function.
2912 (vectorizable_mask_load_store): Delete.
2913 (vectorizable_call): Return false for masked loads and stores.
2914 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
2915 instead of gimple_assign_rhs1.
2916 (vectorizable_load): Handle IFN_MASK_LOAD.
2917 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
2919 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2921 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
2922 split out from..,
2923 (vectorizable_mask_load_store): ...here.
2924 (vectorizable_load): ...and here.
2926 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2928 * tree-vect-stmts.c (vect_build_all_ones_mask)
2929 (vect_build_zero_merge_argument): New functions, split out from...
2930 (vectorizable_load): ...here.
2932 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2934 * tree-vect-stmts.c (vect_check_store_rhs): New function,
2935 split out from...
2936 (vectorizable_mask_load_store): ...here.
2937 (vectorizable_store): ...and here.
2939 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2941 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
2942 split out from...
2943 (vectorizable_mask_load_store): ...here.
2945 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2947 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
2948 (vect_model_store_cost): Take a vec_load_store_type instead of a
2949 vect_def_type.
2950 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
2951 (vect_model_store_cost): Take a vec_load_store_type instead of a
2952 vect_def_type.
2953 (vectorizable_mask_load_store): Update accordingly.
2954 (vectorizable_store): Likewise.
2955 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
2957 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2959 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
2960 IFN_MASK_LOAD calls here rather than...
2961 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
2963 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2964 Alan Hayward <alan.hayward@arm.com>
2965 David Sherwood <david.sherwood@arm.com>
2967 * expmed.c (extract_bit_field_1): For vector extracts,
2968 fall back to extract_bit_field_as_subreg if vec_extract
2969 isn't available.
2971 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2972 Alan Hayward <alan.hayward@arm.com>
2973 David Sherwood <david.sherwood@arm.com>
2975 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
2976 they are variable or constant sized.
2977 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
2978 slots for constant-sized data.
2980 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2981 Alan Hayward <alan.hayward@arm.com>
2982 David Sherwood <david.sherwood@arm.com>
2984 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
2985 handling COND_EXPRs with boolean comparisons, try to find a better
2986 basis for the mask type than the boolean itself.
2988 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2990 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
2991 is calculated and how it can be overridden.
2992 * genmodes.c (max_bitsize_mode_any_mode): New variable.
2993 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
2994 if defined.
2995 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
2996 if nonzero.
2998 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2999 Alan Hayward <alan.hayward@arm.com>
3000 David Sherwood <david.sherwood@arm.com>
3002 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3003 Remove the mode argument.
3004 (aarch64_simd_valid_immediate): Remove the mode and inverse
3005 arguments.
3006 * config/aarch64/iterators.md (bitsize): New iterator.
3007 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3008 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3009 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3010 aarch64_simd_valid_immediate.
3011 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3012 (aarch64_reg_or_bic_imm): Likewise.
3013 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3014 with an insn_type enum and msl with a modifier_type enum.
3015 Replace element_width with a scalar_mode. Change the shift
3016 to unsigned int. Add constructors for scalar_float_mode and
3017 scalar_int_mode elements.
3018 (aarch64_vect_float_const_representable_p): Delete.
3019 (aarch64_can_const_movi_rtx_p)
3020 (aarch64_simd_scalar_immediate_valid_for_move)
3021 (aarch64_simd_make_constant): Update call to
3022 aarch64_simd_valid_immediate.
3023 (aarch64_advsimd_valid_immediate_hs): New function.
3024 (aarch64_advsimd_valid_immediate): Likewise.
3025 (aarch64_simd_valid_immediate): Remove mode and inverse
3026 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3027 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3028 and aarch64_float_const_representable_p on the result.
3029 (aarch64_output_simd_mov_immediate): Remove mode argument.
3030 Update call to aarch64_simd_valid_immediate and use of
3031 simd_immediate_info.
3032 (aarch64_output_scalar_simd_mov_immediate): Update call
3033 accordingly.
3035 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3036 Alan Hayward <alan.hayward@arm.com>
3037 David Sherwood <david.sherwood@arm.com>
3039 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3040 (mode_nunits): Likewise CONST_MODE_NUNITS.
3041 * machmode.def (ADJUST_NUNITS): Document.
3042 * genmodes.c (mode_data::need_nunits_adj): New field.
3043 (blank_mode): Update accordingly.
3044 (adj_nunits): New variable.
3045 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3046 parameter.
3047 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3048 listed in adj_nunits.
3049 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3050 listed in adj_nunits. Don't emit case statements for such modes.
3051 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3052 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3053 nothing if adj_nunits is nonnull.
3054 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3055 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3056 (emit_mode_fbit): Update use of print_maybe_const_decl.
3057 (emit_move_size): Likewise. Treat the array as non-const
3058 if adj_nunits.
3059 (emit_mode_adjustments): Handle adj_nunits.
3061 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3063 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3064 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3065 (VECTOR_MODES): Use it.
3066 (make_vector_modes): Take the prefix as an argument.
3068 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3069 Alan Hayward <alan.hayward@arm.com>
3070 David Sherwood <david.sherwood@arm.com>
3072 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3073 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3074 for MODE_VECTOR_BOOL.
3075 * machmode.def (VECTOR_BOOL_MODE): Document.
3076 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3077 (make_vector_bool_mode): New function.
3078 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3079 MODE_VECTOR_BOOL.
3080 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3081 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3082 Likewise.
3083 * stor-layout.c (int_mode_for_mode): Likewise.
3084 * tree.c (build_vector_type_for_mode): Likewise.
3085 * varasm.c (output_constant_pool_2): Likewise.
3086 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3087 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3088 for MODE_VECTOR_BOOL.
3089 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3090 of mode class checks.
3091 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3092 instead of a list of mode class checks.
3093 (expand_vector_scalar_condition): Likewise.
3094 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3096 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3097 Alan Hayward <alan.hayward@arm.com>
3098 David Sherwood <david.sherwood@arm.com>
3100 * machmode.h (mode_size): Change from unsigned short to
3101 poly_uint16_pod.
3102 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3103 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3104 or if measurement_type is not polynomial.
3105 (fixed_size_mode::includes_p): Check for constant-sized modes.
3106 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3107 return a poly_uint16 rather than an unsigned short.
3108 (emit_mode_size): Change the type of mode_size from unsigned short
3109 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3110 (emit_mode_adjustments): Cope with polynomial vector sizes.
3111 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3112 for GET_MODE_SIZE.
3113 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3114 for GET_MODE_SIZE.
3115 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3116 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3117 * caller-save.c (setup_save_areas): Likewise.
3118 (replace_reg_with_saved_mem): Likewise.
3119 * calls.c (emit_library_call_value_1): Likewise.
3120 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3121 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3122 (gen_lowpart_for_combine): Likewise.
3123 * convert.c (convert_to_integer_1): Likewise.
3124 * cse.c (equiv_constant, cse_insn): Likewise.
3125 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3126 (cselib_subst_to_values): Likewise.
3127 * dce.c (word_dce_process_block): Likewise.
3128 * df-problems.c (df_word_lr_mark_ref): Likewise.
3129 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3130 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3131 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3132 (rtl_for_decl_location): Likewise.
3133 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3134 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3135 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3136 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3137 (expand_expr_real_1): Likewise.
3138 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3139 (pad_below): Likewise.
3140 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3141 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3142 * ira.c (get_subreg_tracking_sizes): Likewise.
3143 * ira-build.c (ira_create_allocno_objects): Likewise.
3144 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3145 (ira_sort_regnos_for_alter_reg): Likewise.
3146 * ira-costs.c (record_operand_costs): Likewise.
3147 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3148 (resolve_simple_move): Likewise.
3149 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3150 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3151 (lra_constraints): Likewise.
3152 (CONST_POOL_OK_P): Reject variable-sized modes.
3153 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3154 (add_pseudo_to_slot, lra_spill): Likewise.
3155 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3156 * optabs-query.c (get_best_extraction_insn): Likewise.
3157 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3158 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3159 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3160 * recog.c (offsettable_address_addr_space_p): Likewise.
3161 * regcprop.c (maybe_mode_change): Likewise.
3162 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3163 * regrename.c (build_def_use): Likewise.
3164 * regstat.c (dump_reg_info): Likewise.
3165 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3166 (find_reloads, find_reloads_subreg_address): Likewise.
3167 * reload1.c (eliminate_regs_1): Likewise.
3168 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3169 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3170 (simplify_binary_operation_1, simplify_subreg): Likewise.
3171 * targhooks.c (default_function_arg_padding): Likewise.
3172 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3173 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3174 (verify_gimple_assign_ternary): Likewise.
3175 * tree-inline.c (estimate_move_cost): Likewise.
3176 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3177 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3178 (get_address_cost_ainc): Likewise.
3179 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3180 (vect_supportable_dr_alignment): Likewise.
3181 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3182 (vectorizable_reduction): Likewise.
3183 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3184 (vectorizable_operation, vectorizable_load): Likewise.
3185 * tree.c (build_same_sized_truth_vector_type): Likewise.
3186 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3187 * var-tracking.c (emit_note_insn_var_location): Likewise.
3188 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3189 (ADDR_VEC_ALIGN): Likewise.
3191 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3192 Alan Hayward <alan.hayward@arm.com>
3193 David Sherwood <david.sherwood@arm.com>
3195 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3196 unsigned short.
3197 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3198 or if measurement_type is polynomial.
3199 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3200 * combine.c (make_extraction): Likewise.
3201 * dse.c (find_shift_sequence): Likewise.
3202 * dwarf2out.c (mem_loc_descriptor): Likewise.
3203 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3204 (extract_bit_field, extract_low_bits): Likewise.
3205 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3206 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3207 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3208 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3209 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3210 * reload.c (find_reloads): Likewise.
3211 * reload1.c (alter_reg): Likewise.
3212 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3213 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3214 * tree-if-conv.c (predicate_mem_writes): Likewise.
3215 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3216 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3217 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3218 * valtrack.c (dead_debug_insert_temp): Likewise.
3219 * varasm.c (mergeable_constant_section): Likewise.
3220 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3222 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3223 Alan Hayward <alan.hayward@arm.com>
3224 David Sherwood <david.sherwood@arm.com>
3226 * expr.c (expand_assignment): Cope with polynomial mode sizes
3227 when assigning to a CONCAT.
3229 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3230 Alan Hayward <alan.hayward@arm.com>
3231 David Sherwood <david.sherwood@arm.com>
3233 * machmode.h (mode_precision): Change from unsigned short to
3234 poly_uint16_pod.
3235 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3236 short.
3237 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3238 or if measurement_type is not polynomial.
3239 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3240 in which the mode is already known to be a scalar_int_mode.
3241 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3242 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3243 initializer.
3244 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3245 for GET_MODE_PRECISION.
3246 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3247 for GET_MODE_PRECISION.
3248 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3249 as polynomial.
3250 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3251 (expand_field_assignment, make_extraction): Likewise.
3252 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3253 (get_last_value): Likewise.
3254 * convert.c (convert_to_integer_1): Likewise.
3255 * cse.c (cse_insn): Likewise.
3256 * expr.c (expand_expr_real_1): Likewise.
3257 * lra-constraints.c (simplify_operand_subreg): Likewise.
3258 * optabs-query.c (can_atomic_load_p): Likewise.
3259 * optabs.c (expand_atomic_load): Likewise.
3260 (expand_atomic_store): Likewise.
3261 * ree.c (combine_reaching_defs): Likewise.
3262 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3263 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3264 * tree.h (type_has_mode_precision_p): Likewise.
3265 * ubsan.c (instrument_si_overflow): Likewise.
3267 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3268 Alan Hayward <alan.hayward@arm.com>
3269 David Sherwood <david.sherwood@arm.com>
3271 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3272 polynomial numbers of units.
3273 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3274 (valid_vector_subparts_p): New function.
3275 (build_vector_type): Remove temporary shim and take the number
3276 of units as a poly_uint64 rather than an int.
3277 (build_opaque_vector_type): Take the number of units as a
3278 poly_uint64 rather than an int.
3279 * tree.c (build_vector_from_ctor): Handle polynomial
3280 TYPE_VECTOR_SUBPARTS.
3281 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3282 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3283 (build_vector_from_val): If the number of units is variable,
3284 use build_vec_duplicate_cst for constant operands and
3285 VEC_DUPLICATE_EXPR otherwise.
3286 (make_vector_type): Remove temporary is_constant ().
3287 (build_vector_type, build_opaque_vector_type): Take the number of
3288 units as a poly_uint64 rather than an int.
3289 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3290 VECTOR_CST_NELTS.
3291 * cfgexpand.c (expand_debug_expr): Likewise.
3292 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3293 (store_constructor, expand_expr_real_1): Likewise.
3294 (const_scalar_mask_from_tree): Likewise.
3295 * fold-const-call.c (fold_const_reduction): Likewise.
3296 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3297 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3298 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3299 (fold_relational_const): Likewise.
3300 (native_interpret_vector): Likewise. Change the size from an
3301 int to an unsigned int.
3302 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3303 TYPE_VECTOR_SUBPARTS.
3304 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3305 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3306 duplicating a non-constant operand into a variable-length vector.
3307 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3308 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3309 * ipa-icf.c (sem_variable::equals): Likewise.
3310 * match.pd: Likewise.
3311 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3312 * print-tree.c (print_node): Likewise.
3313 * stor-layout.c (layout_type): Likewise.
3314 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3315 * tree-cfg.c (verify_gimple_comparison): Likewise.
3316 (verify_gimple_assign_binary): Likewise.
3317 (verify_gimple_assign_ternary): Likewise.
3318 (verify_gimple_assign_single): Likewise.
3319 * tree-pretty-print.c (dump_generic_node): Likewise.
3320 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3321 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3322 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3323 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3324 (vect_shift_permute_load_chain): Likewise.
3325 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3326 (expand_vector_condition, optimize_vector_constructor): Likewise.
3327 (lower_vec_perm, get_compute_type): Likewise.
3328 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3329 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3330 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3331 (vect_recog_mask_conversion_pattern): Likewise.
3332 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3333 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3334 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3335 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3336 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3337 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3338 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3339 (supportable_widening_operation): Likewise.
3340 (supportable_narrowing_operation): Likewise.
3341 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3342 Likewise.
3343 * varasm.c (output_constant): Likewise.
3345 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3346 Alan Hayward <alan.hayward@arm.com>
3347 David Sherwood <david.sherwood@arm.com>
3349 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3350 so that both the length == 3 and length != 3 cases set up their
3351 own permute vectors. Add comments explaining why we know the
3352 number of elements is constant.
3353 (vect_permute_load_chain): Likewise.
3355 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3356 Alan Hayward <alan.hayward@arm.com>
3357 David Sherwood <david.sherwood@arm.com>
3359 * machmode.h (mode_nunits): Change from unsigned char to
3360 poly_uint16_pod.
3361 (ONLY_FIXED_SIZE_MODES): New macro.
3362 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3363 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3364 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3365 New typedefs.
3366 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3367 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3368 or if measurement_type is not polynomial.
3369 * genmodes.c (ZERO_COEFFS): New macro.
3370 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3371 poly_uint16.
3372 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3373 Use ZERO_COEFFS when emitting initializers.
3374 * data-streamer.h (bp_pack_poly_value): New function.
3375 (bp_unpack_poly_value): Likewise.
3376 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3377 for GET_MODE_NUNITS.
3378 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3379 for GET_MODE_NUNITS.
3380 * tree.c (make_vector_type): Remove temporary shim and make
3381 the real function take the number of units as a poly_uint64
3382 rather than an int.
3383 (build_vector_type_for_mode): Handle polynomial nunits.
3384 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3385 * emit-rtl.c (const_vec_series_p_1): Likewise.
3386 (gen_rtx_CONST_VECTOR): Likewise.
3387 * fold-const.c (test_vec_duplicate_folding): Likewise.
3388 * genrecog.c (validate_pattern): Likewise.
3389 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3390 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3391 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3392 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3393 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3394 * rtlanal.c (subreg_get_info): Likewise.
3395 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3396 (vect_grouped_load_supported): Likewise.
3397 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3398 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3399 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3400 (simplify_const_unary_operation, simplify_binary_operation_1)
3401 (simplify_const_binary_operation, simplify_ternary_operation)
3402 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3403 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3404 instead of CONST_VECTOR_NUNITS.
3405 * varasm.c (output_constant_pool_2): Likewise.
3406 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3407 explicit-encoded elements in the XVEC for variable-length vectors.
3409 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3411 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3413 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3414 Alan Hayward <alan.hayward@arm.com>
3415 David Sherwood <david.sherwood@arm.com>
3417 * coretypes.h (fixed_size_mode): Declare.
3418 (fixed_size_mode_pod): New typedef.
3419 * builtins.h (target_builtins::x_apply_args_mode)
3420 (target_builtins::x_apply_result_mode): Change type to
3421 fixed_size_mode_pod.
3422 * builtins.c (apply_args_size, apply_result_size, result_vector)
3423 (expand_builtin_apply_args_1, expand_builtin_apply)
3424 (expand_builtin_return): Update accordingly.
3426 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3428 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3429 * cselib.c (cselib_hash_rtx): Likewise.
3430 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3431 CONST_VECTOR encoding.
3433 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3434 Jeff Law <law@redhat.com>
3436 PR target/83641
3437 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3438 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3439 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3440 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3442 PR target/83641
3443 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3444 explicitly probe *sp in a noreturn function if there were any callee
3445 register saves or frame pointer is needed.
3447 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3449 PR debug/83621
3450 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3451 BLKmode for ternary, binary or unary expressions.
3453 PR debug/83645
3454 * var-tracking.c (delete_vta_debug_insn): New inline function.
3455 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3456 insns from get_insns () to NULL instead of each bb separately.
3457 Use delete_vta_debug_insn. No longer static.
3458 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3459 delete_vta_debug_insns callers.
3460 * rtl.h (delete_vta_debug_insns): Declare.
3461 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3462 instead of variable_tracking_main.
3464 2018-01-03 Martin Sebor <msebor@redhat.com>
3466 PR tree-optimization/83603
3467 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3468 arguments past the endof the argument list in functions declared
3469 without a prototype.
3470 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3471 Avoid checking when arguments are null.
3473 2018-01-03 Martin Sebor <msebor@redhat.com>
3475 PR c/83559
3476 * doc/extend.texi (attribute const): Fix a typo.
3477 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3478 issuing -Wsuggest-attribute for void functions.
3480 2018-01-03 Martin Sebor <msebor@redhat.com>
3482 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3483 offset_int::from instead of wide_int::to_shwi.
3484 (maybe_diag_overlap): Remove assertion.
3485 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3486 * gimple-ssa-sprintf.c (format_directive): Same.
3487 (parse_directive): Same.
3488 (sprintf_dom_walker::compute_format_length): Same.
3489 (try_substitute_return_value): Same.
3491 2017-01-03 Jeff Law <law@redhat.com>
3493 PR middle-end/83654
3494 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3495 non-constant residual for zero at runtime and avoid probing in
3496 that case. Reorganize code for trailing problem to mirror handling
3497 of the residual.
3499 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3501 PR tree-optimization/83501
3502 * tree-ssa-strlen.c (get_string_cst): New.
3503 (handle_char_store): Call get_string_cst.
3505 2018-01-03 Martin Liska <mliska@suse.cz>
3507 PR tree-optimization/83593
3508 * tree-ssa-strlen.c: Include tree-cfg.h.
3509 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3510 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3511 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3512 to false.
3513 (strlen_dom_walker::before_dom_children): Call
3514 gimple_purge_dead_eh_edges. Dump tranformation with details
3515 dump flags.
3516 (strlen_dom_walker::before_dom_children): Update call by adding
3517 new argument cleanup_eh.
3518 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3520 2018-01-03 Martin Liska <mliska@suse.cz>
3522 PR ipa/83549
3523 * cif-code.def (VARIADIC_THUNK): New enum value.
3524 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3525 thunks.
3527 2018-01-03 Jan Beulich <jbeulich@suse.com>
3529 * sse.md (mov<mode>_internal): Tighten condition for when to use
3530 vmovdqu<ssescalarsize> for TI and OI modes.
3532 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3534 Update copyright years.
3536 2018-01-03 Martin Liska <mliska@suse.cz>
3538 PR ipa/83594
3539 * ipa-visibility.c (function_and_variable_visibility): Skip
3540 functions with noipa attribure.
3542 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3544 * gcc.c (process_command): Update copyright notice dates.
3545 * gcov-dump.c (print_version): Ditto.
3546 * gcov.c (print_version): Ditto.
3547 * gcov-tool.c (print_version): Ditto.
3548 * gengtype.c (create_file): Ditto.
3549 * doc/cpp.texi: Bump @copying's copyright year.
3550 * doc/cppinternals.texi: Ditto.
3551 * doc/gcc.texi: Ditto.
3552 * doc/gccint.texi: Ditto.
3553 * doc/gcov.texi: Ditto.
3554 * doc/install.texi: Ditto.
3555 * doc/invoke.texi: Ditto.
3557 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3559 * vector-builder.h (vector_builder::m_full_nelts): Change from
3560 unsigned int to poly_uint64.
3561 (vector_builder::full_nelts): Update prototype accordingly.
3562 (vector_builder::new_vector): Likewise.
3563 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3564 (vector_builder::operator ==): Likewise.
3565 (vector_builder::finalize): Likewise.
3566 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3567 Take the number of elements as a poly_uint64 rather than an
3568 unsigned int.
3569 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3570 from unsigned int to poly_uint64.
3571 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3572 (vec_perm_indices::new_vector): Likewise.
3573 (vec_perm_indices::length): Likewise.
3574 (vec_perm_indices::nelts_per_input): Likewise.
3575 (vec_perm_indices::input_nelts): Likewise.
3576 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3577 number of elements per input as a poly_uint64 rather than an
3578 unsigned int. Use the original encoding for variable-length
3579 vectors, rather than clamping each individual element.
3580 For the second and subsequent elements in each pattern,
3581 clamp the step and base before clamping their sum.
3582 (vec_perm_indices::series_p): Handle polynomial element counts.
3583 (vec_perm_indices::all_in_range_p): Likewise.
3584 (vec_perm_indices_to_tree): Likewise.
3585 (vec_perm_indices_to_rtx): Likewise.
3586 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3587 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3588 (tree_vector_builder::new_binary_operation): Handle polynomial
3589 element counts. Return false if we need to know the number
3590 of elements at compile time.
3591 * fold-const.c (fold_vec_perm): Punt if the number of elements
3592 isn't known at compile time.
3594 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3596 * vec-perm-indices.h (vec_perm_builder): Change element type
3597 from HOST_WIDE_INT to poly_int64.
3598 (vec_perm_indices::element_type): Update accordingly.
3599 (vec_perm_indices::clamp): Handle polynomial element_types.
3600 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3601 (vec_perm_indices::all_in_range_p): Likewise.
3602 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3603 than shwi trees.
3604 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3605 polynomial vec_perm_indices element types.
3606 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3607 * fold-const.c (fold_vec_perm): Likewise.
3608 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3609 * tree-vect-generic.c (lower_vec_perm): Likewise.
3610 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3611 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3612 element type to HOST_WIDE_INT.
3614 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3615 Alan Hayward <alan.hayward@arm.com>
3616 David Sherwood <david.sherwood@arm.com>
3618 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3619 rather than an int. Use plus_constant.
3620 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3621 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3623 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3624 Alan Hayward <alan.hayward@arm.com>
3625 David Sherwood <david.sherwood@arm.com>
3627 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3628 a HOST_WIDE_INT to a poly_int64.
3630 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3631 Alan Hayward <alan.hayward@arm.com>
3632 David Sherwood <david.sherwood@arm.com>
3634 * calls.c (load_register_parameters): Cope with polynomial
3635 mode sizes. Require a constant size for BLKmode parameters
3636 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3637 forces a parameter to be padded at the lsb end in order to
3638 fill a complete number of words, require the parameter size
3639 to be ordered wrt UNITS_PER_WORD.
3641 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3642 Alan Hayward <alan.hayward@arm.com>
3643 David Sherwood <david.sherwood@arm.com>
3645 * reload1.c (spill_stack_slot_width): Change element type
3646 from unsigned int to poly_uint64_pod.
3647 (alter_reg): Treat mode sizes as polynomial.
3649 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3650 Alan Hayward <alan.hayward@arm.com>
3651 David Sherwood <david.sherwood@arm.com>
3653 * reload.c (complex_word_subreg_p): New function.
3654 (reload_inner_reg_of_subreg, push_reload): Use it.
3656 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3657 Alan Hayward <alan.hayward@arm.com>
3658 David Sherwood <david.sherwood@arm.com>
3660 * lra-constraints.c (process_alt_operands): Reject matched
3661 operands whose sizes aren't ordered.
3662 (match_reload): Refer to this check here.
3664 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3665 Alan Hayward <alan.hayward@arm.com>
3666 David Sherwood <david.sherwood@arm.com>
3668 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3669 that the mode size is in the set {1, 2, 4, 8, 16}.
3671 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3672 Alan Hayward <alan.hayward@arm.com>
3673 David Sherwood <david.sherwood@arm.com>
3675 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3676 Use plus_constant instead of gen_rtx_PLUS.
3678 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3679 Alan Hayward <alan.hayward@arm.com>
3680 David Sherwood <david.sherwood@arm.com>
3682 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3683 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3684 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3685 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3686 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3687 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3688 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3689 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3690 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3691 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3692 a poly_int64.
3693 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3694 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3695 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3696 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3697 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3698 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3699 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3700 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3701 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3702 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3703 function.
3704 * expr.c (emit_move_resolve_push): Treat the input and result
3705 of PUSH_ROUNDING as a poly_int64.
3706 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3707 (emit_push_insn): Likewise.
3708 * lra-eliminations.c (mark_not_eliminable): Likewise.
3709 * recog.c (push_operand): Likewise.
3710 * reload1.c (elimination_effects): Likewise.
3711 * rtlanal.c (nonzero_bits1): Likewise.
3712 * calls.c (store_one_arg): Likewise. Require the padding to be
3713 known at compile time.
3715 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3716 Alan Hayward <alan.hayward@arm.com>
3717 David Sherwood <david.sherwood@arm.com>
3719 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3720 Use plus_constant instead of gen_rtx_PLUS.
3722 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3723 Alan Hayward <alan.hayward@arm.com>
3724 David Sherwood <david.sherwood@arm.com>
3726 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3727 rather than an int.
3729 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3730 Alan Hayward <alan.hayward@arm.com>
3731 David Sherwood <david.sherwood@arm.com>
3733 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3734 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3735 via stack temporaries. Treat the mode size as polynomial too.
3737 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3738 Alan Hayward <alan.hayward@arm.com>
3739 David Sherwood <david.sherwood@arm.com>
3741 * expr.c (expand_expr_real_2): When handling conversions involving
3742 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3743 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3744 as a poly_uint64 too.
3746 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3747 Alan Hayward <alan.hayward@arm.com>
3748 David Sherwood <david.sherwood@arm.com>
3750 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3752 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3753 Alan Hayward <alan.hayward@arm.com>
3754 David Sherwood <david.sherwood@arm.com>
3756 * combine.c (can_change_dest_mode): Handle polynomial
3757 REGMODE_NATURAL_SIZE.
3758 * expmed.c (store_bit_field_1): Likewise.
3759 * expr.c (store_constructor): Likewise.
3760 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3761 and polynomial REGMODE_NATURAL_SIZE.
3762 (gen_lowpart_common): Likewise.
3763 * reginfo.c (record_subregs_of_mode): Likewise.
3764 * rtlanal.c (read_modify_subreg_p): Likewise.
3766 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3767 Alan Hayward <alan.hayward@arm.com>
3768 David Sherwood <david.sherwood@arm.com>
3770 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3771 numbers of elements.
3773 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3774 Alan Hayward <alan.hayward@arm.com>
3775 David Sherwood <david.sherwood@arm.com>
3777 * match.pd: Cope with polynomial numbers of vector elements.
3779 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3780 Alan Hayward <alan.hayward@arm.com>
3781 David Sherwood <david.sherwood@arm.com>
3783 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3784 in a POINTER_PLUS_EXPR.
3786 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3787 Alan Hayward <alan.hayward@arm.com>
3788 David Sherwood <david.sherwood@arm.com>
3790 * omp-simd-clone.c (simd_clone_subparts): New function.
3791 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3792 (ipa_simd_modify_function_body): Likewise.
3794 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3795 Alan Hayward <alan.hayward@arm.com>
3796 David Sherwood <david.sherwood@arm.com>
3798 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3799 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3800 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3801 (expand_vector_condition, vector_element): Likewise.
3802 (subparts_gt): New function.
3803 (get_compute_type): Use subparts_gt.
3804 (count_type_subparts): Delete.
3805 (expand_vector_operations_1): Use subparts_gt instead of
3806 count_type_subparts.
3808 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3809 Alan Hayward <alan.hayward@arm.com>
3810 David Sherwood <david.sherwood@arm.com>
3812 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3813 (vect_compile_time_alias): ...this new function. Do the calculation
3814 on poly_ints rather than trees.
3815 (vect_prune_runtime_alias_test_list): Update call accordingly.
3817 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3818 Alan Hayward <alan.hayward@arm.com>
3819 David Sherwood <david.sherwood@arm.com>
3821 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3822 numbers of units.
3823 (vect_schedule_slp_instance): Likewise.
3825 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3826 Alan Hayward <alan.hayward@arm.com>
3827 David Sherwood <david.sherwood@arm.com>
3829 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3830 constant and extern definitions for variable-length vectors.
3831 (vect_get_constant_vectors): Note that the number of units
3832 is known to be constant.
3834 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3835 Alan Hayward <alan.hayward@arm.com>
3836 David Sherwood <david.sherwood@arm.com>
3838 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3839 of units as polynomial. Choose between WIDE and NARROW based
3840 on multiple_p.
3842 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3843 Alan Hayward <alan.hayward@arm.com>
3844 David Sherwood <david.sherwood@arm.com>
3846 * tree-vect-stmts.c (simd_clone_subparts): New function.
3847 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3849 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3850 Alan Hayward <alan.hayward@arm.com>
3851 David Sherwood <david.sherwood@arm.com>
3853 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3854 vectors as polynomial. Use build_index_vector for
3855 IFN_GOMP_SIMD_LANE.
3857 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3858 Alan Hayward <alan.hayward@arm.com>
3859 David Sherwood <david.sherwood@arm.com>
3861 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3862 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3863 for variable-length vectors.
3864 (vectorizable_mask_load_store): Treat the number of units as
3865 polynomial, asserting that it is constant if the condition has
3866 already been enforced.
3867 (vectorizable_store, vectorizable_load): Likewise.
3869 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3870 Alan Hayward <alan.hayward@arm.com>
3871 David Sherwood <david.sherwood@arm.com>
3873 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3874 of units as polynomial. Punt if we can't tell at compile time
3875 which vector contains the final result.
3877 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3878 Alan Hayward <alan.hayward@arm.com>
3879 David Sherwood <david.sherwood@arm.com>
3881 * tree-vect-loop.c (vectorizable_induction): Treat the number
3882 of units as polynomial. Punt on SLP inductions. Use an integer
3883 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3884 cast of such a series for variable-length floating-point
3885 reductions.
3887 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3888 Alan Hayward <alan.hayward@arm.com>
3889 David Sherwood <david.sherwood@arm.com>
3891 * tree.h (build_index_vector): Declare.
3892 * tree.c (build_index_vector): New function.
3893 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
3894 of units as polynomial, forcibly converting it to a constant if
3895 vectorizable_reduction has already enforced the condition.
3896 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
3897 to create a {1,2,3,...} vector.
3898 (vectorizable_reduction): Treat the number of units as polynomial.
3899 Choose vectype_in based on the largest scalar element size rather
3900 than the smallest number of units. Enforce the restrictions
3901 relied on above.
3903 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3904 Alan Hayward <alan.hayward@arm.com>
3905 David Sherwood <david.sherwood@arm.com>
3907 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
3908 number of units as polynomial.
3910 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3911 Alan Hayward <alan.hayward@arm.com>
3912 David Sherwood <david.sherwood@arm.com>
3914 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
3915 * target.def (autovectorize_vector_sizes): Return the vector sizes
3916 by pointer, using vector_sizes rather than a bitmask.
3917 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
3918 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
3919 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
3920 Likewise.
3921 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
3922 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
3923 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
3924 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
3925 * omp-general.c (omp_max_vf): Likewise.
3926 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3927 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
3928 * tree-vect-loop.c (vect_analyze_loop): Likewise.
3929 * tree-vect-slp.c (vect_slp_bb): Likewise.
3930 * doc/tm.texi: Regenerate.
3931 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
3932 to a poly_uint64.
3933 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
3934 the vector size as a poly_uint64 rather than an unsigned int.
3935 (current_vector_size): Change from an unsigned int to a poly_uint64.
3936 (get_vectype_for_scalar_type): Update accordingly.
3937 * tree.h (build_truth_vector_type): Take the size and number of
3938 units as a poly_uint64 rather than an unsigned int.
3939 (build_vector_type): Add a temporary overload that takes
3940 the number of units as a poly_uint64 rather than an unsigned int.
3941 * tree.c (make_vector_type): Likewise.
3942 (build_truth_vector_type): Take the number of units as a poly_uint64
3943 rather than an unsigned int.
3945 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3946 Alan Hayward <alan.hayward@arm.com>
3947 David Sherwood <david.sherwood@arm.com>
3949 * target.def (get_mask_mode): Take the number of units and length
3950 as poly_uint64s rather than unsigned ints.
3951 * targhooks.h (default_get_mask_mode): Update accordingly.
3952 * targhooks.c (default_get_mask_mode): Likewise.
3953 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
3954 * doc/tm.texi: Regenerate.
3956 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3957 Alan Hayward <alan.hayward@arm.com>
3958 David Sherwood <david.sherwood@arm.com>
3960 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
3961 * omp-general.c (omp_max_vf): Likewise.
3962 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
3963 (expand_omp_simd): Handle polynomial safelen.
3964 * omp-low.c (omplow_simd_context): Add a default constructor.
3965 (omplow_simd_context::max_vf): Change from int to poly_uint64.
3966 (lower_rec_simd_input_clauses): Update accordingly.
3967 (lower_rec_input_clauses): Likewise.
3969 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3970 Alan Hayward <alan.hayward@arm.com>
3971 David Sherwood <david.sherwood@arm.com>
3973 * tree-vectorizer.h (vect_nunits_for_cost): New function.
3974 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
3975 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
3976 (vect_analyze_slp_cost): Likewise.
3977 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
3978 (vect_model_load_cost): Likewise.
3980 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3981 Alan Hayward <alan.hayward@arm.com>
3982 David Sherwood <david.sherwood@arm.com>
3984 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
3985 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
3986 from an unsigned int * to a poly_uint64_pod *.
3987 (calculate_unrolling_factor): New function.
3988 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
3990 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3991 Alan Hayward <alan.hayward@arm.com>
3992 David Sherwood <david.sherwood@arm.com>
3994 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
3995 from an unsigned int to a poly_uint64.
3996 (_loop_vec_info::slp_unrolling_factor): Likewise.
3997 (_loop_vec_info::vectorization_factor): Change from an int
3998 to a poly_uint64.
3999 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4000 (vect_get_num_vectors): New function.
4001 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4002 (vect_get_num_copies): Use vect_get_num_vectors.
4003 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4004 to an unsigned int *.
4005 (vect_analyze_data_refs): Change min_vf from an int * to a
4006 poly_uint64 *.
4007 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4008 than an unsigned HOST_WIDE_INT.
4009 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4010 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4011 to an unsigned int *.
4012 (vect_analyze_data_ref_dependences): Likewise.
4013 (vect_compute_data_ref_alignment): Handle polynomial vf.
4014 (vect_enhance_data_refs_alignment): Likewise.
4015 (vect_prune_runtime_alias_test_list): Likewise.
4016 (vect_shift_permute_load_chain): Likewise.
4017 (vect_supportable_dr_alignment): Likewise.
4018 (dependence_distance_ge_vf): Take the vectorization factor as a
4019 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4020 (vect_analyze_data_refs): Change min_vf from an int * to a
4021 poly_uint64 *.
4022 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4023 vfm1 as a poly_uint64 rather than an int. Make the same change
4024 for the returned bound_scalar.
4025 (vect_gen_vector_loop_niters): Handle polynomial vf.
4026 (vect_do_peeling): Likewise. Update call to
4027 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4028 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4029 be constant.
4030 * tree-vect-loop.c (vect_determine_vectorization_factor)
4031 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4032 (vect_get_known_peeling_cost): Likewise.
4033 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4034 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4035 (vect_transform_loop): Likewise. Use the lowest possible VF when
4036 updating the upper bounds of the loop.
4037 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4038 rather than an int.
4039 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4040 polynomial unroll factors.
4041 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4042 (vect_make_slp_decision): Likewise.
4043 (vect_supported_load_permutation_p): Likewise, and polynomial
4044 vf too.
4045 (vect_analyze_slp_cost): Handle polynomial vf.
4046 (vect_slp_analyze_node_operations): Likewise.
4047 (vect_slp_analyze_bb_1): Likewise.
4048 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4049 than an unsigned HOST_WIDE_INT.
4050 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4051 (vectorizable_load): Handle polynomial vf.
4052 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4053 a poly_uint64.
4054 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4056 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4057 Alan Hayward <alan.hayward@arm.com>
4058 David Sherwood <david.sherwood@arm.com>
4060 * match.pd: Handle bit operations involving three constants
4061 and try to fold one pair.
4063 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4065 * tree-vect-loop-manip.c: Include gimple-fold.h.
4066 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4067 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4068 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4069 Add a path that uses a step of VF instead of 1, but disable it
4070 for now.
4071 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4072 and niters_no_overflow parameters. Update calls to
4073 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4074 Create a new SSA name if the latter choses to use a ste other
4075 than zero, and return it via niters_vector_mult_vf_var.
4076 * tree-vect-loop.c (vect_transform_loop): Update calls to
4077 vect_do_peeling, vect_gen_vector_loop_niters and
4078 slpeel_make_loop_iterate_ntimes.
4079 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4080 (vect_gen_vector_loop_niters): Update declarations after above changes.
4082 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4084 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4085 128-bit round to integer instructions.
4086 (ceil<mode>2): Likewise.
4087 (btrunc<mode>2): Likewise.
4088 (round<mode>2): Likewise.
4090 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4092 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4093 unaligned VSX load/store on P8/P9.
4094 (expand_block_clear): Allow the use of unaligned VSX
4095 load/store on P8/P9.
4097 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4099 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4100 New function.
4101 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4102 swap associated with both a load and a store.
4104 2018-01-02 Andrew Waterman <andrew@sifive.com>
4106 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4107 * config/riscv/riscv.md (clear_cache): Use it.
4109 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4111 * web.c: Remove out-of-date comment.
4113 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4115 * expr.c (fixup_args_size_notes): Check that any existing
4116 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4117 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4118 (emit_single_push_insn): ...here.
4120 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4122 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4123 (const_vector_encoded_nelts): New function.
4124 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4125 (const_vector_int_elt, const_vector_elt): Declare.
4126 * emit-rtl.c (const_vector_int_elt_1): New function.
4127 (const_vector_elt): Likewise.
4128 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4129 of CONST_VECTOR_ELT.
4131 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4133 * expr.c: Include rtx-vector-builder.h.
4134 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4135 directly on the tree encoding.
4136 (const_vector_from_tree): Likewise.
4137 * optabs.c: Include rtx-vector-builder.h.
4138 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4139 sequence of "u" values.
4140 * vec-perm-indices.c: Include rtx-vector-builder.h.
4141 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4142 directly on the vec_perm_indices encoding.
4144 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4146 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4147 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4148 * rtx-vector-builder.h: New file.
4149 * rtx-vector-builder.c: Likewise.
4150 * rtl.h (rtx_def::u2): Add a const_vector field.
4151 (CONST_VECTOR_NPATTERNS): New macro.
4152 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4153 (CONST_VECTOR_DUPLICATE_P): Likewise.
4154 (CONST_VECTOR_STEPPED_P): Likewise.
4155 (CONST_VECTOR_ENCODED_ELT): Likewise.
4156 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4157 (unwrap_const_vec_duplicate): Likewise.
4158 (const_vec_series_p): Check for a non-duplicated vector encoding.
4159 Say that the function only returns true for integer vectors.
4160 * emit-rtl.c: Include rtx-vector-builder.h.
4161 (gen_const_vec_duplicate_1): Delete.
4162 (gen_const_vector): Call gen_const_vec_duplicate instead of
4163 gen_const_vec_duplicate_1.
4164 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4165 (gen_const_vec_duplicate): Use rtx_vector_builder.
4166 (gen_const_vec_series): Likewise.
4167 (gen_rtx_CONST_VECTOR): Likewise.
4168 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4169 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4170 Build a new vector rather than modifying a CONST_VECTOR in-place.
4171 (handle_special_swappables): Update call accordingly.
4172 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4173 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4174 Build a new vector rather than modifying a CONST_VECTOR in-place.
4175 (handle_special_swappables): Update call accordingly.
4177 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4179 * simplify-rtx.c (simplify_const_binary_operation): Use
4180 CONST_VECTOR_ELT instead of XVECEXP.
4182 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4184 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4185 the selector elements to be different from the data elements
4186 if the selector is a VECTOR_CST.
4187 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4188 ssizetype for the selector.
4190 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4192 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4193 before testing each element individually.
4194 * tree-vect-generic.c (lower_vec_perm): Likewise.
4196 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4198 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4199 * selftest-run-tests.c (selftest::run_tests): Call it.
4200 * vector-builder.h (vector_builder::operator ==): New function.
4201 (vector_builder::operator !=): Likewise.
4202 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4203 (vec_perm_indices::all_from_input_p): New function.
4204 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4205 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4206 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4207 instead of reading the VECTOR_CST directly. Detect whether both
4208 vector inputs are the same before constructing the vec_perm_indices,
4209 and update the number of inputs argument accordingly. Use the
4210 utility functions added above. Only construct sel2 if we need to.
4212 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4214 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4215 the broadcast of the low byte.
4216 (expand_mult_highpart): Use an explicit encoding for the permutes.
4217 * optabs-query.c (can_mult_highpart_p): Likewise.
4218 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4219 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4220 (vectorizable_bswap): Likewise.
4221 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4222 explicit encoding for the power-of-2 permutes.
4223 (vect_permute_store_chain): Likewise.
4224 (vect_grouped_load_supported): Likewise.
4225 (vect_permute_load_chain): Likewise.
4227 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4229 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4230 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4231 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4232 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4233 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4234 (vect_gen_perm_mask_any): Likewise.
4236 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4238 * int-vector-builder.h: New file.
4239 * vec-perm-indices.h: Include int-vector-builder.h.
4240 (vec_perm_indices): Redefine as an int_vector_builder.
4241 (auto_vec_perm_indices): Delete.
4242 (vec_perm_builder): Redefine as a stand-alone class.
4243 (vec_perm_indices::vec_perm_indices): New function.
4244 (vec_perm_indices::clamp): Likewise.
4245 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4246 (vec_perm_indices::new_vector): New function.
4247 (vec_perm_indices::new_expanded_vector): Update for new
4248 vec_perm_indices class.
4249 (vec_perm_indices::rotate_inputs): New function.
4250 (vec_perm_indices::all_in_range_p): Operate directly on the
4251 encoded form, without computing elided elements.
4252 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4253 encoding. Update for new vec_perm_indices class.
4254 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4255 the given vec_perm_builder.
4256 (expand_vec_perm_var): Update vec_perm_builder constructor.
4257 (expand_mult_highpart): Use vec_perm_builder instead of
4258 auto_vec_perm_indices.
4259 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4260 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4261 or double series encoding as appropriate.
4262 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4263 vec_perm_indices instead of auto_vec_perm_indices.
4264 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4265 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4266 (vect_permute_store_chain): Likewise.
4267 (vect_grouped_load_supported): Likewise.
4268 (vect_permute_load_chain): Likewise.
4269 (vect_shift_permute_load_chain): Likewise.
4270 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4271 (vect_transform_slp_perm_load): Likewise.
4272 (vect_schedule_slp_instance): Likewise.
4273 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4274 (vectorizable_mask_load_store): Likewise.
4275 (vectorizable_bswap): Likewise.
4276 (vectorizable_store): Likewise.
4277 (vectorizable_load): Likewise.
4278 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4279 vec_perm_indices instead of auto_vec_perm_indices. Use
4280 tree_to_vec_perm_builder to read the vector from a tree.
4281 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4282 vec_perm_builder instead of a vec_perm_indices.
4283 (have_whole_vector_shift): Use vec_perm_builder and
4284 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4285 truncation to calc_vec_perm_mask_for_shift.
4286 (vect_create_epilog_for_reduction): Likewise.
4287 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4288 from auto_vec_perm_indices to vec_perm_indices.
4289 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4290 instead of changing individual elements.
4291 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4292 the vector in d.perm.
4293 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4294 from auto_vec_perm_indices to vec_perm_indices.
4295 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4296 instead of changing individual elements.
4297 (arm_vectorize_vec_perm_const): Use new_vector to install
4298 the vector in d.perm.
4299 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4300 Update vec_perm_builder constructor.
4301 (rs6000_expand_interleave): Likewise.
4302 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4303 (rs6000_expand_interleave): Likewise.
4305 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4307 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4308 to qimode could truncate the indices.
4309 * optabs.c (expand_vec_perm_var): Likewise.
4311 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4313 * Makefile.in (OBJS): Add vec-perm-indices.o.
4314 * vec-perm-indices.h: New file.
4315 * vec-perm-indices.c: Likewise.
4316 * target.h (vec_perm_indices): Replace with a forward class
4317 declaration.
4318 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4319 * optabs.h: Include vec-perm-indices.h.
4320 (expand_vec_perm): Delete.
4321 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4322 (expand_vec_perm_const): Declare.
4323 * target.def (vec_perm_const_ok): Replace with...
4324 (vec_perm_const): ...this new hook.
4325 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4326 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4327 * doc/tm.texi: Regenerate.
4328 * optabs.def (vec_perm_const): Delete.
4329 * doc/md.texi (vec_perm_const): Likewise.
4330 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4331 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4332 expand_vec_perm for constant permutation vectors. Assert that
4333 the mode of variable permutation vectors is the integer equivalent
4334 of the mode that is being permuted.
4335 * optabs-query.h (selector_fits_mode_p): Declare.
4336 * optabs-query.c: Include vec-perm-indices.h.
4337 (selector_fits_mode_p): New function.
4338 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4339 is defined, instead of checking whether the vec_perm_const_optab
4340 exists. Use targetm.vectorize.vec_perm_const instead of
4341 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4342 fit in the vector mode before using a variable permute.
4343 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4344 vec_perm_indices instead of an rtx.
4345 (expand_vec_perm): Replace with...
4346 (expand_vec_perm_const): ...this new function. Take the selector
4347 as a vec_perm_indices rather than an rtx. Also take the mode of
4348 the selector. Update call to shift_amt_for_vec_perm_mask.
4349 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4350 Use vec_perm_indices::new_expanded_vector to expand the original
4351 selector into bytes. Check whether the indices fit in the vector
4352 mode before using a variable permute.
4353 (expand_vec_perm_var): Make global.
4354 (expand_mult_highpart): Use expand_vec_perm_const.
4355 * fold-const.c: Includes vec-perm-indices.h.
4356 * tree-ssa-forwprop.c: Likewise.
4357 * tree-vect-data-refs.c: Likewise.
4358 * tree-vect-generic.c: Likewise.
4359 * tree-vect-loop.c: Likewise.
4360 * tree-vect-slp.c: Likewise.
4361 * tree-vect-stmts.c: Likewise.
4362 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4363 Delete.
4364 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4365 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4366 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4367 (aarch64_vectorize_vec_perm_const): ...this new function.
4368 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4369 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4370 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4371 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4372 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4373 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4374 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4375 into...
4376 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4377 check for NEON modes.
4378 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4379 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4380 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4381 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4382 into...
4383 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4384 the old VEC_PERM_CONST conditions.
4385 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4386 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4387 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4388 (ia64_vectorize_vec_perm_const_ok): Merge into...
4389 (ia64_vectorize_vec_perm_const): ...this new function.
4390 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4391 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4392 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4393 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4394 * config/mips/mips.c (mips_expand_vec_perm_const)
4395 (mips_vectorize_vec_perm_const_ok): Merge into...
4396 (mips_vectorize_vec_perm_const): ...this new function.
4397 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4398 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4399 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4400 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4401 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4402 (rs6000_expand_vec_perm_const): Delete.
4403 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4404 Delete.
4405 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4406 (altivec_expand_vec_perm_const_le): Take each operand individually.
4407 Operate on constant selectors rather than rtxes.
4408 (altivec_expand_vec_perm_const): Likewise. Update call to
4409 altivec_expand_vec_perm_const_le.
4410 (rs6000_expand_vec_perm_const): Delete.
4411 (rs6000_vectorize_vec_perm_const_ok): Delete.
4412 (rs6000_vectorize_vec_perm_const): New function.
4413 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4414 an element count and rtx array.
4415 (rs6000_expand_extract_even): Update call accordingly.
4416 (rs6000_expand_interleave): Likewise.
4417 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4418 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4419 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4420 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4421 (rs6000_expand_vec_perm_const): Delete.
4422 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4423 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4424 (altivec_expand_vec_perm_const_le): Take each operand individually.
4425 Operate on constant selectors rather than rtxes.
4426 (altivec_expand_vec_perm_const): Likewise. Update call to
4427 altivec_expand_vec_perm_const_le.
4428 (rs6000_expand_vec_perm_const): Delete.
4429 (rs6000_vectorize_vec_perm_const_ok): Delete.
4430 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4431 reference to the SPE evmerge intructions.
4432 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4433 an element count and rtx array.
4434 (rs6000_expand_extract_even): Update call accordingly.
4435 (rs6000_expand_interleave): Likewise.
4436 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4437 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4438 new function.
4439 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4441 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4443 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4444 vector mode and that that mode matches the mode of the data
4445 being permuted.
4446 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4447 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4448 directly using expand_vec_perm_1 when forcing selectors into
4449 registers.
4450 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4452 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4454 * optabs-query.h (can_vec_perm_p): Delete.
4455 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4456 * optabs-query.c (can_vec_perm_p): Split into...
4457 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4458 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4459 particular selector is valid.
4460 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4461 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4462 (vect_grouped_load_supported): Likewise.
4463 (vect_shift_permute_load_chain): Likewise.
4464 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4465 (vect_transform_slp_perm_load): Likewise.
4466 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4467 (vectorizable_bswap): Likewise.
4468 (vect_gen_perm_mask_checked): Likewise.
4469 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4470 implementations of variable permutation vectors into account
4471 when deciding which selector to use.
4472 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4473 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4474 with a false third argument.
4475 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4476 to test whether the constant selector is valid and can_vec_perm_var_p
4477 to test whether a variable selector is valid.
4479 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4481 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4482 * optabs-query.c (can_vec_perm_p): Likewise.
4483 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4484 instead of vec_perm_indices.
4485 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4486 (vect_gen_perm_mask_checked): Likewise,
4487 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4488 (vect_gen_perm_mask_checked): Likewise,
4490 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4492 * optabs-query.h (qimode_for_vec_perm): Declare.
4493 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4494 (qimode_for_vec_perm): ...this new function.
4495 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4497 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4499 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4500 does not have a conditional at the top.
4502 2018-01-02 Richard Biener <rguenther@suse.de>
4504 * ipa-inline.c (big_speedup_p): Fix expression.
4506 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4508 PR target/81616
4509 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4510 for generic 4->6.
4512 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4514 PR target/81616
4515 Generic tuning.
4516 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4517 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4518 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4519 cond_taken_branch_cost 3->4.
4521 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4523 PR tree-optimization/83581
4524 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4525 TODO_cleanup_cfg if any changes have been made.
4527 PR middle-end/83608
4528 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4529 convert_modes if target mode has the right side, but different mode
4530 class.
4532 PR middle-end/83609
4533 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4534 last argument when extracting from CONCAT. If either from_real or
4535 from_imag is NULL, use expansion through memory. If result is not
4536 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4537 the parts directly to inner mode, if even that fails, use expansion
4538 through memory.
4540 PR middle-end/83623
4541 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4542 check for bswap in mode rather than HImode and use that in expand_unop
4543 too.
4544 \f
4545 Copyright (C) 2018 Free Software Foundation, Inc.
4547 Copying and distribution of this file, with or without modification,
4548 are permitted in any medium without royalty provided the copyright
4549 notice and this notice are preserved.