1 /* Subroutines used for code generation on AMD Am29000.
2 Copyright (C) 1987, 88, 90-94, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
32 #include "insn-attr.h"
40 #define min(A,B) ((A) < (B) ? (A) : (B))
42 /* This gives the size in words of the register stack for the current
45 static int a29k_regstack_size
;
47 /* True if the current procedure has a call instruction. */
49 static int a29k_makes_calls
;
51 /* This points to the last insn of the insn prologue. It is set when
52 an insn without a filled delay slot is found near the start of the
55 static char *a29k_last_prologue_insn
;
57 /* This points to the first insn that will be in the epilogue. It is null if
58 no epilogue is required. */
60 static char *a29k_first_epilogue_insn
;
62 /* This is nonzero if a a29k_first_epilogue_insn was put in a delay slot. It
63 indicates that an intermediate label needs to be written. */
65 static int a29k_first_epilogue_insn_used
;
67 /* Location to hold the name of the current function. We need this prolog to
68 contain the tag words prior to the declaration. So the name must be stored
71 char *a29k_function_name
;
73 /* Mapping of registers to debug register numbers. The only change is
74 for the frame pointer and the register numbers used for the incoming
77 int a29k_debug_reg_map
[FIRST_PSEUDO_REGISTER
];
79 /* Save information from a "cmpxx" operation until the branch or scc is
82 rtx a29k_compare_op0
, a29k_compare_op1
;
83 int a29k_compare_fp_p
;
85 /* Gives names for registers. */
86 extern char *reg_names
[];
88 /* Returns 1 if OP is a 8-bit constant. */
91 cint_8_operand (op
, mode
)
93 enum machine_mode mode
;
95 return GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffffff00) == 0;
98 /* Returns 1 if OP is a 16-bit constant. */
101 cint_16_operand (op
, mode
)
103 enum machine_mode mode
;
105 return GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0;
108 /* Returns 1 if OP is a constant that cannot be moved in a single insn. */
111 long_const_operand (op
, mode
)
113 enum machine_mode mode
;
115 if (! CONSTANT_P (op
))
118 if (TARGET_29050
&& GET_CODE (op
) == CONST_INT
119 && (INTVAL (op
) & 0xffff) == 0)
122 return (GET_CODE (op
) != CONST_INT
123 || ((INTVAL (op
) & 0xffff0000) != 0
124 && (INTVAL (op
) & 0xffff0000) != 0xffff0000
125 && INTVAL (op
) != 0x80000000));
128 /* The following four functions detect constants of 0, 8, 16, and 24 used as
129 a position in ZERO_EXTRACT operations. They can either be the appropriate
130 constant integer or a shift (which will be produced by combine). */
133 shift_constant_operand (op
, mode
, val
)
135 enum machine_mode mode
;
138 return ((GET_CODE (op
) == CONST_INT
&& INTVAL (op
) == val
)
139 || (GET_CODE (op
) == ASHIFT
140 && GET_CODE (XEXP (op
, 0)) == CONST_INT
141 && INTVAL (XEXP (op
, 0)) == val
/ 8
142 && GET_CODE (XEXP (op
, 1)) == CONST_INT
143 && INTVAL (XEXP (op
, 1)) == 3));
147 const_0_operand (op
, mode
)
149 enum machine_mode mode
;
151 return shift_constant_operand (op
, mode
, 0);
155 const_8_operand (op
, mode
)
157 enum machine_mode mode
;
159 return shift_constant_operand (op
, mode
, 8);
163 const_16_operand (op
, mode
)
165 enum machine_mode mode
;
167 return shift_constant_operand (op
, mode
, 16);
171 const_24_operand (op
, mode
)
173 enum machine_mode mode
;
175 return shift_constant_operand (op
, mode
, 24);
178 /* Returns 1 if OP is a floating-point constant of the proper mode. */
181 float_const_operand (op
, mode
)
183 enum machine_mode mode
;
185 return GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE (op
) == mode
;
188 /* Returns 1 if OP is a floating-point constant of the proper mode or a
189 general-purpose register. */
192 gpc_reg_or_float_constant_operand (op
, mode
)
194 enum machine_mode mode
;
196 return float_const_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
199 /* Returns 1 if OP is an integer constant of the proper mode or a
200 general-purpose register. */
203 gpc_reg_or_integer_constant_operand (op
, mode
)
205 enum machine_mode mode
;
207 return ((GET_MODE (op
) == VOIDmode
208 && (GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
))
209 || gpc_reg_operand (op
, mode
));
212 /* Returns 1 if OP is a special machine register. */
215 spec_reg_operand (op
, mode
)
217 enum machine_mode mode
;
219 if (GET_CODE (op
) != REG
|| GET_MODE (op
) != mode
)
222 switch (GET_MODE_CLASS (mode
))
224 case MODE_PARTIAL_INT
:
225 return REGNO (op
) >= R_BP
&& REGNO (op
) <= R_CR
;
227 return REGNO (op
) >= R_Q
&& REGNO (op
) <= R_EXO
;
233 /* Returns 1 if OP is an accumulator register. */
236 accum_reg_operand (op
, mode
)
238 enum machine_mode mode
;
240 return (GET_CODE (op
) == REG
241 && REGNO (op
) >= R_ACU (0) && REGNO (op
) <= R_ACU (3));
244 /* Returns 1 if OP is a normal data register. */
247 gpc_reg_operand (op
, mode
)
249 enum machine_mode mode
;
253 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
256 if (GET_CODE (op
) == REG
)
258 else if (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == REG
)
260 regno
= REGNO (SUBREG_REG (op
));
261 if (regno
< FIRST_PSEUDO_REGISTER
)
262 regno
+= SUBREG_WORD (op
);
267 return (regno
>= FIRST_PSEUDO_REGISTER
|| regno
< R_BP
268 || (regno
>= R_KR (0) && regno
<= R_KR (31)));
271 /* Returns 1 if OP is either an 8-bit constant integer or a general register.
272 If a register, it must be in the proper mode unless MODE is VOIDmode. */
275 srcb_operand (op
, mode
)
277 enum machine_mode mode
;
279 if (GET_CODE (op
) == CONST_INT
281 || (INTVAL (op
) & 0xffffff00) == 0))
284 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
287 return gpc_reg_operand (op
, mode
);
291 cmplsrcb_operand (op
, mode
)
293 enum machine_mode mode
;
295 if (GET_CODE (op
) == CONST_INT
297 || (INTVAL (op
) & 0xffffff00) == 0xffffff00))
300 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
303 return gpc_reg_operand (op
, mode
);
306 /* Return 1 if OP is either an immediate or a general register. This is used
307 for the input operand of mtsr/mtrsim. */
310 gpc_reg_or_immediate_operand (op
, mode
)
312 enum machine_mode mode
;
314 return gpc_reg_operand (op
, mode
) || immediate_operand (op
, mode
);
317 /* Return 1 if OP can be used as the second operand of and AND insn. This
318 includes srcb_operand and a constant whose complement fits in 8 bits. */
321 and_operand (op
, mode
)
323 enum machine_mode mode
;
325 return (srcb_operand (op
, mode
)
326 || (GET_CODE (op
) == CONST_INT
327 && ((unsigned) ((~ INTVAL (op
)) & GET_MODE_MASK (mode
)) < 256)));
330 /* Return 1 if OP can be used as the second operand of an ADD insn.
331 This is the same as above, except we use negative, rather than
335 add_operand (op
, mode
)
337 enum machine_mode mode
;
339 return (srcb_operand (op
, mode
)
340 || (GET_CODE (op
) == CONST_INT
341 && ((unsigned) ((- INTVAL (op
)) & GET_MODE_MASK (mode
)) < 256)));
344 /* Return 1 if OP is a valid address in a CALL_INSN. These are a SYMBOL_REF
345 to the current function, all SYMBOL_REFs if TARGET_SMALL_MEMORY, or
346 a sufficiently-small constant. */
349 call_operand (op
, mode
)
351 enum machine_mode mode
;
353 switch (GET_CODE (op
))
356 return (TARGET_SMALL_MEMORY
357 || (! TARGET_LARGE_MEMORY
358 && ((GET_CODE (op
) == SYMBOL_REF
&& SYMBOL_REF_FLAG (op
))
359 || ! strcmp (XSTR (op
, 0), current_function_name
))));
362 return (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x40000;
369 /* Return 1 if OP can be used as the input operand for a move insn. */
372 in_operand (op
, mode
)
374 enum machine_mode mode
;
378 if (! general_operand (op
, mode
))
381 while (GET_CODE (op
) == SUBREG
)
382 op
= SUBREG_REG (op
);
384 switch (GET_CODE (op
))
390 return (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
|| TARGET_DW_ENABLE
);
393 if (GET_MODE_CLASS (mode
) != MODE_INT
394 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
402 return (GET_MODE (op
) == mode
403 || mode
== SImode
|| mode
== HImode
|| mode
== QImode
);
406 return ((GET_MODE_CLASS (mode
) == MODE_FLOAT
407 && mode
== GET_MODE (op
))
408 || (GET_MODE (op
) == VOIDmode
409 && GET_MODE_CLASS (mode
) == MODE_INT
));
416 /* Return 1 if OP can be used as the output operand for a move insn. */
419 out_operand (op
, mode
)
421 enum machine_mode mode
;
425 if (! general_operand (op
, mode
))
428 while (GET_CODE (op
) == SUBREG
)
429 op
= SUBREG_REG (op
);
431 if (GET_CODE (op
) == REG
)
432 return (gpc_reg_operand (orig_op
, mode
)
433 || spec_reg_operand (orig_op
, mode
)
434 || (GET_MODE_CLASS (mode
) == MODE_FLOAT
435 && accum_reg_operand (orig_op
, mode
)));
437 else if (GET_CODE (op
) == MEM
)
438 return (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
|| TARGET_DW_ENABLE
);
443 /* Return 1 if OP is an item in memory, given that we are in reload. */
446 reload_memory_operand (op
, mode
)
448 enum machine_mode mode
;
450 int regno
= true_regnum (op
);
452 return (! CONSTANT_P (op
)
454 || (GET_CODE (op
) == REG
455 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)));
458 /* Given an object for which reload_memory_operand is true, return the address
459 of the operand, taking into account anything that reload may do. */
462 a29k_get_reloaded_address (op
)
465 if (GET_CODE (op
) == SUBREG
)
467 if (SUBREG_WORD (op
) != 0)
470 op
= SUBREG_REG (op
);
473 if (GET_CODE (op
) == REG
)
474 op
= reg_equiv_mem
[REGNO (op
)];
476 return find_replacement (&XEXP (op
, 0));
479 /* Subfunction of the following function. Update the flags of any MEM
480 found in part of X. */
483 a29k_set_memflags_1 (x
, in_struct_p
, volatile_p
, unchanging_p
)
485 int in_struct_p
, volatile_p
, unchanging_p
;
489 switch (GET_CODE (x
))
493 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
494 a29k_set_memflags_1 (XVECEXP (x
, 0, i
), in_struct_p
, volatile_p
,
499 a29k_set_memflags_1 (PATTERN (x
), in_struct_p
, volatile_p
,
504 a29k_set_memflags_1 (SET_DEST (x
), in_struct_p
, volatile_p
,
506 a29k_set_memflags_1 (SET_SRC (x
), in_struct_p
, volatile_p
, unchanging_p
);
510 MEM_IN_STRUCT_P (x
) = in_struct_p
;
511 MEM_VOLATILE_P (x
) = volatile_p
;
512 RTX_UNCHANGING_P (x
) = unchanging_p
;
517 /* Given INSN, which is either an INSN or a SEQUENCE generated to
518 perform a memory operation, look for any MEMs in either a SET_DEST or
519 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
520 REF into each of the MEMs found. If REF is not a MEM, don't do
524 a29k_set_memflags (insn
, ref
)
528 /* Note that it is always safe to get these flags, though they won't
529 be what we think if REF is not a MEM. */
530 int in_struct_p
= MEM_IN_STRUCT_P (ref
);
531 int volatile_p
= MEM_VOLATILE_P (ref
);
532 int unchanging_p
= RTX_UNCHANGING_P (ref
);
534 if (GET_CODE (ref
) != MEM
535 || (! in_struct_p
&& ! volatile_p
&& ! unchanging_p
))
538 a29k_set_memflags_1 (insn
, in_struct_p
, volatile_p
, unchanging_p
);
541 /* Return 1 if OP is a comparison operator that we have in floating-point. */
544 fp_comparison_operator (op
, mode
)
546 enum machine_mode mode
;
548 return ((mode
== VOIDmode
|| mode
== GET_MODE (op
))
549 && (GET_CODE (op
) == EQ
|| GET_CODE (op
) == GT
||
550 GET_CODE (op
) == GE
));
553 /* Return 1 if OP is a valid branch comparison. */
556 branch_operator (op
, mode
)
558 enum machine_mode mode
;
560 return ((mode
== VOIDmode
|| mode
== GET_MODE (op
))
561 && (GET_CODE (op
) == GE
|| GET_CODE (op
) == LT
));
564 /* Return 1 if OP is a load multiple operation. It is known to be a
565 PARALLEL and the first three sections will be tested. */
568 load_multiple_operation (op
, mode
)
570 enum machine_mode mode
;
572 int count
= XVECLEN (op
, 0) - 2;
577 /* Perform a quick check so we don't blow up below. */
579 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
580 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
581 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
584 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
585 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
587 for (i
= 1; i
< count
; i
++)
589 rtx elt
= XVECEXP (op
, 0, i
+ 2);
591 if (GET_CODE (elt
) != SET
592 || GET_CODE (SET_DEST (elt
)) != REG
593 || GET_MODE (SET_DEST (elt
)) != SImode
594 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
595 || GET_CODE (SET_SRC (elt
)) != MEM
596 || GET_MODE (SET_SRC (elt
)) != SImode
597 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
598 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
599 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
600 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
607 /* Similar, but tests for store multiple. */
610 store_multiple_operation (op
, mode
)
612 enum machine_mode mode
;
614 int num_special
= TARGET_NO_STOREM_BUG
? 2 : 1;
615 int count
= XVECLEN (op
, 0) - num_special
;
620 /* Perform a quick check so we don't blow up below. */
622 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
623 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
624 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
627 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
628 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
630 for (i
= 1; i
< count
; i
++)
632 rtx elt
= XVECEXP (op
, 0, i
+ num_special
);
634 if (GET_CODE (elt
) != SET
635 || GET_CODE (SET_SRC (elt
)) != REG
636 || GET_MODE (SET_SRC (elt
)) != SImode
637 || REGNO (SET_SRC (elt
)) != src_regno
+ i
638 || GET_CODE (SET_DEST (elt
)) != MEM
639 || GET_MODE (SET_DEST (elt
)) != SImode
640 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
641 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
642 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
643 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
650 /* Given a special register REG and MASK, a value being masked against a
651 quantity to which the special register is set, return 1 if the masking
652 operation is built-in to the setting of that special register. */
655 masks_bits_for_special (reg
, mask
)
659 int needed_mask_value
;
661 if (GET_CODE (reg
) != REG
|| GET_CODE (mask
) != CONST_INT
)
668 needed_mask_value
= 3;
672 needed_mask_value
= 31;
677 needed_mask_value
= 255;
681 needed_mask_value
= 511;
685 needed_mask_value
= 0x3ff;
692 needed_mask_value
= 0xffff;
696 needed_mask_value
= 0xffff0000;
715 return (INTVAL (mask
) & ~ needed_mask_value
) == 0;
718 /* Return nonzero if this label is that of the return point, but there is
719 a non-null epilogue. */
722 epilogue_operand (op
, mode
)
724 enum machine_mode mode
;
726 return next_active_insn (op
) == 0 && a29k_first_epilogue_insn
!= 0;
729 /* Return the register class of a scratch register needed to copy IN into
730 or out of a register in CLASS in MODE. If it can be done directly,
731 NO_REGS is returned. */
734 secondary_reload_class (class, mode
, in
)
735 enum reg_class
class;
736 enum machine_mode mode
;
740 enum rtx_code code
= GET_CODE (in
);
742 if (! CONSTANT_P (in
))
744 regno
= true_regnum (in
);
746 /* A pseudo is the same as memory. */
747 if (regno
== -1 || regno
>= FIRST_PSEUDO_REGISTER
)
751 /* If we are transferring between memory and a multi-word mode, we need
754 if (code
== MEM
&& GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
757 /* If between memory and a mode smaller than a word without DW being
758 enabled, we need BP. */
760 if (code
== MEM
&& ! TARGET_DW_ENABLE
761 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
764 /* Otherwise, we can place anything into GENERAL_REGS and can put
765 GENERAL_REGS into anything. */
766 if (class == GENERAL_REGS
769 || (regno
>= R_KR (0) && regno
<= R_KR (31)))))
772 /* We can place 16-bit constants into a special register. */
773 if (code
== CONST_INT
774 && (GET_MODE_BITSIZE (mode
) <= 16 || (unsigned) INTVAL (in
) <= 65535)
775 && (class == BP_REGS
|| class == Q_REGS
|| class == SPECIAL_REGS
))
778 /* Otherwise, we need GENERAL_REGS. */
782 /* START is the zero-based incoming argument register index used (0 is 160,
783 i.e., the first incoming argument register) and COUNT is the number used.
785 Mark the corresponding incoming registers as neither fixed nor call used.
786 For each register used for incoming arguments, we have one less local
787 register that can be used. So also mark some high-numbered registers as
790 Return the first register number to use for the argument. */
793 incoming_reg (start
, count
)
799 /* We only use 16 argument registers, so truncate at the end of the
801 if (start
+ count
> 16)
804 if (! TARGET_NO_REUSE_ARGS
)
805 /* Mark all the used registers as not fixed and saved over calls. */
806 for (i
= R_AR (start
); i
< R_AR (start
+ count
); i
++)
808 fixed_regs
[i
] = call_used_regs
[i
] = call_fixed_regs
[i
] = 0;
809 CLEAR_HARD_REG_BIT (fixed_reg_set
, i
);
810 CLEAR_HARD_REG_BIT (call_used_reg_set
, i
);
811 CLEAR_HARD_REG_BIT (call_fixed_reg_set
, i
);
814 /* Shorten the maximum size of the frame.
815 Remember that R_AR(-1,-2) are place holders for the caller's lr0,lr1.
816 Make sure to keep the frame rounded to an even boundary. Rounding up
817 to an 8 byte boundary will use a slot. Otherwise a frame with 121 local
818 regs and 5 arguments will overrun the stack (121+1 + 5 + 2 > 128). */
819 /* ??? An alternative would be to never allocate one reg. */
820 for (i
= (R_AR (0) - 2 - start
- count
) & ~1; i
< R_AR (0) - 2 - start
; i
++)
822 fixed_regs
[i
] = call_used_regs
[i
] = call_fixed_regs
[i
] = 1;
823 SET_HARD_REG_BIT (fixed_reg_set
, i
);
824 SET_HARD_REG_BIT (call_used_reg_set
, i
);
825 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
831 /* Add CLOBBERs to CALL_INSN_FUNCTION_USAGE chain of INSN indicating
832 that LR2 up to, but not including, OP are clobbered. If OP is
833 zero, indicate all parameter registers are clobbered. */
836 a29k_clobbers_to (insn
, op
)
844 high_regno
= R_LR (18);
845 else if (GET_CODE (op
) != REG
|| REGNO (op
) < R_LR (0)
846 || REGNO (op
) > R_LR (18))
849 high_regno
= REGNO (op
);
851 for (i
= R_LR (2); i
< high_regno
; i
++)
852 CALL_INSN_FUNCTION_USAGE (insn
)
853 = gen_rtx (EXPR_LIST
, VOIDmode
,
854 gen_rtx (CLOBBER
, VOIDmode
, gen_rtx (REG
, SImode
, i
)),
855 CALL_INSN_FUNCTION_USAGE (insn
));
858 /* These routines are used in finding insns to fill delay slots in the
861 /* Return 1 if the current function will adjust the register stack. */
869 if (frame_pointer_needed
)
872 /* If any local register is used, we need to adjust the regstack. */
873 for (i
= R_LR (127); i
>= R_LR (0); i
--)
874 if (regs_ever_live
[i
])
877 /* We need a register stack if we make any calls. */
878 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
879 if (GET_CODE (insn
) == CALL_INSN
880 || (GET_CODE (insn
) == INSN
881 && GET_CODE (PATTERN (insn
)) == SEQUENCE
882 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
))
885 /* Otherwise, we don't. */
889 /* Return 1 if X uses a local register. */
898 switch (GET_CODE (x
))
901 return REGNO (x
) >= R_LR (0) && REGNO (x
) <= R_FP
;
912 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
913 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
917 if (uses_local_reg_p (XEXP (x
, i
)))
920 else if (fmt
[i
] == 'E')
922 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
923 if (uses_local_reg_p (XVECEXP (x
, i
, j
)))
931 /* Returns 1 if this function is known to have a null epilogue. */
936 return (reload_completed
&& ! needs_regstack_p ()
937 && get_frame_size () == 0
938 && current_function_pretend_args_size
== 0);
941 /* Write out the assembler form of an operand. Recognize the following
944 %N means write the low-order 8 bits of the negative of the constant
945 %Q means write a QImode operand (truncate constants to 8 bits)
946 %M means write the low-order 16 bits of the constant
947 %m means write the low-order 16 bits shifted left 16 bits
948 %C means write the low-order 8 bits of the complement of the constant
949 %b means write `f' is this is a reversed condition, `t' otherwise
950 %B means write `t' is this is a reversed condition, `f' otherwise
951 %J means write the 29k opcode part for a comparison operation
952 %e means write the label with an extra `X' is this is the epilogue
953 otherwise the normal label name
954 %E means write nothing if this insn has a delay slot,
955 a nop unless this is the epilogue label, in which case
956 write the first epilogue insn
957 %F means write just the normal operand if the insn has a delay slot;
958 otherwise, this is a recursive call so output the
959 symbol + 4 and write the first prologue insn in the
961 %L means write the register number plus one ("low order" register)
962 or the low-order part of a multi-word constant
963 %O means write the register number plus two
964 %P means write the register number plus three ("low order" of TImode)
965 %S means write the number of words in the mode of the operand,
967 %V means write the number of elements in a PARALLEL minus 1
968 %# means write nothing if we have a delay slot, "\n\tnop" otherwise
969 %* means write the register name for TPC. */
972 print_operand (file
, x
, code
)
979 /* These macros test for integers and extract the low-order bits. */
981 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
982 && GET_MODE (X) == VOIDmode)
984 #define INT_LOWPART(X) \
985 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
990 if (GET_CODE (x
) == REG
)
992 else if (! INT_P (x
))
993 output_operand_lossage ("invalid %%Q value");
994 fprintf (file
, "%d", INT_LOWPART (x
) & 0xff);
999 output_operand_lossage ("invalid %%C value");
1000 fprintf (file
, "%d", (~ INT_LOWPART (x
)) & 0xff);
1005 output_operand_lossage ("invalid %%N value");
1006 fprintf (file
, "%d", (- INT_LOWPART (x
)) & 0xff);
1011 output_operand_lossage ("invalid %%M value");
1012 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
1017 output_operand_lossage ("invalid %%m value");
1018 fprintf (file
, "%d", (INT_LOWPART (x
) & 0xffff) << 16);
1022 if (GET_CODE (x
) == GE
)
1023 fprintf (file
, "f");
1025 fprintf (file
, "t");
1029 if (GET_CODE (x
) == GE
)
1030 fprintf (file
, "t");
1032 fprintf (file
, "f");
1036 /* It so happens that the RTX names for the conditions are the same as
1037 the 29k's insns except for "ne", which requires "neq". */
1038 fprintf (file
, GET_RTX_NAME (GET_CODE (x
)));
1039 if (GET_CODE (x
) == NE
)
1040 fprintf (file
, "q");
1044 if (optimize
&& flag_delayed_branch
1045 && a29k_last_prologue_insn
== 0 && epilogue_operand (x
, VOIDmode
)
1046 && dbr_sequence_length () == 0)
1048 /* We need to output the label number of the last label in the
1049 function, which is not necessarily X since there might be
1050 a USE insn in between. First go forward to the last insn, then
1051 back up to a label. */
1052 while (NEXT_INSN (x
) != 0)
1055 while (GET_CODE (x
) != CODE_LABEL
)
1058 ASM_GENERATE_INTERNAL_LABEL (buf
, "LX", CODE_LABEL_NUMBER (x
));
1059 assemble_name (file
, buf
);
1062 output_asm_label (x
);
1066 if (dbr_sequence_length ())
1068 else if (a29k_last_prologue_insn
)
1070 fprintf (file
, "\n\t%s", a29k_last_prologue_insn
);
1071 a29k_last_prologue_insn
= 0;
1073 else if (optimize
&& flag_delayed_branch
1074 && epilogue_operand (x
, VOIDmode
))
1076 fprintf (file
, "\n\t%s", a29k_first_epilogue_insn
);
1077 a29k_first_epilogue_insn_used
= 1;
1080 fprintf (file
, "\n\tnop");
1084 output_addr_const (file
, x
);
1085 if (dbr_sequence_length () == 0)
1087 /* If this doesn't have its delay slot filled, see if we need to
1088 put the last insn of the prolog in it. If not, see if this is
1089 a recursive call. If so, we can put the first insn of its
1090 prolog in the delay slot. Otherwise, write a nop. */
1091 if (a29k_last_prologue_insn
)
1093 fprintf (file
, "\n\t%s", a29k_last_prologue_insn
);
1094 a29k_last_prologue_insn
= 0;
1096 else if (GET_CODE (x
) == SYMBOL_REF
1097 && ! strcmp (XSTR (x
, 0), current_function_name
))
1098 fprintf (file
, "+4\n\t%s,%d",
1099 a29k_regstack_size
>= 64 ? "const gr121" : "sub gr1,gr1",
1100 a29k_regstack_size
* 4);
1102 fprintf (file
, "\n\tnop");
1107 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
)
1109 union real_extract u
;
1111 bcopy ((char *) &CONST_DOUBLE_LOW (x
), (char *) &u
, sizeof u
);
1112 fprintf (file
, "$double1(%.20e)", u
.d
);
1114 else if (GET_CODE (x
) == REG
)
1115 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
1117 output_operand_lossage ("invalid %%L value");
1121 if (GET_CODE (x
) != REG
)
1122 output_operand_lossage ("invalid %%O value");
1123 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
1127 if (GET_CODE (x
) != REG
)
1128 output_operand_lossage ("invalid %%P value");
1129 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
1133 fprintf (file
, "%d", (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
)-1);
1137 if (GET_CODE (x
) != PARALLEL
)
1138 output_operand_lossage ("invalid %%V value");
1139 fprintf (file
, "%d", XVECLEN (x
, 0) - 2);
1143 if (dbr_sequence_length () == 0)
1145 if (a29k_last_prologue_insn
)
1147 fprintf (file
, "\n\t%s", a29k_last_prologue_insn
);
1148 a29k_last_prologue_insn
= 0;
1151 fprintf (file
, "\n\tnop");
1156 fprintf (file
, "%s", reg_names
[R_TPC
]);
1160 if (GET_CODE (x
) == REG
)
1161 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1163 else if (GET_CODE (x
) == MEM
)
1164 output_address (XEXP (x
, 0));
1166 else if (GET_CODE (x
) == CONST
&& GET_CODE (XEXP (x
, 0)) == SUBREG
1167 && GET_CODE (SUBREG_REG (XEXP (x
, 0))) == CONST_DOUBLE
)
1169 union real_extract u
;
1171 if (GET_MODE (SUBREG_REG (XEXP (x
, 0))) == SFmode
)
1172 fprintf (file
, "$float");
1174 fprintf (file
, "$double%d", SUBREG_WORD (XEXP (x
, 0)));
1175 bcopy ((char *) &CONST_DOUBLE_LOW (SUBREG_REG (XEXP (x
, 0))),
1176 (char *) &u
, sizeof u
);
1177 fprintf (file
, "(%.20e)", u
.d
);
1180 else if (GET_CODE (x
) == CONST_DOUBLE
1181 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1183 union real_extract u
;
1185 bcopy ((char *) &CONST_DOUBLE_LOW (x
), (char *) &u
, sizeof u
);
1186 fprintf (file
, "$%s(%.20e)",
1187 GET_MODE (x
) == SFmode
? "float" : "double0", u
.d
);
1191 output_addr_const (file
, x
);
1194 /* This page contains routines to output function prolog and epilog code. */
1196 /* Compute the size of the register stack, and determine if there are any
1197 call instructions. */
1200 compute_regstack_size ()
1205 /* See if we make any calls. We need to set lr1 if so. */
1206 a29k_makes_calls
= 0;
1207 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
1208 if (GET_CODE (insn
) == CALL_INSN
1209 || (GET_CODE (insn
) == INSN
1210 && GET_CODE (PATTERN (insn
)) == SEQUENCE
1211 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == CALL_INSN
))
1213 a29k_makes_calls
= 1;
1217 /* Find the highest local register used. */
1218 for (i
= R_LR (127); i
>= R_LR (0); i
--)
1219 if (regs_ever_live
[i
])
1222 a29k_regstack_size
= i
- (R_LR (0) - 1);
1224 /* If calling routines, ensure we count lr0 & lr1. */
1225 if (a29k_makes_calls
&& a29k_regstack_size
< 2)
1226 a29k_regstack_size
= 2;
1228 /* Count frame pointer and align to 8 byte boundary (even number of
1230 a29k_regstack_size
+= frame_pointer_needed
;
1231 if (a29k_regstack_size
& 1) a29k_regstack_size
++;
1234 /* Sets register names for incoming arguments and frame pointer.
1235 This can't be computed until after register allocation. */
1238 a29k_compute_reg_names ()
1242 compute_regstack_size ();
1244 /* Set the names and numbers of the frame pointer and incoming argument
1247 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1248 a29k_debug_reg_map
[i
] = i
;
1250 reg_names
[FRAME_POINTER_REGNUM
] = reg_names
[R_LR (a29k_regstack_size
- 1)];
1251 a29k_debug_reg_map
[FRAME_POINTER_REGNUM
] = R_LR (a29k_regstack_size
- 1);
1253 for (i
= 0; i
< 16; i
++)
1255 reg_names
[R_AR (i
)] = reg_names
[R_LR (a29k_regstack_size
+ i
+ 2)];
1256 a29k_debug_reg_map
[R_AR (i
)] = R_LR (a29k_regstack_size
+ i
+ 2);
1259 /* If using kernel register map, swap numbers for kernel and user
1261 if (TARGET_KERNEL_REGISTERS
)
1262 for (i
= 0; i
< 32; i
++)
1264 int tem
= a29k_debug_reg_map
[i
];
1265 a29k_debug_reg_map
[i
] = a29k_debug_reg_map
[R_KR (i
)];
1266 a29k_debug_reg_map
[R_KR (i
)] = tem
;
1270 /* Output function prolog code to file FILE. Memory stack size is SIZE. */
1273 output_prolog (file
, size
)
1280 unsigned int tag_word
;
1282 /* See how many incoming arguments we have in registers. */
1283 for (i
= R_AR (0); i
< R_AR (16); i
++)
1284 if (! fixed_regs
[i
])
1287 /* The argument count includes the caller's lr0 and lr1. */
1290 /* Compute memory stack size. Add in number of bytes that the we should
1291 push and pretend the caller did and the size of outgoing arguments.
1292 Then round to a doubleword boundary. */
1293 size
+= (current_function_pretend_args_size
1294 + current_function_outgoing_args_size
);
1295 size
= (size
+ 7) & ~7;
1297 /* Write header words. See if one or two word form. */
1298 tag_word
= (frame_pointer_needed
? 0x400000 : 0) + (arg_count
<< 16);
1300 if (size
/ 8 > 0xff)
1301 fprintf (file
, "\t.word %d, 0x%0x\n", (size
/ 8) << 2,
1302 0x800000 + tag_word
);
1304 fprintf (file
, "\t.word 0x%0x\n", tag_word
+ ((size
/ 8) << 3));
1306 /* Define the function name. */
1307 assemble_name (file
, a29k_function_name
);
1308 fprintf (file
, ":\n");
1310 /* Push the register stack by the proper amount. There are two possible
1312 if (a29k_regstack_size
>= 256/4)
1313 fprintf (file
, "\tconst %s,%d\n\tsub gr1,gr1,%s\n",
1314 reg_names
[R_TAV
], a29k_regstack_size
* 4, reg_names
[R_TAV
]);
1315 else if (a29k_regstack_size
)
1316 fprintf (file
, "\tsub gr1,gr1,%d\n", a29k_regstack_size
* 4);
1318 /* Test that the registers are available. */
1319 if (a29k_regstack_size
)
1320 fprintf (file
, "\tasgeu V_%sSPILL,gr1,%s\n",
1321 TARGET_KERNEL_REGISTERS
? "K" : "", reg_names
[R_RAB
]);
1323 /* Set up frame pointer, if one is needed. */
1324 if (frame_pointer_needed
)
1325 fprintf (file
, "\tsll %s,%s,0\n", reg_names
[FRAME_POINTER_REGNUM
],
1328 /* Make room for any frame space. There are three ways to do this. */
1331 fprintf (file
, "\tconst %s,%d\n", reg_names
[R_TAV
], size
);
1333 fprintf (file
, "\tconsth %s,%d\n", reg_names
[R_TAV
], size
);
1334 if (TARGET_STACK_CHECK
)
1335 fprintf (file
, "\tcall %s,__msp_check\n", reg_names
[R_TPC
]);
1336 fprintf (file
, "\tsub %s,%s,%s\n",
1337 reg_names
[R_MSP
], reg_names
[R_MSP
], reg_names
[R_TAV
]);
1341 if (TARGET_STACK_CHECK
)
1342 fprintf (file
, "\tcall %s,__msp_check\n", reg_names
[R_TPC
]);
1343 fprintf (file
, "\tsub %s,%s,%d\n",
1344 reg_names
[R_MSP
], reg_names
[R_MSP
], size
);
1347 /* If this routine will make calls, set lr1. If we see an insn that
1348 can use a delay slot before a call or jump, save this insn for that
1349 slot (this condition is equivalent to seeing if we have an insn that
1350 needs delay slots before an insn that has a filled delay slot). */
1351 a29k_last_prologue_insn
= 0;
1352 if (a29k_makes_calls
)
1354 i
= (a29k_regstack_size
+ arg_count
) * 4;
1356 fprintf (file
, "\tconst %s,%d\n\tadd lr1,gr1,%s\n",
1357 reg_names
[R_TAV
], i
, reg_names
[R_TAV
]);
1360 if (optimize
&& flag_delayed_branch
)
1361 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
1363 if (GET_CODE (insn
) == CODE_LABEL
1364 || (GET_CODE (insn
) == INSN
1365 && GET_CODE (PATTERN (insn
)) == SEQUENCE
))
1368 if (GET_CODE (insn
) == NOTE
1369 || (GET_CODE (insn
) == INSN
1370 && (GET_CODE (PATTERN (insn
)) == USE
1371 || GET_CODE (PATTERN (insn
)) == CLOBBER
)))
1374 if (num_delay_slots (insn
) > 0)
1376 a29k_last_prologue_insn
= (char *) oballoc (100);
1377 sprintf (a29k_last_prologue_insn
, "add lr1,gr1,%d", i
);
1382 if (a29k_last_prologue_insn
== 0)
1383 fprintf (file
, "\tadd lr1,gr1,%d\n", i
);
1387 /* Compute the first insn of the epilogue. */
1388 a29k_first_epilogue_insn_used
= 0;
1390 if (size
== 0 && a29k_regstack_size
== 0 && ! frame_pointer_needed
)
1391 a29k_first_epilogue_insn
= 0;
1393 a29k_first_epilogue_insn
= (char *) oballoc (100);
1395 if (frame_pointer_needed
)
1396 sprintf (a29k_first_epilogue_insn
, "sll %s,%s,0",
1397 reg_names
[R_MSP
], reg_names
[FRAME_POINTER_REGNUM
]);
1398 else if (a29k_regstack_size
)
1400 if (a29k_regstack_size
>= 256 / 4)
1401 sprintf (a29k_first_epilogue_insn
, "const %s,%d",
1402 reg_names
[R_TAV
], a29k_regstack_size
* 4);
1404 sprintf (a29k_first_epilogue_insn
, "add gr1,gr1,%d",
1405 a29k_regstack_size
* 4);
1410 sprintf (a29k_first_epilogue_insn
, "const %s,%d",
1411 reg_names
[R_TAV
], size
);
1413 sprintf (a29k_first_epilogue_insn
, "add %s,%s,%d",
1414 reg_names
[R_MSP
], reg_names
[R_MSP
], size
);
1418 /* Call this after writing what might be the first instruction of the
1419 epilogue. If that first insn was used in a delay slot, an intermediate
1420 label is written. */
1423 check_epilogue_internal_label (file
)
1428 if (! a29k_first_epilogue_insn_used
)
1431 for (insn
= get_last_insn ();
1432 GET_CODE (insn
) != CODE_LABEL
;
1433 insn
= PREV_INSN (insn
))
1436 ASM_OUTPUT_INTERNAL_LABEL (file
, "LX", CODE_LABEL_NUMBER (insn
));
1437 a29k_first_epilogue_insn_used
= 0;
1440 /* Output the epilog of the last procedure to file FILE. SIZE is the memory
1441 stack size. The register stack size is in the variable
1442 A29K_REGSTACK_SIZE. */
1445 output_epilog (file
, size
)
1450 int locals_unavailable
= 0; /* True until after first insn
1451 after gr1 update. */
1453 /* If we hit a BARRIER before a real insn or CODE_LABEL, we don't
1454 need to do anything because we are never jumped to. */
1455 insn
= get_last_insn ();
1456 if (GET_CODE (insn
) == NOTE
)
1457 insn
= prev_nonnote_insn (insn
);
1459 if (insn
&& GET_CODE (insn
) == BARRIER
)
1462 /* If a frame pointer was needed we must restore the memory stack pointer
1463 before adjusting the register stack. */
1464 if (frame_pointer_needed
)
1466 fprintf (file
, "\tsll %s,%s,0\n",
1467 reg_names
[R_MSP
], reg_names
[FRAME_POINTER_REGNUM
]);
1468 check_epilogue_internal_label (file
);
1471 /* Restore the register stack. There are two ways to do this. */
1472 if (a29k_regstack_size
)
1474 if (a29k_regstack_size
>= 256/4)
1476 fprintf (file
, "\tconst %s,%d\n",
1477 reg_names
[R_TAV
], a29k_regstack_size
* 4);
1478 check_epilogue_internal_label (file
);
1479 fprintf (file
, "\tadd gr1,gr1,%s\n", reg_names
[R_TAV
]);
1483 fprintf (file
, "\tadd gr1,gr1,%d\n", a29k_regstack_size
* 4);
1484 check_epilogue_internal_label (file
);
1486 locals_unavailable
= 1;
1489 /* Restore the memory stack pointer if there is no frame pointer.
1490 Adjust the size to include any pretend arguments and pushed
1491 arguments and round to doubleword boundary. */
1492 size
+= (current_function_pretend_args_size
1493 + current_function_outgoing_args_size
);
1494 size
= (size
+ 7) & ~7;
1496 if (size
&& ! frame_pointer_needed
)
1500 fprintf (file
, "\tconst %s,%d\n", reg_names
[R_TAV
], size
);
1501 check_epilogue_internal_label (file
);
1502 locals_unavailable
= 0;
1504 fprintf (file
, "\tconsth %s,%d\n", reg_names
[R_TAV
], size
);
1505 fprintf (file
, "\tadd %s,%s,%s\n",
1506 reg_names
[R_MSP
], reg_names
[R_MSP
], reg_names
[R_TAV
]);
1510 fprintf (file
, "\tadd %s,%s,%d\n",
1511 reg_names
[R_MSP
], reg_names
[R_MSP
], size
);
1512 check_epilogue_internal_label (file
);
1513 locals_unavailable
= 0;
1517 if (locals_unavailable
)
1519 /* If we have an insn for this delay slot, write it. */
1520 if (current_function_epilogue_delay_list
)
1521 final_scan_insn (XEXP (current_function_epilogue_delay_list
, 0),
1524 fprintf (file
, "\tnop\n");
1527 fprintf (file
, "\tjmpi lr0\n");
1528 if (a29k_regstack_size
)
1529 fprintf (file
, "\tasleu V_%sFILL,lr1,%s\n",
1530 TARGET_KERNEL_REGISTERS
? "K" : "", reg_names
[R_RFB
]);
1531 else if (current_function_epilogue_delay_list
)
1532 final_scan_insn (XEXP (current_function_epilogue_delay_list
, 0),
1535 fprintf (file
, "\tnop\n");