2008-07-03 Vladimir Makarov <vmakarov@redhat.com>
[official-gcc.git] / gcc / final.c
blob5d19e2d2abac968393d5caf598652cf189971e9d
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
47 #include "config.h"
48 #include "system.h"
49 #include "coretypes.h"
50 #include "tm.h"
52 #include "tree.h"
53 #include "rtl.h"
54 #include "tm_p.h"
55 #include "regs.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
58 #include "recog.h"
59 #include "conditions.h"
60 #include "flags.h"
61 #include "real.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "toplev.h"
67 #include "reload.h"
68 #include "intl.h"
69 #include "basic-block.h"
70 #include "target.h"
71 #include "debug.h"
72 #include "expr.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
75 #include "timevar.h"
76 #include "cgraph.h"
77 #include "coverage.h"
78 #include "df.h"
79 #include "vecprim.h"
80 #include "ggc.h"
81 #include "cfgloop.h"
82 #include "params.h"
84 #ifdef XCOFF_DEBUGGING_INFO
85 #include "xcoffout.h" /* Needed for external data
86 declarations for e.g. AIX 4.x. */
87 #endif
89 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
90 #include "dwarf2out.h"
91 #endif
93 #ifdef DBX_DEBUGGING_INFO
94 #include "dbxout.h"
95 #endif
97 #ifdef SDB_DEBUGGING_INFO
98 #include "sdbout.h"
99 #endif
101 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
102 null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
105 #endif
107 /* How to start an assembler comment. */
108 #ifndef ASM_COMMENT_START
109 #define ASM_COMMENT_START ";#"
110 #endif
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
115 #endif
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
119 #endif
121 /* Bitflags used by final_scan_insn. */
122 #define SEEN_BB 1
123 #define SEEN_NOTE 2
124 #define SEEN_EMITTED 4
126 /* Last insn processed by final_scan_insn. */
127 static rtx debug_insn;
128 rtx current_output_insn;
130 /* Line number of last NOTE. */
131 static int last_linenum;
133 /* Highest line number in current block. */
134 static int high_block_linenum;
136 /* Likewise for function. */
137 static int high_function_linenum;
139 /* Filename of last NOTE. */
140 static const char *last_filename;
142 /* Override filename and line number. */
143 static const char *override_filename;
144 static int override_linenum;
146 /* Whether to force emission of a line note before the next insn. */
147 static bool force_source_line = false;
149 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
151 /* Nonzero while outputting an `asm' with operands.
152 This means that inconsistencies are the user's fault, so don't die.
153 The precise value is the insn being output, to pass to error_for_asm. */
154 rtx this_is_asm_operands;
156 /* Number of operands of this insn, for an `asm' with operands. */
157 static unsigned int insn_noperands;
159 /* Compare optimization flag. */
161 static rtx last_ignored_compare = 0;
163 /* Assign a unique number to each insn that is output.
164 This can be used to generate unique local labels. */
166 static int insn_counter = 0;
168 #ifdef HAVE_cc0
169 /* This variable contains machine-dependent flags (defined in tm.h)
170 set and examined by output routines
171 that describe how to interpret the condition codes properly. */
173 CC_STATUS cc_status;
175 /* During output of an insn, this contains a copy of cc_status
176 from before the insn. */
178 CC_STATUS cc_prev_status;
179 #endif
181 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
183 static int block_depth;
185 /* Nonzero if have enabled APP processing of our assembler output. */
187 static int app_on;
189 /* If we are outputting an insn sequence, this contains the sequence rtx.
190 Zero otherwise. */
192 rtx final_sequence;
194 #ifdef ASSEMBLER_DIALECT
196 /* Number of the assembler dialect to use, starting at 0. */
197 static int dialect_number;
198 #endif
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
203 #endif
205 #ifdef HAVE_ATTR_length
206 static int asm_insn_count (rtx);
207 #endif
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx);
211 static rtx walk_alter_subreg (rtx *, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx);
214 static tree get_mem_expr_from_op (rtx, int *);
215 static void output_asm_operand_names (rtx *, int *, int);
216 static void output_operand (rtx, int);
217 #ifdef LEAF_REGISTERS
218 static void leaf_renumber_regs (rtx);
219 #endif
220 #ifdef HAVE_cc0
221 static int alter_cond (rtx);
222 #endif
223 #ifndef ADDR_VEC_ALIGN
224 static int final_addr_vec_align (rtx);
225 #endif
226 #ifdef HAVE_ATTR_length
227 static int align_fuzz (rtx, rtx, int, unsigned);
228 #endif
230 /* Initialize data in final at the beginning of a compilation. */
232 void
233 init_final (const char *filename ATTRIBUTE_UNUSED)
235 app_on = 0;
236 final_sequence = 0;
238 #ifdef ASSEMBLER_DIALECT
239 dialect_number = ASSEMBLER_DIALECT;
240 #endif
243 /* Default target function prologue and epilogue assembler output.
245 If not overridden for epilogue code, then the function body itself
246 contains return instructions wherever needed. */
247 void
248 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
249 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
253 /* Default target hook that outputs nothing to a stream. */
254 void
255 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
259 /* Enable APP processing of subsequent output.
260 Used before the output from an `asm' statement. */
262 void
263 app_enable (void)
265 if (! app_on)
267 fputs (ASM_APP_ON, asm_out_file);
268 app_on = 1;
272 /* Disable APP processing of subsequent output.
273 Called from varasm.c before most kinds of output. */
275 void
276 app_disable (void)
278 if (app_on)
280 fputs (ASM_APP_OFF, asm_out_file);
281 app_on = 0;
285 /* Return the number of slots filled in the current
286 delayed branch sequence (we don't count the insn needing the
287 delay slot). Zero if not in a delayed branch sequence. */
289 #ifdef DELAY_SLOTS
291 dbr_sequence_length (void)
293 if (final_sequence != 0)
294 return XVECLEN (final_sequence, 0) - 1;
295 else
296 return 0;
298 #endif
300 /* The next two pages contain routines used to compute the length of an insn
301 and to shorten branches. */
303 /* Arrays for insn lengths, and addresses. The latter is referenced by
304 `insn_current_length'. */
306 static int *insn_lengths;
308 VEC(int,heap) *insn_addresses_;
310 /* Max uid for which the above arrays are valid. */
311 static int insn_lengths_max_uid;
313 /* Address of insn being processed. Used by `insn_current_length'. */
314 int insn_current_address;
316 /* Address of insn being processed in previous iteration. */
317 int insn_last_address;
319 /* known invariant alignment of insn being processed. */
320 int insn_current_align;
322 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
323 gives the next following alignment insn that increases the known
324 alignment, or NULL_RTX if there is no such insn.
325 For any alignment obtained this way, we can again index uid_align with
326 its uid to obtain the next following align that in turn increases the
327 alignment, till we reach NULL_RTX; the sequence obtained this way
328 for each insn we'll call the alignment chain of this insn in the following
329 comments. */
331 struct label_alignment
333 short alignment;
334 short max_skip;
337 static rtx *uid_align;
338 static int *uid_shuid;
339 static struct label_alignment *label_align;
341 /* Indicate that branch shortening hasn't yet been done. */
343 void
344 init_insn_lengths (void)
346 if (uid_shuid)
348 free (uid_shuid);
349 uid_shuid = 0;
351 if (insn_lengths)
353 free (insn_lengths);
354 insn_lengths = 0;
355 insn_lengths_max_uid = 0;
357 #ifdef HAVE_ATTR_length
358 INSN_ADDRESSES_FREE ();
359 #endif
360 if (uid_align)
362 free (uid_align);
363 uid_align = 0;
367 /* Obtain the current length of an insn. If branch shortening has been done,
368 get its actual length. Otherwise, use FALLBACK_FN to calculate the
369 length. */
370 static inline int
371 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
372 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
374 #ifdef HAVE_ATTR_length
375 rtx body;
376 int i;
377 int length = 0;
379 if (insn_lengths_max_uid > INSN_UID (insn))
380 return insn_lengths[INSN_UID (insn)];
381 else
382 switch (GET_CODE (insn))
384 case NOTE:
385 case BARRIER:
386 case CODE_LABEL:
387 return 0;
389 case CALL_INSN:
390 length = fallback_fn (insn);
391 break;
393 case JUMP_INSN:
394 body = PATTERN (insn);
395 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
397 /* Alignment is machine-dependent and should be handled by
398 ADDR_VEC_ALIGN. */
400 else
401 length = fallback_fn (insn);
402 break;
404 case INSN:
405 body = PATTERN (insn);
406 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
407 return 0;
409 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
410 length = asm_insn_count (body) * fallback_fn (insn);
411 else if (GET_CODE (body) == SEQUENCE)
412 for (i = 0; i < XVECLEN (body, 0); i++)
413 length += get_attr_length (XVECEXP (body, 0, i));
414 else
415 length = fallback_fn (insn);
416 break;
418 default:
419 break;
422 #ifdef ADJUST_INSN_LENGTH
423 ADJUST_INSN_LENGTH (insn, length);
424 #endif
425 return length;
426 #else /* not HAVE_ATTR_length */
427 return 0;
428 #define insn_default_length 0
429 #define insn_min_length 0
430 #endif /* not HAVE_ATTR_length */
433 /* Obtain the current length of an insn. If branch shortening has been done,
434 get its actual length. Otherwise, get its maximum length. */
436 get_attr_length (rtx insn)
438 return get_attr_length_1 (insn, insn_default_length);
441 /* Obtain the current length of an insn. If branch shortening has been done,
442 get its actual length. Otherwise, get its minimum length. */
444 get_attr_min_length (rtx insn)
446 return get_attr_length_1 (insn, insn_min_length);
449 /* Code to handle alignment inside shorten_branches. */
451 /* Here is an explanation how the algorithm in align_fuzz can give
452 proper results:
454 Call a sequence of instructions beginning with alignment point X
455 and continuing until the next alignment point `block X'. When `X'
456 is used in an expression, it means the alignment value of the
457 alignment point.
459 Call the distance between the start of the first insn of block X, and
460 the end of the last insn of block X `IX', for the `inner size of X'.
461 This is clearly the sum of the instruction lengths.
463 Likewise with the next alignment-delimited block following X, which we
464 shall call block Y.
466 Call the distance between the start of the first insn of block X, and
467 the start of the first insn of block Y `OX', for the `outer size of X'.
469 The estimated padding is then OX - IX.
471 OX can be safely estimated as
473 if (X >= Y)
474 OX = round_up(IX, Y)
475 else
476 OX = round_up(IX, X) + Y - X
478 Clearly est(IX) >= real(IX), because that only depends on the
479 instruction lengths, and those being overestimated is a given.
481 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
482 we needn't worry about that when thinking about OX.
484 When X >= Y, the alignment provided by Y adds no uncertainty factor
485 for branch ranges starting before X, so we can just round what we have.
486 But when X < Y, we don't know anything about the, so to speak,
487 `middle bits', so we have to assume the worst when aligning up from an
488 address mod X to one mod Y, which is Y - X. */
490 #ifndef LABEL_ALIGN
491 #define LABEL_ALIGN(LABEL) align_labels_log
492 #endif
494 #ifndef LABEL_ALIGN_MAX_SKIP
495 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
496 #endif
498 #ifndef LOOP_ALIGN
499 #define LOOP_ALIGN(LABEL) align_loops_log
500 #endif
502 #ifndef LOOP_ALIGN_MAX_SKIP
503 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
504 #endif
506 #ifndef LABEL_ALIGN_AFTER_BARRIER
507 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
508 #endif
510 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
511 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
512 #endif
514 #ifndef JUMP_ALIGN
515 #define JUMP_ALIGN(LABEL) align_jumps_log
516 #endif
518 #ifndef JUMP_ALIGN_MAX_SKIP
519 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
520 #endif
522 #ifndef ADDR_VEC_ALIGN
523 static int
524 final_addr_vec_align (rtx addr_vec)
526 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
528 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
529 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
530 return exact_log2 (align);
534 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
535 #endif
537 #ifndef INSN_LENGTH_ALIGNMENT
538 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
539 #endif
541 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
543 static int min_labelno, max_labelno;
545 #define LABEL_TO_ALIGNMENT(LABEL) \
546 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
548 #define LABEL_TO_MAX_SKIP(LABEL) \
549 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
551 /* For the benefit of port specific code do this also as a function. */
554 label_to_alignment (rtx label)
556 return LABEL_TO_ALIGNMENT (label);
559 #ifdef HAVE_ATTR_length
560 /* The differences in addresses
561 between a branch and its target might grow or shrink depending on
562 the alignment the start insn of the range (the branch for a forward
563 branch or the label for a backward branch) starts out on; if these
564 differences are used naively, they can even oscillate infinitely.
565 We therefore want to compute a 'worst case' address difference that
566 is independent of the alignment the start insn of the range end
567 up on, and that is at least as large as the actual difference.
568 The function align_fuzz calculates the amount we have to add to the
569 naively computed difference, by traversing the part of the alignment
570 chain of the start insn of the range that is in front of the end insn
571 of the range, and considering for each alignment the maximum amount
572 that it might contribute to a size increase.
574 For casesi tables, we also want to know worst case minimum amounts of
575 address difference, in case a machine description wants to introduce
576 some common offset that is added to all offsets in a table.
577 For this purpose, align_fuzz with a growth argument of 0 computes the
578 appropriate adjustment. */
580 /* Compute the maximum delta by which the difference of the addresses of
581 START and END might grow / shrink due to a different address for start
582 which changes the size of alignment insns between START and END.
583 KNOWN_ALIGN_LOG is the alignment known for START.
584 GROWTH should be ~0 if the objective is to compute potential code size
585 increase, and 0 if the objective is to compute potential shrink.
586 The return value is undefined for any other value of GROWTH. */
588 static int
589 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
591 int uid = INSN_UID (start);
592 rtx align_label;
593 int known_align = 1 << known_align_log;
594 int end_shuid = INSN_SHUID (end);
595 int fuzz = 0;
597 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
599 int align_addr, new_align;
601 uid = INSN_UID (align_label);
602 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
603 if (uid_shuid[uid] > end_shuid)
604 break;
605 known_align_log = LABEL_TO_ALIGNMENT (align_label);
606 new_align = 1 << known_align_log;
607 if (new_align < known_align)
608 continue;
609 fuzz += (-align_addr ^ growth) & (new_align - known_align);
610 known_align = new_align;
612 return fuzz;
615 /* Compute a worst-case reference address of a branch so that it
616 can be safely used in the presence of aligned labels. Since the
617 size of the branch itself is unknown, the size of the branch is
618 not included in the range. I.e. for a forward branch, the reference
619 address is the end address of the branch as known from the previous
620 branch shortening pass, minus a value to account for possible size
621 increase due to alignment. For a backward branch, it is the start
622 address of the branch as known from the current pass, plus a value
623 to account for possible size increase due to alignment.
624 NB.: Therefore, the maximum offset allowed for backward branches needs
625 to exclude the branch size. */
628 insn_current_reference_address (rtx branch)
630 rtx dest, seq;
631 int seq_uid;
633 if (! INSN_ADDRESSES_SET_P ())
634 return 0;
636 seq = NEXT_INSN (PREV_INSN (branch));
637 seq_uid = INSN_UID (seq);
638 if (!JUMP_P (branch))
639 /* This can happen for example on the PA; the objective is to know the
640 offset to address something in front of the start of the function.
641 Thus, we can treat it like a backward branch.
642 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
643 any alignment we'd encounter, so we skip the call to align_fuzz. */
644 return insn_current_address;
645 dest = JUMP_LABEL (branch);
647 /* BRANCH has no proper alignment chain set, so use SEQ.
648 BRANCH also has no INSN_SHUID. */
649 if (INSN_SHUID (seq) < INSN_SHUID (dest))
651 /* Forward branch. */
652 return (insn_last_address + insn_lengths[seq_uid]
653 - align_fuzz (seq, dest, length_unit_log, ~0));
655 else
657 /* Backward branch. */
658 return (insn_current_address
659 + align_fuzz (dest, seq, length_unit_log, ~0));
662 #endif /* HAVE_ATTR_length */
664 /* Compute branch alignments based on frequency information in the
665 CFG. */
667 static unsigned int
668 compute_alignments (void)
670 int log, max_skip, max_log;
671 basic_block bb;
672 int freq_max = 0;
673 int freq_threshold = 0;
675 if (label_align)
677 free (label_align);
678 label_align = 0;
681 max_labelno = max_label_num ();
682 min_labelno = get_first_label_num ();
683 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
685 /* If not optimizing or optimizing for size, don't assign any alignments. */
686 if (! optimize || optimize_size)
687 return 0;
689 if (dump_file)
691 dump_flow_info (dump_file, TDF_DETAILS);
692 flow_loops_dump (dump_file, NULL, 1);
693 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
695 FOR_EACH_BB (bb)
696 if (bb->frequency > freq_max)
697 freq_max = bb->frequency;
698 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
700 if (dump_file)
701 fprintf(dump_file, "freq_max: %i\n",freq_max);
702 FOR_EACH_BB (bb)
704 rtx label = BB_HEAD (bb);
705 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
706 edge e;
707 edge_iterator ei;
709 if (!LABEL_P (label)
710 || probably_never_executed_bb_p (bb))
712 if (dump_file)
713 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
714 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth);
715 continue;
717 max_log = LABEL_ALIGN (label);
718 max_skip = LABEL_ALIGN_MAX_SKIP;
720 FOR_EACH_EDGE (e, ei, bb->preds)
722 if (e->flags & EDGE_FALLTHRU)
723 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
724 else
725 branch_frequency += EDGE_FREQUENCY (e);
727 if (dump_file)
729 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
730 bb->index, bb->frequency, bb->loop_father->num,
731 bb->loop_depth,
732 fallthru_frequency, branch_frequency);
733 if (!bb->loop_father->inner && bb->loop_father->num)
734 fprintf (dump_file, " inner_loop");
735 if (bb->loop_father->header == bb)
736 fprintf (dump_file, " loop_header");
737 fprintf (dump_file, "\n");
740 /* There are two purposes to align block with no fallthru incoming edge:
741 1) to avoid fetch stalls when branch destination is near cache boundary
742 2) to improve cache efficiency in case the previous block is not executed
743 (so it does not need to be in the cache).
745 We to catch first case, we align frequently executed blocks.
746 To catch the second, we align blocks that are executed more frequently
747 than the predecessor and the predecessor is likely to not be executed
748 when function is called. */
750 if (!has_fallthru
751 && (branch_frequency > freq_threshold
752 || (bb->frequency > bb->prev_bb->frequency * 10
753 && (bb->prev_bb->frequency
754 <= ENTRY_BLOCK_PTR->frequency / 2))))
756 log = JUMP_ALIGN (label);
757 if (dump_file)
758 fprintf(dump_file, " jump alignment added.\n");
759 if (max_log < log)
761 max_log = log;
762 max_skip = JUMP_ALIGN_MAX_SKIP;
765 /* In case block is frequent and reached mostly by non-fallthru edge,
766 align it. It is most likely a first block of loop. */
767 if (has_fallthru
768 && maybe_hot_bb_p (bb)
769 && branch_frequency + fallthru_frequency > freq_threshold
770 && (branch_frequency
771 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
773 log = LOOP_ALIGN (label);
774 if (dump_file)
775 fprintf(dump_file, " internal loop alignment added.\n");
776 if (max_log < log)
778 max_log = log;
779 max_skip = LOOP_ALIGN_MAX_SKIP;
782 LABEL_TO_ALIGNMENT (label) = max_log;
783 LABEL_TO_MAX_SKIP (label) = max_skip;
786 if (dump_file)
787 loop_optimizer_finalize ();
788 return 0;
791 struct rtl_opt_pass pass_compute_alignments =
794 RTL_PASS,
795 "alignments", /* name */
796 NULL, /* gate */
797 compute_alignments, /* execute */
798 NULL, /* sub */
799 NULL, /* next */
800 0, /* static_pass_number */
801 0, /* tv_id */
802 0, /* properties_required */
803 0, /* properties_provided */
804 0, /* properties_destroyed */
805 0, /* todo_flags_start */
806 TODO_dump_func | TODO_verify_rtl_sharing
807 | TODO_ggc_collect /* todo_flags_finish */
812 /* Make a pass over all insns and compute their actual lengths by shortening
813 any branches of variable length if possible. */
815 /* shorten_branches might be called multiple times: for example, the SH
816 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
817 In order to do this, it needs proper length information, which it obtains
818 by calling shorten_branches. This cannot be collapsed with
819 shorten_branches itself into a single pass unless we also want to integrate
820 reorg.c, since the branch splitting exposes new instructions with delay
821 slots. */
823 void
824 shorten_branches (rtx first ATTRIBUTE_UNUSED)
826 rtx insn;
827 int max_uid;
828 int i;
829 int max_log;
830 int max_skip;
831 #ifdef HAVE_ATTR_length
832 #define MAX_CODE_ALIGN 16
833 rtx seq;
834 int something_changed = 1;
835 char *varying_length;
836 rtx body;
837 int uid;
838 rtx align_tab[MAX_CODE_ALIGN];
840 #endif
842 /* Compute maximum UID and allocate label_align / uid_shuid. */
843 max_uid = get_max_uid ();
845 /* Free uid_shuid before reallocating it. */
846 free (uid_shuid);
848 uid_shuid = XNEWVEC (int, max_uid);
850 if (max_labelno != max_label_num ())
852 int old = max_labelno;
853 int n_labels;
854 int n_old_labels;
856 max_labelno = max_label_num ();
858 n_labels = max_labelno - min_labelno + 1;
859 n_old_labels = old - min_labelno + 1;
861 label_align = xrealloc (label_align,
862 n_labels * sizeof (struct label_alignment));
864 /* Range of labels grows monotonically in the function. Failing here
865 means that the initialization of array got lost. */
866 gcc_assert (n_old_labels <= n_labels);
868 memset (label_align + n_old_labels, 0,
869 (n_labels - n_old_labels) * sizeof (struct label_alignment));
872 /* Initialize label_align and set up uid_shuid to be strictly
873 monotonically rising with insn order. */
874 /* We use max_log here to keep track of the maximum alignment we want to
875 impose on the next CODE_LABEL (or the current one if we are processing
876 the CODE_LABEL itself). */
878 max_log = 0;
879 max_skip = 0;
881 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
883 int log;
885 INSN_SHUID (insn) = i++;
886 if (INSN_P (insn))
887 continue;
889 if (LABEL_P (insn))
891 rtx next;
893 /* Merge in alignments computed by compute_alignments. */
894 log = LABEL_TO_ALIGNMENT (insn);
895 if (max_log < log)
897 max_log = log;
898 max_skip = LABEL_TO_MAX_SKIP (insn);
901 log = LABEL_ALIGN (insn);
902 if (max_log < log)
904 max_log = log;
905 max_skip = LABEL_ALIGN_MAX_SKIP;
907 next = next_nonnote_insn (insn);
908 /* ADDR_VECs only take room if read-only data goes into the text
909 section. */
910 if (JUMP_TABLES_IN_TEXT_SECTION
911 || readonly_data_section == text_section)
912 if (next && JUMP_P (next))
914 rtx nextbody = PATTERN (next);
915 if (GET_CODE (nextbody) == ADDR_VEC
916 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
918 log = ADDR_VEC_ALIGN (next);
919 if (max_log < log)
921 max_log = log;
922 max_skip = LABEL_ALIGN_MAX_SKIP;
926 LABEL_TO_ALIGNMENT (insn) = max_log;
927 LABEL_TO_MAX_SKIP (insn) = max_skip;
928 max_log = 0;
929 max_skip = 0;
931 else if (BARRIER_P (insn))
933 rtx label;
935 for (label = insn; label && ! INSN_P (label);
936 label = NEXT_INSN (label))
937 if (LABEL_P (label))
939 log = LABEL_ALIGN_AFTER_BARRIER (insn);
940 if (max_log < log)
942 max_log = log;
943 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
945 break;
949 #ifdef HAVE_ATTR_length
951 /* Allocate the rest of the arrays. */
952 insn_lengths = XNEWVEC (int, max_uid);
953 insn_lengths_max_uid = max_uid;
954 /* Syntax errors can lead to labels being outside of the main insn stream.
955 Initialize insn_addresses, so that we get reproducible results. */
956 INSN_ADDRESSES_ALLOC (max_uid);
958 varying_length = XCNEWVEC (char, max_uid);
960 /* Initialize uid_align. We scan instructions
961 from end to start, and keep in align_tab[n] the last seen insn
962 that does an alignment of at least n+1, i.e. the successor
963 in the alignment chain for an insn that does / has a known
964 alignment of n. */
965 uid_align = XCNEWVEC (rtx, max_uid);
967 for (i = MAX_CODE_ALIGN; --i >= 0;)
968 align_tab[i] = NULL_RTX;
969 seq = get_last_insn ();
970 for (; seq; seq = PREV_INSN (seq))
972 int uid = INSN_UID (seq);
973 int log;
974 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
975 uid_align[uid] = align_tab[0];
976 if (log)
978 /* Found an alignment label. */
979 uid_align[uid] = align_tab[log];
980 for (i = log - 1; i >= 0; i--)
981 align_tab[i] = seq;
984 #ifdef CASE_VECTOR_SHORTEN_MODE
985 if (optimize)
987 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
988 label fields. */
990 int min_shuid = INSN_SHUID (get_insns ()) - 1;
991 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
992 int rel;
994 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
996 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
997 int len, i, min, max, insn_shuid;
998 int min_align;
999 addr_diff_vec_flags flags;
1001 if (!JUMP_P (insn)
1002 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1003 continue;
1004 pat = PATTERN (insn);
1005 len = XVECLEN (pat, 1);
1006 gcc_assert (len > 0);
1007 min_align = MAX_CODE_ALIGN;
1008 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1010 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1011 int shuid = INSN_SHUID (lab);
1012 if (shuid < min)
1014 min = shuid;
1015 min_lab = lab;
1017 if (shuid > max)
1019 max = shuid;
1020 max_lab = lab;
1022 if (min_align > LABEL_TO_ALIGNMENT (lab))
1023 min_align = LABEL_TO_ALIGNMENT (lab);
1025 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1026 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1027 insn_shuid = INSN_SHUID (insn);
1028 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1029 memset (&flags, 0, sizeof (flags));
1030 flags.min_align = min_align;
1031 flags.base_after_vec = rel > insn_shuid;
1032 flags.min_after_vec = min > insn_shuid;
1033 flags.max_after_vec = max > insn_shuid;
1034 flags.min_after_base = min > rel;
1035 flags.max_after_base = max > rel;
1036 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1039 #endif /* CASE_VECTOR_SHORTEN_MODE */
1041 /* Compute initial lengths, addresses, and varying flags for each insn. */
1042 for (insn_current_address = 0, insn = first;
1043 insn != 0;
1044 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1046 uid = INSN_UID (insn);
1048 insn_lengths[uid] = 0;
1050 if (LABEL_P (insn))
1052 int log = LABEL_TO_ALIGNMENT (insn);
1053 if (log)
1055 int align = 1 << log;
1056 int new_address = (insn_current_address + align - 1) & -align;
1057 insn_lengths[uid] = new_address - insn_current_address;
1061 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1063 if (NOTE_P (insn) || BARRIER_P (insn)
1064 || LABEL_P (insn))
1065 continue;
1066 if (INSN_DELETED_P (insn))
1067 continue;
1069 body = PATTERN (insn);
1070 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1072 /* This only takes room if read-only data goes into the text
1073 section. */
1074 if (JUMP_TABLES_IN_TEXT_SECTION
1075 || readonly_data_section == text_section)
1076 insn_lengths[uid] = (XVECLEN (body,
1077 GET_CODE (body) == ADDR_DIFF_VEC)
1078 * GET_MODE_SIZE (GET_MODE (body)));
1079 /* Alignment is handled by ADDR_VEC_ALIGN. */
1081 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1082 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1083 else if (GET_CODE (body) == SEQUENCE)
1085 int i;
1086 int const_delay_slots;
1087 #ifdef DELAY_SLOTS
1088 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1089 #else
1090 const_delay_slots = 0;
1091 #endif
1092 /* Inside a delay slot sequence, we do not do any branch shortening
1093 if the shortening could change the number of delay slots
1094 of the branch. */
1095 for (i = 0; i < XVECLEN (body, 0); i++)
1097 rtx inner_insn = XVECEXP (body, 0, i);
1098 int inner_uid = INSN_UID (inner_insn);
1099 int inner_length;
1101 if (GET_CODE (body) == ASM_INPUT
1102 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1103 inner_length = (asm_insn_count (PATTERN (inner_insn))
1104 * insn_default_length (inner_insn));
1105 else
1106 inner_length = insn_default_length (inner_insn);
1108 insn_lengths[inner_uid] = inner_length;
1109 if (const_delay_slots)
1111 if ((varying_length[inner_uid]
1112 = insn_variable_length_p (inner_insn)) != 0)
1113 varying_length[uid] = 1;
1114 INSN_ADDRESSES (inner_uid) = (insn_current_address
1115 + insn_lengths[uid]);
1117 else
1118 varying_length[inner_uid] = 0;
1119 insn_lengths[uid] += inner_length;
1122 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1124 insn_lengths[uid] = insn_default_length (insn);
1125 varying_length[uid] = insn_variable_length_p (insn);
1128 /* If needed, do any adjustment. */
1129 #ifdef ADJUST_INSN_LENGTH
1130 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1131 if (insn_lengths[uid] < 0)
1132 fatal_insn ("negative insn length", insn);
1133 #endif
1136 /* Now loop over all the insns finding varying length insns. For each,
1137 get the current insn length. If it has changed, reflect the change.
1138 When nothing changes for a full pass, we are done. */
1140 while (something_changed)
1142 something_changed = 0;
1143 insn_current_align = MAX_CODE_ALIGN - 1;
1144 for (insn_current_address = 0, insn = first;
1145 insn != 0;
1146 insn = NEXT_INSN (insn))
1148 int new_length;
1149 #ifdef ADJUST_INSN_LENGTH
1150 int tmp_length;
1151 #endif
1152 int length_align;
1154 uid = INSN_UID (insn);
1156 if (LABEL_P (insn))
1158 int log = LABEL_TO_ALIGNMENT (insn);
1159 if (log > insn_current_align)
1161 int align = 1 << log;
1162 int new_address= (insn_current_address + align - 1) & -align;
1163 insn_lengths[uid] = new_address - insn_current_address;
1164 insn_current_align = log;
1165 insn_current_address = new_address;
1167 else
1168 insn_lengths[uid] = 0;
1169 INSN_ADDRESSES (uid) = insn_current_address;
1170 continue;
1173 length_align = INSN_LENGTH_ALIGNMENT (insn);
1174 if (length_align < insn_current_align)
1175 insn_current_align = length_align;
1177 insn_last_address = INSN_ADDRESSES (uid);
1178 INSN_ADDRESSES (uid) = insn_current_address;
1180 #ifdef CASE_VECTOR_SHORTEN_MODE
1181 if (optimize && JUMP_P (insn)
1182 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1184 rtx body = PATTERN (insn);
1185 int old_length = insn_lengths[uid];
1186 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1187 rtx min_lab = XEXP (XEXP (body, 2), 0);
1188 rtx max_lab = XEXP (XEXP (body, 3), 0);
1189 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1190 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1191 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1192 rtx prev;
1193 int rel_align = 0;
1194 addr_diff_vec_flags flags;
1196 /* Avoid automatic aggregate initialization. */
1197 flags = ADDR_DIFF_VEC_FLAGS (body);
1199 /* Try to find a known alignment for rel_lab. */
1200 for (prev = rel_lab;
1201 prev
1202 && ! insn_lengths[INSN_UID (prev)]
1203 && ! (varying_length[INSN_UID (prev)] & 1);
1204 prev = PREV_INSN (prev))
1205 if (varying_length[INSN_UID (prev)] & 2)
1207 rel_align = LABEL_TO_ALIGNMENT (prev);
1208 break;
1211 /* See the comment on addr_diff_vec_flags in rtl.h for the
1212 meaning of the flags values. base: REL_LAB vec: INSN */
1213 /* Anything after INSN has still addresses from the last
1214 pass; adjust these so that they reflect our current
1215 estimate for this pass. */
1216 if (flags.base_after_vec)
1217 rel_addr += insn_current_address - insn_last_address;
1218 if (flags.min_after_vec)
1219 min_addr += insn_current_address - insn_last_address;
1220 if (flags.max_after_vec)
1221 max_addr += insn_current_address - insn_last_address;
1222 /* We want to know the worst case, i.e. lowest possible value
1223 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1224 its offset is positive, and we have to be wary of code shrink;
1225 otherwise, it is negative, and we have to be vary of code
1226 size increase. */
1227 if (flags.min_after_base)
1229 /* If INSN is between REL_LAB and MIN_LAB, the size
1230 changes we are about to make can change the alignment
1231 within the observed offset, therefore we have to break
1232 it up into two parts that are independent. */
1233 if (! flags.base_after_vec && flags.min_after_vec)
1235 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1236 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1238 else
1239 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1241 else
1243 if (flags.base_after_vec && ! flags.min_after_vec)
1245 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1246 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1248 else
1249 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1251 /* Likewise, determine the highest lowest possible value
1252 for the offset of MAX_LAB. */
1253 if (flags.max_after_base)
1255 if (! flags.base_after_vec && flags.max_after_vec)
1257 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1258 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1260 else
1261 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1263 else
1265 if (flags.base_after_vec && ! flags.max_after_vec)
1267 max_addr += align_fuzz (max_lab, insn, 0, 0);
1268 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1270 else
1271 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1273 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1274 max_addr - rel_addr,
1275 body));
1276 if (JUMP_TABLES_IN_TEXT_SECTION
1277 || readonly_data_section == text_section)
1279 insn_lengths[uid]
1280 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1281 insn_current_address += insn_lengths[uid];
1282 if (insn_lengths[uid] != old_length)
1283 something_changed = 1;
1286 continue;
1288 #endif /* CASE_VECTOR_SHORTEN_MODE */
1290 if (! (varying_length[uid]))
1292 if (NONJUMP_INSN_P (insn)
1293 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1295 int i;
1297 body = PATTERN (insn);
1298 for (i = 0; i < XVECLEN (body, 0); i++)
1300 rtx inner_insn = XVECEXP (body, 0, i);
1301 int inner_uid = INSN_UID (inner_insn);
1303 INSN_ADDRESSES (inner_uid) = insn_current_address;
1305 insn_current_address += insn_lengths[inner_uid];
1308 else
1309 insn_current_address += insn_lengths[uid];
1311 continue;
1314 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1316 int i;
1318 body = PATTERN (insn);
1319 new_length = 0;
1320 for (i = 0; i < XVECLEN (body, 0); i++)
1322 rtx inner_insn = XVECEXP (body, 0, i);
1323 int inner_uid = INSN_UID (inner_insn);
1324 int inner_length;
1326 INSN_ADDRESSES (inner_uid) = insn_current_address;
1328 /* insn_current_length returns 0 for insns with a
1329 non-varying length. */
1330 if (! varying_length[inner_uid])
1331 inner_length = insn_lengths[inner_uid];
1332 else
1333 inner_length = insn_current_length (inner_insn);
1335 if (inner_length != insn_lengths[inner_uid])
1337 insn_lengths[inner_uid] = inner_length;
1338 something_changed = 1;
1340 insn_current_address += insn_lengths[inner_uid];
1341 new_length += inner_length;
1344 else
1346 new_length = insn_current_length (insn);
1347 insn_current_address += new_length;
1350 #ifdef ADJUST_INSN_LENGTH
1351 /* If needed, do any adjustment. */
1352 tmp_length = new_length;
1353 ADJUST_INSN_LENGTH (insn, new_length);
1354 insn_current_address += (new_length - tmp_length);
1355 #endif
1357 if (new_length != insn_lengths[uid])
1359 insn_lengths[uid] = new_length;
1360 something_changed = 1;
1363 /* For a non-optimizing compile, do only a single pass. */
1364 if (!optimize)
1365 break;
1368 free (varying_length);
1370 #endif /* HAVE_ATTR_length */
1373 #ifdef HAVE_ATTR_length
1374 /* Given the body of an INSN known to be generated by an ASM statement, return
1375 the number of machine instructions likely to be generated for this insn.
1376 This is used to compute its length. */
1378 static int
1379 asm_insn_count (rtx body)
1381 const char *template;
1382 int count = 1;
1384 if (GET_CODE (body) == ASM_INPUT)
1385 template = XSTR (body, 0);
1386 else
1387 template = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1389 for (; *template; template++)
1390 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template, template)
1391 || *template == '\n')
1392 count++;
1394 return count;
1396 #endif
1398 /* ??? This is probably the wrong place for these. */
1399 /* Structure recording the mapping from source file and directory
1400 names at compile time to those to be embedded in debug
1401 information. */
1402 typedef struct debug_prefix_map
1404 const char *old_prefix;
1405 const char *new_prefix;
1406 size_t old_len;
1407 size_t new_len;
1408 struct debug_prefix_map *next;
1409 } debug_prefix_map;
1411 /* Linked list of such structures. */
1412 debug_prefix_map *debug_prefix_maps;
1415 /* Record a debug file prefix mapping. ARG is the argument to
1416 -fdebug-prefix-map and must be of the form OLD=NEW. */
1418 void
1419 add_debug_prefix_map (const char *arg)
1421 debug_prefix_map *map;
1422 const char *p;
1424 p = strchr (arg, '=');
1425 if (!p)
1427 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1428 return;
1430 map = XNEW (debug_prefix_map);
1431 map->old_prefix = ggc_alloc_string (arg, p - arg);
1432 map->old_len = p - arg;
1433 p++;
1434 map->new_prefix = ggc_strdup (p);
1435 map->new_len = strlen (p);
1436 map->next = debug_prefix_maps;
1437 debug_prefix_maps = map;
1440 /* Perform user-specified mapping of debug filename prefixes. Return
1441 the new name corresponding to FILENAME. */
1443 const char *
1444 remap_debug_filename (const char *filename)
1446 debug_prefix_map *map;
1447 char *s;
1448 const char *name;
1449 size_t name_len;
1451 for (map = debug_prefix_maps; map; map = map->next)
1452 if (strncmp (filename, map->old_prefix, map->old_len) == 0)
1453 break;
1454 if (!map)
1455 return filename;
1456 name = filename + map->old_len;
1457 name_len = strlen (name) + 1;
1458 s = (char *) alloca (name_len + map->new_len);
1459 memcpy (s, map->new_prefix, map->new_len);
1460 memcpy (s + map->new_len, name, name_len);
1461 return ggc_strdup (s);
1464 /* Output assembler code for the start of a function,
1465 and initialize some of the variables in this file
1466 for the new function. The label for the function and associated
1467 assembler pseudo-ops have already been output in `assemble_start_function'.
1469 FIRST is the first insn of the rtl for the function being compiled.
1470 FILE is the file to write assembler code to.
1471 OPTIMIZE is nonzero if we should eliminate redundant
1472 test and compare insns. */
1474 void
1475 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1476 int optimize ATTRIBUTE_UNUSED)
1478 block_depth = 0;
1480 this_is_asm_operands = 0;
1482 last_filename = locator_file (prologue_locator);
1483 last_linenum = locator_line (prologue_locator);
1485 high_block_linenum = high_function_linenum = last_linenum;
1487 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1489 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1490 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1491 dwarf2out_begin_prologue (0, NULL);
1492 #endif
1494 #ifdef LEAF_REG_REMAP
1495 if (current_function_uses_only_leaf_regs)
1496 leaf_renumber_regs (first);
1497 #endif
1499 /* The Sun386i and perhaps other machines don't work right
1500 if the profiling code comes after the prologue. */
1501 #ifdef PROFILE_BEFORE_PROLOGUE
1502 if (crtl->profile)
1503 profile_function (file);
1504 #endif /* PROFILE_BEFORE_PROLOGUE */
1506 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1507 if (dwarf2out_do_frame ())
1508 dwarf2out_frame_debug (NULL_RTX, false);
1509 #endif
1511 /* If debugging, assign block numbers to all of the blocks in this
1512 function. */
1513 if (write_symbols)
1515 reemit_insn_block_notes ();
1516 number_blocks (current_function_decl);
1517 /* We never actually put out begin/end notes for the top-level
1518 block in the function. But, conceptually, that block is
1519 always needed. */
1520 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1523 if (warn_frame_larger_than
1524 && get_frame_size () > frame_larger_than_size)
1526 /* Issue a warning */
1527 warning (OPT_Wframe_larger_than_,
1528 "the frame size of %wd bytes is larger than %wd bytes",
1529 get_frame_size (), frame_larger_than_size);
1532 /* First output the function prologue: code to set up the stack frame. */
1533 targetm.asm_out.function_prologue (file, get_frame_size ());
1535 /* If the machine represents the prologue as RTL, the profiling code must
1536 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1537 #ifdef HAVE_prologue
1538 if (! HAVE_prologue)
1539 #endif
1540 profile_after_prologue (file);
1543 static void
1544 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1546 #ifndef PROFILE_BEFORE_PROLOGUE
1547 if (crtl->profile)
1548 profile_function (file);
1549 #endif /* not PROFILE_BEFORE_PROLOGUE */
1552 static void
1553 profile_function (FILE *file ATTRIBUTE_UNUSED)
1555 #ifndef NO_PROFILE_COUNTERS
1556 # define NO_PROFILE_COUNTERS 0
1557 #endif
1558 #if defined(ASM_OUTPUT_REG_PUSH)
1559 int sval = cfun->returns_struct;
1560 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1561 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1562 int cxt = cfun->static_chain_decl != NULL;
1563 #endif
1564 #endif /* ASM_OUTPUT_REG_PUSH */
1566 if (! NO_PROFILE_COUNTERS)
1568 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1569 switch_to_section (data_section);
1570 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1571 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1572 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1575 switch_to_section (current_function_section ());
1577 #if defined(ASM_OUTPUT_REG_PUSH)
1578 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1580 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1582 #endif
1584 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1585 if (cxt)
1586 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1587 #else
1588 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1589 if (cxt)
1591 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1593 #endif
1594 #endif
1596 FUNCTION_PROFILER (file, current_function_funcdef_no);
1598 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1599 if (cxt)
1600 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1601 #else
1602 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1603 if (cxt)
1605 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1607 #endif
1608 #endif
1610 #if defined(ASM_OUTPUT_REG_PUSH)
1611 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1613 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1615 #endif
1618 /* Output assembler code for the end of a function.
1619 For clarity, args are same as those of `final_start_function'
1620 even though not all of them are needed. */
1622 void
1623 final_end_function (void)
1625 app_disable ();
1627 (*debug_hooks->end_function) (high_function_linenum);
1629 /* Finally, output the function epilogue:
1630 code to restore the stack frame and return to the caller. */
1631 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1633 /* And debug output. */
1634 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1636 #if defined (DWARF2_UNWIND_INFO)
1637 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1638 && dwarf2out_do_frame ())
1639 dwarf2out_end_epilogue (last_linenum, last_filename);
1640 #endif
1643 /* Output assembler code for some insns: all or part of a function.
1644 For description of args, see `final_start_function', above. */
1646 void
1647 final (rtx first, FILE *file, int optimize)
1649 rtx insn;
1650 int max_uid = 0;
1651 int seen = 0;
1653 last_ignored_compare = 0;
1655 for (insn = first; insn; insn = NEXT_INSN (insn))
1657 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1658 max_uid = INSN_UID (insn);
1659 #ifdef HAVE_cc0
1660 /* If CC tracking across branches is enabled, record the insn which
1661 jumps to each branch only reached from one place. */
1662 if (optimize && JUMP_P (insn))
1664 rtx lab = JUMP_LABEL (insn);
1665 if (lab && LABEL_NUSES (lab) == 1)
1667 LABEL_REFS (lab) = insn;
1670 #endif
1673 init_recog ();
1675 CC_STATUS_INIT;
1677 /* Output the insns. */
1678 for (insn = first; insn;)
1680 #ifdef HAVE_ATTR_length
1681 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1683 /* This can be triggered by bugs elsewhere in the compiler if
1684 new insns are created after init_insn_lengths is called. */
1685 gcc_assert (NOTE_P (insn));
1686 insn_current_address = -1;
1688 else
1689 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1690 #endif /* HAVE_ATTR_length */
1692 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1696 const char *
1697 get_insn_template (int code, rtx insn)
1699 switch (insn_data[code].output_format)
1701 case INSN_OUTPUT_FORMAT_SINGLE:
1702 return insn_data[code].output.single;
1703 case INSN_OUTPUT_FORMAT_MULTI:
1704 return insn_data[code].output.multi[which_alternative];
1705 case INSN_OUTPUT_FORMAT_FUNCTION:
1706 gcc_assert (insn);
1707 return (*insn_data[code].output.function) (recog_data.operand, insn);
1709 default:
1710 gcc_unreachable ();
1714 /* Emit the appropriate declaration for an alternate-entry-point
1715 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1716 LABEL_KIND != LABEL_NORMAL.
1718 The case fall-through in this function is intentional. */
1719 static void
1720 output_alternate_entry_point (FILE *file, rtx insn)
1722 const char *name = LABEL_NAME (insn);
1724 switch (LABEL_KIND (insn))
1726 case LABEL_WEAK_ENTRY:
1727 #ifdef ASM_WEAKEN_LABEL
1728 ASM_WEAKEN_LABEL (file, name);
1729 #endif
1730 case LABEL_GLOBAL_ENTRY:
1731 targetm.asm_out.globalize_label (file, name);
1732 case LABEL_STATIC_ENTRY:
1733 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1734 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1735 #endif
1736 ASM_OUTPUT_LABEL (file, name);
1737 break;
1739 case LABEL_NORMAL:
1740 default:
1741 gcc_unreachable ();
1745 /* The final scan for one insn, INSN.
1746 Args are same as in `final', except that INSN
1747 is the insn being scanned.
1748 Value returned is the next insn to be scanned.
1750 NOPEEPHOLES is the flag to disallow peephole processing (currently
1751 used for within delayed branch sequence output).
1753 SEEN is used to track the end of the prologue, for emitting
1754 debug information. We force the emission of a line note after
1755 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1756 at the beginning of the second basic block, whichever comes
1757 first. */
1760 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1761 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1763 #ifdef HAVE_cc0
1764 rtx set;
1765 #endif
1766 rtx next;
1768 insn_counter++;
1770 /* Ignore deleted insns. These can occur when we split insns (due to a
1771 template of "#") while not optimizing. */
1772 if (INSN_DELETED_P (insn))
1773 return NEXT_INSN (insn);
1775 switch (GET_CODE (insn))
1777 case NOTE:
1778 switch (NOTE_KIND (insn))
1780 case NOTE_INSN_DELETED:
1781 break;
1783 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1784 in_cold_section_p = !in_cold_section_p;
1785 #ifdef DWARF2_UNWIND_INFO
1786 if (dwarf2out_do_frame ())
1787 dwarf2out_switch_text_section ();
1788 else
1789 #endif
1790 (*debug_hooks->switch_text_section) ();
1792 switch_to_section (current_function_section ());
1793 break;
1795 case NOTE_INSN_BASIC_BLOCK:
1796 #ifdef TARGET_UNWIND_INFO
1797 targetm.asm_out.unwind_emit (asm_out_file, insn);
1798 #endif
1800 if (flag_debug_asm)
1801 fprintf (asm_out_file, "\t%s basic block %d\n",
1802 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1804 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1806 *seen |= SEEN_EMITTED;
1807 force_source_line = true;
1809 else
1810 *seen |= SEEN_BB;
1812 break;
1814 case NOTE_INSN_EH_REGION_BEG:
1815 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1816 NOTE_EH_HANDLER (insn));
1817 break;
1819 case NOTE_INSN_EH_REGION_END:
1820 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1821 NOTE_EH_HANDLER (insn));
1822 break;
1824 case NOTE_INSN_PROLOGUE_END:
1825 targetm.asm_out.function_end_prologue (file);
1826 profile_after_prologue (file);
1828 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1830 *seen |= SEEN_EMITTED;
1831 force_source_line = true;
1833 else
1834 *seen |= SEEN_NOTE;
1836 break;
1838 case NOTE_INSN_EPILOGUE_BEG:
1839 targetm.asm_out.function_begin_epilogue (file);
1840 break;
1842 case NOTE_INSN_FUNCTION_BEG:
1843 app_disable ();
1844 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1846 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1848 *seen |= SEEN_EMITTED;
1849 force_source_line = true;
1851 else
1852 *seen |= SEEN_NOTE;
1854 break;
1856 case NOTE_INSN_BLOCK_BEG:
1857 if (debug_info_level == DINFO_LEVEL_NORMAL
1858 || debug_info_level == DINFO_LEVEL_VERBOSE
1859 || write_symbols == DWARF2_DEBUG
1860 || write_symbols == VMS_AND_DWARF2_DEBUG
1861 || write_symbols == VMS_DEBUG)
1863 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1865 app_disable ();
1866 ++block_depth;
1867 high_block_linenum = last_linenum;
1869 /* Output debugging info about the symbol-block beginning. */
1870 (*debug_hooks->begin_block) (last_linenum, n);
1872 /* Mark this block as output. */
1873 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1875 if (write_symbols == DBX_DEBUG
1876 || write_symbols == SDB_DEBUG)
1878 location_t *locus_ptr
1879 = block_nonartificial_location (NOTE_BLOCK (insn));
1881 if (locus_ptr != NULL)
1883 override_filename = LOCATION_FILE (*locus_ptr);
1884 override_linenum = LOCATION_LINE (*locus_ptr);
1887 break;
1889 case NOTE_INSN_BLOCK_END:
1890 if (debug_info_level == DINFO_LEVEL_NORMAL
1891 || debug_info_level == DINFO_LEVEL_VERBOSE
1892 || write_symbols == DWARF2_DEBUG
1893 || write_symbols == VMS_AND_DWARF2_DEBUG
1894 || write_symbols == VMS_DEBUG)
1896 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1898 app_disable ();
1900 /* End of a symbol-block. */
1901 --block_depth;
1902 gcc_assert (block_depth >= 0);
1904 (*debug_hooks->end_block) (high_block_linenum, n);
1906 if (write_symbols == DBX_DEBUG
1907 || write_symbols == SDB_DEBUG)
1909 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
1910 location_t *locus_ptr
1911 = block_nonartificial_location (outer_block);
1913 if (locus_ptr != NULL)
1915 override_filename = LOCATION_FILE (*locus_ptr);
1916 override_linenum = LOCATION_LINE (*locus_ptr);
1918 else
1920 override_filename = NULL;
1921 override_linenum = 0;
1924 break;
1926 case NOTE_INSN_DELETED_LABEL:
1927 /* Emit the label. We may have deleted the CODE_LABEL because
1928 the label could be proved to be unreachable, though still
1929 referenced (in the form of having its address taken. */
1930 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1931 break;
1933 case NOTE_INSN_VAR_LOCATION:
1934 (*debug_hooks->var_location) (insn);
1935 break;
1937 default:
1938 gcc_unreachable ();
1939 break;
1941 break;
1943 case BARRIER:
1944 #if defined (DWARF2_UNWIND_INFO)
1945 if (dwarf2out_do_frame ())
1946 dwarf2out_frame_debug (insn, false);
1947 #endif
1948 break;
1950 case CODE_LABEL:
1951 /* The target port might emit labels in the output function for
1952 some insn, e.g. sh.c output_branchy_insn. */
1953 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1955 int align = LABEL_TO_ALIGNMENT (insn);
1956 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1957 int max_skip = LABEL_TO_MAX_SKIP (insn);
1958 #endif
1960 if (align && NEXT_INSN (insn))
1962 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1963 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1964 #else
1965 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1966 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1967 #else
1968 ASM_OUTPUT_ALIGN (file, align);
1969 #endif
1970 #endif
1973 #ifdef HAVE_cc0
1974 CC_STATUS_INIT;
1975 #endif
1977 if (LABEL_NAME (insn))
1978 (*debug_hooks->label) (insn);
1980 if (app_on)
1982 fputs (ASM_APP_OFF, file);
1983 app_on = 0;
1986 next = next_nonnote_insn (insn);
1987 if (next != 0 && JUMP_P (next))
1989 rtx nextbody = PATTERN (next);
1991 /* If this label is followed by a jump-table,
1992 make sure we put the label in the read-only section. Also
1993 possibly write the label and jump table together. */
1995 if (GET_CODE (nextbody) == ADDR_VEC
1996 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1998 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1999 /* In this case, the case vector is being moved by the
2000 target, so don't output the label at all. Leave that
2001 to the back end macros. */
2002 #else
2003 if (! JUMP_TABLES_IN_TEXT_SECTION)
2005 int log_align;
2007 switch_to_section (targetm.asm_out.function_rodata_section
2008 (current_function_decl));
2010 #ifdef ADDR_VEC_ALIGN
2011 log_align = ADDR_VEC_ALIGN (next);
2012 #else
2013 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2014 #endif
2015 ASM_OUTPUT_ALIGN (file, log_align);
2017 else
2018 switch_to_section (current_function_section ());
2020 #ifdef ASM_OUTPUT_CASE_LABEL
2021 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2022 next);
2023 #else
2024 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2025 #endif
2026 #endif
2027 break;
2030 if (LABEL_ALT_ENTRY_P (insn))
2031 output_alternate_entry_point (file, insn);
2032 else
2033 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2034 break;
2036 default:
2038 rtx body = PATTERN (insn);
2039 int insn_code_number;
2040 const char *template;
2042 #ifdef HAVE_conditional_execution
2043 /* Reset this early so it is correct for ASM statements. */
2044 current_insn_predicate = NULL_RTX;
2045 #endif
2046 /* An INSN, JUMP_INSN or CALL_INSN.
2047 First check for special kinds that recog doesn't recognize. */
2049 if (GET_CODE (body) == USE /* These are just declarations. */
2050 || GET_CODE (body) == CLOBBER)
2051 break;
2053 #ifdef HAVE_cc0
2055 /* If there is a REG_CC_SETTER note on this insn, it means that
2056 the setting of the condition code was done in the delay slot
2057 of the insn that branched here. So recover the cc status
2058 from the insn that set it. */
2060 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2061 if (note)
2063 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2064 cc_prev_status = cc_status;
2067 #endif
2069 /* Detect insns that are really jump-tables
2070 and output them as such. */
2072 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2074 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2075 int vlen, idx;
2076 #endif
2078 if (! JUMP_TABLES_IN_TEXT_SECTION)
2079 switch_to_section (targetm.asm_out.function_rodata_section
2080 (current_function_decl));
2081 else
2082 switch_to_section (current_function_section ());
2084 if (app_on)
2086 fputs (ASM_APP_OFF, file);
2087 app_on = 0;
2090 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2091 if (GET_CODE (body) == ADDR_VEC)
2093 #ifdef ASM_OUTPUT_ADDR_VEC
2094 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2095 #else
2096 gcc_unreachable ();
2097 #endif
2099 else
2101 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2102 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2103 #else
2104 gcc_unreachable ();
2105 #endif
2107 #else
2108 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2109 for (idx = 0; idx < vlen; idx++)
2111 if (GET_CODE (body) == ADDR_VEC)
2113 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2114 ASM_OUTPUT_ADDR_VEC_ELT
2115 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2116 #else
2117 gcc_unreachable ();
2118 #endif
2120 else
2122 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2123 ASM_OUTPUT_ADDR_DIFF_ELT
2124 (file,
2125 body,
2126 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2127 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2128 #else
2129 gcc_unreachable ();
2130 #endif
2133 #ifdef ASM_OUTPUT_CASE_END
2134 ASM_OUTPUT_CASE_END (file,
2135 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2136 insn);
2137 #endif
2138 #endif
2140 switch_to_section (current_function_section ());
2142 break;
2144 /* Output this line note if it is the first or the last line
2145 note in a row. */
2146 if (notice_source_line (insn))
2148 (*debug_hooks->source_line) (last_linenum, last_filename);
2151 if (GET_CODE (body) == ASM_INPUT)
2153 const char *string = XSTR (body, 0);
2155 /* There's no telling what that did to the condition codes. */
2156 CC_STATUS_INIT;
2158 if (string[0])
2160 expanded_location loc;
2162 if (! app_on)
2164 fputs (ASM_APP_ON, file);
2165 app_on = 1;
2167 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2168 if (*loc.file && loc.line)
2169 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2170 ASM_COMMENT_START, loc.line, loc.file);
2171 fprintf (asm_out_file, "\t%s\n", string);
2172 #if HAVE_AS_LINE_ZERO
2173 if (*loc.file && loc.line)
2174 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2175 #endif
2177 break;
2180 /* Detect `asm' construct with operands. */
2181 if (asm_noperands (body) >= 0)
2183 unsigned int noperands = asm_noperands (body);
2184 rtx *ops = alloca (noperands * sizeof (rtx));
2185 const char *string;
2186 location_t loc;
2187 expanded_location expanded;
2189 /* There's no telling what that did to the condition codes. */
2190 CC_STATUS_INIT;
2192 /* Get out the operand values. */
2193 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2194 /* Inhibit dying on what would otherwise be compiler bugs. */
2195 insn_noperands = noperands;
2196 this_is_asm_operands = insn;
2197 expanded = expand_location (loc);
2199 #ifdef FINAL_PRESCAN_INSN
2200 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2201 #endif
2203 /* Output the insn using them. */
2204 if (string[0])
2206 if (! app_on)
2208 fputs (ASM_APP_ON, file);
2209 app_on = 1;
2211 if (expanded.file && expanded.line)
2212 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2213 ASM_COMMENT_START, expanded.line, expanded.file);
2214 output_asm_insn (string, ops);
2215 #if HAVE_AS_LINE_ZERO
2216 if (expanded.file && expanded.line)
2217 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2218 #endif
2221 this_is_asm_operands = 0;
2222 break;
2225 if (app_on)
2227 fputs (ASM_APP_OFF, file);
2228 app_on = 0;
2231 if (GET_CODE (body) == SEQUENCE)
2233 /* A delayed-branch sequence */
2234 int i;
2236 final_sequence = body;
2238 /* Record the delay slots' frame information before the branch.
2239 This is needed for delayed calls: see execute_cfa_program(). */
2240 #if defined (DWARF2_UNWIND_INFO)
2241 if (dwarf2out_do_frame ())
2242 for (i = 1; i < XVECLEN (body, 0); i++)
2243 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2244 #endif
2246 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2247 force the restoration of a comparison that was previously
2248 thought unnecessary. If that happens, cancel this sequence
2249 and cause that insn to be restored. */
2251 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2252 if (next != XVECEXP (body, 0, 1))
2254 final_sequence = 0;
2255 return next;
2258 for (i = 1; i < XVECLEN (body, 0); i++)
2260 rtx insn = XVECEXP (body, 0, i);
2261 rtx next = NEXT_INSN (insn);
2262 /* We loop in case any instruction in a delay slot gets
2263 split. */
2265 insn = final_scan_insn (insn, file, 0, 1, seen);
2266 while (insn != next);
2268 #ifdef DBR_OUTPUT_SEQEND
2269 DBR_OUTPUT_SEQEND (file);
2270 #endif
2271 final_sequence = 0;
2273 /* If the insn requiring the delay slot was a CALL_INSN, the
2274 insns in the delay slot are actually executed before the
2275 called function. Hence we don't preserve any CC-setting
2276 actions in these insns and the CC must be marked as being
2277 clobbered by the function. */
2278 if (CALL_P (XVECEXP (body, 0, 0)))
2280 CC_STATUS_INIT;
2282 break;
2285 /* We have a real machine instruction as rtl. */
2287 body = PATTERN (insn);
2289 #ifdef HAVE_cc0
2290 set = single_set (insn);
2292 /* Check for redundant test and compare instructions
2293 (when the condition codes are already set up as desired).
2294 This is done only when optimizing; if not optimizing,
2295 it should be possible for the user to alter a variable
2296 with the debugger in between statements
2297 and the next statement should reexamine the variable
2298 to compute the condition codes. */
2300 if (optimize)
2302 if (set
2303 && GET_CODE (SET_DEST (set)) == CC0
2304 && insn != last_ignored_compare)
2306 if (GET_CODE (SET_SRC (set)) == SUBREG)
2307 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2308 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2310 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2311 XEXP (SET_SRC (set), 0)
2312 = alter_subreg (&XEXP (SET_SRC (set), 0));
2313 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2314 XEXP (SET_SRC (set), 1)
2315 = alter_subreg (&XEXP (SET_SRC (set), 1));
2317 if ((cc_status.value1 != 0
2318 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2319 || (cc_status.value2 != 0
2320 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2322 /* Don't delete insn if it has an addressing side-effect. */
2323 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2324 /* or if anything in it is volatile. */
2325 && ! volatile_refs_p (PATTERN (insn)))
2327 /* We don't really delete the insn; just ignore it. */
2328 last_ignored_compare = insn;
2329 break;
2334 #endif
2336 #ifdef HAVE_cc0
2337 /* If this is a conditional branch, maybe modify it
2338 if the cc's are in a nonstandard state
2339 so that it accomplishes the same thing that it would
2340 do straightforwardly if the cc's were set up normally. */
2342 if (cc_status.flags != 0
2343 && JUMP_P (insn)
2344 && GET_CODE (body) == SET
2345 && SET_DEST (body) == pc_rtx
2346 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2347 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2348 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2350 /* This function may alter the contents of its argument
2351 and clear some of the cc_status.flags bits.
2352 It may also return 1 meaning condition now always true
2353 or -1 meaning condition now always false
2354 or 2 meaning condition nontrivial but altered. */
2355 int result = alter_cond (XEXP (SET_SRC (body), 0));
2356 /* If condition now has fixed value, replace the IF_THEN_ELSE
2357 with its then-operand or its else-operand. */
2358 if (result == 1)
2359 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2360 if (result == -1)
2361 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2363 /* The jump is now either unconditional or a no-op.
2364 If it has become a no-op, don't try to output it.
2365 (It would not be recognized.) */
2366 if (SET_SRC (body) == pc_rtx)
2368 delete_insn (insn);
2369 break;
2371 else if (GET_CODE (SET_SRC (body)) == RETURN)
2372 /* Replace (set (pc) (return)) with (return). */
2373 PATTERN (insn) = body = SET_SRC (body);
2375 /* Rerecognize the instruction if it has changed. */
2376 if (result != 0)
2377 INSN_CODE (insn) = -1;
2380 /* If this is a conditional trap, maybe modify it if the cc's
2381 are in a nonstandard state so that it accomplishes the same
2382 thing that it would do straightforwardly if the cc's were
2383 set up normally. */
2384 if (cc_status.flags != 0
2385 && NONJUMP_INSN_P (insn)
2386 && GET_CODE (body) == TRAP_IF
2387 && COMPARISON_P (TRAP_CONDITION (body))
2388 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2390 /* This function may alter the contents of its argument
2391 and clear some of the cc_status.flags bits.
2392 It may also return 1 meaning condition now always true
2393 or -1 meaning condition now always false
2394 or 2 meaning condition nontrivial but altered. */
2395 int result = alter_cond (TRAP_CONDITION (body));
2397 /* If TRAP_CONDITION has become always false, delete the
2398 instruction. */
2399 if (result == -1)
2401 delete_insn (insn);
2402 break;
2405 /* If TRAP_CONDITION has become always true, replace
2406 TRAP_CONDITION with const_true_rtx. */
2407 if (result == 1)
2408 TRAP_CONDITION (body) = const_true_rtx;
2410 /* Rerecognize the instruction if it has changed. */
2411 if (result != 0)
2412 INSN_CODE (insn) = -1;
2415 /* Make same adjustments to instructions that examine the
2416 condition codes without jumping and instructions that
2417 handle conditional moves (if this machine has either one). */
2419 if (cc_status.flags != 0
2420 && set != 0)
2422 rtx cond_rtx, then_rtx, else_rtx;
2424 if (!JUMP_P (insn)
2425 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2427 cond_rtx = XEXP (SET_SRC (set), 0);
2428 then_rtx = XEXP (SET_SRC (set), 1);
2429 else_rtx = XEXP (SET_SRC (set), 2);
2431 else
2433 cond_rtx = SET_SRC (set);
2434 then_rtx = const_true_rtx;
2435 else_rtx = const0_rtx;
2438 switch (GET_CODE (cond_rtx))
2440 case GTU:
2441 case GT:
2442 case LTU:
2443 case LT:
2444 case GEU:
2445 case GE:
2446 case LEU:
2447 case LE:
2448 case EQ:
2449 case NE:
2451 int result;
2452 if (XEXP (cond_rtx, 0) != cc0_rtx)
2453 break;
2454 result = alter_cond (cond_rtx);
2455 if (result == 1)
2456 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2457 else if (result == -1)
2458 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2459 else if (result == 2)
2460 INSN_CODE (insn) = -1;
2461 if (SET_DEST (set) == SET_SRC (set))
2462 delete_insn (insn);
2464 break;
2466 default:
2467 break;
2471 #endif
2473 #ifdef HAVE_peephole
2474 /* Do machine-specific peephole optimizations if desired. */
2476 if (optimize && !flag_no_peephole && !nopeepholes)
2478 rtx next = peephole (insn);
2479 /* When peepholing, if there were notes within the peephole,
2480 emit them before the peephole. */
2481 if (next != 0 && next != NEXT_INSN (insn))
2483 rtx note, prev = PREV_INSN (insn);
2485 for (note = NEXT_INSN (insn); note != next;
2486 note = NEXT_INSN (note))
2487 final_scan_insn (note, file, optimize, nopeepholes, seen);
2489 /* Put the notes in the proper position for a later
2490 rescan. For example, the SH target can do this
2491 when generating a far jump in a delayed branch
2492 sequence. */
2493 note = NEXT_INSN (insn);
2494 PREV_INSN (note) = prev;
2495 NEXT_INSN (prev) = note;
2496 NEXT_INSN (PREV_INSN (next)) = insn;
2497 PREV_INSN (insn) = PREV_INSN (next);
2498 NEXT_INSN (insn) = next;
2499 PREV_INSN (next) = insn;
2502 /* PEEPHOLE might have changed this. */
2503 body = PATTERN (insn);
2505 #endif
2507 /* Try to recognize the instruction.
2508 If successful, verify that the operands satisfy the
2509 constraints for the instruction. Crash if they don't,
2510 since `reload' should have changed them so that they do. */
2512 insn_code_number = recog_memoized (insn);
2513 cleanup_subreg_operands (insn);
2515 /* Dump the insn in the assembly for debugging. */
2516 if (flag_dump_rtl_in_asm)
2518 print_rtx_head = ASM_COMMENT_START;
2519 print_rtl_single (asm_out_file, insn);
2520 print_rtx_head = "";
2523 if (! constrain_operands_cached (1))
2524 fatal_insn_not_found (insn);
2526 /* Some target machines need to prescan each insn before
2527 it is output. */
2529 #ifdef FINAL_PRESCAN_INSN
2530 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2531 #endif
2533 #ifdef HAVE_conditional_execution
2534 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2535 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2536 #endif
2538 #ifdef HAVE_cc0
2539 cc_prev_status = cc_status;
2541 /* Update `cc_status' for this instruction.
2542 The instruction's output routine may change it further.
2543 If the output routine for a jump insn needs to depend
2544 on the cc status, it should look at cc_prev_status. */
2546 NOTICE_UPDATE_CC (body, insn);
2547 #endif
2549 current_output_insn = debug_insn = insn;
2551 #if defined (DWARF2_UNWIND_INFO)
2552 if (CALL_P (insn) && dwarf2out_do_frame ())
2553 dwarf2out_frame_debug (insn, false);
2554 #endif
2556 /* Find the proper template for this insn. */
2557 template = get_insn_template (insn_code_number, insn);
2559 /* If the C code returns 0, it means that it is a jump insn
2560 which follows a deleted test insn, and that test insn
2561 needs to be reinserted. */
2562 if (template == 0)
2564 rtx prev;
2566 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2568 /* We have already processed the notes between the setter and
2569 the user. Make sure we don't process them again, this is
2570 particularly important if one of the notes is a block
2571 scope note or an EH note. */
2572 for (prev = insn;
2573 prev != last_ignored_compare;
2574 prev = PREV_INSN (prev))
2576 if (NOTE_P (prev))
2577 delete_insn (prev); /* Use delete_note. */
2580 return prev;
2583 /* If the template is the string "#", it means that this insn must
2584 be split. */
2585 if (template[0] == '#' && template[1] == '\0')
2587 rtx new = try_split (body, insn, 0);
2589 /* If we didn't split the insn, go away. */
2590 if (new == insn && PATTERN (new) == body)
2591 fatal_insn ("could not split insn", insn);
2593 #ifdef HAVE_ATTR_length
2594 /* This instruction should have been split in shorten_branches,
2595 to ensure that we would have valid length info for the
2596 splitees. */
2597 gcc_unreachable ();
2598 #endif
2600 return new;
2603 #ifdef TARGET_UNWIND_INFO
2604 /* ??? This will put the directives in the wrong place if
2605 get_insn_template outputs assembly directly. However calling it
2606 before get_insn_template breaks if the insns is split. */
2607 targetm.asm_out.unwind_emit (asm_out_file, insn);
2608 #endif
2610 /* Output assembler code from the template. */
2611 output_asm_insn (template, recog_data.operand);
2613 /* If necessary, report the effect that the instruction has on
2614 the unwind info. We've already done this for delay slots
2615 and call instructions. */
2616 #if defined (DWARF2_UNWIND_INFO)
2617 if (final_sequence == 0
2618 #if !defined (HAVE_prologue)
2619 && !ACCUMULATE_OUTGOING_ARGS
2620 #endif
2621 && dwarf2out_do_frame ())
2622 dwarf2out_frame_debug (insn, true);
2623 #endif
2625 current_output_insn = debug_insn = 0;
2628 return NEXT_INSN (insn);
2631 /* Return whether a source line note needs to be emitted before INSN. */
2633 static bool
2634 notice_source_line (rtx insn)
2636 const char *filename;
2637 int linenum;
2639 if (override_filename)
2641 filename = override_filename;
2642 linenum = override_linenum;
2644 else
2646 filename = insn_file (insn);
2647 linenum = insn_line (insn);
2650 if (filename
2651 && (force_source_line
2652 || filename != last_filename
2653 || last_linenum != linenum))
2655 force_source_line = false;
2656 last_filename = filename;
2657 last_linenum = linenum;
2658 high_block_linenum = MAX (last_linenum, high_block_linenum);
2659 high_function_linenum = MAX (last_linenum, high_function_linenum);
2660 return true;
2662 return false;
2665 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2666 directly to the desired hard register. */
2668 void
2669 cleanup_subreg_operands (rtx insn)
2671 int i;
2672 bool changed = false;
2673 extract_insn_cached (insn);
2674 for (i = 0; i < recog_data.n_operands; i++)
2676 /* The following test cannot use recog_data.operand when testing
2677 for a SUBREG: the underlying object might have been changed
2678 already if we are inside a match_operator expression that
2679 matches the else clause. Instead we test the underlying
2680 expression directly. */
2681 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2683 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2684 changed = true;
2686 else if (GET_CODE (recog_data.operand[i]) == PLUS
2687 || GET_CODE (recog_data.operand[i]) == MULT
2688 || MEM_P (recog_data.operand[i]))
2689 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2692 for (i = 0; i < recog_data.n_dups; i++)
2694 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2696 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2697 changed = true;
2699 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2700 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2701 || MEM_P (*recog_data.dup_loc[i]))
2702 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2704 if (changed)
2705 df_insn_rescan (insn);
2708 /* If X is a SUBREG, replace it with a REG or a MEM,
2709 based on the thing it is a subreg of. */
2712 alter_subreg (rtx *xp)
2714 rtx x = *xp;
2715 rtx y = SUBREG_REG (x);
2717 /* simplify_subreg does not remove subreg from volatile references.
2718 We are required to. */
2719 if (MEM_P (y))
2721 int offset = SUBREG_BYTE (x);
2723 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2724 contains 0 instead of the proper offset. See simplify_subreg. */
2725 if (offset == 0
2726 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2728 int difference = GET_MODE_SIZE (GET_MODE (y))
2729 - GET_MODE_SIZE (GET_MODE (x));
2730 if (WORDS_BIG_ENDIAN)
2731 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2732 if (BYTES_BIG_ENDIAN)
2733 offset += difference % UNITS_PER_WORD;
2736 *xp = adjust_address (y, GET_MODE (x), offset);
2738 else
2740 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2741 SUBREG_BYTE (x));
2743 if (new != 0)
2744 *xp = new;
2745 else if (REG_P (y))
2747 /* Simplify_subreg can't handle some REG cases, but we have to. */
2748 unsigned int regno;
2749 HOST_WIDE_INT offset;
2751 regno = subreg_regno (x);
2752 if (subreg_lowpart_p (x))
2753 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
2754 else
2755 offset = SUBREG_BYTE (x);
2756 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
2760 return *xp;
2763 /* Do alter_subreg on all the SUBREGs contained in X. */
2765 static rtx
2766 walk_alter_subreg (rtx *xp, bool *changed)
2768 rtx x = *xp;
2769 switch (GET_CODE (x))
2771 case PLUS:
2772 case MULT:
2773 case AND:
2774 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2775 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
2776 break;
2778 case MEM:
2779 case ZERO_EXTEND:
2780 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2781 break;
2783 case SUBREG:
2784 *changed = true;
2785 return alter_subreg (xp);
2787 default:
2788 break;
2791 return *xp;
2794 #ifdef HAVE_cc0
2796 /* Given BODY, the body of a jump instruction, alter the jump condition
2797 as required by the bits that are set in cc_status.flags.
2798 Not all of the bits there can be handled at this level in all cases.
2800 The value is normally 0.
2801 1 means that the condition has become always true.
2802 -1 means that the condition has become always false.
2803 2 means that COND has been altered. */
2805 static int
2806 alter_cond (rtx cond)
2808 int value = 0;
2810 if (cc_status.flags & CC_REVERSED)
2812 value = 2;
2813 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2816 if (cc_status.flags & CC_INVERTED)
2818 value = 2;
2819 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2822 if (cc_status.flags & CC_NOT_POSITIVE)
2823 switch (GET_CODE (cond))
2825 case LE:
2826 case LEU:
2827 case GEU:
2828 /* Jump becomes unconditional. */
2829 return 1;
2831 case GT:
2832 case GTU:
2833 case LTU:
2834 /* Jump becomes no-op. */
2835 return -1;
2837 case GE:
2838 PUT_CODE (cond, EQ);
2839 value = 2;
2840 break;
2842 case LT:
2843 PUT_CODE (cond, NE);
2844 value = 2;
2845 break;
2847 default:
2848 break;
2851 if (cc_status.flags & CC_NOT_NEGATIVE)
2852 switch (GET_CODE (cond))
2854 case GE:
2855 case GEU:
2856 /* Jump becomes unconditional. */
2857 return 1;
2859 case LT:
2860 case LTU:
2861 /* Jump becomes no-op. */
2862 return -1;
2864 case LE:
2865 case LEU:
2866 PUT_CODE (cond, EQ);
2867 value = 2;
2868 break;
2870 case GT:
2871 case GTU:
2872 PUT_CODE (cond, NE);
2873 value = 2;
2874 break;
2876 default:
2877 break;
2880 if (cc_status.flags & CC_NO_OVERFLOW)
2881 switch (GET_CODE (cond))
2883 case GEU:
2884 /* Jump becomes unconditional. */
2885 return 1;
2887 case LEU:
2888 PUT_CODE (cond, EQ);
2889 value = 2;
2890 break;
2892 case GTU:
2893 PUT_CODE (cond, NE);
2894 value = 2;
2895 break;
2897 case LTU:
2898 /* Jump becomes no-op. */
2899 return -1;
2901 default:
2902 break;
2905 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2906 switch (GET_CODE (cond))
2908 default:
2909 gcc_unreachable ();
2911 case NE:
2912 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2913 value = 2;
2914 break;
2916 case EQ:
2917 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2918 value = 2;
2919 break;
2922 if (cc_status.flags & CC_NOT_SIGNED)
2923 /* The flags are valid if signed condition operators are converted
2924 to unsigned. */
2925 switch (GET_CODE (cond))
2927 case LE:
2928 PUT_CODE (cond, LEU);
2929 value = 2;
2930 break;
2932 case LT:
2933 PUT_CODE (cond, LTU);
2934 value = 2;
2935 break;
2937 case GT:
2938 PUT_CODE (cond, GTU);
2939 value = 2;
2940 break;
2942 case GE:
2943 PUT_CODE (cond, GEU);
2944 value = 2;
2945 break;
2947 default:
2948 break;
2951 return value;
2953 #endif
2955 /* Report inconsistency between the assembler template and the operands.
2956 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2958 void
2959 output_operand_lossage (const char *cmsgid, ...)
2961 char *fmt_string;
2962 char *new_message;
2963 const char *pfx_str;
2964 va_list ap;
2966 va_start (ap, cmsgid);
2968 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
2969 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
2970 vasprintf (&new_message, fmt_string, ap);
2972 if (this_is_asm_operands)
2973 error_for_asm (this_is_asm_operands, "%s", new_message);
2974 else
2975 internal_error ("%s", new_message);
2977 free (fmt_string);
2978 free (new_message);
2979 va_end (ap);
2982 /* Output of assembler code from a template, and its subroutines. */
2984 /* Annotate the assembly with a comment describing the pattern and
2985 alternative used. */
2987 static void
2988 output_asm_name (void)
2990 if (debug_insn)
2992 int num = INSN_CODE (debug_insn);
2993 fprintf (asm_out_file, "\t%s %d\t%s",
2994 ASM_COMMENT_START, INSN_UID (debug_insn),
2995 insn_data[num].name);
2996 if (insn_data[num].n_alternatives > 1)
2997 fprintf (asm_out_file, "/%d", which_alternative + 1);
2998 #ifdef HAVE_ATTR_length
2999 fprintf (asm_out_file, "\t[length = %d]",
3000 get_attr_length (debug_insn));
3001 #endif
3002 /* Clear this so only the first assembler insn
3003 of any rtl insn will get the special comment for -dp. */
3004 debug_insn = 0;
3008 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3009 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3010 corresponds to the address of the object and 0 if to the object. */
3012 static tree
3013 get_mem_expr_from_op (rtx op, int *paddressp)
3015 tree expr;
3016 int inner_addressp;
3018 *paddressp = 0;
3020 if (REG_P (op))
3021 return REG_EXPR (op);
3022 else if (!MEM_P (op))
3023 return 0;
3025 if (MEM_EXPR (op) != 0)
3026 return MEM_EXPR (op);
3028 /* Otherwise we have an address, so indicate it and look at the address. */
3029 *paddressp = 1;
3030 op = XEXP (op, 0);
3032 /* First check if we have a decl for the address, then look at the right side
3033 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3034 But don't allow the address to itself be indirect. */
3035 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3036 return expr;
3037 else if (GET_CODE (op) == PLUS
3038 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3039 return expr;
3041 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
3042 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3043 op = XEXP (op, 0);
3045 expr = get_mem_expr_from_op (op, &inner_addressp);
3046 return inner_addressp ? 0 : expr;
3049 /* Output operand names for assembler instructions. OPERANDS is the
3050 operand vector, OPORDER is the order to write the operands, and NOPS
3051 is the number of operands to write. */
3053 static void
3054 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3056 int wrote = 0;
3057 int i;
3059 for (i = 0; i < nops; i++)
3061 int addressp;
3062 rtx op = operands[oporder[i]];
3063 tree expr = get_mem_expr_from_op (op, &addressp);
3065 fprintf (asm_out_file, "%c%s",
3066 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3067 wrote = 1;
3068 if (expr)
3070 fprintf (asm_out_file, "%s",
3071 addressp ? "*" : "");
3072 print_mem_expr (asm_out_file, expr);
3073 wrote = 1;
3075 else if (REG_P (op) && ORIGINAL_REGNO (op)
3076 && ORIGINAL_REGNO (op) != REGNO (op))
3077 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3081 /* Output text from TEMPLATE to the assembler output file,
3082 obeying %-directions to substitute operands taken from
3083 the vector OPERANDS.
3085 %N (for N a digit) means print operand N in usual manner.
3086 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3087 and print the label name with no punctuation.
3088 %cN means require operand N to be a constant
3089 and print the constant expression with no punctuation.
3090 %aN means expect operand N to be a memory address
3091 (not a memory reference!) and print a reference
3092 to that address.
3093 %nN means expect operand N to be a constant
3094 and print a constant expression for minus the value
3095 of the operand, with no other punctuation. */
3097 void
3098 output_asm_insn (const char *template, rtx *operands)
3100 const char *p;
3101 int c;
3102 #ifdef ASSEMBLER_DIALECT
3103 int dialect = 0;
3104 #endif
3105 int oporder[MAX_RECOG_OPERANDS];
3106 char opoutput[MAX_RECOG_OPERANDS];
3107 int ops = 0;
3109 /* An insn may return a null string template
3110 in a case where no assembler code is needed. */
3111 if (*template == 0)
3112 return;
3114 memset (opoutput, 0, sizeof opoutput);
3115 p = template;
3116 putc ('\t', asm_out_file);
3118 #ifdef ASM_OUTPUT_OPCODE
3119 ASM_OUTPUT_OPCODE (asm_out_file, p);
3120 #endif
3122 while ((c = *p++))
3123 switch (c)
3125 case '\n':
3126 if (flag_verbose_asm)
3127 output_asm_operand_names (operands, oporder, ops);
3128 if (flag_print_asm_name)
3129 output_asm_name ();
3131 ops = 0;
3132 memset (opoutput, 0, sizeof opoutput);
3134 putc (c, asm_out_file);
3135 #ifdef ASM_OUTPUT_OPCODE
3136 while ((c = *p) == '\t')
3138 putc (c, asm_out_file);
3139 p++;
3141 ASM_OUTPUT_OPCODE (asm_out_file, p);
3142 #endif
3143 break;
3145 #ifdef ASSEMBLER_DIALECT
3146 case '{':
3148 int i;
3150 if (dialect)
3151 output_operand_lossage ("nested assembly dialect alternatives");
3152 else
3153 dialect = 1;
3155 /* If we want the first dialect, do nothing. Otherwise, skip
3156 DIALECT_NUMBER of strings ending with '|'. */
3157 for (i = 0; i < dialect_number; i++)
3159 while (*p && *p != '}' && *p++ != '|')
3161 if (*p == '}')
3162 break;
3163 if (*p == '|')
3164 p++;
3167 if (*p == '\0')
3168 output_operand_lossage ("unterminated assembly dialect alternative");
3170 break;
3172 case '|':
3173 if (dialect)
3175 /* Skip to close brace. */
3178 if (*p == '\0')
3180 output_operand_lossage ("unterminated assembly dialect alternative");
3181 break;
3184 while (*p++ != '}');
3185 dialect = 0;
3187 else
3188 putc (c, asm_out_file);
3189 break;
3191 case '}':
3192 if (! dialect)
3193 putc (c, asm_out_file);
3194 dialect = 0;
3195 break;
3196 #endif
3198 case '%':
3199 /* %% outputs a single %. */
3200 if (*p == '%')
3202 p++;
3203 putc (c, asm_out_file);
3205 /* %= outputs a number which is unique to each insn in the entire
3206 compilation. This is useful for making local labels that are
3207 referred to more than once in a given insn. */
3208 else if (*p == '=')
3210 p++;
3211 fprintf (asm_out_file, "%d", insn_counter);
3213 /* % followed by a letter and some digits
3214 outputs an operand in a special way depending on the letter.
3215 Letters `acln' are implemented directly.
3216 Other letters are passed to `output_operand' so that
3217 the PRINT_OPERAND macro can define them. */
3218 else if (ISALPHA (*p))
3220 int letter = *p++;
3221 unsigned long opnum;
3222 char *endptr;
3224 opnum = strtoul (p, &endptr, 10);
3226 if (endptr == p)
3227 output_operand_lossage ("operand number missing "
3228 "after %%-letter");
3229 else if (this_is_asm_operands && opnum >= insn_noperands)
3230 output_operand_lossage ("operand number out of range");
3231 else if (letter == 'l')
3232 output_asm_label (operands[opnum]);
3233 else if (letter == 'a')
3234 output_address (operands[opnum]);
3235 else if (letter == 'c')
3237 if (CONSTANT_ADDRESS_P (operands[opnum]))
3238 output_addr_const (asm_out_file, operands[opnum]);
3239 else
3240 output_operand (operands[opnum], 'c');
3242 else if (letter == 'n')
3244 if (GET_CODE (operands[opnum]) == CONST_INT)
3245 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3246 - INTVAL (operands[opnum]));
3247 else
3249 putc ('-', asm_out_file);
3250 output_addr_const (asm_out_file, operands[opnum]);
3253 else
3254 output_operand (operands[opnum], letter);
3256 if (!opoutput[opnum])
3257 oporder[ops++] = opnum;
3258 opoutput[opnum] = 1;
3260 p = endptr;
3261 c = *p;
3263 /* % followed by a digit outputs an operand the default way. */
3264 else if (ISDIGIT (*p))
3266 unsigned long opnum;
3267 char *endptr;
3269 opnum = strtoul (p, &endptr, 10);
3270 if (this_is_asm_operands && opnum >= insn_noperands)
3271 output_operand_lossage ("operand number out of range");
3272 else
3273 output_operand (operands[opnum], 0);
3275 if (!opoutput[opnum])
3276 oporder[ops++] = opnum;
3277 opoutput[opnum] = 1;
3279 p = endptr;
3280 c = *p;
3282 /* % followed by punctuation: output something for that
3283 punctuation character alone, with no operand.
3284 The PRINT_OPERAND macro decides what is actually done. */
3285 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3286 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3287 output_operand (NULL_RTX, *p++);
3288 #endif
3289 else
3290 output_operand_lossage ("invalid %%-code");
3291 break;
3293 default:
3294 putc (c, asm_out_file);
3297 /* Write out the variable names for operands, if we know them. */
3298 if (flag_verbose_asm)
3299 output_asm_operand_names (operands, oporder, ops);
3300 if (flag_print_asm_name)
3301 output_asm_name ();
3303 putc ('\n', asm_out_file);
3306 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3308 void
3309 output_asm_label (rtx x)
3311 char buf[256];
3313 if (GET_CODE (x) == LABEL_REF)
3314 x = XEXP (x, 0);
3315 if (LABEL_P (x)
3316 || (NOTE_P (x)
3317 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3318 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3319 else
3320 output_operand_lossage ("'%%l' operand isn't a label");
3322 assemble_name (asm_out_file, buf);
3325 /* Print operand X using machine-dependent assembler syntax.
3326 The macro PRINT_OPERAND is defined just to control this function.
3327 CODE is a non-digit that preceded the operand-number in the % spec,
3328 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3329 between the % and the digits.
3330 When CODE is a non-letter, X is 0.
3332 The meanings of the letters are machine-dependent and controlled
3333 by PRINT_OPERAND. */
3335 static void
3336 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3338 if (x && GET_CODE (x) == SUBREG)
3339 x = alter_subreg (&x);
3341 /* X must not be a pseudo reg. */
3342 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3344 PRINT_OPERAND (asm_out_file, x, code);
3347 /* Print a memory reference operand for address X
3348 using machine-dependent assembler syntax.
3349 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3351 void
3352 output_address (rtx x)
3354 bool changed = false;
3355 walk_alter_subreg (&x, &changed);
3356 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3359 /* Print an integer constant expression in assembler syntax.
3360 Addition and subtraction are the only arithmetic
3361 that may appear in these expressions. */
3363 void
3364 output_addr_const (FILE *file, rtx x)
3366 char buf[256];
3368 restart:
3369 switch (GET_CODE (x))
3371 case PC:
3372 putc ('.', file);
3373 break;
3375 case SYMBOL_REF:
3376 if (SYMBOL_REF_DECL (x))
3377 mark_decl_referenced (SYMBOL_REF_DECL (x));
3378 #ifdef ASM_OUTPUT_SYMBOL_REF
3379 ASM_OUTPUT_SYMBOL_REF (file, x);
3380 #else
3381 assemble_name (file, XSTR (x, 0));
3382 #endif
3383 break;
3385 case LABEL_REF:
3386 x = XEXP (x, 0);
3387 /* Fall through. */
3388 case CODE_LABEL:
3389 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3390 #ifdef ASM_OUTPUT_LABEL_REF
3391 ASM_OUTPUT_LABEL_REF (file, buf);
3392 #else
3393 assemble_name (file, buf);
3394 #endif
3395 break;
3397 case CONST_INT:
3398 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3399 break;
3401 case CONST:
3402 /* This used to output parentheses around the expression,
3403 but that does not work on the 386 (either ATT or BSD assembler). */
3404 output_addr_const (file, XEXP (x, 0));
3405 break;
3407 case CONST_DOUBLE:
3408 if (GET_MODE (x) == VOIDmode)
3410 /* We can use %d if the number is one word and positive. */
3411 if (CONST_DOUBLE_HIGH (x))
3412 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3413 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3414 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3415 else if (CONST_DOUBLE_LOW (x) < 0)
3416 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3417 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3418 else
3419 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3421 else
3422 /* We can't handle floating point constants;
3423 PRINT_OPERAND must handle them. */
3424 output_operand_lossage ("floating constant misused");
3425 break;
3427 case CONST_FIXED:
3428 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3429 (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x));
3430 break;
3432 case PLUS:
3433 /* Some assemblers need integer constants to appear last (eg masm). */
3434 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3436 output_addr_const (file, XEXP (x, 1));
3437 if (INTVAL (XEXP (x, 0)) >= 0)
3438 fprintf (file, "+");
3439 output_addr_const (file, XEXP (x, 0));
3441 else
3443 output_addr_const (file, XEXP (x, 0));
3444 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3445 || INTVAL (XEXP (x, 1)) >= 0)
3446 fprintf (file, "+");
3447 output_addr_const (file, XEXP (x, 1));
3449 break;
3451 case MINUS:
3452 /* Avoid outputting things like x-x or x+5-x,
3453 since some assemblers can't handle that. */
3454 x = simplify_subtraction (x);
3455 if (GET_CODE (x) != MINUS)
3456 goto restart;
3458 output_addr_const (file, XEXP (x, 0));
3459 fprintf (file, "-");
3460 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3461 || GET_CODE (XEXP (x, 1)) == PC
3462 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3463 output_addr_const (file, XEXP (x, 1));
3464 else
3466 fputs (targetm.asm_out.open_paren, file);
3467 output_addr_const (file, XEXP (x, 1));
3468 fputs (targetm.asm_out.close_paren, file);
3470 break;
3472 case ZERO_EXTEND:
3473 case SIGN_EXTEND:
3474 case SUBREG:
3475 case TRUNCATE:
3476 output_addr_const (file, XEXP (x, 0));
3477 break;
3479 default:
3480 #ifdef OUTPUT_ADDR_CONST_EXTRA
3481 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3482 break;
3484 fail:
3485 #endif
3486 output_operand_lossage ("invalid expression as operand");
3490 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3491 %R prints the value of REGISTER_PREFIX.
3492 %L prints the value of LOCAL_LABEL_PREFIX.
3493 %U prints the value of USER_LABEL_PREFIX.
3494 %I prints the value of IMMEDIATE_PREFIX.
3495 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3496 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3498 We handle alternate assembler dialects here, just like output_asm_insn. */
3500 void
3501 asm_fprintf (FILE *file, const char *p, ...)
3503 char buf[10];
3504 char *q, c;
3505 va_list argptr;
3507 va_start (argptr, p);
3509 buf[0] = '%';
3511 while ((c = *p++))
3512 switch (c)
3514 #ifdef ASSEMBLER_DIALECT
3515 case '{':
3517 int i;
3519 /* If we want the first dialect, do nothing. Otherwise, skip
3520 DIALECT_NUMBER of strings ending with '|'. */
3521 for (i = 0; i < dialect_number; i++)
3523 while (*p && *p++ != '|')
3526 if (*p == '|')
3527 p++;
3530 break;
3532 case '|':
3533 /* Skip to close brace. */
3534 while (*p && *p++ != '}')
3536 break;
3538 case '}':
3539 break;
3540 #endif
3542 case '%':
3543 c = *p++;
3544 q = &buf[1];
3545 while (strchr ("-+ #0", c))
3547 *q++ = c;
3548 c = *p++;
3550 while (ISDIGIT (c) || c == '.')
3552 *q++ = c;
3553 c = *p++;
3555 switch (c)
3557 case '%':
3558 putc ('%', file);
3559 break;
3561 case 'd': case 'i': case 'u':
3562 case 'x': case 'X': case 'o':
3563 case 'c':
3564 *q++ = c;
3565 *q = 0;
3566 fprintf (file, buf, va_arg (argptr, int));
3567 break;
3569 case 'w':
3570 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3571 'o' cases, but we do not check for those cases. It
3572 means that the value is a HOST_WIDE_INT, which may be
3573 either `long' or `long long'. */
3574 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3575 q += strlen (HOST_WIDE_INT_PRINT);
3576 *q++ = *p++;
3577 *q = 0;
3578 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3579 break;
3581 case 'l':
3582 *q++ = c;
3583 #ifdef HAVE_LONG_LONG
3584 if (*p == 'l')
3586 *q++ = *p++;
3587 *q++ = *p++;
3588 *q = 0;
3589 fprintf (file, buf, va_arg (argptr, long long));
3591 else
3592 #endif
3594 *q++ = *p++;
3595 *q = 0;
3596 fprintf (file, buf, va_arg (argptr, long));
3599 break;
3601 case 's':
3602 *q++ = c;
3603 *q = 0;
3604 fprintf (file, buf, va_arg (argptr, char *));
3605 break;
3607 case 'O':
3608 #ifdef ASM_OUTPUT_OPCODE
3609 ASM_OUTPUT_OPCODE (asm_out_file, p);
3610 #endif
3611 break;
3613 case 'R':
3614 #ifdef REGISTER_PREFIX
3615 fprintf (file, "%s", REGISTER_PREFIX);
3616 #endif
3617 break;
3619 case 'I':
3620 #ifdef IMMEDIATE_PREFIX
3621 fprintf (file, "%s", IMMEDIATE_PREFIX);
3622 #endif
3623 break;
3625 case 'L':
3626 #ifdef LOCAL_LABEL_PREFIX
3627 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3628 #endif
3629 break;
3631 case 'U':
3632 fputs (user_label_prefix, file);
3633 break;
3635 #ifdef ASM_FPRINTF_EXTENSIONS
3636 /* Uppercase letters are reserved for general use by asm_fprintf
3637 and so are not available to target specific code. In order to
3638 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3639 they are defined here. As they get turned into real extensions
3640 to asm_fprintf they should be removed from this list. */
3641 case 'A': case 'B': case 'C': case 'D': case 'E':
3642 case 'F': case 'G': case 'H': case 'J': case 'K':
3643 case 'M': case 'N': case 'P': case 'Q': case 'S':
3644 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3645 break;
3647 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3648 #endif
3649 default:
3650 gcc_unreachable ();
3652 break;
3654 default:
3655 putc (c, file);
3657 va_end (argptr);
3660 /* Split up a CONST_DOUBLE or integer constant rtx
3661 into two rtx's for single words,
3662 storing in *FIRST the word that comes first in memory in the target
3663 and in *SECOND the other. */
3665 void
3666 split_double (rtx value, rtx *first, rtx *second)
3668 if (GET_CODE (value) == CONST_INT)
3670 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3672 /* In this case the CONST_INT holds both target words.
3673 Extract the bits from it into two word-sized pieces.
3674 Sign extend each half to HOST_WIDE_INT. */
3675 unsigned HOST_WIDE_INT low, high;
3676 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3678 /* Set sign_bit to the most significant bit of a word. */
3679 sign_bit = 1;
3680 sign_bit <<= BITS_PER_WORD - 1;
3682 /* Set mask so that all bits of the word are set. We could
3683 have used 1 << BITS_PER_WORD instead of basing the
3684 calculation on sign_bit. However, on machines where
3685 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3686 compiler warning, even though the code would never be
3687 executed. */
3688 mask = sign_bit << 1;
3689 mask--;
3691 /* Set sign_extend as any remaining bits. */
3692 sign_extend = ~mask;
3694 /* Pick the lower word and sign-extend it. */
3695 low = INTVAL (value);
3696 low &= mask;
3697 if (low & sign_bit)
3698 low |= sign_extend;
3700 /* Pick the higher word, shifted to the least significant
3701 bits, and sign-extend it. */
3702 high = INTVAL (value);
3703 high >>= BITS_PER_WORD - 1;
3704 high >>= 1;
3705 high &= mask;
3706 if (high & sign_bit)
3707 high |= sign_extend;
3709 /* Store the words in the target machine order. */
3710 if (WORDS_BIG_ENDIAN)
3712 *first = GEN_INT (high);
3713 *second = GEN_INT (low);
3715 else
3717 *first = GEN_INT (low);
3718 *second = GEN_INT (high);
3721 else
3723 /* The rule for using CONST_INT for a wider mode
3724 is that we regard the value as signed.
3725 So sign-extend it. */
3726 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3727 if (WORDS_BIG_ENDIAN)
3729 *first = high;
3730 *second = value;
3732 else
3734 *first = value;
3735 *second = high;
3739 else if (GET_CODE (value) != CONST_DOUBLE)
3741 if (WORDS_BIG_ENDIAN)
3743 *first = const0_rtx;
3744 *second = value;
3746 else
3748 *first = value;
3749 *second = const0_rtx;
3752 else if (GET_MODE (value) == VOIDmode
3753 /* This is the old way we did CONST_DOUBLE integers. */
3754 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3756 /* In an integer, the words are defined as most and least significant.
3757 So order them by the target's convention. */
3758 if (WORDS_BIG_ENDIAN)
3760 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3761 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3763 else
3765 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3766 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3769 else
3771 REAL_VALUE_TYPE r;
3772 long l[2];
3773 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3775 /* Note, this converts the REAL_VALUE_TYPE to the target's
3776 format, splits up the floating point double and outputs
3777 exactly 32 bits of it into each of l[0] and l[1] --
3778 not necessarily BITS_PER_WORD bits. */
3779 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3781 /* If 32 bits is an entire word for the target, but not for the host,
3782 then sign-extend on the host so that the number will look the same
3783 way on the host that it would on the target. See for instance
3784 simplify_unary_operation. The #if is needed to avoid compiler
3785 warnings. */
3787 #if HOST_BITS_PER_LONG > 32
3788 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3790 if (l[0] & ((long) 1 << 31))
3791 l[0] |= ((long) (-1) << 32);
3792 if (l[1] & ((long) 1 << 31))
3793 l[1] |= ((long) (-1) << 32);
3795 #endif
3797 *first = GEN_INT (l[0]);
3798 *second = GEN_INT (l[1]);
3802 /* Return nonzero if this function has no function calls. */
3805 leaf_function_p (void)
3807 rtx insn;
3808 rtx link;
3810 if (crtl->profile || profile_arc_flag)
3811 return 0;
3813 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3815 if (CALL_P (insn)
3816 && ! SIBLING_CALL_P (insn))
3817 return 0;
3818 if (NONJUMP_INSN_P (insn)
3819 && GET_CODE (PATTERN (insn)) == SEQUENCE
3820 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3821 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3822 return 0;
3824 for (link = crtl->epilogue_delay_list;
3825 link;
3826 link = XEXP (link, 1))
3828 insn = XEXP (link, 0);
3830 if (CALL_P (insn)
3831 && ! SIBLING_CALL_P (insn))
3832 return 0;
3833 if (NONJUMP_INSN_P (insn)
3834 && GET_CODE (PATTERN (insn)) == SEQUENCE
3835 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3836 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3837 return 0;
3840 return 1;
3843 /* Return 1 if branch is a forward branch.
3844 Uses insn_shuid array, so it works only in the final pass. May be used by
3845 output templates to customary add branch prediction hints.
3848 final_forward_branch_p (rtx insn)
3850 int insn_id, label_id;
3852 gcc_assert (uid_shuid);
3853 insn_id = INSN_SHUID (insn);
3854 label_id = INSN_SHUID (JUMP_LABEL (insn));
3855 /* We've hit some insns that does not have id information available. */
3856 gcc_assert (insn_id && label_id);
3857 return insn_id < label_id;
3860 /* On some machines, a function with no call insns
3861 can run faster if it doesn't create its own register window.
3862 When output, the leaf function should use only the "output"
3863 registers. Ordinarily, the function would be compiled to use
3864 the "input" registers to find its arguments; it is a candidate
3865 for leaf treatment if it uses only the "input" registers.
3866 Leaf function treatment means renumbering so the function
3867 uses the "output" registers instead. */
3869 #ifdef LEAF_REGISTERS
3871 /* Return 1 if this function uses only the registers that can be
3872 safely renumbered. */
3875 only_leaf_regs_used (void)
3877 int i;
3878 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3880 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3881 if ((df_regs_ever_live_p (i) || global_regs[i])
3882 && ! permitted_reg_in_leaf_functions[i])
3883 return 0;
3885 if (crtl->uses_pic_offset_table
3886 && pic_offset_table_rtx != 0
3887 && REG_P (pic_offset_table_rtx)
3888 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3889 return 0;
3891 return 1;
3894 /* Scan all instructions and renumber all registers into those
3895 available in leaf functions. */
3897 static void
3898 leaf_renumber_regs (rtx first)
3900 rtx insn;
3902 /* Renumber only the actual patterns.
3903 The reg-notes can contain frame pointer refs,
3904 and renumbering them could crash, and should not be needed. */
3905 for (insn = first; insn; insn = NEXT_INSN (insn))
3906 if (INSN_P (insn))
3907 leaf_renumber_regs_insn (PATTERN (insn));
3908 for (insn = crtl->epilogue_delay_list;
3909 insn;
3910 insn = XEXP (insn, 1))
3911 if (INSN_P (XEXP (insn, 0)))
3912 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3915 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3916 available in leaf functions. */
3918 void
3919 leaf_renumber_regs_insn (rtx in_rtx)
3921 int i, j;
3922 const char *format_ptr;
3924 if (in_rtx == 0)
3925 return;
3927 /* Renumber all input-registers into output-registers.
3928 renumbered_regs would be 1 for an output-register;
3929 they */
3931 if (REG_P (in_rtx))
3933 int newreg;
3935 /* Don't renumber the same reg twice. */
3936 if (in_rtx->used)
3937 return;
3939 newreg = REGNO (in_rtx);
3940 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3941 to reach here as part of a REG_NOTE. */
3942 if (newreg >= FIRST_PSEUDO_REGISTER)
3944 in_rtx->used = 1;
3945 return;
3947 newreg = LEAF_REG_REMAP (newreg);
3948 gcc_assert (newreg >= 0);
3949 df_set_regs_ever_live (REGNO (in_rtx), false);
3950 df_set_regs_ever_live (newreg, true);
3951 SET_REGNO (in_rtx, newreg);
3952 in_rtx->used = 1;
3955 if (INSN_P (in_rtx))
3957 /* Inside a SEQUENCE, we find insns.
3958 Renumber just the patterns of these insns,
3959 just as we do for the top-level insns. */
3960 leaf_renumber_regs_insn (PATTERN (in_rtx));
3961 return;
3964 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3966 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3967 switch (*format_ptr++)
3969 case 'e':
3970 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3971 break;
3973 case 'E':
3974 if (NULL != XVEC (in_rtx, i))
3976 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3977 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3979 break;
3981 case 'S':
3982 case 's':
3983 case '0':
3984 case 'i':
3985 case 'w':
3986 case 'n':
3987 case 'u':
3988 break;
3990 default:
3991 gcc_unreachable ();
3994 #endif
3997 /* When -gused is used, emit debug info for only used symbols. But in
3998 addition to the standard intercepted debug_hooks there are some direct
3999 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4000 Those routines may also be called from a higher level intercepted routine. So
4001 to prevent recording data for an inner call to one of these for an intercept,
4002 we maintain an intercept nesting counter (debug_nesting). We only save the
4003 intercepted arguments if the nesting is 1. */
4004 int debug_nesting = 0;
4006 static tree *symbol_queue;
4007 int symbol_queue_index = 0;
4008 static int symbol_queue_size = 0;
4010 /* Generate the symbols for any queued up type symbols we encountered
4011 while generating the type info for some originally used symbol.
4012 This might generate additional entries in the queue. Only when
4013 the nesting depth goes to 0 is this routine called. */
4015 void
4016 debug_flush_symbol_queue (void)
4018 int i;
4020 /* Make sure that additionally queued items are not flushed
4021 prematurely. */
4023 ++debug_nesting;
4025 for (i = 0; i < symbol_queue_index; ++i)
4027 /* If we pushed queued symbols then such symbols must be
4028 output no matter what anyone else says. Specifically,
4029 we need to make sure dbxout_symbol() thinks the symbol was
4030 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4031 which may be set for outside reasons. */
4032 int saved_tree_used = TREE_USED (symbol_queue[i]);
4033 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
4034 TREE_USED (symbol_queue[i]) = 1;
4035 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
4037 #ifdef DBX_DEBUGGING_INFO
4038 dbxout_symbol (symbol_queue[i], 0);
4039 #endif
4041 TREE_USED (symbol_queue[i]) = saved_tree_used;
4042 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
4045 symbol_queue_index = 0;
4046 --debug_nesting;
4049 /* Queue a type symbol needed as part of the definition of a decl
4050 symbol. These symbols are generated when debug_flush_symbol_queue()
4051 is called. */
4053 void
4054 debug_queue_symbol (tree decl)
4056 if (symbol_queue_index >= symbol_queue_size)
4058 symbol_queue_size += 10;
4059 symbol_queue = xrealloc (symbol_queue,
4060 symbol_queue_size * sizeof (tree));
4063 symbol_queue[symbol_queue_index++] = decl;
4066 /* Free symbol queue. */
4067 void
4068 debug_free_queue (void)
4070 if (symbol_queue)
4072 free (symbol_queue);
4073 symbol_queue = NULL;
4074 symbol_queue_size = 0;
4078 /* Turn the RTL into assembly. */
4079 static unsigned int
4080 rest_of_handle_final (void)
4082 rtx x;
4083 const char *fnname;
4085 /* Get the function's name, as described by its RTL. This may be
4086 different from the DECL_NAME name used in the source file. */
4088 x = DECL_RTL (current_function_decl);
4089 gcc_assert (MEM_P (x));
4090 x = XEXP (x, 0);
4091 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4092 fnname = XSTR (x, 0);
4094 assemble_start_function (current_function_decl, fnname);
4095 final_start_function (get_insns (), asm_out_file, optimize);
4096 final (get_insns (), asm_out_file, optimize);
4097 final_end_function ();
4099 #ifdef TARGET_UNWIND_INFO
4100 /* ??? The IA-64 ".handlerdata" directive must be issued before
4101 the ".endp" directive that closes the procedure descriptor. */
4102 output_function_exception_table (fnname);
4103 #endif
4105 assemble_end_function (current_function_decl, fnname);
4107 #ifndef TARGET_UNWIND_INFO
4108 /* Otherwise, it feels unclean to switch sections in the middle. */
4109 output_function_exception_table (fnname);
4110 #endif
4112 user_defined_section_attribute = false;
4114 /* Free up reg info memory. */
4115 free_reg_info ();
4117 if (! quiet_flag)
4118 fflush (asm_out_file);
4120 /* Write DBX symbols if requested. */
4122 /* Note that for those inline functions where we don't initially
4123 know for certain that we will be generating an out-of-line copy,
4124 the first invocation of this routine (rest_of_compilation) will
4125 skip over this code by doing a `goto exit_rest_of_compilation;'.
4126 Later on, wrapup_global_declarations will (indirectly) call
4127 rest_of_compilation again for those inline functions that need
4128 to have out-of-line copies generated. During that call, we
4129 *will* be routed past here. */
4131 timevar_push (TV_SYMOUT);
4132 (*debug_hooks->function_decl) (current_function_decl);
4133 timevar_pop (TV_SYMOUT);
4134 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4135 && targetm.have_ctors_dtors)
4136 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4137 decl_init_priority_lookup
4138 (current_function_decl));
4139 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4140 && targetm.have_ctors_dtors)
4141 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4142 decl_fini_priority_lookup
4143 (current_function_decl));
4144 return 0;
4147 struct rtl_opt_pass pass_final =
4150 RTL_PASS,
4151 NULL, /* name */
4152 NULL, /* gate */
4153 rest_of_handle_final, /* execute */
4154 NULL, /* sub */
4155 NULL, /* next */
4156 0, /* static_pass_number */
4157 TV_FINAL, /* tv_id */
4158 0, /* properties_required */
4159 0, /* properties_provided */
4160 0, /* properties_destroyed */
4161 0, /* todo_flags_start */
4162 TODO_ggc_collect /* todo_flags_finish */
4167 static unsigned int
4168 rest_of_handle_shorten_branches (void)
4170 /* Shorten branches. */
4171 shorten_branches (get_insns ());
4172 return 0;
4175 struct rtl_opt_pass pass_shorten_branches =
4178 RTL_PASS,
4179 "shorten", /* name */
4180 NULL, /* gate */
4181 rest_of_handle_shorten_branches, /* execute */
4182 NULL, /* sub */
4183 NULL, /* next */
4184 0, /* static_pass_number */
4185 TV_FINAL, /* tv_id */
4186 0, /* properties_required */
4187 0, /* properties_provided */
4188 0, /* properties_destroyed */
4189 0, /* todo_flags_start */
4190 TODO_dump_func /* todo_flags_finish */
4195 static unsigned int
4196 rest_of_clean_state (void)
4198 rtx insn, next;
4200 /* It is very important to decompose the RTL instruction chain here:
4201 debug information keeps pointing into CODE_LABEL insns inside the function
4202 body. If these remain pointing to the other insns, we end up preserving
4203 whole RTL chain and attached detailed debug info in memory. */
4204 for (insn = get_insns (); insn; insn = next)
4206 next = NEXT_INSN (insn);
4207 NEXT_INSN (insn) = NULL;
4208 PREV_INSN (insn) = NULL;
4211 /* In case the function was not output,
4212 don't leave any temporary anonymous types
4213 queued up for sdb output. */
4214 #ifdef SDB_DEBUGGING_INFO
4215 if (write_symbols == SDB_DEBUG)
4216 sdbout_types (NULL_TREE);
4217 #endif
4219 reload_completed = 0;
4220 epilogue_completed = 0;
4221 #ifdef STACK_REGS
4222 regstack_completed = 0;
4223 #endif
4225 /* Clear out the insn_length contents now that they are no
4226 longer valid. */
4227 init_insn_lengths ();
4229 /* Show no temporary slots allocated. */
4230 init_temp_slots ();
4232 free_bb_for_insn ();
4234 if (targetm.binds_local_p (current_function_decl))
4236 unsigned int pref = crtl->preferred_stack_boundary;
4237 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4238 pref = crtl->stack_alignment_needed;
4239 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4240 = pref;
4243 /* Make sure volatile mem refs aren't considered valid operands for
4244 arithmetic insns. We must call this here if this is a nested inline
4245 function, since the above code leaves us in the init_recog state,
4246 and the function context push/pop code does not save/restore volatile_ok.
4248 ??? Maybe it isn't necessary for expand_start_function to call this
4249 anymore if we do it here? */
4251 init_recog_no_volatile ();
4253 /* We're done with this function. Free up memory if we can. */
4254 free_after_parsing (cfun);
4255 free_after_compilation (cfun);
4256 return 0;
4259 struct rtl_opt_pass pass_clean_state =
4262 RTL_PASS,
4263 NULL, /* name */
4264 NULL, /* gate */
4265 rest_of_clean_state, /* execute */
4266 NULL, /* sub */
4267 NULL, /* next */
4268 0, /* static_pass_number */
4269 TV_FINAL, /* tv_id */
4270 0, /* properties_required */
4271 0, /* properties_provided */
4272 PROP_rtl, /* properties_destroyed */
4273 0, /* todo_flags_start */
4274 0 /* todo_flags_finish */