merge with trunk @ 139506
[official-gcc.git] / gcc / config / avr / avr.h
blobb5132e263136c3048ff483204c47a0be237d09cf
1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
4 2008 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov (denisc@overta.ru)
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
23 /* Names to predefine in the preprocessor for this target machine. */
25 struct base_arch_s {
26 /* Assembler only. */
27 int asm_only;
29 /* Core have 'MUL*' instructions. */
30 int have_mul;
32 /* Core have 'CALL' and 'JMP' instructions. */
33 int have_jmp_call;
35 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
36 int have_movw_lpmx;
38 /* Core have 'ELPM' instructions. */
39 int have_elpm;
41 /* Core have 'ELPM Rx,Z' instructions. */
42 int have_elpmx;
44 /* Core have 'EICALL' and 'EIJMP' instructions. */
45 int have_eijmp_eicall;
47 /* Reserved. */
48 int reserved;
50 const char *const macro;
53 extern const struct base_arch_s *avr_current_arch;
55 #define TARGET_CPU_CPP_BUILTINS() \
56 do \
57 { \
58 builtin_define_std ("AVR"); \
59 if (avr_current_arch->macro) \
60 builtin_define (avr_current_arch->macro); \
61 if (avr_extra_arch_macro) \
62 builtin_define (avr_extra_arch_macro); \
63 if (avr_current_arch->have_elpm) \
64 builtin_define ("__AVR_HAVE_RAMPZ__"); \
65 if (avr_current_arch->have_elpm) \
66 builtin_define ("__AVR_HAVE_ELPM__"); \
67 if (avr_current_arch->have_elpmx) \
68 builtin_define ("__AVR_HAVE_ELPMX__"); \
69 if (avr_current_arch->have_movw_lpmx) \
70 { \
71 builtin_define ("__AVR_HAVE_MOVW__"); \
72 builtin_define ("__AVR_HAVE_LPMX__"); \
73 } \
74 if (avr_current_arch->asm_only) \
75 builtin_define ("__AVR_ASM_ONLY__"); \
76 if (avr_current_arch->have_mul) \
77 { \
78 builtin_define ("__AVR_ENHANCED__"); \
79 builtin_define ("__AVR_HAVE_MUL__"); \
80 } \
81 if (avr_current_arch->have_jmp_call) \
82 { \
83 builtin_define ("__AVR_MEGA__"); \
84 builtin_define ("__AVR_HAVE_JMP_CALL__"); \
85 } \
86 if (avr_current_arch->have_eijmp_eicall) \
87 { \
88 builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
89 builtin_define ("__AVR_3_BYTE_PC__"); \
90 } \
91 else \
92 { \
93 builtin_define ("__AVR_2_BYTE_PC__"); \
94 } \
95 if (TARGET_NO_INTERRUPTS) \
96 builtin_define ("__NO_INTERRUPTS__"); \
97 } \
98 while (0)
100 extern const char *avr_extra_arch_macro;
102 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
103 extern GTY(()) section *progmem_section;
104 #endif
106 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
107 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
108 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
109 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
110 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
111 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
113 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
114 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
116 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
118 #define OVERRIDE_OPTIONS avr_override_options ()
120 #define CAN_DEBUG_WITHOUT_FP
122 #define BITS_BIG_ENDIAN 0
123 #define BYTES_BIG_ENDIAN 0
124 #define WORDS_BIG_ENDIAN 0
126 #ifdef IN_LIBGCC2
127 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
128 #define UNITS_PER_WORD 4
129 #else
130 /* Width of a word, in units (bytes). */
131 #define UNITS_PER_WORD 1
132 #endif
134 #define POINTER_SIZE 16
137 /* Maximum sized of reasonable data type
138 DImode or Dfmode ... */
139 #define MAX_FIXED_MODE_SIZE 32
141 #define PARM_BOUNDARY 8
143 #define FUNCTION_BOUNDARY 8
145 #define EMPTY_FIELD_BOUNDARY 8
147 /* No data type wants to be aligned rounder than this. */
148 #define BIGGEST_ALIGNMENT 8
150 #define MAX_OFILE_ALIGNMENT (32768 * 8)
152 #define TARGET_VTABLE_ENTRY_ALIGN 8
154 #define STRICT_ALIGNMENT 0
156 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
157 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
158 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
159 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
160 #define FLOAT_TYPE_SIZE 32
161 #define DOUBLE_TYPE_SIZE 32
162 #define LONG_DOUBLE_TYPE_SIZE 32
164 #define DEFAULT_SIGNED_CHAR 1
166 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
167 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
169 #define WCHAR_TYPE_SIZE 16
171 #define FIRST_PSEUDO_REGISTER 36
173 #define FIXED_REGISTERS {\
174 1,1,/* r0 r1 */\
175 0,0,/* r2 r3 */\
176 0,0,/* r4 r5 */\
177 0,0,/* r6 r7 */\
178 0,0,/* r8 r9 */\
179 0,0,/* r10 r11 */\
180 0,0,/* r12 r13 */\
181 0,0,/* r14 r15 */\
182 0,0,/* r16 r17 */\
183 0,0,/* r18 r19 */\
184 0,0,/* r20 r21 */\
185 0,0,/* r22 r23 */\
186 0,0,/* r24 r25 */\
187 0,0,/* r26 r27 */\
188 0,0,/* r28 r29 */\
189 0,0,/* r30 r31 */\
190 1,1,/* STACK */\
191 1,1 /* arg pointer */ }
193 #define CALL_USED_REGISTERS { \
194 1,1,/* r0 r1 */ \
195 0,0,/* r2 r3 */ \
196 0,0,/* r4 r5 */ \
197 0,0,/* r6 r7 */ \
198 0,0,/* r8 r9 */ \
199 0,0,/* r10 r11 */ \
200 0,0,/* r12 r13 */ \
201 0,0,/* r14 r15 */ \
202 0,0,/* r16 r17 */ \
203 1,1,/* r18 r19 */ \
204 1,1,/* r20 r21 */ \
205 1,1,/* r22 r23 */ \
206 1,1,/* r24 r25 */ \
207 1,1,/* r26 r27 */ \
208 0,0,/* r28 r29 */ \
209 1,1,/* r30 r31 */ \
210 1,1,/* STACK */ \
211 1,1 /* arg pointer */ }
213 #define REG_ALLOC_ORDER { \
214 24,25, \
215 18,19, \
216 20,21, \
217 22,23, \
218 30,31, \
219 26,27, \
220 28,29, \
221 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
222 0,1, \
223 32,33,34,35 \
226 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
229 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
231 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
233 #define MODES_TIEABLE_P(MODE1, MODE2) 1
235 enum reg_class {
236 NO_REGS,
237 R0_REG, /* r0 */
238 POINTER_X_REGS, /* r26 - r27 */
239 POINTER_Y_REGS, /* r28 - r29 */
240 POINTER_Z_REGS, /* r30 - r31 */
241 STACK_REG, /* STACK */
242 BASE_POINTER_REGS, /* r28 - r31 */
243 POINTER_REGS, /* r26 - r31 */
244 ADDW_REGS, /* r24 - r31 */
245 SIMPLE_LD_REGS, /* r16 - r23 */
246 LD_REGS, /* r16 - r31 */
247 NO_LD_REGS, /* r0 - r15 */
248 GENERAL_REGS, /* r0 - r31 */
249 ALL_REGS, LIM_REG_CLASSES
253 #define N_REG_CLASSES (int)LIM_REG_CLASSES
255 #define REG_CLASS_NAMES { \
256 "NO_REGS", \
257 "R0_REG", /* r0 */ \
258 "POINTER_X_REGS", /* r26 - r27 */ \
259 "POINTER_Y_REGS", /* r28 - r29 */ \
260 "POINTER_Z_REGS", /* r30 - r31 */ \
261 "STACK_REG", /* STACK */ \
262 "BASE_POINTER_REGS", /* r28 - r31 */ \
263 "POINTER_REGS", /* r26 - r31 */ \
264 "ADDW_REGS", /* r24 - r31 */ \
265 "SIMPLE_LD_REGS", /* r16 - r23 */ \
266 "LD_REGS", /* r16 - r31 */ \
267 "NO_LD_REGS", /* r0 - r15 */ \
268 "GENERAL_REGS", /* r0 - r31 */ \
269 "ALL_REGS" }
271 #define REG_CLASS_CONTENTS { \
272 {0x00000000,0x00000000}, /* NO_REGS */ \
273 {0x00000001,0x00000000}, /* R0_REG */ \
274 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
275 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
276 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
277 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
278 {(3 << REG_Y) | (3 << REG_Z), \
279 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
280 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
281 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
282 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
283 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
284 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
285 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
286 0x00000000}, /* LD_REGS, r16 - r31 */ \
287 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
288 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
289 {0xffffffff,0x00000003} /* ALL_REGS */ \
292 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
294 /* The following macro defines cover classes for Integrated Register
295 Allocator. Cover classes is a set of non-intersected register
296 classes covering all hard registers used for register allocation
297 purpose. Any move between two registers of a cover class should be
298 cheaper than load or store of the registers. The macro value is
299 array of register classes with LIM_REG_CLASSES used as the end
300 marker. */
302 #define IRA_COVER_CLASSES \
304 GENERAL_REGS, LIM_REG_CLASSES \
307 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
309 #define INDEX_REG_CLASS NO_REGS
311 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
312 && ((r) == REG_X \
313 || (r) == REG_Y \
314 || (r) == REG_Z \
315 || (r) == ARG_POINTER_REGNUM)) \
316 || (reg_renumber \
317 && (reg_renumber[r] == REG_X \
318 || reg_renumber[r] == REG_Y \
319 || reg_renumber[r] == REG_Z \
320 || (reg_renumber[r] \
321 == ARG_POINTER_REGNUM))))
323 #define REGNO_OK_FOR_INDEX_P(NUM) 0
325 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
327 #define SMALL_REGISTER_CLASSES 1
329 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
331 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
333 #define STACK_PUSH_CODE POST_DEC
335 #define STACK_GROWS_DOWNWARD
337 #define STARTING_FRAME_OFFSET 1
339 #define STACK_POINTER_OFFSET 1
341 #define FIRST_PARM_OFFSET(FUNDECL) 0
343 #define STACK_BOUNDARY 8
345 #define STACK_POINTER_REGNUM 32
347 #define FRAME_POINTER_REGNUM REG_Y
349 #define ARG_POINTER_REGNUM 34
351 #define STATIC_CHAIN_REGNUM 2
353 #define FRAME_POINTER_REQUIRED frame_pointer_required_p()
355 /* Offset from the frame pointer register value to the top of the stack. */
356 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
358 #define ELIMINABLE_REGS { \
359 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
360 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
361 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
363 #define CAN_ELIMINATE(FROM, TO) (((FROM) == ARG_POINTER_REGNUM \
364 && (TO) == FRAME_POINTER_REGNUM) \
365 || (((FROM) == FRAME_POINTER_REGNUM \
366 || (FROM) == FRAME_POINTER_REGNUM+1) \
367 && ! FRAME_POINTER_REQUIRED \
370 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
371 OFFSET = initial_elimination_offset (FROM, TO)
373 #define RETURN_ADDR_RTX(count, x) \
374 gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
376 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
377 for POST_DEC targets (PR27386). */
378 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
380 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
382 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
384 typedef struct avr_args {
385 int nregs; /* # registers available for passing */
386 int regno; /* next available register number */
387 } CUMULATIVE_ARGS;
389 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
390 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
392 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
393 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
395 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
397 extern int avr_reg_order[];
399 #define RET_REGISTER avr_ret_register ()
401 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
403 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
405 #define DEFAULT_PCC_STRUCT_RETURN 0
407 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
409 #define HAVE_POST_INCREMENT 1
410 #define HAVE_PRE_DECREMENT 1
412 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
414 #define MAX_REGS_PER_ADDRESS 1
416 #ifdef REG_OK_STRICT
417 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
419 if (legitimate_address_p (mode, operand, 1)) \
420 goto ADDR; \
422 # else
423 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
425 if (legitimate_address_p (mode, operand, 0)) \
426 goto ADDR; \
428 #endif
430 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
431 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
433 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
435 #ifdef REG_OK_STRICT
436 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
437 #else
438 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
439 #endif
441 #define REG_OK_FOR_INDEX_P(X) 0
443 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
445 (X) = legitimize_address (X, OLDX, MODE); \
446 if (memory_address_p (MODE, X)) \
447 goto WIN; \
450 #define XEXP_(X,Y) (X)
452 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it
453 is no worse than normal base pointers R28/29 and R30/31. For example:
454 If base offset is greater than 63 bytes or for R++ or --R addressing. */
456 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
457 do { \
458 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
460 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
461 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
462 OPNUM, RELOAD_OTHER); \
463 goto WIN; \
465 if (GET_CODE (X) == PLUS \
466 && REG_P (XEXP (X, 0)) \
467 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \
468 && GET_CODE (XEXP (X, 1)) == CONST_INT \
469 && INTVAL (XEXP (X, 1)) >= 1) \
471 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
472 if (fit) \
474 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
476 int regno = REGNO (XEXP (X, 0)); \
477 rtx mem = make_memloc (X, regno); \
478 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
479 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
480 1, ADDR_TYPE (TYPE)); \
481 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
482 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
483 OPNUM, TYPE); \
484 goto WIN; \
486 push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
487 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
488 OPNUM, TYPE); \
489 goto WIN; \
491 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
493 push_reload (X, NULL_RTX, &X, NULL, \
494 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
495 OPNUM, TYPE); \
496 goto WIN; \
499 } while(0)
501 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
503 #define LEGITIMATE_CONSTANT_P(X) 1
505 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
506 : (TO) == STACK_REG ? 12 \
507 : 2)
509 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \
510 (MODE)==HImode ? 4 : \
511 (MODE)==SImode ? 8 : \
512 (MODE)==SFmode ? 8 : 16)
514 #define BRANCH_COST 0
516 #define SLOW_BYTE_ACCESS 0
518 #define NO_FUNCTION_CSE
520 #define TEXT_SECTION_ASM_OP "\t.text"
522 #define DATA_SECTION_ASM_OP "\t.data"
524 #define BSS_SECTION_ASM_OP "\t.section .bss"
526 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
527 There are no shared libraries on this target, and these sections are
528 placed in the read-only program memory, so they are not writable. */
530 #undef CTORS_SECTION_ASM_OP
531 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
533 #undef DTORS_SECTION_ASM_OP
534 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
536 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
538 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
540 #define SUPPORTS_INIT_PRIORITY 0
542 #define JUMP_TABLES_IN_TEXT_SECTION 0
544 #define ASM_COMMENT_START " ; "
546 #define ASM_APP_ON "/* #APP */\n"
548 #define ASM_APP_OFF "/* #NOAPP */\n"
550 /* Switch into a generic section. */
551 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
552 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
554 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
556 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
558 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
559 do { \
560 fputs ("\t.comm ", (STREAM)); \
561 assemble_name ((STREAM), (NAME)); \
562 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
563 } while (0)
565 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
566 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
568 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
569 do { \
570 fputs ("\t.lcomm ", (STREAM)); \
571 assemble_name ((STREAM), (NAME)); \
572 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
573 } while (0)
575 #undef TYPE_ASM_OP
576 #undef SIZE_ASM_OP
577 #undef WEAK_ASM_OP
578 #define TYPE_ASM_OP "\t.type\t"
579 #define SIZE_ASM_OP "\t.size\t"
580 #define WEAK_ASM_OP "\t.weak\t"
581 /* Define the strings used for the special svr4 .type and .size directives.
582 These strings generally do not vary from one system running svr4 to
583 another, but if a given system (e.g. m88k running svr) needs to use
584 different pseudo-op names for these, they may be overridden in the
585 file which includes this one. */
588 #undef TYPE_OPERAND_FMT
589 #define TYPE_OPERAND_FMT "@%s"
590 /* The following macro defines the format used to output the second
591 operand of the .type assembler directive. Different svr4 assemblers
592 expect various different forms for this operand. The one given here
593 is just a default. You may need to override it in your machine-
594 specific tm.h file (depending upon the particulars of your assembler). */
596 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
597 do { \
598 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
599 ASM_OUTPUT_LABEL (FILE, NAME); \
600 } while (0)
602 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
603 do { \
604 if (!flag_inhibit_size_directive) \
605 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
606 } while (0)
608 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
609 do { \
610 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
611 size_directive_output = 0; \
612 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
614 size_directive_output = 1; \
615 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
616 int_size_in_bytes (TREE_TYPE (DECL))); \
618 ASM_OUTPUT_LABEL(FILE, NAME); \
619 } while (0)
621 #undef ASM_FINISH_DECLARE_OBJECT
622 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
623 do { \
624 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
625 HOST_WIDE_INT size; \
626 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
627 && ! AT_END && TOP_LEVEL \
628 && DECL_INITIAL (DECL) == error_mark_node \
629 && !size_directive_output) \
631 size_directive_output = 1; \
632 size = int_size_in_bytes (TREE_TYPE (DECL)); \
633 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
635 } while (0)
638 #define ESCAPES \
639 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
640 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
641 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
642 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
643 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
644 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
645 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
646 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
647 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
648 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
649 corresponds to a particular byte value [0..255]. For any
650 given byte value, if the value in the corresponding table
651 position is zero, the given character can be output directly.
652 If the table value is 1, the byte must be output as a \ooo
653 octal escape. If the tables value is anything else, then the
654 byte value should be output as a \ followed by the value
655 in the table. Note that we can use standard UN*X escape
656 sequences for many control characters, but we don't use
657 \a to represent BEL because some svr4 assemblers (e.g. on
658 the i386) don't know about that. Also, we don't use \v
659 since some versions of gas, such as 2.2 did not accept it. */
661 #define STRING_LIMIT ((unsigned) 64)
662 #define STRING_ASM_OP "\t.string\t"
663 /* Some svr4 assemblers have a limit on the number of characters which
664 can appear in the operand of a .string directive. If your assembler
665 has such a limitation, you should define STRING_LIMIT to reflect that
666 limit. Note that at least some svr4 assemblers have a limit on the
667 actual number of bytes in the double-quoted string, and that they
668 count each character in an escape sequence as one byte. Thus, an
669 escape sequence like \377 would count as four bytes.
671 If your target assembler doesn't support the .string directive, you
672 should define this to zero. */
674 /* Globalizing directive for a label. */
675 #define GLOBAL_ASM_OP ".global\t"
677 #define SET_ASM_OP "\t.set\t"
679 #define ASM_WEAKEN_LABEL(FILE, NAME) \
680 do \
682 fputs ("\t.weak\t", (FILE)); \
683 assemble_name ((FILE), (NAME)); \
684 fputc ('\n', (FILE)); \
686 while (0)
688 #define SUPPORTS_WEAK 1
690 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
691 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
693 #define HAS_INIT_SECTION 1
695 #define REGISTER_NAMES { \
696 "r0","r1","r2","r3","r4","r5","r6","r7", \
697 "r8","r9","r10","r11","r12","r13","r14","r15", \
698 "r16","r17","r18","r19","r20","r21","r22","r23", \
699 "r24","r25","r26","r27","r28","r29","r30","r31", \
700 "__SP_L__","__SP_H__","argL","argH"}
702 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
704 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
706 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
708 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
710 #define USER_LABEL_PREFIX ""
712 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
714 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
716 gcc_assert (REGNO < 32); \
717 fprintf (STREAM, "\tpush\tr%d", REGNO); \
720 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
722 gcc_assert (REGNO < 32); \
723 fprintf (STREAM, "\tpop\tr%d", REGNO); \
726 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
727 avr_output_addr_vec_elt(STREAM, VALUE)
729 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
730 (switch_to_section (progmem_section), \
731 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM))
733 #define ASM_OUTPUT_SKIP(STREAM, N) \
734 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
736 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
737 do { \
738 if ((POWER) > 1) \
739 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
740 } while (0)
742 #define CASE_VECTOR_MODE HImode
744 extern int avr_case_values_threshold;
746 #define CASE_VALUES_THRESHOLD avr_case_values_threshold
748 #undef WORD_REGISTER_OPERATIONS
750 #define MOVE_MAX 4
752 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
754 #define Pmode HImode
756 #define FUNCTION_MODE HImode
758 #define DOLLARS_IN_IDENTIFIERS 0
760 #define NO_DOLLAR_IN_LABEL 1
762 #define TRAMPOLINE_TEMPLATE(FILE) \
763 internal_error ("trampolines not supported")
765 #define TRAMPOLINE_SIZE 4
767 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
769 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
770 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
772 /* Store in cc_status the expressions
773 that the condition codes will describe
774 after execution of an instruction whose pattern is EXP.
775 Do not alter them if the instruction would not alter the cc's. */
777 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
779 /* The add insns don't set overflow in a usable way. */
780 #define CC_OVERFLOW_UNUSABLE 01000
781 /* The mov,and,or,xor insns don't set carry. That's ok though as the
782 Z bit is all we need when doing unsigned comparisons on the result of
783 these insns (since they're always with 0). However, conditions.h has
784 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
785 understandable. */
786 #define CC_NO_CARRY CC_NO_OVERFLOW
789 /* Output assembler code to FILE to increment profiler label # LABELNO
790 for profiling a function entry. */
792 #define FUNCTION_PROFILER(FILE, LABELNO) \
793 fprintf (FILE, "/* profiler %d */", (LABELNO))
795 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
796 adjust_insn_length (INSN, LENGTH))
798 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
800 #define CC1_SPEC "%{profile:-p}"
802 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
803 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
804 %{!fexceptions:-fno-exceptions}"
805 /* A C string constant that tells the GCC driver program options to
806 pass to `cc1plus'. */
808 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
809 mmcu=*:-mmcu=%*}"
811 #define LINK_SPEC "\
812 %{mrelax:--relax\
813 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
814 %{mmcu=atmega16*:--pmem-wrap-around=16k}\
815 %{mmcu=atmega32*|\
816 mmcu=at90can32*:--pmem-wrap-around=32k}\
817 %{mmcu=atmega64*|\
818 mmcu=at90can64*|\
819 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
820 %{!mmcu*: -m avr2}\
821 %{mmcu=at90s1200|\
822 mmcu=attiny11|\
823 mmcu=attiny12|\
824 mmcu=attiny15|\
825 mmcu=attiny28: -m avr1}\
826 %{mmcu=attiny22|\
827 mmcu=attiny26|\
828 mmcu=at90s2*|\
829 mmcu=at90s4*|\
830 mmcu=at90s8*|\
831 mmcu=at90c8*|\
832 mmcu=at86rf401|\
833 mmcu=attiny13*|\
834 mmcu=attiny2313|\
835 mmcu=attiny24|\
836 mmcu=attiny25|\
837 mmcu=attiny261|\
838 mmcu=attiny4*|\
839 mmcu=attiny8*: -m avr2}\
840 %{mmcu=atmega103|\
841 mmcu=at43*|\
842 mmcu=at76*|\
843 mmcu=at90usb82|\
844 mmcu=at90usb162|\
845 mmcu=attiny167: -m avr3}\
846 %{mmcu=atmega8*|\
847 mmcu=atmega48*|\
848 mmcu=at90pwm1|\
849 mmcu=at90pwm2|\
850 mmcu=at90pwm2b|\
851 mmcu=at90pwm3|\
852 mmcu=at90pwm3b: -m avr4}\
853 %{mmcu=atmega16*|\
854 mmcu=atmega32*|\
855 mmcu=atmega406|\
856 mmcu=atmega64*|\
857 mmcu=atmega128*|\
858 mmcu=at90can*|\
859 mmcu=at90pwm216|\
860 mmcu=at90pwm316|\
861 mmcu=at90usb64*|\
862 mmcu=at90usb128*|\
863 mmcu=at94k: -m avr5}\
864 %{mmcu=atmega256*:-m avr6}\
865 %{mmcu=atmega324*|\
866 mmcu=atmega325*|\
867 mmcu=atmega328p|\
868 mmcu=atmega329*|\
869 mmcu=atmega406|\
870 mmcu=atmega48*|\
871 mmcu=atmega88*|\
872 mmcu=atmega64|\
873 mmcu=atmega644*|\
874 mmcu=atmega645*|\
875 mmcu=atmega649*|\
876 mmcu=atmega128|\
877 mmcu=atmega1284p|\
878 mmcu=atmega162|\
879 mmcu=atmega164*|\
880 mmcu=atmega165*|\
881 mmcu=atmega168*|\
882 mmcu=atmega169*|\
883 mmcu=atmega8hva|\
884 mmcu=atmega16hva|\
885 mmcu=attiny48|\
886 mmcu=attiny88|\
887 mmcu=attiny167|\
888 mmcu=at90can*|\
889 mmcu=at90pwm*|\
890 mmcu=atmega32c1|\
891 mmcu=atmega32m1|\
892 mmcu=atmega32u4|\
893 mmcu=at90usb*: -Tdata 0x800100}\
894 %{mmcu=atmega640|\
895 mmcu=atmega1280|\
896 mmcu=atmega1281|\
897 mmcu=atmega256*: -Tdata 0x800200} "
899 #define LIB_SPEC \
900 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
902 #define LIBSTDCXX "-lgcc"
903 /* No libstdc++ for now. Empty string doesn't work. */
905 #define LIBGCC_SPEC \
906 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
908 #define STARTFILE_SPEC "%(crt_binutils)"
910 #define ENDFILE_SPEC ""
912 #define CRT_BINUTILS_SPECS "\
913 %{mmcu=at90s1200|mmcu=avr1:crts1200.o%s} \
914 %{mmcu=attiny11:crttn11.o%s} \
915 %{mmcu=attiny12:crttn12.o%s} \
916 %{mmcu=attiny15:crttn15.o%s} \
917 %{mmcu=attiny28:crttn28.o%s} \
918 %{!mmcu*|mmcu=at90s8515|mmcu=avr2:crts8515.o%s} \
919 %{mmcu=at90s2313:crts2313.o%s} \
920 %{mmcu=at90s2323:crts2323.o%s} \
921 %{mmcu=at90s2333:crts2333.o%s} \
922 %{mmcu=at90s2343:crts2343.o%s} \
923 %{mmcu=attiny22:crttn22.o%s} \
924 %{mmcu=attiny26:crttn26.o%s} \
925 %{mmcu=at90s4433:crts4433.o%s} \
926 %{mmcu=at90s4414:crts4414.o%s} \
927 %{mmcu=at90s4434:crts4434.o%s} \
928 %{mmcu=at90c8534:crtc8534.o%s} \
929 %{mmcu=at90s8535:crts8535.o%s} \
930 %{mmcu=at86rf401:crt86401.o%s} \
931 %{mmcu=attiny13:crttn13.o%s} \
932 %{mmcu=attiny13a:crttn13a.o%s} \
933 %{mmcu=attiny2313|mmcu=avr25:crttn2313.o%s} \
934 %{mmcu=attiny24:crttn24.o%s} \
935 %{mmcu=attiny44:crttn44.o%s} \
936 %{mmcu=attiny84:crttn84.o%s} \
937 %{mmcu=attiny25:crttn25.o%s} \
938 %{mmcu=attiny45:crttn45.o%s} \
939 %{mmcu=attiny85:crttn85.o%s} \
940 %{mmcu=attiny261:crttn261.o%s} \
941 %{mmcu=attiny461:crttn461.o%s} \
942 %{mmcu=attiny861:crttn861.o%s} \
943 %{mmcu=attiny43u:crttn43u.o%s} \
944 %{mmcu=attiny48:crttn48.o%s} \
945 %{mmcu=attiny88:crttn88.o%s} \
946 %{mmcu=attiny167:crttn167.o%s} \
947 %{mmcu=at43usb355|mmcu=avr3:crt43355.o%s} \
948 %{mmcu=at76c711:crt76711.o%s} \
949 %{mmcu=atmega103|mmcu=avr31:crtm103.o%s} \
950 %{mmcu=at43usb320:crt43320.o%s} \
951 %{mmcu=at90usb162|mmcu=avr35:crtusb162.o%s} \
952 %{mmcu=at90usb82:crtusb82.o%s} \
953 %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
954 %{mmcu=atmega48:crtm48.o%s} \
955 %{mmcu=atmega48p:crtm48p.o%s} \
956 %{mmcu=atmega88:crtm88.o%s} \
957 %{mmcu=atmega88p:crtm88p.o%s} \
958 %{mmcu=atmega8515:crtm8515.o%s} \
959 %{mmcu=atmega8535:crtm8535.o%s} \
960 %{mmcu=at90pwm1:crt90pwm1.o%s} \
961 %{mmcu=at90pwm2:crt90pwm2.o%s} \
962 %{mmcu=at90pwm2b:crt90pwm2b.o%s} \
963 %{mmcu=at90pwm3:crt90pwm3.o%s} \
964 %{mmcu=at90pwm3b:crt90pwm3b.o%s} \
965 %{mmcu=atmega16:crtm16.o%s} \
966 %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
967 %{mmcu=atmega162:crtm162.o%s} \
968 %{mmcu=atmega163:crtm163.o%s} \
969 %{mmcu=atmega164p:crtm164p.o%s} \
970 %{mmcu=atmega165:crtm165.o%s} \
971 %{mmcu=atmega165p:crtm165p.o%s} \
972 %{mmcu=atmega168:crtm168.o%s} \
973 %{mmcu=atmega168p:crtm168p.o%s} \
974 %{mmcu=atmega169:crtm169.o%s} \
975 %{mmcu=atmega169p:crtm169p.o%s} \
976 %{mmcu=atmega32:crtm32.o%s} \
977 %{mmcu=atmega323:crtm323.o%s} \
978 %{mmcu=atmega324p:crtm324p.o%s} \
979 %{mmcu=atmega325:crtm325.o%s} \
980 %{mmcu=atmega325p:crtm325p.o%s} \
981 %{mmcu=atmega3250:crtm3250.o%s} \
982 %{mmcu=atmega3250p:crtm3250p.o%s} \
983 %{mmcu=atmega328p:crtm328p.o%s} \
984 %{mmcu=atmega329:crtm329.o%s} \
985 %{mmcu=atmega329p:crtm329p.o%s} \
986 %{mmcu=atmega3290:crtm3290.o%s} \
987 %{mmcu=atmega3290p:crtm3290p.o%s} \
988 %{mmcu=atmega406:crtm406.o%s} \
989 %{mmcu=atmega64:crtm64.o%s} \
990 %{mmcu=atmega640:crtm640.o%s} \
991 %{mmcu=atmega644:crtm644.o%s} \
992 %{mmcu=atmega644p:crtm644p.o%s} \
993 %{mmcu=atmega645:crtm645.o%s} \
994 %{mmcu=atmega6450:crtm6450.o%s} \
995 %{mmcu=atmega649:crtm649.o%s} \
996 %{mmcu=atmega6490:crtm6490.o%s} \
997 %{mmcu=atmega8hva:crtm8hva.o%s} \
998 %{mmcu=atmega16hva:crtm16hva.o%s} \
999 %{mmcu=at90can32:crtcan32.o%s} \
1000 %{mmcu=at90can64:crtcan64.o%s} \
1001 %{mmcu=at90pwm216:crt90pwm216.o%s} \
1002 %{mmcu=at90pwm316:crt90pwm316.o%s} \
1003 %{mmcu=atmega32c1:crtm32c1.o%s} \
1004 %{mmcu=atmega32m1:crtm32m1.o%s} \
1005 %{mmcu=atmega32u4:crtm32u4.o%s} \
1006 %{mmcu=at90usb646:crtusb646.o%s} \
1007 %{mmcu=at90usb647:crtusb647.o%s} \
1008 %{mmcu=at94k:crtat94k.o%s} \
1009 %{mmcu=atmega128|mmcu=avr51:crtm128.o%s} \
1010 %{mmcu=atmega1280:crtm1280.o%s} \
1011 %{mmcu=atmega1281:crtm1281.o%s} \
1012 %{mmcu=atmega1284p:crtm1284p.o%s} \
1013 %{mmcu=atmega2560:crtm2560.o%s} \
1014 %{mmcu=atmega2561:crtm2561.o%s} \
1015 %{mmcu=at90can128:crtcan128.o%s} \
1016 %{mmcu=at90usb1286:crtusb1286.o%s} \
1017 %{mmcu=at90usb1287:crtusb1287.o%s}"
1019 #define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
1021 /* This is the default without any -mmcu=* option (AT90S*). */
1022 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
1024 /* This is undefined macro for collect2 disabling */
1025 #define LINKER_NAME "ld"
1027 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
1028 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
1030 /* Note that the other files fail to use these
1031 in some of the places where they should. */
1033 #if defined(__STDC__) || defined(ALMOST_STDC)
1034 #define AS2(a,b,c) #a " " #b "," #c
1035 #define AS2C(b,c) " " #b "," #c
1036 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
1037 #define AS1(a,b) #a " " #b
1038 #else
1039 #define AS1(a,b) "a b"
1040 #define AS2(a,b,c) "a b,c"
1041 #define AS2C(b,c) " b,c"
1042 #define AS3(a,b,c,d) "a b,c,d"
1043 #endif
1044 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
1045 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
1046 #define CR_TAB "\n\t"
1048 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1050 #define DWARF2_DEBUGGING_INFO 1
1052 #define DWARF2_ADDR_SIZE 4
1054 #define OBJECT_FORMAT_ELF
1056 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
1057 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
1059 /* A C structure for machine-specific, per-function data.
1060 This is added to the cfun structure. */
1061 struct machine_function GTY(())
1063 /* 'true' - if the current function is a leaf function. */
1064 int is_leaf;
1066 /* 'true' - if current function is a naked function. */
1067 int is_naked;
1069 /* 'true' - if current function is an interrupt function
1070 as specified by the "interrupt" attribute. */
1071 int is_interrupt;
1073 /* 'true' - if current function is a signal function
1074 as specified by the "signal" attribute. */
1075 int is_signal;
1077 /* 'true' - if current function is a 'task' function
1078 as specified by the "OS_task" attribute. */
1079 int is_OS_task;
1081 /* 'true' - if current function is a 'main' function
1082 as specified by the "OS_main" attribute. */
1083 int is_OS_main;