1 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
2 Alan Hayward <alan.hayward@arm.com>
3 David Sherwood <david.sherwood@arm.com>
5 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
7 * config/aarch64/aarch64-protos.h
8 (aarch64_sve_struct_memory_operand_p): Declare.
9 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
10 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
11 (VPRED, vpred): Handle SVE structure modes.
12 * config/aarch64/constraints.md (Utx): New constraint.
13 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
14 (aarch64_sve_struct_nonimmediate_operand): New predicates.
15 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
16 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
17 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
18 structure modes. Split into pieces after RA.
19 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
20 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
22 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
24 (aarch64_classify_address): Likewise.
25 (sizetochar): Move earlier in file.
26 (aarch64_print_operand): Handle SVE register lists.
27 (aarch64_array_mode): New function.
28 (aarch64_sve_struct_memory_operand_p): Likewise.
29 (TARGET_ARRAY_MODE): Redefine.
31 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
32 Alan Hayward <alan.hayward@arm.com>
33 David Sherwood <david.sherwood@arm.com>
35 * target.def (array_mode): New target hook.
36 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
37 * doc/tm.texi: Regenerate.
38 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
39 * hooks.c (hook_optmode_mode_uhwi_none): New function.
40 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
42 * stor-layout.c (mode_for_array): Likewise. Support polynomial
45 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
46 Alan Hayward <alan.hayward@arm.com>
47 David Sherwood <david.sherwood@arm.com>
49 * fold-const.c (fold_binary_loc): Check the argument types
50 rather than the result type when testing for a vector operation.
52 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
54 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
55 * doc/tm.texi: Regenerate.
57 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
58 Alan Hayward <alan.hayward@arm.com>
59 David Sherwood <david.sherwood@arm.com>
61 * doc/invoke.texi (-msve-vector-bits=): Document new option.
62 (sve): Document new AArch64 extension.
63 * doc/md.texi (w): Extend the description of the AArch64
64 constraint to include SVE vectors.
65 (Upl, Upa): Document new AArch64 predicate constraints.
66 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
68 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
69 (msve-vector-bits=): New option.
70 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
71 SVE when these are disabled.
73 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
74 modes. Adjust their number of units based on aarch64_sve_vg.
75 (MAX_BITSIZE_MODE_ANY_MODE): Define.
76 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
77 aarch64_addr_query_type.
78 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
79 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
80 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
81 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
82 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
83 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
84 (aarch64_simd_imm_zero_p): Delete.
85 (aarch64_check_zero_based_sve_index_immediate): Declare.
86 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
87 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
88 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
89 (aarch64_sve_float_mul_immediate_p): Likewise.
90 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
92 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
93 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
94 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
95 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
96 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
97 (aarch64_regmode_natural_size): Likewise.
98 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
99 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
101 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
102 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
103 for VG and the SVE predicate registers.
104 (V_ALIASES): Add a "z"-prefixed alias.
105 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
106 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
107 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
108 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
109 (REG_CLASS_NAMES): Add entries for them.
110 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
111 and the predicate registers.
112 (aarch64_sve_vg): Declare.
113 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
114 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
115 (REGMODE_NATURAL_SIZE): Define.
116 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
118 * config/aarch64/aarch64.c: Include cfgrtl.h.
119 (simd_immediate_info): Add a constructor for series vectors,
120 and an associated step field.
121 (aarch64_sve_vg): New variable.
122 (aarch64_dbx_register_number): Handle VG and the predicate registers.
123 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
124 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
125 (VEC_ANY_DATA, VEC_STRUCT): New constants.
126 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
127 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
128 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
129 (aarch64_get_mask_mode): New functions.
130 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
131 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
132 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
133 predicate modes and predicate registers. Explicitly restrict
134 GPRs to modes of 16 bytes or smaller. Only allow FP registers
135 to store a vector mode if it is recognized by
136 aarch64_classify_vector_mode.
137 (aarch64_regmode_natural_size): New function.
138 (aarch64_hard_regno_caller_save_mode): Return the original mode
140 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
141 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
142 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
143 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
145 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
146 does not overlap dest if the function is frame-related. Handle
148 (aarch64_split_add_offset): New function.
149 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
150 them aarch64_add_offset.
151 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
152 and update call to aarch64_sub_sp.
153 (aarch64_add_cfa_expression): New function.
154 (aarch64_expand_prologue): Pass extra temporary registers to the
155 functions above. Handle the case in which we need to emit new
156 DW_CFA_expressions for registers that were originally saved
157 relative to the stack pointer, but now have to be expressed
158 relative to the frame pointer.
159 (aarch64_output_mi_thunk): Pass extra temporary registers to the
161 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
162 IP0 and IP1 values for SVE frames.
163 (aarch64_expand_vec_series): New function.
164 (aarch64_expand_sve_widened_duplicate): Likewise.
165 (aarch64_expand_sve_const_vector): Likewise.
166 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
167 Handle SVE constants. Use emit_move_insn to move a force_const_mem
168 into the register, rather than emitting a SET directly.
169 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
170 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
171 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
172 (offset_9bit_signed_scaled_p): New functions.
173 (aarch64_replicate_bitmask_imm): New function.
174 (aarch64_bitmask_imm): Use it.
175 (aarch64_cannot_force_const_mem): Reject expressions involving
176 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
177 (aarch64_classify_index): Handle SVE indices, by requiring
178 a plain register index with a scale that matches the element size.
179 (aarch64_classify_address): Handle SVE addresses. Assert that
180 the mode of the address is VOIDmode or an integer mode.
181 Update call to aarch64_classify_symbol.
182 (aarch64_classify_symbolic_expression): Update call to
183 aarch64_classify_symbol.
184 (aarch64_const_vec_all_in_range_p): New function.
185 (aarch64_print_vector_float_operand): Likewise.
186 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
187 "vN" for FP registers with SVE modes. Handle (const ...) vectors
188 and the FP immediates 1.0 and 0.5.
189 (aarch64_print_address_internal): Handle SVE addresses.
190 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
191 (aarch64_regno_regclass): Handle predicate registers.
192 (aarch64_secondary_reload): Handle big-endian reloads of SVE
194 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
195 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
196 (aarch64_convert_sve_vector_bits): New function.
197 (aarch64_override_options): Use it to handle -msve-vector-bits=.
198 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
200 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
201 Handle SVE vector and predicate modes. Accept VL-based constants
202 that need only one temporary register, and VL offsets that require
203 no temporary registers.
204 (aarch64_conditional_register_usage): Mark the predicate registers
205 as fixed if SVE isn't available.
206 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
207 Return true for SVE vector and predicate modes.
208 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
209 rather than an unsigned int. Handle SVE modes.
210 (aarch64_preferred_simd_mode): Update call accordingly. Handle
212 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
214 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
215 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
216 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
217 (aarch64_sve_float_mul_immediate_p): New functions.
218 (aarch64_sve_valid_immediate): New function.
219 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
220 Explicitly reject structure modes. Check for INDEX constants.
221 Handle PTRUE and PFALSE constants.
222 (aarch64_check_zero_based_sve_index_immediate): New function.
223 (aarch64_simd_imm_zero_p): Delete.
224 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
225 vector modes. Accept constants in the range of CNT[BHWD].
226 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
227 ask for an Advanced SIMD mode.
228 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
229 (aarch64_simd_vector_alignment): Handle SVE predicates.
230 (aarch64_vectorize_preferred_vector_alignment): New function.
231 (aarch64_simd_vector_alignment_reachable): Use it instead of
233 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
234 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
236 (MAX_VECT_LEN): Delete.
237 (expand_vec_perm_d): Add a vec_flags field.
238 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
239 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
240 (aarch64_evpc_ext): Don't apply a big-endian lane correction
242 (aarch64_evpc_rev): Rename to...
243 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
244 (aarch64_evpc_rev_global): New function.
245 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
246 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
248 (aarch64_evpc_sve_tbl): New function.
249 (aarch64_expand_vec_perm_const_1): Update after rename of
250 aarch64_evpc_rev. Handle SVE permutes too, trying
251 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
252 than aarch64_evpc_tbl.
253 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
254 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
255 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
256 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
257 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
258 (aarch64_expand_sve_vcond): New functions.
259 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
260 of aarch64_vector_mode_p.
261 (aarch64_dwarf_poly_indeterminate_value): New function.
262 (aarch64_compute_pressure_classes): Likewise.
263 (aarch64_can_change_mode_class): Likewise.
264 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
265 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
266 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
267 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
268 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
269 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
270 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
271 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
273 (Dn, Dl, Dr): Accept const as well as const_vector.
274 (Dz): Likewise. Compare against CONST0_RTX.
275 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
276 of "vector" where appropriate.
277 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
278 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
279 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
280 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
281 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
282 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
283 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
284 (v_int_equiv): Extend to SVE modes.
285 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
287 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
288 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
289 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
290 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
291 (SVE_COND_FP_CMP): New int iterators.
292 (perm_hilo): Handle the new unpack unspecs.
293 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
295 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
296 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
297 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
298 (aarch64_equality_operator, aarch64_constant_vector_operand)
299 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
300 (aarch64_sve_nonimmediate_operand): Likewise.
301 (aarch64_sve_general_operand): Likewise.
302 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
303 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
304 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
305 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
306 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
307 (aarch64_sve_float_arith_immediate): Likewise.
308 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
309 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
310 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
311 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
312 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
313 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
314 (aarch64_sve_float_arith_operand): Likewise.
315 (aarch64_sve_float_arith_with_sub_operand): Likewise.
316 (aarch64_sve_float_mul_operand): Likewise.
317 (aarch64_sve_vec_perm_operand): Likewise.
318 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
319 (aarch64_mov_operand): Accept const_poly_int and const_vector.
320 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
321 as well as const_vector.
322 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
323 in file. Use CONST0_RTX and CONSTM1_RTX.
324 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
325 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
326 Use aarch64_simd_imm_zero.
327 * config/aarch64/aarch64-sve.md: New file.
328 * config/aarch64/aarch64.md: Include it.
329 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
330 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
331 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
332 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
333 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
334 (sve): New attribute.
335 (enabled): Disable instructions with the sve attribute unless
337 (movqi, movhi): Pass CONST_POLY_INT operaneds through
338 aarch64_expand_mov_immediate.
339 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
340 CNT[BHSD] immediates.
341 (movti): Split CONST_POLY_INT moves into two halves.
342 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
343 Split additions that need a temporary here if the destination
344 is the stack pointer.
345 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
346 (*add<mode>3_poly_1): New instruction.
347 (set_clobber_cc): New expander.
349 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
351 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
352 parameter and use it instead of GET_MODE_SIZE (innermode). Use
353 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
354 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
355 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
356 Change innermode from fixed_mode_size to machine_mode.
357 (simplify_subreg): Update call accordingly. Handle a constant-sized
358 subreg of a variable-length CONST_VECTOR.
360 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
361 Alan Hayward <alan.hayward@arm.com>
362 David Sherwood <david.sherwood@arm.com>
364 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
365 (add_offset_to_base): New function, split out from...
366 (create_mem_ref): ...here. When handling a scale other than 1,
367 check first whether the address is valid without the offset.
368 Add it into the base if so, leaving the index and scale as-is.
370 2018-01-12 Jakub Jelinek <jakub@redhat.com>
373 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
374 fold_for_warn before checking if arg2 is INTEGER_CST.
376 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
378 * config/rs6000/predicates.md (load_multiple_operation): Delete.
379 (store_multiple_operation): Delete.
380 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
381 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
382 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
383 guarded by TARGET_STRING.
384 (rs6000_output_load_multiple): Delete.
385 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
386 OPTION_MASK_STRING / TARGET_STRING handling.
387 (print_operand) <'N', 'O'>: Add comment that these are unused now.
388 (const rs6000_opt_masks) <"string">: Change mask to 0.
389 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
390 (MASK_STRING): Delete.
391 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
393 (load_multiple): Delete.
400 (store_multiple): Delete.
407 (movmemsi_8reg): Delete.
408 (corresponding unnamed define_insn): Delete.
409 (movmemsi_6reg): Delete.
410 (corresponding unnamed define_insn): Delete.
411 (movmemsi_4reg): Delete.
412 (corresponding unnamed define_insn): Delete.
413 (movmemsi_2reg): Delete.
414 (corresponding unnamed define_insn): Delete.
415 (movmemsi_1reg): Delete.
416 (corresponding unnamed define_insn): Delete.
417 * config/rs6000/rs6000.opt (mno-string): New.
418 (mstring): Replace by deprecation warning stub.
419 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
421 2018-01-12 Jakub Jelinek <jakub@redhat.com>
423 * regrename.c (regrename_do_replace): If replacing the same
424 reg multiple times, try to reuse last created gen_raw_REG.
427 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
428 main to workaround a bug in GDB.
430 2018-01-12 Tom de Vries <tom@codesourcery.com>
433 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
435 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
437 PR rtl-optimization/80481
438 * ira-color.c (get_cap_member): New function.
439 (allocnos_conflict_by_live_ranges_p): Use it.
440 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
441 (setup_slot_coalesced_allocno_live_ranges): Ditto.
443 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
446 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
447 (*saddl_se_1): Ditto.
449 (*saddl_se_1): Ditto.
451 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
453 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
454 rather than wi::to_widest for DR_INITs.
455 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
456 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
457 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
459 (vect_analyze_group_access_1): Note that here.
461 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
463 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
464 polynomial type sizes.
466 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
468 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
469 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
470 (gimple_add_tmp_var): Likewise.
472 2018-01-12 Martin Liska <mliska@suse.cz>
474 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
475 (gimple_alloc_sizes): Likewise.
476 (dump_gimple_statistics): Use PRIu64 in printf format.
477 * gimple.h: Change uint64_t to int.
479 2018-01-12 Martin Liska <mliska@suse.cz>
481 * tree-core.h: Use uint64_t instead of int.
482 * tree.c (tree_node_counts): Likewise.
483 (tree_node_sizes): Likewise.
484 (dump_tree_statistics): Use PRIu64 in printf format.
486 2018-01-12 Martin Liska <mliska@suse.cz>
488 * Makefile.in: As qsort_chk is implemented in vec.c, add
489 vec.o to linkage of gencfn-macros.
490 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
491 passing the info to record_node_allocation_statistics.
492 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
494 * ggc-common.c (struct ggc_usage): Add operator== and use
495 it in operator< and compare function.
496 * mem-stats.h (struct mem_usage): Likewise.
497 * vec.c (struct vec_usage): Remove operator< and compare
498 function. Can be simply inherited.
500 2018-01-12 Martin Jambor <mjambor@suse.cz>
503 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
504 * tree-ssa-math-opts.c: Include domwalk.h.
505 (convert_mult_to_fma_1): New function.
506 (fma_transformation_info): New type.
507 (fma_deferring_state): Likewise.
508 (cancel_fma_deferring): New function.
509 (result_of_phi): Likewise.
510 (last_fma_candidate_feeds_initial_phi): Likewise.
511 (convert_mult_to_fma): Added deferring logic, split actual
512 transformation to convert_mult_to_fma_1.
513 (math_opts_dom_walker): New type.
514 (math_opts_dom_walker::after_dom_children): New method, body moved
515 here from pass_optimize_widening_mul::execute, added deferring logic
517 (pass_optimize_widening_mul::execute): Moved most of code to
518 math_opts_dom_walker::after_dom_children.
519 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
520 * config/i386/i386.c (ix86_option_override_internal): Added
521 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
523 2018-01-12 Richard Biener <rguenther@suse.de>
526 * dwarf2out.c (gen_variable_die): Do not reset old_die for
527 inline instance vars.
529 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
532 * config/rx/rx.c (rx_is_restricted_memory_address):
535 2018-01-12 Richard Biener <rguenther@suse.de>
537 PR tree-optimization/80846
538 * target.def (split_reduction): New target hook.
539 * targhooks.c (default_split_reduction): New function.
540 * targhooks.h (default_split_reduction): Declare.
541 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
542 target requests first reduce vectors by combining low and high
544 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
545 (get_vectype_for_scalar_type_and_size): Export.
546 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
547 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
548 * doc/tm.texi: Regenerate.
549 * config/i386/i386.c (ix86_split_reduction): Implement
550 TARGET_VECTORIZE_SPLIT_REDUCTION.
552 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
555 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
556 in PIC mode except for TARGET_VXWORKS_RTP.
557 * config/sparc/sparc.c: Include cfgrtl.h.
558 (TARGET_INIT_PIC_REG): Define.
559 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
560 (sparc_pic_register_p): New predicate.
561 (sparc_legitimate_address_p): Use it.
562 (sparc_legitimize_pic_address): Likewise.
563 (sparc_delegitimize_address): Likewise.
564 (sparc_mode_dependent_address_p): Likewise.
565 (gen_load_pcrel_sym): Remove 4th parameter.
566 (load_got_register): Adjust call to above. Remove obsolete stuff.
567 (sparc_expand_prologue): Do not call load_got_register here.
568 (sparc_flat_expand_prologue): Likewise.
569 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
570 (sparc_use_pseudo_pic_reg): New function.
571 (sparc_init_pic_reg): Likewise.
572 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
573 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
575 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
577 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
578 Add item for branch_cost.
580 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
582 PR rtl-optimization/83565
583 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
584 not extend the result to a larger mode for rotate operations.
585 (num_sign_bit_copies1): Likewise.
587 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
590 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
592 Use values-Xc.o for -pedantic.
593 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
595 2018-01-12 Martin Liska <mliska@suse.cz>
598 * ipa-devirt.c (final_warning_record::grow_type_warnings):
600 (possible_polymorphic_call_targets): Use it.
601 (ipa_devirt): Likewise.
603 2018-01-12 Martin Liska <mliska@suse.cz>
605 * profile-count.h (enum profile_quality): Use 0 as invalid
606 enum value of profile_quality.
608 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
610 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
611 -mext-string options.
613 2018-01-12 Richard Biener <rguenther@suse.de>
615 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
616 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
617 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
619 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
621 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
623 * configure.ac (--with-long-double-format): Add support for the
624 configuration option to change the default long double format on
626 * config.gcc (powerpc*-linux*-*): Likewise.
627 * configure: Regenerate.
628 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
629 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
630 used without modification.
632 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
634 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
635 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
636 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
637 MISC_BUILTIN_SPEC_BARRIER.
638 (rs6000_init_builtins): Likewise.
639 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
641 (speculation_barrier): New define_insn.
642 * doc/extend.texi: Document __builtin_speculation_barrier.
644 2018-01-11 Jakub Jelinek <jakub@redhat.com>
647 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
648 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
649 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
651 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
652 integral modes instead of "ss" and "sd".
653 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
654 vectors with 32-bit and 64-bit elements.
655 (vecdupssescalarmodesuffix): New mode attribute.
656 (vec_dup<mode>): Use it.
658 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
661 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
662 frame if argument is passed on stack.
664 2018-01-11 Jakub Jelinek <jakub@redhat.com>
667 * ree.c (combine_reaching_defs): Optimize also
668 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
669 reg2=any_extend(exp); reg1=reg2;, formatting fix.
671 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
674 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
676 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
679 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
680 after they are computed.
682 2018-01-11 Bin Cheng <bin.cheng@arm.com>
684 PR tree-optimization/83695
685 * gimple-loop-linterchange.cc
686 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
687 reset cached scev information after interchange.
688 (pass_linterchange::execute): Remove call to scev_reset_htab.
690 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
692 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
693 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
694 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
695 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
696 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
697 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
698 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
699 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
700 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
701 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
702 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
703 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
704 (V_lane_reg): Likewise.
705 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
707 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
708 (vfmal_lane_low<mode>_intrinsic,
709 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
710 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
711 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
712 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
713 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
714 vfmsl_lane_high<mode>_intrinsic): New define_insns.
716 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
718 * config/arm/arm-cpus.in (fp16fml): New feature.
719 (ALL_SIMD): Add fp16fml.
720 (armv8.2-a): Add fp16fml as an option.
721 (armv8.3-a): Likewise.
722 (armv8.4-a): Add fp16fml as part of fp16.
723 * config/arm/arm.h (TARGET_FP16FML): Define.
724 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
726 * config/arm/arm-modes.def (V2HF): Define.
727 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
728 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
729 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
730 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
731 vfmsl_low, vfmsl_high): New set of builtins.
732 * config/arm/iterators.md (PLUSMINUS): New code iterator.
733 (vfml_op): New code attribute.
734 (VFMLHALVES): New int iterator.
735 (VFML, VFMLSEL): New mode attributes.
736 (V_reg): Define mapping for V2HF.
737 (V_hi, V_lo): New mode attributes.
738 (VF_constraint): Likewise.
739 (vfml_half, vfml_half_selector): New int attributes.
740 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
742 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
743 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
745 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
746 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
747 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
748 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
750 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
751 Document new effective target and option set.
753 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
755 * config/arm/arm-cpus.in (armv8_4): New feature.
756 (ARMv8_4a): New fgroup.
757 (armv8.4-a): New arch.
758 * config/arm/arm-tables.opt: Regenerate.
759 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
760 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
761 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
762 Add matching rules for -march=armv8.4-a and extensions.
763 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
765 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
768 * config/rx/rx.md (BW): New mode attribute.
769 (sync_lock_test_and_setsi): Add mode suffix to insn output.
771 2018-01-11 Richard Biener <rguenther@suse.de>
773 PR tree-optimization/83435
774 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
775 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
776 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
778 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
779 Alan Hayward <alan.hayward@arm.com>
780 David Sherwood <david.sherwood@arm.com>
782 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
784 (aarch64_classify_address): Initialize it. Track polynomial offsets.
785 (aarch64_print_address_internal): Use it to check for a zero offset.
787 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
788 Alan Hayward <alan.hayward@arm.com>
789 David Sherwood <david.sherwood@arm.com>
791 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
792 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
793 Return a poly_int64 rather than a HOST_WIDE_INT.
794 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
795 rather than a HOST_WIDE_INT.
796 * config/aarch64/aarch64.h (aarch64_frame): Protect with
797 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
798 hard_fp_offset, frame_size, initial_adjust, callee_offset and
799 final_offset from HOST_WIDE_INT to poly_int64.
800 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
801 to_constant when getting the number of units in an Advanced SIMD
803 (aarch64_builtin_vectorized_function): Check for a constant number
805 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
807 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
808 attribute instead of GET_MODE_NUNITS.
809 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
810 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
811 GET_MODE_SIZE for fixed-size registers.
812 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
813 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
814 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
815 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
816 (aarch64_print_operand, aarch64_print_address_internal)
817 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
818 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
819 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
820 Handle polynomial GET_MODE_SIZE.
821 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
822 wider than SImode without modification.
823 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
824 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
825 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
826 passing and returning SVE modes.
827 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
829 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
830 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
831 (aarch64_allocate_and_probe_stack_space): Likewise.
832 (aarch64_layout_frame): Cope with polynomial offsets.
833 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
834 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
836 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
837 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
838 poly_int64 rather than a HOST_WIDE_INT.
839 (aarch64_get_separate_components, aarch64_process_components)
840 (aarch64_expand_prologue, aarch64_expand_epilogue)
841 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
842 (aarch64_anchor_offset): New function, split out from...
843 (aarch64_legitimize_address): ...here.
844 (aarch64_builtin_vectorization_cost): Handle polynomial
845 TYPE_VECTOR_SUBPARTS.
846 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
848 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
849 number of elements from the PARALLEL rather than the mode.
850 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
851 rather than GET_MODE_BITSIZE.
852 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
853 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
854 (aarch64_expand_vec_perm_const_1): Handle polynomial
855 d->perm.length () and d->perm elements.
856 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
857 Apply to_constant to d->perm elements.
858 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
859 polynomial CONST_VECTOR_NUNITS.
860 (aarch64_move_pointer): Take amount as a poly_int64 rather
862 (aarch64_progress_pointer): Avoid temporary variable.
863 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
864 the mode attribute instead of GET_MODE.
866 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
867 Alan Hayward <alan.hayward@arm.com>
868 David Sherwood <david.sherwood@arm.com>
870 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
871 x exists before using it.
872 (aarch64_add_constant_internal): Rename to...
873 (aarch64_add_offset_1): ...this. Replace regnum with separate
874 src and dest rtxes. Handle the case in which they're different,
875 including when the offset is zero. Replace scratchreg with an rtx.
876 Use 2 additions if there is no spare register into which we can
877 move a 16-bit constant.
878 (aarch64_add_constant): Delete.
879 (aarch64_add_offset): Replace reg with separate src and dest
880 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
881 Use aarch64_add_offset_1.
882 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
883 an rtx rather than an int. Take the delta as a poly_int64
884 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
885 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
886 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
887 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
888 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
890 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
891 aarch64_add_constant.
893 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
895 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
896 Use scalar_float_mode.
898 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
900 * config/aarch64/aarch64-simd.md
901 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
902 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
903 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
904 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
905 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
906 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
907 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
908 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
909 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
910 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
912 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
915 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
916 targ_options->x_arm_arch_string is non NULL.
918 2018-01-11 Tamar Christina <tamar.christina@arm.com>
920 * config/aarch64/aarch64.h
921 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
923 2018-01-11 Sudakshina Das <sudi.das@arm.com>
926 * expmed.c (emit_store_flag_force): Swap if const op0
927 and change VOIDmode to mode of op0.
929 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
931 PR rtl-optimization/83761
932 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
933 than bytes to mode_for_size.
935 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
938 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
939 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
942 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
945 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
947 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
948 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
951 2018-01-10 Michael Collison <michael.collison@arm.com>
953 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
954 * config/aarch64/aarch64-option-extension.def: Add
955 AARCH64_OPT_EXTENSION of 'fp16fml'.
956 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
957 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
958 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
959 * config/aarch64/constraints.md (Ui7): New constraint.
960 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
961 (VFMLA_SEL_W): Ditto.
964 (VFMLA16_LOW): New int iterator.
965 (VFMLA16_HIGH): Ditto.
966 (UNSPEC_FMLAL): New unspec.
967 (UNSPEC_FMLSL): Ditto.
968 (UNSPEC_FMLAL2): Ditto.
969 (UNSPEC_FMLSL2): Ditto.
970 (f16mac): New code attribute.
971 * config/aarch64/aarch64-simd-builtins.def
972 (aarch64_fmlal_lowv2sf): Ditto.
973 (aarch64_fmlsl_lowv2sf): Ditto.
974 (aarch64_fmlalq_lowv4sf): Ditto.
975 (aarch64_fmlslq_lowv4sf): Ditto.
976 (aarch64_fmlal_highv2sf): Ditto.
977 (aarch64_fmlsl_highv2sf): Ditto.
978 (aarch64_fmlalq_highv4sf): Ditto.
979 (aarch64_fmlslq_highv4sf): Ditto.
980 (aarch64_fmlal_lane_lowv2sf): Ditto.
981 (aarch64_fmlsl_lane_lowv2sf): Ditto.
982 (aarch64_fmlal_laneq_lowv2sf): Ditto.
983 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
984 (aarch64_fmlalq_lane_lowv4sf): Ditto.
985 (aarch64_fmlsl_lane_lowv4sf): Ditto.
986 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
987 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
988 (aarch64_fmlal_lane_highv2sf): Ditto.
989 (aarch64_fmlsl_lane_highv2sf): Ditto.
990 (aarch64_fmlal_laneq_highv2sf): Ditto.
991 (aarch64_fmlsl_laneq_highv2sf): Ditto.
992 (aarch64_fmlalq_lane_highv4sf): Ditto.
993 (aarch64_fmlsl_lane_highv4sf): Ditto.
994 (aarch64_fmlalq_laneq_highv4sf): Ditto.
995 (aarch64_fmlsl_laneq_highv4sf): Ditto.
996 * config/aarch64/aarch64-simd.md:
997 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
998 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
999 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
1000 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
1001 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
1002 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
1003 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
1004 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
1005 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
1006 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
1007 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
1008 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
1009 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
1010 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
1011 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
1012 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
1013 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
1014 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
1015 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
1016 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
1017 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
1018 (vfmlsl_low_u32): Ditto.
1019 (vfmlalq_low_u32): Ditto.
1020 (vfmlslq_low_u32): Ditto.
1021 (vfmlal_high_u32): Ditto.
1022 (vfmlsl_high_u32): Ditto.
1023 (vfmlalq_high_u32): Ditto.
1024 (vfmlslq_high_u32): Ditto.
1025 (vfmlal_lane_low_u32): Ditto.
1026 (vfmlsl_lane_low_u32): Ditto.
1027 (vfmlal_laneq_low_u32): Ditto.
1028 (vfmlsl_laneq_low_u32): Ditto.
1029 (vfmlalq_lane_low_u32): Ditto.
1030 (vfmlslq_lane_low_u32): Ditto.
1031 (vfmlalq_laneq_low_u32): Ditto.
1032 (vfmlslq_laneq_low_u32): Ditto.
1033 (vfmlal_lane_high_u32): Ditto.
1034 (vfmlsl_lane_high_u32): Ditto.
1035 (vfmlal_laneq_high_u32): Ditto.
1036 (vfmlsl_laneq_high_u32): Ditto.
1037 (vfmlalq_lane_high_u32): Ditto.
1038 (vfmlslq_lane_high_u32): Ditto.
1039 (vfmlalq_laneq_high_u32): Ditto.
1040 (vfmlslq_laneq_high_u32): Ditto.
1041 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
1042 (AARCH64_FL_FOR_ARCH8_4): New.
1043 (AARCH64_ISA_F16FML): New ISA flag.
1044 (TARGET_F16FML): New feature flag for fp16fml.
1045 (doc/invoke.texi): Document new fp16fml option.
1047 2018-01-10 Michael Collison <michael.collison@arm.com>
1049 * config/aarch64/aarch64-builtins.c:
1050 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
1051 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1052 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
1053 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
1054 (AARCH64_ISA_SHA3): New ISA flag.
1055 (TARGET_SHA3): New feature flag for sha3.
1056 * config/aarch64/iterators.md (sha512_op): New int attribute.
1057 (CRYPTO_SHA512): New int iterator.
1058 (UNSPEC_SHA512H): New unspec.
1059 (UNSPEC_SHA512H2): Ditto.
1060 (UNSPEC_SHA512SU0): Ditto.
1061 (UNSPEC_SHA512SU1): Ditto.
1062 * config/aarch64/aarch64-simd-builtins.def
1063 (aarch64_crypto_sha512hqv2di): New builtin.
1064 (aarch64_crypto_sha512h2qv2di): Ditto.
1065 (aarch64_crypto_sha512su0qv2di): Ditto.
1066 (aarch64_crypto_sha512su1qv2di): Ditto.
1067 (aarch64_eor3qv8hi): Ditto.
1068 (aarch64_rax1qv2di): Ditto.
1069 (aarch64_xarqv2di): Ditto.
1070 (aarch64_bcaxqv8hi): Ditto.
1071 * config/aarch64/aarch64-simd.md:
1072 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
1073 (aarch64_crypto_sha512su0qv2di): Ditto.
1074 (aarch64_crypto_sha512su1qv2di): Ditto.
1075 (aarch64_eor3qv8hi): Ditto.
1076 (aarch64_rax1qv2di): Ditto.
1077 (aarch64_xarqv2di): Ditto.
1078 (aarch64_bcaxqv8hi): Ditto.
1079 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
1080 (vsha512h2q_u64): Ditto.
1081 (vsha512su0q_u64): Ditto.
1082 (vsha512su1q_u64): Ditto.
1083 (veor3q_u16): Ditto.
1084 (vrax1q_u64): Ditto.
1086 (vbcaxq_u16): Ditto.
1087 * config/arm/types.md (crypto_sha512): New type attribute.
1088 (crypto_sha3): Ditto.
1089 (doc/invoke.texi): Document new sha3 option.
1091 2018-01-10 Michael Collison <michael.collison@arm.com>
1093 * config/aarch64/aarch64-builtins.c:
1094 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
1095 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1096 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
1097 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
1098 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
1099 (AARCH64_ISA_SM4): New ISA flag.
1100 (TARGET_SM4): New feature flag for sm4.
1101 * config/aarch64/aarch64-simd-builtins.def
1102 (aarch64_sm3ss1qv4si): Ditto.
1103 (aarch64_sm3tt1aq4si): Ditto.
1104 (aarch64_sm3tt1bq4si): Ditto.
1105 (aarch64_sm3tt2aq4si): Ditto.
1106 (aarch64_sm3tt2bq4si): Ditto.
1107 (aarch64_sm3partw1qv4si): Ditto.
1108 (aarch64_sm3partw2qv4si): Ditto.
1109 (aarch64_sm4eqv4si): Ditto.
1110 (aarch64_sm4ekeyqv4si): Ditto.
1111 * config/aarch64/aarch64-simd.md:
1112 (aarch64_sm3ss1qv4si): Ditto.
1113 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
1114 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
1115 (aarch64_sm4eqv4si): Ditto.
1116 (aarch64_sm4ekeyqv4si): Ditto.
1117 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
1118 (sm3part_op): Ditto.
1119 (CRYPTO_SM3TT): Ditto.
1120 (CRYPTO_SM3PART): Ditto.
1121 (UNSPEC_SM3SS1): New unspec.
1122 (UNSPEC_SM3TT1A): Ditto.
1123 (UNSPEC_SM3TT1B): Ditto.
1124 (UNSPEC_SM3TT2A): Ditto.
1125 (UNSPEC_SM3TT2B): Ditto.
1126 (UNSPEC_SM3PARTW1): Ditto.
1127 (UNSPEC_SM3PARTW2): Ditto.
1128 (UNSPEC_SM4E): Ditto.
1129 (UNSPEC_SM4EKEY): Ditto.
1130 * config/aarch64/constraints.md (Ui2): New constraint.
1131 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
1132 * config/arm/types.md (crypto_sm3): New type attribute.
1133 (crypto_sm4): Ditto.
1134 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
1135 (vsm3tt1aq_u32): Ditto.
1136 (vsm3tt1bq_u32): Ditto.
1137 (vsm3tt2aq_u32): Ditto.
1138 (vsm3tt2bq_u32): Ditto.
1139 (vsm3partw1q_u32): Ditto.
1140 (vsm3partw2q_u32): Ditto.
1141 (vsm4eq_u32): Ditto.
1142 (vsm4ekeyq_u32): Ditto.
1143 (doc/invoke.texi): Document new sm4 option.
1145 2018-01-10 Michael Collison <michael.collison@arm.com>
1147 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
1148 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
1149 (AARCH64_FL_FOR_ARCH8_4): New.
1150 (AARCH64_FL_V8_4): New flag.
1151 (doc/invoke.texi): Document new armv8.4-a option.
1153 2018-01-10 Michael Collison <michael.collison@arm.com>
1155 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
1156 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
1157 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
1158 * config/aarch64/aarch64-option-extension.def: Add
1159 AARCH64_OPT_EXTENSION of 'sha2'.
1160 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
1161 (crypto): Disable sha2 and aes if crypto disabled.
1162 (crypto): Enable aes and sha2 if enabled.
1163 (simd): Disable sha2 and aes if simd disabled.
1164 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
1166 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
1167 (TARGET_SHA2): New feature flag for sha2.
1168 (TARGET_AES): New feature flag for aes.
1169 * config/aarch64/aarch64-simd.md:
1170 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
1171 conditional on TARGET_AES.
1172 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
1173 (aarch64_crypto_sha1hsi): Make pattern conditional
1175 (aarch64_crypto_sha1hv4si): Ditto.
1176 (aarch64_be_crypto_sha1hv4si): Ditto.
1177 (aarch64_crypto_sha1su1v4si): Ditto.
1178 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
1179 (aarch64_crypto_sha1su0v4si): Ditto.
1180 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
1181 (aarch64_crypto_sha256su0v4si): Ditto.
1182 (aarch64_crypto_sha256su1v4si): Ditto.
1183 (doc/invoke.texi): Document new aes and sha2 options.
1185 2018-01-10 Martin Sebor <msebor@redhat.com>
1187 PR tree-optimization/83781
1188 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
1191 2018-01-11 Martin Sebor <msebor@gmail.com>
1192 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
1194 PR tree-optimization/83501
1195 PR tree-optimization/81703
1197 * tree-ssa-strlen.c (get_string_cst): Rename...
1198 (get_string_len): ...to this. Handle global constants.
1199 (handle_char_store): Adjust.
1201 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
1202 Jim Wilson <jimw@sifive.com>
1204 * config/riscv/riscv-protos.h (riscv_output_return): New.
1205 * config/riscv/riscv.c (struct machine_function): New naked_p field.
1206 (riscv_attribute_table, riscv_output_return),
1207 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
1208 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
1209 (riscv_compute_frame_info): Only compute frame->mask if not a naked
1211 (riscv_expand_prologue): Add early return for naked function.
1212 (riscv_expand_epilogue): Likewise.
1213 (riscv_function_ok_for_sibcall): Return false for naked function.
1214 (riscv_set_current_function): New.
1215 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
1216 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
1217 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
1218 * doc/extend.texi (RISC-V Function Attributes): New.
1220 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
1222 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
1223 check for 128-bit long double before checking TCmode.
1224 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
1225 128-bit long doubles before checking TFmode or TCmode.
1226 (FLOAT128_IBM_P): Likewise.
1228 2018-01-10 Martin Sebor <msebor@redhat.com>
1230 PR tree-optimization/83671
1231 * builtins.c (c_strlen): Unconditionally return zero for the empty
1233 Use -Warray-bounds for warnings.
1234 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
1235 for non-constant array indices with COMPONENT_REF, arrays of
1236 arrays, and pointers to arrays.
1237 (gimple_fold_builtin_strlen): Determine and set length range for
1238 non-constant character arrays.
1240 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
1243 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
1246 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
1248 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
1250 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1253 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
1254 VECTOR_MEM_ALTIVEC_OR_VSX_P.
1255 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
1256 indexed_or_indirect_operand predicate.
1257 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
1258 (*vsx_le_perm_load_v8hi): Likewise.
1259 (*vsx_le_perm_load_v16qi): Likewise.
1260 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
1261 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
1262 (*vsx_le_perm_store_v8hi): Likewise.
1263 (*vsx_le_perm_store_v16qi): Likewise.
1264 (eight unnamed splitters): Likewise.
1266 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
1268 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
1269 * config/rs6000/emmintrin.h: Likewise.
1270 * config/rs6000/mmintrin.h: Likewise.
1271 * config/rs6000/xmmintrin.h: Likewise.
1273 2018-01-10 David Malcolm <dmalcolm@redhat.com>
1276 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
1278 * tree.c (tree_nop_conversion): Return true for location wrapper
1280 (maybe_wrap_with_location): New function.
1281 (selftest::check_strip_nops): New function.
1282 (selftest::test_location_wrappers): New function.
1283 (selftest::tree_c_tests): Call it.
1284 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
1285 (maybe_wrap_with_location): New decl.
1286 (EXPR_LOCATION_WRAPPER_P): New macro.
1287 (location_wrapper_p): New inline function.
1288 (tree_strip_any_location_wrapper): New inline function.
1290 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
1293 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
1294 stack_realign_offset for the largest alignment of stack slot
1296 (ix86_find_max_used_stack_alignment): New function.
1297 (ix86_finalize_stack_frame_flags): Use it. Set
1298 max_used_stack_alignment if we don't realign stack.
1299 * config/i386/i386.h (machine_function): Add
1300 max_used_stack_alignment.
1302 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
1304 * config/arm/arm.opt (-mbranch-cost): New option.
1305 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
1308 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
1311 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
1312 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
1314 2018-01-10 Richard Biener <rguenther@suse.de>
1317 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
1318 early out so it also covers the case where we have a non-NULL
1321 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
1323 PR tree-optimization/83753
1324 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
1325 for non-strided grouped accesses if the number of elements is 1.
1327 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
1330 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
1331 * i386.h (TARGET_USE_GATHER): Define.
1332 * x86-tune.def (X86_TUNE_USE_GATHER): New.
1334 2018-01-10 Martin Liska <mliska@suse.cz>
1337 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
1338 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
1340 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
1341 CLEANUP_NO_PARTITIONING is not set.
1343 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
1345 * doc/rtl.texi: Remove documentation of (const ...) wrappers
1346 for vectors, as a partial revert of r254296.
1347 * rtl.h (const_vec_p): Delete.
1348 (const_vec_duplicate_p): Don't test for vector CONSTs.
1349 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
1350 * expmed.c (make_tree): Likewise.
1353 * common.md (E, F): Use CONSTANT_P instead of checking for
1355 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
1356 checking for CONST_VECTOR.
1358 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1361 * predict.c (force_edge_cold): Handle in more sane way edges
1364 2018-01-09 Carl Love <cel@us.ibm.com>
1366 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
1368 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
1369 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
1370 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
1371 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
1372 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
1373 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
1374 * config/rs6000/rs6000-protos.h: Add extern defition for
1375 rs6000_generate_float2_double_code.
1376 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
1378 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
1379 (float2_v2df): Add define_expand.
1381 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
1384 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
1385 op_mode in the force_to_mode call.
1387 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1389 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
1390 instead of checking each element individually.
1391 (aarch64_evpc_uzp): Likewise.
1392 (aarch64_evpc_zip): Likewise.
1393 (aarch64_evpc_ext): Likewise.
1394 (aarch64_evpc_rev): Likewise.
1395 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
1396 instead of checking each element individually. Return true without
1398 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
1399 whether all selected elements come from the same input, instead of
1400 checking each element individually. Remove calls to gen_rtx_REG,
1401 start_sequence and end_sequence and instead assert that no rtl is
1404 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1406 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
1407 order of HIGH and CONST checks.
1409 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
1411 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
1412 if the destination isn't an SSA_NAME.
1414 2018-01-09 Richard Biener <rguenther@suse.de>
1416 PR tree-optimization/83668
1417 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
1419 (canonicalize_loop_form): ... here, renamed from ...
1420 (canonicalize_loop_closed_ssa_form): ... this and amended to
1421 swap successor edges for loop exit blocks to make us use
1422 the RPO order we need for initial schedule generation.
1424 2018-01-09 Joseph Myers <joseph@codesourcery.com>
1426 PR tree-optimization/64811
1427 * match.pd: When optimizing comparisons with Inf, avoid
1428 introducing or losing exceptions from comparisons with NaN.
1430 2018-01-09 Martin Liska <mliska@suse.cz>
1433 * asan.c (shadow_mem_size): Add gcc_assert.
1435 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
1437 Don't save registers in main().
1440 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
1441 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
1442 * config/avr/avr.c (avr_set_current_function): Don't error if
1443 naked, OS_task or OS_main are specified at the same time.
1444 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
1446 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
1448 * common/config/avr/avr-common.c (avr_option_optimization_table):
1449 Switch on -mmain-is-OS_task for optimizing compilations.
1451 2018-01-09 Richard Biener <rguenther@suse.de>
1453 PR tree-optimization/83572
1454 * graphite.c: Include cfganal.h.
1455 (graphite_transform_loops): Connect infinite loops to exit
1456 and remove fake edges at the end.
1458 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1460 * ipa-inline.c (edge_badness): Revert accidental checkin.
1462 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
1465 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
1466 symbols; not inline clones.
1468 2018-01-09 Jakub Jelinek <jakub@redhat.com>
1471 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
1472 hard registers. Formatting fixes.
1474 PR preprocessor/83722
1475 * gcc.c (try_generate_repro): Pass
1476 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
1477 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
1480 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
1481 Kito Cheng <kito.cheng@gmail.com>
1483 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
1484 (riscv_leaf_function_p): Delete.
1485 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
1487 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1489 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
1491 (do_ifelse): New function.
1492 (do_isel): New function.
1493 (do_sub3): New function.
1494 (do_add3): New function.
1495 (do_load_mask_compare): New function.
1496 (do_overlap_load_compare): New function.
1497 (expand_compare_loop): New function.
1498 (expand_block_compare): Call expand_compare_loop() when appropriate.
1499 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
1501 (-mblock-compare-inline-loop-limit): New option.
1503 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1506 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
1507 Reverse order of second and third operands in first alternative.
1508 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
1509 of first and second elements in UNSPEC_VPERMR vector.
1510 (altivec_expand_vec_perm_le): Likewise.
1512 2017-01-08 Jeff Law <law@redhat.com>
1514 PR rtl-optimizatin/81308
1515 * tree-switch-conversion.c (cfg_altered): New file scoped static.
1516 (process_switch): If group_case_labels makes a change, then set
1518 (pass_convert_switch::execute): If a switch is converted, then
1519 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
1521 PR rtl-optimization/81308
1522 * recog.c (split_all_insns): Conditionally cleanup the CFG after
1525 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
1527 PR target/83663 - Revert r255946
1528 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
1529 generation for cases where splatting a value is not useful.
1530 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
1531 across a vec_duplicate and a paradoxical subreg forming a vector
1532 mode to a vec_concat.
1534 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1536 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
1537 -march=armv8.3-a variants.
1538 * config/arm/t-multilib: Likewise.
1539 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
1541 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
1543 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
1545 (cceq_ior_compare_complement): Give it a name so I can use it, and
1546 change boolean_or_operator predicate to boolean_operator so it can
1547 be used to generate a crand.
1548 (eqne): New code iterator.
1549 (bd/bd_neg): New code_attrs.
1550 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
1551 a single define_insn.
1552 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
1553 decrement (bdnzt/bdnzf/bdzt/bdzf).
1554 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
1555 with the new names of the branch decrement patterns, and added the
1556 names of the branch decrement conditional patterns.
1558 2018-01-08 Richard Biener <rguenther@suse.de>
1560 PR tree-optimization/83563
1561 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
1564 2018-01-08 Richard Biener <rguenther@suse.de>
1567 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
1569 2018-01-08 Richard Biener <rguenther@suse.de>
1571 PR tree-optimization/83685
1572 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
1573 references to abnormals.
1575 2018-01-08 Richard Biener <rguenther@suse.de>
1578 * dwarf2out.c (output_indirect_strings): Handle empty
1579 skeleton_debug_str_hash.
1580 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
1582 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1584 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
1585 (emit_store_direct): Likewise.
1586 (arc_trampoline_adjust_address): Likewise.
1587 (arc_asm_trampoline_template): New function.
1588 (arc_initialize_trampoline): Use asm_trampoline_template.
1589 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
1590 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
1591 * config/arc/arc.md (flush_icache): Delete pattern.
1593 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
1595 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
1596 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
1599 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1602 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
1603 by not USED_FOR_TARGET.
1604 (make_pass_resolve_sw_modes): Likewise.
1606 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
1608 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
1611 2018-01-08 Richard Biener <rguenther@suse.de>
1614 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
1616 2018-01-08 Richard Biener <rguenther@suse.de>
1619 * match.pd ((t * 2) / 2) -> t): Add missing :c.
1621 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
1624 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
1625 basic blocks with a small number of successors.
1626 (convert_control_dep_chain_into_preds): Improve handling of
1628 (dump_predicates): Split apart into...
1629 (dump_pred_chain): ...here...
1630 (dump_pred_info): ...and here.
1631 (can_one_predicate_be_invalidated_p): Add debugging printfs.
1632 (can_chain_union_be_invalidated_p): Improve check for invalidation
1634 (uninit_uses_cannot_happen): Avoid unnecessary if
1635 convert_control_dep_chain_into_preds yielded nothing.
1637 2018-01-06 Martin Sebor <msebor@redhat.com>
1639 PR tree-optimization/83640
1640 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
1641 subtracting negative offset from size.
1642 (builtin_access::overlap): Adjust offset bounds of the access to fall
1643 within the size of the object if possible.
1645 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
1647 PR rtl-optimization/83699
1648 * expmed.c (extract_bit_field_1): Restrict the vector usage of
1649 extract_bit_field_as_subreg to cases in which the extracted
1650 value is also a vector.
1652 * lra-constraints.c (process_alt_operands): Test for the equivalence
1653 substitutions when detecting a possible reload cycle.
1655 2018-01-06 Jakub Jelinek <jakub@redhat.com>
1658 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
1659 by default if flag_selective_schedling{,2}. Formatting fixes.
1661 PR rtl-optimization/83682
1662 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
1663 if it has non-VECTOR_MODE element mode.
1664 (vec_duplicate_p): Likewise.
1667 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
1668 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
1670 2018-01-05 Jakub Jelinek <jakub@redhat.com>
1673 * config/i386/i386-builtin.def
1674 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
1675 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
1676 Require also OPTION_MASK_ISA_AVX512F in addition to
1677 OPTION_MASK_ISA_GFNI.
1678 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
1679 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
1680 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
1681 to OPTION_MASK_ISA_GFNI.
1682 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
1683 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
1684 OPTION_MASK_ISA_AVX512BW.
1685 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
1686 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
1687 addition to OPTION_MASK_ISA_GFNI.
1688 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
1689 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
1690 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
1691 to OPTION_MASK_ISA_GFNI.
1692 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
1693 a requirement for all ISAs rather than any of them with a few
1695 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
1697 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
1698 bitmasks to be enabled with 3 exceptions, instead of requiring any
1699 enabled ISA with lots of exceptions.
1700 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
1701 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
1702 Change avx512bw in isa attribute to avx512f.
1703 * config/i386/sgxintrin.h: Add license boilerplate.
1704 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
1705 to __AVX512F__ and __AVX512VL to __AVX512VL__.
1706 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
1707 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
1709 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
1710 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
1711 temporarily sse2 rather than sse if not enabled already.
1714 * config/i386/sse.md (VI248_VLBW): Rename to ...
1715 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
1716 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
1717 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
1718 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
1719 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
1720 mode iterator instead of VI248_VLBW.
1722 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
1724 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
1725 (record_modified): Skip clobbers; add debug output.
1726 (param_change_prob): Use sreal frequencies.
1728 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
1730 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
1731 punt for user-aligned variables.
1733 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
1735 * tree-chrec.c (chrec_contains_symbols): Return true for
1738 2018-01-05 Sudakshina Das <sudi.das@arm.com>
1741 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
1742 of (x|y) == x for BICS pattern.
1744 2018-01-05 Jakub Jelinek <jakub@redhat.com>
1746 PR tree-optimization/83605
1747 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
1748 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
1751 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
1753 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
1754 * config/epiphany/rtems.h: New file.
1756 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1757 Uros Bizjak <ubizjak@gmail.com>
1760 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
1761 QIreg_operand instead of register_operand predicate.
1762 * config/i386/i386.c (ix86_rop_should_change_byte_p,
1763 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
1764 comments instead of -fmitigate[-_]rop.
1766 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1769 * cgraphunit.c (symbol_table::compile): Switch to text_section
1770 before calling assembly_start debug hook.
1771 * run-rtl-passes.c (run_rtl_passes): Likewise.
1774 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1776 * tree-vrp.c (extract_range_from_binary_expr_1): Check
1777 range_int_cst_p rather than !symbolic_range_p before calling
1778 extract_range_from_multiplicative_op_1.
1780 2017-01-04 Jeff Law <law@redhat.com>
1782 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
1783 redundant test in assertion.
1785 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1787 * doc/rtl.texi: Document machine_mode wrapper classes.
1789 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1791 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
1794 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1796 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
1797 the VEC_PERM_EXPR fold to fail.
1799 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1802 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
1803 to switched_sections.
1805 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1808 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
1811 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
1814 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
1815 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
1817 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1820 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
1821 is BLKmode and bitpos not zero or mode change is needed.
1823 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
1826 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
1829 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
1832 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
1833 instead of MULT rtx. Update all corresponding splitters.
1835 (*ssub<modesuffix>): Ditto.
1837 (*cmp_sadd_di): Update split patterns.
1838 (*cmp_sadd_si): Ditto.
1839 (*cmp_sadd_sidi): Ditto.
1840 (*cmp_ssub_di): Ditto.
1841 (*cmp_ssub_si): Ditto.
1842 (*cmp_ssub_sidi): Ditto.
1843 * config/alpha/predicates.md (const23_operand): New predicate.
1844 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
1845 Look for ASHIFT, not MULT inner operand.
1846 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
1848 2018-01-04 Martin Liska <mliska@suse.cz>
1850 PR gcov-profile/83669
1851 * gcov.c (output_intermediate_file): Add version to intermediate
1853 * doc/gcov.texi: Document new field 'version' in intermediate
1854 file format. Fix location of '-k' option of gcov command.
1856 2018-01-04 Martin Liska <mliska@suse.cz>
1859 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
1861 2018-01-04 Jakub Jelinek <jakub@redhat.com>
1863 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
1865 2018-01-03 Martin Sebor <msebor@redhat.com>
1867 PR tree-optimization/83655
1868 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
1869 checking calls with invalid arguments.
1871 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1873 * tree-vect-stmts.c (vect_get_store_rhs): New function.
1874 (vectorizable_mask_load_store): Delete.
1875 (vectorizable_call): Return false for masked loads and stores.
1876 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
1877 instead of gimple_assign_rhs1.
1878 (vectorizable_load): Handle IFN_MASK_LOAD.
1879 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
1881 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1883 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
1885 (vectorizable_mask_load_store): ...here.
1886 (vectorizable_load): ...and here.
1888 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1890 * tree-vect-stmts.c (vect_build_all_ones_mask)
1891 (vect_build_zero_merge_argument): New functions, split out from...
1892 (vectorizable_load): ...here.
1894 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1896 * tree-vect-stmts.c (vect_check_store_rhs): New function,
1898 (vectorizable_mask_load_store): ...here.
1899 (vectorizable_store): ...and here.
1901 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1903 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
1905 (vectorizable_mask_load_store): ...here.
1907 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1909 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
1910 (vect_model_store_cost): Take a vec_load_store_type instead of a
1912 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
1913 (vect_model_store_cost): Take a vec_load_store_type instead of a
1915 (vectorizable_mask_load_store): Update accordingly.
1916 (vectorizable_store): Likewise.
1917 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
1919 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1921 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
1922 IFN_MASK_LOAD calls here rather than...
1923 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
1925 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1926 Alan Hayward <alan.hayward@arm.com>
1927 David Sherwood <david.sherwood@arm.com>
1929 * expmed.c (extract_bit_field_1): For vector extracts,
1930 fall back to extract_bit_field_as_subreg if vec_extract
1933 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1934 Alan Hayward <alan.hayward@arm.com>
1935 David Sherwood <david.sherwood@arm.com>
1937 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
1938 they are variable or constant sized.
1939 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
1940 slots for constant-sized data.
1942 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1943 Alan Hayward <alan.hayward@arm.com>
1944 David Sherwood <david.sherwood@arm.com>
1946 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
1947 handling COND_EXPRs with boolean comparisons, try to find a better
1948 basis for the mask type than the boolean itself.
1950 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1952 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
1953 is calculated and how it can be overridden.
1954 * genmodes.c (max_bitsize_mode_any_mode): New variable.
1955 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
1957 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
1960 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1961 Alan Hayward <alan.hayward@arm.com>
1962 David Sherwood <david.sherwood@arm.com>
1964 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
1965 Remove the mode argument.
1966 (aarch64_simd_valid_immediate): Remove the mode and inverse
1968 * config/aarch64/iterators.md (bitsize): New iterator.
1969 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
1970 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
1971 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
1972 aarch64_simd_valid_immediate.
1973 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
1974 (aarch64_reg_or_bic_imm): Likewise.
1975 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
1976 with an insn_type enum and msl with a modifier_type enum.
1977 Replace element_width with a scalar_mode. Change the shift
1978 to unsigned int. Add constructors for scalar_float_mode and
1979 scalar_int_mode elements.
1980 (aarch64_vect_float_const_representable_p): Delete.
1981 (aarch64_can_const_movi_rtx_p)
1982 (aarch64_simd_scalar_immediate_valid_for_move)
1983 (aarch64_simd_make_constant): Update call to
1984 aarch64_simd_valid_immediate.
1985 (aarch64_advsimd_valid_immediate_hs): New function.
1986 (aarch64_advsimd_valid_immediate): Likewise.
1987 (aarch64_simd_valid_immediate): Remove mode and inverse
1988 arguments. Rewrite to use the above. Use const_vec_duplicate_p
1989 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
1990 and aarch64_float_const_representable_p on the result.
1991 (aarch64_output_simd_mov_immediate): Remove mode argument.
1992 Update call to aarch64_simd_valid_immediate and use of
1993 simd_immediate_info.
1994 (aarch64_output_scalar_simd_mov_immediate): Update call
1997 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
1998 Alan Hayward <alan.hayward@arm.com>
1999 David Sherwood <david.sherwood@arm.com>
2001 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
2002 (mode_nunits): Likewise CONST_MODE_NUNITS.
2003 * machmode.def (ADJUST_NUNITS): Document.
2004 * genmodes.c (mode_data::need_nunits_adj): New field.
2005 (blank_mode): Update accordingly.
2006 (adj_nunits): New variable.
2007 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
2009 (emit_mode_size_inline): Set need_bytesize_adj for all modes
2010 listed in adj_nunits.
2011 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
2012 listed in adj_nunits. Don't emit case statements for such modes.
2013 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
2014 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
2015 nothing if adj_nunits is nonnull.
2016 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
2017 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
2018 (emit_mode_fbit): Update use of print_maybe_const_decl.
2019 (emit_move_size): Likewise. Treat the array as non-const
2021 (emit_mode_adjustments): Handle adj_nunits.
2023 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2025 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
2026 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
2027 (VECTOR_MODES): Use it.
2028 (make_vector_modes): Take the prefix as an argument.
2030 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2031 Alan Hayward <alan.hayward@arm.com>
2032 David Sherwood <david.sherwood@arm.com>
2034 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
2035 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
2036 for MODE_VECTOR_BOOL.
2037 * machmode.def (VECTOR_BOOL_MODE): Document.
2038 * genmodes.c (VECTOR_BOOL_MODE): New macro.
2039 (make_vector_bool_mode): New function.
2040 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
2042 * lto-streamer-in.c (lto_input_mode_table): Likewise.
2043 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
2045 * stor-layout.c (int_mode_for_mode): Likewise.
2046 * tree.c (build_vector_type_for_mode): Likewise.
2047 * varasm.c (output_constant_pool_2): Likewise.
2048 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
2049 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
2050 for MODE_VECTOR_BOOL.
2051 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
2052 of mode class checks.
2053 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
2054 instead of a list of mode class checks.
2055 (expand_vector_scalar_condition): Likewise.
2056 (type_for_widest_vector_mode): Handle BImode as an inner mode.
2058 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2059 Alan Hayward <alan.hayward@arm.com>
2060 David Sherwood <david.sherwood@arm.com>
2062 * machmode.h (mode_size): Change from unsigned short to
2064 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
2065 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2066 or if measurement_type is not polynomial.
2067 (fixed_size_mode::includes_p): Check for constant-sized modes.
2068 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
2069 return a poly_uint16 rather than an unsigned short.
2070 (emit_mode_size): Change the type of mode_size from unsigned short
2071 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
2072 (emit_mode_adjustments): Cope with polynomial vector sizes.
2073 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2075 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2077 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
2078 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
2079 * caller-save.c (setup_save_areas): Likewise.
2080 (replace_reg_with_saved_mem): Likewise.
2081 * calls.c (emit_library_call_value_1): Likewise.
2082 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
2083 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
2084 (gen_lowpart_for_combine): Likewise.
2085 * convert.c (convert_to_integer_1): Likewise.
2086 * cse.c (equiv_constant, cse_insn): Likewise.
2087 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
2088 (cselib_subst_to_values): Likewise.
2089 * dce.c (word_dce_process_block): Likewise.
2090 * df-problems.c (df_word_lr_mark_ref): Likewise.
2091 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
2092 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
2093 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
2094 (rtl_for_decl_location): Likewise.
2095 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
2096 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
2097 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
2098 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
2099 (expand_expr_real_1): Likewise.
2100 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
2101 (pad_below): Likewise.
2102 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2103 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
2104 * ira.c (get_subreg_tracking_sizes): Likewise.
2105 * ira-build.c (ira_create_allocno_objects): Likewise.
2106 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
2107 (ira_sort_regnos_for_alter_reg): Likewise.
2108 * ira-costs.c (record_operand_costs): Likewise.
2109 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
2110 (resolve_simple_move): Likewise.
2111 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
2112 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
2113 (lra_constraints): Likewise.
2114 (CONST_POOL_OK_P): Reject variable-sized modes.
2115 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
2116 (add_pseudo_to_slot, lra_spill): Likewise.
2117 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2118 * optabs-query.c (get_best_extraction_insn): Likewise.
2119 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2120 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
2121 (expand_mult_highpart, valid_multiword_target_p): Likewise.
2122 * recog.c (offsettable_address_addr_space_p): Likewise.
2123 * regcprop.c (maybe_mode_change): Likewise.
2124 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
2125 * regrename.c (build_def_use): Likewise.
2126 * regstat.c (dump_reg_info): Likewise.
2127 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
2128 (find_reloads, find_reloads_subreg_address): Likewise.
2129 * reload1.c (eliminate_regs_1): Likewise.
2130 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
2131 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
2132 (simplify_binary_operation_1, simplify_subreg): Likewise.
2133 * targhooks.c (default_function_arg_padding): Likewise.
2134 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
2135 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
2136 (verify_gimple_assign_ternary): Likewise.
2137 * tree-inline.c (estimate_move_cost): Likewise.
2138 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2139 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
2140 (get_address_cost_ainc): Likewise.
2141 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
2142 (vect_supportable_dr_alignment): Likewise.
2143 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2144 (vectorizable_reduction): Likewise.
2145 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
2146 (vectorizable_operation, vectorizable_load): Likewise.
2147 * tree.c (build_same_sized_truth_vector_type): Likewise.
2148 * valtrack.c (cleanup_auto_inc_dec): Likewise.
2149 * var-tracking.c (emit_note_insn_var_location): Likewise.
2150 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
2151 (ADDR_VEC_ALIGN): Likewise.
2153 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2154 Alan Hayward <alan.hayward@arm.com>
2155 David Sherwood <david.sherwood@arm.com>
2157 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
2159 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
2160 or if measurement_type is polynomial.
2161 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
2162 * combine.c (make_extraction): Likewise.
2163 * dse.c (find_shift_sequence): Likewise.
2164 * dwarf2out.c (mem_loc_descriptor): Likewise.
2165 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
2166 (extract_bit_field, extract_low_bits): Likewise.
2167 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
2168 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
2169 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
2170 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
2171 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
2172 * reload.c (find_reloads): Likewise.
2173 * reload1.c (alter_reg): Likewise.
2174 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
2175 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
2176 * tree-if-conv.c (predicate_mem_writes): Likewise.
2177 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
2178 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
2179 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
2180 * valtrack.c (dead_debug_insert_temp): Likewise.
2181 * varasm.c (mergeable_constant_section): Likewise.
2182 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
2184 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2185 Alan Hayward <alan.hayward@arm.com>
2186 David Sherwood <david.sherwood@arm.com>
2188 * expr.c (expand_assignment): Cope with polynomial mode sizes
2189 when assigning to a CONCAT.
2191 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2192 Alan Hayward <alan.hayward@arm.com>
2193 David Sherwood <david.sherwood@arm.com>
2195 * machmode.h (mode_precision): Change from unsigned short to
2197 (mode_to_precision): Return a poly_uint16 rather than an unsigned
2199 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
2200 or if measurement_type is not polynomial.
2201 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
2202 in which the mode is already known to be a scalar_int_mode.
2203 * genmodes.c (emit_mode_precision): Change the type of mode_precision
2204 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
2206 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2207 for GET_MODE_PRECISION.
2208 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2209 for GET_MODE_PRECISION.
2210 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
2212 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
2213 (expand_field_assignment, make_extraction): Likewise.
2214 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
2215 (get_last_value): Likewise.
2216 * convert.c (convert_to_integer_1): Likewise.
2217 * cse.c (cse_insn): Likewise.
2218 * expr.c (expand_expr_real_1): Likewise.
2219 * lra-constraints.c (simplify_operand_subreg): Likewise.
2220 * optabs-query.c (can_atomic_load_p): Likewise.
2221 * optabs.c (expand_atomic_load): Likewise.
2222 (expand_atomic_store): Likewise.
2223 * ree.c (combine_reaching_defs): Likewise.
2224 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
2225 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
2226 * tree.h (type_has_mode_precision_p): Likewise.
2227 * ubsan.c (instrument_si_overflow): Likewise.
2229 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2230 Alan Hayward <alan.hayward@arm.com>
2231 David Sherwood <david.sherwood@arm.com>
2233 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
2234 polynomial numbers of units.
2235 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
2236 (valid_vector_subparts_p): New function.
2237 (build_vector_type): Remove temporary shim and take the number
2238 of units as a poly_uint64 rather than an int.
2239 (build_opaque_vector_type): Take the number of units as a
2240 poly_uint64 rather than an int.
2241 * tree.c (build_vector_from_ctor): Handle polynomial
2242 TYPE_VECTOR_SUBPARTS.
2243 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
2244 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
2245 (build_vector_from_val): If the number of units is variable,
2246 use build_vec_duplicate_cst for constant operands and
2247 VEC_DUPLICATE_EXPR otherwise.
2248 (make_vector_type): Remove temporary is_constant ().
2249 (build_vector_type, build_opaque_vector_type): Take the number of
2250 units as a poly_uint64 rather than an int.
2251 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
2253 * cfgexpand.c (expand_debug_expr): Likewise.
2254 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
2255 (store_constructor, expand_expr_real_1): Likewise.
2256 (const_scalar_mask_from_tree): Likewise.
2257 * fold-const-call.c (fold_const_reduction): Likewise.
2258 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
2259 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
2260 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
2261 (fold_relational_const): Likewise.
2262 (native_interpret_vector): Likewise. Change the size from an
2263 int to an unsigned int.
2264 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
2265 TYPE_VECTOR_SUBPARTS.
2266 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
2267 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
2268 duplicating a non-constant operand into a variable-length vector.
2269 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
2270 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
2271 * ipa-icf.c (sem_variable::equals): Likewise.
2272 * match.pd: Likewise.
2273 * omp-simd-clone.c (simd_clone_subparts): Likewise.
2274 * print-tree.c (print_node): Likewise.
2275 * stor-layout.c (layout_type): Likewise.
2276 * targhooks.c (default_builtin_vectorization_cost): Likewise.
2277 * tree-cfg.c (verify_gimple_comparison): Likewise.
2278 (verify_gimple_assign_binary): Likewise.
2279 (verify_gimple_assign_ternary): Likewise.
2280 (verify_gimple_assign_single): Likewise.
2281 * tree-pretty-print.c (dump_generic_node): Likewise.
2282 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
2283 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
2284 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
2285 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
2286 (vect_shift_permute_load_chain): Likewise.
2287 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
2288 (expand_vector_condition, optimize_vector_constructor): Likewise.
2289 (lower_vec_perm, get_compute_type): Likewise.
2290 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
2291 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
2292 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
2293 (vect_recog_mask_conversion_pattern): Likewise.
2294 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
2295 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
2296 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
2297 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
2298 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
2299 (vectorizable_shift, vectorizable_operation, vectorizable_store)
2300 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
2301 (supportable_widening_operation): Likewise.
2302 (supportable_narrowing_operation): Likewise.
2303 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
2305 * varasm.c (output_constant): Likewise.
2307 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2308 Alan Hayward <alan.hayward@arm.com>
2309 David Sherwood <david.sherwood@arm.com>
2311 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
2312 so that both the length == 3 and length != 3 cases set up their
2313 own permute vectors. Add comments explaining why we know the
2314 number of elements is constant.
2315 (vect_permute_load_chain): Likewise.
2317 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2318 Alan Hayward <alan.hayward@arm.com>
2319 David Sherwood <david.sherwood@arm.com>
2321 * machmode.h (mode_nunits): Change from unsigned char to
2323 (ONLY_FIXED_SIZE_MODES): New macro.
2324 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
2325 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
2326 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
2328 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
2329 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
2330 or if measurement_type is not polynomial.
2331 * genmodes.c (ZERO_COEFFS): New macro.
2332 (emit_mode_nunits_inline): Make mode_nunits_inline return a
2334 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
2335 Use ZERO_COEFFS when emitting initializers.
2336 * data-streamer.h (bp_pack_poly_value): New function.
2337 (bp_unpack_poly_value): Likewise.
2338 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
2339 for GET_MODE_NUNITS.
2340 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
2341 for GET_MODE_NUNITS.
2342 * tree.c (make_vector_type): Remove temporary shim and make
2343 the real function take the number of units as a poly_uint64
2345 (build_vector_type_for_mode): Handle polynomial nunits.
2346 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
2347 * emit-rtl.c (const_vec_series_p_1): Likewise.
2348 (gen_rtx_CONST_VECTOR): Likewise.
2349 * fold-const.c (test_vec_duplicate_folding): Likewise.
2350 * genrecog.c (validate_pattern): Likewise.
2351 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
2352 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
2353 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
2354 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
2355 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
2356 * rtlanal.c (subreg_get_info): Likewise.
2357 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
2358 (vect_grouped_load_supported): Likewise.
2359 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
2360 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
2361 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
2362 (simplify_const_unary_operation, simplify_binary_operation_1)
2363 (simplify_const_binary_operation, simplify_ternary_operation)
2364 (test_vector_ops_duplicate, test_vector_ops): Likewise.
2365 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
2366 instead of CONST_VECTOR_NUNITS.
2367 * varasm.c (output_constant_pool_2): Likewise.
2368 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
2369 explicit-encoded elements in the XVEC for variable-length vectors.
2371 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2373 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
2375 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2376 Alan Hayward <alan.hayward@arm.com>
2377 David Sherwood <david.sherwood@arm.com>
2379 * coretypes.h (fixed_size_mode): Declare.
2380 (fixed_size_mode_pod): New typedef.
2381 * builtins.h (target_builtins::x_apply_args_mode)
2382 (target_builtins::x_apply_result_mode): Change type to
2383 fixed_size_mode_pod.
2384 * builtins.c (apply_args_size, apply_result_size, result_vector)
2385 (expand_builtin_apply_args_1, expand_builtin_apply)
2386 (expand_builtin_return): Update accordingly.
2388 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2390 * cse.c (hash_rtx_cb): Hash only the encoded elements.
2391 * cselib.c (cselib_hash_rtx): Likewise.
2392 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
2393 CONST_VECTOR encoding.
2395 2017-01-03 Jakub Jelinek <jakub@redhat.com>
2396 Jeff Law <law@redhat.com>
2399 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
2400 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
2401 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
2402 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
2405 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
2406 explicitly probe *sp in a noreturn function if there were any callee
2407 register saves or frame pointer is needed.
2409 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2412 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
2413 BLKmode for ternary, binary or unary expressions.
2416 * var-tracking.c (delete_vta_debug_insn): New inline function.
2417 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
2418 insns from get_insns () to NULL instead of each bb separately.
2419 Use delete_vta_debug_insn. No longer static.
2420 (vt_debug_insns_local, variable_tracking_main_1): Adjust
2421 delete_vta_debug_insns callers.
2422 * rtl.h (delete_vta_debug_insns): Declare.
2423 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
2424 instead of variable_tracking_main.
2426 2018-01-03 Martin Sebor <msebor@redhat.com>
2428 PR tree-optimization/83603
2429 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
2430 arguments past the endof the argument list in functions declared
2431 without a prototype.
2432 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
2433 Avoid checking when arguments are null.
2435 2018-01-03 Martin Sebor <msebor@redhat.com>
2438 * doc/extend.texi (attribute const): Fix a typo.
2439 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
2440 issuing -Wsuggest-attribute for void functions.
2442 2018-01-03 Martin Sebor <msebor@redhat.com>
2444 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
2445 offset_int::from instead of wide_int::to_shwi.
2446 (maybe_diag_overlap): Remove assertion.
2447 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
2448 * gimple-ssa-sprintf.c (format_directive): Same.
2449 (parse_directive): Same.
2450 (sprintf_dom_walker::compute_format_length): Same.
2451 (try_substitute_return_value): Same.
2453 2017-01-03 Jeff Law <law@redhat.com>
2456 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
2457 non-constant residual for zero at runtime and avoid probing in
2458 that case. Reorganize code for trailing problem to mirror handling
2461 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2463 PR tree-optimization/83501
2464 * tree-ssa-strlen.c (get_string_cst): New.
2465 (handle_char_store): Call get_string_cst.
2467 2018-01-03 Martin Liska <mliska@suse.cz>
2469 PR tree-optimization/83593
2470 * tree-ssa-strlen.c: Include tree-cfg.h.
2471 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
2472 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
2473 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
2475 (strlen_dom_walker::before_dom_children): Call
2476 gimple_purge_dead_eh_edges. Dump tranformation with details
2478 (strlen_dom_walker::before_dom_children): Update call by adding
2479 new argument cleanup_eh.
2480 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
2482 2018-01-03 Martin Liska <mliska@suse.cz>
2485 * cif-code.def (VARIADIC_THUNK): New enum value.
2486 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
2489 2018-01-03 Jan Beulich <jbeulich@suse.com>
2491 * sse.md (mov<mode>_internal): Tighten condition for when to use
2492 vmovdqu<ssescalarsize> for TI and OI modes.
2494 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2496 Update copyright years.
2498 2018-01-03 Martin Liska <mliska@suse.cz>
2501 * ipa-visibility.c (function_and_variable_visibility): Skip
2502 functions with noipa attribure.
2504 2018-01-03 Jakub Jelinek <jakub@redhat.com>
2506 * gcc.c (process_command): Update copyright notice dates.
2507 * gcov-dump.c (print_version): Ditto.
2508 * gcov.c (print_version): Ditto.
2509 * gcov-tool.c (print_version): Ditto.
2510 * gengtype.c (create_file): Ditto.
2511 * doc/cpp.texi: Bump @copying's copyright year.
2512 * doc/cppinternals.texi: Ditto.
2513 * doc/gcc.texi: Ditto.
2514 * doc/gccint.texi: Ditto.
2515 * doc/gcov.texi: Ditto.
2516 * doc/install.texi: Ditto.
2517 * doc/invoke.texi: Ditto.
2519 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2521 * vector-builder.h (vector_builder::m_full_nelts): Change from
2522 unsigned int to poly_uint64.
2523 (vector_builder::full_nelts): Update prototype accordingly.
2524 (vector_builder::new_vector): Likewise.
2525 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
2526 (vector_builder::operator ==): Likewise.
2527 (vector_builder::finalize): Likewise.
2528 * int-vector-builder.h (int_vector_builder::int_vector_builder):
2529 Take the number of elements as a poly_uint64 rather than an
2531 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
2532 from unsigned int to poly_uint64.
2533 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
2534 (vec_perm_indices::new_vector): Likewise.
2535 (vec_perm_indices::length): Likewise.
2536 (vec_perm_indices::nelts_per_input): Likewise.
2537 (vec_perm_indices::input_nelts): Likewise.
2538 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
2539 number of elements per input as a poly_uint64 rather than an
2540 unsigned int. Use the original encoding for variable-length
2541 vectors, rather than clamping each individual element.
2542 For the second and subsequent elements in each pattern,
2543 clamp the step and base before clamping their sum.
2544 (vec_perm_indices::series_p): Handle polynomial element counts.
2545 (vec_perm_indices::all_in_range_p): Likewise.
2546 (vec_perm_indices_to_tree): Likewise.
2547 (vec_perm_indices_to_rtx): Likewise.
2548 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
2549 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
2550 (tree_vector_builder::new_binary_operation): Handle polynomial
2551 element counts. Return false if we need to know the number
2552 of elements at compile time.
2553 * fold-const.c (fold_vec_perm): Punt if the number of elements
2554 isn't known at compile time.
2556 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2558 * vec-perm-indices.h (vec_perm_builder): Change element type
2559 from HOST_WIDE_INT to poly_int64.
2560 (vec_perm_indices::element_type): Update accordingly.
2561 (vec_perm_indices::clamp): Handle polynomial element_types.
2562 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
2563 (vec_perm_indices::all_in_range_p): Likewise.
2564 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
2566 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
2567 polynomial vec_perm_indices element types.
2568 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
2569 * fold-const.c (fold_vec_perm): Likewise.
2570 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
2571 * tree-vect-generic.c (lower_vec_perm): Likewise.
2572 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
2573 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
2574 element type to HOST_WIDE_INT.
2576 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2577 Alan Hayward <alan.hayward@arm.com>
2578 David Sherwood <david.sherwood@arm.com>
2580 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
2581 rather than an int. Use plus_constant.
2582 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
2583 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
2585 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2586 Alan Hayward <alan.hayward@arm.com>
2587 David Sherwood <david.sherwood@arm.com>
2589 * calls.c (emit_call_1, expand_call): Change struct_value_size from
2590 a HOST_WIDE_INT to a poly_int64.
2592 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2593 Alan Hayward <alan.hayward@arm.com>
2594 David Sherwood <david.sherwood@arm.com>
2596 * calls.c (load_register_parameters): Cope with polynomial
2597 mode sizes. Require a constant size for BLKmode parameters
2598 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
2599 forces a parameter to be padded at the lsb end in order to
2600 fill a complete number of words, require the parameter size
2601 to be ordered wrt UNITS_PER_WORD.
2603 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2604 Alan Hayward <alan.hayward@arm.com>
2605 David Sherwood <david.sherwood@arm.com>
2607 * reload1.c (spill_stack_slot_width): Change element type
2608 from unsigned int to poly_uint64_pod.
2609 (alter_reg): Treat mode sizes as polynomial.
2611 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2612 Alan Hayward <alan.hayward@arm.com>
2613 David Sherwood <david.sherwood@arm.com>
2615 * reload.c (complex_word_subreg_p): New function.
2616 (reload_inner_reg_of_subreg, push_reload): Use it.
2618 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2619 Alan Hayward <alan.hayward@arm.com>
2620 David Sherwood <david.sherwood@arm.com>
2622 * lra-constraints.c (process_alt_operands): Reject matched
2623 operands whose sizes aren't ordered.
2624 (match_reload): Refer to this check here.
2626 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2627 Alan Hayward <alan.hayward@arm.com>
2628 David Sherwood <david.sherwood@arm.com>
2630 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
2631 that the mode size is in the set {1, 2, 4, 8, 16}.
2633 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2634 Alan Hayward <alan.hayward@arm.com>
2635 David Sherwood <david.sherwood@arm.com>
2637 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
2638 Use plus_constant instead of gen_rtx_PLUS.
2640 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2641 Alan Hayward <alan.hayward@arm.com>
2642 David Sherwood <david.sherwood@arm.com>
2644 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
2645 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
2646 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
2647 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
2648 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
2649 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
2650 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
2651 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
2652 * config/i386/i386.c (ix86_push_rounding): ...this new function.
2653 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
2655 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
2656 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
2657 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
2658 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
2659 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
2660 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
2661 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
2662 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
2663 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
2664 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
2666 * expr.c (emit_move_resolve_push): Treat the input and result
2667 of PUSH_ROUNDING as a poly_int64.
2668 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
2669 (emit_push_insn): Likewise.
2670 * lra-eliminations.c (mark_not_eliminable): Likewise.
2671 * recog.c (push_operand): Likewise.
2672 * reload1.c (elimination_effects): Likewise.
2673 * rtlanal.c (nonzero_bits1): Likewise.
2674 * calls.c (store_one_arg): Likewise. Require the padding to be
2675 known at compile time.
2677 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2678 Alan Hayward <alan.hayward@arm.com>
2679 David Sherwood <david.sherwood@arm.com>
2681 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
2682 Use plus_constant instead of gen_rtx_PLUS.
2684 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2685 Alan Hayward <alan.hayward@arm.com>
2686 David Sherwood <david.sherwood@arm.com>
2688 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
2691 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2692 Alan Hayward <alan.hayward@arm.com>
2693 David Sherwood <david.sherwood@arm.com>
2695 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
2696 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
2697 via stack temporaries. Treat the mode size as polynomial too.
2699 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2700 Alan Hayward <alan.hayward@arm.com>
2701 David Sherwood <david.sherwood@arm.com>
2703 * expr.c (expand_expr_real_2): When handling conversions involving
2704 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
2705 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
2706 as a poly_uint64 too.
2708 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2709 Alan Hayward <alan.hayward@arm.com>
2710 David Sherwood <david.sherwood@arm.com>
2712 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
2714 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2715 Alan Hayward <alan.hayward@arm.com>
2716 David Sherwood <david.sherwood@arm.com>
2718 * combine.c (can_change_dest_mode): Handle polynomial
2719 REGMODE_NATURAL_SIZE.
2720 * expmed.c (store_bit_field_1): Likewise.
2721 * expr.c (store_constructor): Likewise.
2722 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
2723 and polynomial REGMODE_NATURAL_SIZE.
2724 (gen_lowpart_common): Likewise.
2725 * reginfo.c (record_subregs_of_mode): Likewise.
2726 * rtlanal.c (read_modify_subreg_p): Likewise.
2728 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2729 Alan Hayward <alan.hayward@arm.com>
2730 David Sherwood <david.sherwood@arm.com>
2732 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
2733 numbers of elements.
2735 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2736 Alan Hayward <alan.hayward@arm.com>
2737 David Sherwood <david.sherwood@arm.com>
2739 * match.pd: Cope with polynomial numbers of vector elements.
2741 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2742 Alan Hayward <alan.hayward@arm.com>
2743 David Sherwood <david.sherwood@arm.com>
2745 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
2746 in a POINTER_PLUS_EXPR.
2748 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2749 Alan Hayward <alan.hayward@arm.com>
2750 David Sherwood <david.sherwood@arm.com>
2752 * omp-simd-clone.c (simd_clone_subparts): New function.
2753 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
2754 (ipa_simd_modify_function_body): Likewise.
2756 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2757 Alan Hayward <alan.hayward@arm.com>
2758 David Sherwood <david.sherwood@arm.com>
2760 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
2761 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
2762 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
2763 (expand_vector_condition, vector_element): Likewise.
2764 (subparts_gt): New function.
2765 (get_compute_type): Use subparts_gt.
2766 (count_type_subparts): Delete.
2767 (expand_vector_operations_1): Use subparts_gt instead of
2768 count_type_subparts.
2770 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2771 Alan Hayward <alan.hayward@arm.com>
2772 David Sherwood <david.sherwood@arm.com>
2774 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
2775 (vect_compile_time_alias): ...this new function. Do the calculation
2776 on poly_ints rather than trees.
2777 (vect_prune_runtime_alias_test_list): Update call accordingly.
2779 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2780 Alan Hayward <alan.hayward@arm.com>
2781 David Sherwood <david.sherwood@arm.com>
2783 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
2785 (vect_schedule_slp_instance): Likewise.
2787 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2788 Alan Hayward <alan.hayward@arm.com>
2789 David Sherwood <david.sherwood@arm.com>
2791 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
2792 constant and extern definitions for variable-length vectors.
2793 (vect_get_constant_vectors): Note that the number of units
2794 is known to be constant.
2796 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2797 Alan Hayward <alan.hayward@arm.com>
2798 David Sherwood <david.sherwood@arm.com>
2800 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
2801 of units as polynomial. Choose between WIDE and NARROW based
2804 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2805 Alan Hayward <alan.hayward@arm.com>
2806 David Sherwood <david.sherwood@arm.com>
2808 * tree-vect-stmts.c (simd_clone_subparts): New function.
2809 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
2811 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2812 Alan Hayward <alan.hayward@arm.com>
2813 David Sherwood <david.sherwood@arm.com>
2815 * tree-vect-stmts.c (vectorizable_call): Treat the number of
2816 vectors as polynomial. Use build_index_vector for
2819 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2820 Alan Hayward <alan.hayward@arm.com>
2821 David Sherwood <david.sherwood@arm.com>
2823 * tree-vect-stmts.c (get_load_store_type): Treat the number of
2824 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
2825 for variable-length vectors.
2826 (vectorizable_mask_load_store): Treat the number of units as
2827 polynomial, asserting that it is constant if the condition has
2828 already been enforced.
2829 (vectorizable_store, vectorizable_load): Likewise.
2831 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2832 Alan Hayward <alan.hayward@arm.com>
2833 David Sherwood <david.sherwood@arm.com>
2835 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
2836 of units as polynomial. Punt if we can't tell at compile time
2837 which vector contains the final result.
2839 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2840 Alan Hayward <alan.hayward@arm.com>
2841 David Sherwood <david.sherwood@arm.com>
2843 * tree-vect-loop.c (vectorizable_induction): Treat the number
2844 of units as polynomial. Punt on SLP inductions. Use an integer
2845 VEC_SERIES_EXPR for variable-length integer reductions. Use a
2846 cast of such a series for variable-length floating-point
2849 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2850 Alan Hayward <alan.hayward@arm.com>
2851 David Sherwood <david.sherwood@arm.com>
2853 * tree.h (build_index_vector): Declare.
2854 * tree.c (build_index_vector): New function.
2855 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
2856 of units as polynomial, forcibly converting it to a constant if
2857 vectorizable_reduction has already enforced the condition.
2858 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
2859 to create a {1,2,3,...} vector.
2860 (vectorizable_reduction): Treat the number of units as polynomial.
2861 Choose vectype_in based on the largest scalar element size rather
2862 than the smallest number of units. Enforce the restrictions
2865 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2866 Alan Hayward <alan.hayward@arm.com>
2867 David Sherwood <david.sherwood@arm.com>
2869 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
2870 number of units as polynomial.
2872 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2873 Alan Hayward <alan.hayward@arm.com>
2874 David Sherwood <david.sherwood@arm.com>
2876 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
2877 * target.def (autovectorize_vector_sizes): Return the vector sizes
2878 by pointer, using vector_sizes rather than a bitmask.
2879 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
2880 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
2881 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
2883 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
2884 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
2885 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
2886 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
2887 * omp-general.c (omp_max_vf): Likewise.
2888 * omp-low.c (omp_clause_aligned_alignment): Likewise.
2889 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
2890 * tree-vect-loop.c (vect_analyze_loop): Likewise.
2891 * tree-vect-slp.c (vect_slp_bb): Likewise.
2892 * doc/tm.texi: Regenerate.
2893 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
2895 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
2896 the vector size as a poly_uint64 rather than an unsigned int.
2897 (current_vector_size): Change from an unsigned int to a poly_uint64.
2898 (get_vectype_for_scalar_type): Update accordingly.
2899 * tree.h (build_truth_vector_type): Take the size and number of
2900 units as a poly_uint64 rather than an unsigned int.
2901 (build_vector_type): Add a temporary overload that takes
2902 the number of units as a poly_uint64 rather than an unsigned int.
2903 * tree.c (make_vector_type): Likewise.
2904 (build_truth_vector_type): Take the number of units as a poly_uint64
2905 rather than an unsigned int.
2907 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2908 Alan Hayward <alan.hayward@arm.com>
2909 David Sherwood <david.sherwood@arm.com>
2911 * target.def (get_mask_mode): Take the number of units and length
2912 as poly_uint64s rather than unsigned ints.
2913 * targhooks.h (default_get_mask_mode): Update accordingly.
2914 * targhooks.c (default_get_mask_mode): Likewise.
2915 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
2916 * doc/tm.texi: Regenerate.
2918 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2919 Alan Hayward <alan.hayward@arm.com>
2920 David Sherwood <david.sherwood@arm.com>
2922 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
2923 * omp-general.c (omp_max_vf): Likewise.
2924 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
2925 (expand_omp_simd): Handle polynomial safelen.
2926 * omp-low.c (omplow_simd_context): Add a default constructor.
2927 (omplow_simd_context::max_vf): Change from int to poly_uint64.
2928 (lower_rec_simd_input_clauses): Update accordingly.
2929 (lower_rec_input_clauses): Likewise.
2931 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2932 Alan Hayward <alan.hayward@arm.com>
2933 David Sherwood <david.sherwood@arm.com>
2935 * tree-vectorizer.h (vect_nunits_for_cost): New function.
2936 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
2937 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
2938 (vect_analyze_slp_cost): Likewise.
2939 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
2940 (vect_model_load_cost): Likewise.
2942 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2943 Alan Hayward <alan.hayward@arm.com>
2944 David Sherwood <david.sherwood@arm.com>
2946 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
2947 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
2948 from an unsigned int * to a poly_uint64_pod *.
2949 (calculate_unrolling_factor): New function.
2950 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
2952 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
2953 Alan Hayward <alan.hayward@arm.com>
2954 David Sherwood <david.sherwood@arm.com>
2956 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
2957 from an unsigned int to a poly_uint64.
2958 (_loop_vec_info::slp_unrolling_factor): Likewise.
2959 (_loop_vec_info::vectorization_factor): Change from an int
2961 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
2962 (vect_get_num_vectors): New function.
2963 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
2964 (vect_get_num_copies): Use vect_get_num_vectors.
2965 (vect_analyze_data_ref_dependences): Change max_vf from an int *
2966 to an unsigned int *.
2967 (vect_analyze_data_refs): Change min_vf from an int * to a
2969 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
2970 than an unsigned HOST_WIDE_INT.
2971 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
2972 (vect_analyze_data_ref_dependence): Change max_vf from an int *
2973 to an unsigned int *.
2974 (vect_analyze_data_ref_dependences): Likewise.
2975 (vect_compute_data_ref_alignment): Handle polynomial vf.
2976 (vect_enhance_data_refs_alignment): Likewise.
2977 (vect_prune_runtime_alias_test_list): Likewise.
2978 (vect_shift_permute_load_chain): Likewise.
2979 (vect_supportable_dr_alignment): Likewise.
2980 (dependence_distance_ge_vf): Take the vectorization factor as a
2981 poly_uint64 rather than an unsigned HOST_WIDE_INT.
2982 (vect_analyze_data_refs): Change min_vf from an int * to a
2984 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
2985 vfm1 as a poly_uint64 rather than an int. Make the same change
2986 for the returned bound_scalar.
2987 (vect_gen_vector_loop_niters): Handle polynomial vf.
2988 (vect_do_peeling): Likewise. Update call to
2989 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
2990 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
2992 * tree-vect-loop.c (vect_determine_vectorization_factor)
2993 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
2994 (vect_get_known_peeling_cost): Likewise.
2995 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
2996 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
2997 (vect_transform_loop): Likewise. Use the lowest possible VF when
2998 updating the upper bounds of the loop.
2999 (vect_min_worthwhile_factor): Make static. Return an unsigned int
3001 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
3002 polynomial unroll factors.
3003 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
3004 (vect_make_slp_decision): Likewise.
3005 (vect_supported_load_permutation_p): Likewise, and polynomial
3007 (vect_analyze_slp_cost): Handle polynomial vf.
3008 (vect_slp_analyze_node_operations): Likewise.
3009 (vect_slp_analyze_bb_1): Likewise.
3010 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
3011 than an unsigned HOST_WIDE_INT.
3012 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
3013 (vectorizable_load): Handle polynomial vf.
3014 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
3016 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
3018 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3019 Alan Hayward <alan.hayward@arm.com>
3020 David Sherwood <david.sherwood@arm.com>
3022 * match.pd: Handle bit operations involving three constants
3023 and try to fold one pair.
3025 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3027 * tree-vect-loop-manip.c: Include gimple-fold.h.
3028 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
3029 niters_maybe_zero parameters. Handle other cases besides a step of 1.
3030 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
3031 Add a path that uses a step of VF instead of 1, but disable it
3033 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
3034 and niters_no_overflow parameters. Update calls to
3035 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
3036 Create a new SSA name if the latter choses to use a ste other
3037 than zero, and return it via niters_vector_mult_vf_var.
3038 * tree-vect-loop.c (vect_transform_loop): Update calls to
3039 vect_do_peeling, vect_gen_vector_loop_niters and
3040 slpeel_make_loop_iterate_ntimes.
3041 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
3042 (vect_gen_vector_loop_niters): Update declarations after above changes.
3044 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
3046 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
3047 128-bit round to integer instructions.
3048 (ceil<mode>2): Likewise.
3049 (btrunc<mode>2): Likewise.
3050 (round<mode>2): Likewise.
3052 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3054 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
3055 unaligned VSX load/store on P8/P9.
3056 (expand_block_clear): Allow the use of unaligned VSX
3057 load/store on P8/P9.
3059 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
3061 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
3063 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
3064 swap associated with both a load and a store.
3066 2018-01-02 Andrew Waterman <andrew@sifive.com>
3068 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
3069 * config/riscv/riscv.md (clear_cache): Use it.
3071 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
3073 * web.c: Remove out-of-date comment.
3075 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3077 * expr.c (fixup_args_size_notes): Check that any existing
3078 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
3079 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
3080 (emit_single_push_insn): ...here.
3082 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3084 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
3085 (const_vector_encoded_nelts): New function.
3086 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
3087 (const_vector_int_elt, const_vector_elt): Declare.
3088 * emit-rtl.c (const_vector_int_elt_1): New function.
3089 (const_vector_elt): Likewise.
3090 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
3091 of CONST_VECTOR_ELT.
3093 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3095 * expr.c: Include rtx-vector-builder.h.
3096 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
3097 directly on the tree encoding.
3098 (const_vector_from_tree): Likewise.
3099 * optabs.c: Include rtx-vector-builder.h.
3100 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
3101 sequence of "u" values.
3102 * vec-perm-indices.c: Include rtx-vector-builder.h.
3103 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
3104 directly on the vec_perm_indices encoding.
3106 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3108 * doc/rtl.texi (const_vector): Describe new encoding scheme.
3109 * Makefile.in (OBJS): Add rtx-vector-builder.o.
3110 * rtx-vector-builder.h: New file.
3111 * rtx-vector-builder.c: Likewise.
3112 * rtl.h (rtx_def::u2): Add a const_vector field.
3113 (CONST_VECTOR_NPATTERNS): New macro.
3114 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
3115 (CONST_VECTOR_DUPLICATE_P): Likewise.
3116 (CONST_VECTOR_STEPPED_P): Likewise.
3117 (CONST_VECTOR_ENCODED_ELT): Likewise.
3118 (const_vec_duplicate_p): Check for a duplicated vector encoding.
3119 (unwrap_const_vec_duplicate): Likewise.
3120 (const_vec_series_p): Check for a non-duplicated vector encoding.
3121 Say that the function only returns true for integer vectors.
3122 * emit-rtl.c: Include rtx-vector-builder.h.
3123 (gen_const_vec_duplicate_1): Delete.
3124 (gen_const_vector): Call gen_const_vec_duplicate instead of
3125 gen_const_vec_duplicate_1.
3126 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
3127 (gen_const_vec_duplicate): Use rtx_vector_builder.
3128 (gen_const_vec_series): Likewise.
3129 (gen_rtx_CONST_VECTOR): Likewise.
3130 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
3131 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3132 Build a new vector rather than modifying a CONST_VECTOR in-place.
3133 (handle_special_swappables): Update call accordingly.
3134 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
3135 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
3136 Build a new vector rather than modifying a CONST_VECTOR in-place.
3137 (handle_special_swappables): Update call accordingly.
3139 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3141 * simplify-rtx.c (simplify_const_binary_operation): Use
3142 CONST_VECTOR_ELT instead of XVECEXP.
3144 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3146 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
3147 the selector elements to be different from the data elements
3148 if the selector is a VECTOR_CST.
3149 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
3150 ssizetype for the selector.
3152 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3154 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
3155 before testing each element individually.
3156 * tree-vect-generic.c (lower_vec_perm): Likewise.
3158 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3160 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
3161 * selftest-run-tests.c (selftest::run_tests): Call it.
3162 * vector-builder.h (vector_builder::operator ==): New function.
3163 (vector_builder::operator !=): Likewise.
3164 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
3165 (vec_perm_indices::all_from_input_p): New function.
3166 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3167 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
3168 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
3169 instead of reading the VECTOR_CST directly. Detect whether both
3170 vector inputs are the same before constructing the vec_perm_indices,
3171 and update the number of inputs argument accordingly. Use the
3172 utility functions added above. Only construct sel2 if we need to.
3174 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3176 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
3177 the broadcast of the low byte.
3178 (expand_mult_highpart): Use an explicit encoding for the permutes.
3179 * optabs-query.c (can_mult_highpart_p): Likewise.
3180 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
3181 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3182 (vectorizable_bswap): Likewise.
3183 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
3184 explicit encoding for the power-of-2 permutes.
3185 (vect_permute_store_chain): Likewise.
3186 (vect_grouped_load_supported): Likewise.
3187 (vect_permute_load_chain): Likewise.
3189 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3191 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
3192 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
3193 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
3194 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3195 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
3196 (vect_gen_perm_mask_any): Likewise.
3198 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3200 * int-vector-builder.h: New file.
3201 * vec-perm-indices.h: Include int-vector-builder.h.
3202 (vec_perm_indices): Redefine as an int_vector_builder.
3203 (auto_vec_perm_indices): Delete.
3204 (vec_perm_builder): Redefine as a stand-alone class.
3205 (vec_perm_indices::vec_perm_indices): New function.
3206 (vec_perm_indices::clamp): Likewise.
3207 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
3208 (vec_perm_indices::new_vector): New function.
3209 (vec_perm_indices::new_expanded_vector): Update for new
3210 vec_perm_indices class.
3211 (vec_perm_indices::rotate_inputs): New function.
3212 (vec_perm_indices::all_in_range_p): Operate directly on the
3213 encoded form, without computing elided elements.
3214 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
3215 encoding. Update for new vec_perm_indices class.
3216 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
3217 the given vec_perm_builder.
3218 (expand_vec_perm_var): Update vec_perm_builder constructor.
3219 (expand_mult_highpart): Use vec_perm_builder instead of
3220 auto_vec_perm_indices.
3221 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
3222 vec_perm_indices instead of auto_vec_perm_indices. Use a single
3223 or double series encoding as appropriate.
3224 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
3225 vec_perm_indices instead of auto_vec_perm_indices.
3226 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3227 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3228 (vect_permute_store_chain): Likewise.
3229 (vect_grouped_load_supported): Likewise.
3230 (vect_permute_load_chain): Likewise.
3231 (vect_shift_permute_load_chain): Likewise.
3232 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3233 (vect_transform_slp_perm_load): Likewise.
3234 (vect_schedule_slp_instance): Likewise.
3235 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3236 (vectorizable_mask_load_store): Likewise.
3237 (vectorizable_bswap): Likewise.
3238 (vectorizable_store): Likewise.
3239 (vectorizable_load): Likewise.
3240 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
3241 vec_perm_indices instead of auto_vec_perm_indices. Use
3242 tree_to_vec_perm_builder to read the vector from a tree.
3243 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
3244 vec_perm_builder instead of a vec_perm_indices.
3245 (have_whole_vector_shift): Use vec_perm_builder and
3246 vec_perm_indices instead of auto_vec_perm_indices. Leave the
3247 truncation to calc_vec_perm_mask_for_shift.
3248 (vect_create_epilog_for_reduction): Likewise.
3249 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
3250 from auto_vec_perm_indices to vec_perm_indices.
3251 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3252 instead of changing individual elements.
3253 (aarch64_vectorize_vec_perm_const): Use new_vector to install
3254 the vector in d.perm.
3255 * config/arm/arm.c (expand_vec_perm_d::perm): Change
3256 from auto_vec_perm_indices to vec_perm_indices.
3257 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
3258 instead of changing individual elements.
3259 (arm_vectorize_vec_perm_const): Use new_vector to install
3260 the vector in d.perm.
3261 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
3262 Update vec_perm_builder constructor.
3263 (rs6000_expand_interleave): Likewise.
3264 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
3265 (rs6000_expand_interleave): Likewise.
3267 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3269 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
3270 to qimode could truncate the indices.
3271 * optabs.c (expand_vec_perm_var): Likewise.
3273 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3275 * Makefile.in (OBJS): Add vec-perm-indices.o.
3276 * vec-perm-indices.h: New file.
3277 * vec-perm-indices.c: Likewise.
3278 * target.h (vec_perm_indices): Replace with a forward class
3280 (auto_vec_perm_indices): Move to vec-perm-indices.h.
3281 * optabs.h: Include vec-perm-indices.h.
3282 (expand_vec_perm): Delete.
3283 (selector_fits_mode_p, expand_vec_perm_var): Declare.
3284 (expand_vec_perm_const): Declare.
3285 * target.def (vec_perm_const_ok): Replace with...
3286 (vec_perm_const): ...this new hook.
3287 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
3288 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
3289 * doc/tm.texi: Regenerate.
3290 * optabs.def (vec_perm_const): Delete.
3291 * doc/md.texi (vec_perm_const): Likewise.
3292 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
3293 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
3294 expand_vec_perm for constant permutation vectors. Assert that
3295 the mode of variable permutation vectors is the integer equivalent
3296 of the mode that is being permuted.
3297 * optabs-query.h (selector_fits_mode_p): Declare.
3298 * optabs-query.c: Include vec-perm-indices.h.
3299 (selector_fits_mode_p): New function.
3300 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
3301 is defined, instead of checking whether the vec_perm_const_optab
3302 exists. Use targetm.vectorize.vec_perm_const instead of
3303 targetm.vectorize.vec_perm_const_ok. Check whether the indices
3304 fit in the vector mode before using a variable permute.
3305 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
3306 vec_perm_indices instead of an rtx.
3307 (expand_vec_perm): Replace with...
3308 (expand_vec_perm_const): ...this new function. Take the selector
3309 as a vec_perm_indices rather than an rtx. Also take the mode of
3310 the selector. Update call to shift_amt_for_vec_perm_mask.
3311 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
3312 Use vec_perm_indices::new_expanded_vector to expand the original
3313 selector into bytes. Check whether the indices fit in the vector
3314 mode before using a variable permute.
3315 (expand_vec_perm_var): Make global.
3316 (expand_mult_highpart): Use expand_vec_perm_const.
3317 * fold-const.c: Includes vec-perm-indices.h.
3318 * tree-ssa-forwprop.c: Likewise.
3319 * tree-vect-data-refs.c: Likewise.
3320 * tree-vect-generic.c: Likewise.
3321 * tree-vect-loop.c: Likewise.
3322 * tree-vect-slp.c: Likewise.
3323 * tree-vect-stmts.c: Likewise.
3324 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
3326 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
3327 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
3328 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
3329 (aarch64_vectorize_vec_perm_const): ...this new function.
3330 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3331 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3332 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
3333 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
3334 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3335 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3336 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
3338 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
3339 check for NEON modes.
3340 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
3341 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
3342 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
3343 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
3345 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
3346 the old VEC_PERM_CONST conditions.
3347 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
3348 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
3349 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
3350 (ia64_vectorize_vec_perm_const_ok): Merge into...
3351 (ia64_vectorize_vec_perm_const): ...this new function.
3352 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
3353 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
3354 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
3355 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
3356 * config/mips/mips.c (mips_expand_vec_perm_const)
3357 (mips_vectorize_vec_perm_const_ok): Merge into...
3358 (mips_vectorize_vec_perm_const): ...this new function.
3359 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
3360 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
3361 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
3362 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
3363 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
3364 (rs6000_expand_vec_perm_const): Delete.
3365 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
3367 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3368 (altivec_expand_vec_perm_const_le): Take each operand individually.
3369 Operate on constant selectors rather than rtxes.
3370 (altivec_expand_vec_perm_const): Likewise. Update call to
3371 altivec_expand_vec_perm_const_le.
3372 (rs6000_expand_vec_perm_const): Delete.
3373 (rs6000_vectorize_vec_perm_const_ok): Delete.
3374 (rs6000_vectorize_vec_perm_const): New function.
3375 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3376 an element count and rtx array.
3377 (rs6000_expand_extract_even): Update call accordingly.
3378 (rs6000_expand_interleave): Likewise.
3379 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
3380 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
3381 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
3382 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
3383 (rs6000_expand_vec_perm_const): Delete.
3384 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
3385 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3386 (altivec_expand_vec_perm_const_le): Take each operand individually.
3387 Operate on constant selectors rather than rtxes.
3388 (altivec_expand_vec_perm_const): Likewise. Update call to
3389 altivec_expand_vec_perm_const_le.
3390 (rs6000_expand_vec_perm_const): Delete.
3391 (rs6000_vectorize_vec_perm_const_ok): Delete.
3392 (rs6000_vectorize_vec_perm_const): New function. Remove stray
3393 reference to the SPE evmerge intructions.
3394 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
3395 an element count and rtx array.
3396 (rs6000_expand_extract_even): Update call accordingly.
3397 (rs6000_expand_interleave): Likewise.
3398 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
3399 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
3401 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
3403 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3405 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
3406 vector mode and that that mode matches the mode of the data
3408 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
3409 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
3410 directly using expand_vec_perm_1 when forcing selectors into
3412 (expand_vec_perm_var): New function, split out from expand_vec_perm.
3414 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3416 * optabs-query.h (can_vec_perm_p): Delete.
3417 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
3418 * optabs-query.c (can_vec_perm_p): Split into...
3419 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
3420 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
3421 particular selector is valid.
3422 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3423 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3424 (vect_grouped_load_supported): Likewise.
3425 (vect_shift_permute_load_chain): Likewise.
3426 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
3427 (vect_transform_slp_perm_load): Likewise.
3428 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3429 (vectorizable_bswap): Likewise.
3430 (vect_gen_perm_mask_checked): Likewise.
3431 * fold-const.c (fold_ternary_loc): Likewise. Don't take
3432 implementations of variable permutation vectors into account
3433 when deciding which selector to use.
3434 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
3435 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
3436 with a false third argument.
3437 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
3438 to test whether the constant selector is valid and can_vec_perm_var_p
3439 to test whether a variable selector is valid.
3441 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3443 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
3444 * optabs-query.c (can_vec_perm_p): Likewise.
3445 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
3446 instead of vec_perm_indices.
3447 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
3448 (vect_gen_perm_mask_checked): Likewise,
3449 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
3450 (vect_gen_perm_mask_checked): Likewise,
3452 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
3454 * optabs-query.h (qimode_for_vec_perm): Declare.
3455 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
3456 (qimode_for_vec_perm): ...this new function.
3457 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
3459 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
3461 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
3462 does not have a conditional at the top.
3464 2018-01-02 Richard Biener <rguenther@suse.de>
3466 * ipa-inline.c (big_speedup_p): Fix expression.
3468 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
3471 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
3474 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
3478 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
3479 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
3480 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
3481 cond_taken_branch_cost 3->4.
3483 2018-01-01 Jakub Jelinek <jakub@redhat.com>
3485 PR tree-optimization/83581
3486 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
3487 TODO_cleanup_cfg if any changes have been made.
3490 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
3491 convert_modes if target mode has the right side, but different mode
3495 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
3496 last argument when extracting from CONCAT. If either from_real or
3497 from_imag is NULL, use expansion through memory. If result is not
3498 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
3499 the parts directly to inner mode, if even that fails, use expansion
3503 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
3504 check for bswap in mode rather than HImode and use that in expand_unop
3507 Copyright (C) 2018 Free Software Foundation, Inc.
3509 Copying and distribution of this file, with or without modification,
3510 are permitted in any medium without royalty provided the copyright
3511 notice and this notice are preserved.