1 2018-01-17 Andrew Waterman <andrew@sifive.com>
3 * config/riscv/riscv.c (riscv_conditional_register_usage): If
4 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
6 2018-01-17 David Malcolm <dmalcolm@redhat.com>
9 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
10 call the lto_location_cache before reading the
11 DECL_SOURCE_LOCATION of the types.
13 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
14 Richard Sandiford <richard.sandiford@linaro.org>
16 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
17 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
18 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
19 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
20 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
22 * config/aarch64/constraints.md (aarch64_movti_operand):
24 * config/aarch64/predicates.md (Uti): Add new constraint.
26 2018-01-17 Carl Love <cel@us.ibm.com>
27 * config/rs6000/vsx.md (define_expand xl_len_r,
28 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
29 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
31 (define_expand, define_insn): Move the shift left from the
32 define_insn to the define_expand for lxvl and stxvl instructions.
33 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
34 and XL_LEN_R definitions to PURE.
36 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
38 * config/i386/i386.c (indirect_thunk_name): Declare regno
39 as unsigned int. Compare regno with INVALID_REGNUM.
40 (output_indirect_thunk): Ditto.
41 (output_indirect_thunk_function): Ditto.
42 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
43 in the call to output_indirect_thunk_function.
45 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
48 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
49 rather than the size of inner_type to determine the stack slot size
50 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
52 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
55 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
58 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
60 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
61 endian Linux systems to optionally enable multilibs for selecting
62 the long double type if the user configured an explicit type.
63 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
64 have no long double multilibs if not defined.
65 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
66 warn if the user used -mabi={ieee,ibm}longdouble and we built
67 multilibs for long double.
68 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
69 appropriate multilib option.
70 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
72 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
73 for building long double multilibs.
74 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
76 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
78 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
81 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
83 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
86 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
89 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
92 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
94 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
95 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
97 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
99 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
100 different rtl trees depending on TARGET_64BIT.
101 (rs6000_gen_lvx): Likewise.
103 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
105 * config/visium/visium.md (nop): Tweak comment.
106 (hazard_nop): Likewise.
108 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
110 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
111 -mspeculate-indirect-jumps.
112 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
113 for -mno-speculate-indirect-jumps.
114 (*call_indirect_elfv2<mode>_nospec): New define_insn.
115 (*call_value_indirect_elfv2<mode>): Disable for
116 -mno-speculate-indirect-jumps.
117 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
118 (indirect_jump): Emit different RTL for
119 -mno-speculate-indirect-jumps.
120 (*indirect_jump<mode>): Disable for
121 -mno-speculate-indirect-jumps.
122 (*indirect_jump<mode>_nospec): New define_insn.
123 (tablejump): Emit different RTL for
124 -mno-speculate-indirect-jumps.
125 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
126 (tablejumpsi_nospec): New define_expand.
127 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
128 (tablejumpdi_nospec): New define_expand.
129 (*tablejump<mode>_internal1): Disable for
130 -mno-speculate-indirect-jumps.
131 (*tablejump<mode>_internal1_nospec): New define_insn.
132 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
135 2018-01-16 Artyom Skrobov tyomitch@gmail.com
137 * caller-save.c (insert_save): Drop unnecessary parameter. All
140 2018-01-16 Jakub Jelinek <jakub@redhat.com>
141 Richard Biener <rguenth@suse.de>
144 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
145 return early, inline manually is_gimple_sizepos. Make sure if we
146 call gimplify_expr we don't end up with a gimple constant.
147 * tree.c (variably_modified_type_p): Don't return true for
148 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
149 * gimplify.h (is_gimple_sizepos): Remove.
151 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
153 PR tree-optimization/83857
154 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
155 vectorizable_live_operation for pure SLP statements.
156 (vectorizable_live_operation): Handle PHIs.
158 2018-01-16 Richard Biener <rguenther@suse.de>
160 PR tree-optimization/83867
161 * tree-vect-stmts.c (vect_transform_stmt): Precompute
162 nested_in_vect_loop_p since the scalar stmt may get invalidated.
164 2018-01-16 Jakub Jelinek <jakub@redhat.com>
167 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
168 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
169 If off is not INTEGER_CST, issue a may not be aligned warning
170 rather than isn't aligned. Use isn%'t rather than isn't.
171 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
173 <case MULT_EXPR>: Improve the case when bottom and one of the
174 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
175 operand, in that case check if the other operand is multiple of
176 bottom divided by the INTEGER_CST operand.
178 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
181 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
182 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
183 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
184 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
185 * config/pa/pa.c (pa_function_arg_advance): Likewise.
186 (pa_function_arg, pa_arg_partial_bytes): Likewise.
187 (pa_function_arg_size): New function.
189 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
191 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
192 in a separate statement.
194 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
196 PR tree-optimization/83847
197 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
198 group gathers and scatters.
200 2018-01-16 Jakub Jelinek <jakub@redhat.com>
202 PR rtl-optimization/86620
203 * params.def (max-sched-ready-insns): Bump minimum value to 1.
205 PR rtl-optimization/83213
206 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
207 to last if both are JUMP_INSNs.
209 PR tree-optimization/83843
210 * gimple-ssa-store-merging.c
211 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
212 store_immediate_info for bswap/nop orig_stores.
214 2018-01-15 Andrew Waterman <andrew@sifive.com>
216 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
218 <UDIV>: Increase cost if !TARGET_DIV.
220 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
222 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
223 (define_attr "cr_logical_3op"): New.
224 (cceq_ior_compare): Adjust.
225 (cceq_ior_compare_complement): Adjust.
226 (*cceq_rev_compare): Adjust.
227 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
228 (is_cracked_insn): Adjust.
229 (insn_must_be_first_in_group): Adjust.
230 * config/rs6000/40x.md: Adjust.
231 * config/rs6000/440.md: Adjust.
232 * config/rs6000/476.md: Adjust.
233 * config/rs6000/601.md: Adjust.
234 * config/rs6000/603.md: Adjust.
235 * config/rs6000/6xx.md: Adjust.
236 * config/rs6000/7450.md: Adjust.
237 * config/rs6000/7xx.md: Adjust.
238 * config/rs6000/8540.md: Adjust.
239 * config/rs6000/cell.md: Adjust.
240 * config/rs6000/e300c2c3.md: Adjust.
241 * config/rs6000/e500mc.md: Adjust.
242 * config/rs6000/e500mc64.md: Adjust.
243 * config/rs6000/e5500.md: Adjust.
244 * config/rs6000/e6500.md: Adjust.
245 * config/rs6000/mpc.md: Adjust.
246 * config/rs6000/power4.md: Adjust.
247 * config/rs6000/power5.md: Adjust.
248 * config/rs6000/power6.md: Adjust.
249 * config/rs6000/power7.md: Adjust.
250 * config/rs6000/power8.md: Adjust.
251 * config/rs6000/power9.md: Adjust.
252 * config/rs6000/rs64.md: Adjust.
253 * config/rs6000/titan.md: Adjust.
255 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
257 * config/i386/predicates.md (indirect_branch_operand): Rewrite
258 ix86_indirect_branch_register logic.
260 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
262 * config/i386/constraints.md (Bs): Update
263 ix86_indirect_branch_register check. Don't check
264 ix86_indirect_branch_register with GOT_memory_operand.
266 * config/i386/predicates.md (GOT_memory_operand): Don't check
267 ix86_indirect_branch_register here.
268 (GOT32_symbol_operand): Likewise.
270 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
272 * config/i386/predicates.md (constant_call_address_operand):
273 Rewrite ix86_indirect_branch_register logic.
274 (sibcall_insn_operand): Likewise.
276 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
278 * config/i386/constraints.md (Bs): Replace
279 ix86_indirect_branch_thunk_register with
280 ix86_indirect_branch_register.
282 * config/i386/i386.md (indirect_jump): Likewise.
283 (tablejump): Likewise.
284 (*sibcall_memory): Likewise.
285 (*sibcall_value_memory): Likewise.
286 Peepholes of indirect call and jump via memory: Likewise.
287 * config/i386/i386.opt: Likewise.
288 * config/i386/predicates.md (indirect_branch_operand): Likewise.
289 (GOT_memory_operand): Likewise.
290 (call_insn_operand): Likewise.
291 (sibcall_insn_operand): Likewise.
292 (GOT32_symbol_operand): Likewise.
294 2018-01-15 Jakub Jelinek <jakub@redhat.com>
297 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
298 type rather than type addr's type points to.
299 (expand_omp_atomic_mutex): Likewise.
300 (expand_omp_atomic): Likewise.
302 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
305 * config/i386/i386.c (output_indirect_thunk_function): Use
306 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
307 for __x86_return_thunk.
309 2018-01-15 Richard Biener <rguenther@suse.de>
312 * expmed.c (extract_bit_field_1): Fix typo.
314 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
317 * config/arm/iterators.md (VF): New mode iterator.
318 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
319 Remove integer-related logic from pattern.
320 (neon_vabd<mode>_3): Likewise.
322 2018-01-15 Jakub Jelinek <jakub@redhat.com>
325 * common.opt (fstrict-overflow): No longer an alias.
326 (fwrapv-pointer): New option.
327 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
328 also for pointer types based on flag_wrapv_pointer.
329 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
330 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
331 opts->x_flag_wrapv got set.
332 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
333 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
334 POINTER_TYPE_OVERFLOW_UNDEFINED.
335 * match.pd: Likewise in address comparison pattern.
336 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
338 2018-01-15 Richard Biener <rguenther@suse.de>
341 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
342 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
343 Reset type names to their identifier if their TYPE_DECL doesn't
344 have linkage (and thus is used for ODR and devirt).
345 (save_debug_info_for_decl): Remove.
346 (save_debug_info_for_type): Likewise.
347 (add_tree_to_fld_list): Adjust.
348 * tree-pretty-print.c (dump_generic_node): Make dumping of
349 type names more robust.
351 2018-01-15 Richard Biener <rguenther@suse.de>
353 * BASE-VER: Bump to 8.0.1.
355 2018-01-14 Martin Sebor <msebor@redhat.com>
358 * builtins.c (check_access): Avoid warning when the no-warning bit
361 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
363 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
364 * ira-color (allocno_hard_regs_compare): Likewise.
366 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
369 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
370 Use .pushsection/.popsection.
372 2018-01-14 Martin Sebor <msebor@redhat.com>
375 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
377 2018-01-14 Jakub Jelinek <jakub@redhat.com>
379 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
380 entry from extra_headers.
381 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
382 extra_headers, make the list bitwise identical to the i?86-*-* one.
384 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
386 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
387 -mcmodel=large with -mindirect-branch=thunk,
388 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
389 -mfunction-return=thunk-extern.
390 * doc/invoke.texi: Document -mcmodel=large is incompatible with
391 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
392 -mfunction-return=thunk and -mfunction-return=thunk-extern.
394 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
396 * config/i386/i386.c (print_reg): Print the name of the full
397 integer register without '%'.
398 (ix86_print_operand): Handle 'V'.
399 * doc/extend.texi: Document 'V' modifier.
401 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
403 * config/i386/constraints.md (Bs): Disallow memory operand for
404 -mindirect-branch-register.
406 * config/i386/predicates.md (indirect_branch_operand): Likewise.
407 (GOT_memory_operand): Likewise.
408 (call_insn_operand): Likewise.
409 (sibcall_insn_operand): Likewise.
410 (GOT32_symbol_operand): Likewise.
411 * config/i386/i386.md (indirect_jump): Call convert_memory_address
412 for -mindirect-branch-register.
413 (tablejump): Likewise.
414 (*sibcall_memory): Likewise.
415 (*sibcall_value_memory): Likewise.
416 Disallow peepholes of indirect call and jump via memory for
417 -mindirect-branch-register.
418 (*call_pop): Replace m with Bw.
419 (*call_value_pop): Likewise.
420 (*sibcall_pop_memory): Replace m with Bs.
421 * config/i386/i386.opt (mindirect-branch-register): New option.
422 * doc/invoke.texi: Document -mindirect-branch-register option.
424 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
426 * config/i386/i386-protos.h (ix86_output_function_return): New.
427 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
428 set function_return_type.
429 (indirect_thunk_name): Add ret_p to indicate thunk for function
431 (output_indirect_thunk_function): Pass false to
433 (ix86_output_indirect_branch_via_reg): Likewise.
434 (ix86_output_indirect_branch_via_push): Likewise.
435 (output_indirect_thunk_function): Create alias for function
436 return thunk if regno < 0.
437 (ix86_output_function_return): New function.
438 (ix86_handle_fndecl_attribute): Handle function_return.
439 (ix86_attribute_table): Add function_return.
440 * config/i386/i386.h (machine_function): Add
441 function_return_type.
442 * config/i386/i386.md (simple_return_internal): Use
443 ix86_output_function_return.
444 (simple_return_internal_long): Likewise.
445 * config/i386/i386.opt (mfunction-return=): New option.
446 (indirect_branch): Mention -mfunction-return=.
447 * doc/extend.texi: Document function_return function attribute.
448 * doc/invoke.texi: Document -mfunction-return= option.
450 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
452 * config/i386/i386-opts.h (indirect_branch): New.
453 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
454 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
455 with local indirect jump when converting indirect call and jump.
456 (ix86_set_indirect_branch_type): New.
457 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
458 (indirectlabelno): New.
459 (indirect_thunk_needed): Likewise.
460 (indirect_thunk_bnd_needed): Likewise.
461 (indirect_thunks_used): Likewise.
462 (indirect_thunks_bnd_used): Likewise.
463 (INDIRECT_LABEL): Likewise.
464 (indirect_thunk_name): Likewise.
465 (output_indirect_thunk): Likewise.
466 (output_indirect_thunk_function): Likewise.
467 (ix86_output_indirect_branch_via_reg): Likewise.
468 (ix86_output_indirect_branch_via_push): Likewise.
469 (ix86_output_indirect_branch): Likewise.
470 (ix86_output_indirect_jmp): Likewise.
471 (ix86_code_end): Call output_indirect_thunk_function if needed.
472 (ix86_output_call_insn): Call ix86_output_indirect_branch if
474 (ix86_handle_fndecl_attribute): Handle indirect_branch.
475 (ix86_attribute_table): Add indirect_branch.
476 * config/i386/i386.h (machine_function): Add indirect_branch_type
477 and has_local_indirect_jump.
478 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
480 (tablejump): Likewise.
481 (*indirect_jump): Use ix86_output_indirect_jmp.
482 (*tablejump_1): Likewise.
483 (simple_return_indirect_internal): Likewise.
484 * config/i386/i386.opt (mindirect-branch=): New option.
485 (indirect_branch): New.
488 (thunk-inline): Likewise.
489 (thunk-extern): Likewise.
490 * doc/extend.texi: Document indirect_branch function attribute.
491 * doc/invoke.texi: Document -mindirect-branch= option.
493 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
496 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
498 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
500 * ipa-inline.c (want_inline_small_function_p): Return false if
501 inlining has already failed with CIF_FINAL_ERROR.
502 (update_caller_keys): Call want_inline_small_function_p before
504 (update_callee_keys): Likewise.
506 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
508 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
510 (rs6000_quadword_masked_address_p): Likewise.
511 (quad_aligned_load_p): Likewise.
512 (quad_aligned_store_p): Likewise.
513 (const_load_sequence_p): Add comment to describe the outer-most loop.
514 (mimic_memory_attributes_and_flags): New function.
515 (rs6000_gen_stvx): Likewise.
516 (replace_swapped_aligned_store): Likewise.
517 (rs6000_gen_lvx): Likewise.
518 (replace_swapped_aligned_load): Likewise.
519 (replace_swapped_load_constant): Capitalize argument name in
520 comment describing this function.
521 (rs6000_analyze_swaps): Add a third pass to search for vector loads
522 and stores that access quad-word aligned addresses and replace
523 with stvx or lvx instructions when appropriate.
524 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
525 New function prototype.
526 (rs6000_quadword_masked_address_p): Likewise.
527 (rs6000_gen_lvx): Likewise.
528 (rs6000_gen_stvx): Likewise.
529 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
530 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
531 when memory address is aligned.
532 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
533 this split to select lvx instruction when memory address is aligned.
534 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
535 instruction when memory address is aligned.
536 (*vsx_le_perm_load_v16qi): Likewise.
537 (four unnamed splitters): Modify to select the stvx instruction
538 when memory is aligned.
540 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
542 * predict.c (determine_unlikely_bbs): Handle correctly BBs
543 which appears in the queue multiple times.
545 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
546 Alan Hayward <alan.hayward@arm.com>
547 David Sherwood <david.sherwood@arm.com>
549 * tree-vectorizer.h (vec_lower_bound): New structure.
550 (_loop_vec_info): Add check_nonzero and lower_bounds.
551 (LOOP_VINFO_CHECK_NONZERO): New macro.
552 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
553 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
554 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
555 fields. Make seg_len the distance travelled, not including the
557 (dr_direction_indicator): Declare.
558 (dr_zero_step_indicator): Likewise.
559 (dr_known_forward_stride_p): Likewise.
560 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
562 (runtime_alias_check_p): Allow runtime alias checks with
564 (operator ==): Compare access_size and align.
565 (prune_runtime_alias_test_list): Rework for new distinction between
566 the access_size and seg_len.
567 (create_intersect_range_checks_index): Likewise. Cope with polynomial
569 (get_segment_min_max): New function.
570 (create_intersect_range_checks): Use it.
571 (dr_step_indicator): New function.
572 (dr_direction_indicator): Likewise.
573 (dr_zero_step_indicator): Likewise.
574 (dr_known_forward_stride_p): Likewise.
575 * tree-loop-distribution.c (data_ref_segment_size): Return
576 DR_STEP * (niters - 1).
577 (compute_alias_check_pairs): Update call to the dr_with_seg_len
579 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
580 (vect_preserves_scalar_order_p): New function, split out from...
581 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
582 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
583 (vect_vfa_access_size): New function.
584 (vect_vfa_align): Likewise.
585 (vect_compile_time_alias): Take access_size_a and access_b arguments.
586 (dump_lower_bound): New function.
587 (vect_check_lower_bound): Likewise.
588 (vect_small_gap_p): Likewise.
589 (vectorizable_with_step_bound_p): Likewise.
590 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
591 depencies if the vectorization factor is 1. Convert the checks
592 for nonzero steps into checks on the bounds of DR_STEP. Try using
593 a bunds check for variable steps if the minimum required step is
594 relatively small. Update calls to the dr_with_seg_len
595 constructor and to vect_compile_time_alias.
596 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
598 (vect_loop_versioning): Call it.
599 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
601 (vect_estimate_min_profitable_iters): Account for any bounds checks.
603 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
604 Alan Hayward <alan.hayward@arm.com>
605 David Sherwood <david.sherwood@arm.com>
607 * doc/sourcebuild.texi (vect_scatter_store): Document.
608 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
610 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
612 * genopinit.c (main): Add supports_vec_scatter_store and
613 supports_vec_scatter_store_cached to target_optabs.
614 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
615 IFN_MASK_SCATTER_STORE.
616 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
618 * internal-fn.h (internal_store_fn_p): Declare.
619 (internal_fn_stored_value_index): Likewise.
620 * internal-fn.c (scatter_store_direct): New macro.
621 (expand_scatter_store_optab_fn): New function.
622 (direct_scatter_store_optab_supported_p): New macro.
623 (internal_store_fn_p): New function.
624 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
625 IFN_MASK_SCATTER_STORE.
626 (internal_fn_mask_index): Likewise.
627 (internal_fn_stored_value_index): New function.
628 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
630 * optabs-query.h (supports_vec_scatter_store_p): Declare.
631 * optabs-query.c (supports_vec_scatter_store_p): New function.
632 * tree-vectorizer.h (vect_get_store_rhs): Declare.
633 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
634 true for scatter stores.
635 (vect_gather_scatter_fn_p): Handle scatter stores too.
636 (vect_check_gather_scatter): Consider using scatter stores if
637 supports_vec_scatter_store_p.
638 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
640 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
641 internal_fn_stored_value_index.
642 (check_load_store_masking): Handle scatter stores too.
643 (vect_get_store_rhs): Make public.
644 (vectorizable_call): Use internal_store_fn_p.
645 (vectorizable_store): Handle scatter store internal functions.
646 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
647 when deciding whether the end of the group has been reached.
648 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
649 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
650 (mask_scatter_store<mode>): New insns.
652 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
653 Alan Hayward <alan.hayward@arm.com>
654 David Sherwood <david.sherwood@arm.com>
656 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
657 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
658 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
660 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
661 Use vect_truncate_gather_scatter_offset if we can't treat the
662 operation as a normal gather load or scatter store.
663 (get_group_load_store_type): Take the gather_scatter_info
664 as argument. Try using a gather load or scatter store for
665 single-element groups.
666 (get_load_store_type): Update calls to get_group_load_store_type
667 and vect_use_strided_gather_scatters_p.
669 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
670 Alan Hayward <alan.hayward@arm.com>
671 David Sherwood <david.sherwood@arm.com>
673 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
674 optional tree argument.
675 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
677 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
678 but continue to use the current value as a fallback.
679 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
680 to compare the updates.
681 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
682 (get_load_store_type): Use it when handling a strided access.
683 (vect_get_strided_load_store_ops): New function.
684 (vect_get_data_ptr_increment): Likewise.
685 (vectorizable_load): Handle strided gather loads. Always pass
686 a step to vect_create_data_ref_ptr and bump_vector_ptr.
688 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
689 Alan Hayward <alan.hayward@arm.com>
690 David Sherwood <david.sherwood@arm.com>
692 * doc/md.texi (gather_load@var{m}): Document.
693 (mask_gather_load@var{m}): Likewise.
694 * genopinit.c (main): Add supports_vec_gather_load and
695 supports_vec_gather_load_cached to target_optabs.
696 * optabs-tree.c (init_tree_optimization_optabs): Use
697 ggc_cleared_alloc to allocate target_optabs.
698 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
699 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
701 * internal-fn.h (internal_load_fn_p): Declare.
702 (internal_gather_scatter_fn_p): Likewise.
703 (internal_fn_mask_index): Likewise.
704 (internal_gather_scatter_fn_supported_p): Likewise.
705 * internal-fn.c (gather_load_direct): New macro.
706 (expand_gather_load_optab_fn): New function.
707 (direct_gather_load_optab_supported_p): New macro.
708 (direct_internal_fn_optab): New function.
709 (internal_load_fn_p): Likewise.
710 (internal_gather_scatter_fn_p): Likewise.
711 (internal_fn_mask_index): Likewise.
712 (internal_gather_scatter_fn_supported_p): Likewise.
713 * optabs-query.c (supports_at_least_one_mode_p): New function.
714 (supports_vec_gather_load_p): Likewise.
715 * optabs-query.h (supports_vec_gather_load_p): Declare.
716 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
717 and memory_type field.
718 (NUM_PATTERNS): Bump to 15.
719 * tree-vect-data-refs.c: Include internal-fn.h.
720 (vect_gather_scatter_fn_p): New function.
721 (vect_describe_gather_scatter_call): Likewise.
722 (vect_check_gather_scatter): Try using internal functions for
723 gather loads. Recognize existing calls to a gather load function.
724 (vect_analyze_data_refs): Consider using gather loads if
725 supports_vec_gather_load_p.
726 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
727 (vect_get_gather_scatter_offset_type): Likewise.
728 (vect_convert_mask_for_vectype): Likewise.
729 (vect_add_conversion_to_patterm): Likewise.
730 (vect_try_gather_scatter_pattern): Likewise.
731 (vect_recog_gather_scatter_pattern): New pattern recognizer.
732 (vect_vect_recog_func_ptrs): Add it.
733 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
734 internal_fn_mask_index and internal_gather_scatter_fn_p.
735 (check_load_store_masking): Take the gather_scatter_info as an
736 argument and handle gather loads.
737 (vect_get_gather_scatter_ops): New function.
738 (vectorizable_call): Check internal_load_fn_p.
739 (vectorizable_load): Likewise. Handle gather load internal
741 (vectorizable_store): Update call to check_load_store_masking.
742 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
743 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
744 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
745 (aarch64_gather_scale_operand_d): New predicates.
746 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
747 (mask_gather_load<mode>): New insns.
749 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
750 Alan Hayward <alan.hayward@arm.com>
751 David Sherwood <david.sherwood@arm.com>
753 * optabs.def (fold_left_plus_optab): New optab.
754 * doc/md.texi (fold_left_plus_@var{m}): Document.
755 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
756 * internal-fn.c (fold_left_direct): Define.
757 (expand_fold_left_optab_fn): Likewise.
758 (direct_fold_left_optab_supported_p): Likewise.
759 * fold-const-call.c (fold_const_fold_left): New function.
760 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
761 * tree-parloops.c (valid_reduction_p): New function.
762 (gather_scalar_reductions): Use it.
763 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
764 (vect_finish_replace_stmt): Declare.
765 * tree-vect-loop.c (fold_left_reduction_fn): New function.
766 (needs_fold_left_reduction_p): New function, split out from...
767 (vect_is_simple_reduction): ...here. Accept reductions that
768 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
769 (vect_force_simple_reduction): Also store the reduction type in
770 the assignment's STMT_VINFO_REDUC_TYPE.
771 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
772 (merge_with_identity): New function.
773 (vect_expand_fold_left): Likewise.
774 (vectorize_fold_left_reduction): Likewise.
775 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
776 scalar phi in place for it. Check for target support and reject
777 cases that would reassociate the operation. Defer the transform
778 phase to vectorize_fold_left_reduction.
779 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
780 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
781 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
783 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
785 * tree-if-conv.c (predicate_mem_writes): Remove redundant
786 call to ifc_temp_var.
788 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
789 Alan Hayward <alan.hayward@arm.com>
790 David Sherwood <david.sherwood@arm.com>
792 * target.def (legitimize_address_displacement): Take the original
793 offset as a poly_int.
794 * targhooks.h (default_legitimize_address_displacement): Update
796 * targhooks.c (default_legitimize_address_displacement): Likewise.
797 * doc/tm.texi: Regenerate.
798 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
799 as an argument, moving assert of ad->disp == ad->disp_term to...
800 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
801 Try calling targetm.legitimize_address_displacement before expanding
802 the address rather than afterwards, and adjust for the new interface.
803 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
804 Match the new hook interface. Handle SVE addresses.
805 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
808 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
810 * Makefile.in (OBJS): Add early-remat.o.
811 * target.def (select_early_remat_modes): New hook.
812 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
813 * doc/tm.texi: Regenerate.
814 * targhooks.h (default_select_early_remat_modes): Declare.
815 * targhooks.c (default_select_early_remat_modes): New function.
816 * timevar.def (TV_EARLY_REMAT): New timevar.
817 * passes.def (pass_early_remat): New pass.
818 * tree-pass.h (make_pass_early_remat): Declare.
819 * early-remat.c: New file.
820 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
822 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
824 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
825 Alan Hayward <alan.hayward@arm.com>
826 David Sherwood <david.sherwood@arm.com>
828 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
829 vfm1 with a bound_epilog parameter.
830 (vect_do_peeling): Update calls accordingly, and move the prologue
831 call earlier in the function. Treat the base bound_epilog as 0 for
832 fully-masked loops and retain vf - 1 for other loops. Add 1 to
833 this base when peeling for gaps.
834 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
835 with fully-masked loops.
836 (vect_estimate_min_profitable_iters): Handle the single peeled
837 iteration in that case.
839 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
840 Alan Hayward <alan.hayward@arm.com>
841 David Sherwood <david.sherwood@arm.com>
843 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
844 single-element interleaving even if the size is not a power of 2.
845 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
846 accesses for single-element interleaving if the group size is
849 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
850 Alan Hayward <alan.hayward@arm.com>
851 David Sherwood <david.sherwood@arm.com>
853 * doc/md.texi (fold_extract_last_@var{m}): Document.
854 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
855 * optabs.def (fold_extract_last_optab): New optab.
856 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
857 * internal-fn.c (fold_extract_direct): New macro.
858 (expand_fold_extract_optab_fn): Likewise.
859 (direct_fold_extract_optab_supported_p): Likewise.
860 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
861 * tree-vect-loop.c (vect_model_reduction_cost): Handle
862 EXTRACT_LAST_REDUCTION.
863 (get_initial_def_for_reduction): Do not create an initial vector
864 for EXTRACT_LAST_REDUCTION reductions.
865 (vectorizable_reduction): Leave the scalar phi in place for
866 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
867 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
868 epilogue code for EXTRACT_LAST_REDUCTION and defer the
869 transform phase to vectorizable_condition.
870 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
872 (vect_finish_stmt_generation): ...here.
873 (vect_finish_replace_stmt): New function.
874 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
875 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
877 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
879 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
880 Alan Hayward <alan.hayward@arm.com>
881 David Sherwood <david.sherwood@arm.com>
883 * doc/md.texi (extract_last_@var{m}): Document.
884 * optabs.def (extract_last_optab): New optab.
885 * internal-fn.def (EXTRACT_LAST): New internal function.
886 * internal-fn.c (cond_unary_direct): New macro.
887 (expand_cond_unary_optab_fn): Likewise.
888 (direct_cond_unary_optab_supported_p): Likewise.
889 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
890 loops using EXTRACT_LAST.
891 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
892 (extract_last_<mode>): ...this optab.
893 (vec_extract<mode><Vel>): Update accordingly.
895 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
896 Alan Hayward <alan.hayward@arm.com>
897 David Sherwood <david.sherwood@arm.com>
899 * target.def (empty_mask_is_expensive): New hook.
900 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
901 * doc/tm.texi: Regenerate.
902 * targhooks.h (default_empty_mask_is_expensive): Declare.
903 * targhooks.c (default_empty_mask_is_expensive): New function.
904 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
905 if the target says that empty masks are expensive.
906 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
908 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
910 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
911 Alan Hayward <alan.hayward@arm.com>
912 David Sherwood <david.sherwood@arm.com>
914 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
915 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
916 (vect_use_loop_mask_for_alignment_p): New function.
917 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
918 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
919 niters_skip argument. Make sure that the first niters_skip elements
920 of the first iteration are inactive.
921 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
922 Update call to vect_set_loop_masks_directly.
923 (get_misalign_in_elems): New function, split out from...
924 (vect_gen_prolog_loop_niters): ...here.
925 (vect_update_init_of_dr): Take a code argument that specifies whether
926 the adjustment should be added or subtracted.
927 (vect_update_init_of_drs): Likewise.
928 (vect_prepare_for_masked_peels): New function.
929 (vect_do_peeling): Skip prologue peeling if we're using a mask
930 instead. Update call to vect_update_inits_of_drs.
931 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
933 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
934 alignment. Do not include the number of peeled iterations in
935 the minimum threshold in that case.
936 (vectorizable_induction): Adjust the start value down by
937 LOOP_VINFO_MASK_SKIP_NITERS iterations.
938 (vect_transform_loop): Call vect_prepare_for_masked_peels.
939 Take the number of skipped iterations into account when calculating
941 * tree-vect-stmts.c (vect_gen_while_not): New function.
943 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
944 Alan Hayward <alan.hayward@arm.com>
945 David Sherwood <david.sherwood@arm.com>
947 * doc/sourcebuild.texi (vect_fully_masked): Document.
948 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
950 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
952 (vect_analyze_loop_2): ...here. Don't check the vectorization
953 factor against the number of loop iterations if the loop is
956 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
957 Alan Hayward <alan.hayward@arm.com>
958 David Sherwood <david.sherwood@arm.com>
960 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
961 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
962 (dump_groups): Update accordingly.
963 (iv_use::mem_type): New member variable.
964 (address_p): New function.
965 (record_use): Add a mem_type argument and initialize the new
967 (record_group_use): Add a mem_type argument. Use address_p.
968 Remove obsolete null checks of base_object. Update call to record_use.
969 (find_interesting_uses_op): Update call to record_group_use.
970 (find_interesting_uses_cond): Likewise.
971 (find_interesting_uses_address): Likewise.
972 (get_mem_type_for_internal_fn): New function.
973 (find_address_like_use): Likewise.
974 (find_interesting_uses_stmt): Try find_address_like_use before
975 calling find_interesting_uses_op.
976 (addr_offset_valid_p): Use the iv mem_type field as the type
977 of the addressed memory.
978 (add_autoinc_candidates): Likewise.
979 (get_address_cost): Likewise.
980 (split_small_address_groups_p): Use address_p.
981 (split_address_groups): Likewise.
982 (add_iv_candidate_for_use): Likewise.
983 (autoinc_possible_for_pair): Likewise.
984 (rewrite_groups): Likewise.
985 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
986 (determine_group_iv_cost): Update after split of USE_ADDRESS.
987 (get_alias_ptr_type_for_ptr_address): New function.
988 (rewrite_use_address): Rewrite address uses in calls that were
989 identified by find_address_like_use.
991 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
992 Alan Hayward <alan.hayward@arm.com>
993 David Sherwood <david.sherwood@arm.com>
995 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
997 * gimple-expr.h (is_gimple_addressable: Likewise.
998 * gimple-expr.c (is_gimple_address): Likewise.
999 * internal-fn.c (expand_call_mem_ref): New function.
1000 (expand_mask_load_optab_fn): Use it.
1001 (expand_mask_store_optab_fn): Likewise.
1003 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1004 Alan Hayward <alan.hayward@arm.com>
1005 David Sherwood <david.sherwood@arm.com>
1007 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1008 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1009 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1010 (cond_umax@var{mode}): Document.
1011 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1012 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1013 (cond_umin_optab, cond_umax_optab): New optabs.
1014 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1015 (COND_IOR, COND_XOR): New internal functions.
1016 * internal-fn.h (get_conditional_internal_fn): Declare.
1017 * internal-fn.c (cond_binary_direct): New macro.
1018 (expand_cond_binary_optab_fn): Likewise.
1019 (direct_cond_binary_optab_supported_p): Likewise.
1020 (get_conditional_internal_fn): New function.
1021 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1022 Cope with reduction statements that are vectorized as calls rather
1024 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1025 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1026 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1027 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1028 (UNSPEC_COND_EOR): New unspecs.
1029 (optab): Add mappings for them.
1030 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1031 (sve_int_op, sve_fp_op): New int attributes.
1033 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1034 Alan Hayward <alan.hayward@arm.com>
1035 David Sherwood <david.sherwood@arm.com>
1037 * optabs.def (while_ult_optab): New optab.
1038 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1039 * internal-fn.def (WHILE_ULT): New internal function.
1040 * internal-fn.h (direct_internal_fn_supported_p): New override
1041 that takes two types as argument.
1042 * internal-fn.c (while_direct): New macro.
1043 (expand_while_optab_fn): New function.
1044 (convert_optab_supported_p): Likewise.
1045 (direct_while_optab_supported_p): New macro.
1046 * wide-int.h (wi::udiv_ceil): New function.
1047 * tree-vectorizer.h (rgroup_masks): New structure.
1048 (vec_loop_masks): New typedef.
1049 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1051 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1052 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1053 (vect_max_vf): New function.
1054 (slpeel_make_loop_iterate_ntimes): Delete.
1055 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1056 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1057 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1058 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1059 internal-fn.h, stor-layout.h and optabs-query.h.
1060 (vect_set_loop_mask): New function.
1061 (add_preheader_seq): Likewise.
1062 (add_header_seq): Likewise.
1063 (interleave_supported_p): Likewise.
1064 (vect_maybe_permute_loop_masks): Likewise.
1065 (vect_set_loop_masks_directly): Likewise.
1066 (vect_set_loop_condition_masked): Likewise.
1067 (vect_set_loop_condition_unmasked): New function, split out from
1068 slpeel_make_loop_iterate_ntimes.
1069 (slpeel_make_loop_iterate_ntimes): Rename to..
1070 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1071 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1072 (vect_do_peeling): Update call accordingly.
1073 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1075 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1076 mask_compare_type, can_fully_mask_p and fully_masked_p.
1077 (release_vec_loop_masks): New function.
1078 (_loop_vec_info): Use it to free the loop masks.
1079 (can_produce_all_loop_masks_p): New function.
1080 (vect_get_max_nscalars_per_iter): Likewise.
1081 (vect_verify_full_masking): Likewise.
1082 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1083 retries, and free the mask rgroups before retrying. Check loop-wide
1084 reasons for disallowing fully-masked loops. Make the final decision
1085 about whether use a fully-masked loop or not.
1086 (vect_estimate_min_profitable_iters): Do not assume that peeling
1087 for the number of iterations will be needed for fully-masked loops.
1088 (vectorizable_reduction): Disable fully-masked loops.
1089 (vectorizable_live_operation): Likewise.
1090 (vect_halve_mask_nunits): New function.
1091 (vect_double_mask_nunits): Likewise.
1092 (vect_record_loop_mask): Likewise.
1093 (vect_get_loop_mask): Likewise.
1094 (vect_transform_loop): Handle the case in which the final loop
1095 iteration might handle a partial vector. Call vect_set_loop_condition
1096 instead of slpeel_make_loop_iterate_ntimes.
1097 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1098 (check_load_store_masking): New function.
1099 (prepare_load_store_mask): Likewise.
1100 (vectorizable_store): Handle fully-masked loops.
1101 (vectorizable_load): Likewise.
1102 (supportable_widening_operation): Use vect_halve_mask_nunits for
1104 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1105 (vect_gen_while): New function.
1106 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1107 (aarch64_uqdec<mode>): New insn.
1109 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1110 Alan Hayward <alan.hayward@arm.com>
1111 David Sherwood <david.sherwood@arm.com>
1113 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1114 (reduc_xor_scal_optab): New optabs.
1115 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1116 (reduc_xor_scal_@var{m}): Document.
1117 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1118 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1120 * fold-const-call.c (fold_const_call): Handle them.
1121 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1122 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1123 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1124 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1125 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1126 (UNSPEC_XORV): New unspecs.
1127 (optab): Add entries for them.
1128 (BITWISEV): New int iterator.
1129 (bit_reduc_op): New int attributes.
1131 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1132 Alan Hayward <alan.hayward@arm.com>
1133 David Sherwood <david.sherwood@arm.com>
1135 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1136 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1137 * optabs.def (vec_shl_insert_optab): New optab.
1138 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1139 (duplicate_and_interleave): Likewise.
1140 * tree-vect-loop.c: Include internal-fn.h.
1141 (neutral_op_for_slp_reduction): New function, split out from
1142 get_initial_defs_for_reduction.
1143 (get_initial_def_for_reduction): Handle option 2 for variable-length
1144 vectors by loading the neutral value into a vector and then shifting
1145 the initial value into element 0.
1146 (get_initial_defs_for_reduction): Replace the code argument with
1147 the neutral value calculated by neutral_op_for_slp_reduction.
1148 Use gimple_build_vector for constant-length vectors.
1149 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1150 but the first group_size elements have a neutral value.
1151 Use duplicate_and_interleave otherwise.
1152 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1153 Update call to get_initial_defs_for_reduction. Handle SLP
1154 reductions for variable-length vectors by creating one vector
1155 result for each scalar result, with the elements associated
1156 with other scalar results stubbed out with the neutral value.
1157 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1158 Require IFN_VEC_SHL_INSERT for double reductions on
1159 variable-length vectors, or SLP reductions that have
1160 a neutral value. Require can_duplicate_and_interleave_p
1161 support for variable-length unchained SLP reductions if there
1162 is no neutral value, such as for MIN/MAX reductions. Also require
1163 the number of vector elements to be a multiple of the number of
1164 SLP statements when doing variable-length unchained SLP reductions.
1165 Update call to vect_create_epilog_for_reduction.
1166 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1167 and remove initial values.
1168 (duplicate_and_interleave): Make public.
1169 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1170 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1172 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1173 Alan Hayward <alan.hayward@arm.com>
1174 David Sherwood <david.sherwood@arm.com>
1176 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1177 (can_duplicate_and_interleave_p): New function.
1178 (vect_get_and_check_slp_defs): Take the vector of statements
1179 rather than just the current one. Remove excess parentheses.
1180 Restriction rejectinon of vect_constant_def and vect_external_def
1181 for variable-length vectors to boolean types, or types for which
1182 can_duplicate_and_interleave_p is false.
1183 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1184 (duplicate_and_interleave): New function.
1185 (vect_get_constant_vectors): Use gimple_build_vector for
1186 constant-length vectors and suitable variable-length constant
1187 vectors. Use duplicate_and_interleave for other variable-length
1188 vectors. Don't defer the update when inserting new statements.
1190 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1191 Alan Hayward <alan.hayward@arm.com>
1192 David Sherwood <david.sherwood@arm.com>
1194 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1195 min_profitable_iters doesn't go negative.
1197 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1198 Alan Hayward <alan.hayward@arm.com>
1199 David Sherwood <david.sherwood@arm.com>
1201 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1202 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1203 * optabs.def (vec_mask_load_lanes_optab): New optab.
1204 (vec_mask_store_lanes_optab): Likewise.
1205 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1206 (MASK_STORE_LANES): Likewise.
1207 * internal-fn.c (mask_load_lanes_direct): New macro.
1208 (mask_store_lanes_direct): Likewise.
1209 (expand_mask_load_optab_fn): Handle masked operations.
1210 (expand_mask_load_lanes_optab_fn): New macro.
1211 (expand_mask_store_optab_fn): Handle masked operations.
1212 (expand_mask_store_lanes_optab_fn): New macro.
1213 (direct_mask_load_lanes_optab_supported_p): Likewise.
1214 (direct_mask_store_lanes_optab_supported_p): Likewise.
1215 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1217 (vect_load_lanes_supported): Likewise.
1218 * tree-vect-data-refs.c (strip_conversion): New function.
1219 (can_group_stmts_p): Likewise.
1220 (vect_analyze_data_ref_accesses): Use it instead of checking
1221 for a pair of assignments.
1222 (vect_store_lanes_supported): Take a masked_p parameter.
1223 (vect_load_lanes_supported): Likewise.
1224 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1225 vect_store_lanes_supported and vect_load_lanes_supported.
1226 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1227 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1228 parameter. Don't allow gaps for masked accesses.
1229 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1230 and vect_load_lanes_supported.
1231 (get_load_store_type): Take a masked_p parameter and update
1232 call to get_group_load_store_type.
1233 (vectorizable_store): Update call to get_load_store_type.
1234 Handle IFN_MASK_STORE_LANES.
1235 (vectorizable_load): Update call to get_load_store_type.
1236 Handle IFN_MASK_LOAD_LANES.
1238 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1239 Alan Hayward <alan.hayward@arm.com>
1240 David Sherwood <david.sherwood@arm.com>
1242 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1244 * config/aarch64/aarch64-protos.h
1245 (aarch64_sve_struct_memory_operand_p): Declare.
1246 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1247 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1248 (VPRED, vpred): Handle SVE structure modes.
1249 * config/aarch64/constraints.md (Utx): New constraint.
1250 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1251 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1252 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1253 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1254 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1255 structure modes. Split into pieces after RA.
1256 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1257 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1259 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1260 SVE structure modes.
1261 (aarch64_classify_address): Likewise.
1262 (sizetochar): Move earlier in file.
1263 (aarch64_print_operand): Handle SVE register lists.
1264 (aarch64_array_mode): New function.
1265 (aarch64_sve_struct_memory_operand_p): Likewise.
1266 (TARGET_ARRAY_MODE): Redefine.
1268 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1269 Alan Hayward <alan.hayward@arm.com>
1270 David Sherwood <david.sherwood@arm.com>
1272 * target.def (array_mode): New target hook.
1273 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1274 * doc/tm.texi: Regenerate.
1275 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1276 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1277 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1279 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1282 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1283 Alan Hayward <alan.hayward@arm.com>
1284 David Sherwood <david.sherwood@arm.com>
1286 * fold-const.c (fold_binary_loc): Check the argument types
1287 rather than the result type when testing for a vector operation.
1289 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1291 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1292 * doc/tm.texi: Regenerate.
1294 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1295 Alan Hayward <alan.hayward@arm.com>
1296 David Sherwood <david.sherwood@arm.com>
1298 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1299 (sve): Document new AArch64 extension.
1300 * doc/md.texi (w): Extend the description of the AArch64
1301 constraint to include SVE vectors.
1302 (Upl, Upa): Document new AArch64 predicate constraints.
1303 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1305 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1306 (msve-vector-bits=): New option.
1307 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1308 SVE when these are disabled.
1309 (sve): New extension.
1310 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1311 modes. Adjust their number of units based on aarch64_sve_vg.
1312 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1313 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1314 aarch64_addr_query_type.
1315 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1316 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1317 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1318 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1319 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1320 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1321 (aarch64_simd_imm_zero_p): Delete.
1322 (aarch64_check_zero_based_sve_index_immediate): Declare.
1323 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1324 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1325 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1326 (aarch64_sve_float_mul_immediate_p): Likewise.
1327 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1329 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1330 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1331 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1332 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1333 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1334 (aarch64_regmode_natural_size): Likewise.
1335 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1336 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1338 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1339 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1340 for VG and the SVE predicate registers.
1341 (V_ALIASES): Add a "z"-prefixed alias.
1342 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1343 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1344 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1345 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1346 (REG_CLASS_NAMES): Add entries for them.
1347 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1348 and the predicate registers.
1349 (aarch64_sve_vg): Declare.
1350 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1351 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1352 (REGMODE_NATURAL_SIZE): Define.
1353 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1355 * config/aarch64/aarch64.c: Include cfgrtl.h.
1356 (simd_immediate_info): Add a constructor for series vectors,
1357 and an associated step field.
1358 (aarch64_sve_vg): New variable.
1359 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1360 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1361 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1362 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1363 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1364 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1365 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1366 (aarch64_get_mask_mode): New functions.
1367 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1368 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1369 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1370 predicate modes and predicate registers. Explicitly restrict
1371 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1372 to store a vector mode if it is recognized by
1373 aarch64_classify_vector_mode.
1374 (aarch64_regmode_natural_size): New function.
1375 (aarch64_hard_regno_caller_save_mode): Return the original mode
1377 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1378 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1379 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1380 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1382 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1383 does not overlap dest if the function is frame-related. Handle
1385 (aarch64_split_add_offset): New function.
1386 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1387 them aarch64_add_offset.
1388 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1389 and update call to aarch64_sub_sp.
1390 (aarch64_add_cfa_expression): New function.
1391 (aarch64_expand_prologue): Pass extra temporary registers to the
1392 functions above. Handle the case in which we need to emit new
1393 DW_CFA_expressions for registers that were originally saved
1394 relative to the stack pointer, but now have to be expressed
1395 relative to the frame pointer.
1396 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1398 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1399 IP0 and IP1 values for SVE frames.
1400 (aarch64_expand_vec_series): New function.
1401 (aarch64_expand_sve_widened_duplicate): Likewise.
1402 (aarch64_expand_sve_const_vector): Likewise.
1403 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1404 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1405 into the register, rather than emitting a SET directly.
1406 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1407 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1408 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1409 (offset_9bit_signed_scaled_p): New functions.
1410 (aarch64_replicate_bitmask_imm): New function.
1411 (aarch64_bitmask_imm): Use it.
1412 (aarch64_cannot_force_const_mem): Reject expressions involving
1413 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1414 (aarch64_classify_index): Handle SVE indices, by requiring
1415 a plain register index with a scale that matches the element size.
1416 (aarch64_classify_address): Handle SVE addresses. Assert that
1417 the mode of the address is VOIDmode or an integer mode.
1418 Update call to aarch64_classify_symbol.
1419 (aarch64_classify_symbolic_expression): Update call to
1420 aarch64_classify_symbol.
1421 (aarch64_const_vec_all_in_range_p): New function.
1422 (aarch64_print_vector_float_operand): Likewise.
1423 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1424 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1425 and the FP immediates 1.0 and 0.5.
1426 (aarch64_print_address_internal): Handle SVE addresses.
1427 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1428 (aarch64_regno_regclass): Handle predicate registers.
1429 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1431 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1432 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1433 (aarch64_convert_sve_vector_bits): New function.
1434 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1435 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1437 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1438 Handle SVE vector and predicate modes. Accept VL-based constants
1439 that need only one temporary register, and VL offsets that require
1440 no temporary registers.
1441 (aarch64_conditional_register_usage): Mark the predicate registers
1442 as fixed if SVE isn't available.
1443 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1444 Return true for SVE vector and predicate modes.
1445 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1446 rather than an unsigned int. Handle SVE modes.
1447 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1449 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1451 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1452 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1453 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1454 (aarch64_sve_float_mul_immediate_p): New functions.
1455 (aarch64_sve_valid_immediate): New function.
1456 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1457 Explicitly reject structure modes. Check for INDEX constants.
1458 Handle PTRUE and PFALSE constants.
1459 (aarch64_check_zero_based_sve_index_immediate): New function.
1460 (aarch64_simd_imm_zero_p): Delete.
1461 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1462 vector modes. Accept constants in the range of CNT[BHWD].
1463 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1464 ask for an Advanced SIMD mode.
1465 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1466 (aarch64_simd_vector_alignment): Handle SVE predicates.
1467 (aarch64_vectorize_preferred_vector_alignment): New function.
1468 (aarch64_simd_vector_alignment_reachable): Use it instead of
1470 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1471 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1473 (MAX_VECT_LEN): Delete.
1474 (expand_vec_perm_d): Add a vec_flags field.
1475 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1476 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1477 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1479 (aarch64_evpc_rev): Rename to...
1480 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1481 (aarch64_evpc_rev_global): New function.
1482 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1483 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1485 (aarch64_evpc_sve_tbl): New function.
1486 (aarch64_expand_vec_perm_const_1): Update after rename of
1487 aarch64_evpc_rev. Handle SVE permutes too, trying
1488 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1489 than aarch64_evpc_tbl.
1490 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1491 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1492 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1493 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1494 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1495 (aarch64_expand_sve_vcond): New functions.
1496 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1497 of aarch64_vector_mode_p.
1498 (aarch64_dwarf_poly_indeterminate_value): New function.
1499 (aarch64_compute_pressure_classes): Likewise.
1500 (aarch64_can_change_mode_class): Likewise.
1501 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1502 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1503 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1504 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1505 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1506 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1507 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1508 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1510 (Dn, Dl, Dr): Accept const as well as const_vector.
1511 (Dz): Likewise. Compare against CONST0_RTX.
1512 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1513 of "vector" where appropriate.
1514 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1515 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1516 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1517 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1518 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1519 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1520 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1521 (v_int_equiv): Extend to SVE modes.
1522 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1524 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1525 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1526 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1527 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1528 (SVE_COND_FP_CMP): New int iterators.
1529 (perm_hilo): Handle the new unpack unspecs.
1530 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1532 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1533 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1534 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1535 (aarch64_equality_operator, aarch64_constant_vector_operand)
1536 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1537 (aarch64_sve_nonimmediate_operand): Likewise.
1538 (aarch64_sve_general_operand): Likewise.
1539 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1540 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1541 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1542 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1543 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1544 (aarch64_sve_float_arith_immediate): Likewise.
1545 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1546 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1547 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1548 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1549 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1550 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1551 (aarch64_sve_float_arith_operand): Likewise.
1552 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1553 (aarch64_sve_float_mul_operand): Likewise.
1554 (aarch64_sve_vec_perm_operand): Likewise.
1555 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1556 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1557 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1558 as well as const_vector.
1559 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1560 in file. Use CONST0_RTX and CONSTM1_RTX.
1561 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1562 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1563 Use aarch64_simd_imm_zero.
1564 * config/aarch64/aarch64-sve.md: New file.
1565 * config/aarch64/aarch64.md: Include it.
1566 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1567 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1568 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1569 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1570 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1571 (sve): New attribute.
1572 (enabled): Disable instructions with the sve attribute unless
1574 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1575 aarch64_expand_mov_immediate.
1576 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1577 CNT[BHSD] immediates.
1578 (movti): Split CONST_POLY_INT moves into two halves.
1579 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1580 Split additions that need a temporary here if the destination
1581 is the stack pointer.
1582 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1583 (*add<mode>3_poly_1): New instruction.
1584 (set_clobber_cc): New expander.
1586 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1588 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1589 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1590 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1591 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1592 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1593 Change innermode from fixed_mode_size to machine_mode.
1594 (simplify_subreg): Update call accordingly. Handle a constant-sized
1595 subreg of a variable-length CONST_VECTOR.
1597 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1598 Alan Hayward <alan.hayward@arm.com>
1599 David Sherwood <david.sherwood@arm.com>
1601 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1602 (add_offset_to_base): New function, split out from...
1603 (create_mem_ref): ...here. When handling a scale other than 1,
1604 check first whether the address is valid without the offset.
1605 Add it into the base if so, leaving the index and scale as-is.
1607 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1610 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1611 fold_for_warn before checking if arg2 is INTEGER_CST.
1613 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1615 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1616 (store_multiple_operation): Delete.
1617 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1618 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1619 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1620 guarded by TARGET_STRING.
1621 (rs6000_output_load_multiple): Delete.
1622 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1623 OPTION_MASK_STRING / TARGET_STRING handling.
1624 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1625 (const rs6000_opt_masks) <"string">: Change mask to 0.
1626 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1627 (MASK_STRING): Delete.
1628 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1630 (load_multiple): Delete.
1637 (store_multiple): Delete.
1644 (movmemsi_8reg): Delete.
1645 (corresponding unnamed define_insn): Delete.
1646 (movmemsi_6reg): Delete.
1647 (corresponding unnamed define_insn): Delete.
1648 (movmemsi_4reg): Delete.
1649 (corresponding unnamed define_insn): Delete.
1650 (movmemsi_2reg): Delete.
1651 (corresponding unnamed define_insn): Delete.
1652 (movmemsi_1reg): Delete.
1653 (corresponding unnamed define_insn): Delete.
1654 * config/rs6000/rs6000.opt (mno-string): New.
1655 (mstring): Replace by deprecation warning stub.
1656 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1658 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1660 * regrename.c (regrename_do_replace): If replacing the same
1661 reg multiple times, try to reuse last created gen_raw_REG.
1664 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1665 main to workaround a bug in GDB.
1667 2018-01-12 Tom de Vries <tom@codesourcery.com>
1670 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1672 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1674 PR rtl-optimization/80481
1675 * ira-color.c (get_cap_member): New function.
1676 (allocnos_conflict_by_live_ranges_p): Use it.
1677 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1678 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1680 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1683 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1684 (*saddl_se_1): Ditto.
1686 (*ssubl_se_1): Ditto.
1688 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1690 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1691 rather than wi::to_widest for DR_INITs.
1692 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1693 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1694 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1696 (vect_analyze_group_access_1): Note that here.
1698 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1700 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1701 polynomial type sizes.
1703 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1705 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1706 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1707 (gimple_add_tmp_var): Likewise.
1709 2018-01-12 Martin Liska <mliska@suse.cz>
1711 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1712 (gimple_alloc_sizes): Likewise.
1713 (dump_gimple_statistics): Use PRIu64 in printf format.
1714 * gimple.h: Change uint64_t to int.
1716 2018-01-12 Martin Liska <mliska@suse.cz>
1718 * tree-core.h: Use uint64_t instead of int.
1719 * tree.c (tree_node_counts): Likewise.
1720 (tree_node_sizes): Likewise.
1721 (dump_tree_statistics): Use PRIu64 in printf format.
1723 2018-01-12 Martin Liska <mliska@suse.cz>
1725 * Makefile.in: As qsort_chk is implemented in vec.c, add
1726 vec.o to linkage of gencfn-macros.
1727 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1728 passing the info to record_node_allocation_statistics.
1729 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1731 * ggc-common.c (struct ggc_usage): Add operator== and use
1732 it in operator< and compare function.
1733 * mem-stats.h (struct mem_usage): Likewise.
1734 * vec.c (struct vec_usage): Remove operator< and compare
1735 function. Can be simply inherited.
1737 2018-01-12 Martin Jambor <mjambor@suse.cz>
1740 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1741 * tree-ssa-math-opts.c: Include domwalk.h.
1742 (convert_mult_to_fma_1): New function.
1743 (fma_transformation_info): New type.
1744 (fma_deferring_state): Likewise.
1745 (cancel_fma_deferring): New function.
1746 (result_of_phi): Likewise.
1747 (last_fma_candidate_feeds_initial_phi): Likewise.
1748 (convert_mult_to_fma): Added deferring logic, split actual
1749 transformation to convert_mult_to_fma_1.
1750 (math_opts_dom_walker): New type.
1751 (math_opts_dom_walker::after_dom_children): New method, body moved
1752 here from pass_optimize_widening_mul::execute, added deferring logic
1754 (pass_optimize_widening_mul::execute): Moved most of code to
1755 math_opts_dom_walker::after_dom_children.
1756 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1757 * config/i386/i386.c (ix86_option_override_internal): Added
1758 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1760 2018-01-12 Richard Biener <rguenther@suse.de>
1763 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1764 inline instance vars.
1766 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1769 * config/rx/rx.c (rx_is_restricted_memory_address):
1772 2018-01-12 Richard Biener <rguenther@suse.de>
1774 PR tree-optimization/80846
1775 * target.def (split_reduction): New target hook.
1776 * targhooks.c (default_split_reduction): New function.
1777 * targhooks.h (default_split_reduction): Declare.
1778 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1779 target requests first reduce vectors by combining low and high
1781 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1782 (get_vectype_for_scalar_type_and_size): Export.
1783 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1784 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1785 * doc/tm.texi: Regenerate.
1786 * config/i386/i386.c (ix86_split_reduction): Implement
1787 TARGET_VECTORIZE_SPLIT_REDUCTION.
1789 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1792 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1793 in PIC mode except for TARGET_VXWORKS_RTP.
1794 * config/sparc/sparc.c: Include cfgrtl.h.
1795 (TARGET_INIT_PIC_REG): Define.
1796 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1797 (sparc_pic_register_p): New predicate.
1798 (sparc_legitimate_address_p): Use it.
1799 (sparc_legitimize_pic_address): Likewise.
1800 (sparc_delegitimize_address): Likewise.
1801 (sparc_mode_dependent_address_p): Likewise.
1802 (gen_load_pcrel_sym): Remove 4th parameter.
1803 (load_got_register): Adjust call to above. Remove obsolete stuff.
1804 (sparc_expand_prologue): Do not call load_got_register here.
1805 (sparc_flat_expand_prologue): Likewise.
1806 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1807 (sparc_use_pseudo_pic_reg): New function.
1808 (sparc_init_pic_reg): Likewise.
1809 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1810 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1812 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1814 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1815 Add item for branch_cost.
1817 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1819 PR rtl-optimization/83565
1820 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1821 not extend the result to a larger mode for rotate operations.
1822 (num_sign_bit_copies1): Likewise.
1824 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1827 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1829 Use values-Xc.o for -pedantic.
1830 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1832 2018-01-12 Martin Liska <mliska@suse.cz>
1835 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1837 (possible_polymorphic_call_targets): Use it.
1838 (ipa_devirt): Likewise.
1840 2018-01-12 Martin Liska <mliska@suse.cz>
1842 * profile-count.h (enum profile_quality): Use 0 as invalid
1843 enum value of profile_quality.
1845 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1847 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1848 -mext-string options.
1850 2018-01-12 Richard Biener <rguenther@suse.de>
1852 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1853 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1854 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1856 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1858 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1860 * configure.ac (--with-long-double-format): Add support for the
1861 configuration option to change the default long double format on
1863 * config.gcc (powerpc*-linux*-*): Likewise.
1864 * configure: Regenerate.
1865 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1866 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1867 used without modification.
1869 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1871 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1872 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1873 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1874 MISC_BUILTIN_SPEC_BARRIER.
1875 (rs6000_init_builtins): Likewise.
1876 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1878 (speculation_barrier): New define_insn.
1879 * doc/extend.texi: Document __builtin_speculation_barrier.
1881 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1884 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1885 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1886 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1888 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1889 integral modes instead of "ss" and "sd".
1890 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1891 vectors with 32-bit and 64-bit elements.
1892 (vecdupssescalarmodesuffix): New mode attribute.
1893 (vec_dup<mode>): Use it.
1895 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1898 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1899 frame if argument is passed on stack.
1901 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1904 * ree.c (combine_reaching_defs): Optimize also
1905 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1906 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1908 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1911 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1913 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1916 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1917 after they are computed.
1919 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1921 PR tree-optimization/83695
1922 * gimple-loop-linterchange.cc
1923 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1924 reset cached scev information after interchange.
1925 (pass_linterchange::execute): Remove call to scev_reset_htab.
1927 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1929 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1930 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1931 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1932 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1933 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1934 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1935 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1936 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1937 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1938 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1939 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1940 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1941 (V_lane_reg): Likewise.
1942 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1944 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1945 (vfmal_lane_low<mode>_intrinsic,
1946 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1947 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1948 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1949 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1950 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1951 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1953 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1955 * config/arm/arm-cpus.in (fp16fml): New feature.
1956 (ALL_SIMD): Add fp16fml.
1957 (armv8.2-a): Add fp16fml as an option.
1958 (armv8.3-a): Likewise.
1959 (armv8.4-a): Add fp16fml as part of fp16.
1960 * config/arm/arm.h (TARGET_FP16FML): Define.
1961 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1963 * config/arm/arm-modes.def (V2HF): Define.
1964 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1965 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1966 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1967 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1968 vfmsl_low, vfmsl_high): New set of builtins.
1969 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1970 (vfml_op): New code attribute.
1971 (VFMLHALVES): New int iterator.
1972 (VFML, VFMLSEL): New mode attributes.
1973 (V_reg): Define mapping for V2HF.
1974 (V_hi, V_lo): New mode attributes.
1975 (VF_constraint): Likewise.
1976 (vfml_half, vfml_half_selector): New int attributes.
1977 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1979 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1980 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1982 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1983 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1984 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1985 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1987 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1988 Document new effective target and option set.
1990 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1992 * config/arm/arm-cpus.in (armv8_4): New feature.
1993 (ARMv8_4a): New fgroup.
1994 (armv8.4-a): New arch.
1995 * config/arm/arm-tables.opt: Regenerate.
1996 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1997 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1998 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1999 Add matching rules for -march=armv8.4-a and extensions.
2000 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2002 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2005 * config/rx/rx.md (BW): New mode attribute.
2006 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2008 2018-01-11 Richard Biener <rguenther@suse.de>
2010 PR tree-optimization/83435
2011 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2012 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2013 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2015 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2016 Alan Hayward <alan.hayward@arm.com>
2017 David Sherwood <david.sherwood@arm.com>
2019 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2021 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2022 (aarch64_print_address_internal): Use it to check for a zero offset.
2024 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2025 Alan Hayward <alan.hayward@arm.com>
2026 David Sherwood <david.sherwood@arm.com>
2028 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2029 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2030 Return a poly_int64 rather than a HOST_WIDE_INT.
2031 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2032 rather than a HOST_WIDE_INT.
2033 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2034 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2035 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2036 final_offset from HOST_WIDE_INT to poly_int64.
2037 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2038 to_constant when getting the number of units in an Advanced SIMD
2040 (aarch64_builtin_vectorized_function): Check for a constant number
2042 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2044 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2045 attribute instead of GET_MODE_NUNITS.
2046 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2047 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2048 GET_MODE_SIZE for fixed-size registers.
2049 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2050 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2051 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2052 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2053 (aarch64_print_operand, aarch64_print_address_internal)
2054 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2055 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2056 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2057 Handle polynomial GET_MODE_SIZE.
2058 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2059 wider than SImode without modification.
2060 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2061 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2062 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2063 passing and returning SVE modes.
2064 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2065 rather than GEN_INT.
2066 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2067 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2068 (aarch64_allocate_and_probe_stack_space): Likewise.
2069 (aarch64_layout_frame): Cope with polynomial offsets.
2070 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2071 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2073 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2074 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2075 poly_int64 rather than a HOST_WIDE_INT.
2076 (aarch64_get_separate_components, aarch64_process_components)
2077 (aarch64_expand_prologue, aarch64_expand_epilogue)
2078 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2079 (aarch64_anchor_offset): New function, split out from...
2080 (aarch64_legitimize_address): ...here.
2081 (aarch64_builtin_vectorization_cost): Handle polynomial
2082 TYPE_VECTOR_SUBPARTS.
2083 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2085 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2086 number of elements from the PARALLEL rather than the mode.
2087 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2088 rather than GET_MODE_BITSIZE.
2089 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2090 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2091 (aarch64_expand_vec_perm_const_1): Handle polynomial
2092 d->perm.length () and d->perm elements.
2093 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2094 Apply to_constant to d->perm elements.
2095 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2096 polynomial CONST_VECTOR_NUNITS.
2097 (aarch64_move_pointer): Take amount as a poly_int64 rather
2099 (aarch64_progress_pointer): Avoid temporary variable.
2100 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2101 the mode attribute instead of GET_MODE.
2103 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2104 Alan Hayward <alan.hayward@arm.com>
2105 David Sherwood <david.sherwood@arm.com>
2107 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2108 x exists before using it.
2109 (aarch64_add_constant_internal): Rename to...
2110 (aarch64_add_offset_1): ...this. Replace regnum with separate
2111 src and dest rtxes. Handle the case in which they're different,
2112 including when the offset is zero. Replace scratchreg with an rtx.
2113 Use 2 additions if there is no spare register into which we can
2114 move a 16-bit constant.
2115 (aarch64_add_constant): Delete.
2116 (aarch64_add_offset): Replace reg with separate src and dest
2117 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2118 Use aarch64_add_offset_1.
2119 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2120 an rtx rather than an int. Take the delta as a poly_int64
2121 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2122 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2123 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2124 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2125 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2127 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2128 aarch64_add_constant.
2130 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2132 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2133 Use scalar_float_mode.
2135 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2137 * config/aarch64/aarch64-simd.md
2138 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2139 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2140 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2141 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2142 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2143 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2144 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2145 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2146 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2147 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2149 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2152 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2153 targ_options->x_arm_arch_string is non NULL.
2155 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2157 * config/aarch64/aarch64.h
2158 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2160 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2163 * expmed.c (emit_store_flag_force): Swap if const op0
2164 and change VOIDmode to mode of op0.
2166 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2168 PR rtl-optimization/83761
2169 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2170 than bytes to mode_for_size.
2172 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2175 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2176 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2179 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2182 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2183 when in layout mode.
2184 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2185 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2188 2018-01-10 Michael Collison <michael.collison@arm.com>
2190 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2191 * config/aarch64/aarch64-option-extension.def: Add
2192 AARCH64_OPT_EXTENSION of 'fp16fml'.
2193 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2194 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2195 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2196 * config/aarch64/constraints.md (Ui7): New constraint.
2197 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2198 (VFMLA_SEL_W): Ditto.
2201 (VFMLA16_LOW): New int iterator.
2202 (VFMLA16_HIGH): Ditto.
2203 (UNSPEC_FMLAL): New unspec.
2204 (UNSPEC_FMLSL): Ditto.
2205 (UNSPEC_FMLAL2): Ditto.
2206 (UNSPEC_FMLSL2): Ditto.
2207 (f16mac): New code attribute.
2208 * config/aarch64/aarch64-simd-builtins.def
2209 (aarch64_fmlal_lowv2sf): Ditto.
2210 (aarch64_fmlsl_lowv2sf): Ditto.
2211 (aarch64_fmlalq_lowv4sf): Ditto.
2212 (aarch64_fmlslq_lowv4sf): Ditto.
2213 (aarch64_fmlal_highv2sf): Ditto.
2214 (aarch64_fmlsl_highv2sf): Ditto.
2215 (aarch64_fmlalq_highv4sf): Ditto.
2216 (aarch64_fmlslq_highv4sf): Ditto.
2217 (aarch64_fmlal_lane_lowv2sf): Ditto.
2218 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2219 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2220 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2221 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2222 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2223 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2224 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2225 (aarch64_fmlal_lane_highv2sf): Ditto.
2226 (aarch64_fmlsl_lane_highv2sf): Ditto.
2227 (aarch64_fmlal_laneq_highv2sf): Ditto.
2228 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2229 (aarch64_fmlalq_lane_highv4sf): Ditto.
2230 (aarch64_fmlsl_lane_highv4sf): Ditto.
2231 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2232 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2233 * config/aarch64/aarch64-simd.md:
2234 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2235 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2236 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2237 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2238 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2239 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2240 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2241 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2242 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2243 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2244 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2245 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2246 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2247 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2248 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2249 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2250 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2251 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2252 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2253 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2254 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2255 (vfmlsl_low_u32): Ditto.
2256 (vfmlalq_low_u32): Ditto.
2257 (vfmlslq_low_u32): Ditto.
2258 (vfmlal_high_u32): Ditto.
2259 (vfmlsl_high_u32): Ditto.
2260 (vfmlalq_high_u32): Ditto.
2261 (vfmlslq_high_u32): Ditto.
2262 (vfmlal_lane_low_u32): Ditto.
2263 (vfmlsl_lane_low_u32): Ditto.
2264 (vfmlal_laneq_low_u32): Ditto.
2265 (vfmlsl_laneq_low_u32): Ditto.
2266 (vfmlalq_lane_low_u32): Ditto.
2267 (vfmlslq_lane_low_u32): Ditto.
2268 (vfmlalq_laneq_low_u32): Ditto.
2269 (vfmlslq_laneq_low_u32): Ditto.
2270 (vfmlal_lane_high_u32): Ditto.
2271 (vfmlsl_lane_high_u32): Ditto.
2272 (vfmlal_laneq_high_u32): Ditto.
2273 (vfmlsl_laneq_high_u32): Ditto.
2274 (vfmlalq_lane_high_u32): Ditto.
2275 (vfmlslq_lane_high_u32): Ditto.
2276 (vfmlalq_laneq_high_u32): Ditto.
2277 (vfmlslq_laneq_high_u32): Ditto.
2278 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2279 (AARCH64_FL_FOR_ARCH8_4): New.
2280 (AARCH64_ISA_F16FML): New ISA flag.
2281 (TARGET_F16FML): New feature flag for fp16fml.
2282 (doc/invoke.texi): Document new fp16fml option.
2284 2018-01-10 Michael Collison <michael.collison@arm.com>
2286 * config/aarch64/aarch64-builtins.c:
2287 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2288 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2289 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2290 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2291 (AARCH64_ISA_SHA3): New ISA flag.
2292 (TARGET_SHA3): New feature flag for sha3.
2293 * config/aarch64/iterators.md (sha512_op): New int attribute.
2294 (CRYPTO_SHA512): New int iterator.
2295 (UNSPEC_SHA512H): New unspec.
2296 (UNSPEC_SHA512H2): Ditto.
2297 (UNSPEC_SHA512SU0): Ditto.
2298 (UNSPEC_SHA512SU1): Ditto.
2299 * config/aarch64/aarch64-simd-builtins.def
2300 (aarch64_crypto_sha512hqv2di): New builtin.
2301 (aarch64_crypto_sha512h2qv2di): Ditto.
2302 (aarch64_crypto_sha512su0qv2di): Ditto.
2303 (aarch64_crypto_sha512su1qv2di): Ditto.
2304 (aarch64_eor3qv8hi): Ditto.
2305 (aarch64_rax1qv2di): Ditto.
2306 (aarch64_xarqv2di): Ditto.
2307 (aarch64_bcaxqv8hi): Ditto.
2308 * config/aarch64/aarch64-simd.md:
2309 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2310 (aarch64_crypto_sha512su0qv2di): Ditto.
2311 (aarch64_crypto_sha512su1qv2di): Ditto.
2312 (aarch64_eor3qv8hi): Ditto.
2313 (aarch64_rax1qv2di): Ditto.
2314 (aarch64_xarqv2di): Ditto.
2315 (aarch64_bcaxqv8hi): Ditto.
2316 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2317 (vsha512h2q_u64): Ditto.
2318 (vsha512su0q_u64): Ditto.
2319 (vsha512su1q_u64): Ditto.
2320 (veor3q_u16): Ditto.
2321 (vrax1q_u64): Ditto.
2323 (vbcaxq_u16): Ditto.
2324 * config/arm/types.md (crypto_sha512): New type attribute.
2325 (crypto_sha3): Ditto.
2326 (doc/invoke.texi): Document new sha3 option.
2328 2018-01-10 Michael Collison <michael.collison@arm.com>
2330 * config/aarch64/aarch64-builtins.c:
2331 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2332 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2333 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2334 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2335 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2336 (AARCH64_ISA_SM4): New ISA flag.
2337 (TARGET_SM4): New feature flag for sm4.
2338 * config/aarch64/aarch64-simd-builtins.def
2339 (aarch64_sm3ss1qv4si): Ditto.
2340 (aarch64_sm3tt1aq4si): Ditto.
2341 (aarch64_sm3tt1bq4si): Ditto.
2342 (aarch64_sm3tt2aq4si): Ditto.
2343 (aarch64_sm3tt2bq4si): Ditto.
2344 (aarch64_sm3partw1qv4si): Ditto.
2345 (aarch64_sm3partw2qv4si): Ditto.
2346 (aarch64_sm4eqv4si): Ditto.
2347 (aarch64_sm4ekeyqv4si): Ditto.
2348 * config/aarch64/aarch64-simd.md:
2349 (aarch64_sm3ss1qv4si): Ditto.
2350 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2351 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2352 (aarch64_sm4eqv4si): Ditto.
2353 (aarch64_sm4ekeyqv4si): Ditto.
2354 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2355 (sm3part_op): Ditto.
2356 (CRYPTO_SM3TT): Ditto.
2357 (CRYPTO_SM3PART): Ditto.
2358 (UNSPEC_SM3SS1): New unspec.
2359 (UNSPEC_SM3TT1A): Ditto.
2360 (UNSPEC_SM3TT1B): Ditto.
2361 (UNSPEC_SM3TT2A): Ditto.
2362 (UNSPEC_SM3TT2B): Ditto.
2363 (UNSPEC_SM3PARTW1): Ditto.
2364 (UNSPEC_SM3PARTW2): Ditto.
2365 (UNSPEC_SM4E): Ditto.
2366 (UNSPEC_SM4EKEY): Ditto.
2367 * config/aarch64/constraints.md (Ui2): New constraint.
2368 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2369 * config/arm/types.md (crypto_sm3): New type attribute.
2370 (crypto_sm4): Ditto.
2371 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2372 (vsm3tt1aq_u32): Ditto.
2373 (vsm3tt1bq_u32): Ditto.
2374 (vsm3tt2aq_u32): Ditto.
2375 (vsm3tt2bq_u32): Ditto.
2376 (vsm3partw1q_u32): Ditto.
2377 (vsm3partw2q_u32): Ditto.
2378 (vsm4eq_u32): Ditto.
2379 (vsm4ekeyq_u32): Ditto.
2380 (doc/invoke.texi): Document new sm4 option.
2382 2018-01-10 Michael Collison <michael.collison@arm.com>
2384 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2385 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2386 (AARCH64_FL_FOR_ARCH8_4): New.
2387 (AARCH64_FL_V8_4): New flag.
2388 (doc/invoke.texi): Document new armv8.4-a option.
2390 2018-01-10 Michael Collison <michael.collison@arm.com>
2392 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2393 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2394 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2395 * config/aarch64/aarch64-option-extension.def: Add
2396 AARCH64_OPT_EXTENSION of 'sha2'.
2397 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2398 (crypto): Disable sha2 and aes if crypto disabled.
2399 (crypto): Enable aes and sha2 if enabled.
2400 (simd): Disable sha2 and aes if simd disabled.
2401 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2403 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2404 (TARGET_SHA2): New feature flag for sha2.
2405 (TARGET_AES): New feature flag for aes.
2406 * config/aarch64/aarch64-simd.md:
2407 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2408 conditional on TARGET_AES.
2409 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2410 (aarch64_crypto_sha1hsi): Make pattern conditional
2412 (aarch64_crypto_sha1hv4si): Ditto.
2413 (aarch64_be_crypto_sha1hv4si): Ditto.
2414 (aarch64_crypto_sha1su1v4si): Ditto.
2415 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2416 (aarch64_crypto_sha1su0v4si): Ditto.
2417 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2418 (aarch64_crypto_sha256su0v4si): Ditto.
2419 (aarch64_crypto_sha256su1v4si): Ditto.
2420 (doc/invoke.texi): Document new aes and sha2 options.
2422 2018-01-10 Martin Sebor <msebor@redhat.com>
2424 PR tree-optimization/83781
2425 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2428 2018-01-11 Martin Sebor <msebor@gmail.com>
2429 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2431 PR tree-optimization/83501
2432 PR tree-optimization/81703
2434 * tree-ssa-strlen.c (get_string_cst): Rename...
2435 (get_string_len): ...to this. Handle global constants.
2436 (handle_char_store): Adjust.
2438 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2439 Jim Wilson <jimw@sifive.com>
2441 * config/riscv/riscv-protos.h (riscv_output_return): New.
2442 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2443 (riscv_attribute_table, riscv_output_return),
2444 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2445 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2446 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2448 (riscv_expand_prologue): Add early return for naked function.
2449 (riscv_expand_epilogue): Likewise.
2450 (riscv_function_ok_for_sibcall): Return false for naked function.
2451 (riscv_set_current_function): New.
2452 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2453 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2454 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2455 * doc/extend.texi (RISC-V Function Attributes): New.
2457 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2459 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2460 check for 128-bit long double before checking TCmode.
2461 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2462 128-bit long doubles before checking TFmode or TCmode.
2463 (FLOAT128_IBM_P): Likewise.
2465 2018-01-10 Martin Sebor <msebor@redhat.com>
2467 PR tree-optimization/83671
2468 * builtins.c (c_strlen): Unconditionally return zero for the empty
2470 Use -Warray-bounds for warnings.
2471 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2472 for non-constant array indices with COMPONENT_REF, arrays of
2473 arrays, and pointers to arrays.
2474 (gimple_fold_builtin_strlen): Determine and set length range for
2475 non-constant character arrays.
2477 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2480 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2483 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2485 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2487 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2490 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2491 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2492 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2493 indexed_or_indirect_operand predicate.
2494 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2495 (*vsx_le_perm_load_v8hi): Likewise.
2496 (*vsx_le_perm_load_v16qi): Likewise.
2497 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2498 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2499 (*vsx_le_perm_store_v8hi): Likewise.
2500 (*vsx_le_perm_store_v16qi): Likewise.
2501 (eight unnamed splitters): Likewise.
2503 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2505 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2506 * config/rs6000/emmintrin.h: Likewise.
2507 * config/rs6000/mmintrin.h: Likewise.
2508 * config/rs6000/xmmintrin.h: Likewise.
2510 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2513 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2515 * tree.c (tree_nop_conversion): Return true for location wrapper
2517 (maybe_wrap_with_location): New function.
2518 (selftest::check_strip_nops): New function.
2519 (selftest::test_location_wrappers): New function.
2520 (selftest::tree_c_tests): Call it.
2521 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2522 (maybe_wrap_with_location): New decl.
2523 (EXPR_LOCATION_WRAPPER_P): New macro.
2524 (location_wrapper_p): New inline function.
2525 (tree_strip_any_location_wrapper): New inline function.
2527 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2530 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2531 stack_realign_offset for the largest alignment of stack slot
2533 (ix86_find_max_used_stack_alignment): New function.
2534 (ix86_finalize_stack_frame_flags): Use it. Set
2535 max_used_stack_alignment if we don't realign stack.
2536 * config/i386/i386.h (machine_function): Add
2537 max_used_stack_alignment.
2539 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2541 * config/arm/arm.opt (-mbranch-cost): New option.
2542 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2545 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2548 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2549 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2551 2018-01-10 Richard Biener <rguenther@suse.de>
2554 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2555 early out so it also covers the case where we have a non-NULL
2558 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2560 PR tree-optimization/83753
2561 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2562 for non-strided grouped accesses if the number of elements is 1.
2564 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2567 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2568 * i386.h (TARGET_USE_GATHER): Define.
2569 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2571 2018-01-10 Martin Liska <mliska@suse.cz>
2574 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2575 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2577 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2578 CLEANUP_NO_PARTITIONING is not set.
2580 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2582 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2583 for vectors, as a partial revert of r254296.
2584 * rtl.h (const_vec_p): Delete.
2585 (const_vec_duplicate_p): Don't test for vector CONSTs.
2586 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2587 * expmed.c (make_tree): Likewise.
2590 * common.md (E, F): Use CONSTANT_P instead of checking for
2592 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2593 checking for CONST_VECTOR.
2595 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2598 * predict.c (force_edge_cold): Handle in more sane way edges
2601 2018-01-09 Carl Love <cel@us.ibm.com>
2603 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2605 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2606 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2607 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2608 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2609 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2610 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2611 * config/rs6000/rs6000-protos.h: Add extern defition for
2612 rs6000_generate_float2_double_code.
2613 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2615 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2616 (float2_v2df): Add define_expand.
2618 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2621 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2622 op_mode in the force_to_mode call.
2624 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2626 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2627 instead of checking each element individually.
2628 (aarch64_evpc_uzp): Likewise.
2629 (aarch64_evpc_zip): Likewise.
2630 (aarch64_evpc_ext): Likewise.
2631 (aarch64_evpc_rev): Likewise.
2632 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2633 instead of checking each element individually. Return true without
2635 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2636 whether all selected elements come from the same input, instead of
2637 checking each element individually. Remove calls to gen_rtx_REG,
2638 start_sequence and end_sequence and instead assert that no rtl is
2641 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2643 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2644 order of HIGH and CONST checks.
2646 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2648 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2649 if the destination isn't an SSA_NAME.
2651 2018-01-09 Richard Biener <rguenther@suse.de>
2653 PR tree-optimization/83668
2654 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2656 (canonicalize_loop_form): ... here, renamed from ...
2657 (canonicalize_loop_closed_ssa_form): ... this and amended to
2658 swap successor edges for loop exit blocks to make us use
2659 the RPO order we need for initial schedule generation.
2661 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2663 PR tree-optimization/64811
2664 * match.pd: When optimizing comparisons with Inf, avoid
2665 introducing or losing exceptions from comparisons with NaN.
2667 2018-01-09 Martin Liska <mliska@suse.cz>
2670 * asan.c (shadow_mem_size): Add gcc_assert.
2672 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2674 Don't save registers in main().
2677 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2678 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2679 * config/avr/avr.c (avr_set_current_function): Don't error if
2680 naked, OS_task or OS_main are specified at the same time.
2681 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2683 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2685 * common/config/avr/avr-common.c (avr_option_optimization_table):
2686 Switch on -mmain-is-OS_task for optimizing compilations.
2688 2018-01-09 Richard Biener <rguenther@suse.de>
2690 PR tree-optimization/83572
2691 * graphite.c: Include cfganal.h.
2692 (graphite_transform_loops): Connect infinite loops to exit
2693 and remove fake edges at the end.
2695 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2697 * ipa-inline.c (edge_badness): Revert accidental checkin.
2699 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2702 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2703 symbols; not inline clones.
2705 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2708 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2709 hard registers. Formatting fixes.
2711 PR preprocessor/83722
2712 * gcc.c (try_generate_repro): Pass
2713 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2714 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2717 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2718 Kito Cheng <kito.cheng@gmail.com>
2720 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2721 (riscv_leaf_function_p): Delete.
2722 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2724 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2726 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2728 (do_ifelse): New function.
2729 (do_isel): New function.
2730 (do_sub3): New function.
2731 (do_add3): New function.
2732 (do_load_mask_compare): New function.
2733 (do_overlap_load_compare): New function.
2734 (expand_compare_loop): New function.
2735 (expand_block_compare): Call expand_compare_loop() when appropriate.
2736 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2738 (-mblock-compare-inline-loop-limit): New option.
2740 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2743 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2744 Reverse order of second and third operands in first alternative.
2745 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2746 of first and second elements in UNSPEC_VPERMR vector.
2747 (altivec_expand_vec_perm_le): Likewise.
2749 2017-01-08 Jeff Law <law@redhat.com>
2751 PR rtl-optimizatin/81308
2752 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2753 (process_switch): If group_case_labels makes a change, then set
2755 (pass_convert_switch::execute): If a switch is converted, then
2756 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2758 PR rtl-optimization/81308
2759 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2762 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2764 PR target/83663 - Revert r255946
2765 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2766 generation for cases where splatting a value is not useful.
2767 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2768 across a vec_duplicate and a paradoxical subreg forming a vector
2769 mode to a vec_concat.
2771 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2773 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2774 -march=armv8.3-a variants.
2775 * config/arm/t-multilib: Likewise.
2776 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2778 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2780 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2782 (cceq_ior_compare_complement): Give it a name so I can use it, and
2783 change boolean_or_operator predicate to boolean_operator so it can
2784 be used to generate a crand.
2785 (eqne): New code iterator.
2786 (bd/bd_neg): New code_attrs.
2787 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2788 a single define_insn.
2789 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2790 decrement (bdnzt/bdnzf/bdzt/bdzf).
2791 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2792 with the new names of the branch decrement patterns, and added the
2793 names of the branch decrement conditional patterns.
2795 2018-01-08 Richard Biener <rguenther@suse.de>
2797 PR tree-optimization/83563
2798 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2801 2018-01-08 Richard Biener <rguenther@suse.de>
2804 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2806 2018-01-08 Richard Biener <rguenther@suse.de>
2808 PR tree-optimization/83685
2809 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2810 references to abnormals.
2812 2018-01-08 Richard Biener <rguenther@suse.de>
2815 * dwarf2out.c (output_indirect_strings): Handle empty
2816 skeleton_debug_str_hash.
2817 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2819 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2821 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2822 (emit_store_direct): Likewise.
2823 (arc_trampoline_adjust_address): Likewise.
2824 (arc_asm_trampoline_template): New function.
2825 (arc_initialize_trampoline): Use asm_trampoline_template.
2826 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2827 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2828 * config/arc/arc.md (flush_icache): Delete pattern.
2830 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2832 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2833 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2836 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2839 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2840 by not USED_FOR_TARGET.
2841 (make_pass_resolve_sw_modes): Likewise.
2843 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2845 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2848 2018-01-08 Richard Biener <rguenther@suse.de>
2851 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2853 2018-01-08 Richard Biener <rguenther@suse.de>
2856 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2858 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2861 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2862 basic blocks with a small number of successors.
2863 (convert_control_dep_chain_into_preds): Improve handling of
2865 (dump_predicates): Split apart into...
2866 (dump_pred_chain): ...here...
2867 (dump_pred_info): ...and here.
2868 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2869 (can_chain_union_be_invalidated_p): Improve check for invalidation
2871 (uninit_uses_cannot_happen): Avoid unnecessary if
2872 convert_control_dep_chain_into_preds yielded nothing.
2874 2018-01-06 Martin Sebor <msebor@redhat.com>
2876 PR tree-optimization/83640
2877 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2878 subtracting negative offset from size.
2879 (builtin_access::overlap): Adjust offset bounds of the access to fall
2880 within the size of the object if possible.
2882 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2884 PR rtl-optimization/83699
2885 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2886 extract_bit_field_as_subreg to cases in which the extracted
2887 value is also a vector.
2889 * lra-constraints.c (process_alt_operands): Test for the equivalence
2890 substitutions when detecting a possible reload cycle.
2892 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2895 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2896 by default if flag_selective_schedling{,2}. Formatting fixes.
2898 PR rtl-optimization/83682
2899 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2900 if it has non-VECTOR_MODE element mode.
2901 (vec_duplicate_p): Likewise.
2904 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2905 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2907 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2910 * config/i386/i386-builtin.def
2911 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2912 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2913 Require also OPTION_MASK_ISA_AVX512F in addition to
2914 OPTION_MASK_ISA_GFNI.
2915 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2916 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2917 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2918 to OPTION_MASK_ISA_GFNI.
2919 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2920 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2921 OPTION_MASK_ISA_AVX512BW.
2922 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2923 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2924 addition to OPTION_MASK_ISA_GFNI.
2925 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2926 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2927 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2928 to OPTION_MASK_ISA_GFNI.
2929 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2930 a requirement for all ISAs rather than any of them with a few
2932 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2934 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2935 bitmasks to be enabled with 3 exceptions, instead of requiring any
2936 enabled ISA with lots of exceptions.
2937 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2938 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2939 Change avx512bw in isa attribute to avx512f.
2940 * config/i386/sgxintrin.h: Add license boilerplate.
2941 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2942 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2943 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2944 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2946 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2947 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2948 temporarily sse2 rather than sse if not enabled already.
2951 * config/i386/sse.md (VI248_VLBW): Rename to ...
2952 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2953 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2954 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2955 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2956 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2957 mode iterator instead of VI248_VLBW.
2959 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2961 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2962 (record_modified): Skip clobbers; add debug output.
2963 (param_change_prob): Use sreal frequencies.
2965 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2967 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2968 punt for user-aligned variables.
2970 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2972 * tree-chrec.c (chrec_contains_symbols): Return true for
2975 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2978 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2979 of (x|y) == x for BICS pattern.
2981 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2983 PR tree-optimization/83605
2984 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2985 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2988 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2990 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2991 * config/epiphany/rtems.h: New file.
2993 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2994 Uros Bizjak <ubizjak@gmail.com>
2997 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2998 QIreg_operand instead of register_operand predicate.
2999 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3000 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3001 comments instead of -fmitigate[-_]rop.
3003 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3006 * cgraphunit.c (symbol_table::compile): Switch to text_section
3007 before calling assembly_start debug hook.
3008 * run-rtl-passes.c (run_rtl_passes): Likewise.
3011 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3013 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3014 range_int_cst_p rather than !symbolic_range_p before calling
3015 extract_range_from_multiplicative_op_1.
3017 2017-01-04 Jeff Law <law@redhat.com>
3019 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3020 redundant test in assertion.
3022 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3024 * doc/rtl.texi: Document machine_mode wrapper classes.
3026 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3028 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3031 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3033 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3034 the VEC_PERM_EXPR fold to fail.
3036 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3039 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3040 to switched_sections.
3042 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3045 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3048 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3051 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3052 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3054 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3057 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3058 is BLKmode and bitpos not zero or mode change is needed.
3060 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3063 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3066 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3069 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3070 instead of MULT rtx. Update all corresponding splitters.
3072 (*ssub<modesuffix>): Ditto.
3074 (*cmp_sadd_di): Update split patterns.
3075 (*cmp_sadd_si): Ditto.
3076 (*cmp_sadd_sidi): Ditto.
3077 (*cmp_ssub_di): Ditto.
3078 (*cmp_ssub_si): Ditto.
3079 (*cmp_ssub_sidi): Ditto.
3080 * config/alpha/predicates.md (const23_operand): New predicate.
3081 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3082 Look for ASHIFT, not MULT inner operand.
3083 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3085 2018-01-04 Martin Liska <mliska@suse.cz>
3087 PR gcov-profile/83669
3088 * gcov.c (output_intermediate_file): Add version to intermediate
3090 * doc/gcov.texi: Document new field 'version' in intermediate
3091 file format. Fix location of '-k' option of gcov command.
3093 2018-01-04 Martin Liska <mliska@suse.cz>
3096 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3098 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3100 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3102 2018-01-03 Martin Sebor <msebor@redhat.com>
3104 PR tree-optimization/83655
3105 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3106 checking calls with invalid arguments.
3108 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3110 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3111 (vectorizable_mask_load_store): Delete.
3112 (vectorizable_call): Return false for masked loads and stores.
3113 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3114 instead of gimple_assign_rhs1.
3115 (vectorizable_load): Handle IFN_MASK_LOAD.
3116 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3118 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3120 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3122 (vectorizable_mask_load_store): ...here.
3123 (vectorizable_load): ...and here.
3125 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3127 * tree-vect-stmts.c (vect_build_all_ones_mask)
3128 (vect_build_zero_merge_argument): New functions, split out from...
3129 (vectorizable_load): ...here.
3131 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3133 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3135 (vectorizable_mask_load_store): ...here.
3136 (vectorizable_store): ...and here.
3138 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3140 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3142 (vectorizable_mask_load_store): ...here.
3144 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3146 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3147 (vect_model_store_cost): Take a vec_load_store_type instead of a
3149 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3150 (vect_model_store_cost): Take a vec_load_store_type instead of a
3152 (vectorizable_mask_load_store): Update accordingly.
3153 (vectorizable_store): Likewise.
3154 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3156 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3158 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3159 IFN_MASK_LOAD calls here rather than...
3160 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3162 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3163 Alan Hayward <alan.hayward@arm.com>
3164 David Sherwood <david.sherwood@arm.com>
3166 * expmed.c (extract_bit_field_1): For vector extracts,
3167 fall back to extract_bit_field_as_subreg if vec_extract
3170 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3171 Alan Hayward <alan.hayward@arm.com>
3172 David Sherwood <david.sherwood@arm.com>
3174 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3175 they are variable or constant sized.
3176 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3177 slots for constant-sized data.
3179 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3180 Alan Hayward <alan.hayward@arm.com>
3181 David Sherwood <david.sherwood@arm.com>
3183 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3184 handling COND_EXPRs with boolean comparisons, try to find a better
3185 basis for the mask type than the boolean itself.
3187 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3189 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3190 is calculated and how it can be overridden.
3191 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3192 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3194 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3197 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3198 Alan Hayward <alan.hayward@arm.com>
3199 David Sherwood <david.sherwood@arm.com>
3201 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3202 Remove the mode argument.
3203 (aarch64_simd_valid_immediate): Remove the mode and inverse
3205 * config/aarch64/iterators.md (bitsize): New iterator.
3206 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3207 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3208 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3209 aarch64_simd_valid_immediate.
3210 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3211 (aarch64_reg_or_bic_imm): Likewise.
3212 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3213 with an insn_type enum and msl with a modifier_type enum.
3214 Replace element_width with a scalar_mode. Change the shift
3215 to unsigned int. Add constructors for scalar_float_mode and
3216 scalar_int_mode elements.
3217 (aarch64_vect_float_const_representable_p): Delete.
3218 (aarch64_can_const_movi_rtx_p)
3219 (aarch64_simd_scalar_immediate_valid_for_move)
3220 (aarch64_simd_make_constant): Update call to
3221 aarch64_simd_valid_immediate.
3222 (aarch64_advsimd_valid_immediate_hs): New function.
3223 (aarch64_advsimd_valid_immediate): Likewise.
3224 (aarch64_simd_valid_immediate): Remove mode and inverse
3225 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3226 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3227 and aarch64_float_const_representable_p on the result.
3228 (aarch64_output_simd_mov_immediate): Remove mode argument.
3229 Update call to aarch64_simd_valid_immediate and use of
3230 simd_immediate_info.
3231 (aarch64_output_scalar_simd_mov_immediate): Update call
3234 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3235 Alan Hayward <alan.hayward@arm.com>
3236 David Sherwood <david.sherwood@arm.com>
3238 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3239 (mode_nunits): Likewise CONST_MODE_NUNITS.
3240 * machmode.def (ADJUST_NUNITS): Document.
3241 * genmodes.c (mode_data::need_nunits_adj): New field.
3242 (blank_mode): Update accordingly.
3243 (adj_nunits): New variable.
3244 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3246 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3247 listed in adj_nunits.
3248 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3249 listed in adj_nunits. Don't emit case statements for such modes.
3250 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3251 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3252 nothing if adj_nunits is nonnull.
3253 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3254 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3255 (emit_mode_fbit): Update use of print_maybe_const_decl.
3256 (emit_move_size): Likewise. Treat the array as non-const
3258 (emit_mode_adjustments): Handle adj_nunits.
3260 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3262 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3263 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3264 (VECTOR_MODES): Use it.
3265 (make_vector_modes): Take the prefix as an argument.
3267 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3268 Alan Hayward <alan.hayward@arm.com>
3269 David Sherwood <david.sherwood@arm.com>
3271 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3272 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3273 for MODE_VECTOR_BOOL.
3274 * machmode.def (VECTOR_BOOL_MODE): Document.
3275 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3276 (make_vector_bool_mode): New function.
3277 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3279 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3280 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3282 * stor-layout.c (int_mode_for_mode): Likewise.
3283 * tree.c (build_vector_type_for_mode): Likewise.
3284 * varasm.c (output_constant_pool_2): Likewise.
3285 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3286 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3287 for MODE_VECTOR_BOOL.
3288 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3289 of mode class checks.
3290 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3291 instead of a list of mode class checks.
3292 (expand_vector_scalar_condition): Likewise.
3293 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3295 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3296 Alan Hayward <alan.hayward@arm.com>
3297 David Sherwood <david.sherwood@arm.com>
3299 * machmode.h (mode_size): Change from unsigned short to
3301 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3302 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3303 or if measurement_type is not polynomial.
3304 (fixed_size_mode::includes_p): Check for constant-sized modes.
3305 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3306 return a poly_uint16 rather than an unsigned short.
3307 (emit_mode_size): Change the type of mode_size from unsigned short
3308 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3309 (emit_mode_adjustments): Cope with polynomial vector sizes.
3310 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3312 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3314 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3315 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3316 * caller-save.c (setup_save_areas): Likewise.
3317 (replace_reg_with_saved_mem): Likewise.
3318 * calls.c (emit_library_call_value_1): Likewise.
3319 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3320 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3321 (gen_lowpart_for_combine): Likewise.
3322 * convert.c (convert_to_integer_1): Likewise.
3323 * cse.c (equiv_constant, cse_insn): Likewise.
3324 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3325 (cselib_subst_to_values): Likewise.
3326 * dce.c (word_dce_process_block): Likewise.
3327 * df-problems.c (df_word_lr_mark_ref): Likewise.
3328 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3329 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3330 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3331 (rtl_for_decl_location): Likewise.
3332 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3333 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3334 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3335 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3336 (expand_expr_real_1): Likewise.
3337 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3338 (pad_below): Likewise.
3339 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3340 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3341 * ira.c (get_subreg_tracking_sizes): Likewise.
3342 * ira-build.c (ira_create_allocno_objects): Likewise.
3343 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3344 (ira_sort_regnos_for_alter_reg): Likewise.
3345 * ira-costs.c (record_operand_costs): Likewise.
3346 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3347 (resolve_simple_move): Likewise.
3348 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3349 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3350 (lra_constraints): Likewise.
3351 (CONST_POOL_OK_P): Reject variable-sized modes.
3352 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3353 (add_pseudo_to_slot, lra_spill): Likewise.
3354 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3355 * optabs-query.c (get_best_extraction_insn): Likewise.
3356 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3357 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3358 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3359 * recog.c (offsettable_address_addr_space_p): Likewise.
3360 * regcprop.c (maybe_mode_change): Likewise.
3361 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3362 * regrename.c (build_def_use): Likewise.
3363 * regstat.c (dump_reg_info): Likewise.
3364 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3365 (find_reloads, find_reloads_subreg_address): Likewise.
3366 * reload1.c (eliminate_regs_1): Likewise.
3367 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3368 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3369 (simplify_binary_operation_1, simplify_subreg): Likewise.
3370 * targhooks.c (default_function_arg_padding): Likewise.
3371 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3372 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3373 (verify_gimple_assign_ternary): Likewise.
3374 * tree-inline.c (estimate_move_cost): Likewise.
3375 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3376 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3377 (get_address_cost_ainc): Likewise.
3378 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3379 (vect_supportable_dr_alignment): Likewise.
3380 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3381 (vectorizable_reduction): Likewise.
3382 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3383 (vectorizable_operation, vectorizable_load): Likewise.
3384 * tree.c (build_same_sized_truth_vector_type): Likewise.
3385 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3386 * var-tracking.c (emit_note_insn_var_location): Likewise.
3387 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3388 (ADDR_VEC_ALIGN): Likewise.
3390 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3391 Alan Hayward <alan.hayward@arm.com>
3392 David Sherwood <david.sherwood@arm.com>
3394 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3396 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3397 or if measurement_type is polynomial.
3398 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3399 * combine.c (make_extraction): Likewise.
3400 * dse.c (find_shift_sequence): Likewise.
3401 * dwarf2out.c (mem_loc_descriptor): Likewise.
3402 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3403 (extract_bit_field, extract_low_bits): Likewise.
3404 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3405 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3406 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3407 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3408 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3409 * reload.c (find_reloads): Likewise.
3410 * reload1.c (alter_reg): Likewise.
3411 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3412 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3413 * tree-if-conv.c (predicate_mem_writes): Likewise.
3414 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3415 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3416 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3417 * valtrack.c (dead_debug_insert_temp): Likewise.
3418 * varasm.c (mergeable_constant_section): Likewise.
3419 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3421 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3422 Alan Hayward <alan.hayward@arm.com>
3423 David Sherwood <david.sherwood@arm.com>
3425 * expr.c (expand_assignment): Cope with polynomial mode sizes
3426 when assigning to a CONCAT.
3428 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3429 Alan Hayward <alan.hayward@arm.com>
3430 David Sherwood <david.sherwood@arm.com>
3432 * machmode.h (mode_precision): Change from unsigned short to
3434 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3436 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3437 or if measurement_type is not polynomial.
3438 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3439 in which the mode is already known to be a scalar_int_mode.
3440 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3441 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3443 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3444 for GET_MODE_PRECISION.
3445 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3446 for GET_MODE_PRECISION.
3447 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3449 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3450 (expand_field_assignment, make_extraction): Likewise.
3451 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3452 (get_last_value): Likewise.
3453 * convert.c (convert_to_integer_1): Likewise.
3454 * cse.c (cse_insn): Likewise.
3455 * expr.c (expand_expr_real_1): Likewise.
3456 * lra-constraints.c (simplify_operand_subreg): Likewise.
3457 * optabs-query.c (can_atomic_load_p): Likewise.
3458 * optabs.c (expand_atomic_load): Likewise.
3459 (expand_atomic_store): Likewise.
3460 * ree.c (combine_reaching_defs): Likewise.
3461 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3462 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3463 * tree.h (type_has_mode_precision_p): Likewise.
3464 * ubsan.c (instrument_si_overflow): Likewise.
3466 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3467 Alan Hayward <alan.hayward@arm.com>
3468 David Sherwood <david.sherwood@arm.com>
3470 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3471 polynomial numbers of units.
3472 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3473 (valid_vector_subparts_p): New function.
3474 (build_vector_type): Remove temporary shim and take the number
3475 of units as a poly_uint64 rather than an int.
3476 (build_opaque_vector_type): Take the number of units as a
3477 poly_uint64 rather than an int.
3478 * tree.c (build_vector_from_ctor): Handle polynomial
3479 TYPE_VECTOR_SUBPARTS.
3480 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3481 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3482 (build_vector_from_val): If the number of units is variable,
3483 use build_vec_duplicate_cst for constant operands and
3484 VEC_DUPLICATE_EXPR otherwise.
3485 (make_vector_type): Remove temporary is_constant ().
3486 (build_vector_type, build_opaque_vector_type): Take the number of
3487 units as a poly_uint64 rather than an int.
3488 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3490 * cfgexpand.c (expand_debug_expr): Likewise.
3491 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3492 (store_constructor, expand_expr_real_1): Likewise.
3493 (const_scalar_mask_from_tree): Likewise.
3494 * fold-const-call.c (fold_const_reduction): Likewise.
3495 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3496 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3497 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3498 (fold_relational_const): Likewise.
3499 (native_interpret_vector): Likewise. Change the size from an
3500 int to an unsigned int.
3501 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3502 TYPE_VECTOR_SUBPARTS.
3503 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3504 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3505 duplicating a non-constant operand into a variable-length vector.
3506 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3507 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3508 * ipa-icf.c (sem_variable::equals): Likewise.
3509 * match.pd: Likewise.
3510 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3511 * print-tree.c (print_node): Likewise.
3512 * stor-layout.c (layout_type): Likewise.
3513 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3514 * tree-cfg.c (verify_gimple_comparison): Likewise.
3515 (verify_gimple_assign_binary): Likewise.
3516 (verify_gimple_assign_ternary): Likewise.
3517 (verify_gimple_assign_single): Likewise.
3518 * tree-pretty-print.c (dump_generic_node): Likewise.
3519 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3520 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3521 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3522 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3523 (vect_shift_permute_load_chain): Likewise.
3524 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3525 (expand_vector_condition, optimize_vector_constructor): Likewise.
3526 (lower_vec_perm, get_compute_type): Likewise.
3527 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3528 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3529 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3530 (vect_recog_mask_conversion_pattern): Likewise.
3531 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3532 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3533 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3534 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3535 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3536 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3537 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3538 (supportable_widening_operation): Likewise.
3539 (supportable_narrowing_operation): Likewise.
3540 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3542 * varasm.c (output_constant): Likewise.
3544 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3545 Alan Hayward <alan.hayward@arm.com>
3546 David Sherwood <david.sherwood@arm.com>
3548 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3549 so that both the length == 3 and length != 3 cases set up their
3550 own permute vectors. Add comments explaining why we know the
3551 number of elements is constant.
3552 (vect_permute_load_chain): Likewise.
3554 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3555 Alan Hayward <alan.hayward@arm.com>
3556 David Sherwood <david.sherwood@arm.com>
3558 * machmode.h (mode_nunits): Change from unsigned char to
3560 (ONLY_FIXED_SIZE_MODES): New macro.
3561 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3562 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3563 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3565 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3566 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3567 or if measurement_type is not polynomial.
3568 * genmodes.c (ZERO_COEFFS): New macro.
3569 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3571 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3572 Use ZERO_COEFFS when emitting initializers.
3573 * data-streamer.h (bp_pack_poly_value): New function.
3574 (bp_unpack_poly_value): Likewise.
3575 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3576 for GET_MODE_NUNITS.
3577 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3578 for GET_MODE_NUNITS.
3579 * tree.c (make_vector_type): Remove temporary shim and make
3580 the real function take the number of units as a poly_uint64
3582 (build_vector_type_for_mode): Handle polynomial nunits.
3583 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3584 * emit-rtl.c (const_vec_series_p_1): Likewise.
3585 (gen_rtx_CONST_VECTOR): Likewise.
3586 * fold-const.c (test_vec_duplicate_folding): Likewise.
3587 * genrecog.c (validate_pattern): Likewise.
3588 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3589 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3590 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3591 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3592 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3593 * rtlanal.c (subreg_get_info): Likewise.
3594 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3595 (vect_grouped_load_supported): Likewise.
3596 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3597 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3598 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3599 (simplify_const_unary_operation, simplify_binary_operation_1)
3600 (simplify_const_binary_operation, simplify_ternary_operation)
3601 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3602 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3603 instead of CONST_VECTOR_NUNITS.
3604 * varasm.c (output_constant_pool_2): Likewise.
3605 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3606 explicit-encoded elements in the XVEC for variable-length vectors.
3608 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3610 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3612 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3613 Alan Hayward <alan.hayward@arm.com>
3614 David Sherwood <david.sherwood@arm.com>
3616 * coretypes.h (fixed_size_mode): Declare.
3617 (fixed_size_mode_pod): New typedef.
3618 * builtins.h (target_builtins::x_apply_args_mode)
3619 (target_builtins::x_apply_result_mode): Change type to
3620 fixed_size_mode_pod.
3621 * builtins.c (apply_args_size, apply_result_size, result_vector)
3622 (expand_builtin_apply_args_1, expand_builtin_apply)
3623 (expand_builtin_return): Update accordingly.
3625 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3627 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3628 * cselib.c (cselib_hash_rtx): Likewise.
3629 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3630 CONST_VECTOR encoding.
3632 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3633 Jeff Law <law@redhat.com>
3636 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3637 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3638 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3639 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3642 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3643 explicitly probe *sp in a noreturn function if there were any callee
3644 register saves or frame pointer is needed.
3646 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3649 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3650 BLKmode for ternary, binary or unary expressions.
3653 * var-tracking.c (delete_vta_debug_insn): New inline function.
3654 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3655 insns from get_insns () to NULL instead of each bb separately.
3656 Use delete_vta_debug_insn. No longer static.
3657 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3658 delete_vta_debug_insns callers.
3659 * rtl.h (delete_vta_debug_insns): Declare.
3660 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3661 instead of variable_tracking_main.
3663 2018-01-03 Martin Sebor <msebor@redhat.com>
3665 PR tree-optimization/83603
3666 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3667 arguments past the endof the argument list in functions declared
3668 without a prototype.
3669 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3670 Avoid checking when arguments are null.
3672 2018-01-03 Martin Sebor <msebor@redhat.com>
3675 * doc/extend.texi (attribute const): Fix a typo.
3676 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3677 issuing -Wsuggest-attribute for void functions.
3679 2018-01-03 Martin Sebor <msebor@redhat.com>
3681 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3682 offset_int::from instead of wide_int::to_shwi.
3683 (maybe_diag_overlap): Remove assertion.
3684 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3685 * gimple-ssa-sprintf.c (format_directive): Same.
3686 (parse_directive): Same.
3687 (sprintf_dom_walker::compute_format_length): Same.
3688 (try_substitute_return_value): Same.
3690 2017-01-03 Jeff Law <law@redhat.com>
3693 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3694 non-constant residual for zero at runtime and avoid probing in
3695 that case. Reorganize code for trailing problem to mirror handling
3698 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3700 PR tree-optimization/83501
3701 * tree-ssa-strlen.c (get_string_cst): New.
3702 (handle_char_store): Call get_string_cst.
3704 2018-01-03 Martin Liska <mliska@suse.cz>
3706 PR tree-optimization/83593
3707 * tree-ssa-strlen.c: Include tree-cfg.h.
3708 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3709 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3710 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3712 (strlen_dom_walker::before_dom_children): Call
3713 gimple_purge_dead_eh_edges. Dump tranformation with details
3715 (strlen_dom_walker::before_dom_children): Update call by adding
3716 new argument cleanup_eh.
3717 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3719 2018-01-03 Martin Liska <mliska@suse.cz>
3722 * cif-code.def (VARIADIC_THUNK): New enum value.
3723 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3726 2018-01-03 Jan Beulich <jbeulich@suse.com>
3728 * sse.md (mov<mode>_internal): Tighten condition for when to use
3729 vmovdqu<ssescalarsize> for TI and OI modes.
3731 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3733 Update copyright years.
3735 2018-01-03 Martin Liska <mliska@suse.cz>
3738 * ipa-visibility.c (function_and_variable_visibility): Skip
3739 functions with noipa attribure.
3741 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3743 * gcc.c (process_command): Update copyright notice dates.
3744 * gcov-dump.c (print_version): Ditto.
3745 * gcov.c (print_version): Ditto.
3746 * gcov-tool.c (print_version): Ditto.
3747 * gengtype.c (create_file): Ditto.
3748 * doc/cpp.texi: Bump @copying's copyright year.
3749 * doc/cppinternals.texi: Ditto.
3750 * doc/gcc.texi: Ditto.
3751 * doc/gccint.texi: Ditto.
3752 * doc/gcov.texi: Ditto.
3753 * doc/install.texi: Ditto.
3754 * doc/invoke.texi: Ditto.
3756 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3758 * vector-builder.h (vector_builder::m_full_nelts): Change from
3759 unsigned int to poly_uint64.
3760 (vector_builder::full_nelts): Update prototype accordingly.
3761 (vector_builder::new_vector): Likewise.
3762 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3763 (vector_builder::operator ==): Likewise.
3764 (vector_builder::finalize): Likewise.
3765 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3766 Take the number of elements as a poly_uint64 rather than an
3768 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3769 from unsigned int to poly_uint64.
3770 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3771 (vec_perm_indices::new_vector): Likewise.
3772 (vec_perm_indices::length): Likewise.
3773 (vec_perm_indices::nelts_per_input): Likewise.
3774 (vec_perm_indices::input_nelts): Likewise.
3775 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3776 number of elements per input as a poly_uint64 rather than an
3777 unsigned int. Use the original encoding for variable-length
3778 vectors, rather than clamping each individual element.
3779 For the second and subsequent elements in each pattern,
3780 clamp the step and base before clamping their sum.
3781 (vec_perm_indices::series_p): Handle polynomial element counts.
3782 (vec_perm_indices::all_in_range_p): Likewise.
3783 (vec_perm_indices_to_tree): Likewise.
3784 (vec_perm_indices_to_rtx): Likewise.
3785 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3786 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3787 (tree_vector_builder::new_binary_operation): Handle polynomial
3788 element counts. Return false if we need to know the number
3789 of elements at compile time.
3790 * fold-const.c (fold_vec_perm): Punt if the number of elements
3791 isn't known at compile time.
3793 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3795 * vec-perm-indices.h (vec_perm_builder): Change element type
3796 from HOST_WIDE_INT to poly_int64.
3797 (vec_perm_indices::element_type): Update accordingly.
3798 (vec_perm_indices::clamp): Handle polynomial element_types.
3799 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3800 (vec_perm_indices::all_in_range_p): Likewise.
3801 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3803 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3804 polynomial vec_perm_indices element types.
3805 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3806 * fold-const.c (fold_vec_perm): Likewise.
3807 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3808 * tree-vect-generic.c (lower_vec_perm): Likewise.
3809 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3810 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3811 element type to HOST_WIDE_INT.
3813 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3814 Alan Hayward <alan.hayward@arm.com>
3815 David Sherwood <david.sherwood@arm.com>
3817 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3818 rather than an int. Use plus_constant.
3819 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3820 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3822 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3823 Alan Hayward <alan.hayward@arm.com>
3824 David Sherwood <david.sherwood@arm.com>
3826 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3827 a HOST_WIDE_INT to a poly_int64.
3829 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3830 Alan Hayward <alan.hayward@arm.com>
3831 David Sherwood <david.sherwood@arm.com>
3833 * calls.c (load_register_parameters): Cope with polynomial
3834 mode sizes. Require a constant size for BLKmode parameters
3835 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3836 forces a parameter to be padded at the lsb end in order to
3837 fill a complete number of words, require the parameter size
3838 to be ordered wrt UNITS_PER_WORD.
3840 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3841 Alan Hayward <alan.hayward@arm.com>
3842 David Sherwood <david.sherwood@arm.com>
3844 * reload1.c (spill_stack_slot_width): Change element type
3845 from unsigned int to poly_uint64_pod.
3846 (alter_reg): Treat mode sizes as polynomial.
3848 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3849 Alan Hayward <alan.hayward@arm.com>
3850 David Sherwood <david.sherwood@arm.com>
3852 * reload.c (complex_word_subreg_p): New function.
3853 (reload_inner_reg_of_subreg, push_reload): Use it.
3855 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3856 Alan Hayward <alan.hayward@arm.com>
3857 David Sherwood <david.sherwood@arm.com>
3859 * lra-constraints.c (process_alt_operands): Reject matched
3860 operands whose sizes aren't ordered.
3861 (match_reload): Refer to this check here.
3863 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3864 Alan Hayward <alan.hayward@arm.com>
3865 David Sherwood <david.sherwood@arm.com>
3867 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3868 that the mode size is in the set {1, 2, 4, 8, 16}.
3870 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3871 Alan Hayward <alan.hayward@arm.com>
3872 David Sherwood <david.sherwood@arm.com>
3874 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3875 Use plus_constant instead of gen_rtx_PLUS.
3877 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3878 Alan Hayward <alan.hayward@arm.com>
3879 David Sherwood <david.sherwood@arm.com>
3881 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3882 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3883 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3884 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3885 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3886 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3887 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3888 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3889 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3890 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3892 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3893 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3894 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3895 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3896 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3897 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3898 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3899 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3900 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3901 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3903 * expr.c (emit_move_resolve_push): Treat the input and result
3904 of PUSH_ROUNDING as a poly_int64.
3905 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3906 (emit_push_insn): Likewise.
3907 * lra-eliminations.c (mark_not_eliminable): Likewise.
3908 * recog.c (push_operand): Likewise.
3909 * reload1.c (elimination_effects): Likewise.
3910 * rtlanal.c (nonzero_bits1): Likewise.
3911 * calls.c (store_one_arg): Likewise. Require the padding to be
3912 known at compile time.
3914 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3915 Alan Hayward <alan.hayward@arm.com>
3916 David Sherwood <david.sherwood@arm.com>
3918 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3919 Use plus_constant instead of gen_rtx_PLUS.
3921 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3922 Alan Hayward <alan.hayward@arm.com>
3923 David Sherwood <david.sherwood@arm.com>
3925 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3928 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3929 Alan Hayward <alan.hayward@arm.com>
3930 David Sherwood <david.sherwood@arm.com>
3932 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3933 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3934 via stack temporaries. Treat the mode size as polynomial too.
3936 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3937 Alan Hayward <alan.hayward@arm.com>
3938 David Sherwood <david.sherwood@arm.com>
3940 * expr.c (expand_expr_real_2): When handling conversions involving
3941 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3942 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3943 as a poly_uint64 too.
3945 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3946 Alan Hayward <alan.hayward@arm.com>
3947 David Sherwood <david.sherwood@arm.com>
3949 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3951 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3952 Alan Hayward <alan.hayward@arm.com>
3953 David Sherwood <david.sherwood@arm.com>
3955 * combine.c (can_change_dest_mode): Handle polynomial
3956 REGMODE_NATURAL_SIZE.
3957 * expmed.c (store_bit_field_1): Likewise.
3958 * expr.c (store_constructor): Likewise.
3959 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3960 and polynomial REGMODE_NATURAL_SIZE.
3961 (gen_lowpart_common): Likewise.
3962 * reginfo.c (record_subregs_of_mode): Likewise.
3963 * rtlanal.c (read_modify_subreg_p): Likewise.
3965 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3966 Alan Hayward <alan.hayward@arm.com>
3967 David Sherwood <david.sherwood@arm.com>
3969 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3970 numbers of elements.
3972 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3973 Alan Hayward <alan.hayward@arm.com>
3974 David Sherwood <david.sherwood@arm.com>
3976 * match.pd: Cope with polynomial numbers of vector elements.
3978 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3979 Alan Hayward <alan.hayward@arm.com>
3980 David Sherwood <david.sherwood@arm.com>
3982 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3983 in a POINTER_PLUS_EXPR.
3985 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3986 Alan Hayward <alan.hayward@arm.com>
3987 David Sherwood <david.sherwood@arm.com>
3989 * omp-simd-clone.c (simd_clone_subparts): New function.
3990 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3991 (ipa_simd_modify_function_body): Likewise.
3993 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3994 Alan Hayward <alan.hayward@arm.com>
3995 David Sherwood <david.sherwood@arm.com>
3997 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3998 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3999 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4000 (expand_vector_condition, vector_element): Likewise.
4001 (subparts_gt): New function.
4002 (get_compute_type): Use subparts_gt.
4003 (count_type_subparts): Delete.
4004 (expand_vector_operations_1): Use subparts_gt instead of
4005 count_type_subparts.
4007 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4008 Alan Hayward <alan.hayward@arm.com>
4009 David Sherwood <david.sherwood@arm.com>
4011 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4012 (vect_compile_time_alias): ...this new function. Do the calculation
4013 on poly_ints rather than trees.
4014 (vect_prune_runtime_alias_test_list): Update call accordingly.
4016 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4017 Alan Hayward <alan.hayward@arm.com>
4018 David Sherwood <david.sherwood@arm.com>
4020 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4022 (vect_schedule_slp_instance): Likewise.
4024 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4025 Alan Hayward <alan.hayward@arm.com>
4026 David Sherwood <david.sherwood@arm.com>
4028 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4029 constant and extern definitions for variable-length vectors.
4030 (vect_get_constant_vectors): Note that the number of units
4031 is known to be constant.
4033 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4034 Alan Hayward <alan.hayward@arm.com>
4035 David Sherwood <david.sherwood@arm.com>
4037 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4038 of units as polynomial. Choose between WIDE and NARROW based
4041 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4042 Alan Hayward <alan.hayward@arm.com>
4043 David Sherwood <david.sherwood@arm.com>
4045 * tree-vect-stmts.c (simd_clone_subparts): New function.
4046 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4048 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4049 Alan Hayward <alan.hayward@arm.com>
4050 David Sherwood <david.sherwood@arm.com>
4052 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4053 vectors as polynomial. Use build_index_vector for
4056 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4057 Alan Hayward <alan.hayward@arm.com>
4058 David Sherwood <david.sherwood@arm.com>
4060 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4061 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4062 for variable-length vectors.
4063 (vectorizable_mask_load_store): Treat the number of units as
4064 polynomial, asserting that it is constant if the condition has
4065 already been enforced.
4066 (vectorizable_store, vectorizable_load): Likewise.
4068 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4069 Alan Hayward <alan.hayward@arm.com>
4070 David Sherwood <david.sherwood@arm.com>
4072 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4073 of units as polynomial. Punt if we can't tell at compile time
4074 which vector contains the final result.
4076 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4077 Alan Hayward <alan.hayward@arm.com>
4078 David Sherwood <david.sherwood@arm.com>
4080 * tree-vect-loop.c (vectorizable_induction): Treat the number
4081 of units as polynomial. Punt on SLP inductions. Use an integer
4082 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4083 cast of such a series for variable-length floating-point
4086 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4087 Alan Hayward <alan.hayward@arm.com>
4088 David Sherwood <david.sherwood@arm.com>
4090 * tree.h (build_index_vector): Declare.
4091 * tree.c (build_index_vector): New function.
4092 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4093 of units as polynomial, forcibly converting it to a constant if
4094 vectorizable_reduction has already enforced the condition.
4095 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4096 to create a {1,2,3,...} vector.
4097 (vectorizable_reduction): Treat the number of units as polynomial.
4098 Choose vectype_in based on the largest scalar element size rather
4099 than the smallest number of units. Enforce the restrictions
4102 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4103 Alan Hayward <alan.hayward@arm.com>
4104 David Sherwood <david.sherwood@arm.com>
4106 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4107 number of units as polynomial.
4109 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4110 Alan Hayward <alan.hayward@arm.com>
4111 David Sherwood <david.sherwood@arm.com>
4113 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4114 * target.def (autovectorize_vector_sizes): Return the vector sizes
4115 by pointer, using vector_sizes rather than a bitmask.
4116 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4117 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4118 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4120 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4121 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4122 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4123 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4124 * omp-general.c (omp_max_vf): Likewise.
4125 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4126 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4127 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4128 * tree-vect-slp.c (vect_slp_bb): Likewise.
4129 * doc/tm.texi: Regenerate.
4130 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4132 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4133 the vector size as a poly_uint64 rather than an unsigned int.
4134 (current_vector_size): Change from an unsigned int to a poly_uint64.
4135 (get_vectype_for_scalar_type): Update accordingly.
4136 * tree.h (build_truth_vector_type): Take the size and number of
4137 units as a poly_uint64 rather than an unsigned int.
4138 (build_vector_type): Add a temporary overload that takes
4139 the number of units as a poly_uint64 rather than an unsigned int.
4140 * tree.c (make_vector_type): Likewise.
4141 (build_truth_vector_type): Take the number of units as a poly_uint64
4142 rather than an unsigned int.
4144 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4145 Alan Hayward <alan.hayward@arm.com>
4146 David Sherwood <david.sherwood@arm.com>
4148 * target.def (get_mask_mode): Take the number of units and length
4149 as poly_uint64s rather than unsigned ints.
4150 * targhooks.h (default_get_mask_mode): Update accordingly.
4151 * targhooks.c (default_get_mask_mode): Likewise.
4152 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4153 * doc/tm.texi: Regenerate.
4155 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4156 Alan Hayward <alan.hayward@arm.com>
4157 David Sherwood <david.sherwood@arm.com>
4159 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4160 * omp-general.c (omp_max_vf): Likewise.
4161 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4162 (expand_omp_simd): Handle polynomial safelen.
4163 * omp-low.c (omplow_simd_context): Add a default constructor.
4164 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4165 (lower_rec_simd_input_clauses): Update accordingly.
4166 (lower_rec_input_clauses): Likewise.
4168 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4169 Alan Hayward <alan.hayward@arm.com>
4170 David Sherwood <david.sherwood@arm.com>
4172 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4173 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4174 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4175 (vect_analyze_slp_cost): Likewise.
4176 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4177 (vect_model_load_cost): Likewise.
4179 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4180 Alan Hayward <alan.hayward@arm.com>
4181 David Sherwood <david.sherwood@arm.com>
4183 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4184 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4185 from an unsigned int * to a poly_uint64_pod *.
4186 (calculate_unrolling_factor): New function.
4187 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4189 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4190 Alan Hayward <alan.hayward@arm.com>
4191 David Sherwood <david.sherwood@arm.com>
4193 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4194 from an unsigned int to a poly_uint64.
4195 (_loop_vec_info::slp_unrolling_factor): Likewise.
4196 (_loop_vec_info::vectorization_factor): Change from an int
4198 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4199 (vect_get_num_vectors): New function.
4200 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4201 (vect_get_num_copies): Use vect_get_num_vectors.
4202 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4203 to an unsigned int *.
4204 (vect_analyze_data_refs): Change min_vf from an int * to a
4206 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4207 than an unsigned HOST_WIDE_INT.
4208 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4209 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4210 to an unsigned int *.
4211 (vect_analyze_data_ref_dependences): Likewise.
4212 (vect_compute_data_ref_alignment): Handle polynomial vf.
4213 (vect_enhance_data_refs_alignment): Likewise.
4214 (vect_prune_runtime_alias_test_list): Likewise.
4215 (vect_shift_permute_load_chain): Likewise.
4216 (vect_supportable_dr_alignment): Likewise.
4217 (dependence_distance_ge_vf): Take the vectorization factor as a
4218 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4219 (vect_analyze_data_refs): Change min_vf from an int * to a
4221 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4222 vfm1 as a poly_uint64 rather than an int. Make the same change
4223 for the returned bound_scalar.
4224 (vect_gen_vector_loop_niters): Handle polynomial vf.
4225 (vect_do_peeling): Likewise. Update call to
4226 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4227 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4229 * tree-vect-loop.c (vect_determine_vectorization_factor)
4230 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4231 (vect_get_known_peeling_cost): Likewise.
4232 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4233 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4234 (vect_transform_loop): Likewise. Use the lowest possible VF when
4235 updating the upper bounds of the loop.
4236 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4238 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4239 polynomial unroll factors.
4240 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4241 (vect_make_slp_decision): Likewise.
4242 (vect_supported_load_permutation_p): Likewise, and polynomial
4244 (vect_analyze_slp_cost): Handle polynomial vf.
4245 (vect_slp_analyze_node_operations): Likewise.
4246 (vect_slp_analyze_bb_1): Likewise.
4247 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4248 than an unsigned HOST_WIDE_INT.
4249 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4250 (vectorizable_load): Handle polynomial vf.
4251 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4253 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4255 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4256 Alan Hayward <alan.hayward@arm.com>
4257 David Sherwood <david.sherwood@arm.com>
4259 * match.pd: Handle bit operations involving three constants
4260 and try to fold one pair.
4262 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4264 * tree-vect-loop-manip.c: Include gimple-fold.h.
4265 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4266 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4267 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4268 Add a path that uses a step of VF instead of 1, but disable it
4270 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4271 and niters_no_overflow parameters. Update calls to
4272 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4273 Create a new SSA name if the latter choses to use a ste other
4274 than zero, and return it via niters_vector_mult_vf_var.
4275 * tree-vect-loop.c (vect_transform_loop): Update calls to
4276 vect_do_peeling, vect_gen_vector_loop_niters and
4277 slpeel_make_loop_iterate_ntimes.
4278 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4279 (vect_gen_vector_loop_niters): Update declarations after above changes.
4281 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4283 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4284 128-bit round to integer instructions.
4285 (ceil<mode>2): Likewise.
4286 (btrunc<mode>2): Likewise.
4287 (round<mode>2): Likewise.
4289 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4291 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4292 unaligned VSX load/store on P8/P9.
4293 (expand_block_clear): Allow the use of unaligned VSX
4294 load/store on P8/P9.
4296 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4298 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4300 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4301 swap associated with both a load and a store.
4303 2018-01-02 Andrew Waterman <andrew@sifive.com>
4305 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4306 * config/riscv/riscv.md (clear_cache): Use it.
4308 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4310 * web.c: Remove out-of-date comment.
4312 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4314 * expr.c (fixup_args_size_notes): Check that any existing
4315 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4316 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4317 (emit_single_push_insn): ...here.
4319 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4321 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4322 (const_vector_encoded_nelts): New function.
4323 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4324 (const_vector_int_elt, const_vector_elt): Declare.
4325 * emit-rtl.c (const_vector_int_elt_1): New function.
4326 (const_vector_elt): Likewise.
4327 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4328 of CONST_VECTOR_ELT.
4330 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4332 * expr.c: Include rtx-vector-builder.h.
4333 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4334 directly on the tree encoding.
4335 (const_vector_from_tree): Likewise.
4336 * optabs.c: Include rtx-vector-builder.h.
4337 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4338 sequence of "u" values.
4339 * vec-perm-indices.c: Include rtx-vector-builder.h.
4340 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4341 directly on the vec_perm_indices encoding.
4343 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4345 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4346 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4347 * rtx-vector-builder.h: New file.
4348 * rtx-vector-builder.c: Likewise.
4349 * rtl.h (rtx_def::u2): Add a const_vector field.
4350 (CONST_VECTOR_NPATTERNS): New macro.
4351 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4352 (CONST_VECTOR_DUPLICATE_P): Likewise.
4353 (CONST_VECTOR_STEPPED_P): Likewise.
4354 (CONST_VECTOR_ENCODED_ELT): Likewise.
4355 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4356 (unwrap_const_vec_duplicate): Likewise.
4357 (const_vec_series_p): Check for a non-duplicated vector encoding.
4358 Say that the function only returns true for integer vectors.
4359 * emit-rtl.c: Include rtx-vector-builder.h.
4360 (gen_const_vec_duplicate_1): Delete.
4361 (gen_const_vector): Call gen_const_vec_duplicate instead of
4362 gen_const_vec_duplicate_1.
4363 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4364 (gen_const_vec_duplicate): Use rtx_vector_builder.
4365 (gen_const_vec_series): Likewise.
4366 (gen_rtx_CONST_VECTOR): Likewise.
4367 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4368 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4369 Build a new vector rather than modifying a CONST_VECTOR in-place.
4370 (handle_special_swappables): Update call accordingly.
4371 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4372 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4373 Build a new vector rather than modifying a CONST_VECTOR in-place.
4374 (handle_special_swappables): Update call accordingly.
4376 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4378 * simplify-rtx.c (simplify_const_binary_operation): Use
4379 CONST_VECTOR_ELT instead of XVECEXP.
4381 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4383 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4384 the selector elements to be different from the data elements
4385 if the selector is a VECTOR_CST.
4386 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4387 ssizetype for the selector.
4389 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4391 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4392 before testing each element individually.
4393 * tree-vect-generic.c (lower_vec_perm): Likewise.
4395 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4397 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4398 * selftest-run-tests.c (selftest::run_tests): Call it.
4399 * vector-builder.h (vector_builder::operator ==): New function.
4400 (vector_builder::operator !=): Likewise.
4401 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4402 (vec_perm_indices::all_from_input_p): New function.
4403 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4404 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4405 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4406 instead of reading the VECTOR_CST directly. Detect whether both
4407 vector inputs are the same before constructing the vec_perm_indices,
4408 and update the number of inputs argument accordingly. Use the
4409 utility functions added above. Only construct sel2 if we need to.
4411 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4413 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4414 the broadcast of the low byte.
4415 (expand_mult_highpart): Use an explicit encoding for the permutes.
4416 * optabs-query.c (can_mult_highpart_p): Likewise.
4417 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4418 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4419 (vectorizable_bswap): Likewise.
4420 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4421 explicit encoding for the power-of-2 permutes.
4422 (vect_permute_store_chain): Likewise.
4423 (vect_grouped_load_supported): Likewise.
4424 (vect_permute_load_chain): Likewise.
4426 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4428 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4429 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4430 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4431 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4432 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4433 (vect_gen_perm_mask_any): Likewise.
4435 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4437 * int-vector-builder.h: New file.
4438 * vec-perm-indices.h: Include int-vector-builder.h.
4439 (vec_perm_indices): Redefine as an int_vector_builder.
4440 (auto_vec_perm_indices): Delete.
4441 (vec_perm_builder): Redefine as a stand-alone class.
4442 (vec_perm_indices::vec_perm_indices): New function.
4443 (vec_perm_indices::clamp): Likewise.
4444 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4445 (vec_perm_indices::new_vector): New function.
4446 (vec_perm_indices::new_expanded_vector): Update for new
4447 vec_perm_indices class.
4448 (vec_perm_indices::rotate_inputs): New function.
4449 (vec_perm_indices::all_in_range_p): Operate directly on the
4450 encoded form, without computing elided elements.
4451 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4452 encoding. Update for new vec_perm_indices class.
4453 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4454 the given vec_perm_builder.
4455 (expand_vec_perm_var): Update vec_perm_builder constructor.
4456 (expand_mult_highpart): Use vec_perm_builder instead of
4457 auto_vec_perm_indices.
4458 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4459 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4460 or double series encoding as appropriate.
4461 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4462 vec_perm_indices instead of auto_vec_perm_indices.
4463 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4464 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4465 (vect_permute_store_chain): Likewise.
4466 (vect_grouped_load_supported): Likewise.
4467 (vect_permute_load_chain): Likewise.
4468 (vect_shift_permute_load_chain): Likewise.
4469 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4470 (vect_transform_slp_perm_load): Likewise.
4471 (vect_schedule_slp_instance): Likewise.
4472 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4473 (vectorizable_mask_load_store): Likewise.
4474 (vectorizable_bswap): Likewise.
4475 (vectorizable_store): Likewise.
4476 (vectorizable_load): Likewise.
4477 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4478 vec_perm_indices instead of auto_vec_perm_indices. Use
4479 tree_to_vec_perm_builder to read the vector from a tree.
4480 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4481 vec_perm_builder instead of a vec_perm_indices.
4482 (have_whole_vector_shift): Use vec_perm_builder and
4483 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4484 truncation to calc_vec_perm_mask_for_shift.
4485 (vect_create_epilog_for_reduction): Likewise.
4486 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4487 from auto_vec_perm_indices to vec_perm_indices.
4488 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4489 instead of changing individual elements.
4490 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4491 the vector in d.perm.
4492 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4493 from auto_vec_perm_indices to vec_perm_indices.
4494 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4495 instead of changing individual elements.
4496 (arm_vectorize_vec_perm_const): Use new_vector to install
4497 the vector in d.perm.
4498 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4499 Update vec_perm_builder constructor.
4500 (rs6000_expand_interleave): Likewise.
4501 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4502 (rs6000_expand_interleave): Likewise.
4504 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4506 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4507 to qimode could truncate the indices.
4508 * optabs.c (expand_vec_perm_var): Likewise.
4510 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4512 * Makefile.in (OBJS): Add vec-perm-indices.o.
4513 * vec-perm-indices.h: New file.
4514 * vec-perm-indices.c: Likewise.
4515 * target.h (vec_perm_indices): Replace with a forward class
4517 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4518 * optabs.h: Include vec-perm-indices.h.
4519 (expand_vec_perm): Delete.
4520 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4521 (expand_vec_perm_const): Declare.
4522 * target.def (vec_perm_const_ok): Replace with...
4523 (vec_perm_const): ...this new hook.
4524 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4525 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4526 * doc/tm.texi: Regenerate.
4527 * optabs.def (vec_perm_const): Delete.
4528 * doc/md.texi (vec_perm_const): Likewise.
4529 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4530 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4531 expand_vec_perm for constant permutation vectors. Assert that
4532 the mode of variable permutation vectors is the integer equivalent
4533 of the mode that is being permuted.
4534 * optabs-query.h (selector_fits_mode_p): Declare.
4535 * optabs-query.c: Include vec-perm-indices.h.
4536 (selector_fits_mode_p): New function.
4537 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4538 is defined, instead of checking whether the vec_perm_const_optab
4539 exists. Use targetm.vectorize.vec_perm_const instead of
4540 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4541 fit in the vector mode before using a variable permute.
4542 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4543 vec_perm_indices instead of an rtx.
4544 (expand_vec_perm): Replace with...
4545 (expand_vec_perm_const): ...this new function. Take the selector
4546 as a vec_perm_indices rather than an rtx. Also take the mode of
4547 the selector. Update call to shift_amt_for_vec_perm_mask.
4548 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4549 Use vec_perm_indices::new_expanded_vector to expand the original
4550 selector into bytes. Check whether the indices fit in the vector
4551 mode before using a variable permute.
4552 (expand_vec_perm_var): Make global.
4553 (expand_mult_highpart): Use expand_vec_perm_const.
4554 * fold-const.c: Includes vec-perm-indices.h.
4555 * tree-ssa-forwprop.c: Likewise.
4556 * tree-vect-data-refs.c: Likewise.
4557 * tree-vect-generic.c: Likewise.
4558 * tree-vect-loop.c: Likewise.
4559 * tree-vect-slp.c: Likewise.
4560 * tree-vect-stmts.c: Likewise.
4561 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4563 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4564 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4565 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4566 (aarch64_vectorize_vec_perm_const): ...this new function.
4567 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4568 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4569 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4570 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4571 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4572 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4573 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4575 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4576 check for NEON modes.
4577 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4578 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4579 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4580 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4582 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4583 the old VEC_PERM_CONST conditions.
4584 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4585 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4586 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4587 (ia64_vectorize_vec_perm_const_ok): Merge into...
4588 (ia64_vectorize_vec_perm_const): ...this new function.
4589 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4590 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4591 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4592 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4593 * config/mips/mips.c (mips_expand_vec_perm_const)
4594 (mips_vectorize_vec_perm_const_ok): Merge into...
4595 (mips_vectorize_vec_perm_const): ...this new function.
4596 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4597 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4598 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4599 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4600 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4601 (rs6000_expand_vec_perm_const): Delete.
4602 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4604 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4605 (altivec_expand_vec_perm_const_le): Take each operand individually.
4606 Operate on constant selectors rather than rtxes.
4607 (altivec_expand_vec_perm_const): Likewise. Update call to
4608 altivec_expand_vec_perm_const_le.
4609 (rs6000_expand_vec_perm_const): Delete.
4610 (rs6000_vectorize_vec_perm_const_ok): Delete.
4611 (rs6000_vectorize_vec_perm_const): New function.
4612 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4613 an element count and rtx array.
4614 (rs6000_expand_extract_even): Update call accordingly.
4615 (rs6000_expand_interleave): Likewise.
4616 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4617 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4618 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4619 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4620 (rs6000_expand_vec_perm_const): Delete.
4621 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4622 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4623 (altivec_expand_vec_perm_const_le): Take each operand individually.
4624 Operate on constant selectors rather than rtxes.
4625 (altivec_expand_vec_perm_const): Likewise. Update call to
4626 altivec_expand_vec_perm_const_le.
4627 (rs6000_expand_vec_perm_const): Delete.
4628 (rs6000_vectorize_vec_perm_const_ok): Delete.
4629 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4630 reference to the SPE evmerge intructions.
4631 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4632 an element count and rtx array.
4633 (rs6000_expand_extract_even): Update call accordingly.
4634 (rs6000_expand_interleave): Likewise.
4635 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4636 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4638 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4640 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4642 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4643 vector mode and that that mode matches the mode of the data
4645 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4646 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4647 directly using expand_vec_perm_1 when forcing selectors into
4649 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4651 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4653 * optabs-query.h (can_vec_perm_p): Delete.
4654 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4655 * optabs-query.c (can_vec_perm_p): Split into...
4656 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4657 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4658 particular selector is valid.
4659 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4660 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4661 (vect_grouped_load_supported): Likewise.
4662 (vect_shift_permute_load_chain): Likewise.
4663 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4664 (vect_transform_slp_perm_load): Likewise.
4665 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4666 (vectorizable_bswap): Likewise.
4667 (vect_gen_perm_mask_checked): Likewise.
4668 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4669 implementations of variable permutation vectors into account
4670 when deciding which selector to use.
4671 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4672 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4673 with a false third argument.
4674 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4675 to test whether the constant selector is valid and can_vec_perm_var_p
4676 to test whether a variable selector is valid.
4678 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4680 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4681 * optabs-query.c (can_vec_perm_p): Likewise.
4682 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4683 instead of vec_perm_indices.
4684 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4685 (vect_gen_perm_mask_checked): Likewise,
4686 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4687 (vect_gen_perm_mask_checked): Likewise,
4689 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4691 * optabs-query.h (qimode_for_vec_perm): Declare.
4692 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4693 (qimode_for_vec_perm): ...this new function.
4694 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4696 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4698 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4699 does not have a conditional at the top.
4701 2018-01-02 Richard Biener <rguenther@suse.de>
4703 * ipa-inline.c (big_speedup_p): Fix expression.
4705 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4708 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4711 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4715 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4716 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4717 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4718 cond_taken_branch_cost 3->4.
4720 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4722 PR tree-optimization/83581
4723 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4724 TODO_cleanup_cfg if any changes have been made.
4727 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4728 convert_modes if target mode has the right side, but different mode
4732 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4733 last argument when extracting from CONCAT. If either from_real or
4734 from_imag is NULL, use expansion through memory. If result is not
4735 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4736 the parts directly to inner mode, if even that fails, use expansion
4740 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4741 check for bswap in mode rather than HImode and use that in expand_unop
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